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Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wan / lmc / lmc_main.c
CommitLineData
1da177e4
LT		 1 /*
2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
3 * All rights reserved. www.lanmedia.com
64bef763 4 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
1da177e4
LT		 5 *
6 * This code is written by:
7 * Andrew Stanley-Jones (asj@cban.com)
8 * Rob Braun (bbraun@vix.com),
9 * Michael Graff (explorer@vix.com) and
10 * Matt Thomas (matt@3am-software.com).
11 *
12 * With Help By:
13 * David Boggs
14 * Ron Crane
15 * Alan Cox
16 *
17 * This software may be used and distributed according to the terms
18 * of the GNU General Public License version 2, incorporated herein by reference.
19 *
20 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
21 *
22 * To control link specific options lmcctl is required.
23 * It can be obtained from ftp.lanmedia.com.
24 *
25 * Linux driver notes:
26 * Linux uses the device struct lmc_private to pass private information
25985edc 27 * around.
1da177e4
LT		 28 *
29 * The initialization portion of this driver (the lmc_reset() and the
30 * lmc_dec_reset() functions, as well as the led controls and the
31 * lmc_initcsrs() functions.
32 *
33 * The watchdog function runs every second and checks to see if
34 * we still have link, and that the timing source is what we expected
35 * it to be. If link is lost, the interface is marked down, and
36 * we no longer can transmit.
37 *
38 */
39
1da177e4
LT		 40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/string.h>
43#include <linux/timer.h>
44#include <linux/ptrace.h>
45#include <linux/errno.h>
46#include <linux/ioport.h>
47#include <linux/slab.h>
48#include <linux/interrupt.h>
49#include <linux/pci.h>
50#include <linux/delay.h>
64bef763 51#include <linux/hdlc.h>
1da177e4
LT		 52#include <linux/in.h>
53#include <linux/if_arp.h>
54#include <linux/netdevice.h>
55#include <linux/etherdevice.h>
56#include <linux/skbuff.h>
57#include <linux/inet.h>
58#include <linux/bitops.h>
1da177e4
LT		 59#include <asm/processor.h> /* Processor type for cache alignment. */
60#include <asm/io.h>
61#include <asm/dma.h>
7c0f6ba6 62#include <linux/uaccess.h>
1da177e4
LT		 63//#include <asm/spinlock.h>
64
65#define DRIVER_MAJOR_VERSION 1
66#define DRIVER_MINOR_VERSION 34
67#define DRIVER_SUB_VERSION 0
68
69#define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
70
71#include "lmc.h"
72#include "lmc_var.h"
73#include "lmc_ioctl.h"
74#include "lmc_debug.h"
75#include "lmc_proto.h"
76
1da177e4
LT		 77static int LMC_PKT_BUF_SZ = 1542;
78
9baa3c34 79static const struct pci_device_id lmc_pci_tbl[] = {
1da177e4
LT		 80 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
81 PCI_VENDOR_ID_LMC, PCI_ANY_ID },
82 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
83 PCI_ANY_ID, PCI_VENDOR_ID_LMC },
84 { 0 }
85};
86
87MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
64bef763 88MODULE_LICENSE("GPL v2");
1da177e4
LT		 89
90
d71a6749
SH		 91static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
92 struct net_device *dev);
1da177e4
LT		 93static int lmc_rx (struct net_device *dev);
94static int lmc_open(struct net_device *dev);
95static int lmc_close(struct net_device *dev);
96static struct net_device_stats *lmc_get_stats(struct net_device *dev);
7d12e780 97static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
1da177e4
LT		 98static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
99static void lmc_softreset(lmc_softc_t * const);
100static void lmc_running_reset(struct net_device *dev);
101static int lmc_ifdown(struct net_device * const);
102static void lmc_watchdog(unsigned long data);
103static void lmc_reset(lmc_softc_t * const sc);
104static void lmc_dec_reset(lmc_softc_t * const sc);
105static void lmc_driver_timeout(struct net_device *dev);
106
107/*
108 * linux reserves 16 device specific IOCTLs. We call them
109 * LMCIOC* to control various bits of our world.
110 */
64bef763 111int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
1da177e4 112{
64bef763 113 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4 114 lmc_ctl_t ctl;
64bef763
KH		 115 int ret = -EOPNOTSUPP;
116 u16 regVal;
1da177e4
LT		 117 unsigned long flags;
118
1da177e4
LT		 119 lmc_trace(dev, "lmc_ioctl in");
120
121 /*
122 * Most functions mess with the structure
123 * Disable interrupts while we do the polling
124 */
1da177e4
LT		 125
126 switch (cmd) {
127 /*
128 * Return current driver state. Since we keep this up
129 * To date internally, just copy this out to the user.
130 */
131 case LMCIOCGINFO: /*fold01*/
e3376dca
RK		 132 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
133 ret = -EFAULT;
134 else
135 ret = 0;
1da177e4
LT		 136 break;
137
138 case LMCIOCSINFO: /*fold01*/
1da177e4
LT		 139 if (!capable(CAP_NET_ADMIN)) {
140 ret = -EPERM;
141 break;
142 }
143
144 if(dev->flags & IFF_UP){
145 ret = -EBUSY;
146 break;
147 }
148
e3376dca
RK		 149 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
150 ret = -EFAULT;
151 break;
152 }
1da177e4 153
8ab7b667 154 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 155 sc->lmc_media->set_status (sc, &ctl);
156
157 if(ctl.crc_length != sc->ictl.crc_length) {
158 sc->lmc_media->set_crc_length(sc, ctl.crc_length);
159 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
160 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
161 else
162 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
163 }
8ab7b667 164 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4 165
1da177e4
LT		 166 ret = 0;
167 break;
168
169 case LMCIOCIFTYPE: /*fold01*/
170 {
64bef763
KH		 171 u16 old_type = sc->if_type;
172 u16 new_type;
1da177e4
LT		 173
174 if (!capable(CAP_NET_ADMIN)) {
175 ret = -EPERM;
176 break;
177 }
178
64bef763 179 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
e3376dca
RK		 180 ret = -EFAULT;
181 break;
182 }
1da177e4
LT		 183
184
185 if (new_type == old_type)
186 {
187 ret = 0 ;
188 break; /* no change */
189 }
190
8ab7b667 191 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4 192 lmc_proto_close(sc);
1da177e4
LT		 193
194 sc->if_type = new_type;
1da177e4 195 lmc_proto_attach(sc);
64bef763 196 ret = lmc_proto_open(sc);
8ab7b667 197 spin_unlock_irqrestore(&sc->lmc_lock, flags);
64bef763 198 break;
1da177e4
LT		 199 }
200
201 case LMCIOCGETXINFO: /*fold01*/
8ab7b667 202 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 203 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
204
205 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
206 sc->lmc_xinfo.PciSlotNumber = 0;
207 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
208 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
209 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
210 sc->lmc_xinfo.XilinxRevisionNumber =
211 lmc_mii_readreg (sc, 0, 3) & 0xf;
212 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
213 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
214 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
8ab7b667 215 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4
LT		 216
217 sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
218
219 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
5c41542b 220 sizeof(struct lmc_xinfo)))
e3376dca
RK		 221 ret = -EFAULT;
222 else
223 ret = 0;
1da177e4
LT		 224
225 break;
226
64bef763 227 case LMCIOCGETLMCSTATS:
8ab7b667 228 spin_lock_irqsave(&sc->lmc_lock, flags);
64bef763
KH		 229 if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
230 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
231 sc->extra_stats.framingBitErrorCount +=
232 lmc_mii_readreg(sc, 0, 18) & 0xff;
233 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
234 sc->extra_stats.framingBitErrorCount +=
235 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
236 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
237 sc->extra_stats.lineCodeViolationCount +=
238 lmc_mii_readreg(sc, 0, 18) & 0xff;
239 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
240 sc->extra_stats.lineCodeViolationCount +=
241 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
242 lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
243 regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
244
245 sc->extra_stats.lossOfFrameCount +=
246 (regVal & T1FRAMER_LOF_MASK) >> 4;
247 sc->extra_stats.changeOfFrameAlignmentCount +=
248 (regVal & T1FRAMER_COFA_MASK) >> 2;
249 sc->extra_stats.severelyErroredFrameCount +=
250 regVal & T1FRAMER_SEF_MASK;
251 }
8ab7b667 252 spin_unlock_irqrestore(&sc->lmc_lock, flags);
64bef763
KH		 253 if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
254 sizeof(sc->lmc_device->stats)) ||
255 copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
256 &sc->extra_stats, sizeof(sc->extra_stats)))
257 ret = -EFAULT;
258 else
259 ret = 0;
260 break;
1da177e4 261
64bef763
KH		 262 case LMCIOCCLEARLMCSTATS:
263 if (!capable(CAP_NET_ADMIN)) {
264 ret = -EPERM;
265 break;
266 }
1da177e4 267
8ab7b667 268 spin_lock_irqsave(&sc->lmc_lock, flags);
64bef763
KH		 269 memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
270 memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
271 sc->extra_stats.check = STATCHECK;
272 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
273 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
274 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
8ab7b667 275 spin_unlock_irqrestore(&sc->lmc_lock, flags);
64bef763
KH		 276 ret = 0;
277 break;
1da177e4
LT		 278
279 case LMCIOCSETCIRCUIT: /*fold01*/
280 if (!capable(CAP_NET_ADMIN)){
281 ret = -EPERM;
282 break;
283 }
284
285 if(dev->flags & IFF_UP){
286 ret = -EBUSY;
287 break;
288 }
289
e3376dca
RK		 290 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
291 ret = -EFAULT;
292 break;
293 }
8ab7b667 294 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 295 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
296 sc->ictl.circuit_type = ctl.circuit_type;
8ab7b667 297 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4
LT		 298 ret = 0;
299
300 break;
301
302 case LMCIOCRESET: /*fold01*/
303 if (!capable(CAP_NET_ADMIN)){
304 ret = -EPERM;
305 break;
306 }
307
8ab7b667 308 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 309 /* Reset driver and bring back to current state */
310 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
311 lmc_running_reset (dev);
312 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
313
314 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
8ab7b667 315 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4
LT		 316
317 ret = 0;
318 break;
319
320#ifdef DEBUG
321 case LMCIOCDUMPEVENTLOG:
e3376dca
RK		 322 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
323 ret = -EFAULT;
324 break;
325 }
867240f7
KH		 326 if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
327 sizeof(lmcEventLogBuf)))
e3376dca
RK		 328 ret = -EFAULT;
329 else
330 ret = 0;
1da177e4 331
1da177e4
LT		 332 break;
333#endif /* end ifdef _DBG_EVENTLOG */
334 case LMCIOCT1CONTROL: /*fold01*/
335 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
336 ret = -EOPNOTSUPP;
337 break;
338 }
339 break;
340 case LMCIOCXILINX: /*fold01*/
341 {
342 struct lmc_xilinx_control xc; /*fold02*/
343
344 if (!capable(CAP_NET_ADMIN)){
345 ret = -EPERM;
346 break;
347 }
348
349 /*
350 * Stop the xwitter whlie we restart the hardware
351 */
352 netif_stop_queue(dev);
353
8ab7b667 354 if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
e3376dca
RK		 355 ret = -EFAULT;
356 break;
8ab7b667 357 }
1da177e4
LT		 358 switch(xc.command){
359 case lmc_xilinx_reset: /*fold02*/
360 {
361 u16 mii;
8ab7b667 362 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 363 mii = lmc_mii_readreg (sc, 0, 16);
364
365 /*
366 * Make all of them 0 and make input
367 */
368 lmc_gpio_mkinput(sc, 0xff);
369
370 /*
371 * make the reset output
372 */
373 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
374
375 /*
376 * RESET low to force configuration. This also forces
377 * the transmitter clock to be internal, but we expect to reset
378 * that later anyway.
379 */
380
381 sc->lmc_gpio &= ~LMC_GEP_RESET;
382 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
383
384
385 /*
386 * hold for more than 10 microseconds
387 */
388 udelay(50);
389
390 sc->lmc_gpio |= LMC_GEP_RESET;
391 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
392
393
394 /*
395 * stop driving Xilinx-related signals
396 */
397 lmc_gpio_mkinput(sc, 0xff);
398
399 /* Reset the frammer hardware */
400 sc->lmc_media->set_link_status (sc, 1);
401 sc->lmc_media->set_status (sc, NULL);
402// lmc_softreset(sc);
403
404 {
405 int i;
406 for(i = 0; i < 5; i++){
407 lmc_led_on(sc, LMC_DS3_LED0);
408 mdelay(100);
409 lmc_led_off(sc, LMC_DS3_LED0);
410 lmc_led_on(sc, LMC_DS3_LED1);
411 mdelay(100);
412 lmc_led_off(sc, LMC_DS3_LED1);
413 lmc_led_on(sc, LMC_DS3_LED3);
414 mdelay(100);
415 lmc_led_off(sc, LMC_DS3_LED3);
416 lmc_led_on(sc, LMC_DS3_LED2);
417 mdelay(100);
418 lmc_led_off(sc, LMC_DS3_LED2);
419 }
420 }
8ab7b667 421 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4
LT		 422
423
424
425 ret = 0x0;
426
427 }
428
429 break;
430 case lmc_xilinx_load_prom: /*fold02*/
431 {
432 u16 mii;
433 int timeout = 500000;
8ab7b667 434 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 435 mii = lmc_mii_readreg (sc, 0, 16);
436
437 /*
438 * Make all of them 0 and make input
439 */
440 lmc_gpio_mkinput(sc, 0xff);
441
442 /*
443 * make the reset output
444 */
445 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
446
447 /*
448 * RESET low to force configuration. This also forces
449 * the transmitter clock to be internal, but we expect to reset
450 * that later anyway.
451 */
452
453 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
454 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
455
456
457 /*
458 * hold for more than 10 microseconds
459 */
460 udelay(50);
461
462 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
463 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
464
465 /*
466 * busy wait for the chip to reset
467 */
468 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
469 (timeout-- > 0))
8ab7b667 470 cpu_relax();
1da177e4
LT		 471
472
473 /*
474 * stop driving Xilinx-related signals
475 */
476 lmc_gpio_mkinput(sc, 0xff);
8ab7b667 477 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4
LT		 478
479 ret = 0x0;
480
481
482 break;
483
484 }
485
486 case lmc_xilinx_load: /*fold02*/
487 {
488 char *data;
489 int pos;
490 int timeout = 500000;
491
79ea13ce 492 if (!xc.data) {
1da177e4
LT		 493 ret = -EINVAL;
494 break;
495 }
496
497 data = kmalloc(xc.len, GFP_KERNEL);
79ea13ce 498 if (!data) {
1da177e4
LT		 499 ret = -ENOMEM;
500 break;
501 }
502
503 if(copy_from_user(data, xc.data, xc.len))
504 {
505 kfree(data);
506 ret = -ENOMEM;
507 break;
508 }
509
510 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
511
8ab7b667 512 spin_lock_irqsave(&sc->lmc_lock, flags);
1da177e4
LT		 513 lmc_gpio_mkinput(sc, 0xff);
514
515 /*
516 * Clear the Xilinx and start prgramming from the DEC
517 */
518
519 /*
520 * Set ouput as:
521 * Reset: 0 (active)
522 * DP: 0 (active)
523 * Mode: 1
524 *
525 */
526 sc->lmc_gpio = 0x00;
527 sc->lmc_gpio &= ~LMC_GEP_DP;
528 sc->lmc_gpio &= ~LMC_GEP_RESET;
529 sc->lmc_gpio |= LMC_GEP_MODE;
530 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
531
532 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
533
534 /*
535 * Wait at least 10 us 20 to be safe
536 */
537 udelay(50);
538
539 /*
540 * Clear reset and activate programming lines
541 * Reset: Input
542 * DP: Input
543 * Clock: Output
544 * Data: Output
545 * Mode: Output
546 */
547 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
548
549 /*
550 * Set LOAD, DATA, Clock to 1
551 */
552 sc->lmc_gpio = 0x00;
553 sc->lmc_gpio |= LMC_GEP_MODE;
554 sc->lmc_gpio |= LMC_GEP_DATA;
555 sc->lmc_gpio |= LMC_GEP_CLK;
556 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
557
558 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
559
560 /*
561 * busy wait for the chip to reset
562 */
563 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
564 (timeout-- > 0))
8ab7b667 565 cpu_relax();
1da177e4
LT		 566
567 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
568
569 for(pos = 0; pos < xc.len; pos++){
570 switch(data[pos]){
571 case 0:
572 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
573 break;
574 case 1:
575 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
576 break;
577 default:
578 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
579 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
580 }
581 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
582 sc->lmc_gpio |= LMC_GEP_MODE;
583 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
584 udelay(1);
585
586 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
587 sc->lmc_gpio |= LMC_GEP_MODE;
588 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
589 udelay(1);
590 }
591 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
592 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
593 }
594 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
595 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
596 }
597 else {
598 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
599 }
600
601 lmc_gpio_mkinput(sc, 0xff);
602
603 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
604 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
605
606 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
607 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
8ab7b667 608 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1da177e4
LT		 609
610 kfree(data);
611
612 ret = 0;
613
614 break;
615 }
616 default: /*fold02*/
617 ret = -EBADE;
618 break;
619 }
620
621 netif_wake_queue(dev);
622 sc->lmc_txfull = 0;
623
624 }
625 break;
626 default: /*fold01*/
627 /* If we don't know what to do, give the protocol a shot. */
628 ret = lmc_proto_ioctl (sc, ifr, cmd);
629 break;
630 }
631
1da177e4
LT		 632 lmc_trace(dev, "lmc_ioctl out");
633
634 return ret;
635}
636
637
638/* the watchdog process that cruises around */
639static void lmc_watchdog (unsigned long data) /*fold00*/
640{
64bef763
KH		 641 struct net_device *dev = (struct net_device *)data;
642 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4 643 int link_status;
867240f7 644 u32 ticks;
1da177e4
LT		 645 unsigned long flags;
646
1da177e4
LT		 647 lmc_trace(dev, "lmc_watchdog in");
648
649 spin_lock_irqsave(&sc->lmc_lock, flags);
650
651 if(sc->check != 0xBEAFCAFE){
32357988 652 printk("LMC: Corrupt net_device struct, breaking out\n");
1da177e4
LT		 653 spin_unlock_irqrestore(&sc->lmc_lock, flags);
654 return;
655 }
656
657
658 /* Make sure the tx jabber and rx watchdog are off,
659 * and the transmit and receive processes are running.
660 */
661
662 LMC_CSR_WRITE (sc, csr_15, 0x00000011);
663 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
664 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
665
666 if (sc->lmc_ok == 0)
667 goto kick_timer;
668
669 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
670
671 /* --- begin time out check -----------------------------------
672 * check for a transmit interrupt timeout
673 * Has the packet xmt vs xmt serviced threshold been exceeded */
674 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
64bef763
KH		 675 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
676 sc->tx_TimeoutInd == 0)
1da177e4
LT		 677 {
678
679 /* wait for the watchdog to come around again */
680 sc->tx_TimeoutInd = 1;
681 }
682 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
64bef763
KH		 683 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
684 sc->tx_TimeoutInd)
1da177e4
LT		 685 {
686
687 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
688
689 sc->tx_TimeoutDisplay = 1;
64bef763 690 sc->extra_stats.tx_TimeoutCnt++;
1da177e4
LT		 691
692 /* DEC chip is stuck, hit it with a RESET!!!! */
693 lmc_running_reset (dev);
694
695
696 /* look at receive & transmit process state to make sure they are running */
697 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
698
699 /* look at: DSR - 02 for Reg 16
700 * CTS - 08
701 * DCD - 10
702 * RI - 20
703 * for Reg 17
704 */
705 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
706
707 /* reset the transmit timeout detection flag */
708 sc->tx_TimeoutInd = 0;
709 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
64bef763
KH		 710 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
711 } else {
1da177e4
LT		 712 sc->tx_TimeoutInd = 0;
713 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
64bef763 714 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
1da177e4
LT		 715 }
716
717 /* --- end time out check ----------------------------------- */
718
719
720 link_status = sc->lmc_media->get_link_status (sc);
721
722 /*
723 * hardware level link lost, but the interface is marked as up.
724 * Mark it as down.
725 */
726 if ((link_status == 0) && (sc->last_link_status != 0)) {
727 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
728 sc->last_link_status = 0;
729 /* lmc_reset (sc); Why reset??? The link can go down ok */
730
731 /* Inform the world that link has been lost */
7d17c1d6 732 netif_carrier_off(dev);
1da177e4
LT		 733 }
734
735 /*
736 * hardware link is up, but the interface is marked as down.
737 * Bring it back up again.
738 */
739 if (link_status != 0 && sc->last_link_status == 0) {
740 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
741 sc->last_link_status = 1;
742 /* lmc_reset (sc); Again why reset??? */
743
7d17c1d6 744 netif_carrier_on(dev);
1da177e4
LT		 745 }
746
747 /* Call media specific watchdog functions */
748 sc->lmc_media->watchdog(sc);
749
750 /*
751 * Poke the transmitter to make sure it
752 * never stops, even if we run out of mem
753 */
754 LMC_CSR_WRITE(sc, csr_rxpoll, 0);
755
756 /*
757 * Check for code that failed
758 * and try and fix it as appropriate
759 */
760 if(sc->failed_ring == 1){
761 /*
762 * Failed to setup the recv/xmit rin
763 * Try again
764 */
765 sc->failed_ring = 0;
766 lmc_softreset(sc);
767 }
768 if(sc->failed_recv_alloc == 1){
769 /*
770 * We failed to alloc mem in the
771 * interrupt handler, go through the rings
772 * and rebuild them
773 */
774 sc->failed_recv_alloc = 0;
775 lmc_softreset(sc);
776 }
777
778
779 /*
780 * remember the timer value
781 */
782kick_timer:
783
784 ticks = LMC_CSR_READ (sc, csr_gp_timer);
785 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
786 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
787
788 /*
789 * restart this timer.
790 */
791 sc->timer.expires = jiffies + (HZ);
792 add_timer (&sc->timer);
793
794 spin_unlock_irqrestore(&sc->lmc_lock, flags);
795
796 lmc_trace(dev, "lmc_watchdog out");
797
798}
799
64bef763
KH		 800static int lmc_attach(struct net_device *dev, unsigned short encoding,
801 unsigned short parity)
1da177e4 802{
64bef763
KH		 803 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
804 return 0;
805 return -EINVAL;
1da177e4
LT		 806}
807
991990a1
KH		 808static const struct net_device_ops lmc_ops = {
809 .ndo_open = lmc_open,
810 .ndo_stop = lmc_close,
991990a1
KH		 811 .ndo_start_xmit = hdlc_start_xmit,
812 .ndo_do_ioctl = lmc_ioctl,
813 .ndo_tx_timeout = lmc_driver_timeout,
814 .ndo_get_stats = lmc_get_stats,
815};
816
1dd06ae8 817static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 818{
64bef763
KH		 819 lmc_softc_t *sc;
820 struct net_device *dev;
821 u16 subdevice;
822 u16 AdapModelNum;
823 int err;
824 static int cards_found;
825
826 /* lmc_trace(dev, "lmc_init_one in"); */
827
7cb43beb 828 err = pcim_enable_device(pdev);
64bef763
KH		 829 if (err) {
830 printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
831 return err;
832 }
1da177e4 833
64bef763
KH		 834 err = pci_request_regions(pdev, "lmc");
835 if (err) {
836 printk(KERN_ERR "lmc: pci_request_region failed\n");
7cb43beb 837 return err;
64bef763 838 }
1da177e4 839
64bef763
KH		 840 /*
841 * Allocate our own device structure
842 */
7cb43beb
AKC		 843 sc = devm_kzalloc(&pdev->dev, sizeof(lmc_softc_t), GFP_KERNEL);
844 if (!sc)
845 return -ENOMEM;
1da177e4 846
64bef763
KH		 847 dev = alloc_hdlcdev(sc);
848 if (!dev) {
849 printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
7cb43beb 850 return -ENOMEM;
64bef763 851 }
1da177e4 852
1da177e4 853
64bef763
KH		 854 dev->type = ARPHRD_HDLC;
855 dev_to_hdlc(dev)->xmit = lmc_start_xmit;
856 dev_to_hdlc(dev)->attach = lmc_attach;
991990a1 857 dev->netdev_ops = &lmc_ops;
64bef763
KH		 858 dev->watchdog_timeo = HZ; /* 1 second */
859 dev->tx_queue_len = 100;
860 sc->lmc_device = dev;
861 sc->name = dev->name;
862 sc->if_type = LMC_PPP;
863 sc->check = 0xBEAFCAFE;
864 dev->base_addr = pci_resource_start(pdev, 0);
865 dev->irq = pdev->irq;
866 pci_set_drvdata(pdev, dev);
867 SET_NETDEV_DEV(dev, &pdev->dev);
868
869 /*
870 * This will get the protocol layer ready and do any 1 time init's
871 * Must have a valid sc and dev structure
872 */
873 lmc_proto_attach(sc);
874
875 /* Init the spin lock so can call it latter */
876
877 spin_lock_init(&sc->lmc_lock);
878 pci_set_master(pdev);
879
880 printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
881 dev->base_addr, dev->irq);
882
883 err = register_hdlc_device(dev);
884 if (err) {
885 printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
886 free_netdev(dev);
7cb43beb 887 return err;
64bef763 888 }
1da177e4
LT		 889
890 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
891 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
892
893 /*
894 *
895 * Check either the subvendor or the subdevice, some systems reverse
896 * the setting in the bois, seems to be version and arch dependent?
897 * Fix the error, exchange the two values
898 */
899 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
900 subdevice = pdev->subsystem_vendor;
901
902 switch (subdevice) {
903 case PCI_DEVICE_ID_LMC_HSSI:
64bef763 904 printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
1da177e4
LT		 905 sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
906 sc->lmc_media = &lmc_hssi_media;
907 break;
908 case PCI_DEVICE_ID_LMC_DS3:
64bef763 909 printk(KERN_INFO "%s: LMC DS3\n", dev->name);
1da177e4
LT		 910 sc->lmc_cardtype = LMC_CARDTYPE_DS3;
911 sc->lmc_media = &lmc_ds3_media;
912 break;
913 case PCI_DEVICE_ID_LMC_SSI:
64bef763 914 printk(KERN_INFO "%s: LMC SSI\n", dev->name);
1da177e4
LT		 915 sc->lmc_cardtype = LMC_CARDTYPE_SSI;
916 sc->lmc_media = &lmc_ssi_media;
917 break;
918 case PCI_DEVICE_ID_LMC_T1:
64bef763 919 printk(KERN_INFO "%s: LMC T1\n", dev->name);
1da177e4
LT		 920 sc->lmc_cardtype = LMC_CARDTYPE_T1;
921 sc->lmc_media = &lmc_t1_media;
922 break;
923 default:
af901ca1 924 printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
1da177e4
LT		 925 break;
926 }
927
928 lmc_initcsrs (sc, dev->base_addr, 8);
929
930 lmc_gpio_mkinput (sc, 0xff);
931 sc->lmc_gpio = 0; /* drive no signals yet */
932
933 sc->lmc_media->defaults (sc);
934
935 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
936
937 /* verify that the PCI Sub System ID matches the Adapter Model number
938 * from the MII register
939 */
940 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
941
64bef763
KH		 942 if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
943 subdevice != PCI_DEVICE_ID_LMC_T1) &&
944 (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
945 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
946 (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
947 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
948 (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
949 subdevice != PCI_DEVICE_ID_LMC_HSSI))
950 printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
951 " Subsystem ID = 0x%04x\n",
952 dev->name, AdapModelNum, subdevice);
1da177e4 953
1da177e4
LT		 954 /*
955 * reset clock
956 */
957 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
958
959 sc->board_idx = cards_found++;
64bef763
KH		 960 sc->extra_stats.check = STATCHECK;
961 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
962 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
963 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
1da177e4
LT		 964
965 sc->lmc_ok = 0;
966 sc->last_link_status = 0;
967
968 lmc_trace(dev, "lmc_init_one out");
969 return 0;
1da177e4
LT		 970}
971
972/*
973 * Called from pci when removing module.
974 */
a46182eb 975static void lmc_remove_one(struct pci_dev *pdev)
1da177e4 976{
64bef763
KH		 977 struct net_device *dev = pci_get_drvdata(pdev);
978
979 if (dev) {
980 printk(KERN_DEBUG "%s: removing...\n", dev->name);
981 unregister_hdlc_device(dev);
982 free_netdev(dev);
64bef763 983 }
1da177e4
LT		 984}
985
986/* After this is called, packets can be sent.
987 * Does not initialize the addresses
988 */
64bef763 989static int lmc_open(struct net_device *dev)
1da177e4 990{
64bef763
KH		 991 lmc_softc_t *sc = dev_to_sc(dev);
992 int err;
1da177e4
LT		 993
994 lmc_trace(dev, "lmc_open in");
995
996 lmc_led_on(sc, LMC_DS3_LED0);
997
64bef763
KH		 998 lmc_dec_reset(sc);
999 lmc_reset(sc);
1da177e4 1000
64bef763
KH		 1001 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
1002 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
1003 lmc_mii_readreg(sc, 0, 17));
1da177e4
LT		 1004
1005 if (sc->lmc_ok){
1006 lmc_trace(dev, "lmc_open lmc_ok out");
807540ba 1007 return 0;
1da177e4
LT		 1008 }
1009
1010 lmc_softreset (sc);
1011
1012 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
a0607fd3 1013 if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
1da177e4
LT		 1014 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1015 lmc_trace(dev, "lmc_open irq failed out");
1016 return -EAGAIN;
1017 }
1018 sc->got_irq = 1;
1019
1020 /* Assert Terminal Active */
1021 sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1022 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1023
1024 /*
1025 * reset to last state.
1026 */
1027 sc->lmc_media->set_status (sc, NULL);
1028
1029 /* setup default bits to be used in tulip_desc_t transmit descriptor
1030 * -baz */
1031 sc->TxDescriptControlInit = (
1032 LMC_TDES_INTERRUPT_ON_COMPLETION
1033 | LMC_TDES_FIRST_SEGMENT
1034 | LMC_TDES_LAST_SEGMENT
1035 | LMC_TDES_SECOND_ADDR_CHAINED
1036 | LMC_TDES_DISABLE_PADDING
1037 );
1038
1039 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1040 /* disable 32 bit CRC generated by ASIC */
1041 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1042 }
1043 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1044 /* Acknoledge the Terminal Active and light LEDs */
1045
1046 /* dev->flags |= IFF_UP; */
1047
64bef763
KH		 1048 if ((err = lmc_proto_open(sc)) != 0)
1049 return err;
1da177e4 1050
1da177e4 1051 netif_start_queue(dev);
64bef763 1052 sc->extra_stats.tx_tbusy0++;
1da177e4
LT		 1053
1054 /*
1055 * select what interrupts we want to get
1056 */
1057 sc->lmc_intrmask = 0;
1058 /* Should be using the default interrupt mask defined in the .h file. */
1059 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1060 | TULIP_STS_RXINTR
1061 | TULIP_STS_TXINTR
1062 | TULIP_STS_ABNRMLINTR
1063 | TULIP_STS_SYSERROR
1064 | TULIP_STS_TXSTOPPED
1065 | TULIP_STS_TXUNDERFLOW
1066 | TULIP_STS_RXSTOPPED
1067 | TULIP_STS_RXNOBUF
1068 );
1069 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1070
1071 sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1072 sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1073 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1074
1075 sc->lmc_ok = 1; /* Run watchdog */
1076
1077 /*
1078 * Set the if up now - pfb
1079 */
1080
1081 sc->last_link_status = 1;
1082
1083 /*
1084 * Setup a timer for the watchdog on probe, and start it running.
1085 * Since lmc_ok == 0, it will be a NOP for now.
1086 */
1087 init_timer (&sc->timer);
1088 sc->timer.expires = jiffies + HZ;
1089 sc->timer.data = (unsigned long) dev;
c061b18d 1090 sc->timer.function = lmc_watchdog;
1da177e4
LT		 1091 add_timer (&sc->timer);
1092
1093 lmc_trace(dev, "lmc_open out");
1094
807540ba 1095 return 0;
1da177e4
LT		 1096}
1097
1098/* Total reset to compensate for the AdTran DSU doing bad things
1099 * under heavy load
1100 */
1101
1102static void lmc_running_reset (struct net_device *dev) /*fold00*/
1103{
64bef763 1104 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4 1105
fd9071ec 1106 lmc_trace(dev, "lmc_running_reset in");
1da177e4
LT		 1107
1108 /* stop interrupts */
1109 /* Clear the interrupt mask */
1110 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1111
1112 lmc_dec_reset (sc);
1113 lmc_reset (sc);
1114 lmc_softreset (sc);
1115 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1116 sc->lmc_media->set_link_status (sc, 1);
1117 sc->lmc_media->set_status (sc, NULL);
1118
1da177e4
LT		 1119 netif_wake_queue(dev);
1120
1121 sc->lmc_txfull = 0;
64bef763 1122 sc->extra_stats.tx_tbusy0++;
1da177e4
LT		 1123
1124 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1125 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1126
1127 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1128 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1129
1130 lmc_trace(dev, "lmc_runnin_reset_out");
1131}
1132
1133
1134/* This is what is called when you ifconfig down a device.
1135 * This disables the timer for the watchdog and keepalives,
1136 * and disables the irq for dev.
1137 */
64bef763 1138static int lmc_close(struct net_device *dev)
1da177e4
LT		 1139{
1140 /* not calling release_region() as we should */
64bef763 1141 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 1142
1143 lmc_trace(dev, "lmc_close in");
64bef763 1144
1da177e4
LT		 1145 sc->lmc_ok = 0;
1146 sc->lmc_media->set_link_status (sc, 0);
1147 del_timer (&sc->timer);
1148 lmc_proto_close(sc);
1149 lmc_ifdown (dev);
1150
1151 lmc_trace(dev, "lmc_close out");
64bef763 1152
1da177e4
LT		 1153 return 0;
1154}
1155
1156/* Ends the transfer of packets */
1157/* When the interface goes down, this is called */
1158static int lmc_ifdown (struct net_device *dev) /*fold00*/
1159{
64bef763 1160 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 1161 u32 csr6;
1162 int i;
1163
1164 lmc_trace(dev, "lmc_ifdown in");
64bef763 1165
1da177e4
LT		 1166 /* Don't let anything else go on right now */
1167 // dev->start = 0;
1168 netif_stop_queue(dev);
64bef763 1169 sc->extra_stats.tx_tbusy1++;
1da177e4
LT		 1170
1171 /* stop interrupts */
1172 /* Clear the interrupt mask */
1173 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1174
1175 /* Stop Tx and Rx on the chip */
1176 csr6 = LMC_CSR_READ (sc, csr_command);
1177 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
1178 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
1179 LMC_CSR_WRITE (sc, csr_command, csr6);
1180
64bef763
KH		 1181 sc->lmc_device->stats.rx_missed_errors +=
1182 LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1da177e4
LT		 1183
1184 /* release the interrupt */
1185 if(sc->got_irq == 1){
1186 free_irq (dev->irq, dev);
1187 sc->got_irq = 0;
1188 }
1189
1190 /* free skbuffs in the Rx queue */
1191 for (i = 0; i < LMC_RXDESCS; i++)
1192 {
1193 struct sk_buff *skb = sc->lmc_rxq[i];
1194 sc->lmc_rxq[i] = NULL;
1195 sc->lmc_rxring[i].status = 0;
1196 sc->lmc_rxring[i].length = 0;
1197 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1198 if (skb != NULL)
1199 dev_kfree_skb(skb);
1200 sc->lmc_rxq[i] = NULL;
1201 }
1202
1203 for (i = 0; i < LMC_TXDESCS; i++)
1204 {
1205 if (sc->lmc_txq[i] != NULL)
1206 dev_kfree_skb(sc->lmc_txq[i]);
1207 sc->lmc_txq[i] = NULL;
1208 }
1209
1210 lmc_led_off (sc, LMC_MII16_LED_ALL);
1211
1212 netif_wake_queue(dev);
64bef763 1213 sc->extra_stats.tx_tbusy0++;
1da177e4
LT		 1214
1215 lmc_trace(dev, "lmc_ifdown out");
1216
1217 return 0;
1218}
1219
1220/* Interrupt handling routine. This will take an incoming packet, or clean
1221 * up after a trasmit.
1222 */
7d12e780 1223static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1da177e4
LT		 1224{
1225 struct net_device *dev = (struct net_device *) dev_instance;
64bef763 1226 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 1227 u32 csr;
1228 int i;
1229 s32 stat;
1230 unsigned int badtx;
1231 u32 firstcsr;
1232 int max_work = LMC_RXDESCS;
1233 int handled = 0;
1234
1235 lmc_trace(dev, "lmc_interrupt in");
1236
1da177e4
LT		 1237 spin_lock(&sc->lmc_lock);
1238
1239 /*
1240 * Read the csr to find what interrupts we have (if any)
1241 */
1242 csr = LMC_CSR_READ (sc, csr_status);
1243
1244 /*
1245 * Make sure this is our interrupt
1246 */
1247 if ( ! (csr & sc->lmc_intrmask)) {
1248 goto lmc_int_fail_out;
1249 }
1250
1251 firstcsr = csr;
1252
1253 /* always go through this loop at least once */
1254 while (csr & sc->lmc_intrmask) {
1255 handled = 1;
1256
1257 /*
1258 * Clear interrupt bits, we handle all case below
1259 */
1260 LMC_CSR_WRITE (sc, csr_status, csr);
1261
1262 /*
1263 * One of
1264 * - Transmit process timed out CSR5<1>
1265 * - Transmit jabber timeout CSR5<3>
1266 * - Transmit underflow CSR5<5>
1267 * - Transmit Receiver buffer unavailable CSR5<7>
1268 * - Receive process stopped CSR5<8>
1269 * - Receive watchdog timeout CSR5<9>
1270 * - Early transmit interrupt CSR5<10>
1271 *
1272 * Is this really right? Should we do a running reset for jabber?
1273 * (being a WAN card and all)
1274 */
1275 if (csr & TULIP_STS_ABNRMLINTR){
1276 lmc_running_reset (dev);
1277 break;
1278 }
1279
1280 if (csr & TULIP_STS_RXINTR){
1281 lmc_trace(dev, "rx interrupt");
1282 lmc_rx (dev);
1283
1284 }
1285 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1286
1287 int n_compl = 0 ;
1288 /* reset the transmit timeout detection flag -baz */
64bef763 1289 sc->extra_stats.tx_NoCompleteCnt = 0;
1da177e4
LT		 1290
1291 badtx = sc->lmc_taint_tx;
1292 i = badtx % LMC_TXDESCS;
1293
1294 while ((badtx < sc->lmc_next_tx)) {
1295 stat = sc->lmc_txring[i].status;
1296
1297 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1298 sc->lmc_txring[i].length);
1299 /*
1300 * If bit 31 is 1 the tulip owns it break out of the loop
1301 */
1302 if (stat & 0x80000000)
1303 break;
1304
1305 n_compl++ ; /* i.e., have an empty slot in ring */
1306 /*
1307 * If we have no skbuff or have cleared it
1308 * Already continue to the next buffer
1309 */
1310 if (sc->lmc_txq[i] == NULL)
1311 continue;
1312
64bef763
KH		 1313 /*
1314 * Check the total error summary to look for any errors
1315 */
1316 if (stat & 0x8000) {
1317 sc->lmc_device->stats.tx_errors++;
1318 if (stat & 0x4104)
1319 sc->lmc_device->stats.tx_aborted_errors++;
1320 if (stat & 0x0C00)
1321 sc->lmc_device->stats.tx_carrier_errors++;
1322 if (stat & 0x0200)
1323 sc->lmc_device->stats.tx_window_errors++;
1324 if (stat & 0x0002)
1325 sc->lmc_device->stats.tx_fifo_errors++;
1326 } else {
1327 sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1328
1329 sc->lmc_device->stats.tx_packets++;
1da177e4 1330 }
64bef763 1331
1da177e4
LT		 1332 // dev_kfree_skb(sc->lmc_txq[i]);
1333 dev_kfree_skb_irq(sc->lmc_txq[i]);
1334 sc->lmc_txq[i] = NULL;
1335
1336 badtx++;
1337 i = badtx % LMC_TXDESCS;
1338 }
1339
1340 if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1341 {
1342 printk ("%s: out of sync pointer\n", dev->name);
1343 badtx += LMC_TXDESCS;
1344 }
1345 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1346 sc->lmc_txfull = 0;
1347 netif_wake_queue(dev);
64bef763 1348 sc->extra_stats.tx_tbusy0++;
1da177e4
LT		 1349
1350
1351#ifdef DEBUG
64bef763
KH		 1352 sc->extra_stats.dirtyTx = badtx;
1353 sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1354 sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1da177e4
LT		 1355#endif
1356 sc->lmc_taint_tx = badtx;
1357
1358 /*
1359 * Why was there a break here???
1360 */
1361 } /* end handle transmit interrupt */
1362
1363 if (csr & TULIP_STS_SYSERROR) {
1364 u32 error;
1365 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1366 error = csr>>23 & 0x7;
1367 switch(error){
1368 case 0x000:
1369 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1370 break;
1371 case 0x001:
1372 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1373 break;
1374 case 0x010:
1375 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1376 break;
1377 default:
1378 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1379 }
1380 lmc_dec_reset (sc);
1381 lmc_reset (sc);
1382 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1383 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1384 lmc_mii_readreg (sc, 0, 16),
1385 lmc_mii_readreg (sc, 0, 17));
1386
1387 }
1388
1389
1390 if(max_work-- <= 0)
1391 break;
1392
1393 /*
1394 * Get current csr status to make sure
1395 * we've cleared all interrupts
1396 */
1397 csr = LMC_CSR_READ (sc, csr_status);
1398 } /* end interrupt loop */
1399 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1400
1401lmc_int_fail_out:
1402
1403 spin_unlock(&sc->lmc_lock);
1404
1405 lmc_trace(dev, "lmc_interrupt out");
1406 return IRQ_RETVAL(handled);
1407}
1408
d71a6749
SH		 1409static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1410 struct net_device *dev)
1da177e4 1411{
64bef763 1412 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 1413 u32 flag;
1414 int entry;
1da177e4
LT		 1415 unsigned long flags;
1416
1417 lmc_trace(dev, "lmc_start_xmit in");
1418
1da177e4
LT		 1419 spin_lock_irqsave(&sc->lmc_lock, flags);
1420
1421 /* normal path, tbusy known to be zero */
1422
1423 entry = sc->lmc_next_tx % LMC_TXDESCS;
1424
1425 sc->lmc_txq[entry] = skb;
1426 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1427
1428 LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1429
1430#ifndef GCOM
1431 /* If the queue is less than half full, don't interrupt */
1432 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1433 {
1434 /* Do not interrupt on completion of this packet */
1435 flag = 0x60000000;
1436 netif_wake_queue(dev);
1437 }
1438 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1439 {
1440 /* This generates an interrupt on completion of this packet */
1441 flag = 0xe0000000;
1442 netif_wake_queue(dev);
1443 }
1444 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1445 {
1446 /* Do not interrupt on completion of this packet */
1447 flag = 0x60000000;
1448 netif_wake_queue(dev);
1449 }
1450 else
1451 {
1452 /* This generates an interrupt on completion of this packet */
1453 flag = 0xe0000000;
1454 sc->lmc_txfull = 1;
1455 netif_stop_queue(dev);
1456 }
1457#else
1458 flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1459
1460 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1461 { /* ring full, go busy */
1462 sc->lmc_txfull = 1;
64bef763
KH		 1463 netif_stop_queue(dev);
1464 sc->extra_stats.tx_tbusy1++;
1da177e4
LT		 1465 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1466 }
1467#endif
1468
1469
1470 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
1471 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
1472
1473 /* don't pad small packets either */
1474 flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1475 sc->TxDescriptControlInit;
1476
1477 /* set the transmit timeout flag to be checked in
1478 * the watchdog timer handler. -baz
1479 */
1480
64bef763 1481 sc->extra_stats.tx_NoCompleteCnt++;
1da177e4
LT		 1482 sc->lmc_next_tx++;
1483
1484 /* give ownership to the chip */
1485 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1486 sc->lmc_txring[entry].status = 0x80000000;
1487
1488 /* send now! */
1489 LMC_CSR_WRITE (sc, csr_txpoll, 0);
1490
1da177e4
LT		 1491 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1492
1493 lmc_trace(dev, "lmc_start_xmit_out");
d71a6749 1494 return NETDEV_TX_OK;
1da177e4
LT		 1495}
1496
1497
64bef763 1498static int lmc_rx(struct net_device *dev)
1da177e4 1499{
64bef763 1500 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 1501 int i;
1502 int rx_work_limit = LMC_RXDESCS;
1503 unsigned int next_rx;
1504 int rxIntLoopCnt; /* debug -baz */
1505 int localLengthErrCnt = 0;
1506 long stat;
1507 struct sk_buff *skb, *nsb;
1508 u16 len;
1509
1510 lmc_trace(dev, "lmc_rx in");
1511
1da177e4
LT		 1512 lmc_led_on(sc, LMC_DS3_LED3);
1513
1514 rxIntLoopCnt = 0; /* debug -baz */
1515
1516 i = sc->lmc_next_rx % LMC_RXDESCS;
1517 next_rx = sc->lmc_next_rx;
1518
1519 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1520 {
1521 rxIntLoopCnt++; /* debug -baz */
1522 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1523 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
64bef763
KH		 1524 if ((stat & 0x0000ffff) != 0x7fff) {
1525 /* Oversized frame */
1526 sc->lmc_device->stats.rx_length_errors++;
1527 goto skip_packet;
1528 }
1529 }
1da177e4 1530
64bef763
KH		 1531 if (stat & 0x00000008) { /* Catch a dribbling bit error */
1532 sc->lmc_device->stats.rx_errors++;
1533 sc->lmc_device->stats.rx_frame_errors++;
1534 goto skip_packet;
1535 }
1da177e4 1536
1da177e4 1537
64bef763
KH		 1538 if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1539 sc->lmc_device->stats.rx_errors++;
1540 sc->lmc_device->stats.rx_crc_errors++;
1541 goto skip_packet;
1542 }
1da177e4 1543
64bef763
KH		 1544 if (len > LMC_PKT_BUF_SZ) {
1545 sc->lmc_device->stats.rx_length_errors++;
1546 localLengthErrCnt++;
1547 goto skip_packet;
1548 }
1da177e4 1549
64bef763
KH		 1550 if (len < sc->lmc_crcSize + 2) {
1551 sc->lmc_device->stats.rx_length_errors++;
1552 sc->extra_stats.rx_SmallPktCnt++;
1553 localLengthErrCnt++;
1554 goto skip_packet;
1555 }
1da177e4
LT		 1556
1557 if(stat & 0x00004000){
1558 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1559 }
1560
1561 len -= sc->lmc_crcSize;
1562
1563 skb = sc->lmc_rxq[i];
1564
1565 /*
1566 * We ran out of memory at some point
1567 * just allocate an skb buff and continue.
1568 */
1569
79ea13ce 1570 if (!skb) {
1da177e4
LT		 1571 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1572 if (nsb) {
1573 sc->lmc_rxq[i] = nsb;
1574 nsb->dev = dev;
27a884dc 1575 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1da177e4
LT		 1576 }
1577 sc->failed_recv_alloc = 1;
1578 goto skip_packet;
1579 }
1580
64bef763
KH		 1581 sc->lmc_device->stats.rx_packets++;
1582 sc->lmc_device->stats.rx_bytes += len;
1da177e4
LT		 1583
1584 LMC_CONSOLE_LOG("recv", skb->data, len);
1585
1586 /*
1587 * I'm not sure of the sanity of this
1588 * Packets could be arriving at a constant
1589 * 44.210mbits/sec and we're going to copy
1590 * them into a new buffer??
1591 */
1592
1593 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1594 /*
1595 * If it's a large packet don't copy it just hand it up
1596 */
1597 give_it_anyways:
1598
1599 sc->lmc_rxq[i] = NULL;
1600 sc->lmc_rxring[i].buffer1 = 0x0;
1601
1602 skb_put (skb, len);
1603 skb->protocol = lmc_proto_type(sc, skb);
459a98ed 1604 skb_reset_mac_header(skb);
c1d2bbe1 1605 /* skb_reset_network_header(skb); */
1da177e4
LT		 1606 skb->dev = dev;
1607 lmc_proto_netif(sc, skb);
1608
1609 /*
1610 * This skb will be destroyed by the upper layers, make a new one
1611 */
1612 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1613 if (nsb) {
1614 sc->lmc_rxq[i] = nsb;
1615 nsb->dev = dev;
27a884dc 1616 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1da177e4
LT		 1617 /* Transferred to 21140 below */
1618 }
1619 else {
1620 /*
1621 * We've run out of memory, stop trying to allocate
1622 * memory and exit the interrupt handler
1623 *
1624 * The chip may run out of receivers and stop
1625 * in which care we'll try to allocate the buffer
1626 * again. (once a second)
1627 */
64bef763 1628 sc->extra_stats.rx_BuffAllocErr++;
1da177e4
LT		 1629 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1630 sc->failed_recv_alloc = 1;
1631 goto skip_out_of_mem;
1632 }
1633 }
1634 else {
1635 nsb = dev_alloc_skb(len);
1636 if(!nsb) {
1637 goto give_it_anyways;
1638 }
d626f62b 1639 skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1da177e4 1640
38edb5b8 1641 nsb->protocol = lmc_proto_type(sc, nsb);
459a98ed 1642 skb_reset_mac_header(nsb);
c1d2bbe1 1643 /* skb_reset_network_header(nsb); */
1da177e4
LT		 1644 nsb->dev = dev;
1645 lmc_proto_netif(sc, nsb);
1646 }
1647
1648 skip_packet:
1649 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1650 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1651
1652 sc->lmc_next_rx++;
1653 i = sc->lmc_next_rx % LMC_RXDESCS;
1654 rx_work_limit--;
1655 if (rx_work_limit < 0)
1656 break;
1657 }
1658
1659 /* detect condition for LMC1000 where DSU cable attaches and fills
1660 * descriptors with bogus packets
1661 *
1662 if (localLengthErrCnt > LMC_RXDESCS - 3) {
64bef763
KH		 1663 sc->extra_stats.rx_BadPktSurgeCnt++;
1664 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1665 sc->extra_stats.rx_BadPktSurgeCnt);
1da177e4
LT		 1666 } */
1667
1668 /* save max count of receive descriptors serviced */
64bef763
KH		 1669 if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1670 sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1da177e4
LT		 1671
1672#ifdef DEBUG
1673 if (rxIntLoopCnt == 0)
1674 {
1675 for (i = 0; i < LMC_RXDESCS; i++)
1676 {
1677 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1678 != DESC_OWNED_BY_DC21X4)
1679 {
1680 rxIntLoopCnt++;
1681 }
1682 }
1683 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1684 }
1685#endif
1686
1687
1688 lmc_led_off(sc, LMC_DS3_LED3);
1689
1690skip_out_of_mem:
1691
1692 lmc_trace(dev, "lmc_rx out");
1693
1694 return 0;
1695}
1696
64bef763 1697static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1da177e4 1698{
64bef763 1699 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 1700 unsigned long flags;
1701
1702 lmc_trace(dev, "lmc_get_stats in");
1703
1da177e4
LT		 1704 spin_lock_irqsave(&sc->lmc_lock, flags);
1705
64bef763 1706 sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1da177e4
LT		 1707
1708 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1709
1710 lmc_trace(dev, "lmc_get_stats out");
1711
64bef763 1712 return &sc->lmc_device->stats;
1da177e4
LT		 1713}
1714
1715static struct pci_driver lmc_driver = {
1716 .name = "lmc",
1717 .id_table = lmc_pci_tbl,
1718 .probe = lmc_init_one,
a46182eb 1719 .remove = lmc_remove_one,
1da177e4
LT		 1720};
1721
eff98db0 1722module_pci_driver(lmc_driver);
1da177e4
LT		 1723
1724unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1725{
1726 int i;
1727 int command = (0xf6 << 10) | (devaddr << 5) | regno;
1728 int retval = 0;
1729
1730 lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1731
1732 LMC_MII_SYNC (sc);
1733
1734 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1735
1736 for (i = 15; i >= 0; i--)
1737 {
1738 int dataval = (command & (1 << i)) ? 0x20000 : 0;
1739
1740 LMC_CSR_WRITE (sc, csr_9, dataval);
1741 lmc_delay ();
1742 /* __SLOW_DOWN_IO; */
1743 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1744 lmc_delay ();
1745 /* __SLOW_DOWN_IO; */
1746 }
1747
1748 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1749
1750 for (i = 19; i > 0; i--)
1751 {
1752 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1753 lmc_delay ();
1754 /* __SLOW_DOWN_IO; */
1755 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1756 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1757 lmc_delay ();
1758 /* __SLOW_DOWN_IO; */
1759 }
1760
1761 lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1762
1763 return (retval >> 1) & 0xffff;
1764}
1765
1766void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1767{
1768 int i = 32;
1769 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1770
1771 lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1772
1773 LMC_MII_SYNC (sc);
1774
1775 i = 31;
1776 while (i >= 0)
1777 {
1778 int datav;
1779
1780 if (command & (1 << i))
1781 datav = 0x20000;
1782 else
1783 datav = 0x00000;
1784
1785 LMC_CSR_WRITE (sc, csr_9, datav);
1786 lmc_delay ();
1787 /* __SLOW_DOWN_IO; */
1788 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1789 lmc_delay ();
1790 /* __SLOW_DOWN_IO; */
1791 i--;
1792 }
1793
1794 i = 2;
1795 while (i > 0)
1796 {
1797 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1798 lmc_delay ();
1799 /* __SLOW_DOWN_IO; */
1800 LMC_CSR_WRITE (sc, csr_9, 0x50000);
1801 lmc_delay ();
1802 /* __SLOW_DOWN_IO; */
1803 i--;
1804 }
1805
1806 lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1807}
1808
1809static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1810{
1811 int i;
1812
1813 lmc_trace(sc->lmc_device, "lmc_softreset in");
1814
1815 /* Initialize the receive rings and buffers. */
1816 sc->lmc_txfull = 0;
1817 sc->lmc_next_rx = 0;
1818 sc->lmc_next_tx = 0;
1819 sc->lmc_taint_rx = 0;
1820 sc->lmc_taint_tx = 0;
1821
1822 /*
1823 * Setup each one of the receiver buffers
1824 * allocate an skbuff for each one, setup the descriptor table
1825 * and point each buffer at the next one
1826 */
1827
1828 for (i = 0; i < LMC_RXDESCS; i++)
1829 {
1830 struct sk_buff *skb;
1831
1832 if (sc->lmc_rxq[i] == NULL)
1833 {
1834 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1835 if(skb == NULL){
1836 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1837 sc->failed_ring = 1;
1838 break;
1839 }
1840 else{
1841 sc->lmc_rxq[i] = skb;
1842 }
1843 }
1844 else
1845 {
1846 skb = sc->lmc_rxq[i];
1847 }
1848
1849 skb->dev = sc->lmc_device;
1850
1851 /* owned by 21140 */
1852 sc->lmc_rxring[i].status = 0x80000000;
1853
1854 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
d004b8d4 1855 sc->lmc_rxring[i].length = skb_tailroom(skb);
1da177e4
LT		 1856
1857 /* use to be tail which is dumb since you're thinking why write
1858 * to the end of the packj,et but since there's nothing there tail == data
1859 */
1860 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1861
1862 /* This is fair since the structure is static and we have the next address */
1863 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1864
1865 }
1866
1867 /*
1868 * Sets end of ring
1869 */
8dd07086 1870 if (i != 0) {
1871 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1872 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1873 }
1da177e4
LT		 1874 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1875
1da177e4
LT		 1876 /* Initialize the transmit rings and buffers */
1877 for (i = 0; i < LMC_TXDESCS; i++)
1878 {
1879 if (sc->lmc_txq[i] != NULL){ /* have buffer */
1880 dev_kfree_skb(sc->lmc_txq[i]); /* free it */
64bef763 1881 sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
1da177e4
LT		 1882 }
1883 sc->lmc_txq[i] = NULL;
1884 sc->lmc_txring[i].status = 0x00000000;
1885 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1886 }
1887 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1888 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1889
1890 lmc_trace(sc->lmc_device, "lmc_softreset out");
1891}
1892
867240f7 1893void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1da177e4
LT		 1894{
1895 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1896 sc->lmc_gpio_io &= ~bits;
1897 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1898 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1899}
1900
867240f7 1901void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1da177e4
LT		 1902{
1903 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1904 sc->lmc_gpio_io |= bits;
1905 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1906 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1907}
1908
867240f7 1909void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1da177e4
LT		 1910{
1911 lmc_trace(sc->lmc_device, "lmc_led_on in");
1912 if((~sc->lmc_miireg16) & led){ /* Already on! */
1913 lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1914 return;
1915 }
1916
1917 sc->lmc_miireg16 &= ~led;
1918 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1919 lmc_trace(sc->lmc_device, "lmc_led_on out");
1920}
1921
867240f7 1922void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1da177e4
LT		 1923{
1924 lmc_trace(sc->lmc_device, "lmc_led_off in");
1925 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
1926 lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
1927 return;
1928 }
1929
1930 sc->lmc_miireg16 |= led;
1931 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1932 lmc_trace(sc->lmc_device, "lmc_led_off out");
1933}
1934
1935static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1936{
1937 lmc_trace(sc->lmc_device, "lmc_reset in");
1938 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1939 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1940
1941 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1942 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1943
1944 /*
1945 * make some of the GPIO pins be outputs
1946 */
1947 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1948
1949 /*
1950 * RESET low to force state reset. This also forces
1951 * the transmitter clock to be internal, but we expect to reset
1952 * that later anyway.
1953 */
1954 sc->lmc_gpio &= ~(LMC_GEP_RESET);
1955 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1956
1957 /*
1958 * hold for more than 10 microseconds
1959 */
1960 udelay(50);
1961
1962 /*
1963 * stop driving Xilinx-related signals
1964 */
1965 lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1966
1967 /*
1968 * Call media specific init routine
1969 */
1970 sc->lmc_media->init(sc);
1971
64bef763 1972 sc->extra_stats.resetCount++;
1da177e4
LT		 1973 lmc_trace(sc->lmc_device, "lmc_reset out");
1974}
1975
1976static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1977{
867240f7 1978 u32 val;
1da177e4
LT		 1979 lmc_trace(sc->lmc_device, "lmc_dec_reset in");
1980
1981 /*
1982 * disable all interrupts
1983 */
1984 sc->lmc_intrmask = 0;
1985 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
1986
1987 /*
1988 * Reset the chip with a software reset command.
1989 * Wait 10 microseconds (actually 50 PCI cycles but at
1990 * 33MHz that comes to two microseconds but wait a
1991 * bit longer anyways)
1992 */
1993 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
1994 udelay(25);
1995#ifdef __sparc__
1996 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
1997 sc->lmc_busmode = 0x00100000;
1998 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
1999 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2000#endif
2001 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2002
2003 /*
2004 * We want:
2005 * no ethernet address in frames we write
2006 * disable padding (txdesc, padding disable)
2007 * ignore runt frames (rdes0 bit 15)
2008 * no receiver watchdog or transmitter jabber timer
2009 * (csr15 bit 0,14 == 1)
2010 * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2011 */
2012
2013 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2014 | TULIP_CMD_FULLDUPLEX
2015 | TULIP_CMD_PASSBADPKT
2016 | TULIP_CMD_NOHEARTBEAT
2017 | TULIP_CMD_PORTSELECT
2018 | TULIP_CMD_RECEIVEALL
2019 | TULIP_CMD_MUSTBEONE
2020 );
2021 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2022 | TULIP_CMD_THRESHOLDCTL
2023 | TULIP_CMD_STOREFWD
2024 | TULIP_CMD_TXTHRSHLDCTL
2025 );
2026
2027 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2028
2029 /*
2030 * disable receiver watchdog and transmit jabber
2031 */
2032 val = LMC_CSR_READ(sc, csr_sia_general);
2033 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2034 LMC_CSR_WRITE(sc, csr_sia_general, val);
2035
2036 lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2037}
2038
2039static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2040 size_t csr_size)
2041{
2042 lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2043 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
2044 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
2045 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
2046 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
2047 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
2048 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
2049 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
2050 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
2051 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
2052 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
2053 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
2054 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
2055 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
2056 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
2057 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
2058 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
2059 lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2060}
2061
64bef763
KH		 2062static void lmc_driver_timeout(struct net_device *dev)
2063{
2064 lmc_softc_t *sc = dev_to_sc(dev);
1da177e4
LT		 2065 u32 csr6;
2066 unsigned long flags;
2067
2068 lmc_trace(dev, "lmc_driver_timeout in");
2069
1da177e4
LT		 2070 spin_lock_irqsave(&sc->lmc_lock, flags);
2071
2072 printk("%s: Xmitter busy|\n", dev->name);
2073
64bef763 2074 sc->extra_stats.tx_tbusy_calls++;
1ae5dc34 2075 if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
64bef763 2076 goto bug_out;
1da177e4
LT		 2077
2078 /*
2079 * Chip seems to have locked up
2080 * Reset it
2081 * This whips out all our decriptor
2082 * table and starts from scartch
2083 */
2084
2085 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2086 LMC_CSR_READ (sc, csr_status),
64bef763 2087 sc->extra_stats.tx_ProcTimeout);
1da177e4
LT		 2088
2089 lmc_running_reset (dev);
2090
2091 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2092 LMC_EVENT_LOG(LMC_EVENT_RESET2,
2093 lmc_mii_readreg (sc, 0, 16),
2094 lmc_mii_readreg (sc, 0, 17));
2095
2096 /* restart the tx processes */
2097 csr6 = LMC_CSR_READ (sc, csr_command);
2098 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2099 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2100
2101 /* immediate transmit */
2102 LMC_CSR_WRITE (sc, csr_txpoll, 0);
2103
64bef763
KH		 2104 sc->lmc_device->stats.tx_errors++;
2105 sc->extra_stats.tx_ProcTimeout++; /* -baz */
1da177e4 2106
860e9538 2107 netif_trans_update(dev); /* prevent tx timeout */
1da177e4
LT		 2108
2109bug_out:
2110
2111 spin_unlock_irqrestore(&sc->lmc_lock, flags);
2112
8faaaead 2113 lmc_trace(dev, "lmc_driver_timeout out");
1da177e4
LT		 2114
2115
2116}
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