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Commit | Line | Data |
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d15dd3e5 LR |
1 | /* |
2 | * Copyright (c) 2008-2009 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef ATH_H | |
18 | #define ATH_H | |
19 | ||
20 | #include <linux/skbuff.h> | |
bcd8f54a | 21 | #include <linux/if_ether.h> |
b002a4a9 | 22 | #include <net/mac80211.h> |
d15dd3e5 | 23 | |
7e86c104 LR |
24 | /* |
25 | * The key cache is used for h/w cipher state and also for | |
26 | * tracking station state such as the current tx antenna. | |
27 | * We also setup a mapping table between key cache slot indices | |
28 | * and station state to short-circuit node lookups on rx. | |
29 | * Different parts have different size key caches. We handle | |
30 | * up to ATH_KEYMAX entries (could dynamically allocate state). | |
31 | */ | |
32 | #define ATH_KEYMAX 128 /* max key cache size we handle */ | |
33 | ||
17753748 LR |
34 | static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
35 | ||
3d536acf LR |
36 | struct ath_ani { |
37 | bool caldone; | |
3d536acf LR |
38 | unsigned int longcal_timer; |
39 | unsigned int shortcal_timer; | |
40 | unsigned int resetcal_timer; | |
41 | unsigned int checkani_timer; | |
42 | struct timer_list timer; | |
43 | }; | |
44 | ||
211f5859 LR |
45 | enum ath_device_state { |
46 | ATH_HW_UNAVAILABLE, | |
47 | ATH_HW_INITIALIZED, | |
48 | }; | |
49 | ||
497ad9ad S |
50 | enum ath_bus_type { |
51 | ATH_PCI, | |
52 | ATH_AHB, | |
53 | ATH_USB, | |
54 | }; | |
55 | ||
608b88cb LR |
56 | struct reg_dmn_pair_mapping { |
57 | u16 regDmnEnum; | |
58 | u16 reg_5ghz_ctl; | |
59 | u16 reg_2ghz_ctl; | |
60 | }; | |
61 | ||
62 | struct ath_regulatory { | |
63 | char alpha2[2]; | |
64 | u16 country_code; | |
65 | u16 max_power_level; | |
66 | u32 tp_scale; | |
67 | u16 current_rd; | |
68 | u16 current_rd_ext; | |
69 | int16_t power_limit; | |
70 | struct reg_dmn_pair_mapping *regpair; | |
71 | }; | |
72 | ||
34a13051 | 73 | enum ath_crypt_caps { |
ce2220d1 BR |
74 | ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0), |
75 | ATH_CRYPT_CAP_MIC_COMBINED = BIT(1), | |
34a13051 BR |
76 | }; |
77 | ||
1bba5b73 BR |
78 | struct ath_keyval { |
79 | u8 kv_type; | |
80 | u8 kv_pad; | |
81 | u16 kv_len; | |
82 | u8 kv_val[16]; /* TK */ | |
83 | u8 kv_mic[8]; /* Michael MIC key */ | |
84 | u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware | |
85 | * supports both MIC keys in the same key cache entry; | |
86 | * in that case, kv_mic is the RX key) */ | |
87 | }; | |
88 | ||
89 | enum ath_cipher { | |
90 | ATH_CIPHER_WEP = 0, | |
91 | ATH_CIPHER_AES_OCB = 1, | |
92 | ATH_CIPHER_AES_CCM = 2, | |
93 | ATH_CIPHER_CKIP = 3, | |
94 | ATH_CIPHER_TKIP = 4, | |
95 | ATH_CIPHER_CLR = 5, | |
96 | ATH_CIPHER_MIC = 127 | |
97 | }; | |
98 | ||
50f56316 S |
99 | /** |
100 | * struct ath_ops - Register read/write operations | |
101 | * | |
102 | * @read: Register read | |
103 | * @write: Register write | |
104 | * @enable_write_buffer: Enable multiple register writes | |
435c1610 | 105 | * @write_flush: flush buffered register writes and disable buffering |
50f56316 | 106 | */ |
9e4bffd2 LR |
107 | struct ath_ops { |
108 | unsigned int (*read)(void *, u32 reg_offset); | |
50f56316 S |
109 | void (*write)(void *, u32 val, u32 reg_offset); |
110 | void (*enable_write_buffer)(void *); | |
50f56316 | 111 | void (*write_flush) (void *); |
9e4bffd2 LR |
112 | }; |
113 | ||
5bb12791 LR |
114 | struct ath_common; |
115 | ||
116 | struct ath_bus_ops { | |
497ad9ad S |
117 | enum ath_bus_type ath_bus_type; |
118 | void (*read_cachesize)(struct ath_common *common, int *csz); | |
119 | bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data); | |
120 | void (*bt_coex_prep)(struct ath_common *common); | |
5bb12791 LR |
121 | }; |
122 | ||
d15dd3e5 | 123 | struct ath_common { |
13b81559 | 124 | void *ah; |
bc974f4a | 125 | void *priv; |
b002a4a9 | 126 | struct ieee80211_hw *hw; |
c46917bb | 127 | int debug_mask; |
211f5859 | 128 | enum ath_device_state state; |
c46917bb | 129 | |
3d536acf LR |
130 | struct ath_ani ani; |
131 | ||
d15dd3e5 | 132 | u16 cachelsz; |
1510718d LR |
133 | u16 curaid; |
134 | u8 macaddr[ETH_ALEN]; | |
135 | u8 curbssid[ETH_ALEN]; | |
136 | u8 bssidmask[ETH_ALEN]; | |
c46917bb | 137 | |
43c27613 LR |
138 | u8 tx_chainmask; |
139 | u8 rx_chainmask; | |
140 | ||
cc861f74 LR |
141 | u32 rx_bufsize; |
142 | ||
7e86c104 LR |
143 | u32 keymax; |
144 | DECLARE_BITMAP(keymap, ATH_KEYMAX); | |
56363dde | 145 | DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX); |
34a13051 | 146 | enum ath_crypt_caps crypt_caps; |
7e86c104 | 147 | |
608b88cb | 148 | struct ath_regulatory regulatory; |
9adca126 | 149 | const struct ath_ops *ops; |
5bb12791 | 150 | const struct ath_bus_ops *bus_ops; |
d15dd3e5 LR |
151 | }; |
152 | ||
153 | struct sk_buff *ath_rxbuf_alloc(struct ath_common *common, | |
154 | u32 len, | |
155 | gfp_t gfp_mask); | |
156 | ||
13b81559 | 157 | void ath_hw_setbssidmask(struct ath_common *common); |
1bba5b73 BR |
158 | void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key); |
159 | int ath_key_config(struct ath_common *common, | |
160 | struct ieee80211_vif *vif, | |
161 | struct ieee80211_sta *sta, | |
162 | struct ieee80211_key_conf *key); | |
163 | bool ath_hw_keyreset(struct ath_common *common, u16 entry); | |
13b81559 | 164 | |
d15dd3e5 | 165 | #endif /* ATH_H */ |