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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
d7579d12 | 31 | #include "wmi-ops.h" |
5e3dd157 KV |
32 | |
33 | unsigned int ath10k_debug_mask; | |
34 | static bool uart_print; | |
35 | static unsigned int ath10k_p2p; | |
8868b12c RM |
36 | static bool skip_otp; |
37 | ||
5e3dd157 KV |
38 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
39 | module_param(uart_print, bool, 0644); | |
40 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
8868b12c RM |
41 | module_param(skip_otp, bool, 0644); |
42 | ||
5e3dd157 KV |
43 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
44 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
45 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
8868b12c | 46 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
5e3dd157 KV |
47 | |
48 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
49 | { |
50 | .id = QCA988X_HW_2_0_VERSION, | |
51 | .name = "qca988x hw2.0", | |
52 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 53 | .uart_pin = 7, |
5e3dd157 KV |
54 | .fw = { |
55 | .dir = QCA988X_HW_2_0_FW_DIR, | |
56 | .fw = QCA988X_HW_2_0_FW_FILE, | |
57 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
58 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
59 | .board_size = QCA988X_BOARD_DATA_SZ, |
60 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
61 | }, |
62 | }, | |
63 | }; | |
64 | ||
65 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
66 | { | |
7aa7a72a | 67 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 68 | |
9042e17d | 69 | complete(&ar->target_suspend); |
5e3dd157 KV |
70 | } |
71 | ||
5e3dd157 KV |
72 | static int ath10k_init_configure_target(struct ath10k *ar) |
73 | { | |
74 | u32 param_host; | |
75 | int ret; | |
76 | ||
77 | /* tell target which HTC version it is used*/ | |
78 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
79 | HTC_PROTOCOL_VERSION); | |
80 | if (ret) { | |
7aa7a72a | 81 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
82 | return ret; |
83 | } | |
84 | ||
85 | /* set the firmware mode to STA/IBSS/AP */ | |
86 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
87 | if (ret) { | |
7aa7a72a | 88 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
89 | return ret; |
90 | } | |
91 | ||
92 | /* TODO following parameters need to be re-visited. */ | |
93 | /* num_device */ | |
94 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
95 | /* Firmware mode */ | |
96 | /* FIXME: Why FW_MODE_AP ??.*/ | |
97 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
98 | /* mac_addr_method */ | |
99 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
100 | /* firmware_bridge */ | |
101 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
102 | /* fwsubmode */ | |
103 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
104 | ||
105 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
106 | if (ret) { | |
7aa7a72a | 107 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
108 | return ret; |
109 | } | |
110 | ||
111 | /* We do all byte-swapping on the host */ | |
112 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
113 | if (ret) { | |
7aa7a72a | 114 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
115 | return ret; |
116 | } | |
117 | ||
118 | /* FW descriptor/Data swap flags */ | |
119 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
120 | ||
121 | if (ret) { | |
7aa7a72a | 122 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
123 | return ret; |
124 | } | |
125 | ||
126 | return 0; | |
127 | } | |
128 | ||
129 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
130 | const char *dir, | |
131 | const char *file) | |
132 | { | |
133 | char filename[100]; | |
134 | const struct firmware *fw; | |
135 | int ret; | |
136 | ||
137 | if (file == NULL) | |
138 | return ERR_PTR(-ENOENT); | |
139 | ||
140 | if (dir == NULL) | |
141 | dir = "."; | |
142 | ||
143 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
144 | ret = request_firmware(&fw, filename, ar->dev); | |
145 | if (ret) | |
146 | return ERR_PTR(ret); | |
147 | ||
148 | return fw; | |
149 | } | |
150 | ||
a58227ef KV |
151 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
152 | size_t data_len) | |
5e3dd157 | 153 | { |
9764a2af MK |
154 | u32 board_data_size = ar->hw_params.fw.board_size; |
155 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
156 | u32 board_ext_data_addr; |
157 | int ret; | |
158 | ||
159 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
160 | if (ret) { | |
7aa7a72a MK |
161 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
162 | ret); | |
5e3dd157 KV |
163 | return ret; |
164 | } | |
165 | ||
7aa7a72a | 166 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 167 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
168 | board_ext_data_addr); |
169 | ||
170 | if (board_ext_data_addr == 0) | |
171 | return 0; | |
172 | ||
a58227ef | 173 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 174 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 175 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
176 | return -EINVAL; |
177 | } | |
178 | ||
179 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 180 | data + board_data_size, |
5e3dd157 KV |
181 | board_ext_data_size); |
182 | if (ret) { | |
7aa7a72a | 183 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
184 | return ret; |
185 | } | |
186 | ||
187 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
188 | (board_ext_data_size << 16) | 1); | |
189 | if (ret) { | |
7aa7a72a MK |
190 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
191 | ret); | |
5e3dd157 KV |
192 | return ret; |
193 | } | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
a58227ef KV |
198 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
199 | size_t data_len) | |
5e3dd157 | 200 | { |
9764a2af | 201 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 202 | u32 address; |
5e3dd157 KV |
203 | int ret; |
204 | ||
a58227ef | 205 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 206 | if (ret) { |
7aa7a72a | 207 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
208 | goto exit; |
209 | } | |
210 | ||
211 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
212 | if (ret) { | |
7aa7a72a | 213 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
214 | goto exit; |
215 | } | |
216 | ||
a58227ef | 217 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 218 | min_t(u32, board_data_size, |
a58227ef | 219 | data_len)); |
5e3dd157 | 220 | if (ret) { |
7aa7a72a | 221 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
222 | goto exit; |
223 | } | |
224 | ||
225 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
226 | if (ret) { | |
7aa7a72a | 227 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
228 | goto exit; |
229 | } | |
230 | ||
231 | exit: | |
5e3dd157 KV |
232 | return ret; |
233 | } | |
234 | ||
a58227ef KV |
235 | static int ath10k_download_cal_file(struct ath10k *ar) |
236 | { | |
237 | int ret; | |
238 | ||
239 | if (!ar->cal_file) | |
240 | return -ENOENT; | |
241 | ||
242 | if (IS_ERR(ar->cal_file)) | |
243 | return PTR_ERR(ar->cal_file); | |
244 | ||
245 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
246 | ar->cal_file->size); | |
247 | if (ret) { | |
248 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
249 | return ret; | |
250 | } | |
251 | ||
252 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
253 | ||
254 | return 0; | |
255 | } | |
256 | ||
5aabff05 TK |
257 | static int ath10k_download_cal_dt(struct ath10k *ar) |
258 | { | |
259 | struct device_node *node; | |
260 | int data_len; | |
261 | void *data; | |
262 | int ret; | |
263 | ||
264 | node = ar->dev->of_node; | |
265 | if (!node) | |
266 | /* Device Tree is optional, don't print any warnings if | |
267 | * there's no node for ath10k. | |
268 | */ | |
269 | return -ENOENT; | |
270 | ||
271 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
272 | &data_len)) { | |
273 | /* The calibration data node is optional */ | |
274 | return -ENOENT; | |
275 | } | |
276 | ||
277 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
278 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
279 | data_len); | |
280 | ret = -EMSGSIZE; | |
281 | goto out; | |
282 | } | |
283 | ||
284 | data = kmalloc(data_len, GFP_KERNEL); | |
285 | if (!data) { | |
286 | ret = -ENOMEM; | |
287 | goto out; | |
288 | } | |
289 | ||
290 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
291 | data, data_len); | |
292 | if (ret) { | |
293 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
294 | ret); | |
295 | goto out_free; | |
296 | } | |
297 | ||
298 | ret = ath10k_download_board_data(ar, data, data_len); | |
299 | if (ret) { | |
300 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
301 | ret); | |
302 | goto out_free; | |
303 | } | |
304 | ||
305 | ret = 0; | |
306 | ||
307 | out_free: | |
308 | kfree(data); | |
309 | ||
310 | out: | |
311 | return ret; | |
312 | } | |
313 | ||
5e3dd157 KV |
314 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
315 | { | |
d6d4a58d | 316 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
317 | int ret; |
318 | ||
a58227ef | 319 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
320 | if (ret) { |
321 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
322 | return ret; | |
323 | } | |
324 | ||
5e3dd157 KV |
325 | /* OTP is optional */ |
326 | ||
7f06ea1e | 327 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 328 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 329 | ar->otp_data, ar->otp_len); |
5e3dd157 | 330 | return 0; |
7f06ea1e KV |
331 | } |
332 | ||
7aa7a72a | 333 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 334 | address, ar->otp_len); |
5e3dd157 | 335 | |
958df3a0 | 336 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 337 | if (ret) { |
7aa7a72a | 338 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 339 | return ret; |
5e3dd157 KV |
340 | } |
341 | ||
d6d4a58d | 342 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 343 | if (ret) { |
7aa7a72a | 344 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 345 | return ret; |
5e3dd157 KV |
346 | } |
347 | ||
7aa7a72a | 348 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 349 | |
8868b12c | 350 | if (!skip_otp && result != 0) { |
7aa7a72a | 351 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
352 | return -EINVAL; |
353 | } | |
354 | ||
355 | return 0; | |
5e3dd157 KV |
356 | } |
357 | ||
43d2a30f | 358 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 359 | { |
43d2a30f KV |
360 | u32 address, data_len; |
361 | const char *mode_name; | |
362 | const void *data; | |
5e3dd157 KV |
363 | int ret; |
364 | ||
5e3dd157 KV |
365 | address = ar->hw_params.patch_load_addr; |
366 | ||
43d2a30f KV |
367 | switch (mode) { |
368 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
369 | data = ar->firmware_data; | |
370 | data_len = ar->firmware_len; | |
371 | mode_name = "normal"; | |
372 | break; | |
373 | case ATH10K_FIRMWARE_MODE_UTF: | |
374 | data = ar->testmode.utf->data; | |
375 | data_len = ar->testmode.utf->size; | |
376 | mode_name = "utf"; | |
377 | break; | |
378 | default: | |
379 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
380 | return -EINVAL; | |
381 | } | |
382 | ||
383 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
384 | "boot uploading firmware image %p len %d mode %s\n", | |
385 | data, data_len, mode_name); | |
386 | ||
387 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 388 | if (ret) { |
43d2a30f KV |
389 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
390 | mode_name, ret); | |
391 | return ret; | |
5e3dd157 KV |
392 | } |
393 | ||
29385057 MK |
394 | return ret; |
395 | } | |
396 | ||
397 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
398 | { | |
36527916 KV |
399 | if (ar->board && !IS_ERR(ar->board)) |
400 | release_firmware(ar->board); | |
29385057 MK |
401 | |
402 | if (ar->otp && !IS_ERR(ar->otp)) | |
403 | release_firmware(ar->otp); | |
404 | ||
405 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
406 | release_firmware(ar->firmware); | |
407 | ||
a58227ef KV |
408 | if (ar->cal_file && !IS_ERR(ar->cal_file)) |
409 | release_firmware(ar->cal_file); | |
410 | ||
36527916 | 411 | ar->board = NULL; |
958df3a0 KV |
412 | ar->board_data = NULL; |
413 | ar->board_len = 0; | |
414 | ||
29385057 | 415 | ar->otp = NULL; |
958df3a0 KV |
416 | ar->otp_data = NULL; |
417 | ar->otp_len = 0; | |
418 | ||
29385057 | 419 | ar->firmware = NULL; |
958df3a0 KV |
420 | ar->firmware_data = NULL; |
421 | ar->firmware_len = 0; | |
a58227ef KV |
422 | |
423 | ar->cal_file = NULL; | |
424 | } | |
425 | ||
426 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
427 | { | |
428 | char filename[100]; | |
429 | ||
430 | /* cal-<bus>-<id>.bin */ | |
431 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
432 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
433 | ||
434 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
435 | if (IS_ERR(ar->cal_file)) | |
436 | /* calibration file is optional, don't print any warnings */ | |
437 | return PTR_ERR(ar->cal_file); | |
438 | ||
439 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
440 | ATH10K_FW_DIR, filename); | |
441 | ||
442 | return 0; | |
29385057 MK |
443 | } |
444 | ||
1a222435 | 445 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
446 | { |
447 | int ret = 0; | |
448 | ||
449 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 450 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
451 | return -EINVAL; |
452 | } | |
453 | ||
454 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 455 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
456 | return -EINVAL; |
457 | } | |
458 | ||
36527916 KV |
459 | ar->board = ath10k_fetch_fw_file(ar, |
460 | ar->hw_params.fw.dir, | |
461 | ar->hw_params.fw.board); | |
462 | if (IS_ERR(ar->board)) { | |
463 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 464 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
465 | goto err; |
466 | } | |
467 | ||
958df3a0 KV |
468 | ar->board_data = ar->board->data; |
469 | ar->board_len = ar->board->size; | |
470 | ||
29385057 MK |
471 | ar->firmware = ath10k_fetch_fw_file(ar, |
472 | ar->hw_params.fw.dir, | |
473 | ar->hw_params.fw.fw); | |
474 | if (IS_ERR(ar->firmware)) { | |
475 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 476 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
477 | goto err; |
478 | } | |
479 | ||
958df3a0 KV |
480 | ar->firmware_data = ar->firmware->data; |
481 | ar->firmware_len = ar->firmware->size; | |
482 | ||
29385057 MK |
483 | /* OTP may be undefined. If so, don't fetch it at all */ |
484 | if (ar->hw_params.fw.otp == NULL) | |
485 | return 0; | |
486 | ||
487 | ar->otp = ath10k_fetch_fw_file(ar, | |
488 | ar->hw_params.fw.dir, | |
489 | ar->hw_params.fw.otp); | |
490 | if (IS_ERR(ar->otp)) { | |
491 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 492 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
493 | goto err; |
494 | } | |
495 | ||
958df3a0 KV |
496 | ar->otp_data = ar->otp->data; |
497 | ar->otp_len = ar->otp->size; | |
498 | ||
29385057 MK |
499 | return 0; |
500 | ||
501 | err: | |
502 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
503 | return ret; |
504 | } | |
505 | ||
1a222435 KV |
506 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
507 | { | |
508 | size_t magic_len, len, ie_len; | |
509 | int ie_id, i, index, bit, ret; | |
510 | struct ath10k_fw_ie *hdr; | |
511 | const u8 *data; | |
202e86e6 | 512 | __le32 *timestamp, *version; |
1a222435 KV |
513 | |
514 | /* first fetch the firmware file (firmware-*.bin) */ | |
515 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
516 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 517 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 518 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
519 | return PTR_ERR(ar->firmware); |
520 | } | |
521 | ||
522 | data = ar->firmware->data; | |
523 | len = ar->firmware->size; | |
524 | ||
525 | /* magic also includes the null byte, check that as well */ | |
526 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
527 | ||
528 | if (len < magic_len) { | |
7aa7a72a | 529 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 530 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
531 | ret = -EINVAL; |
532 | goto err; | |
1a222435 KV |
533 | } |
534 | ||
535 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 536 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
537 | ret = -EINVAL; |
538 | goto err; | |
1a222435 KV |
539 | } |
540 | ||
541 | /* jump over the padding */ | |
542 | magic_len = ALIGN(magic_len, 4); | |
543 | ||
544 | len -= magic_len; | |
545 | data += magic_len; | |
546 | ||
547 | /* loop elements */ | |
548 | while (len > sizeof(struct ath10k_fw_ie)) { | |
549 | hdr = (struct ath10k_fw_ie *)data; | |
550 | ||
551 | ie_id = le32_to_cpu(hdr->id); | |
552 | ie_len = le32_to_cpu(hdr->len); | |
553 | ||
554 | len -= sizeof(*hdr); | |
555 | data += sizeof(*hdr); | |
556 | ||
557 | if (len < ie_len) { | |
7aa7a72a | 558 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 559 | ie_id, len, ie_len); |
9bab1cc0 MK |
560 | ret = -EINVAL; |
561 | goto err; | |
1a222435 KV |
562 | } |
563 | ||
564 | switch (ie_id) { | |
565 | case ATH10K_FW_IE_FW_VERSION: | |
566 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
567 | break; | |
568 | ||
569 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
570 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
571 | ||
7aa7a72a | 572 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
573 | "found fw version %s\n", |
574 | ar->hw->wiphy->fw_version); | |
575 | break; | |
576 | case ATH10K_FW_IE_TIMESTAMP: | |
577 | if (ie_len != sizeof(u32)) | |
578 | break; | |
579 | ||
580 | timestamp = (__le32 *)data; | |
581 | ||
7aa7a72a | 582 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
583 | le32_to_cpup(timestamp)); |
584 | break; | |
585 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 586 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
587 | "found firmware features ie (%zd B)\n", |
588 | ie_len); | |
589 | ||
590 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
591 | index = i / 8; | |
592 | bit = i % 8; | |
593 | ||
594 | if (index == ie_len) | |
595 | break; | |
596 | ||
f591a1a5 | 597 | if (data[index] & (1 << bit)) { |
7aa7a72a | 598 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
599 | "Enabling feature bit: %i\n", |
600 | i); | |
1a222435 | 601 | __set_bit(i, ar->fw_features); |
f591a1a5 | 602 | } |
1a222435 KV |
603 | } |
604 | ||
7aa7a72a | 605 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
606 | ar->fw_features, |
607 | sizeof(ar->fw_features)); | |
608 | break; | |
609 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 610 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
611 | "found fw image ie (%zd B)\n", |
612 | ie_len); | |
613 | ||
614 | ar->firmware_data = data; | |
615 | ar->firmware_len = ie_len; | |
616 | ||
617 | break; | |
618 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 619 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
620 | "found otp image ie (%zd B)\n", |
621 | ie_len); | |
622 | ||
623 | ar->otp_data = data; | |
624 | ar->otp_len = ie_len; | |
625 | ||
626 | break; | |
202e86e6 KV |
627 | case ATH10K_FW_IE_WMI_OP_VERSION: |
628 | if (ie_len != sizeof(u32)) | |
629 | break; | |
630 | ||
631 | version = (__le32 *)data; | |
632 | ||
633 | ar->wmi.op_version = le32_to_cpup(version); | |
634 | ||
635 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", | |
636 | ar->wmi.op_version); | |
637 | break; | |
1a222435 | 638 | default: |
7aa7a72a | 639 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
640 | le32_to_cpu(hdr->id)); |
641 | break; | |
642 | } | |
643 | ||
644 | /* jump over the padding */ | |
645 | ie_len = ALIGN(ie_len, 4); | |
646 | ||
647 | len -= ie_len; | |
648 | data += ie_len; | |
e05634ee | 649 | } |
1a222435 KV |
650 | |
651 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 652 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 653 | ar->hw_params.fw.dir, name); |
1a222435 KV |
654 | ret = -ENOMEDIUM; |
655 | goto err; | |
656 | } | |
657 | ||
658 | /* now fetch the board file */ | |
659 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 660 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
661 | ret = -EINVAL; |
662 | goto err; | |
663 | } | |
664 | ||
665 | ar->board = ath10k_fetch_fw_file(ar, | |
666 | ar->hw_params.fw.dir, | |
667 | ar->hw_params.fw.board); | |
668 | if (IS_ERR(ar->board)) { | |
669 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 670 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
671 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
672 | ret); | |
1a222435 KV |
673 | goto err; |
674 | } | |
675 | ||
676 | ar->board_data = ar->board->data; | |
677 | ar->board_len = ar->board->size; | |
678 | ||
679 | return 0; | |
680 | ||
681 | err: | |
682 | ath10k_core_free_firmware_files(ar); | |
683 | return ret; | |
684 | } | |
685 | ||
686 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
687 | { | |
688 | int ret; | |
689 | ||
a58227ef KV |
690 | /* calibration file is optional, don't check for any errors */ |
691 | ath10k_fetch_cal_file(ar); | |
692 | ||
24c88f78 | 693 | ar->fw_api = 3; |
7aa7a72a | 694 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
695 | |
696 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
697 | if (ret == 0) | |
698 | goto success; | |
699 | ||
53c02284 | 700 | ar->fw_api = 2; |
7aa7a72a | 701 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 702 | |
1a222435 | 703 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
704 | if (ret == 0) |
705 | goto success; | |
706 | ||
707 | ar->fw_api = 1; | |
7aa7a72a | 708 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
709 | |
710 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
711 | if (ret) | |
712 | return ret; | |
713 | ||
53c02284 | 714 | success: |
7aa7a72a | 715 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
716 | |
717 | return 0; | |
718 | } | |
719 | ||
83091559 | 720 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
721 | { |
722 | int ret; | |
723 | ||
a58227ef KV |
724 | ret = ath10k_download_cal_file(ar); |
725 | if (ret == 0) { | |
726 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
727 | goto done; | |
728 | } | |
729 | ||
730 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
731 | "boot did not find a calibration file, try DT next: %d\n", |
732 | ret); | |
733 | ||
734 | ret = ath10k_download_cal_dt(ar); | |
735 | if (ret == 0) { | |
736 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
737 | goto done; | |
738 | } | |
739 | ||
740 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
741 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
742 | ret); |
743 | ||
5e3dd157 | 744 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 745 | if (ret) { |
7aa7a72a | 746 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 747 | return ret; |
36a8f413 | 748 | } |
5e3dd157 | 749 | |
a58227ef KV |
750 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
751 | ||
752 | done: | |
753 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
754 | ath10k_cal_mode_str(ar->cal_mode)); | |
755 | return 0; | |
5e3dd157 KV |
756 | } |
757 | ||
758 | static int ath10k_init_uart(struct ath10k *ar) | |
759 | { | |
760 | int ret; | |
761 | ||
762 | /* | |
763 | * Explicitly setting UART prints to zero as target turns it on | |
764 | * based on scratch registers. | |
765 | */ | |
766 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
767 | if (ret) { | |
7aa7a72a | 768 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
769 | return ret; |
770 | } | |
771 | ||
c8c39afe | 772 | if (!uart_print) |
5e3dd157 | 773 | return 0; |
5e3dd157 | 774 | |
3a8200b2 | 775 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 776 | if (ret) { |
7aa7a72a | 777 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
778 | return ret; |
779 | } | |
780 | ||
781 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
782 | if (ret) { | |
7aa7a72a | 783 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
784 | return ret; |
785 | } | |
786 | ||
03fc137b BM |
787 | /* Set the UART baud rate to 19200. */ |
788 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
789 | if (ret) { | |
7aa7a72a | 790 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
791 | return ret; |
792 | } | |
793 | ||
7aa7a72a | 794 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
795 | return 0; |
796 | } | |
797 | ||
798 | static int ath10k_init_hw_params(struct ath10k *ar) | |
799 | { | |
800 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
801 | int i; | |
802 | ||
803 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
804 | hw_params = &ath10k_hw_params_list[i]; | |
805 | ||
806 | if (hw_params->id == ar->target_version) | |
807 | break; | |
808 | } | |
809 | ||
810 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 811 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
812 | ar->target_version); |
813 | return -EINVAL; | |
814 | } | |
815 | ||
816 | ar->hw_params = *hw_params; | |
817 | ||
7aa7a72a | 818 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 819 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
820 | |
821 | return 0; | |
822 | } | |
823 | ||
affd3217 MK |
824 | static void ath10k_core_restart(struct work_struct *work) |
825 | { | |
826 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
827 | ||
7962b0d8 MK |
828 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
829 | ||
830 | /* Place a barrier to make sure the compiler doesn't reorder | |
831 | * CRASH_FLUSH and calling other functions. | |
832 | */ | |
833 | barrier(); | |
834 | ||
835 | ieee80211_stop_queues(ar->hw); | |
836 | ath10k_drain_tx(ar); | |
837 | complete_all(&ar->scan.started); | |
838 | complete_all(&ar->scan.completed); | |
839 | complete_all(&ar->scan.on_channel); | |
840 | complete_all(&ar->offchan_tx_completed); | |
841 | complete_all(&ar->install_key_done); | |
842 | complete_all(&ar->vdev_setup_done); | |
843 | wake_up(&ar->htt.empty_tx_wq); | |
844 | wake_up(&ar->wmi.tx_credits_wq); | |
845 | wake_up(&ar->peer_mapping_wq); | |
846 | ||
affd3217 MK |
847 | mutex_lock(&ar->conf_mutex); |
848 | ||
849 | switch (ar->state) { | |
850 | case ATH10K_STATE_ON: | |
affd3217 | 851 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 852 | ath10k_hif_stop(ar); |
5c81c7fd | 853 | ath10k_scan_finish(ar); |
affd3217 MK |
854 | ieee80211_restart_hw(ar->hw); |
855 | break; | |
856 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
857 | /* this can happen if driver is being unloaded |
858 | * or if the crash happens during FW probing */ | |
7aa7a72a | 859 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
860 | break; |
861 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
862 | /* hw restart might be requested from multiple places */ |
863 | break; | |
affd3217 MK |
864 | case ATH10K_STATE_RESTARTED: |
865 | ar->state = ATH10K_STATE_WEDGED; | |
866 | /* fall through */ | |
867 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 868 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 869 | break; |
43d2a30f KV |
870 | case ATH10K_STATE_UTF: |
871 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
872 | break; | |
affd3217 MK |
873 | } |
874 | ||
875 | mutex_unlock(&ar->conf_mutex); | |
876 | } | |
877 | ||
5f2144d9 | 878 | static int ath10k_core_init_firmware_features(struct ath10k *ar) |
cfd1061e | 879 | { |
5f2144d9 KV |
880 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
881 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
882 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); | |
883 | return -EINVAL; | |
884 | } | |
885 | ||
202e86e6 KV |
886 | if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { |
887 | ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", | |
888 | ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); | |
889 | return -EINVAL; | |
890 | } | |
891 | ||
892 | /* Backwards compatibility for firmwares without | |
893 | * ATH10K_FW_IE_WMI_OP_VERSION. | |
894 | */ | |
895 | if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { | |
896 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
897 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) | |
898 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; | |
899 | else | |
900 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; | |
901 | } else { | |
902 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; | |
903 | } | |
904 | } | |
905 | ||
906 | switch (ar->wmi.op_version) { | |
907 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
cfd1061e MK |
908 | ar->max_num_peers = TARGET_NUM_PEERS; |
909 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
91ad5f56 | 910 | ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; |
202e86e6 KV |
911 | break; |
912 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
913 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
914 | ar->max_num_peers = TARGET_10X_NUM_PEERS; | |
915 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
91ad5f56 | 916 | ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; |
202e86e6 KV |
917 | break; |
918 | case ATH10K_FW_WMI_OP_VERSION_UNSET: | |
919 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
920 | WARN_ON(1); | |
921 | return -EINVAL; | |
cfd1061e | 922 | } |
5f2144d9 KV |
923 | |
924 | return 0; | |
cfd1061e MK |
925 | } |
926 | ||
43d2a30f | 927 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 928 | { |
5e3dd157 KV |
929 | int status; |
930 | ||
60631c5c KV |
931 | lockdep_assert_held(&ar->conf_mutex); |
932 | ||
7962b0d8 MK |
933 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
934 | ||
64d151d4 MK |
935 | ath10k_bmi_start(ar); |
936 | ||
5e3dd157 KV |
937 | if (ath10k_init_configure_target(ar)) { |
938 | status = -EINVAL; | |
939 | goto err; | |
940 | } | |
941 | ||
83091559 KV |
942 | status = ath10k_download_cal_data(ar); |
943 | if (status) | |
944 | goto err; | |
945 | ||
946 | status = ath10k_download_fw(ar, mode); | |
5e3dd157 KV |
947 | if (status) |
948 | goto err; | |
949 | ||
950 | status = ath10k_init_uart(ar); | |
951 | if (status) | |
952 | goto err; | |
953 | ||
cd003fad MK |
954 | ar->htc.htc_ops.target_send_suspend_complete = |
955 | ath10k_send_suspend_complete; | |
5e3dd157 | 956 | |
cd003fad MK |
957 | status = ath10k_htc_init(ar); |
958 | if (status) { | |
7aa7a72a | 959 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
960 | goto err; |
961 | } | |
962 | ||
963 | status = ath10k_bmi_done(ar); | |
964 | if (status) | |
cd003fad | 965 | goto err; |
5e3dd157 KV |
966 | |
967 | status = ath10k_wmi_attach(ar); | |
968 | if (status) { | |
7aa7a72a | 969 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 970 | goto err; |
5e3dd157 KV |
971 | } |
972 | ||
95bf21f9 MK |
973 | status = ath10k_htt_init(ar); |
974 | if (status) { | |
7aa7a72a | 975 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
976 | goto err_wmi_detach; |
977 | } | |
978 | ||
979 | status = ath10k_htt_tx_alloc(&ar->htt); | |
980 | if (status) { | |
7aa7a72a | 981 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
982 | goto err_wmi_detach; |
983 | } | |
984 | ||
985 | status = ath10k_htt_rx_alloc(&ar->htt); | |
986 | if (status) { | |
7aa7a72a | 987 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
988 | goto err_htt_tx_detach; |
989 | } | |
990 | ||
67e3c63f MK |
991 | status = ath10k_hif_start(ar); |
992 | if (status) { | |
7aa7a72a | 993 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 994 | goto err_htt_rx_detach; |
67e3c63f MK |
995 | } |
996 | ||
997 | status = ath10k_htc_wait_target(&ar->htc); | |
998 | if (status) { | |
7aa7a72a | 999 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
1000 | goto err_hif_stop; |
1001 | } | |
5e3dd157 | 1002 | |
43d2a30f KV |
1003 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1004 | status = ath10k_htt_connect(&ar->htt); | |
1005 | if (status) { | |
1006 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
1007 | goto err_hif_stop; | |
1008 | } | |
5e3dd157 KV |
1009 | } |
1010 | ||
95bf21f9 MK |
1011 | status = ath10k_wmi_connect(ar); |
1012 | if (status) { | |
7aa7a72a | 1013 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
1014 | goto err_hif_stop; |
1015 | } | |
1016 | ||
1017 | status = ath10k_htc_start(&ar->htc); | |
1018 | if (status) { | |
7aa7a72a | 1019 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
1020 | goto err_hif_stop; |
1021 | } | |
1022 | ||
43d2a30f KV |
1023 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1024 | status = ath10k_wmi_wait_for_service_ready(ar); | |
1025 | if (status <= 0) { | |
1026 | ath10k_warn(ar, "wmi service ready event not received"); | |
1027 | status = -ETIMEDOUT; | |
1028 | goto err_hif_stop; | |
1029 | } | |
95bf21f9 | 1030 | } |
5e3dd157 | 1031 | |
7aa7a72a | 1032 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 1033 | ar->hw->wiphy->fw_version); |
5e3dd157 | 1034 | |
5e3dd157 KV |
1035 | status = ath10k_wmi_cmd_init(ar); |
1036 | if (status) { | |
7aa7a72a MK |
1037 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
1038 | status); | |
b7967dc7 | 1039 | goto err_hif_stop; |
5e3dd157 KV |
1040 | } |
1041 | ||
1042 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
1043 | if (status <= 0) { | |
7aa7a72a | 1044 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 1045 | status = -ETIMEDOUT; |
b7967dc7 | 1046 | goto err_hif_stop; |
5e3dd157 KV |
1047 | } |
1048 | ||
43d2a30f KV |
1049 | /* we don't care about HTT in UTF mode */ |
1050 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1051 | status = ath10k_htt_setup(&ar->htt); | |
1052 | if (status) { | |
1053 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1054 | goto err_hif_stop; | |
1055 | } | |
95bf21f9 | 1056 | } |
5e3dd157 | 1057 | |
db66ea04 KV |
1058 | status = ath10k_debug_start(ar); |
1059 | if (status) | |
b7967dc7 | 1060 | goto err_hif_stop; |
db66ea04 | 1061 | |
dfa413de | 1062 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) |
16c11176 | 1063 | ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1; |
dfa413de | 1064 | else |
16c11176 | 1065 | ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1; |
dfa413de | 1066 | |
0579119f | 1067 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1068 | |
dd30a36e MK |
1069 | return 0; |
1070 | ||
67e3c63f MK |
1071 | err_hif_stop: |
1072 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1073 | err_htt_rx_detach: |
1074 | ath10k_htt_rx_free(&ar->htt); | |
1075 | err_htt_tx_detach: | |
1076 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1077 | err_wmi_detach: |
1078 | ath10k_wmi_detach(ar); | |
1079 | err: | |
1080 | return status; | |
1081 | } | |
818bdd16 | 1082 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1083 | |
00f5482b MP |
1084 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1085 | { | |
1086 | int ret; | |
1087 | ||
1088 | reinit_completion(&ar->target_suspend); | |
1089 | ||
1090 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1091 | if (ret) { | |
7aa7a72a | 1092 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1093 | return ret; |
1094 | } | |
1095 | ||
1096 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
1097 | ||
1098 | if (ret == 0) { | |
7aa7a72a | 1099 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1100 | return -ETIMEDOUT; |
1101 | } | |
1102 | ||
1103 | return 0; | |
1104 | } | |
1105 | ||
dd30a36e MK |
1106 | void ath10k_core_stop(struct ath10k *ar) |
1107 | { | |
60631c5c KV |
1108 | lockdep_assert_held(&ar->conf_mutex); |
1109 | ||
00f5482b | 1110 | /* try to suspend target */ |
43d2a30f KV |
1111 | if (ar->state != ATH10K_STATE_RESTARTING && |
1112 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1113 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1114 | ||
db66ea04 | 1115 | ath10k_debug_stop(ar); |
95bf21f9 MK |
1116 | ath10k_hif_stop(ar); |
1117 | ath10k_htt_tx_free(&ar->htt); | |
1118 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1119 | ath10k_wmi_detach(ar); |
1120 | } | |
818bdd16 MK |
1121 | EXPORT_SYMBOL(ath10k_core_stop); |
1122 | ||
1123 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1124 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1125 | * necessary to load the firmware (and tear it down immediately since start | |
1126 | * hook will try to init it again) before registering */ | |
1127 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1128 | { | |
29385057 MK |
1129 | struct bmi_target_info target_info; |
1130 | int ret = 0; | |
818bdd16 MK |
1131 | |
1132 | ret = ath10k_hif_power_up(ar); | |
1133 | if (ret) { | |
7aa7a72a | 1134 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1135 | return ret; |
1136 | } | |
1137 | ||
29385057 MK |
1138 | memset(&target_info, 0, sizeof(target_info)); |
1139 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1140 | if (ret) { | |
7aa7a72a | 1141 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 1142 | goto err_power_down; |
29385057 MK |
1143 | } |
1144 | ||
1145 | ar->target_version = target_info.version; | |
1146 | ar->hw->wiphy->hw_version = target_info.version; | |
1147 | ||
1148 | ret = ath10k_init_hw_params(ar); | |
1149 | if (ret) { | |
7aa7a72a | 1150 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 1151 | goto err_power_down; |
29385057 MK |
1152 | } |
1153 | ||
1154 | ret = ath10k_core_fetch_firmware_files(ar); | |
1155 | if (ret) { | |
7aa7a72a | 1156 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 1157 | goto err_power_down; |
29385057 MK |
1158 | } |
1159 | ||
5f2144d9 KV |
1160 | ret = ath10k_core_init_firmware_features(ar); |
1161 | if (ret) { | |
1162 | ath10k_err(ar, "fatal problem with firmware features: %d\n", | |
1163 | ret); | |
1164 | goto err_free_firmware_files; | |
1165 | } | |
cfd1061e | 1166 | |
60631c5c KV |
1167 | mutex_lock(&ar->conf_mutex); |
1168 | ||
43d2a30f | 1169 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1170 | if (ret) { |
7aa7a72a | 1171 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 1172 | goto err_unlock; |
818bdd16 MK |
1173 | } |
1174 | ||
8079de0d | 1175 | ath10k_print_driver_info(ar); |
818bdd16 | 1176 | ath10k_core_stop(ar); |
60631c5c KV |
1177 | |
1178 | mutex_unlock(&ar->conf_mutex); | |
1179 | ||
818bdd16 MK |
1180 | ath10k_hif_power_down(ar); |
1181 | return 0; | |
c6ce492d KV |
1182 | |
1183 | err_unlock: | |
1184 | mutex_unlock(&ar->conf_mutex); | |
1185 | ||
5f2144d9 | 1186 | err_free_firmware_files: |
c6ce492d KV |
1187 | ath10k_core_free_firmware_files(ar); |
1188 | ||
1189 | err_power_down: | |
1190 | ath10k_hif_power_down(ar); | |
1191 | ||
1192 | return ret; | |
818bdd16 | 1193 | } |
dd30a36e | 1194 | |
6782cb69 | 1195 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1196 | { |
6782cb69 | 1197 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1198 | int status; |
1199 | ||
818bdd16 MK |
1200 | status = ath10k_core_probe_fw(ar); |
1201 | if (status) { | |
7aa7a72a | 1202 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1203 | goto err; |
818bdd16 | 1204 | } |
dd30a36e | 1205 | |
5e3dd157 | 1206 | status = ath10k_mac_register(ar); |
818bdd16 | 1207 | if (status) { |
7aa7a72a | 1208 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1209 | goto err_release_fw; |
818bdd16 | 1210 | } |
5e3dd157 | 1211 | |
e13cf7a3 | 1212 | status = ath10k_debug_register(ar); |
5e3dd157 | 1213 | if (status) { |
7aa7a72a | 1214 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1215 | goto err_unregister_mac; |
1216 | } | |
1217 | ||
855aed12 SW |
1218 | status = ath10k_spectral_create(ar); |
1219 | if (status) { | |
7aa7a72a | 1220 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1221 | goto err_debug_destroy; |
1222 | } | |
1223 | ||
6782cb69 MK |
1224 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1225 | return; | |
5e3dd157 | 1226 | |
855aed12 SW |
1227 | err_debug_destroy: |
1228 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1229 | err_unregister_mac: |
1230 | ath10k_mac_unregister(ar); | |
29385057 MK |
1231 | err_release_fw: |
1232 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1233 | err: |
a491a920 MK |
1234 | /* TODO: It's probably a good idea to release device from the driver |
1235 | * but calling device_release_driver() here will cause a deadlock. | |
1236 | */ | |
6782cb69 MK |
1237 | return; |
1238 | } | |
1239 | ||
1240 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1241 | { | |
6782cb69 | 1242 | ar->chip_id = chip_id; |
6782cb69 MK |
1243 | queue_work(ar->workqueue, &ar->register_work); |
1244 | ||
1245 | return 0; | |
5e3dd157 KV |
1246 | } |
1247 | EXPORT_SYMBOL(ath10k_core_register); | |
1248 | ||
1249 | void ath10k_core_unregister(struct ath10k *ar) | |
1250 | { | |
6782cb69 MK |
1251 | cancel_work_sync(&ar->register_work); |
1252 | ||
1253 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1254 | return; | |
1255 | ||
804eef14 SW |
1256 | /* Stop spectral before unregistering from mac80211 to remove the |
1257 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1258 | * would be already be free'd recursively, leading to a double free. | |
1259 | */ | |
1260 | ath10k_spectral_destroy(ar); | |
1261 | ||
5e3dd157 KV |
1262 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1263 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1264 | * unhappy about callback failures. */ | |
1265 | ath10k_mac_unregister(ar); | |
db66ea04 | 1266 | |
43d2a30f KV |
1267 | ath10k_testmode_destroy(ar); |
1268 | ||
29385057 | 1269 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1270 | |
e13cf7a3 | 1271 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1272 | } |
1273 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1274 | ||
e7b54194 | 1275 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1276 | enum ath10k_bus bus, |
0d0a6939 MK |
1277 | const struct ath10k_hif_ops *hif_ops) |
1278 | { | |
1279 | struct ath10k *ar; | |
e13cf7a3 | 1280 | int ret; |
0d0a6939 | 1281 | |
e7b54194 | 1282 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1283 | if (!ar) |
1284 | return NULL; | |
1285 | ||
1286 | ar->ath_common.priv = ar; | |
1287 | ar->ath_common.hw = ar->hw; | |
1288 | ||
1289 | ar->p2p = !!ath10k_p2p; | |
1290 | ar->dev = dev; | |
1291 | ||
0d0a6939 | 1292 | ar->hif.ops = hif_ops; |
e07db352 | 1293 | ar->hif.bus = bus; |
0d0a6939 MK |
1294 | |
1295 | init_completion(&ar->scan.started); | |
1296 | init_completion(&ar->scan.completed); | |
1297 | init_completion(&ar->scan.on_channel); | |
1298 | init_completion(&ar->target_suspend); | |
1299 | ||
1300 | init_completion(&ar->install_key_done); | |
1301 | init_completion(&ar->vdev_setup_done); | |
1302 | ||
5c81c7fd | 1303 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1304 | |
1305 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1306 | if (!ar->workqueue) | |
e13cf7a3 | 1307 | goto err_free_mac; |
0d0a6939 MK |
1308 | |
1309 | mutex_init(&ar->conf_mutex); | |
1310 | spin_lock_init(&ar->data_lock); | |
1311 | ||
1312 | INIT_LIST_HEAD(&ar->peers); | |
1313 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
1314 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
1315 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
1316 | |
1317 | init_completion(&ar->offchan_tx_completed); | |
1318 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1319 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1320 | ||
1321 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1322 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1323 | ||
6782cb69 | 1324 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1325 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1326 | ||
e13cf7a3 MK |
1327 | ret = ath10k_debug_create(ar); |
1328 | if (ret) | |
1329 | goto err_free_wq; | |
1330 | ||
0d0a6939 MK |
1331 | return ar; |
1332 | ||
e13cf7a3 MK |
1333 | err_free_wq: |
1334 | destroy_workqueue(ar->workqueue); | |
1335 | ||
1336 | err_free_mac: | |
0d0a6939 | 1337 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1338 | |
0d0a6939 MK |
1339 | return NULL; |
1340 | } | |
1341 | EXPORT_SYMBOL(ath10k_core_create); | |
1342 | ||
1343 | void ath10k_core_destroy(struct ath10k *ar) | |
1344 | { | |
1345 | flush_workqueue(ar->workqueue); | |
1346 | destroy_workqueue(ar->workqueue); | |
1347 | ||
e13cf7a3 | 1348 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1349 | ath10k_mac_destroy(ar); |
1350 | } | |
1351 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1352 | ||
5e3dd157 KV |
1353 | MODULE_AUTHOR("Qualcomm Atheros"); |
1354 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1355 | MODULE_LICENSE("Dual BSD/GPL"); |