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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
d7579d12 | 31 | #include "wmi-ops.h" |
5e3dd157 KV |
32 | |
33 | unsigned int ath10k_debug_mask; | |
ccec9038 | 34 | static unsigned int ath10k_cryptmode_param; |
5e3dd157 | 35 | static bool uart_print; |
8868b12c | 36 | static bool skip_otp; |
b6c7bafa | 37 | static bool rawmode; |
8868b12c | 38 | |
5e3dd157 | 39 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
ccec9038 | 40 | module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); |
5e3dd157 | 41 | module_param(uart_print, bool, 0644); |
8868b12c | 42 | module_param(skip_otp, bool, 0644); |
b6c7bafa | 43 | module_param(rawmode, bool, 0644); |
8868b12c | 44 | |
5e3dd157 KV |
45 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
46 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
8868b12c | 47 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
ccec9038 | 48 | MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); |
b6c7bafa | 49 | MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); |
5e3dd157 KV |
50 | |
51 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
52 | { |
53 | .id = QCA988X_HW_2_0_VERSION, | |
079a0490 | 54 | .dev_id = QCA988X_2_0_DEVICE_ID, |
5e3dd157 KV |
55 | .name = "qca988x hw2.0", |
56 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 57 | .uart_pin = 7, |
587f7031 | 58 | .has_shifted_cc_wraparound = true, |
d772703e | 59 | .otp_exe_param = 0, |
9c8fb548 | 60 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 61 | .max_probe_resp_desc_thres = 0, |
b8d55fca | 62 | .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, |
5e3dd157 KV |
63 | .fw = { |
64 | .dir = QCA988X_HW_2_0_FW_DIR, | |
65 | .fw = QCA988X_HW_2_0_FW_FILE, | |
66 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
67 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
68 | .board_size = QCA988X_BOARD_DATA_SZ, |
69 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
70 | }, |
71 | }, | |
d63955b3 MK |
72 | { |
73 | .id = QCA6174_HW_2_1_VERSION, | |
079a0490 BM |
74 | .dev_id = QCA6164_2_1_DEVICE_ID, |
75 | .name = "qca6164 hw2.1", | |
76 | .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, | |
77 | .uart_pin = 6, | |
78 | .otp_exe_param = 0, | |
79 | .channel_counters_freq_hz = 88000, | |
80 | .max_probe_resp_desc_thres = 0, | |
81 | .fw = { | |
82 | .dir = QCA6174_HW_2_1_FW_DIR, | |
83 | .fw = QCA6174_HW_2_1_FW_FILE, | |
84 | .otp = QCA6174_HW_2_1_OTP_FILE, | |
85 | .board = QCA6174_HW_2_1_BOARD_DATA_FILE, | |
86 | .board_size = QCA6174_BOARD_DATA_SZ, | |
87 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
88 | }, | |
89 | }, | |
90 | { | |
91 | .id = QCA6174_HW_2_1_VERSION, | |
92 | .dev_id = QCA6174_2_1_DEVICE_ID, | |
d63955b3 MK |
93 | .name = "qca6174 hw2.1", |
94 | .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, | |
95 | .uart_pin = 6, | |
d772703e | 96 | .otp_exe_param = 0, |
9c8fb548 | 97 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 98 | .max_probe_resp_desc_thres = 0, |
b8d55fca | 99 | .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, |
d63955b3 MK |
100 | .fw = { |
101 | .dir = QCA6174_HW_2_1_FW_DIR, | |
102 | .fw = QCA6174_HW_2_1_FW_FILE, | |
103 | .otp = QCA6174_HW_2_1_OTP_FILE, | |
104 | .board = QCA6174_HW_2_1_BOARD_DATA_FILE, | |
105 | .board_size = QCA6174_BOARD_DATA_SZ, | |
106 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
107 | }, | |
108 | }, | |
109 | { | |
110 | .id = QCA6174_HW_3_0_VERSION, | |
079a0490 | 111 | .dev_id = QCA6174_2_1_DEVICE_ID, |
d63955b3 MK |
112 | .name = "qca6174 hw3.0", |
113 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
114 | .uart_pin = 6, | |
d772703e | 115 | .otp_exe_param = 0, |
9c8fb548 | 116 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 117 | .max_probe_resp_desc_thres = 0, |
b8d55fca | 118 | .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, |
d63955b3 MK |
119 | .fw = { |
120 | .dir = QCA6174_HW_3_0_FW_DIR, | |
121 | .fw = QCA6174_HW_3_0_FW_FILE, | |
122 | .otp = QCA6174_HW_3_0_OTP_FILE, | |
123 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, | |
124 | .board_size = QCA6174_BOARD_DATA_SZ, | |
125 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
126 | }, | |
127 | }, | |
608b8f73 MK |
128 | { |
129 | .id = QCA6174_HW_3_2_VERSION, | |
079a0490 | 130 | .dev_id = QCA6174_2_1_DEVICE_ID, |
608b8f73 MK |
131 | .name = "qca6174 hw3.2", |
132 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
133 | .uart_pin = 6, | |
d772703e | 134 | .otp_exe_param = 0, |
9c8fb548 | 135 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 136 | .max_probe_resp_desc_thres = 0, |
b8d55fca | 137 | .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, |
608b8f73 MK |
138 | .fw = { |
139 | /* uses same binaries as hw3.0 */ | |
140 | .dir = QCA6174_HW_3_0_FW_DIR, | |
141 | .fw = QCA6174_HW_3_0_FW_FILE, | |
142 | .otp = QCA6174_HW_3_0_OTP_FILE, | |
143 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, | |
144 | .board_size = QCA6174_BOARD_DATA_SZ, | |
145 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
146 | }, | |
147 | }, | |
8bd47021 VT |
148 | { |
149 | .id = QCA99X0_HW_2_0_DEV_VERSION, | |
079a0490 | 150 | .dev_id = QCA99X0_2_0_DEVICE_ID, |
8bd47021 VT |
151 | .name = "qca99x0 hw2.0", |
152 | .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, | |
153 | .uart_pin = 7, | |
d772703e | 154 | .otp_exe_param = 0x00000700, |
d9156b5f | 155 | .continuous_frag_desc = true, |
9c8fb548 | 156 | .channel_counters_freq_hz = 150000, |
7b7da0a0 | 157 | .max_probe_resp_desc_thres = 24, |
b8d55fca | 158 | .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, |
5699a6f2 RM |
159 | .num_msdu_desc = 1424, |
160 | .qcache_active_peers = 50, | |
161 | .tx_chain_mask = 0xf, | |
162 | .rx_chain_mask = 0xf, | |
163 | .max_spatial_stream = 4, | |
8bd47021 VT |
164 | .fw = { |
165 | .dir = QCA99X0_HW_2_0_FW_DIR, | |
166 | .fw = QCA99X0_HW_2_0_FW_FILE, | |
167 | .otp = QCA99X0_HW_2_0_OTP_FILE, | |
168 | .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, | |
169 | .board_size = QCA99X0_BOARD_DATA_SZ, | |
170 | .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, | |
171 | }, | |
172 | }, | |
034074f3 BM |
173 | { |
174 | .id = QCA9377_HW_1_0_DEV_VERSION, | |
175 | .dev_id = QCA9377_1_0_DEVICE_ID, | |
176 | .name = "qca9377 hw1.0", | |
177 | .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, | |
178 | .uart_pin = 6, | |
179 | .otp_exe_param = 0, | |
180 | .channel_counters_freq_hz = 88000, | |
181 | .max_probe_resp_desc_thres = 0, | |
182 | .fw = { | |
183 | .dir = QCA9377_HW_1_0_FW_DIR, | |
184 | .fw = QCA9377_HW_1_0_FW_FILE, | |
185 | .otp = QCA9377_HW_1_0_OTP_FILE, | |
186 | .board = QCA9377_HW_1_0_BOARD_DATA_FILE, | |
187 | .board_size = QCA9377_BOARD_DATA_SZ, | |
188 | .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, | |
189 | }, | |
190 | }, | |
a226b519 | 191 | { |
12551ced | 192 | .id = QCA9377_HW_1_1_DEV_VERSION, |
079a0490 | 193 | .dev_id = QCA9377_1_0_DEVICE_ID, |
12551ced | 194 | .name = "qca9377 hw1.1", |
a226b519 | 195 | .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, |
6cf21395 | 196 | .uart_pin = 6, |
a226b519 | 197 | .otp_exe_param = 0, |
6cf21395 BM |
198 | .channel_counters_freq_hz = 88000, |
199 | .max_probe_resp_desc_thres = 0, | |
a226b519 BM |
200 | .fw = { |
201 | .dir = QCA9377_HW_1_0_FW_DIR, | |
202 | .fw = QCA9377_HW_1_0_FW_FILE, | |
203 | .otp = QCA9377_HW_1_0_OTP_FILE, | |
204 | .board = QCA9377_HW_1_0_BOARD_DATA_FILE, | |
205 | .board_size = QCA9377_BOARD_DATA_SZ, | |
206 | .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, | |
207 | }, | |
208 | }, | |
b1a958c9 RM |
209 | { |
210 | .id = QCA4019_HW_1_0_DEV_VERSION, | |
211 | .dev_id = 0, | |
212 | .name = "qca4019 hw1.0", | |
213 | .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, | |
214 | .uart_pin = 7, | |
215 | .otp_exe_param = 0x0010000, | |
216 | .continuous_frag_desc = true, | |
217 | .channel_counters_freq_hz = 125000, | |
218 | .max_probe_resp_desc_thres = 24, | |
219 | .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, | |
5699a6f2 RM |
220 | .num_msdu_desc = 2500, |
221 | .qcache_active_peers = 35, | |
222 | .tx_chain_mask = 0x3, | |
223 | .rx_chain_mask = 0x3, | |
224 | .max_spatial_stream = 2, | |
b1a958c9 RM |
225 | .fw = { |
226 | .dir = QCA4019_HW_1_0_FW_DIR, | |
227 | .fw = QCA4019_HW_1_0_FW_FILE, | |
228 | .otp = QCA4019_HW_1_0_OTP_FILE, | |
229 | .board = QCA4019_HW_1_0_BOARD_DATA_FILE, | |
230 | .board_size = QCA4019_BOARD_DATA_SZ, | |
231 | .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, | |
232 | }, | |
233 | }, | |
5e3dd157 KV |
234 | }; |
235 | ||
b27bc5a4 MK |
236 | static const char *const ath10k_core_fw_feature_str[] = { |
237 | [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", | |
238 | [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", | |
239 | [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", | |
240 | [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", | |
241 | [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", | |
242 | [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", | |
243 | [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", | |
244 | [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", | |
245 | [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", | |
246 | [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", | |
5af82fa6 | 247 | [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", |
62f77f09 | 248 | [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", |
90eceb3b | 249 | [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", |
9b783763 | 250 | [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", |
b27bc5a4 MK |
251 | }; |
252 | ||
253 | static unsigned int ath10k_core_get_fw_feature_str(char *buf, | |
254 | size_t buf_len, | |
255 | enum ath10k_fw_features feat) | |
256 | { | |
5af82fa6 KV |
257 | /* make sure that ath10k_core_fw_feature_str[] gets updated */ |
258 | BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != | |
259 | ATH10K_FW_FEATURE_COUNT); | |
260 | ||
b27bc5a4 MK |
261 | if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || |
262 | WARN_ON(!ath10k_core_fw_feature_str[feat])) { | |
263 | return scnprintf(buf, buf_len, "bit%d", feat); | |
264 | } | |
265 | ||
266 | return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); | |
267 | } | |
268 | ||
269 | void ath10k_core_get_fw_features_str(struct ath10k *ar, | |
270 | char *buf, | |
271 | size_t buf_len) | |
272 | { | |
273 | unsigned int len = 0; | |
274 | int i; | |
275 | ||
276 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
277 | if (test_bit(i, ar->fw_features)) { | |
278 | if (len > 0) | |
279 | len += scnprintf(buf + len, buf_len - len, ","); | |
280 | ||
281 | len += ath10k_core_get_fw_feature_str(buf + len, | |
282 | buf_len - len, | |
283 | i); | |
284 | } | |
285 | } | |
286 | } | |
287 | ||
5e3dd157 KV |
288 | static void ath10k_send_suspend_complete(struct ath10k *ar) |
289 | { | |
7aa7a72a | 290 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 291 | |
9042e17d | 292 | complete(&ar->target_suspend); |
5e3dd157 KV |
293 | } |
294 | ||
5e3dd157 KV |
295 | static int ath10k_init_configure_target(struct ath10k *ar) |
296 | { | |
297 | u32 param_host; | |
298 | int ret; | |
299 | ||
300 | /* tell target which HTC version it is used*/ | |
301 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
302 | HTC_PROTOCOL_VERSION); | |
303 | if (ret) { | |
7aa7a72a | 304 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
305 | return ret; |
306 | } | |
307 | ||
308 | /* set the firmware mode to STA/IBSS/AP */ | |
309 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
310 | if (ret) { | |
7aa7a72a | 311 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
312 | return ret; |
313 | } | |
314 | ||
315 | /* TODO following parameters need to be re-visited. */ | |
316 | /* num_device */ | |
317 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
318 | /* Firmware mode */ | |
319 | /* FIXME: Why FW_MODE_AP ??.*/ | |
320 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
321 | /* mac_addr_method */ | |
322 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
323 | /* firmware_bridge */ | |
324 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
325 | /* fwsubmode */ | |
326 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
327 | ||
328 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
329 | if (ret) { | |
7aa7a72a | 330 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
331 | return ret; |
332 | } | |
333 | ||
334 | /* We do all byte-swapping on the host */ | |
335 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
336 | if (ret) { | |
7aa7a72a | 337 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
338 | return ret; |
339 | } | |
340 | ||
341 | /* FW descriptor/Data swap flags */ | |
342 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
343 | ||
344 | if (ret) { | |
7aa7a72a | 345 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
346 | return ret; |
347 | } | |
348 | ||
36582e5d MK |
349 | /* Some devices have a special sanity check that verifies the PCI |
350 | * Device ID is written to this host interest var. It is known to be | |
351 | * required to boot QCA6164. | |
352 | */ | |
353 | ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, | |
354 | ar->dev_id); | |
355 | if (ret) { | |
356 | ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); | |
357 | return ret; | |
358 | } | |
359 | ||
5e3dd157 KV |
360 | return 0; |
361 | } | |
362 | ||
363 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
364 | const char *dir, | |
365 | const char *file) | |
366 | { | |
367 | char filename[100]; | |
368 | const struct firmware *fw; | |
369 | int ret; | |
370 | ||
371 | if (file == NULL) | |
372 | return ERR_PTR(-ENOENT); | |
373 | ||
374 | if (dir == NULL) | |
375 | dir = "."; | |
376 | ||
377 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
378 | ret = request_firmware(&fw, filename, ar->dev); | |
379 | if (ret) | |
380 | return ERR_PTR(ret); | |
381 | ||
382 | return fw; | |
383 | } | |
384 | ||
a58227ef KV |
385 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
386 | size_t data_len) | |
5e3dd157 | 387 | { |
9764a2af MK |
388 | u32 board_data_size = ar->hw_params.fw.board_size; |
389 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
390 | u32 board_ext_data_addr; |
391 | int ret; | |
392 | ||
393 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
394 | if (ret) { | |
7aa7a72a MK |
395 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
396 | ret); | |
5e3dd157 KV |
397 | return ret; |
398 | } | |
399 | ||
7aa7a72a | 400 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 401 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
402 | board_ext_data_addr); |
403 | ||
404 | if (board_ext_data_addr == 0) | |
405 | return 0; | |
406 | ||
a58227ef | 407 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 408 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 409 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
410 | return -EINVAL; |
411 | } | |
412 | ||
413 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 414 | data + board_data_size, |
5e3dd157 KV |
415 | board_ext_data_size); |
416 | if (ret) { | |
7aa7a72a | 417 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
418 | return ret; |
419 | } | |
420 | ||
421 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
422 | (board_ext_data_size << 16) | 1); | |
423 | if (ret) { | |
7aa7a72a MK |
424 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
425 | ret); | |
5e3dd157 KV |
426 | return ret; |
427 | } | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
a58227ef KV |
432 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
433 | size_t data_len) | |
5e3dd157 | 434 | { |
9764a2af | 435 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 436 | u32 address; |
5e3dd157 KV |
437 | int ret; |
438 | ||
a58227ef | 439 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 440 | if (ret) { |
7aa7a72a | 441 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
442 | goto exit; |
443 | } | |
444 | ||
445 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
446 | if (ret) { | |
7aa7a72a | 447 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
448 | goto exit; |
449 | } | |
450 | ||
a58227ef | 451 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 452 | min_t(u32, board_data_size, |
a58227ef | 453 | data_len)); |
5e3dd157 | 454 | if (ret) { |
7aa7a72a | 455 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
456 | goto exit; |
457 | } | |
458 | ||
459 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
460 | if (ret) { | |
7aa7a72a | 461 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
462 | goto exit; |
463 | } | |
464 | ||
465 | exit: | |
5e3dd157 KV |
466 | return ret; |
467 | } | |
468 | ||
a58227ef KV |
469 | static int ath10k_download_cal_file(struct ath10k *ar) |
470 | { | |
471 | int ret; | |
472 | ||
473 | if (!ar->cal_file) | |
474 | return -ENOENT; | |
475 | ||
476 | if (IS_ERR(ar->cal_file)) | |
477 | return PTR_ERR(ar->cal_file); | |
478 | ||
479 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
480 | ar->cal_file->size); | |
481 | if (ret) { | |
482 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
483 | return ret; | |
484 | } | |
485 | ||
486 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
487 | ||
488 | return 0; | |
489 | } | |
490 | ||
5aabff05 TK |
491 | static int ath10k_download_cal_dt(struct ath10k *ar) |
492 | { | |
493 | struct device_node *node; | |
494 | int data_len; | |
495 | void *data; | |
496 | int ret; | |
497 | ||
498 | node = ar->dev->of_node; | |
499 | if (!node) | |
500 | /* Device Tree is optional, don't print any warnings if | |
501 | * there's no node for ath10k. | |
502 | */ | |
503 | return -ENOENT; | |
504 | ||
505 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
506 | &data_len)) { | |
507 | /* The calibration data node is optional */ | |
508 | return -ENOENT; | |
509 | } | |
510 | ||
511 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
512 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
513 | data_len); | |
514 | ret = -EMSGSIZE; | |
515 | goto out; | |
516 | } | |
517 | ||
518 | data = kmalloc(data_len, GFP_KERNEL); | |
519 | if (!data) { | |
520 | ret = -ENOMEM; | |
521 | goto out; | |
522 | } | |
523 | ||
524 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
525 | data, data_len); | |
526 | if (ret) { | |
527 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
528 | ret); | |
529 | goto out_free; | |
530 | } | |
531 | ||
532 | ret = ath10k_download_board_data(ar, data, data_len); | |
533 | if (ret) { | |
534 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
535 | ret); | |
536 | goto out_free; | |
537 | } | |
538 | ||
539 | ret = 0; | |
540 | ||
541 | out_free: | |
542 | kfree(data); | |
543 | ||
544 | out: | |
545 | return ret; | |
546 | } | |
547 | ||
db0984e5 MP |
548 | static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) |
549 | { | |
550 | u32 result, address; | |
551 | u8 board_id, chip_id; | |
552 | int ret; | |
553 | ||
554 | address = ar->hw_params.patch_load_addr; | |
555 | ||
556 | if (!ar->otp_data || !ar->otp_len) { | |
557 | ath10k_warn(ar, | |
558 | "failed to retrieve board id because of invalid otp\n"); | |
559 | return -ENODATA; | |
560 | } | |
561 | ||
562 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
563 | "boot upload otp to 0x%x len %zd for board id\n", | |
564 | address, ar->otp_len); | |
565 | ||
566 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); | |
567 | if (ret) { | |
568 | ath10k_err(ar, "could not write otp for board id check: %d\n", | |
569 | ret); | |
570 | return ret; | |
571 | } | |
572 | ||
573 | ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, | |
574 | &result); | |
575 | if (ret) { | |
576 | ath10k_err(ar, "could not execute otp for board id check: %d\n", | |
577 | ret); | |
578 | return ret; | |
579 | } | |
580 | ||
581 | board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); | |
582 | chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); | |
583 | ||
584 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
585 | "boot get otp board id result 0x%08x board_id %d chip_id %d\n", | |
586 | result, board_id, chip_id); | |
587 | ||
588 | if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0) | |
589 | return -EOPNOTSUPP; | |
590 | ||
591 | ar->id.bmi_ids_valid = true; | |
592 | ar->id.bmi_board_id = board_id; | |
593 | ar->id.bmi_chip_id = chip_id; | |
594 | ||
595 | return 0; | |
596 | } | |
597 | ||
5e3dd157 KV |
598 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
599 | { | |
d6d4a58d | 600 | u32 result, address = ar->hw_params.patch_load_addr; |
d772703e | 601 | u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; |
5e3dd157 KV |
602 | int ret; |
603 | ||
a58227ef | 604 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
605 | if (ret) { |
606 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
607 | return ret; | |
608 | } | |
609 | ||
5e3dd157 KV |
610 | /* OTP is optional */ |
611 | ||
7f06ea1e | 612 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 613 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 614 | ar->otp_data, ar->otp_len); |
5e3dd157 | 615 | return 0; |
7f06ea1e KV |
616 | } |
617 | ||
7aa7a72a | 618 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 619 | address, ar->otp_len); |
5e3dd157 | 620 | |
958df3a0 | 621 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 622 | if (ret) { |
7aa7a72a | 623 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 624 | return ret; |
5e3dd157 KV |
625 | } |
626 | ||
d772703e | 627 | ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); |
5e3dd157 | 628 | if (ret) { |
7aa7a72a | 629 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 630 | return ret; |
5e3dd157 KV |
631 | } |
632 | ||
7aa7a72a | 633 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 634 | |
d9153546 | 635 | if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, |
be62e92a KV |
636 | ar->fw_features)) && |
637 | result != 0) { | |
7aa7a72a | 638 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
639 | return -EINVAL; |
640 | } | |
641 | ||
642 | return 0; | |
5e3dd157 KV |
643 | } |
644 | ||
43d2a30f | 645 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 646 | { |
43d2a30f KV |
647 | u32 address, data_len; |
648 | const char *mode_name; | |
649 | const void *data; | |
5e3dd157 KV |
650 | int ret; |
651 | ||
5e3dd157 KV |
652 | address = ar->hw_params.patch_load_addr; |
653 | ||
43d2a30f KV |
654 | switch (mode) { |
655 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
656 | data = ar->firmware_data; | |
657 | data_len = ar->firmware_len; | |
658 | mode_name = "normal"; | |
dcb02db1 | 659 | ret = ath10k_swap_code_seg_configure(ar, |
617b0f4d | 660 | ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW); |
dcb02db1 VT |
661 | if (ret) { |
662 | ath10k_err(ar, "failed to configure fw code swap: %d\n", | |
663 | ret); | |
664 | return ret; | |
665 | } | |
43d2a30f KV |
666 | break; |
667 | case ATH10K_FIRMWARE_MODE_UTF: | |
a81a98ce AL |
668 | data = ar->testmode.utf_firmware_data; |
669 | data_len = ar->testmode.utf_firmware_len; | |
43d2a30f KV |
670 | mode_name = "utf"; |
671 | break; | |
672 | default: | |
673 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
674 | return -EINVAL; | |
675 | } | |
676 | ||
677 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
678 | "boot uploading firmware image %p len %d mode %s\n", | |
679 | data, data_len, mode_name); | |
680 | ||
681 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 682 | if (ret) { |
43d2a30f KV |
683 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
684 | mode_name, ret); | |
685 | return ret; | |
5e3dd157 KV |
686 | } |
687 | ||
29385057 MK |
688 | return ret; |
689 | } | |
690 | ||
0a51b343 | 691 | static void ath10k_core_free_board_files(struct ath10k *ar) |
29385057 | 692 | { |
db2cf865 | 693 | if (!IS_ERR(ar->board)) |
36527916 | 694 | release_firmware(ar->board); |
29385057 | 695 | |
0a51b343 MP |
696 | ar->board = NULL; |
697 | ar->board_data = NULL; | |
698 | ar->board_len = 0; | |
699 | } | |
700 | ||
701 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
702 | { | |
db2cf865 | 703 | if (!IS_ERR(ar->otp)) |
29385057 MK |
704 | release_firmware(ar->otp); |
705 | ||
db2cf865 | 706 | if (!IS_ERR(ar->firmware)) |
29385057 MK |
707 | release_firmware(ar->firmware); |
708 | ||
db2cf865 | 709 | if (!IS_ERR(ar->cal_file)) |
a58227ef KV |
710 | release_firmware(ar->cal_file); |
711 | ||
dcb02db1 VT |
712 | ath10k_swap_code_seg_release(ar); |
713 | ||
29385057 | 714 | ar->otp = NULL; |
958df3a0 KV |
715 | ar->otp_data = NULL; |
716 | ar->otp_len = 0; | |
717 | ||
29385057 | 718 | ar->firmware = NULL; |
958df3a0 KV |
719 | ar->firmware_data = NULL; |
720 | ar->firmware_len = 0; | |
a58227ef KV |
721 | |
722 | ar->cal_file = NULL; | |
723 | } | |
724 | ||
725 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
726 | { | |
727 | char filename[100]; | |
728 | ||
729 | /* cal-<bus>-<id>.bin */ | |
730 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
731 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
732 | ||
733 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
734 | if (IS_ERR(ar->cal_file)) | |
735 | /* calibration file is optional, don't print any warnings */ | |
736 | return PTR_ERR(ar->cal_file); | |
737 | ||
738 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
739 | ATH10K_FW_DIR, filename); | |
740 | ||
741 | return 0; | |
29385057 MK |
742 | } |
743 | ||
0a51b343 | 744 | static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) |
29385057 | 745 | { |
0a51b343 MP |
746 | if (!ar->hw_params.fw.board) { |
747 | ath10k_err(ar, "failed to find board file fw entry\n"); | |
748 | return -EINVAL; | |
749 | } | |
de57e2c8 | 750 | |
0a51b343 MP |
751 | ar->board = ath10k_fetch_fw_file(ar, |
752 | ar->hw_params.fw.dir, | |
753 | ar->hw_params.fw.board); | |
de57e2c8 MK |
754 | if (IS_ERR(ar->board)) |
755 | return PTR_ERR(ar->board); | |
756 | ||
757 | ar->board_data = ar->board->data; | |
758 | ar->board_len = ar->board->size; | |
29385057 | 759 | |
de57e2c8 MK |
760 | return 0; |
761 | } | |
762 | ||
0a51b343 MP |
763 | static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, |
764 | const void *buf, size_t buf_len, | |
765 | const char *boardname) | |
de57e2c8 | 766 | { |
0a51b343 MP |
767 | const struct ath10k_fw_ie *hdr; |
768 | bool name_match_found; | |
769 | int ret, board_ie_id; | |
770 | size_t board_ie_len; | |
771 | const void *board_ie_data; | |
772 | ||
773 | name_match_found = false; | |
774 | ||
775 | /* go through ATH10K_BD_IE_BOARD_ elements */ | |
776 | while (buf_len > sizeof(struct ath10k_fw_ie)) { | |
777 | hdr = buf; | |
778 | board_ie_id = le32_to_cpu(hdr->id); | |
779 | board_ie_len = le32_to_cpu(hdr->len); | |
780 | board_ie_data = hdr->data; | |
781 | ||
782 | buf_len -= sizeof(*hdr); | |
783 | buf += sizeof(*hdr); | |
784 | ||
785 | if (buf_len < ALIGN(board_ie_len, 4)) { | |
786 | ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", | |
787 | buf_len, ALIGN(board_ie_len, 4)); | |
788 | ret = -EINVAL; | |
789 | goto out; | |
790 | } | |
791 | ||
792 | switch (board_ie_id) { | |
793 | case ATH10K_BD_IE_BOARD_NAME: | |
794 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", | |
795 | board_ie_data, board_ie_len); | |
796 | ||
797 | if (board_ie_len != strlen(boardname)) | |
798 | break; | |
799 | ||
800 | ret = memcmp(board_ie_data, boardname, strlen(boardname)); | |
801 | if (ret) | |
802 | break; | |
803 | ||
804 | name_match_found = true; | |
805 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
806 | "boot found match for name '%s'", | |
807 | boardname); | |
808 | break; | |
809 | case ATH10K_BD_IE_BOARD_DATA: | |
810 | if (!name_match_found) | |
811 | /* no match found */ | |
812 | break; | |
813 | ||
814 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
815 | "boot found board data for '%s'", | |
816 | boardname); | |
817 | ||
818 | ar->board_data = board_ie_data; | |
819 | ar->board_len = board_ie_len; | |
820 | ||
821 | ret = 0; | |
822 | goto out; | |
823 | default: | |
824 | ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", | |
825 | board_ie_id); | |
826 | break; | |
827 | } | |
828 | ||
829 | /* jump over the padding */ | |
830 | board_ie_len = ALIGN(board_ie_len, 4); | |
831 | ||
832 | buf_len -= board_ie_len; | |
833 | buf += board_ie_len; | |
29385057 MK |
834 | } |
835 | ||
0a51b343 MP |
836 | /* no match found */ |
837 | ret = -ENOENT; | |
838 | ||
839 | out: | |
840 | return ret; | |
841 | } | |
842 | ||
843 | static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, | |
844 | const char *boardname, | |
845 | const char *filename) | |
846 | { | |
847 | size_t len, magic_len, ie_len; | |
848 | struct ath10k_fw_ie *hdr; | |
849 | const u8 *data; | |
850 | int ret, ie_id; | |
851 | ||
852 | ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename); | |
de57e2c8 MK |
853 | if (IS_ERR(ar->board)) |
854 | return PTR_ERR(ar->board); | |
29385057 | 855 | |
0a51b343 MP |
856 | data = ar->board->data; |
857 | len = ar->board->size; | |
858 | ||
859 | /* magic has extra null byte padded */ | |
860 | magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; | |
861 | if (len < magic_len) { | |
862 | ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", | |
863 | ar->hw_params.fw.dir, filename, len); | |
864 | ret = -EINVAL; | |
865 | goto err; | |
866 | } | |
867 | ||
868 | if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { | |
869 | ath10k_err(ar, "found invalid board magic\n"); | |
870 | ret = -EINVAL; | |
871 | goto err; | |
872 | } | |
873 | ||
874 | /* magic is padded to 4 bytes */ | |
875 | magic_len = ALIGN(magic_len, 4); | |
876 | if (len < magic_len) { | |
877 | ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", | |
878 | ar->hw_params.fw.dir, filename, len); | |
879 | ret = -EINVAL; | |
880 | goto err; | |
881 | } | |
882 | ||
883 | data += magic_len; | |
884 | len -= magic_len; | |
885 | ||
886 | while (len > sizeof(struct ath10k_fw_ie)) { | |
887 | hdr = (struct ath10k_fw_ie *)data; | |
888 | ie_id = le32_to_cpu(hdr->id); | |
889 | ie_len = le32_to_cpu(hdr->len); | |
890 | ||
891 | len -= sizeof(*hdr); | |
892 | data = hdr->data; | |
893 | ||
894 | if (len < ALIGN(ie_len, 4)) { | |
895 | ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", | |
896 | ie_id, ie_len, len); | |
897 | ret = -EINVAL; | |
898 | goto err; | |
899 | } | |
900 | ||
901 | switch (ie_id) { | |
902 | case ATH10K_BD_IE_BOARD: | |
903 | ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, | |
904 | boardname); | |
905 | if (ret == -ENOENT) | |
906 | /* no match found, continue */ | |
907 | break; | |
908 | else if (ret) | |
909 | /* there was an error, bail out */ | |
910 | goto err; | |
911 | ||
912 | /* board data found */ | |
913 | goto out; | |
914 | } | |
915 | ||
916 | /* jump over the padding */ | |
917 | ie_len = ALIGN(ie_len, 4); | |
918 | ||
919 | len -= ie_len; | |
920 | data += ie_len; | |
921 | } | |
922 | ||
923 | out: | |
924 | if (!ar->board_data || !ar->board_len) { | |
925 | ath10k_err(ar, | |
926 | "failed to fetch board data for %s from %s/%s\n", | |
bd5632b0 | 927 | boardname, ar->hw_params.fw.dir, filename); |
0a51b343 MP |
928 | ret = -ENODATA; |
929 | goto err; | |
930 | } | |
931 | ||
932 | return 0; | |
933 | ||
934 | err: | |
935 | ath10k_core_free_board_files(ar); | |
936 | return ret; | |
937 | } | |
938 | ||
939 | static int ath10k_core_create_board_name(struct ath10k *ar, char *name, | |
940 | size_t name_len) | |
941 | { | |
db0984e5 MP |
942 | if (ar->id.bmi_ids_valid) { |
943 | scnprintf(name, name_len, | |
944 | "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", | |
945 | ath10k_bus_str(ar->hif.bus), | |
946 | ar->id.bmi_chip_id, | |
947 | ar->id.bmi_board_id); | |
948 | goto out; | |
949 | } | |
950 | ||
0a51b343 MP |
951 | scnprintf(name, name_len, |
952 | "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", | |
953 | ath10k_bus_str(ar->hif.bus), | |
954 | ar->id.vendor, ar->id.device, | |
955 | ar->id.subsystem_vendor, ar->id.subsystem_device); | |
956 | ||
db0984e5 | 957 | out: |
0a51b343 | 958 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); |
de57e2c8 MK |
959 | |
960 | return 0; | |
961 | } | |
962 | ||
963 | static int ath10k_core_fetch_board_file(struct ath10k *ar) | |
964 | { | |
0a51b343 | 965 | char boardname[100]; |
de57e2c8 MK |
966 | int ret; |
967 | ||
0a51b343 MP |
968 | ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); |
969 | if (ret) { | |
970 | ath10k_err(ar, "failed to create board name: %d", ret); | |
971 | return ret; | |
de57e2c8 MK |
972 | } |
973 | ||
0a51b343 MP |
974 | ar->bd_api = 2; |
975 | ret = ath10k_core_fetch_board_data_api_n(ar, boardname, | |
976 | ATH10K_BOARD_API2_FILE); | |
977 | if (!ret) | |
978 | goto success; | |
979 | ||
980 | ar->bd_api = 1; | |
981 | ret = ath10k_core_fetch_board_data_api_1(ar); | |
de57e2c8 | 982 | if (ret) { |
0a51b343 | 983 | ath10k_err(ar, "failed to fetch board data\n"); |
de57e2c8 MK |
984 | return ret; |
985 | } | |
958df3a0 | 986 | |
0a51b343 MP |
987 | success: |
988 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); | |
d0ed74f3 MK |
989 | return 0; |
990 | } | |
991 | ||
992 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) | |
993 | { | |
994 | int ret = 0; | |
995 | ||
996 | if (ar->hw_params.fw.fw == NULL) { | |
997 | ath10k_err(ar, "firmware file not defined\n"); | |
998 | return -EINVAL; | |
999 | } | |
1000 | ||
29385057 MK |
1001 | ar->firmware = ath10k_fetch_fw_file(ar, |
1002 | ar->hw_params.fw.dir, | |
1003 | ar->hw_params.fw.fw); | |
1004 | if (IS_ERR(ar->firmware)) { | |
1005 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 1006 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
1007 | goto err; |
1008 | } | |
1009 | ||
958df3a0 KV |
1010 | ar->firmware_data = ar->firmware->data; |
1011 | ar->firmware_len = ar->firmware->size; | |
1012 | ||
29385057 MK |
1013 | /* OTP may be undefined. If so, don't fetch it at all */ |
1014 | if (ar->hw_params.fw.otp == NULL) | |
1015 | return 0; | |
1016 | ||
1017 | ar->otp = ath10k_fetch_fw_file(ar, | |
1018 | ar->hw_params.fw.dir, | |
1019 | ar->hw_params.fw.otp); | |
1020 | if (IS_ERR(ar->otp)) { | |
1021 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 1022 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
1023 | goto err; |
1024 | } | |
1025 | ||
958df3a0 KV |
1026 | ar->otp_data = ar->otp->data; |
1027 | ar->otp_len = ar->otp->size; | |
1028 | ||
29385057 MK |
1029 | return 0; |
1030 | ||
1031 | err: | |
1032 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
1033 | return ret; |
1034 | } | |
1035 | ||
1a222435 KV |
1036 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
1037 | { | |
1038 | size_t magic_len, len, ie_len; | |
1039 | int ie_id, i, index, bit, ret; | |
1040 | struct ath10k_fw_ie *hdr; | |
1041 | const u8 *data; | |
202e86e6 | 1042 | __le32 *timestamp, *version; |
1a222435 KV |
1043 | |
1044 | /* first fetch the firmware file (firmware-*.bin) */ | |
1045 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
1046 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 1047 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 1048 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
1049 | return PTR_ERR(ar->firmware); |
1050 | } | |
1051 | ||
1052 | data = ar->firmware->data; | |
1053 | len = ar->firmware->size; | |
1054 | ||
1055 | /* magic also includes the null byte, check that as well */ | |
1056 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
1057 | ||
1058 | if (len < magic_len) { | |
7aa7a72a | 1059 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 1060 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
1061 | ret = -EINVAL; |
1062 | goto err; | |
1a222435 KV |
1063 | } |
1064 | ||
1065 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 1066 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
1067 | ret = -EINVAL; |
1068 | goto err; | |
1a222435 KV |
1069 | } |
1070 | ||
1071 | /* jump over the padding */ | |
1072 | magic_len = ALIGN(magic_len, 4); | |
1073 | ||
1074 | len -= magic_len; | |
1075 | data += magic_len; | |
1076 | ||
1077 | /* loop elements */ | |
1078 | while (len > sizeof(struct ath10k_fw_ie)) { | |
1079 | hdr = (struct ath10k_fw_ie *)data; | |
1080 | ||
1081 | ie_id = le32_to_cpu(hdr->id); | |
1082 | ie_len = le32_to_cpu(hdr->len); | |
1083 | ||
1084 | len -= sizeof(*hdr); | |
1085 | data += sizeof(*hdr); | |
1086 | ||
1087 | if (len < ie_len) { | |
7aa7a72a | 1088 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 1089 | ie_id, len, ie_len); |
9bab1cc0 MK |
1090 | ret = -EINVAL; |
1091 | goto err; | |
1a222435 KV |
1092 | } |
1093 | ||
1094 | switch (ie_id) { | |
1095 | case ATH10K_FW_IE_FW_VERSION: | |
1096 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
1097 | break; | |
1098 | ||
1099 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
1100 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
1101 | ||
7aa7a72a | 1102 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1103 | "found fw version %s\n", |
1104 | ar->hw->wiphy->fw_version); | |
1105 | break; | |
1106 | case ATH10K_FW_IE_TIMESTAMP: | |
1107 | if (ie_len != sizeof(u32)) | |
1108 | break; | |
1109 | ||
1110 | timestamp = (__le32 *)data; | |
1111 | ||
7aa7a72a | 1112 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
1113 | le32_to_cpup(timestamp)); |
1114 | break; | |
1115 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 1116 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1117 | "found firmware features ie (%zd B)\n", |
1118 | ie_len); | |
1119 | ||
1120 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
1121 | index = i / 8; | |
1122 | bit = i % 8; | |
1123 | ||
1124 | if (index == ie_len) | |
1125 | break; | |
1126 | ||
f591a1a5 | 1127 | if (data[index] & (1 << bit)) { |
7aa7a72a | 1128 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
1129 | "Enabling feature bit: %i\n", |
1130 | i); | |
1a222435 | 1131 | __set_bit(i, ar->fw_features); |
f591a1a5 | 1132 | } |
1a222435 KV |
1133 | } |
1134 | ||
7aa7a72a | 1135 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
1136 | ar->fw_features, |
1137 | sizeof(ar->fw_features)); | |
1138 | break; | |
1139 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 1140 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1141 | "found fw image ie (%zd B)\n", |
1142 | ie_len); | |
1143 | ||
1144 | ar->firmware_data = data; | |
1145 | ar->firmware_len = ie_len; | |
1146 | ||
1147 | break; | |
1148 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 1149 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1150 | "found otp image ie (%zd B)\n", |
1151 | ie_len); | |
1152 | ||
1153 | ar->otp_data = data; | |
1154 | ar->otp_len = ie_len; | |
1155 | ||
1156 | break; | |
202e86e6 KV |
1157 | case ATH10K_FW_IE_WMI_OP_VERSION: |
1158 | if (ie_len != sizeof(u32)) | |
1159 | break; | |
1160 | ||
1161 | version = (__le32 *)data; | |
1162 | ||
1163 | ar->wmi.op_version = le32_to_cpup(version); | |
1164 | ||
1165 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", | |
1166 | ar->wmi.op_version); | |
1167 | break; | |
8348db29 RM |
1168 | case ATH10K_FW_IE_HTT_OP_VERSION: |
1169 | if (ie_len != sizeof(u32)) | |
1170 | break; | |
1171 | ||
1172 | version = (__le32 *)data; | |
1173 | ||
1174 | ar->htt.op_version = le32_to_cpup(version); | |
1175 | ||
1176 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", | |
1177 | ar->htt.op_version); | |
1178 | break; | |
dcb02db1 VT |
1179 | case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: |
1180 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1181 | "found fw code swap image ie (%zd B)\n", | |
1182 | ie_len); | |
1183 | ar->swap.firmware_codeswap_data = data; | |
1184 | ar->swap.firmware_codeswap_len = ie_len; | |
1185 | break; | |
1a222435 | 1186 | default: |
7aa7a72a | 1187 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
1188 | le32_to_cpu(hdr->id)); |
1189 | break; | |
1190 | } | |
1191 | ||
1192 | /* jump over the padding */ | |
1193 | ie_len = ALIGN(ie_len, 4); | |
1194 | ||
1195 | len -= ie_len; | |
1196 | data += ie_len; | |
e05634ee | 1197 | } |
1a222435 KV |
1198 | |
1199 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 1200 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 1201 | ar->hw_params.fw.dir, name); |
1a222435 KV |
1202 | ret = -ENOMEDIUM; |
1203 | goto err; | |
1204 | } | |
1205 | ||
1a222435 KV |
1206 | return 0; |
1207 | ||
1208 | err: | |
1209 | ath10k_core_free_firmware_files(ar); | |
1210 | return ret; | |
1211 | } | |
1212 | ||
1213 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
1214 | { | |
1215 | int ret; | |
1216 | ||
a58227ef KV |
1217 | /* calibration file is optional, don't check for any errors */ |
1218 | ath10k_fetch_cal_file(ar); | |
1219 | ||
53513c30 KV |
1220 | ar->fw_api = 5; |
1221 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
1222 | ||
1223 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE); | |
1224 | if (ret == 0) | |
1225 | goto success; | |
1226 | ||
4a16fbec RM |
1227 | ar->fw_api = 4; |
1228 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
1229 | ||
1230 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); | |
1231 | if (ret == 0) | |
1232 | goto success; | |
1233 | ||
24c88f78 | 1234 | ar->fw_api = 3; |
7aa7a72a | 1235 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
1236 | |
1237 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
1238 | if (ret == 0) | |
1239 | goto success; | |
1240 | ||
53c02284 | 1241 | ar->fw_api = 2; |
7aa7a72a | 1242 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 1243 | |
1a222435 | 1244 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
1245 | if (ret == 0) |
1246 | goto success; | |
1247 | ||
1248 | ar->fw_api = 1; | |
7aa7a72a | 1249 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
1250 | |
1251 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
1252 | if (ret) | |
1253 | return ret; | |
1254 | ||
53c02284 | 1255 | success: |
7aa7a72a | 1256 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
1257 | |
1258 | return 0; | |
1259 | } | |
1260 | ||
83091559 | 1261 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
1262 | { |
1263 | int ret; | |
1264 | ||
a58227ef KV |
1265 | ret = ath10k_download_cal_file(ar); |
1266 | if (ret == 0) { | |
1267 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
1268 | goto done; | |
1269 | } | |
1270 | ||
1271 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
1272 | "boot did not find a calibration file, try DT next: %d\n", |
1273 | ret); | |
1274 | ||
1275 | ret = ath10k_download_cal_dt(ar); | |
1276 | if (ret == 0) { | |
1277 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
1278 | goto done; | |
1279 | } | |
1280 | ||
1281 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1282 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
1283 | ret); |
1284 | ||
5e3dd157 | 1285 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 1286 | if (ret) { |
7aa7a72a | 1287 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 1288 | return ret; |
36a8f413 | 1289 | } |
5e3dd157 | 1290 | |
a58227ef KV |
1291 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
1292 | ||
1293 | done: | |
1294 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
1295 | ath10k_cal_mode_str(ar->cal_mode)); | |
1296 | return 0; | |
5e3dd157 KV |
1297 | } |
1298 | ||
1299 | static int ath10k_init_uart(struct ath10k *ar) | |
1300 | { | |
1301 | int ret; | |
1302 | ||
1303 | /* | |
1304 | * Explicitly setting UART prints to zero as target turns it on | |
1305 | * based on scratch registers. | |
1306 | */ | |
1307 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
1308 | if (ret) { | |
7aa7a72a | 1309 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
1310 | return ret; |
1311 | } | |
1312 | ||
c8c39afe | 1313 | if (!uart_print) |
5e3dd157 | 1314 | return 0; |
5e3dd157 | 1315 | |
3a8200b2 | 1316 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 1317 | if (ret) { |
7aa7a72a | 1318 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
1319 | return ret; |
1320 | } | |
1321 | ||
1322 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
1323 | if (ret) { | |
7aa7a72a | 1324 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
1325 | return ret; |
1326 | } | |
1327 | ||
03fc137b BM |
1328 | /* Set the UART baud rate to 19200. */ |
1329 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
1330 | if (ret) { | |
7aa7a72a | 1331 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
1332 | return ret; |
1333 | } | |
1334 | ||
7aa7a72a | 1335 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
1336 | return 0; |
1337 | } | |
1338 | ||
1339 | static int ath10k_init_hw_params(struct ath10k *ar) | |
1340 | { | |
1341 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
1342 | int i; | |
1343 | ||
1344 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
1345 | hw_params = &ath10k_hw_params_list[i]; | |
1346 | ||
079a0490 BM |
1347 | if (hw_params->id == ar->target_version && |
1348 | hw_params->dev_id == ar->dev_id) | |
5e3dd157 KV |
1349 | break; |
1350 | } | |
1351 | ||
1352 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 1353 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
1354 | ar->target_version); |
1355 | return -EINVAL; | |
1356 | } | |
1357 | ||
1358 | ar->hw_params = *hw_params; | |
1359 | ||
7aa7a72a | 1360 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 1361 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
1362 | |
1363 | return 0; | |
1364 | } | |
1365 | ||
affd3217 MK |
1366 | static void ath10k_core_restart(struct work_struct *work) |
1367 | { | |
1368 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
1369 | ||
7962b0d8 MK |
1370 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
1371 | ||
1372 | /* Place a barrier to make sure the compiler doesn't reorder | |
1373 | * CRASH_FLUSH and calling other functions. | |
1374 | */ | |
1375 | barrier(); | |
1376 | ||
1377 | ieee80211_stop_queues(ar->hw); | |
1378 | ath10k_drain_tx(ar); | |
1379 | complete_all(&ar->scan.started); | |
1380 | complete_all(&ar->scan.completed); | |
1381 | complete_all(&ar->scan.on_channel); | |
1382 | complete_all(&ar->offchan_tx_completed); | |
1383 | complete_all(&ar->install_key_done); | |
1384 | complete_all(&ar->vdev_setup_done); | |
ac2953fc | 1385 | complete_all(&ar->thermal.wmi_sync); |
7962b0d8 MK |
1386 | wake_up(&ar->htt.empty_tx_wq); |
1387 | wake_up(&ar->wmi.tx_credits_wq); | |
1388 | wake_up(&ar->peer_mapping_wq); | |
1389 | ||
affd3217 MK |
1390 | mutex_lock(&ar->conf_mutex); |
1391 | ||
1392 | switch (ar->state) { | |
1393 | case ATH10K_STATE_ON: | |
affd3217 | 1394 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 1395 | ath10k_hif_stop(ar); |
5c81c7fd | 1396 | ath10k_scan_finish(ar); |
affd3217 MK |
1397 | ieee80211_restart_hw(ar->hw); |
1398 | break; | |
1399 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
1400 | /* this can happen if driver is being unloaded |
1401 | * or if the crash happens during FW probing */ | |
7aa7a72a | 1402 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
1403 | break; |
1404 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
1405 | /* hw restart might be requested from multiple places */ |
1406 | break; | |
affd3217 MK |
1407 | case ATH10K_STATE_RESTARTED: |
1408 | ar->state = ATH10K_STATE_WEDGED; | |
1409 | /* fall through */ | |
1410 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 1411 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 1412 | break; |
43d2a30f KV |
1413 | case ATH10K_STATE_UTF: |
1414 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
1415 | break; | |
affd3217 MK |
1416 | } |
1417 | ||
1418 | mutex_unlock(&ar->conf_mutex); | |
1419 | } | |
1420 | ||
5f2144d9 | 1421 | static int ath10k_core_init_firmware_features(struct ath10k *ar) |
cfd1061e | 1422 | { |
5f2144d9 KV |
1423 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
1424 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
1425 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); | |
1426 | return -EINVAL; | |
1427 | } | |
1428 | ||
202e86e6 KV |
1429 | if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { |
1430 | ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", | |
1431 | ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); | |
1432 | return -EINVAL; | |
1433 | } | |
1434 | ||
ccec9038 DL |
1435 | ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; |
1436 | switch (ath10k_cryptmode_param) { | |
1437 | case ATH10K_CRYPT_MODE_HW: | |
1438 | clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); | |
1439 | clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); | |
1440 | break; | |
1441 | case ATH10K_CRYPT_MODE_SW: | |
1442 | if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, | |
1443 | ar->fw_features)) { | |
1444 | ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); | |
1445 | return -EINVAL; | |
1446 | } | |
1447 | ||
1448 | set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); | |
1449 | set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); | |
1450 | break; | |
1451 | default: | |
1452 | ath10k_info(ar, "invalid cryptmode: %d\n", | |
1453 | ath10k_cryptmode_param); | |
1454 | return -EINVAL; | |
1455 | } | |
1456 | ||
1457 | ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; | |
1458 | ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; | |
1459 | ||
b6c7bafa BC |
1460 | if (rawmode) { |
1461 | if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, | |
1462 | ar->fw_features)) { | |
1463 | ath10k_err(ar, "rawmode = 1 requires support from firmware"); | |
1464 | return -EINVAL; | |
1465 | } | |
1466 | set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); | |
1467 | } | |
1468 | ||
ccec9038 DL |
1469 | if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { |
1470 | ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; | |
1471 | ||
1472 | /* Workaround: | |
1473 | * | |
1474 | * Firmware A-MSDU aggregation breaks with RAW Tx encap mode | |
1475 | * and causes enormous performance issues (malformed frames, | |
1476 | * etc). | |
1477 | * | |
1478 | * Disabling A-MSDU makes RAW mode stable with heavy traffic | |
1479 | * albeit a bit slower compared to regular operation. | |
1480 | */ | |
1481 | ar->htt.max_num_amsdu = 1; | |
1482 | } | |
1483 | ||
202e86e6 KV |
1484 | /* Backwards compatibility for firmwares without |
1485 | * ATH10K_FW_IE_WMI_OP_VERSION. | |
1486 | */ | |
1487 | if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { | |
1488 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
4a16fbec RM |
1489 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, |
1490 | ar->fw_features)) | |
202e86e6 KV |
1491 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; |
1492 | else | |
1493 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; | |
1494 | } else { | |
1495 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; | |
1496 | } | |
1497 | } | |
1498 | ||
1499 | switch (ar->wmi.op_version) { | |
1500 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
cfd1061e MK |
1501 | ar->max_num_peers = TARGET_NUM_PEERS; |
1502 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
30c78167 | 1503 | ar->max_num_vdevs = TARGET_NUM_VDEVS; |
91ad5f56 | 1504 | ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; |
6274cd41 YL |
1505 | ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | |
1506 | WMI_STAT_PEER; | |
5c8726ec | 1507 | ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; |
202e86e6 KV |
1508 | break; |
1509 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
1510 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
4a16fbec | 1511 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
af9a6a3a AK |
1512 | if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) { |
1513 | ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; | |
1514 | ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; | |
1515 | } else { | |
1516 | ar->max_num_peers = TARGET_10X_NUM_PEERS; | |
1517 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
1518 | } | |
30c78167 | 1519 | ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; |
91ad5f56 | 1520 | ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; |
6274cd41 | 1521 | ar->fw_stats_req_mask = WMI_STAT_PEER; |
5c8726ec | 1522 | ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; |
202e86e6 | 1523 | break; |
ca996ec5 MK |
1524 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
1525 | ar->max_num_peers = TARGET_TLV_NUM_PEERS; | |
1526 | ar->max_num_stations = TARGET_TLV_NUM_STATIONS; | |
49274332 | 1527 | ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; |
8cca3d60 | 1528 | ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; |
ca996ec5 | 1529 | ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; |
25c86619 | 1530 | ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; |
6274cd41 YL |
1531 | ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | |
1532 | WMI_STAT_PEER; | |
5c8726ec | 1533 | ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; |
ca996ec5 | 1534 | break; |
9bd21322 | 1535 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
d1e52a8e RM |
1536 | ar->max_num_peers = TARGET_10_4_NUM_PEERS; |
1537 | ar->max_num_stations = TARGET_10_4_NUM_STATIONS; | |
1538 | ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; | |
1539 | ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; | |
1540 | ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; | |
5699a6f2 | 1541 | ar->htt.max_num_pending_tx = ar->hw_params.num_msdu_desc; |
d1e52a8e | 1542 | ar->fw_stats_req_mask = WMI_STAT_PEER; |
5699a6f2 | 1543 | ar->max_spatial_stream = ar->hw_params.max_spatial_stream; |
d1e52a8e | 1544 | break; |
202e86e6 KV |
1545 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
1546 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
1547 | WARN_ON(1); | |
1548 | return -EINVAL; | |
cfd1061e | 1549 | } |
5f2144d9 | 1550 | |
dc3632a1 KV |
1551 | /* Backwards compatibility for firmwares without |
1552 | * ATH10K_FW_IE_HTT_OP_VERSION. | |
1553 | */ | |
1554 | if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { | |
1555 | switch (ar->wmi.op_version) { | |
1556 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
1557 | ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; | |
1558 | break; | |
1559 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
1560 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
1561 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: | |
1562 | ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1; | |
1563 | break; | |
1564 | case ATH10K_FW_WMI_OP_VERSION_TLV: | |
1565 | ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV; | |
1566 | break; | |
9bd21322 | 1567 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
dc3632a1 KV |
1568 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
1569 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
1570 | WARN_ON(1); | |
1571 | return -EINVAL; | |
1572 | } | |
1573 | } | |
1574 | ||
5f2144d9 | 1575 | return 0; |
cfd1061e MK |
1576 | } |
1577 | ||
43d2a30f | 1578 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 1579 | { |
5e3dd157 KV |
1580 | int status; |
1581 | ||
60631c5c KV |
1582 | lockdep_assert_held(&ar->conf_mutex); |
1583 | ||
7962b0d8 MK |
1584 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
1585 | ||
64d151d4 MK |
1586 | ath10k_bmi_start(ar); |
1587 | ||
5e3dd157 KV |
1588 | if (ath10k_init_configure_target(ar)) { |
1589 | status = -EINVAL; | |
1590 | goto err; | |
1591 | } | |
1592 | ||
83091559 KV |
1593 | status = ath10k_download_cal_data(ar); |
1594 | if (status) | |
1595 | goto err; | |
1596 | ||
163f5264 | 1597 | /* Some of of qca988x solutions are having global reset issue |
617b0f4d KV |
1598 | * during target initialization. Bypassing PLL setting before |
1599 | * downloading firmware and letting the SoC run on REF_CLK is | |
1600 | * fixing the problem. Corresponding firmware change is also needed | |
1601 | * to set the clock source once the target is initialized. | |
163f5264 RM |
1602 | */ |
1603 | if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, | |
1604 | ar->fw_features)) { | |
1605 | status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); | |
1606 | if (status) { | |
1607 | ath10k_err(ar, "could not write to skip_clock_init: %d\n", | |
1608 | status); | |
1609 | goto err; | |
1610 | } | |
1611 | } | |
1612 | ||
83091559 | 1613 | status = ath10k_download_fw(ar, mode); |
5e3dd157 KV |
1614 | if (status) |
1615 | goto err; | |
1616 | ||
1617 | status = ath10k_init_uart(ar); | |
1618 | if (status) | |
1619 | goto err; | |
1620 | ||
cd003fad MK |
1621 | ar->htc.htc_ops.target_send_suspend_complete = |
1622 | ath10k_send_suspend_complete; | |
5e3dd157 | 1623 | |
cd003fad MK |
1624 | status = ath10k_htc_init(ar); |
1625 | if (status) { | |
7aa7a72a | 1626 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
1627 | goto err; |
1628 | } | |
1629 | ||
1630 | status = ath10k_bmi_done(ar); | |
1631 | if (status) | |
cd003fad | 1632 | goto err; |
5e3dd157 KV |
1633 | |
1634 | status = ath10k_wmi_attach(ar); | |
1635 | if (status) { | |
7aa7a72a | 1636 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 1637 | goto err; |
5e3dd157 KV |
1638 | } |
1639 | ||
95bf21f9 MK |
1640 | status = ath10k_htt_init(ar); |
1641 | if (status) { | |
7aa7a72a | 1642 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
1643 | goto err_wmi_detach; |
1644 | } | |
1645 | ||
1646 | status = ath10k_htt_tx_alloc(&ar->htt); | |
1647 | if (status) { | |
7aa7a72a | 1648 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
1649 | goto err_wmi_detach; |
1650 | } | |
1651 | ||
1652 | status = ath10k_htt_rx_alloc(&ar->htt); | |
1653 | if (status) { | |
7aa7a72a | 1654 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
1655 | goto err_htt_tx_detach; |
1656 | } | |
1657 | ||
67e3c63f MK |
1658 | status = ath10k_hif_start(ar); |
1659 | if (status) { | |
7aa7a72a | 1660 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 1661 | goto err_htt_rx_detach; |
67e3c63f MK |
1662 | } |
1663 | ||
1664 | status = ath10k_htc_wait_target(&ar->htc); | |
1665 | if (status) { | |
7aa7a72a | 1666 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
1667 | goto err_hif_stop; |
1668 | } | |
5e3dd157 | 1669 | |
43d2a30f KV |
1670 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1671 | status = ath10k_htt_connect(&ar->htt); | |
1672 | if (status) { | |
1673 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
1674 | goto err_hif_stop; | |
1675 | } | |
5e3dd157 KV |
1676 | } |
1677 | ||
95bf21f9 MK |
1678 | status = ath10k_wmi_connect(ar); |
1679 | if (status) { | |
7aa7a72a | 1680 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
1681 | goto err_hif_stop; |
1682 | } | |
1683 | ||
1684 | status = ath10k_htc_start(&ar->htc); | |
1685 | if (status) { | |
7aa7a72a | 1686 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
1687 | goto err_hif_stop; |
1688 | } | |
1689 | ||
43d2a30f KV |
1690 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1691 | status = ath10k_wmi_wait_for_service_ready(ar); | |
9eea5689 | 1692 | if (status) { |
43d2a30f | 1693 | ath10k_warn(ar, "wmi service ready event not received"); |
43d2a30f KV |
1694 | goto err_hif_stop; |
1695 | } | |
95bf21f9 | 1696 | } |
5e3dd157 | 1697 | |
7aa7a72a | 1698 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 1699 | ar->hw->wiphy->fw_version); |
5e3dd157 | 1700 | |
5e3dd157 KV |
1701 | status = ath10k_wmi_cmd_init(ar); |
1702 | if (status) { | |
7aa7a72a MK |
1703 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
1704 | status); | |
b7967dc7 | 1705 | goto err_hif_stop; |
5e3dd157 KV |
1706 | } |
1707 | ||
1708 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
9eea5689 | 1709 | if (status) { |
7aa7a72a | 1710 | ath10k_err(ar, "wmi unified ready event not received\n"); |
b7967dc7 | 1711 | goto err_hif_stop; |
5e3dd157 KV |
1712 | } |
1713 | ||
c545070e MK |
1714 | /* If firmware indicates Full Rx Reorder support it must be used in a |
1715 | * slightly different manner. Let HTT code know. | |
1716 | */ | |
1717 | ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, | |
1718 | ar->wmi.svc_map)); | |
1719 | ||
1720 | status = ath10k_htt_rx_ring_refill(ar); | |
1721 | if (status) { | |
1722 | ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); | |
1723 | goto err_hif_stop; | |
1724 | } | |
1725 | ||
43d2a30f KV |
1726 | /* we don't care about HTT in UTF mode */ |
1727 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1728 | status = ath10k_htt_setup(&ar->htt); | |
1729 | if (status) { | |
1730 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1731 | goto err_hif_stop; | |
1732 | } | |
95bf21f9 | 1733 | } |
5e3dd157 | 1734 | |
db66ea04 KV |
1735 | status = ath10k_debug_start(ar); |
1736 | if (status) | |
b7967dc7 | 1737 | goto err_hif_stop; |
db66ea04 | 1738 | |
30c78167 | 1739 | ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; |
dfa413de | 1740 | |
0579119f | 1741 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1742 | |
dd30a36e MK |
1743 | return 0; |
1744 | ||
67e3c63f MK |
1745 | err_hif_stop: |
1746 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1747 | err_htt_rx_detach: |
1748 | ath10k_htt_rx_free(&ar->htt); | |
1749 | err_htt_tx_detach: | |
1750 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1751 | err_wmi_detach: |
1752 | ath10k_wmi_detach(ar); | |
1753 | err: | |
1754 | return status; | |
1755 | } | |
818bdd16 | 1756 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1757 | |
00f5482b MP |
1758 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1759 | { | |
1760 | int ret; | |
a7a42849 | 1761 | unsigned long time_left; |
00f5482b MP |
1762 | |
1763 | reinit_completion(&ar->target_suspend); | |
1764 | ||
1765 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1766 | if (ret) { | |
7aa7a72a | 1767 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1768 | return ret; |
1769 | } | |
1770 | ||
a7a42849 | 1771 | time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); |
00f5482b | 1772 | |
a7a42849 | 1773 | if (!time_left) { |
7aa7a72a | 1774 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1775 | return -ETIMEDOUT; |
1776 | } | |
1777 | ||
1778 | return 0; | |
1779 | } | |
1780 | ||
dd30a36e MK |
1781 | void ath10k_core_stop(struct ath10k *ar) |
1782 | { | |
60631c5c | 1783 | lockdep_assert_held(&ar->conf_mutex); |
f1ee2682 | 1784 | ath10k_debug_stop(ar); |
60631c5c | 1785 | |
00f5482b | 1786 | /* try to suspend target */ |
43d2a30f KV |
1787 | if (ar->state != ATH10K_STATE_RESTARTING && |
1788 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1789 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1790 | ||
95bf21f9 MK |
1791 | ath10k_hif_stop(ar); |
1792 | ath10k_htt_tx_free(&ar->htt); | |
1793 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1794 | ath10k_wmi_detach(ar); |
1795 | } | |
818bdd16 MK |
1796 | EXPORT_SYMBOL(ath10k_core_stop); |
1797 | ||
1798 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1799 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1800 | * necessary to load the firmware (and tear it down immediately since start | |
1801 | * hook will try to init it again) before registering */ | |
1802 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1803 | { | |
29385057 MK |
1804 | struct bmi_target_info target_info; |
1805 | int ret = 0; | |
818bdd16 MK |
1806 | |
1807 | ret = ath10k_hif_power_up(ar); | |
1808 | if (ret) { | |
7aa7a72a | 1809 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1810 | return ret; |
1811 | } | |
1812 | ||
29385057 MK |
1813 | memset(&target_info, 0, sizeof(target_info)); |
1814 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1815 | if (ret) { | |
7aa7a72a | 1816 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 1817 | goto err_power_down; |
29385057 MK |
1818 | } |
1819 | ||
1820 | ar->target_version = target_info.version; | |
1821 | ar->hw->wiphy->hw_version = target_info.version; | |
1822 | ||
1823 | ret = ath10k_init_hw_params(ar); | |
1824 | if (ret) { | |
7aa7a72a | 1825 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 1826 | goto err_power_down; |
29385057 MK |
1827 | } |
1828 | ||
1829 | ret = ath10k_core_fetch_firmware_files(ar); | |
1830 | if (ret) { | |
7aa7a72a | 1831 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 1832 | goto err_power_down; |
29385057 MK |
1833 | } |
1834 | ||
23f591ea KV |
1835 | ath10k_debug_print_hwfw_info(ar); |
1836 | ||
db0984e5 MP |
1837 | ret = ath10k_core_get_board_id_from_otp(ar); |
1838 | if (ret && ret != -EOPNOTSUPP) { | |
b091f369 | 1839 | ath10k_err(ar, "failed to get board id from otp: %d\n", |
db0984e5 MP |
1840 | ret); |
1841 | return ret; | |
1842 | } | |
1843 | ||
1844 | ret = ath10k_core_fetch_board_file(ar); | |
1845 | if (ret) { | |
1846 | ath10k_err(ar, "failed to fetch board file: %d\n", ret); | |
1847 | goto err_free_firmware_files; | |
1848 | } | |
1849 | ||
23f591ea KV |
1850 | ath10k_debug_print_board_info(ar); |
1851 | ||
5f2144d9 KV |
1852 | ret = ath10k_core_init_firmware_features(ar); |
1853 | if (ret) { | |
1854 | ath10k_err(ar, "fatal problem with firmware features: %d\n", | |
1855 | ret); | |
1856 | goto err_free_firmware_files; | |
1857 | } | |
cfd1061e | 1858 | |
dcb02db1 VT |
1859 | ret = ath10k_swap_code_seg_init(ar); |
1860 | if (ret) { | |
1861 | ath10k_err(ar, "failed to initialize code swap segment: %d\n", | |
1862 | ret); | |
1863 | goto err_free_firmware_files; | |
1864 | } | |
1865 | ||
60631c5c KV |
1866 | mutex_lock(&ar->conf_mutex); |
1867 | ||
43d2a30f | 1868 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1869 | if (ret) { |
7aa7a72a | 1870 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 1871 | goto err_unlock; |
818bdd16 MK |
1872 | } |
1873 | ||
23f591ea | 1874 | ath10k_debug_print_boot_info(ar); |
818bdd16 | 1875 | ath10k_core_stop(ar); |
60631c5c KV |
1876 | |
1877 | mutex_unlock(&ar->conf_mutex); | |
1878 | ||
818bdd16 MK |
1879 | ath10k_hif_power_down(ar); |
1880 | return 0; | |
c6ce492d KV |
1881 | |
1882 | err_unlock: | |
1883 | mutex_unlock(&ar->conf_mutex); | |
1884 | ||
5f2144d9 | 1885 | err_free_firmware_files: |
c6ce492d KV |
1886 | ath10k_core_free_firmware_files(ar); |
1887 | ||
1888 | err_power_down: | |
1889 | ath10k_hif_power_down(ar); | |
1890 | ||
1891 | return ret; | |
818bdd16 | 1892 | } |
dd30a36e | 1893 | |
6782cb69 | 1894 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1895 | { |
6782cb69 | 1896 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1897 | int status; |
1898 | ||
818bdd16 MK |
1899 | status = ath10k_core_probe_fw(ar); |
1900 | if (status) { | |
7aa7a72a | 1901 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1902 | goto err; |
818bdd16 | 1903 | } |
dd30a36e | 1904 | |
5e3dd157 | 1905 | status = ath10k_mac_register(ar); |
818bdd16 | 1906 | if (status) { |
7aa7a72a | 1907 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1908 | goto err_release_fw; |
818bdd16 | 1909 | } |
5e3dd157 | 1910 | |
e13cf7a3 | 1911 | status = ath10k_debug_register(ar); |
5e3dd157 | 1912 | if (status) { |
7aa7a72a | 1913 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1914 | goto err_unregister_mac; |
1915 | } | |
1916 | ||
855aed12 SW |
1917 | status = ath10k_spectral_create(ar); |
1918 | if (status) { | |
7aa7a72a | 1919 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1920 | goto err_debug_destroy; |
1921 | } | |
1922 | ||
fe6f36d6 RM |
1923 | status = ath10k_thermal_register(ar); |
1924 | if (status) { | |
1925 | ath10k_err(ar, "could not register thermal device: %d\n", | |
1926 | status); | |
1927 | goto err_spectral_destroy; | |
1928 | } | |
1929 | ||
6782cb69 MK |
1930 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1931 | return; | |
5e3dd157 | 1932 | |
fe6f36d6 RM |
1933 | err_spectral_destroy: |
1934 | ath10k_spectral_destroy(ar); | |
855aed12 SW |
1935 | err_debug_destroy: |
1936 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1937 | err_unregister_mac: |
1938 | ath10k_mac_unregister(ar); | |
29385057 MK |
1939 | err_release_fw: |
1940 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1941 | err: |
a491a920 MK |
1942 | /* TODO: It's probably a good idea to release device from the driver |
1943 | * but calling device_release_driver() here will cause a deadlock. | |
1944 | */ | |
6782cb69 MK |
1945 | return; |
1946 | } | |
1947 | ||
1948 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1949 | { | |
6782cb69 | 1950 | ar->chip_id = chip_id; |
6782cb69 MK |
1951 | queue_work(ar->workqueue, &ar->register_work); |
1952 | ||
1953 | return 0; | |
5e3dd157 KV |
1954 | } |
1955 | EXPORT_SYMBOL(ath10k_core_register); | |
1956 | ||
1957 | void ath10k_core_unregister(struct ath10k *ar) | |
1958 | { | |
6782cb69 MK |
1959 | cancel_work_sync(&ar->register_work); |
1960 | ||
1961 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1962 | return; | |
1963 | ||
fe6f36d6 | 1964 | ath10k_thermal_unregister(ar); |
804eef14 SW |
1965 | /* Stop spectral before unregistering from mac80211 to remove the |
1966 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1967 | * would be already be free'd recursively, leading to a double free. | |
1968 | */ | |
1969 | ath10k_spectral_destroy(ar); | |
1970 | ||
5e3dd157 KV |
1971 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1972 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1973 | * unhappy about callback failures. */ | |
1974 | ath10k_mac_unregister(ar); | |
db66ea04 | 1975 | |
43d2a30f KV |
1976 | ath10k_testmode_destroy(ar); |
1977 | ||
29385057 | 1978 | ath10k_core_free_firmware_files(ar); |
0a51b343 | 1979 | ath10k_core_free_board_files(ar); |
6f1f56ea | 1980 | |
e13cf7a3 | 1981 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1982 | } |
1983 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1984 | ||
e7b54194 | 1985 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1986 | enum ath10k_bus bus, |
d63955b3 | 1987 | enum ath10k_hw_rev hw_rev, |
0d0a6939 MK |
1988 | const struct ath10k_hif_ops *hif_ops) |
1989 | { | |
1990 | struct ath10k *ar; | |
e13cf7a3 | 1991 | int ret; |
0d0a6939 | 1992 | |
e7b54194 | 1993 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1994 | if (!ar) |
1995 | return NULL; | |
1996 | ||
1997 | ar->ath_common.priv = ar; | |
1998 | ar->ath_common.hw = ar->hw; | |
0d0a6939 | 1999 | ar->dev = dev; |
d63955b3 | 2000 | ar->hw_rev = hw_rev; |
0d0a6939 | 2001 | ar->hif.ops = hif_ops; |
e07db352 | 2002 | ar->hif.bus = bus; |
0d0a6939 | 2003 | |
d63955b3 MK |
2004 | switch (hw_rev) { |
2005 | case ATH10K_HW_QCA988X: | |
2006 | ar->regs = &qca988x_regs; | |
2f2cfc4a | 2007 | ar->hw_values = &qca988x_values; |
d63955b3 MK |
2008 | break; |
2009 | case ATH10K_HW_QCA6174: | |
a226b519 | 2010 | case ATH10K_HW_QCA9377: |
d63955b3 | 2011 | ar->regs = &qca6174_regs; |
2f2cfc4a | 2012 | ar->hw_values = &qca6174_values; |
d63955b3 | 2013 | break; |
8bd47021 VT |
2014 | case ATH10K_HW_QCA99X0: |
2015 | ar->regs = &qca99x0_regs; | |
2016 | ar->hw_values = &qca99x0_values; | |
2017 | break; | |
37a219a5 RM |
2018 | case ATH10K_HW_QCA4019: |
2019 | ar->regs = &qca4019_regs; | |
2020 | ar->hw_values = &qca4019_values; | |
2021 | break; | |
d63955b3 MK |
2022 | default: |
2023 | ath10k_err(ar, "unsupported core hardware revision %d\n", | |
2024 | hw_rev); | |
2025 | ret = -ENOTSUPP; | |
2026 | goto err_free_mac; | |
2027 | } | |
2028 | ||
0d0a6939 MK |
2029 | init_completion(&ar->scan.started); |
2030 | init_completion(&ar->scan.completed); | |
2031 | init_completion(&ar->scan.on_channel); | |
2032 | init_completion(&ar->target_suspend); | |
5fd3ac3c | 2033 | init_completion(&ar->wow.wakeup_completed); |
0d0a6939 MK |
2034 | |
2035 | init_completion(&ar->install_key_done); | |
2036 | init_completion(&ar->vdev_setup_done); | |
ac2953fc | 2037 | init_completion(&ar->thermal.wmi_sync); |
0d0a6939 | 2038 | |
5c81c7fd | 2039 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
2040 | |
2041 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
2042 | if (!ar->workqueue) | |
e13cf7a3 | 2043 | goto err_free_mac; |
0d0a6939 | 2044 | |
c8ecfc1c RM |
2045 | ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); |
2046 | if (!ar->workqueue_aux) | |
2047 | goto err_free_wq; | |
2048 | ||
0d0a6939 MK |
2049 | mutex_init(&ar->conf_mutex); |
2050 | spin_lock_init(&ar->data_lock); | |
29946878 | 2051 | spin_lock_init(&ar->txqs_lock); |
0d0a6939 | 2052 | |
29946878 | 2053 | INIT_LIST_HEAD(&ar->txqs); |
0d0a6939 MK |
2054 | INIT_LIST_HEAD(&ar->peers); |
2055 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
2056 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
2057 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
2058 | |
2059 | init_completion(&ar->offchan_tx_completed); | |
2060 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
2061 | skb_queue_head_init(&ar->offchan_tx_queue); | |
2062 | ||
2063 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
2064 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
2065 | ||
6782cb69 | 2066 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
2067 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
2068 | ||
e13cf7a3 MK |
2069 | ret = ath10k_debug_create(ar); |
2070 | if (ret) | |
c8ecfc1c | 2071 | goto err_free_aux_wq; |
e13cf7a3 | 2072 | |
0d0a6939 MK |
2073 | return ar; |
2074 | ||
c8ecfc1c RM |
2075 | err_free_aux_wq: |
2076 | destroy_workqueue(ar->workqueue_aux); | |
e13cf7a3 MK |
2077 | err_free_wq: |
2078 | destroy_workqueue(ar->workqueue); | |
2079 | ||
2080 | err_free_mac: | |
0d0a6939 | 2081 | ath10k_mac_destroy(ar); |
e13cf7a3 | 2082 | |
0d0a6939 MK |
2083 | return NULL; |
2084 | } | |
2085 | EXPORT_SYMBOL(ath10k_core_create); | |
2086 | ||
2087 | void ath10k_core_destroy(struct ath10k *ar) | |
2088 | { | |
2089 | flush_workqueue(ar->workqueue); | |
2090 | destroy_workqueue(ar->workqueue); | |
2091 | ||
c8ecfc1c RM |
2092 | flush_workqueue(ar->workqueue_aux); |
2093 | destroy_workqueue(ar->workqueue_aux); | |
2094 | ||
e13cf7a3 | 2095 | ath10k_debug_destroy(ar); |
a925a376 | 2096 | ath10k_wmi_free_host_mem(ar); |
0d0a6939 MK |
2097 | ath10k_mac_destroy(ar); |
2098 | } | |
2099 | EXPORT_SYMBOL(ath10k_core_destroy); | |
2100 | ||
5e3dd157 KV |
2101 | MODULE_AUTHOR("Qualcomm Atheros"); |
2102 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
2103 | MODULE_LICENSE("Dual BSD/GPL"); |