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ath10k: remove ar_pci->started
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1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
29
30unsigned int ath10k_debug_mask;
31static bool uart_print;
32static unsigned int ath10k_p2p;
33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
34module_param(uart_print, bool, 0644);
35module_param_named(p2p, ath10k_p2p, uint, 0644);
36MODULE_PARM_DESC(debug_mask, "Debugging mask");
37MODULE_PARM_DESC(uart_print, "Uart target debugging");
38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
39
40static const struct ath10k_hw_params ath10k_hw_params_list[] = {
5e3dd157
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41 {
42 .id = QCA988X_HW_2_0_VERSION,
43 .name = "qca988x hw2.0",
44 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
45 .fw = {
46 .dir = QCA988X_HW_2_0_FW_DIR,
47 .fw = QCA988X_HW_2_0_FW_FILE,
48 .otp = QCA988X_HW_2_0_OTP_FILE,
49 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
50 },
51 },
52};
53
54static void ath10k_send_suspend_complete(struct ath10k *ar)
55{
effea968 56 ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
5e3dd157 57
9042e17d 58 complete(&ar->target_suspend);
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KV
59}
60
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61static int ath10k_init_configure_target(struct ath10k *ar)
62{
63 u32 param_host;
64 int ret;
65
66 /* tell target which HTC version it is used*/
67 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
68 HTC_PROTOCOL_VERSION);
69 if (ret) {
70 ath10k_err("settings HTC version failed\n");
71 return ret;
72 }
73
74 /* set the firmware mode to STA/IBSS/AP */
75 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
76 if (ret) {
77 ath10k_err("setting firmware mode (1/2) failed\n");
78 return ret;
79 }
80
81 /* TODO following parameters need to be re-visited. */
82 /* num_device */
83 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
84 /* Firmware mode */
85 /* FIXME: Why FW_MODE_AP ??.*/
86 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
87 /* mac_addr_method */
88 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
89 /* firmware_bridge */
90 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
91 /* fwsubmode */
92 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
93
94 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
95 if (ret) {
96 ath10k_err("setting firmware mode (2/2) failed\n");
97 return ret;
98 }
99
100 /* We do all byte-swapping on the host */
101 ret = ath10k_bmi_write32(ar, hi_be, 0);
102 if (ret) {
103 ath10k_err("setting host CPU BE mode failed\n");
104 return ret;
105 }
106
107 /* FW descriptor/Data swap flags */
108 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
109
110 if (ret) {
111 ath10k_err("setting FW data/desc swap flags failed\n");
112 return ret;
113 }
114
115 return 0;
116}
117
118static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
119 const char *dir,
120 const char *file)
121{
122 char filename[100];
123 const struct firmware *fw;
124 int ret;
125
126 if (file == NULL)
127 return ERR_PTR(-ENOENT);
128
129 if (dir == NULL)
130 dir = ".";
131
132 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
133 ret = request_firmware(&fw, filename, ar->dev);
134 if (ret)
135 return ERR_PTR(ret);
136
137 return fw;
138}
139
958df3a0 140static int ath10k_push_board_ext_data(struct ath10k *ar)
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141{
142 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
143 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
144 u32 board_ext_data_addr;
145 int ret;
146
147 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
148 if (ret) {
149 ath10k_err("could not read board ext data addr (%d)\n", ret);
150 return ret;
151 }
152
b52b7688 153 ath10k_dbg(ATH10K_DBG_BOOT,
effea968 154 "boot push board extended data addr 0x%x\n",
5e3dd157
KV
155 board_ext_data_addr);
156
157 if (board_ext_data_addr == 0)
158 return 0;
159
958df3a0 160 if (ar->board_len != (board_data_size + board_ext_data_size)) {
5e3dd157 161 ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
958df3a0 162 ar->board_len, board_data_size, board_ext_data_size);
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163 return -EINVAL;
164 }
165
166 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
958df3a0 167 ar->board_data + board_data_size,
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168 board_ext_data_size);
169 if (ret) {
170 ath10k_err("could not write board ext data (%d)\n", ret);
171 return ret;
172 }
173
174 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
175 (board_ext_data_size << 16) | 1);
176 if (ret) {
177 ath10k_err("could not write board ext data bit (%d)\n", ret);
178 return ret;
179 }
180
181 return 0;
182}
183
184static int ath10k_download_board_data(struct ath10k *ar)
185{
186 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
187 u32 address;
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188 int ret;
189
958df3a0 190 ret = ath10k_push_board_ext_data(ar);
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191 if (ret) {
192 ath10k_err("could not push board ext data (%d)\n", ret);
193 goto exit;
194 }
195
196 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
197 if (ret) {
198 ath10k_err("could not read board data addr (%d)\n", ret);
199 goto exit;
200 }
201
958df3a0
KV
202 ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
203 min_t(u32, board_data_size,
204 ar->board_len));
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205 if (ret) {
206 ath10k_err("could not write board data (%d)\n", ret);
207 goto exit;
208 }
209
210 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
211 if (ret) {
212 ath10k_err("could not write board data bit (%d)\n", ret);
213 goto exit;
214 }
215
216exit:
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217 return ret;
218}
219
220static int ath10k_download_and_run_otp(struct ath10k *ar)
221{
d6d4a58d 222 u32 result, address = ar->hw_params.patch_load_addr;
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223 int ret;
224
225 /* OTP is optional */
226
7f06ea1e 227 if (!ar->otp_data || !ar->otp_len) {
36a8f413
BG
228 ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
229 ar->otp_data, ar->otp_len);
5e3dd157 230 return 0;
7f06ea1e
KV
231 }
232
233 ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
234 address, ar->otp_len);
5e3dd157 235
958df3a0 236 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
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237 if (ret) {
238 ath10k_err("could not write otp (%d)\n", ret);
7f06ea1e 239 return ret;
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240 }
241
d6d4a58d 242 ret = ath10k_bmi_execute(ar, address, 0, &result);
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243 if (ret) {
244 ath10k_err("could not execute otp (%d)\n", ret);
7f06ea1e 245 return ret;
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246 }
247
7f06ea1e
KV
248 ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
249
250 if (result != 0) {
251 ath10k_err("otp calibration failed: %d", result);
252 return -EINVAL;
253 }
254
255 return 0;
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256}
257
258static int ath10k_download_fw(struct ath10k *ar)
259{
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260 u32 address;
261 int ret;
262
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263 address = ar->hw_params.patch_load_addr;
264
958df3a0
KV
265 ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
266 ar->firmware_len);
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267 if (ret) {
268 ath10k_err("could not write fw (%d)\n", ret);
269 goto exit;
270 }
271
272exit:
29385057
MK
273 return ret;
274}
275
276static void ath10k_core_free_firmware_files(struct ath10k *ar)
277{
36527916
KV
278 if (ar->board && !IS_ERR(ar->board))
279 release_firmware(ar->board);
29385057
MK
280
281 if (ar->otp && !IS_ERR(ar->otp))
282 release_firmware(ar->otp);
283
284 if (ar->firmware && !IS_ERR(ar->firmware))
285 release_firmware(ar->firmware);
286
36527916 287 ar->board = NULL;
958df3a0
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288 ar->board_data = NULL;
289 ar->board_len = 0;
290
29385057 291 ar->otp = NULL;
958df3a0
KV
292 ar->otp_data = NULL;
293 ar->otp_len = 0;
294
29385057 295 ar->firmware = NULL;
958df3a0
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296 ar->firmware_data = NULL;
297 ar->firmware_len = 0;
29385057
MK
298}
299
1a222435 300static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
29385057
MK
301{
302 int ret = 0;
303
304 if (ar->hw_params.fw.fw == NULL) {
305 ath10k_err("firmware file not defined\n");
306 return -EINVAL;
307 }
308
309 if (ar->hw_params.fw.board == NULL) {
310 ath10k_err("board data file not defined");
311 return -EINVAL;
312 }
313
36527916
KV
314 ar->board = ath10k_fetch_fw_file(ar,
315 ar->hw_params.fw.dir,
316 ar->hw_params.fw.board);
317 if (IS_ERR(ar->board)) {
318 ret = PTR_ERR(ar->board);
29385057
MK
319 ath10k_err("could not fetch board data (%d)\n", ret);
320 goto err;
321 }
322
958df3a0
KV
323 ar->board_data = ar->board->data;
324 ar->board_len = ar->board->size;
325
29385057
MK
326 ar->firmware = ath10k_fetch_fw_file(ar,
327 ar->hw_params.fw.dir,
328 ar->hw_params.fw.fw);
329 if (IS_ERR(ar->firmware)) {
330 ret = PTR_ERR(ar->firmware);
331 ath10k_err("could not fetch firmware (%d)\n", ret);
332 goto err;
333 }
334
958df3a0
KV
335 ar->firmware_data = ar->firmware->data;
336 ar->firmware_len = ar->firmware->size;
337
29385057
MK
338 /* OTP may be undefined. If so, don't fetch it at all */
339 if (ar->hw_params.fw.otp == NULL)
340 return 0;
341
342 ar->otp = ath10k_fetch_fw_file(ar,
343 ar->hw_params.fw.dir,
344 ar->hw_params.fw.otp);
345 if (IS_ERR(ar->otp)) {
346 ret = PTR_ERR(ar->otp);
347 ath10k_err("could not fetch otp (%d)\n", ret);
348 goto err;
349 }
350
958df3a0
KV
351 ar->otp_data = ar->otp->data;
352 ar->otp_len = ar->otp->size;
353
29385057
MK
354 return 0;
355
356err:
357 ath10k_core_free_firmware_files(ar);
5e3dd157
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358 return ret;
359}
360
1a222435
KV
361static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
362{
363 size_t magic_len, len, ie_len;
364 int ie_id, i, index, bit, ret;
365 struct ath10k_fw_ie *hdr;
366 const u8 *data;
367 __le32 *timestamp;
368
369 /* first fetch the firmware file (firmware-*.bin) */
370 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
371 if (IS_ERR(ar->firmware)) {
53c02284
BG
372 ath10k_err("could not fetch firmware file '%s/%s': %ld\n",
373 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
1a222435
KV
374 return PTR_ERR(ar->firmware);
375 }
376
377 data = ar->firmware->data;
378 len = ar->firmware->size;
379
380 /* magic also includes the null byte, check that as well */
381 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
382
383 if (len < magic_len) {
53c02284
BG
384 ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n",
385 ar->hw_params.fw.dir, name, len);
9bab1cc0
MK
386 ret = -EINVAL;
387 goto err;
1a222435
KV
388 }
389
390 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
53c02284 391 ath10k_err("invalid firmware magic\n");
9bab1cc0
MK
392 ret = -EINVAL;
393 goto err;
1a222435
KV
394 }
395
396 /* jump over the padding */
397 magic_len = ALIGN(magic_len, 4);
398
399 len -= magic_len;
400 data += magic_len;
401
402 /* loop elements */
403 while (len > sizeof(struct ath10k_fw_ie)) {
404 hdr = (struct ath10k_fw_ie *)data;
405
406 ie_id = le32_to_cpu(hdr->id);
407 ie_len = le32_to_cpu(hdr->len);
408
409 len -= sizeof(*hdr);
410 data += sizeof(*hdr);
411
412 if (len < ie_len) {
53c02284 413 ath10k_err("invalid length for FW IE %d (%zu < %zu)\n",
1a222435 414 ie_id, len, ie_len);
9bab1cc0
MK
415 ret = -EINVAL;
416 goto err;
1a222435
KV
417 }
418
419 switch (ie_id) {
420 case ATH10K_FW_IE_FW_VERSION:
421 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
422 break;
423
424 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
425 ar->hw->wiphy->fw_version[ie_len] = '\0';
426
427 ath10k_dbg(ATH10K_DBG_BOOT,
428 "found fw version %s\n",
429 ar->hw->wiphy->fw_version);
430 break;
431 case ATH10K_FW_IE_TIMESTAMP:
432 if (ie_len != sizeof(u32))
433 break;
434
435 timestamp = (__le32 *)data;
436
437 ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n",
438 le32_to_cpup(timestamp));
439 break;
440 case ATH10K_FW_IE_FEATURES:
441 ath10k_dbg(ATH10K_DBG_BOOT,
442 "found firmware features ie (%zd B)\n",
443 ie_len);
444
445 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
446 index = i / 8;
447 bit = i % 8;
448
449 if (index == ie_len)
450 break;
451
f591a1a5
BG
452 if (data[index] & (1 << bit)) {
453 ath10k_dbg(ATH10K_DBG_BOOT,
454 "Enabling feature bit: %i\n",
455 i);
1a222435 456 __set_bit(i, ar->fw_features);
f591a1a5 457 }
1a222435
KV
458 }
459
460 ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "",
461 ar->fw_features,
462 sizeof(ar->fw_features));
463 break;
464 case ATH10K_FW_IE_FW_IMAGE:
465 ath10k_dbg(ATH10K_DBG_BOOT,
466 "found fw image ie (%zd B)\n",
467 ie_len);
468
469 ar->firmware_data = data;
470 ar->firmware_len = ie_len;
471
472 break;
473 case ATH10K_FW_IE_OTP_IMAGE:
474 ath10k_dbg(ATH10K_DBG_BOOT,
475 "found otp image ie (%zd B)\n",
476 ie_len);
477
478 ar->otp_data = data;
479 ar->otp_len = ie_len;
480
481 break;
482 default:
483 ath10k_warn("Unknown FW IE: %u\n",
484 le32_to_cpu(hdr->id));
485 break;
486 }
487
488 /* jump over the padding */
489 ie_len = ALIGN(ie_len, 4);
490
491 len -= ie_len;
492 data += ie_len;
e05634ee 493 }
1a222435
KV
494
495 if (!ar->firmware_data || !ar->firmware_len) {
53c02284
BG
496 ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
497 ar->hw_params.fw.dir, name);
1a222435
KV
498 ret = -ENOMEDIUM;
499 goto err;
500 }
501
24c88f78
MK
502 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
503 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
504 ath10k_err("feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
505 ret = -EINVAL;
506 goto err;
507 }
508
1a222435
KV
509 /* now fetch the board file */
510 if (ar->hw_params.fw.board == NULL) {
511 ath10k_err("board data file not defined");
512 ret = -EINVAL;
513 goto err;
514 }
515
516 ar->board = ath10k_fetch_fw_file(ar,
517 ar->hw_params.fw.dir,
518 ar->hw_params.fw.board);
519 if (IS_ERR(ar->board)) {
520 ret = PTR_ERR(ar->board);
53c02284
BG
521 ath10k_err("could not fetch board data '%s/%s' (%d)\n",
522 ar->hw_params.fw.dir, ar->hw_params.fw.board,
523 ret);
1a222435
KV
524 goto err;
525 }
526
527 ar->board_data = ar->board->data;
528 ar->board_len = ar->board->size;
529
530 return 0;
531
532err:
533 ath10k_core_free_firmware_files(ar);
534 return ret;
535}
536
537static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
538{
539 int ret;
540
24c88f78
MK
541 ar->fw_api = 3;
542 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
543
544 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
545 if (ret == 0)
546 goto success;
547
53c02284
BG
548 ar->fw_api = 2;
549 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
550
1a222435 551 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
53c02284
BG
552 if (ret == 0)
553 goto success;
554
555 ar->fw_api = 1;
556 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1a222435
KV
557
558 ret = ath10k_core_fetch_firmware_api_1(ar);
559 if (ret)
560 return ret;
561
53c02284 562success:
1a222435
KV
563 ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
564
565 return 0;
566}
567
5e3dd157
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568static int ath10k_init_download_firmware(struct ath10k *ar)
569{
570 int ret;
571
572 ret = ath10k_download_board_data(ar);
36a8f413
BG
573 if (ret) {
574 ath10k_err("failed to download board data: %d\n", ret);
5e3dd157 575 return ret;
36a8f413 576 }
5e3dd157
KV
577
578 ret = ath10k_download_and_run_otp(ar);
36a8f413
BG
579 if (ret) {
580 ath10k_err("failed to run otp: %d\n", ret);
5e3dd157 581 return ret;
36a8f413 582 }
5e3dd157
KV
583
584 ret = ath10k_download_fw(ar);
36a8f413
BG
585 if (ret) {
586 ath10k_err("failed to download firmware: %d\n", ret);
5e3dd157 587 return ret;
36a8f413 588 }
5e3dd157
KV
589
590 return ret;
591}
592
593static int ath10k_init_uart(struct ath10k *ar)
594{
595 int ret;
596
597 /*
598 * Explicitly setting UART prints to zero as target turns it on
599 * based on scratch registers.
600 */
601 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
602 if (ret) {
603 ath10k_warn("could not disable UART prints (%d)\n", ret);
604 return ret;
605 }
606
c8c39afe 607 if (!uart_print)
5e3dd157 608 return 0;
5e3dd157
KV
609
610 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
611 if (ret) {
612 ath10k_warn("could not enable UART prints (%d)\n", ret);
613 return ret;
614 }
615
616 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
617 if (ret) {
618 ath10k_warn("could not enable UART prints (%d)\n", ret);
619 return ret;
620 }
621
03fc137b
BM
622 /* Set the UART baud rate to 19200. */
623 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
624 if (ret) {
625 ath10k_warn("could not set the baud rate (%d)\n", ret);
626 return ret;
627 }
628
5e3dd157
KV
629 ath10k_info("UART prints enabled\n");
630 return 0;
631}
632
633static int ath10k_init_hw_params(struct ath10k *ar)
634{
635 const struct ath10k_hw_params *uninitialized_var(hw_params);
636 int i;
637
638 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
639 hw_params = &ath10k_hw_params_list[i];
640
641 if (hw_params->id == ar->target_version)
642 break;
643 }
644
645 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
646 ath10k_err("Unsupported hardware version: 0x%x\n",
647 ar->target_version);
648 return -EINVAL;
649 }
650
651 ar->hw_params = *hw_params;
652
c8c39afe
KV
653 ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
654 ar->hw_params.name, ar->target_version);
5e3dd157
KV
655
656 return 0;
657}
658
affd3217
MK
659static void ath10k_core_restart(struct work_struct *work)
660{
661 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
662
663 mutex_lock(&ar->conf_mutex);
664
665 switch (ar->state) {
666 case ATH10K_STATE_ON:
affd3217 667 ar->state = ATH10K_STATE_RESTARTING;
5c81c7fd 668 ath10k_scan_finish(ar);
affd3217
MK
669 ieee80211_restart_hw(ar->hw);
670 break;
671 case ATH10K_STATE_OFF:
5e90de86
MK
672 /* this can happen if driver is being unloaded
673 * or if the crash happens during FW probing */
affd3217
MK
674 ath10k_warn("cannot restart a device that hasn't been started\n");
675 break;
676 case ATH10K_STATE_RESTARTING:
c5058f5b
MK
677 /* hw restart might be requested from multiple places */
678 break;
affd3217
MK
679 case ATH10K_STATE_RESTARTED:
680 ar->state = ATH10K_STATE_WEDGED;
681 /* fall through */
682 case ATH10K_STATE_WEDGED:
683 ath10k_warn("device is wedged, will not restart\n");
684 break;
685 }
686
687 mutex_unlock(&ar->conf_mutex);
688}
689
dd30a36e 690int ath10k_core_start(struct ath10k *ar)
5e3dd157 691{
5e3dd157
KV
692 int status;
693
60631c5c
KV
694 lockdep_assert_held(&ar->conf_mutex);
695
64d151d4
MK
696 ath10k_bmi_start(ar);
697
5e3dd157
KV
698 if (ath10k_init_configure_target(ar)) {
699 status = -EINVAL;
700 goto err;
701 }
702
703 status = ath10k_init_download_firmware(ar);
704 if (status)
705 goto err;
706
707 status = ath10k_init_uart(ar);
708 if (status)
709 goto err;
710
cd003fad
MK
711 ar->htc.htc_ops.target_send_suspend_complete =
712 ath10k_send_suspend_complete;
5e3dd157 713
cd003fad
MK
714 status = ath10k_htc_init(ar);
715 if (status) {
716 ath10k_err("could not init HTC (%d)\n", status);
5e3dd157
KV
717 goto err;
718 }
719
720 status = ath10k_bmi_done(ar);
721 if (status)
cd003fad 722 goto err;
5e3dd157
KV
723
724 status = ath10k_wmi_attach(ar);
725 if (status) {
726 ath10k_err("WMI attach failed: %d\n", status);
cd003fad 727 goto err;
5e3dd157
KV
728 }
729
95bf21f9
MK
730 status = ath10k_htt_init(ar);
731 if (status) {
732 ath10k_err("failed to init htt: %d\n", status);
733 goto err_wmi_detach;
734 }
735
736 status = ath10k_htt_tx_alloc(&ar->htt);
737 if (status) {
738 ath10k_err("failed to alloc htt tx: %d\n", status);
739 goto err_wmi_detach;
740 }
741
742 status = ath10k_htt_rx_alloc(&ar->htt);
743 if (status) {
744 ath10k_err("failed to alloc htt rx: %d\n", status);
745 goto err_htt_tx_detach;
746 }
747
67e3c63f
MK
748 status = ath10k_hif_start(ar);
749 if (status) {
750 ath10k_err("could not start HIF: %d\n", status);
95bf21f9 751 goto err_htt_rx_detach;
67e3c63f
MK
752 }
753
754 status = ath10k_htc_wait_target(&ar->htc);
755 if (status) {
756 ath10k_err("failed to connect to HTC: %d\n", status);
757 goto err_hif_stop;
758 }
5e3dd157 759
95bf21f9 760 status = ath10k_htt_connect(&ar->htt);
edb8236d 761 if (status) {
95bf21f9 762 ath10k_err("failed to connect htt (%d)\n", status);
67e3c63f 763 goto err_hif_stop;
5e3dd157
KV
764 }
765
95bf21f9
MK
766 status = ath10k_wmi_connect(ar);
767 if (status) {
768 ath10k_err("could not connect wmi: %d\n", status);
769 goto err_hif_stop;
770 }
771
772 status = ath10k_htc_start(&ar->htc);
773 if (status) {
774 ath10k_err("failed to start htc: %d\n", status);
775 goto err_hif_stop;
776 }
777
778 status = ath10k_wmi_wait_for_service_ready(ar);
779 if (status <= 0) {
780 ath10k_warn("wmi service ready event not received");
781 status = -ETIMEDOUT;
b7967dc7 782 goto err_hif_stop;
95bf21f9 783 }
5e3dd157 784
c8c39afe
KV
785 ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n",
786 ar->hw->wiphy->fw_version);
5e3dd157 787
5e3dd157
KV
788 status = ath10k_wmi_cmd_init(ar);
789 if (status) {
790 ath10k_err("could not send WMI init command (%d)\n", status);
b7967dc7 791 goto err_hif_stop;
5e3dd157
KV
792 }
793
794 status = ath10k_wmi_wait_for_unified_ready(ar);
795 if (status <= 0) {
796 ath10k_err("wmi unified ready event not received\n");
797 status = -ETIMEDOUT;
b7967dc7 798 goto err_hif_stop;
5e3dd157
KV
799 }
800
95bf21f9
MK
801 status = ath10k_htt_setup(&ar->htt);
802 if (status) {
803 ath10k_err("failed to setup htt: %d\n", status);
b7967dc7 804 goto err_hif_stop;
95bf21f9 805 }
5e3dd157 806
db66ea04
KV
807 status = ath10k_debug_start(ar);
808 if (status)
b7967dc7 809 goto err_hif_stop;
db66ea04 810
dfa413de
BM
811 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
812 ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1;
813 else
814 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
815
0579119f 816 INIT_LIST_HEAD(&ar->arvifs);
1a1b8a88 817
dd30a36e
MK
818 return 0;
819
67e3c63f
MK
820err_hif_stop:
821 ath10k_hif_stop(ar);
95bf21f9
MK
822err_htt_rx_detach:
823 ath10k_htt_rx_free(&ar->htt);
824err_htt_tx_detach:
825 ath10k_htt_tx_free(&ar->htt);
dd30a36e
MK
826err_wmi_detach:
827 ath10k_wmi_detach(ar);
828err:
829 return status;
830}
818bdd16 831EXPORT_SYMBOL(ath10k_core_start);
dd30a36e 832
00f5482b
MP
833int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
834{
835 int ret;
836
837 reinit_completion(&ar->target_suspend);
838
839 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
840 if (ret) {
841 ath10k_warn("could not suspend target (%d)\n", ret);
842 return ret;
843 }
844
845 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
846
847 if (ret == 0) {
848 ath10k_warn("suspend timed out - target pause event never came\n");
849 return -ETIMEDOUT;
850 }
851
852 return 0;
853}
854
dd30a36e
MK
855void ath10k_core_stop(struct ath10k *ar)
856{
60631c5c
KV
857 lockdep_assert_held(&ar->conf_mutex);
858
00f5482b 859 /* try to suspend target */
216a1836
MK
860 if (ar->state != ATH10K_STATE_RESTARTING)
861 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
862
db66ea04 863 ath10k_debug_stop(ar);
95bf21f9
MK
864 ath10k_hif_stop(ar);
865 ath10k_htt_tx_free(&ar->htt);
866 ath10k_htt_rx_free(&ar->htt);
dd30a36e
MK
867 ath10k_wmi_detach(ar);
868}
818bdd16
MK
869EXPORT_SYMBOL(ath10k_core_stop);
870
871/* mac80211 manages fw/hw initialization through start/stop hooks. However in
872 * order to know what hw capabilities should be advertised to mac80211 it is
873 * necessary to load the firmware (and tear it down immediately since start
874 * hook will try to init it again) before registering */
875static int ath10k_core_probe_fw(struct ath10k *ar)
876{
29385057
MK
877 struct bmi_target_info target_info;
878 int ret = 0;
818bdd16
MK
879
880 ret = ath10k_hif_power_up(ar);
881 if (ret) {
882 ath10k_err("could not start pci hif (%d)\n", ret);
883 return ret;
884 }
885
29385057
MK
886 memset(&target_info, 0, sizeof(target_info));
887 ret = ath10k_bmi_get_target_info(ar, &target_info);
888 if (ret) {
889 ath10k_err("could not get target info (%d)\n", ret);
890 ath10k_hif_power_down(ar);
891 return ret;
892 }
893
894 ar->target_version = target_info.version;
895 ar->hw->wiphy->hw_version = target_info.version;
896
897 ret = ath10k_init_hw_params(ar);
898 if (ret) {
899 ath10k_err("could not get hw params (%d)\n", ret);
900 ath10k_hif_power_down(ar);
901 return ret;
902 }
903
904 ret = ath10k_core_fetch_firmware_files(ar);
905 if (ret) {
906 ath10k_err("could not fetch firmware files (%d)\n", ret);
907 ath10k_hif_power_down(ar);
908 return ret;
909 }
910
60631c5c
KV
911 mutex_lock(&ar->conf_mutex);
912
818bdd16
MK
913 ret = ath10k_core_start(ar);
914 if (ret) {
915 ath10k_err("could not init core (%d)\n", ret);
29385057 916 ath10k_core_free_firmware_files(ar);
818bdd16 917 ath10k_hif_power_down(ar);
60631c5c 918 mutex_unlock(&ar->conf_mutex);
818bdd16
MK
919 return ret;
920 }
921
8079de0d 922 ath10k_print_driver_info(ar);
818bdd16 923 ath10k_core_stop(ar);
60631c5c
KV
924
925 mutex_unlock(&ar->conf_mutex);
926
818bdd16
MK
927 ath10k_hif_power_down(ar);
928 return 0;
929}
dd30a36e 930
e01ae68c
KV
931static int ath10k_core_check_chip_id(struct ath10k *ar)
932{
933 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
934
effea968
KV
935 ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
936 ar->chip_id, hw_revision);
937
e01ae68c
KV
938 /* Check that we are not using hw1.0 (some of them have same pci id
939 * as hw2.0) before doing anything else as ath10k crashes horribly
940 * due to missing hw1.0 workarounds. */
941 switch (hw_revision) {
942 case QCA988X_HW_1_0_CHIP_ID_REV:
943 ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
944 return -EOPNOTSUPP;
945
946 case QCA988X_HW_2_0_CHIP_ID_REV:
947 /* known hardware revision, continue normally */
948 return 0;
949
950 default:
951 ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
952 ar->chip_id);
953 return 0;
954 }
955
956 return 0;
957}
958
6782cb69 959static void ath10k_core_register_work(struct work_struct *work)
dd30a36e 960{
6782cb69 961 struct ath10k *ar = container_of(work, struct ath10k, register_work);
dd30a36e
MK
962 int status;
963
818bdd16
MK
964 status = ath10k_core_probe_fw(ar);
965 if (status) {
966 ath10k_err("could not probe fw (%d)\n", status);
6782cb69 967 goto err;
818bdd16 968 }
dd30a36e 969
5e3dd157 970 status = ath10k_mac_register(ar);
818bdd16
MK
971 if (status) {
972 ath10k_err("could not register to mac80211 (%d)\n", status);
29385057 973 goto err_release_fw;
818bdd16 974 }
5e3dd157
KV
975
976 status = ath10k_debug_create(ar);
977 if (status) {
978 ath10k_err("unable to initialize debugfs\n");
979 goto err_unregister_mac;
980 }
981
855aed12
SW
982 status = ath10k_spectral_create(ar);
983 if (status) {
984 ath10k_err("failed to initialize spectral\n");
985 goto err_debug_destroy;
986 }
987
6782cb69
MK
988 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
989 return;
5e3dd157 990
855aed12
SW
991err_debug_destroy:
992 ath10k_debug_destroy(ar);
5e3dd157
KV
993err_unregister_mac:
994 ath10k_mac_unregister(ar);
29385057
MK
995err_release_fw:
996 ath10k_core_free_firmware_files(ar);
6782cb69 997err:
a491a920
MK
998 /* TODO: It's probably a good idea to release device from the driver
999 * but calling device_release_driver() here will cause a deadlock.
1000 */
6782cb69
MK
1001 return;
1002}
1003
1004int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1005{
1006 int status;
1007
1008 ar->chip_id = chip_id;
1009
1010 status = ath10k_core_check_chip_id(ar);
1011 if (status) {
1012 ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
1013 return status;
1014 }
1015
1016 queue_work(ar->workqueue, &ar->register_work);
1017
1018 return 0;
5e3dd157
KV
1019}
1020EXPORT_SYMBOL(ath10k_core_register);
1021
1022void ath10k_core_unregister(struct ath10k *ar)
1023{
6782cb69
MK
1024 cancel_work_sync(&ar->register_work);
1025
1026 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1027 return;
1028
804eef14
SW
1029 /* Stop spectral before unregistering from mac80211 to remove the
1030 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1031 * would be already be free'd recursively, leading to a double free.
1032 */
1033 ath10k_spectral_destroy(ar);
1034
5e3dd157
KV
1035 /* We must unregister from mac80211 before we stop HTC and HIF.
1036 * Otherwise we will fail to submit commands to FW and mac80211 will be
1037 * unhappy about callback failures. */
1038 ath10k_mac_unregister(ar);
db66ea04 1039
29385057 1040 ath10k_core_free_firmware_files(ar);
6f1f56ea
BG
1041
1042 ath10k_debug_destroy(ar);
5e3dd157
KV
1043}
1044EXPORT_SYMBOL(ath10k_core_unregister);
1045
e7b54194 1046struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
0d0a6939
MK
1047 const struct ath10k_hif_ops *hif_ops)
1048{
1049 struct ath10k *ar;
1050
e7b54194 1051 ar = ath10k_mac_create(priv_size);
0d0a6939
MK
1052 if (!ar)
1053 return NULL;
1054
1055 ar->ath_common.priv = ar;
1056 ar->ath_common.hw = ar->hw;
1057
1058 ar->p2p = !!ath10k_p2p;
1059 ar->dev = dev;
1060
0d0a6939
MK
1061 ar->hif.ops = hif_ops;
1062
1063 init_completion(&ar->scan.started);
1064 init_completion(&ar->scan.completed);
1065 init_completion(&ar->scan.on_channel);
1066 init_completion(&ar->target_suspend);
1067
1068 init_completion(&ar->install_key_done);
1069 init_completion(&ar->vdev_setup_done);
1070
5c81c7fd 1071 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
0d0a6939
MK
1072
1073 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1074 if (!ar->workqueue)
1075 goto err_wq;
1076
1077 mutex_init(&ar->conf_mutex);
1078 spin_lock_init(&ar->data_lock);
1079
1080 INIT_LIST_HEAD(&ar->peers);
1081 init_waitqueue_head(&ar->peer_mapping_wq);
1082
1083 init_completion(&ar->offchan_tx_completed);
1084 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1085 skb_queue_head_init(&ar->offchan_tx_queue);
1086
1087 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1088 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1089
6782cb69 1090 INIT_WORK(&ar->register_work, ath10k_core_register_work);
0d0a6939
MK
1091 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1092
1093 return ar;
1094
1095err_wq:
1096 ath10k_mac_destroy(ar);
1097 return NULL;
1098}
1099EXPORT_SYMBOL(ath10k_core_create);
1100
1101void ath10k_core_destroy(struct ath10k *ar)
1102{
1103 flush_workqueue(ar->workqueue);
1104 destroy_workqueue(ar->workqueue);
1105
1106 ath10k_mac_destroy(ar);
1107}
1108EXPORT_SYMBOL(ath10k_core_destroy);
1109
5e3dd157
KV
1110MODULE_AUTHOR("Qualcomm Atheros");
1111MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1112MODULE_LICENSE("Dual BSD/GPL");