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ath10k: txrx: remove unreachable negative return check and fixup type
[mirror_ubuntu-eoan-kernel.git] / drivers / net / wireless / ath / ath10k / core.c
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1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
5aabff05 20#include <linux/of.h>
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21
22#include "core.h"
23#include "mac.h"
24#include "htc.h"
25#include "hif.h"
26#include "wmi.h"
27#include "bmi.h"
28#include "debug.h"
29#include "htt.h"
43d2a30f 30#include "testmode.h"
d7579d12 31#include "wmi-ops.h"
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32
33unsigned int ath10k_debug_mask;
34static bool uart_print;
8868b12c
RM
35static bool skip_otp;
36
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37module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
38module_param(uart_print, bool, 0644);
8868b12c
RM
39module_param(skip_otp, bool, 0644);
40
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41MODULE_PARM_DESC(debug_mask, "Debugging mask");
42MODULE_PARM_DESC(uart_print, "Uart target debugging");
8868b12c 43MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
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44
45static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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46 {
47 .id = QCA988X_HW_2_0_VERSION,
48 .name = "qca988x hw2.0",
49 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
3a8200b2 50 .uart_pin = 7,
587f7031 51 .has_shifted_cc_wraparound = true,
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52 .fw = {
53 .dir = QCA988X_HW_2_0_FW_DIR,
54 .fw = QCA988X_HW_2_0_FW_FILE,
55 .otp = QCA988X_HW_2_0_OTP_FILE,
56 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
9764a2af
MK
57 .board_size = QCA988X_BOARD_DATA_SZ,
58 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
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59 },
60 },
d63955b3
MK
61 {
62 .id = QCA6174_HW_2_1_VERSION,
63 .name = "qca6174 hw2.1",
64 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
65 .uart_pin = 6,
66 .fw = {
67 .dir = QCA6174_HW_2_1_FW_DIR,
68 .fw = QCA6174_HW_2_1_FW_FILE,
69 .otp = QCA6174_HW_2_1_OTP_FILE,
70 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
71 .board_size = QCA6174_BOARD_DATA_SZ,
72 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
73 },
74 },
75 {
76 .id = QCA6174_HW_3_0_VERSION,
77 .name = "qca6174 hw3.0",
78 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
79 .uart_pin = 6,
80 .fw = {
81 .dir = QCA6174_HW_3_0_FW_DIR,
82 .fw = QCA6174_HW_3_0_FW_FILE,
83 .otp = QCA6174_HW_3_0_OTP_FILE,
84 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
85 .board_size = QCA6174_BOARD_DATA_SZ,
86 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
87 },
88 },
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MK
89 {
90 .id = QCA6174_HW_3_2_VERSION,
91 .name = "qca6174 hw3.2",
92 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
93 .uart_pin = 6,
94 .fw = {
95 /* uses same binaries as hw3.0 */
96 .dir = QCA6174_HW_3_0_FW_DIR,
97 .fw = QCA6174_HW_3_0_FW_FILE,
98 .otp = QCA6174_HW_3_0_OTP_FILE,
99 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
100 .board_size = QCA6174_BOARD_DATA_SZ,
101 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
102 },
103 },
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104};
105
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106static const char *const ath10k_core_fw_feature_str[] = {
107 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
108 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
109 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
110 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
111 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
112 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
113 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
114 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
115 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
116 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
117};
118
119static unsigned int ath10k_core_get_fw_feature_str(char *buf,
120 size_t buf_len,
121 enum ath10k_fw_features feat)
122{
123 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
124 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
125 return scnprintf(buf, buf_len, "bit%d", feat);
126 }
127
128 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
129}
130
131void ath10k_core_get_fw_features_str(struct ath10k *ar,
132 char *buf,
133 size_t buf_len)
134{
135 unsigned int len = 0;
136 int i;
137
138 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
139 if (test_bit(i, ar->fw_features)) {
140 if (len > 0)
141 len += scnprintf(buf + len, buf_len - len, ",");
142
143 len += ath10k_core_get_fw_feature_str(buf + len,
144 buf_len - len,
145 i);
146 }
147 }
148}
149
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150static void ath10k_send_suspend_complete(struct ath10k *ar)
151{
7aa7a72a 152 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
5e3dd157 153
9042e17d 154 complete(&ar->target_suspend);
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155}
156
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157static int ath10k_init_configure_target(struct ath10k *ar)
158{
159 u32 param_host;
160 int ret;
161
162 /* tell target which HTC version it is used*/
163 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
164 HTC_PROTOCOL_VERSION);
165 if (ret) {
7aa7a72a 166 ath10k_err(ar, "settings HTC version failed\n");
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167 return ret;
168 }
169
170 /* set the firmware mode to STA/IBSS/AP */
171 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
172 if (ret) {
7aa7a72a 173 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
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174 return ret;
175 }
176
177 /* TODO following parameters need to be re-visited. */
178 /* num_device */
179 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
180 /* Firmware mode */
181 /* FIXME: Why FW_MODE_AP ??.*/
182 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
183 /* mac_addr_method */
184 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
185 /* firmware_bridge */
186 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
187 /* fwsubmode */
188 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
189
190 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
191 if (ret) {
7aa7a72a 192 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
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193 return ret;
194 }
195
196 /* We do all byte-swapping on the host */
197 ret = ath10k_bmi_write32(ar, hi_be, 0);
198 if (ret) {
7aa7a72a 199 ath10k_err(ar, "setting host CPU BE mode failed\n");
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200 return ret;
201 }
202
203 /* FW descriptor/Data swap flags */
204 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
205
206 if (ret) {
7aa7a72a 207 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
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208 return ret;
209 }
210
211 return 0;
212}
213
214static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
215 const char *dir,
216 const char *file)
217{
218 char filename[100];
219 const struct firmware *fw;
220 int ret;
221
222 if (file == NULL)
223 return ERR_PTR(-ENOENT);
224
225 if (dir == NULL)
226 dir = ".";
227
228 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
229 ret = request_firmware(&fw, filename, ar->dev);
230 if (ret)
231 return ERR_PTR(ret);
232
233 return fw;
234}
235
a58227ef
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236static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
237 size_t data_len)
5e3dd157 238{
9764a2af
MK
239 u32 board_data_size = ar->hw_params.fw.board_size;
240 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
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241 u32 board_ext_data_addr;
242 int ret;
243
244 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
245 if (ret) {
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246 ath10k_err(ar, "could not read board ext data addr (%d)\n",
247 ret);
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248 return ret;
249 }
250
7aa7a72a 251 ath10k_dbg(ar, ATH10K_DBG_BOOT,
effea968 252 "boot push board extended data addr 0x%x\n",
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253 board_ext_data_addr);
254
255 if (board_ext_data_addr == 0)
256 return 0;
257
a58227ef 258 if (data_len != (board_data_size + board_ext_data_size)) {
7aa7a72a 259 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
a58227ef 260 data_len, board_data_size, board_ext_data_size);
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261 return -EINVAL;
262 }
263
264 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
a58227ef 265 data + board_data_size,
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266 board_ext_data_size);
267 if (ret) {
7aa7a72a 268 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
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269 return ret;
270 }
271
272 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
273 (board_ext_data_size << 16) | 1);
274 if (ret) {
7aa7a72a
MK
275 ath10k_err(ar, "could not write board ext data bit (%d)\n",
276 ret);
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277 return ret;
278 }
279
280 return 0;
281}
282
a58227ef
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283static int ath10k_download_board_data(struct ath10k *ar, const void *data,
284 size_t data_len)
5e3dd157 285{
9764a2af 286 u32 board_data_size = ar->hw_params.fw.board_size;
5e3dd157 287 u32 address;
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288 int ret;
289
a58227ef 290 ret = ath10k_push_board_ext_data(ar, data, data_len);
5e3dd157 291 if (ret) {
7aa7a72a 292 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
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293 goto exit;
294 }
295
296 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
297 if (ret) {
7aa7a72a 298 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
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299 goto exit;
300 }
301
a58227ef 302 ret = ath10k_bmi_write_memory(ar, address, data,
958df3a0 303 min_t(u32, board_data_size,
a58227ef 304 data_len));
5e3dd157 305 if (ret) {
7aa7a72a 306 ath10k_err(ar, "could not write board data (%d)\n", ret);
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307 goto exit;
308 }
309
310 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
311 if (ret) {
7aa7a72a 312 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
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313 goto exit;
314 }
315
316exit:
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317 return ret;
318}
319
a58227ef
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320static int ath10k_download_cal_file(struct ath10k *ar)
321{
322 int ret;
323
324 if (!ar->cal_file)
325 return -ENOENT;
326
327 if (IS_ERR(ar->cal_file))
328 return PTR_ERR(ar->cal_file);
329
330 ret = ath10k_download_board_data(ar, ar->cal_file->data,
331 ar->cal_file->size);
332 if (ret) {
333 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
334 return ret;
335 }
336
337 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
338
339 return 0;
340}
341
5aabff05
TK
342static int ath10k_download_cal_dt(struct ath10k *ar)
343{
344 struct device_node *node;
345 int data_len;
346 void *data;
347 int ret;
348
349 node = ar->dev->of_node;
350 if (!node)
351 /* Device Tree is optional, don't print any warnings if
352 * there's no node for ath10k.
353 */
354 return -ENOENT;
355
356 if (!of_get_property(node, "qcom,ath10k-calibration-data",
357 &data_len)) {
358 /* The calibration data node is optional */
359 return -ENOENT;
360 }
361
362 if (data_len != QCA988X_CAL_DATA_LEN) {
363 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
364 data_len);
365 ret = -EMSGSIZE;
366 goto out;
367 }
368
369 data = kmalloc(data_len, GFP_KERNEL);
370 if (!data) {
371 ret = -ENOMEM;
372 goto out;
373 }
374
375 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
376 data, data_len);
377 if (ret) {
378 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
379 ret);
380 goto out_free;
381 }
382
383 ret = ath10k_download_board_data(ar, data, data_len);
384 if (ret) {
385 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
386 ret);
387 goto out_free;
388 }
389
390 ret = 0;
391
392out_free:
393 kfree(data);
394
395out:
396 return ret;
397}
398
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399static int ath10k_download_and_run_otp(struct ath10k *ar)
400{
d6d4a58d 401 u32 result, address = ar->hw_params.patch_load_addr;
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402 int ret;
403
a58227ef 404 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
83091559
KV
405 if (ret) {
406 ath10k_err(ar, "failed to download board data: %d\n", ret);
407 return ret;
408 }
409
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410 /* OTP is optional */
411
7f06ea1e 412 if (!ar->otp_data || !ar->otp_len) {
7aa7a72a 413 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
36a8f413 414 ar->otp_data, ar->otp_len);
5e3dd157 415 return 0;
7f06ea1e
KV
416 }
417
7aa7a72a 418 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
7f06ea1e 419 address, ar->otp_len);
5e3dd157 420
958df3a0 421 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
5e3dd157 422 if (ret) {
7aa7a72a 423 ath10k_err(ar, "could not write otp (%d)\n", ret);
7f06ea1e 424 return ret;
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425 }
426
d6d4a58d 427 ret = ath10k_bmi_execute(ar, address, 0, &result);
5e3dd157 428 if (ret) {
7aa7a72a 429 ath10k_err(ar, "could not execute otp (%d)\n", ret);
7f06ea1e 430 return ret;
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431 }
432
7aa7a72a 433 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
7f06ea1e 434
d9153546
KV
435 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
436 ar->fw_features))
437 && result != 0) {
7aa7a72a 438 ath10k_err(ar, "otp calibration failed: %d", result);
7f06ea1e
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439 return -EINVAL;
440 }
441
442 return 0;
5e3dd157
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443}
444
43d2a30f 445static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
5e3dd157 446{
43d2a30f
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447 u32 address, data_len;
448 const char *mode_name;
449 const void *data;
5e3dd157
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450 int ret;
451
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452 address = ar->hw_params.patch_load_addr;
453
43d2a30f
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454 switch (mode) {
455 case ATH10K_FIRMWARE_MODE_NORMAL:
456 data = ar->firmware_data;
457 data_len = ar->firmware_len;
458 mode_name = "normal";
459 break;
460 case ATH10K_FIRMWARE_MODE_UTF:
461 data = ar->testmode.utf->data;
462 data_len = ar->testmode.utf->size;
463 mode_name = "utf";
464 break;
465 default:
466 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
467 return -EINVAL;
468 }
469
470 ath10k_dbg(ar, ATH10K_DBG_BOOT,
471 "boot uploading firmware image %p len %d mode %s\n",
472 data, data_len, mode_name);
473
474 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
5e3dd157 475 if (ret) {
43d2a30f
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476 ath10k_err(ar, "failed to download %s firmware: %d\n",
477 mode_name, ret);
478 return ret;
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479 }
480
29385057
MK
481 return ret;
482}
483
484static void ath10k_core_free_firmware_files(struct ath10k *ar)
485{
db2cf865 486 if (!IS_ERR(ar->board))
36527916 487 release_firmware(ar->board);
29385057 488
db2cf865 489 if (!IS_ERR(ar->otp))
29385057
MK
490 release_firmware(ar->otp);
491
db2cf865 492 if (!IS_ERR(ar->firmware))
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493 release_firmware(ar->firmware);
494
db2cf865 495 if (!IS_ERR(ar->cal_file))
a58227ef
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496 release_firmware(ar->cal_file);
497
36527916 498 ar->board = NULL;
958df3a0
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499 ar->board_data = NULL;
500 ar->board_len = 0;
501
29385057 502 ar->otp = NULL;
958df3a0
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503 ar->otp_data = NULL;
504 ar->otp_len = 0;
505
29385057 506 ar->firmware = NULL;
958df3a0
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507 ar->firmware_data = NULL;
508 ar->firmware_len = 0;
a58227ef
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509
510 ar->cal_file = NULL;
511}
512
513static int ath10k_fetch_cal_file(struct ath10k *ar)
514{
515 char filename[100];
516
517 /* cal-<bus>-<id>.bin */
518 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
519 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
520
521 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
522 if (IS_ERR(ar->cal_file))
523 /* calibration file is optional, don't print any warnings */
524 return PTR_ERR(ar->cal_file);
525
526 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
527 ATH10K_FW_DIR, filename);
528
529 return 0;
29385057
MK
530}
531
de57e2c8 532static int ath10k_core_fetch_spec_board_file(struct ath10k *ar)
29385057 533{
de57e2c8
MK
534 char filename[100];
535
536 scnprintf(filename, sizeof(filename), "board-%s-%s.bin",
537 ath10k_bus_str(ar->hif.bus), ar->spec_board_id);
538
539 ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename);
540 if (IS_ERR(ar->board))
541 return PTR_ERR(ar->board);
542
543 ar->board_data = ar->board->data;
544 ar->board_len = ar->board->size;
545 ar->spec_board_loaded = true;
29385057 546
de57e2c8
MK
547 return 0;
548}
549
550static int ath10k_core_fetch_generic_board_file(struct ath10k *ar)
551{
d0ed74f3
MK
552 if (!ar->hw_params.fw.board) {
553 ath10k_err(ar, "failed to find board file fw entry\n");
29385057
MK
554 return -EINVAL;
555 }
556
36527916
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557 ar->board = ath10k_fetch_fw_file(ar,
558 ar->hw_params.fw.dir,
559 ar->hw_params.fw.board);
de57e2c8
MK
560 if (IS_ERR(ar->board))
561 return PTR_ERR(ar->board);
29385057 562
958df3a0
KV
563 ar->board_data = ar->board->data;
564 ar->board_len = ar->board->size;
de57e2c8
MK
565 ar->spec_board_loaded = false;
566
567 return 0;
568}
569
570static int ath10k_core_fetch_board_file(struct ath10k *ar)
571{
572 int ret;
573
574 if (strlen(ar->spec_board_id) > 0) {
575 ret = ath10k_core_fetch_spec_board_file(ar);
576 if (ret) {
577 ath10k_info(ar, "failed to load spec board file, falling back to generic: %d\n",
578 ret);
579 goto generic;
580 }
581
582 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found specific board file for %s\n",
583 ar->spec_board_id);
584 return 0;
585 }
586
587generic:
588 ret = ath10k_core_fetch_generic_board_file(ar);
589 if (ret) {
590 ath10k_err(ar, "failed to fetch generic board data: %d\n", ret);
591 return ret;
592 }
958df3a0 593
d0ed74f3
MK
594 return 0;
595}
596
597static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
598{
599 int ret = 0;
600
601 if (ar->hw_params.fw.fw == NULL) {
602 ath10k_err(ar, "firmware file not defined\n");
603 return -EINVAL;
604 }
605
29385057
MK
606 ar->firmware = ath10k_fetch_fw_file(ar,
607 ar->hw_params.fw.dir,
608 ar->hw_params.fw.fw);
609 if (IS_ERR(ar->firmware)) {
610 ret = PTR_ERR(ar->firmware);
7aa7a72a 611 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
29385057
MK
612 goto err;
613 }
614
958df3a0
KV
615 ar->firmware_data = ar->firmware->data;
616 ar->firmware_len = ar->firmware->size;
617
29385057
MK
618 /* OTP may be undefined. If so, don't fetch it at all */
619 if (ar->hw_params.fw.otp == NULL)
620 return 0;
621
622 ar->otp = ath10k_fetch_fw_file(ar,
623 ar->hw_params.fw.dir,
624 ar->hw_params.fw.otp);
625 if (IS_ERR(ar->otp)) {
626 ret = PTR_ERR(ar->otp);
7aa7a72a 627 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
29385057
MK
628 goto err;
629 }
630
958df3a0
KV
631 ar->otp_data = ar->otp->data;
632 ar->otp_len = ar->otp->size;
633
29385057
MK
634 return 0;
635
636err:
637 ath10k_core_free_firmware_files(ar);
5e3dd157
KV
638 return ret;
639}
640
1a222435
KV
641static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
642{
643 size_t magic_len, len, ie_len;
644 int ie_id, i, index, bit, ret;
645 struct ath10k_fw_ie *hdr;
646 const u8 *data;
202e86e6 647 __le32 *timestamp, *version;
1a222435
KV
648
649 /* first fetch the firmware file (firmware-*.bin) */
650 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
651 if (IS_ERR(ar->firmware)) {
7aa7a72a 652 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
53c02284 653 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
1a222435
KV
654 return PTR_ERR(ar->firmware);
655 }
656
657 data = ar->firmware->data;
658 len = ar->firmware->size;
659
660 /* magic also includes the null byte, check that as well */
661 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
662
663 if (len < magic_len) {
7aa7a72a 664 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
53c02284 665 ar->hw_params.fw.dir, name, len);
9bab1cc0
MK
666 ret = -EINVAL;
667 goto err;
1a222435
KV
668 }
669
670 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
7aa7a72a 671 ath10k_err(ar, "invalid firmware magic\n");
9bab1cc0
MK
672 ret = -EINVAL;
673 goto err;
1a222435
KV
674 }
675
676 /* jump over the padding */
677 magic_len = ALIGN(magic_len, 4);
678
679 len -= magic_len;
680 data += magic_len;
681
682 /* loop elements */
683 while (len > sizeof(struct ath10k_fw_ie)) {
684 hdr = (struct ath10k_fw_ie *)data;
685
686 ie_id = le32_to_cpu(hdr->id);
687 ie_len = le32_to_cpu(hdr->len);
688
689 len -= sizeof(*hdr);
690 data += sizeof(*hdr);
691
692 if (len < ie_len) {
7aa7a72a 693 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1a222435 694 ie_id, len, ie_len);
9bab1cc0
MK
695 ret = -EINVAL;
696 goto err;
1a222435
KV
697 }
698
699 switch (ie_id) {
700 case ATH10K_FW_IE_FW_VERSION:
701 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
702 break;
703
704 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
705 ar->hw->wiphy->fw_version[ie_len] = '\0';
706
7aa7a72a 707 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
708 "found fw version %s\n",
709 ar->hw->wiphy->fw_version);
710 break;
711 case ATH10K_FW_IE_TIMESTAMP:
712 if (ie_len != sizeof(u32))
713 break;
714
715 timestamp = (__le32 *)data;
716
7aa7a72a 717 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1a222435
KV
718 le32_to_cpup(timestamp));
719 break;
720 case ATH10K_FW_IE_FEATURES:
7aa7a72a 721 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
722 "found firmware features ie (%zd B)\n",
723 ie_len);
724
725 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
726 index = i / 8;
727 bit = i % 8;
728
729 if (index == ie_len)
730 break;
731
f591a1a5 732 if (data[index] & (1 << bit)) {
7aa7a72a 733 ath10k_dbg(ar, ATH10K_DBG_BOOT,
f591a1a5
BG
734 "Enabling feature bit: %i\n",
735 i);
1a222435 736 __set_bit(i, ar->fw_features);
f591a1a5 737 }
1a222435
KV
738 }
739
7aa7a72a 740 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1a222435
KV
741 ar->fw_features,
742 sizeof(ar->fw_features));
743 break;
744 case ATH10K_FW_IE_FW_IMAGE:
7aa7a72a 745 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
746 "found fw image ie (%zd B)\n",
747 ie_len);
748
749 ar->firmware_data = data;
750 ar->firmware_len = ie_len;
751
752 break;
753 case ATH10K_FW_IE_OTP_IMAGE:
7aa7a72a 754 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
755 "found otp image ie (%zd B)\n",
756 ie_len);
757
758 ar->otp_data = data;
759 ar->otp_len = ie_len;
760
761 break;
202e86e6
KV
762 case ATH10K_FW_IE_WMI_OP_VERSION:
763 if (ie_len != sizeof(u32))
764 break;
765
766 version = (__le32 *)data;
767
768 ar->wmi.op_version = le32_to_cpup(version);
769
770 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
771 ar->wmi.op_version);
772 break;
8348db29
RM
773 case ATH10K_FW_IE_HTT_OP_VERSION:
774 if (ie_len != sizeof(u32))
775 break;
776
777 version = (__le32 *)data;
778
779 ar->htt.op_version = le32_to_cpup(version);
780
781 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
782 ar->htt.op_version);
783 break;
1a222435 784 default:
7aa7a72a 785 ath10k_warn(ar, "Unknown FW IE: %u\n",
1a222435
KV
786 le32_to_cpu(hdr->id));
787 break;
788 }
789
790 /* jump over the padding */
791 ie_len = ALIGN(ie_len, 4);
792
793 len -= ie_len;
794 data += ie_len;
e05634ee 795 }
1a222435
KV
796
797 if (!ar->firmware_data || !ar->firmware_len) {
7aa7a72a 798 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
53c02284 799 ar->hw_params.fw.dir, name);
1a222435
KV
800 ret = -ENOMEDIUM;
801 goto err;
802 }
803
1a222435
KV
804 return 0;
805
806err:
807 ath10k_core_free_firmware_files(ar);
808 return ret;
809}
810
811static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
812{
813 int ret;
814
a58227ef
KV
815 /* calibration file is optional, don't check for any errors */
816 ath10k_fetch_cal_file(ar);
817
d0ed74f3
MK
818 ret = ath10k_core_fetch_board_file(ar);
819 if (ret) {
820 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
821 return ret;
822 }
823
53513c30
KV
824 ar->fw_api = 5;
825 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
826
827 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE);
828 if (ret == 0)
829 goto success;
830
4a16fbec
RM
831 ar->fw_api = 4;
832 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
833
834 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
835 if (ret == 0)
836 goto success;
837
24c88f78 838 ar->fw_api = 3;
7aa7a72a 839 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
24c88f78
MK
840
841 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
842 if (ret == 0)
843 goto success;
844
53c02284 845 ar->fw_api = 2;
7aa7a72a 846 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
53c02284 847
1a222435 848 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
53c02284
BG
849 if (ret == 0)
850 goto success;
851
852 ar->fw_api = 1;
7aa7a72a 853 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1a222435
KV
854
855 ret = ath10k_core_fetch_firmware_api_1(ar);
856 if (ret)
857 return ret;
858
53c02284 859success:
7aa7a72a 860 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1a222435
KV
861
862 return 0;
863}
864
83091559 865static int ath10k_download_cal_data(struct ath10k *ar)
5e3dd157
KV
866{
867 int ret;
868
a58227ef
KV
869 ret = ath10k_download_cal_file(ar);
870 if (ret == 0) {
871 ar->cal_mode = ATH10K_CAL_MODE_FILE;
872 goto done;
873 }
874
875 ath10k_dbg(ar, ATH10K_DBG_BOOT,
5aabff05
TK
876 "boot did not find a calibration file, try DT next: %d\n",
877 ret);
878
879 ret = ath10k_download_cal_dt(ar);
880 if (ret == 0) {
881 ar->cal_mode = ATH10K_CAL_MODE_DT;
882 goto done;
883 }
884
885 ath10k_dbg(ar, ATH10K_DBG_BOOT,
886 "boot did not find DT entry, try OTP next: %d\n",
a58227ef
KV
887 ret);
888
5e3dd157 889 ret = ath10k_download_and_run_otp(ar);
36a8f413 890 if (ret) {
7aa7a72a 891 ath10k_err(ar, "failed to run otp: %d\n", ret);
5e3dd157 892 return ret;
36a8f413 893 }
5e3dd157 894
a58227ef
KV
895 ar->cal_mode = ATH10K_CAL_MODE_OTP;
896
897done:
898 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
899 ath10k_cal_mode_str(ar->cal_mode));
900 return 0;
5e3dd157
KV
901}
902
903static int ath10k_init_uart(struct ath10k *ar)
904{
905 int ret;
906
907 /*
908 * Explicitly setting UART prints to zero as target turns it on
909 * based on scratch registers.
910 */
911 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
912 if (ret) {
7aa7a72a 913 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
5e3dd157
KV
914 return ret;
915 }
916
c8c39afe 917 if (!uart_print)
5e3dd157 918 return 0;
5e3dd157 919
3a8200b2 920 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
5e3dd157 921 if (ret) {
7aa7a72a 922 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
5e3dd157
KV
923 return ret;
924 }
925
926 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
927 if (ret) {
7aa7a72a 928 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
5e3dd157
KV
929 return ret;
930 }
931
03fc137b
BM
932 /* Set the UART baud rate to 19200. */
933 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
934 if (ret) {
7aa7a72a 935 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
03fc137b
BM
936 return ret;
937 }
938
7aa7a72a 939 ath10k_info(ar, "UART prints enabled\n");
5e3dd157
KV
940 return 0;
941}
942
943static int ath10k_init_hw_params(struct ath10k *ar)
944{
945 const struct ath10k_hw_params *uninitialized_var(hw_params);
946 int i;
947
948 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
949 hw_params = &ath10k_hw_params_list[i];
950
951 if (hw_params->id == ar->target_version)
952 break;
953 }
954
955 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
7aa7a72a 956 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
5e3dd157
KV
957 ar->target_version);
958 return -EINVAL;
959 }
960
961 ar->hw_params = *hw_params;
962
7aa7a72a 963 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
c8c39afe 964 ar->hw_params.name, ar->target_version);
5e3dd157
KV
965
966 return 0;
967}
968
affd3217
MK
969static void ath10k_core_restart(struct work_struct *work)
970{
971 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
972
7962b0d8
MK
973 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
974
975 /* Place a barrier to make sure the compiler doesn't reorder
976 * CRASH_FLUSH and calling other functions.
977 */
978 barrier();
979
980 ieee80211_stop_queues(ar->hw);
981 ath10k_drain_tx(ar);
982 complete_all(&ar->scan.started);
983 complete_all(&ar->scan.completed);
984 complete_all(&ar->scan.on_channel);
985 complete_all(&ar->offchan_tx_completed);
986 complete_all(&ar->install_key_done);
987 complete_all(&ar->vdev_setup_done);
ac2953fc 988 complete_all(&ar->thermal.wmi_sync);
7962b0d8
MK
989 wake_up(&ar->htt.empty_tx_wq);
990 wake_up(&ar->wmi.tx_credits_wq);
991 wake_up(&ar->peer_mapping_wq);
992
affd3217
MK
993 mutex_lock(&ar->conf_mutex);
994
995 switch (ar->state) {
996 case ATH10K_STATE_ON:
affd3217 997 ar->state = ATH10K_STATE_RESTARTING;
61e9aab7 998 ath10k_hif_stop(ar);
5c81c7fd 999 ath10k_scan_finish(ar);
affd3217
MK
1000 ieee80211_restart_hw(ar->hw);
1001 break;
1002 case ATH10K_STATE_OFF:
5e90de86
MK
1003 /* this can happen if driver is being unloaded
1004 * or if the crash happens during FW probing */
7aa7a72a 1005 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
affd3217
MK
1006 break;
1007 case ATH10K_STATE_RESTARTING:
c5058f5b
MK
1008 /* hw restart might be requested from multiple places */
1009 break;
affd3217
MK
1010 case ATH10K_STATE_RESTARTED:
1011 ar->state = ATH10K_STATE_WEDGED;
1012 /* fall through */
1013 case ATH10K_STATE_WEDGED:
7aa7a72a 1014 ath10k_warn(ar, "device is wedged, will not restart\n");
affd3217 1015 break;
43d2a30f
KV
1016 case ATH10K_STATE_UTF:
1017 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1018 break;
affd3217
MK
1019 }
1020
1021 mutex_unlock(&ar->conf_mutex);
1022}
1023
5f2144d9 1024static int ath10k_core_init_firmware_features(struct ath10k *ar)
cfd1061e 1025{
5f2144d9
KV
1026 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
1027 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1028 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1029 return -EINVAL;
1030 }
1031
202e86e6
KV
1032 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1033 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1034 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
1035 return -EINVAL;
1036 }
1037
1038 /* Backwards compatibility for firmwares without
1039 * ATH10K_FW_IE_WMI_OP_VERSION.
1040 */
1041 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1042 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4a16fbec
RM
1043 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1044 ar->fw_features))
202e86e6
KV
1045 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1046 else
1047 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1048 } else {
1049 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1050 }
1051 }
1052
1053 switch (ar->wmi.op_version) {
1054 case ATH10K_FW_WMI_OP_VERSION_MAIN:
cfd1061e
MK
1055 ar->max_num_peers = TARGET_NUM_PEERS;
1056 ar->max_num_stations = TARGET_NUM_STATIONS;
30c78167 1057 ar->max_num_vdevs = TARGET_NUM_VDEVS;
91ad5f56 1058 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
6274cd41
YL
1059 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1060 WMI_STAT_PEER;
202e86e6
KV
1061 break;
1062 case ATH10K_FW_WMI_OP_VERSION_10_1:
1063 case ATH10K_FW_WMI_OP_VERSION_10_2:
4a16fbec 1064 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
202e86e6
KV
1065 ar->max_num_peers = TARGET_10X_NUM_PEERS;
1066 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
30c78167 1067 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
91ad5f56 1068 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
6274cd41 1069 ar->fw_stats_req_mask = WMI_STAT_PEER;
202e86e6 1070 break;
ca996ec5
MK
1071 case ATH10K_FW_WMI_OP_VERSION_TLV:
1072 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1073 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
49274332 1074 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
8cca3d60 1075 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
ca996ec5 1076 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
25c86619 1077 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
6274cd41
YL
1078 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1079 WMI_STAT_PEER;
ca996ec5 1080 break;
202e86e6
KV
1081 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1082 case ATH10K_FW_WMI_OP_VERSION_MAX:
1083 WARN_ON(1);
1084 return -EINVAL;
cfd1061e 1085 }
5f2144d9 1086
dc3632a1
KV
1087 /* Backwards compatibility for firmwares without
1088 * ATH10K_FW_IE_HTT_OP_VERSION.
1089 */
1090 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1091 switch (ar->wmi.op_version) {
1092 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1093 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1094 break;
1095 case ATH10K_FW_WMI_OP_VERSION_10_1:
1096 case ATH10K_FW_WMI_OP_VERSION_10_2:
1097 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1098 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1099 break;
1100 case ATH10K_FW_WMI_OP_VERSION_TLV:
1101 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1102 break;
1103 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1104 case ATH10K_FW_WMI_OP_VERSION_MAX:
1105 WARN_ON(1);
1106 return -EINVAL;
1107 }
1108 }
1109
5f2144d9 1110 return 0;
cfd1061e
MK
1111}
1112
43d2a30f 1113int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
5e3dd157 1114{
5e3dd157
KV
1115 int status;
1116
60631c5c
KV
1117 lockdep_assert_held(&ar->conf_mutex);
1118
7962b0d8
MK
1119 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1120
64d151d4
MK
1121 ath10k_bmi_start(ar);
1122
5e3dd157
KV
1123 if (ath10k_init_configure_target(ar)) {
1124 status = -EINVAL;
1125 goto err;
1126 }
1127
83091559
KV
1128 status = ath10k_download_cal_data(ar);
1129 if (status)
1130 goto err;
1131
163f5264
RM
1132 /* Some of of qca988x solutions are having global reset issue
1133 * during target initialization. Bypassing PLL setting before
1134 * downloading firmware and letting the SoC run on REF_CLK is
1135 * fixing the problem. Corresponding firmware change is also needed
1136 * to set the clock source once the target is initialized.
1137 */
1138 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1139 ar->fw_features)) {
1140 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1141 if (status) {
1142 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1143 status);
1144 goto err;
1145 }
1146 }
1147
83091559 1148 status = ath10k_download_fw(ar, mode);
5e3dd157
KV
1149 if (status)
1150 goto err;
1151
1152 status = ath10k_init_uart(ar);
1153 if (status)
1154 goto err;
1155
cd003fad
MK
1156 ar->htc.htc_ops.target_send_suspend_complete =
1157 ath10k_send_suspend_complete;
5e3dd157 1158
cd003fad
MK
1159 status = ath10k_htc_init(ar);
1160 if (status) {
7aa7a72a 1161 ath10k_err(ar, "could not init HTC (%d)\n", status);
5e3dd157
KV
1162 goto err;
1163 }
1164
1165 status = ath10k_bmi_done(ar);
1166 if (status)
cd003fad 1167 goto err;
5e3dd157
KV
1168
1169 status = ath10k_wmi_attach(ar);
1170 if (status) {
7aa7a72a 1171 ath10k_err(ar, "WMI attach failed: %d\n", status);
cd003fad 1172 goto err;
5e3dd157
KV
1173 }
1174
95bf21f9
MK
1175 status = ath10k_htt_init(ar);
1176 if (status) {
7aa7a72a 1177 ath10k_err(ar, "failed to init htt: %d\n", status);
95bf21f9
MK
1178 goto err_wmi_detach;
1179 }
1180
1181 status = ath10k_htt_tx_alloc(&ar->htt);
1182 if (status) {
7aa7a72a 1183 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
95bf21f9
MK
1184 goto err_wmi_detach;
1185 }
1186
1187 status = ath10k_htt_rx_alloc(&ar->htt);
1188 if (status) {
7aa7a72a 1189 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
95bf21f9
MK
1190 goto err_htt_tx_detach;
1191 }
1192
67e3c63f
MK
1193 status = ath10k_hif_start(ar);
1194 if (status) {
7aa7a72a 1195 ath10k_err(ar, "could not start HIF: %d\n", status);
95bf21f9 1196 goto err_htt_rx_detach;
67e3c63f
MK
1197 }
1198
1199 status = ath10k_htc_wait_target(&ar->htc);
1200 if (status) {
7aa7a72a 1201 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
67e3c63f
MK
1202 goto err_hif_stop;
1203 }
5e3dd157 1204
43d2a30f
KV
1205 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1206 status = ath10k_htt_connect(&ar->htt);
1207 if (status) {
1208 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1209 goto err_hif_stop;
1210 }
5e3dd157
KV
1211 }
1212
95bf21f9
MK
1213 status = ath10k_wmi_connect(ar);
1214 if (status) {
7aa7a72a 1215 ath10k_err(ar, "could not connect wmi: %d\n", status);
95bf21f9
MK
1216 goto err_hif_stop;
1217 }
1218
1219 status = ath10k_htc_start(&ar->htc);
1220 if (status) {
7aa7a72a 1221 ath10k_err(ar, "failed to start htc: %d\n", status);
95bf21f9
MK
1222 goto err_hif_stop;
1223 }
1224
43d2a30f
KV
1225 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1226 status = ath10k_wmi_wait_for_service_ready(ar);
9eea5689 1227 if (status) {
43d2a30f 1228 ath10k_warn(ar, "wmi service ready event not received");
43d2a30f
KV
1229 goto err_hif_stop;
1230 }
95bf21f9 1231 }
5e3dd157 1232
7aa7a72a 1233 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
c8c39afe 1234 ar->hw->wiphy->fw_version);
5e3dd157 1235
5e3dd157
KV
1236 status = ath10k_wmi_cmd_init(ar);
1237 if (status) {
7aa7a72a
MK
1238 ath10k_err(ar, "could not send WMI init command (%d)\n",
1239 status);
b7967dc7 1240 goto err_hif_stop;
5e3dd157
KV
1241 }
1242
1243 status = ath10k_wmi_wait_for_unified_ready(ar);
9eea5689 1244 if (status) {
7aa7a72a 1245 ath10k_err(ar, "wmi unified ready event not received\n");
b7967dc7 1246 goto err_hif_stop;
5e3dd157
KV
1247 }
1248
c545070e
MK
1249 /* If firmware indicates Full Rx Reorder support it must be used in a
1250 * slightly different manner. Let HTT code know.
1251 */
1252 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1253 ar->wmi.svc_map));
1254
1255 status = ath10k_htt_rx_ring_refill(ar);
1256 if (status) {
1257 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1258 goto err_hif_stop;
1259 }
1260
43d2a30f
KV
1261 /* we don't care about HTT in UTF mode */
1262 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1263 status = ath10k_htt_setup(&ar->htt);
1264 if (status) {
1265 ath10k_err(ar, "failed to setup htt: %d\n", status);
1266 goto err_hif_stop;
1267 }
95bf21f9 1268 }
5e3dd157 1269
db66ea04
KV
1270 status = ath10k_debug_start(ar);
1271 if (status)
b7967dc7 1272 goto err_hif_stop;
db66ea04 1273
30c78167 1274 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
dfa413de 1275
0579119f 1276 INIT_LIST_HEAD(&ar->arvifs);
1a1b8a88 1277
dd30a36e
MK
1278 return 0;
1279
67e3c63f
MK
1280err_hif_stop:
1281 ath10k_hif_stop(ar);
95bf21f9
MK
1282err_htt_rx_detach:
1283 ath10k_htt_rx_free(&ar->htt);
1284err_htt_tx_detach:
1285 ath10k_htt_tx_free(&ar->htt);
dd30a36e
MK
1286err_wmi_detach:
1287 ath10k_wmi_detach(ar);
1288err:
1289 return status;
1290}
818bdd16 1291EXPORT_SYMBOL(ath10k_core_start);
dd30a36e 1292
00f5482b
MP
1293int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1294{
1295 int ret;
a7a42849 1296 unsigned long time_left;
00f5482b
MP
1297
1298 reinit_completion(&ar->target_suspend);
1299
1300 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1301 if (ret) {
7aa7a72a 1302 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
00f5482b
MP
1303 return ret;
1304 }
1305
a7a42849 1306 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
00f5482b 1307
a7a42849 1308 if (!time_left) {
7aa7a72a 1309 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
00f5482b
MP
1310 return -ETIMEDOUT;
1311 }
1312
1313 return 0;
1314}
1315
dd30a36e
MK
1316void ath10k_core_stop(struct ath10k *ar)
1317{
60631c5c
KV
1318 lockdep_assert_held(&ar->conf_mutex);
1319
00f5482b 1320 /* try to suspend target */
43d2a30f
KV
1321 if (ar->state != ATH10K_STATE_RESTARTING &&
1322 ar->state != ATH10K_STATE_UTF)
216a1836
MK
1323 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1324
db66ea04 1325 ath10k_debug_stop(ar);
95bf21f9
MK
1326 ath10k_hif_stop(ar);
1327 ath10k_htt_tx_free(&ar->htt);
1328 ath10k_htt_rx_free(&ar->htt);
dd30a36e
MK
1329 ath10k_wmi_detach(ar);
1330}
818bdd16
MK
1331EXPORT_SYMBOL(ath10k_core_stop);
1332
1333/* mac80211 manages fw/hw initialization through start/stop hooks. However in
1334 * order to know what hw capabilities should be advertised to mac80211 it is
1335 * necessary to load the firmware (and tear it down immediately since start
1336 * hook will try to init it again) before registering */
1337static int ath10k_core_probe_fw(struct ath10k *ar)
1338{
29385057
MK
1339 struct bmi_target_info target_info;
1340 int ret = 0;
818bdd16
MK
1341
1342 ret = ath10k_hif_power_up(ar);
1343 if (ret) {
7aa7a72a 1344 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
818bdd16
MK
1345 return ret;
1346 }
1347
29385057
MK
1348 memset(&target_info, 0, sizeof(target_info));
1349 ret = ath10k_bmi_get_target_info(ar, &target_info);
1350 if (ret) {
7aa7a72a 1351 ath10k_err(ar, "could not get target info (%d)\n", ret);
c6ce492d 1352 goto err_power_down;
29385057
MK
1353 }
1354
1355 ar->target_version = target_info.version;
1356 ar->hw->wiphy->hw_version = target_info.version;
1357
1358 ret = ath10k_init_hw_params(ar);
1359 if (ret) {
7aa7a72a 1360 ath10k_err(ar, "could not get hw params (%d)\n", ret);
c6ce492d 1361 goto err_power_down;
29385057
MK
1362 }
1363
1364 ret = ath10k_core_fetch_firmware_files(ar);
1365 if (ret) {
7aa7a72a 1366 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
c6ce492d 1367 goto err_power_down;
29385057
MK
1368 }
1369
5f2144d9
KV
1370 ret = ath10k_core_init_firmware_features(ar);
1371 if (ret) {
1372 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1373 ret);
1374 goto err_free_firmware_files;
1375 }
cfd1061e 1376
60631c5c
KV
1377 mutex_lock(&ar->conf_mutex);
1378
43d2a30f 1379 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
818bdd16 1380 if (ret) {
7aa7a72a 1381 ath10k_err(ar, "could not init core (%d)\n", ret);
c6ce492d 1382 goto err_unlock;
818bdd16
MK
1383 }
1384
8079de0d 1385 ath10k_print_driver_info(ar);
818bdd16 1386 ath10k_core_stop(ar);
60631c5c
KV
1387
1388 mutex_unlock(&ar->conf_mutex);
1389
818bdd16
MK
1390 ath10k_hif_power_down(ar);
1391 return 0;
c6ce492d
KV
1392
1393err_unlock:
1394 mutex_unlock(&ar->conf_mutex);
1395
5f2144d9 1396err_free_firmware_files:
c6ce492d
KV
1397 ath10k_core_free_firmware_files(ar);
1398
1399err_power_down:
1400 ath10k_hif_power_down(ar);
1401
1402 return ret;
818bdd16 1403}
dd30a36e 1404
6782cb69 1405static void ath10k_core_register_work(struct work_struct *work)
dd30a36e 1406{
6782cb69 1407 struct ath10k *ar = container_of(work, struct ath10k, register_work);
dd30a36e
MK
1408 int status;
1409
818bdd16
MK
1410 status = ath10k_core_probe_fw(ar);
1411 if (status) {
7aa7a72a 1412 ath10k_err(ar, "could not probe fw (%d)\n", status);
6782cb69 1413 goto err;
818bdd16 1414 }
dd30a36e 1415
5e3dd157 1416 status = ath10k_mac_register(ar);
818bdd16 1417 if (status) {
7aa7a72a 1418 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
29385057 1419 goto err_release_fw;
818bdd16 1420 }
5e3dd157 1421
e13cf7a3 1422 status = ath10k_debug_register(ar);
5e3dd157 1423 if (status) {
7aa7a72a 1424 ath10k_err(ar, "unable to initialize debugfs\n");
5e3dd157
KV
1425 goto err_unregister_mac;
1426 }
1427
855aed12
SW
1428 status = ath10k_spectral_create(ar);
1429 if (status) {
7aa7a72a 1430 ath10k_err(ar, "failed to initialize spectral\n");
855aed12
SW
1431 goto err_debug_destroy;
1432 }
1433
fe6f36d6
RM
1434 status = ath10k_thermal_register(ar);
1435 if (status) {
1436 ath10k_err(ar, "could not register thermal device: %d\n",
1437 status);
1438 goto err_spectral_destroy;
1439 }
1440
6782cb69
MK
1441 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1442 return;
5e3dd157 1443
fe6f36d6
RM
1444err_spectral_destroy:
1445 ath10k_spectral_destroy(ar);
855aed12
SW
1446err_debug_destroy:
1447 ath10k_debug_destroy(ar);
5e3dd157
KV
1448err_unregister_mac:
1449 ath10k_mac_unregister(ar);
29385057
MK
1450err_release_fw:
1451 ath10k_core_free_firmware_files(ar);
6782cb69 1452err:
a491a920
MK
1453 /* TODO: It's probably a good idea to release device from the driver
1454 * but calling device_release_driver() here will cause a deadlock.
1455 */
6782cb69
MK
1456 return;
1457}
1458
1459int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1460{
6782cb69 1461 ar->chip_id = chip_id;
6782cb69
MK
1462 queue_work(ar->workqueue, &ar->register_work);
1463
1464 return 0;
5e3dd157
KV
1465}
1466EXPORT_SYMBOL(ath10k_core_register);
1467
1468void ath10k_core_unregister(struct ath10k *ar)
1469{
6782cb69
MK
1470 cancel_work_sync(&ar->register_work);
1471
1472 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1473 return;
1474
fe6f36d6 1475 ath10k_thermal_unregister(ar);
804eef14
SW
1476 /* Stop spectral before unregistering from mac80211 to remove the
1477 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1478 * would be already be free'd recursively, leading to a double free.
1479 */
1480 ath10k_spectral_destroy(ar);
1481
5e3dd157
KV
1482 /* We must unregister from mac80211 before we stop HTC and HIF.
1483 * Otherwise we will fail to submit commands to FW and mac80211 will be
1484 * unhappy about callback failures. */
1485 ath10k_mac_unregister(ar);
db66ea04 1486
43d2a30f
KV
1487 ath10k_testmode_destroy(ar);
1488
29385057 1489 ath10k_core_free_firmware_files(ar);
6f1f56ea 1490
e13cf7a3 1491 ath10k_debug_unregister(ar);
5e3dd157
KV
1492}
1493EXPORT_SYMBOL(ath10k_core_unregister);
1494
e7b54194 1495struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
e07db352 1496 enum ath10k_bus bus,
d63955b3 1497 enum ath10k_hw_rev hw_rev,
0d0a6939
MK
1498 const struct ath10k_hif_ops *hif_ops)
1499{
1500 struct ath10k *ar;
e13cf7a3 1501 int ret;
0d0a6939 1502
e7b54194 1503 ar = ath10k_mac_create(priv_size);
0d0a6939
MK
1504 if (!ar)
1505 return NULL;
1506
1507 ar->ath_common.priv = ar;
1508 ar->ath_common.hw = ar->hw;
0d0a6939 1509 ar->dev = dev;
d63955b3 1510 ar->hw_rev = hw_rev;
0d0a6939 1511 ar->hif.ops = hif_ops;
e07db352 1512 ar->hif.bus = bus;
0d0a6939 1513
d63955b3
MK
1514 switch (hw_rev) {
1515 case ATH10K_HW_QCA988X:
1516 ar->regs = &qca988x_regs;
1517 break;
1518 case ATH10K_HW_QCA6174:
1519 ar->regs = &qca6174_regs;
1520 break;
1521 default:
1522 ath10k_err(ar, "unsupported core hardware revision %d\n",
1523 hw_rev);
1524 ret = -ENOTSUPP;
1525 goto err_free_mac;
1526 }
1527
0d0a6939
MK
1528 init_completion(&ar->scan.started);
1529 init_completion(&ar->scan.completed);
1530 init_completion(&ar->scan.on_channel);
1531 init_completion(&ar->target_suspend);
5fd3ac3c 1532 init_completion(&ar->wow.wakeup_completed);
0d0a6939
MK
1533
1534 init_completion(&ar->install_key_done);
1535 init_completion(&ar->vdev_setup_done);
ac2953fc 1536 init_completion(&ar->thermal.wmi_sync);
0d0a6939 1537
5c81c7fd 1538 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
0d0a6939
MK
1539
1540 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1541 if (!ar->workqueue)
e13cf7a3 1542 goto err_free_mac;
0d0a6939
MK
1543
1544 mutex_init(&ar->conf_mutex);
1545 spin_lock_init(&ar->data_lock);
1546
1547 INIT_LIST_HEAD(&ar->peers);
1548 init_waitqueue_head(&ar->peer_mapping_wq);
7962b0d8
MK
1549 init_waitqueue_head(&ar->htt.empty_tx_wq);
1550 init_waitqueue_head(&ar->wmi.tx_credits_wq);
0d0a6939
MK
1551
1552 init_completion(&ar->offchan_tx_completed);
1553 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1554 skb_queue_head_init(&ar->offchan_tx_queue);
1555
1556 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1557 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1558
6782cb69 1559 INIT_WORK(&ar->register_work, ath10k_core_register_work);
0d0a6939
MK
1560 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1561
e13cf7a3
MK
1562 ret = ath10k_debug_create(ar);
1563 if (ret)
1564 goto err_free_wq;
1565
0d0a6939
MK
1566 return ar;
1567
e13cf7a3
MK
1568err_free_wq:
1569 destroy_workqueue(ar->workqueue);
1570
1571err_free_mac:
0d0a6939 1572 ath10k_mac_destroy(ar);
e13cf7a3 1573
0d0a6939
MK
1574 return NULL;
1575}
1576EXPORT_SYMBOL(ath10k_core_create);
1577
1578void ath10k_core_destroy(struct ath10k *ar)
1579{
1580 flush_workqueue(ar->workqueue);
1581 destroy_workqueue(ar->workqueue);
1582
e13cf7a3 1583 ath10k_debug_destroy(ar);
0d0a6939
MK
1584 ath10k_mac_destroy(ar);
1585}
1586EXPORT_SYMBOL(ath10k_core_destroy);
1587
5e3dd157
KV
1588MODULE_AUTHOR("Qualcomm Atheros");
1589MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1590MODULE_LICENSE("Dual BSD/GPL");