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ath10k: refactor firmware images to struct ath10k_fw_components
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / ath / ath10k / core.c
CommitLineData
5e3dd157
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1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
5aabff05 20#include <linux/of.h>
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21
22#include "core.h"
23#include "mac.h"
24#include "htc.h"
25#include "hif.h"
26#include "wmi.h"
27#include "bmi.h"
28#include "debug.h"
29#include "htt.h"
43d2a30f 30#include "testmode.h"
d7579d12 31#include "wmi-ops.h"
5e3dd157
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32
33unsigned int ath10k_debug_mask;
ccec9038 34static unsigned int ath10k_cryptmode_param;
5e3dd157 35static bool uart_print;
8868b12c 36static bool skip_otp;
b6c7bafa 37static bool rawmode;
8868b12c 38
5e3dd157 39module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
ccec9038 40module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
5e3dd157 41module_param(uart_print, bool, 0644);
8868b12c 42module_param(skip_otp, bool, 0644);
b6c7bafa 43module_param(rawmode, bool, 0644);
8868b12c 44
5e3dd157
KV
45MODULE_PARM_DESC(debug_mask, "Debugging mask");
46MODULE_PARM_DESC(uart_print, "Uart target debugging");
8868b12c 47MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
ccec9038 48MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
b6c7bafa 49MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
5e3dd157
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50
51static const struct ath10k_hw_params ath10k_hw_params_list[] = {
5e3dd157
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52 {
53 .id = QCA988X_HW_2_0_VERSION,
079a0490 54 .dev_id = QCA988X_2_0_DEVICE_ID,
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55 .name = "qca988x hw2.0",
56 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
3a8200b2 57 .uart_pin = 7,
587f7031 58 .has_shifted_cc_wraparound = true,
d772703e 59 .otp_exe_param = 0,
9c8fb548 60 .channel_counters_freq_hz = 88000,
7b7da0a0 61 .max_probe_resp_desc_thres = 0,
b8d55fca 62 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
0b8e3c4c 63 .cal_data_len = 2116,
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64 .fw = {
65 .dir = QCA988X_HW_2_0_FW_DIR,
5e3dd157 66 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
9764a2af
MK
67 .board_size = QCA988X_BOARD_DATA_SZ,
68 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
5e3dd157
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69 },
70 },
d63955b3
MK
71 {
72 .id = QCA6174_HW_2_1_VERSION,
079a0490
BM
73 .dev_id = QCA6164_2_1_DEVICE_ID,
74 .name = "qca6164 hw2.1",
75 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
76 .uart_pin = 6,
77 .otp_exe_param = 0,
78 .channel_counters_freq_hz = 88000,
79 .max_probe_resp_desc_thres = 0,
0b8e3c4c 80 .cal_data_len = 8124,
079a0490
BM
81 .fw = {
82 .dir = QCA6174_HW_2_1_FW_DIR,
079a0490
BM
83 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
84 .board_size = QCA6174_BOARD_DATA_SZ,
85 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
86 },
87 },
88 {
89 .id = QCA6174_HW_2_1_VERSION,
90 .dev_id = QCA6174_2_1_DEVICE_ID,
d63955b3
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91 .name = "qca6174 hw2.1",
92 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
93 .uart_pin = 6,
d772703e 94 .otp_exe_param = 0,
9c8fb548 95 .channel_counters_freq_hz = 88000,
7b7da0a0 96 .max_probe_resp_desc_thres = 0,
b8d55fca 97 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
0b8e3c4c 98 .cal_data_len = 8124,
d63955b3
MK
99 .fw = {
100 .dir = QCA6174_HW_2_1_FW_DIR,
d63955b3
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101 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
102 .board_size = QCA6174_BOARD_DATA_SZ,
103 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
104 },
105 },
106 {
107 .id = QCA6174_HW_3_0_VERSION,
079a0490 108 .dev_id = QCA6174_2_1_DEVICE_ID,
d63955b3
MK
109 .name = "qca6174 hw3.0",
110 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
111 .uart_pin = 6,
d772703e 112 .otp_exe_param = 0,
9c8fb548 113 .channel_counters_freq_hz = 88000,
7b7da0a0 114 .max_probe_resp_desc_thres = 0,
b8d55fca 115 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
0b8e3c4c 116 .cal_data_len = 8124,
d63955b3
MK
117 .fw = {
118 .dir = QCA6174_HW_3_0_FW_DIR,
d63955b3
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119 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
120 .board_size = QCA6174_BOARD_DATA_SZ,
121 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
122 },
123 },
608b8f73
MK
124 {
125 .id = QCA6174_HW_3_2_VERSION,
079a0490 126 .dev_id = QCA6174_2_1_DEVICE_ID,
608b8f73
MK
127 .name = "qca6174 hw3.2",
128 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
129 .uart_pin = 6,
d772703e 130 .otp_exe_param = 0,
9c8fb548 131 .channel_counters_freq_hz = 88000,
7b7da0a0 132 .max_probe_resp_desc_thres = 0,
b8d55fca 133 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
0b8e3c4c 134 .cal_data_len = 8124,
608b8f73
MK
135 .fw = {
136 /* uses same binaries as hw3.0 */
137 .dir = QCA6174_HW_3_0_FW_DIR,
608b8f73
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138 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
139 .board_size = QCA6174_BOARD_DATA_SZ,
140 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
141 },
142 },
8bd47021
VT
143 {
144 .id = QCA99X0_HW_2_0_DEV_VERSION,
079a0490 145 .dev_id = QCA99X0_2_0_DEVICE_ID,
8bd47021
VT
146 .name = "qca99x0 hw2.0",
147 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
148 .uart_pin = 7,
d772703e 149 .otp_exe_param = 0x00000700,
d9156b5f 150 .continuous_frag_desc = true,
9c8fb548 151 .channel_counters_freq_hz = 150000,
7b7da0a0 152 .max_probe_resp_desc_thres = 24,
b8d55fca 153 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
5699a6f2
RM
154 .tx_chain_mask = 0xf,
155 .rx_chain_mask = 0xf,
156 .max_spatial_stream = 4,
0b8e3c4c 157 .cal_data_len = 12064,
8bd47021
VT
158 .fw = {
159 .dir = QCA99X0_HW_2_0_FW_DIR,
8bd47021
VT
160 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
161 .board_size = QCA99X0_BOARD_DATA_SZ,
162 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
163 },
164 },
034074f3
BM
165 {
166 .id = QCA9377_HW_1_0_DEV_VERSION,
167 .dev_id = QCA9377_1_0_DEVICE_ID,
168 .name = "qca9377 hw1.0",
169 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
170 .uart_pin = 6,
171 .otp_exe_param = 0,
172 .channel_counters_freq_hz = 88000,
173 .max_probe_resp_desc_thres = 0,
0b8e3c4c 174 .cal_data_len = 8124,
034074f3
BM
175 .fw = {
176 .dir = QCA9377_HW_1_0_FW_DIR,
034074f3
BM
177 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
178 .board_size = QCA9377_BOARD_DATA_SZ,
179 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
180 },
181 },
a226b519 182 {
12551ced 183 .id = QCA9377_HW_1_1_DEV_VERSION,
079a0490 184 .dev_id = QCA9377_1_0_DEVICE_ID,
12551ced 185 .name = "qca9377 hw1.1",
a226b519 186 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
6cf21395 187 .uart_pin = 6,
a226b519 188 .otp_exe_param = 0,
6cf21395
BM
189 .channel_counters_freq_hz = 88000,
190 .max_probe_resp_desc_thres = 0,
0b8e3c4c 191 .cal_data_len = 8124,
a226b519
BM
192 .fw = {
193 .dir = QCA9377_HW_1_0_FW_DIR,
a226b519
BM
194 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
195 .board_size = QCA9377_BOARD_DATA_SZ,
196 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
197 },
198 },
b1a958c9
RM
199 {
200 .id = QCA4019_HW_1_0_DEV_VERSION,
201 .dev_id = 0,
202 .name = "qca4019 hw1.0",
203 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
204 .uart_pin = 7,
205 .otp_exe_param = 0x0010000,
206 .continuous_frag_desc = true,
207 .channel_counters_freq_hz = 125000,
208 .max_probe_resp_desc_thres = 24,
209 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
5699a6f2
RM
210 .tx_chain_mask = 0x3,
211 .rx_chain_mask = 0x3,
212 .max_spatial_stream = 2,
0b8e3c4c 213 .cal_data_len = 12064,
b1a958c9
RM
214 .fw = {
215 .dir = QCA4019_HW_1_0_FW_DIR,
b1a958c9
RM
216 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
217 .board_size = QCA4019_BOARD_DATA_SZ,
218 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
219 },
220 },
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221};
222
b27bc5a4
MK
223static const char *const ath10k_core_fw_feature_str[] = {
224 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
225 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
226 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
227 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
228 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
229 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
230 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
231 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
232 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
233 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
5af82fa6 234 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
62f77f09 235 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
90eceb3b 236 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
9b783763 237 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
b27bc5a4
MK
238};
239
240static unsigned int ath10k_core_get_fw_feature_str(char *buf,
241 size_t buf_len,
242 enum ath10k_fw_features feat)
243{
5af82fa6
KV
244 /* make sure that ath10k_core_fw_feature_str[] gets updated */
245 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
246 ATH10K_FW_FEATURE_COUNT);
247
b27bc5a4
MK
248 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
249 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
250 return scnprintf(buf, buf_len, "bit%d", feat);
251 }
252
253 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
254}
255
256void ath10k_core_get_fw_features_str(struct ath10k *ar,
257 char *buf,
258 size_t buf_len)
259{
260 unsigned int len = 0;
261 int i;
262
263 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
264 if (test_bit(i, ar->fw_features)) {
265 if (len > 0)
266 len += scnprintf(buf + len, buf_len - len, ",");
267
268 len += ath10k_core_get_fw_feature_str(buf + len,
269 buf_len - len,
270 i);
271 }
272 }
273}
274
5e3dd157
KV
275static void ath10k_send_suspend_complete(struct ath10k *ar)
276{
7aa7a72a 277 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
5e3dd157 278
9042e17d 279 complete(&ar->target_suspend);
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KV
280}
281
5e3dd157
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282static int ath10k_init_configure_target(struct ath10k *ar)
283{
284 u32 param_host;
285 int ret;
286
287 /* tell target which HTC version it is used*/
288 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
289 HTC_PROTOCOL_VERSION);
290 if (ret) {
7aa7a72a 291 ath10k_err(ar, "settings HTC version failed\n");
5e3dd157
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292 return ret;
293 }
294
295 /* set the firmware mode to STA/IBSS/AP */
296 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
297 if (ret) {
7aa7a72a 298 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
5e3dd157
KV
299 return ret;
300 }
301
302 /* TODO following parameters need to be re-visited. */
303 /* num_device */
304 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
305 /* Firmware mode */
306 /* FIXME: Why FW_MODE_AP ??.*/
307 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
308 /* mac_addr_method */
309 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
310 /* firmware_bridge */
311 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
312 /* fwsubmode */
313 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
314
315 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
316 if (ret) {
7aa7a72a 317 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
5e3dd157
KV
318 return ret;
319 }
320
321 /* We do all byte-swapping on the host */
322 ret = ath10k_bmi_write32(ar, hi_be, 0);
323 if (ret) {
7aa7a72a 324 ath10k_err(ar, "setting host CPU BE mode failed\n");
5e3dd157
KV
325 return ret;
326 }
327
328 /* FW descriptor/Data swap flags */
329 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
330
331 if (ret) {
7aa7a72a 332 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
5e3dd157
KV
333 return ret;
334 }
335
36582e5d
MK
336 /* Some devices have a special sanity check that verifies the PCI
337 * Device ID is written to this host interest var. It is known to be
338 * required to boot QCA6164.
339 */
340 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
341 ar->dev_id);
342 if (ret) {
343 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
344 return ret;
345 }
346
5e3dd157
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347 return 0;
348}
349
350static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
351 const char *dir,
352 const char *file)
353{
354 char filename[100];
355 const struct firmware *fw;
356 int ret;
357
358 if (file == NULL)
359 return ERR_PTR(-ENOENT);
360
361 if (dir == NULL)
362 dir = ".";
363
364 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
365 ret = request_firmware(&fw, filename, ar->dev);
366 if (ret)
367 return ERR_PTR(ret);
368
369 return fw;
370}
371
a58227ef
KV
372static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
373 size_t data_len)
5e3dd157 374{
9764a2af
MK
375 u32 board_data_size = ar->hw_params.fw.board_size;
376 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
5e3dd157
KV
377 u32 board_ext_data_addr;
378 int ret;
379
380 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
381 if (ret) {
7aa7a72a
MK
382 ath10k_err(ar, "could not read board ext data addr (%d)\n",
383 ret);
5e3dd157
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384 return ret;
385 }
386
7aa7a72a 387 ath10k_dbg(ar, ATH10K_DBG_BOOT,
effea968 388 "boot push board extended data addr 0x%x\n",
5e3dd157
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389 board_ext_data_addr);
390
391 if (board_ext_data_addr == 0)
392 return 0;
393
a58227ef 394 if (data_len != (board_data_size + board_ext_data_size)) {
7aa7a72a 395 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
a58227ef 396 data_len, board_data_size, board_ext_data_size);
5e3dd157
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397 return -EINVAL;
398 }
399
400 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
a58227ef 401 data + board_data_size,
5e3dd157
KV
402 board_ext_data_size);
403 if (ret) {
7aa7a72a 404 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
5e3dd157
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405 return ret;
406 }
407
408 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
409 (board_ext_data_size << 16) | 1);
410 if (ret) {
7aa7a72a
MK
411 ath10k_err(ar, "could not write board ext data bit (%d)\n",
412 ret);
5e3dd157
KV
413 return ret;
414 }
415
416 return 0;
417}
418
a58227ef
KV
419static int ath10k_download_board_data(struct ath10k *ar, const void *data,
420 size_t data_len)
5e3dd157 421{
9764a2af 422 u32 board_data_size = ar->hw_params.fw.board_size;
5e3dd157 423 u32 address;
5e3dd157
KV
424 int ret;
425
a58227ef 426 ret = ath10k_push_board_ext_data(ar, data, data_len);
5e3dd157 427 if (ret) {
7aa7a72a 428 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
5e3dd157
KV
429 goto exit;
430 }
431
432 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
433 if (ret) {
7aa7a72a 434 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
5e3dd157
KV
435 goto exit;
436 }
437
a58227ef 438 ret = ath10k_bmi_write_memory(ar, address, data,
958df3a0 439 min_t(u32, board_data_size,
a58227ef 440 data_len));
5e3dd157 441 if (ret) {
7aa7a72a 442 ath10k_err(ar, "could not write board data (%d)\n", ret);
5e3dd157
KV
443 goto exit;
444 }
445
446 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
447 if (ret) {
7aa7a72a 448 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
5e3dd157
KV
449 goto exit;
450 }
451
452exit:
5e3dd157
KV
453 return ret;
454}
455
f454add4
RM
456static int ath10k_download_cal_file(struct ath10k *ar,
457 const struct firmware *file)
a58227ef
KV
458{
459 int ret;
460
f454add4 461 if (!file)
a58227ef
KV
462 return -ENOENT;
463
f454add4
RM
464 if (IS_ERR(file))
465 return PTR_ERR(file);
a58227ef 466
f454add4 467 ret = ath10k_download_board_data(ar, file->data, file->size);
a58227ef
KV
468 if (ret) {
469 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
470 return ret;
471 }
472
473 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
474
475 return 0;
476}
477
f454add4 478static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
5aabff05
TK
479{
480 struct device_node *node;
481 int data_len;
482 void *data;
483 int ret;
484
485 node = ar->dev->of_node;
486 if (!node)
487 /* Device Tree is optional, don't print any warnings if
488 * there's no node for ath10k.
489 */
490 return -ENOENT;
491
f454add4 492 if (!of_get_property(node, dt_name, &data_len)) {
5aabff05
TK
493 /* The calibration data node is optional */
494 return -ENOENT;
495 }
496
0b8e3c4c 497 if (data_len != ar->hw_params.cal_data_len) {
5aabff05
TK
498 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
499 data_len);
500 ret = -EMSGSIZE;
501 goto out;
502 }
503
504 data = kmalloc(data_len, GFP_KERNEL);
505 if (!data) {
506 ret = -ENOMEM;
507 goto out;
508 }
509
f454add4 510 ret = of_property_read_u8_array(node, dt_name, data, data_len);
5aabff05
TK
511 if (ret) {
512 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
513 ret);
514 goto out_free;
515 }
516
517 ret = ath10k_download_board_data(ar, data, data_len);
518 if (ret) {
519 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
520 ret);
521 goto out_free;
522 }
523
524 ret = 0;
525
526out_free:
527 kfree(data);
528
529out:
530 return ret;
531}
532
db0984e5
MP
533static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
534{
535 u32 result, address;
536 u8 board_id, chip_id;
537 int ret;
538
539 address = ar->hw_params.patch_load_addr;
540
7ebf721d
KV
541 if (!ar->normal_mode_fw.fw_file.otp_data ||
542 !ar->normal_mode_fw.fw_file.otp_len) {
db0984e5
MP
543 ath10k_warn(ar,
544 "failed to retrieve board id because of invalid otp\n");
545 return -ENODATA;
546 }
547
548 ath10k_dbg(ar, ATH10K_DBG_BOOT,
549 "boot upload otp to 0x%x len %zd for board id\n",
7ebf721d 550 address, ar->normal_mode_fw.fw_file.otp_len);
db0984e5 551
7ebf721d
KV
552 ret = ath10k_bmi_fast_download(ar, address,
553 ar->normal_mode_fw.fw_file.otp_data,
554 ar->normal_mode_fw.fw_file.otp_len);
db0984e5
MP
555 if (ret) {
556 ath10k_err(ar, "could not write otp for board id check: %d\n",
557 ret);
558 return ret;
559 }
560
561 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
562 &result);
563 if (ret) {
564 ath10k_err(ar, "could not execute otp for board id check: %d\n",
565 ret);
566 return ret;
567 }
568
569 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
570 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
571
572 ath10k_dbg(ar, ATH10K_DBG_BOOT,
573 "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
574 result, board_id, chip_id);
575
576 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0)
577 return -EOPNOTSUPP;
578
579 ar->id.bmi_ids_valid = true;
580 ar->id.bmi_board_id = board_id;
581 ar->id.bmi_chip_id = chip_id;
582
583 return 0;
584}
585
5e3dd157
KV
586static int ath10k_download_and_run_otp(struct ath10k *ar)
587{
d6d4a58d 588 u32 result, address = ar->hw_params.patch_load_addr;
d772703e 589 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
5e3dd157
KV
590 int ret;
591
7ebf721d
KV
592 ret = ath10k_download_board_data(ar,
593 ar->running_fw->board_data,
594 ar->running_fw->board_len);
83091559
KV
595 if (ret) {
596 ath10k_err(ar, "failed to download board data: %d\n", ret);
597 return ret;
598 }
599
5e3dd157
KV
600 /* OTP is optional */
601
7ebf721d
KV
602 if (!ar->running_fw->fw_file.otp_data ||
603 !ar->running_fw->fw_file.otp_len) {
7aa7a72a 604 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
7ebf721d
KV
605 ar->running_fw->fw_file.otp_data,
606 ar->running_fw->fw_file.otp_len);
5e3dd157 607 return 0;
7f06ea1e
KV
608 }
609
7aa7a72a 610 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
7ebf721d 611 address, ar->running_fw->fw_file.otp_len);
5e3dd157 612
7ebf721d
KV
613 ret = ath10k_bmi_fast_download(ar, address,
614 ar->running_fw->fw_file.otp_data,
615 ar->running_fw->fw_file.otp_len);
5e3dd157 616 if (ret) {
7aa7a72a 617 ath10k_err(ar, "could not write otp (%d)\n", ret);
7f06ea1e 618 return ret;
5e3dd157
KV
619 }
620
d772703e 621 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
5e3dd157 622 if (ret) {
7aa7a72a 623 ath10k_err(ar, "could not execute otp (%d)\n", ret);
7f06ea1e 624 return ret;
5e3dd157
KV
625 }
626
7aa7a72a 627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
7f06ea1e 628
d9153546 629 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
be62e92a
KV
630 ar->fw_features)) &&
631 result != 0) {
7aa7a72a 632 ath10k_err(ar, "otp calibration failed: %d", result);
7f06ea1e
KV
633 return -EINVAL;
634 }
635
636 return 0;
5e3dd157
KV
637}
638
7ebf721d 639static int ath10k_download_fw(struct ath10k *ar)
5e3dd157 640{
43d2a30f 641 u32 address, data_len;
43d2a30f 642 const void *data;
5e3dd157
KV
643 int ret;
644
5e3dd157
KV
645 address = ar->hw_params.patch_load_addr;
646
7ebf721d
KV
647 data = ar->running_fw->fw_file.firmware_data;
648 data_len = ar->running_fw->fw_file.firmware_len;
649
650 ret = ath10k_swap_code_seg_configure(ar,
651 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW);
652 if (ret) {
653 ath10k_err(ar, "failed to configure fw code swap: %d\n",
654 ret);
655 return ret;
43d2a30f
KV
656 }
657
658 ath10k_dbg(ar, ATH10K_DBG_BOOT,
7ebf721d
KV
659 "boot uploading firmware image %p len %d\n",
660 data, data_len);
43d2a30f
KV
661
662 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
5e3dd157 663 if (ret) {
7ebf721d
KV
664 ath10k_err(ar, "failed to download firmware: %d\n",
665 ret);
43d2a30f 666 return ret;
5e3dd157
KV
667 }
668
29385057
MK
669 return ret;
670}
671
0a51b343 672static void ath10k_core_free_board_files(struct ath10k *ar)
29385057 673{
7ebf721d
KV
674 if (!IS_ERR(ar->normal_mode_fw.board))
675 release_firmware(ar->normal_mode_fw.board);
29385057 676
7ebf721d
KV
677 ar->normal_mode_fw.board = NULL;
678 ar->normal_mode_fw.board_data = NULL;
679 ar->normal_mode_fw.board_len = 0;
0a51b343
MP
680}
681
682static void ath10k_core_free_firmware_files(struct ath10k *ar)
683{
7ebf721d
KV
684 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
685 release_firmware(ar->normal_mode_fw.fw_file.firmware);
29385057 686
db2cf865 687 if (!IS_ERR(ar->cal_file))
a58227ef
KV
688 release_firmware(ar->cal_file);
689
dcb02db1
VT
690 ath10k_swap_code_seg_release(ar);
691
7ebf721d
KV
692 ar->normal_mode_fw.fw_file.otp_data = NULL;
693 ar->normal_mode_fw.fw_file.otp_len = 0;
958df3a0 694
7ebf721d
KV
695 ar->normal_mode_fw.fw_file.firmware = NULL;
696 ar->normal_mode_fw.fw_file.firmware_data = NULL;
697 ar->normal_mode_fw.fw_file.firmware_len = 0;
a58227ef
KV
698
699 ar->cal_file = NULL;
700}
701
702static int ath10k_fetch_cal_file(struct ath10k *ar)
703{
704 char filename[100];
705
3d9195ea
RM
706 /* pre-cal-<bus>-<id>.bin */
707 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
708 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
709
710 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
711 if (!IS_ERR(ar->pre_cal_file))
712 goto success;
713
a58227ef
KV
714 /* cal-<bus>-<id>.bin */
715 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
716 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
717
718 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
719 if (IS_ERR(ar->cal_file))
720 /* calibration file is optional, don't print any warnings */
721 return PTR_ERR(ar->cal_file);
3d9195ea 722success:
a58227ef
KV
723 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
724 ATH10K_FW_DIR, filename);
725
726 return 0;
29385057
MK
727}
728
0a51b343 729static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
29385057 730{
0a51b343
MP
731 if (!ar->hw_params.fw.board) {
732 ath10k_err(ar, "failed to find board file fw entry\n");
733 return -EINVAL;
734 }
de57e2c8 735
7ebf721d
KV
736 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
737 ar->hw_params.fw.dir,
738 ar->hw_params.fw.board);
739 if (IS_ERR(ar->normal_mode_fw.board))
740 return PTR_ERR(ar->normal_mode_fw.board);
de57e2c8 741
7ebf721d
KV
742 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
743 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
29385057 744
de57e2c8
MK
745 return 0;
746}
747
0a51b343
MP
748static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
749 const void *buf, size_t buf_len,
750 const char *boardname)
de57e2c8 751{
0a51b343
MP
752 const struct ath10k_fw_ie *hdr;
753 bool name_match_found;
754 int ret, board_ie_id;
755 size_t board_ie_len;
756 const void *board_ie_data;
757
758 name_match_found = false;
759
760 /* go through ATH10K_BD_IE_BOARD_ elements */
761 while (buf_len > sizeof(struct ath10k_fw_ie)) {
762 hdr = buf;
763 board_ie_id = le32_to_cpu(hdr->id);
764 board_ie_len = le32_to_cpu(hdr->len);
765 board_ie_data = hdr->data;
766
767 buf_len -= sizeof(*hdr);
768 buf += sizeof(*hdr);
769
770 if (buf_len < ALIGN(board_ie_len, 4)) {
771 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
772 buf_len, ALIGN(board_ie_len, 4));
773 ret = -EINVAL;
774 goto out;
775 }
776
777 switch (board_ie_id) {
778 case ATH10K_BD_IE_BOARD_NAME:
779 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
780 board_ie_data, board_ie_len);
781
782 if (board_ie_len != strlen(boardname))
783 break;
784
785 ret = memcmp(board_ie_data, boardname, strlen(boardname));
786 if (ret)
787 break;
788
789 name_match_found = true;
790 ath10k_dbg(ar, ATH10K_DBG_BOOT,
791 "boot found match for name '%s'",
792 boardname);
793 break;
794 case ATH10K_BD_IE_BOARD_DATA:
795 if (!name_match_found)
796 /* no match found */
797 break;
798
799 ath10k_dbg(ar, ATH10K_DBG_BOOT,
800 "boot found board data for '%s'",
801 boardname);
802
7ebf721d
KV
803 ar->normal_mode_fw.board_data = board_ie_data;
804 ar->normal_mode_fw.board_len = board_ie_len;
0a51b343
MP
805
806 ret = 0;
807 goto out;
808 default:
809 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
810 board_ie_id);
811 break;
812 }
813
814 /* jump over the padding */
815 board_ie_len = ALIGN(board_ie_len, 4);
816
817 buf_len -= board_ie_len;
818 buf += board_ie_len;
29385057
MK
819 }
820
0a51b343
MP
821 /* no match found */
822 ret = -ENOENT;
823
824out:
825 return ret;
826}
827
828static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
829 const char *boardname,
830 const char *filename)
831{
832 size_t len, magic_len, ie_len;
833 struct ath10k_fw_ie *hdr;
834 const u8 *data;
835 int ret, ie_id;
836
7ebf721d
KV
837 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
838 ar->hw_params.fw.dir,
839 filename);
840 if (IS_ERR(ar->normal_mode_fw.board))
841 return PTR_ERR(ar->normal_mode_fw.board);
29385057 842
7ebf721d
KV
843 data = ar->normal_mode_fw.board->data;
844 len = ar->normal_mode_fw.board->size;
0a51b343
MP
845
846 /* magic has extra null byte padded */
847 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
848 if (len < magic_len) {
849 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
850 ar->hw_params.fw.dir, filename, len);
851 ret = -EINVAL;
852 goto err;
853 }
854
855 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
856 ath10k_err(ar, "found invalid board magic\n");
857 ret = -EINVAL;
858 goto err;
859 }
860
861 /* magic is padded to 4 bytes */
862 magic_len = ALIGN(magic_len, 4);
863 if (len < magic_len) {
864 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
865 ar->hw_params.fw.dir, filename, len);
866 ret = -EINVAL;
867 goto err;
868 }
869
870 data += magic_len;
871 len -= magic_len;
872
873 while (len > sizeof(struct ath10k_fw_ie)) {
874 hdr = (struct ath10k_fw_ie *)data;
875 ie_id = le32_to_cpu(hdr->id);
876 ie_len = le32_to_cpu(hdr->len);
877
878 len -= sizeof(*hdr);
879 data = hdr->data;
880
881 if (len < ALIGN(ie_len, 4)) {
882 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
883 ie_id, ie_len, len);
884 ret = -EINVAL;
885 goto err;
886 }
887
888 switch (ie_id) {
889 case ATH10K_BD_IE_BOARD:
890 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
891 boardname);
892 if (ret == -ENOENT)
893 /* no match found, continue */
894 break;
895 else if (ret)
896 /* there was an error, bail out */
897 goto err;
898
899 /* board data found */
900 goto out;
901 }
902
903 /* jump over the padding */
904 ie_len = ALIGN(ie_len, 4);
905
906 len -= ie_len;
907 data += ie_len;
908 }
909
910out:
7ebf721d 911 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
0a51b343
MP
912 ath10k_err(ar,
913 "failed to fetch board data for %s from %s/%s\n",
bd5632b0 914 boardname, ar->hw_params.fw.dir, filename);
0a51b343
MP
915 ret = -ENODATA;
916 goto err;
917 }
918
919 return 0;
920
921err:
922 ath10k_core_free_board_files(ar);
923 return ret;
924}
925
926static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
927 size_t name_len)
928{
db0984e5
MP
929 if (ar->id.bmi_ids_valid) {
930 scnprintf(name, name_len,
931 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
932 ath10k_bus_str(ar->hif.bus),
933 ar->id.bmi_chip_id,
934 ar->id.bmi_board_id);
935 goto out;
936 }
937
0a51b343
MP
938 scnprintf(name, name_len,
939 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
940 ath10k_bus_str(ar->hif.bus),
941 ar->id.vendor, ar->id.device,
942 ar->id.subsystem_vendor, ar->id.subsystem_device);
943
db0984e5 944out:
0a51b343 945 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
de57e2c8
MK
946
947 return 0;
948}
949
950static int ath10k_core_fetch_board_file(struct ath10k *ar)
951{
0a51b343 952 char boardname[100];
de57e2c8
MK
953 int ret;
954
0a51b343
MP
955 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
956 if (ret) {
957 ath10k_err(ar, "failed to create board name: %d", ret);
958 return ret;
de57e2c8
MK
959 }
960
0a51b343
MP
961 ar->bd_api = 2;
962 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
963 ATH10K_BOARD_API2_FILE);
964 if (!ret)
965 goto success;
966
967 ar->bd_api = 1;
968 ret = ath10k_core_fetch_board_data_api_1(ar);
de57e2c8 969 if (ret) {
0a51b343 970 ath10k_err(ar, "failed to fetch board data\n");
de57e2c8
MK
971 return ret;
972 }
958df3a0 973
0a51b343
MP
974success:
975 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
d0ed74f3
MK
976 return 0;
977}
978
7ebf721d
KV
979static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
980 struct ath10k_fw_file *fw_file)
1a222435
KV
981{
982 size_t magic_len, len, ie_len;
983 int ie_id, i, index, bit, ret;
984 struct ath10k_fw_ie *hdr;
985 const u8 *data;
202e86e6 986 __le32 *timestamp, *version;
1a222435
KV
987
988 /* first fetch the firmware file (firmware-*.bin) */
7ebf721d
KV
989 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
990 name);
991 if (IS_ERR(fw_file->firmware)) {
7aa7a72a 992 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
7ebf721d
KV
993 ar->hw_params.fw.dir, name,
994 PTR_ERR(fw_file->firmware));
995 return PTR_ERR(fw_file->firmware);
1a222435
KV
996 }
997
7ebf721d
KV
998 data = fw_file->firmware->data;
999 len = fw_file->firmware->size;
1a222435
KV
1000
1001 /* magic also includes the null byte, check that as well */
1002 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1003
1004 if (len < magic_len) {
7aa7a72a 1005 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
53c02284 1006 ar->hw_params.fw.dir, name, len);
9bab1cc0
MK
1007 ret = -EINVAL;
1008 goto err;
1a222435
KV
1009 }
1010
1011 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
7aa7a72a 1012 ath10k_err(ar, "invalid firmware magic\n");
9bab1cc0
MK
1013 ret = -EINVAL;
1014 goto err;
1a222435
KV
1015 }
1016
1017 /* jump over the padding */
1018 magic_len = ALIGN(magic_len, 4);
1019
1020 len -= magic_len;
1021 data += magic_len;
1022
1023 /* loop elements */
1024 while (len > sizeof(struct ath10k_fw_ie)) {
1025 hdr = (struct ath10k_fw_ie *)data;
1026
1027 ie_id = le32_to_cpu(hdr->id);
1028 ie_len = le32_to_cpu(hdr->len);
1029
1030 len -= sizeof(*hdr);
1031 data += sizeof(*hdr);
1032
1033 if (len < ie_len) {
7aa7a72a 1034 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1a222435 1035 ie_id, len, ie_len);
9bab1cc0
MK
1036 ret = -EINVAL;
1037 goto err;
1a222435
KV
1038 }
1039
1040 switch (ie_id) {
1041 case ATH10K_FW_IE_FW_VERSION:
1042 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
1043 break;
1044
1045 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
1046 ar->hw->wiphy->fw_version[ie_len] = '\0';
1047
7aa7a72a 1048 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
1049 "found fw version %s\n",
1050 ar->hw->wiphy->fw_version);
1051 break;
1052 case ATH10K_FW_IE_TIMESTAMP:
1053 if (ie_len != sizeof(u32))
1054 break;
1055
1056 timestamp = (__le32 *)data;
1057
7aa7a72a 1058 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1a222435
KV
1059 le32_to_cpup(timestamp));
1060 break;
1061 case ATH10K_FW_IE_FEATURES:
7aa7a72a 1062 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
1063 "found firmware features ie (%zd B)\n",
1064 ie_len);
1065
1066 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1067 index = i / 8;
1068 bit = i % 8;
1069
1070 if (index == ie_len)
1071 break;
1072
f591a1a5 1073 if (data[index] & (1 << bit)) {
7aa7a72a 1074 ath10k_dbg(ar, ATH10K_DBG_BOOT,
f591a1a5
BG
1075 "Enabling feature bit: %i\n",
1076 i);
1a222435 1077 __set_bit(i, ar->fw_features);
f591a1a5 1078 }
1a222435
KV
1079 }
1080
7aa7a72a 1081 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1a222435
KV
1082 ar->fw_features,
1083 sizeof(ar->fw_features));
1084 break;
1085 case ATH10K_FW_IE_FW_IMAGE:
7aa7a72a 1086 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
1087 "found fw image ie (%zd B)\n",
1088 ie_len);
1089
7ebf721d
KV
1090 fw_file->firmware_data = data;
1091 fw_file->firmware_len = ie_len;
1a222435
KV
1092
1093 break;
1094 case ATH10K_FW_IE_OTP_IMAGE:
7aa7a72a 1095 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
KV
1096 "found otp image ie (%zd B)\n",
1097 ie_len);
1098
7ebf721d
KV
1099 fw_file->otp_data = data;
1100 fw_file->otp_len = ie_len;
1a222435
KV
1101
1102 break;
202e86e6
KV
1103 case ATH10K_FW_IE_WMI_OP_VERSION:
1104 if (ie_len != sizeof(u32))
1105 break;
1106
1107 version = (__le32 *)data;
1108
1109 ar->wmi.op_version = le32_to_cpup(version);
1110
1111 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1112 ar->wmi.op_version);
1113 break;
8348db29
RM
1114 case ATH10K_FW_IE_HTT_OP_VERSION:
1115 if (ie_len != sizeof(u32))
1116 break;
1117
1118 version = (__le32 *)data;
1119
1120 ar->htt.op_version = le32_to_cpup(version);
1121
1122 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1123 ar->htt.op_version);
1124 break;
dcb02db1
VT
1125 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1126 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1127 "found fw code swap image ie (%zd B)\n",
1128 ie_len);
7ebf721d
KV
1129 fw_file->codeswap_data = data;
1130 fw_file->codeswap_len = ie_len;
dcb02db1 1131 break;
1a222435 1132 default:
7aa7a72a 1133 ath10k_warn(ar, "Unknown FW IE: %u\n",
1a222435
KV
1134 le32_to_cpu(hdr->id));
1135 break;
1136 }
1137
1138 /* jump over the padding */
1139 ie_len = ALIGN(ie_len, 4);
1140
1141 len -= ie_len;
1142 data += ie_len;
e05634ee 1143 }
1a222435 1144
7ebf721d
KV
1145 if (!fw_file->firmware_data ||
1146 !fw_file->firmware_len) {
7aa7a72a 1147 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
53c02284 1148 ar->hw_params.fw.dir, name);
1a222435
KV
1149 ret = -ENOMEDIUM;
1150 goto err;
1151 }
1152
1a222435
KV
1153 return 0;
1154
1155err:
1156 ath10k_core_free_firmware_files(ar);
1157 return ret;
1158}
1159
1160static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1161{
1162 int ret;
1163
a58227ef
KV
1164 /* calibration file is optional, don't check for any errors */
1165 ath10k_fetch_cal_file(ar);
1166
53513c30
KV
1167 ar->fw_api = 5;
1168 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1169
7ebf721d
KV
1170 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE,
1171 &ar->normal_mode_fw.fw_file);
53513c30
KV
1172 if (ret == 0)
1173 goto success;
1174
4a16fbec
RM
1175 ar->fw_api = 4;
1176 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1177
7ebf721d
KV
1178 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE,
1179 &ar->normal_mode_fw.fw_file);
4a16fbec
RM
1180 if (ret == 0)
1181 goto success;
1182
24c88f78 1183 ar->fw_api = 3;
7aa7a72a 1184 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
24c88f78 1185
7ebf721d
KV
1186 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE,
1187 &ar->normal_mode_fw.fw_file);
24c88f78
MK
1188 if (ret == 0)
1189 goto success;
1190
53c02284 1191 ar->fw_api = 2;
7aa7a72a 1192 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
53c02284 1193
7ebf721d
KV
1194 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE,
1195 &ar->normal_mode_fw.fw_file);
1a222435
KV
1196 if (ret)
1197 return ret;
1198
53c02284 1199success:
7aa7a72a 1200 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1a222435
KV
1201
1202 return 0;
1203}
1204
3d9195ea
RM
1205static int ath10k_core_pre_cal_download(struct ath10k *ar)
1206{
1207 int ret;
1208
1209 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1210 if (ret == 0) {
1211 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1212 goto success;
1213 }
1214
1215 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1216 "boot did not find a pre calibration file, try DT next: %d\n",
1217 ret);
1218
1219 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1220 if (ret) {
1221 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1222 "unable to load pre cal data from DT: %d\n", ret);
1223 return ret;
1224 }
1225 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1226
1227success:
1228 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1229 ath10k_cal_mode_str(ar->cal_mode));
1230
1231 return 0;
1232}
1233
1234static int ath10k_core_pre_cal_config(struct ath10k *ar)
1235{
1236 int ret;
1237
1238 ret = ath10k_core_pre_cal_download(ar);
1239 if (ret) {
1240 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1241 "failed to load pre cal data: %d\n", ret);
1242 return ret;
1243 }
1244
1245 ret = ath10k_core_get_board_id_from_otp(ar);
1246 if (ret) {
1247 ath10k_err(ar, "failed to get board id: %d\n", ret);
1248 return ret;
1249 }
1250
1251 ret = ath10k_download_and_run_otp(ar);
1252 if (ret) {
1253 ath10k_err(ar, "failed to run otp: %d\n", ret);
1254 return ret;
1255 }
1256
1257 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1258 "pre cal configuration done successfully\n");
1259
1260 return 0;
1261}
1262
83091559 1263static int ath10k_download_cal_data(struct ath10k *ar)
5e3dd157
KV
1264{
1265 int ret;
1266
3d9195ea
RM
1267 ret = ath10k_core_pre_cal_config(ar);
1268 if (ret == 0)
1269 return 0;
1270
1271 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1272 "pre cal download procedure failed, try cal file: %d\n",
1273 ret);
1274
f454add4 1275 ret = ath10k_download_cal_file(ar, ar->cal_file);
a58227ef
KV
1276 if (ret == 0) {
1277 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1278 goto done;
1279 }
1280
1281 ath10k_dbg(ar, ATH10K_DBG_BOOT,
5aabff05
TK
1282 "boot did not find a calibration file, try DT next: %d\n",
1283 ret);
1284
f454add4 1285 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
5aabff05
TK
1286 if (ret == 0) {
1287 ar->cal_mode = ATH10K_CAL_MODE_DT;
1288 goto done;
1289 }
1290
1291 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1292 "boot did not find DT entry, try OTP next: %d\n",
a58227ef
KV
1293 ret);
1294
5e3dd157 1295 ret = ath10k_download_and_run_otp(ar);
36a8f413 1296 if (ret) {
7aa7a72a 1297 ath10k_err(ar, "failed to run otp: %d\n", ret);
5e3dd157 1298 return ret;
36a8f413 1299 }
5e3dd157 1300
a58227ef
KV
1301 ar->cal_mode = ATH10K_CAL_MODE_OTP;
1302
1303done:
1304 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1305 ath10k_cal_mode_str(ar->cal_mode));
1306 return 0;
5e3dd157
KV
1307}
1308
1309static int ath10k_init_uart(struct ath10k *ar)
1310{
1311 int ret;
1312
1313 /*
1314 * Explicitly setting UART prints to zero as target turns it on
1315 * based on scratch registers.
1316 */
1317 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1318 if (ret) {
7aa7a72a 1319 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
5e3dd157
KV
1320 return ret;
1321 }
1322
c8c39afe 1323 if (!uart_print)
5e3dd157 1324 return 0;
5e3dd157 1325
3a8200b2 1326 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
5e3dd157 1327 if (ret) {
7aa7a72a 1328 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
5e3dd157
KV
1329 return ret;
1330 }
1331
1332 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1333 if (ret) {
7aa7a72a 1334 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
5e3dd157
KV
1335 return ret;
1336 }
1337
03fc137b
BM
1338 /* Set the UART baud rate to 19200. */
1339 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1340 if (ret) {
7aa7a72a 1341 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
03fc137b
BM
1342 return ret;
1343 }
1344
7aa7a72a 1345 ath10k_info(ar, "UART prints enabled\n");
5e3dd157
KV
1346 return 0;
1347}
1348
1349static int ath10k_init_hw_params(struct ath10k *ar)
1350{
1351 const struct ath10k_hw_params *uninitialized_var(hw_params);
1352 int i;
1353
1354 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1355 hw_params = &ath10k_hw_params_list[i];
1356
079a0490
BM
1357 if (hw_params->id == ar->target_version &&
1358 hw_params->dev_id == ar->dev_id)
5e3dd157
KV
1359 break;
1360 }
1361
1362 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
7aa7a72a 1363 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
5e3dd157
KV
1364 ar->target_version);
1365 return -EINVAL;
1366 }
1367
1368 ar->hw_params = *hw_params;
1369
7aa7a72a 1370 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
c8c39afe 1371 ar->hw_params.name, ar->target_version);
5e3dd157
KV
1372
1373 return 0;
1374}
1375
affd3217
MK
1376static void ath10k_core_restart(struct work_struct *work)
1377{
1378 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1379
7962b0d8
MK
1380 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1381
1382 /* Place a barrier to make sure the compiler doesn't reorder
1383 * CRASH_FLUSH and calling other functions.
1384 */
1385 barrier();
1386
1387 ieee80211_stop_queues(ar->hw);
1388 ath10k_drain_tx(ar);
1389 complete_all(&ar->scan.started);
1390 complete_all(&ar->scan.completed);
1391 complete_all(&ar->scan.on_channel);
1392 complete_all(&ar->offchan_tx_completed);
1393 complete_all(&ar->install_key_done);
1394 complete_all(&ar->vdev_setup_done);
ac2953fc 1395 complete_all(&ar->thermal.wmi_sync);
7962b0d8
MK
1396 wake_up(&ar->htt.empty_tx_wq);
1397 wake_up(&ar->wmi.tx_credits_wq);
1398 wake_up(&ar->peer_mapping_wq);
1399
affd3217
MK
1400 mutex_lock(&ar->conf_mutex);
1401
1402 switch (ar->state) {
1403 case ATH10K_STATE_ON:
affd3217 1404 ar->state = ATH10K_STATE_RESTARTING;
61e9aab7 1405 ath10k_hif_stop(ar);
5c81c7fd 1406 ath10k_scan_finish(ar);
affd3217
MK
1407 ieee80211_restart_hw(ar->hw);
1408 break;
1409 case ATH10K_STATE_OFF:
5e90de86
MK
1410 /* this can happen if driver is being unloaded
1411 * or if the crash happens during FW probing */
7aa7a72a 1412 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
affd3217
MK
1413 break;
1414 case ATH10K_STATE_RESTARTING:
c5058f5b
MK
1415 /* hw restart might be requested from multiple places */
1416 break;
affd3217
MK
1417 case ATH10K_STATE_RESTARTED:
1418 ar->state = ATH10K_STATE_WEDGED;
1419 /* fall through */
1420 case ATH10K_STATE_WEDGED:
7aa7a72a 1421 ath10k_warn(ar, "device is wedged, will not restart\n");
affd3217 1422 break;
43d2a30f
KV
1423 case ATH10K_STATE_UTF:
1424 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1425 break;
affd3217
MK
1426 }
1427
1428 mutex_unlock(&ar->conf_mutex);
1429}
1430
5f2144d9 1431static int ath10k_core_init_firmware_features(struct ath10k *ar)
cfd1061e 1432{
5f2144d9
KV
1433 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
1434 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1435 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1436 return -EINVAL;
1437 }
1438
202e86e6
KV
1439 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1440 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1441 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
1442 return -EINVAL;
1443 }
1444
ccec9038
DL
1445 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1446 switch (ath10k_cryptmode_param) {
1447 case ATH10K_CRYPT_MODE_HW:
1448 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1449 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1450 break;
1451 case ATH10K_CRYPT_MODE_SW:
1452 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1453 ar->fw_features)) {
1454 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1455 return -EINVAL;
1456 }
1457
1458 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1459 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1460 break;
1461 default:
1462 ath10k_info(ar, "invalid cryptmode: %d\n",
1463 ath10k_cryptmode_param);
1464 return -EINVAL;
1465 }
1466
1467 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1468 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1469
b6c7bafa
BC
1470 if (rawmode) {
1471 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1472 ar->fw_features)) {
1473 ath10k_err(ar, "rawmode = 1 requires support from firmware");
1474 return -EINVAL;
1475 }
1476 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1477 }
1478
ccec9038
DL
1479 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1480 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1481
1482 /* Workaround:
1483 *
1484 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1485 * and causes enormous performance issues (malformed frames,
1486 * etc).
1487 *
1488 * Disabling A-MSDU makes RAW mode stable with heavy traffic
1489 * albeit a bit slower compared to regular operation.
1490 */
1491 ar->htt.max_num_amsdu = 1;
1492 }
1493
202e86e6
KV
1494 /* Backwards compatibility for firmwares without
1495 * ATH10K_FW_IE_WMI_OP_VERSION.
1496 */
1497 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1498 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4a16fbec
RM
1499 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1500 ar->fw_features))
202e86e6
KV
1501 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1502 else
1503 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1504 } else {
1505 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1506 }
1507 }
1508
1509 switch (ar->wmi.op_version) {
1510 case ATH10K_FW_WMI_OP_VERSION_MAIN:
cfd1061e
MK
1511 ar->max_num_peers = TARGET_NUM_PEERS;
1512 ar->max_num_stations = TARGET_NUM_STATIONS;
30c78167 1513 ar->max_num_vdevs = TARGET_NUM_VDEVS;
91ad5f56 1514 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
6274cd41
YL
1515 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1516 WMI_STAT_PEER;
5c8726ec 1517 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
202e86e6
KV
1518 break;
1519 case ATH10K_FW_WMI_OP_VERSION_10_1:
1520 case ATH10K_FW_WMI_OP_VERSION_10_2:
4a16fbec 1521 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
cc61a1bb 1522 if (ath10k_peer_stats_enabled(ar)) {
af9a6a3a
AK
1523 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1524 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1525 } else {
1526 ar->max_num_peers = TARGET_10X_NUM_PEERS;
1527 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1528 }
30c78167 1529 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
91ad5f56 1530 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
6274cd41 1531 ar->fw_stats_req_mask = WMI_STAT_PEER;
5c8726ec 1532 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
202e86e6 1533 break;
ca996ec5
MK
1534 case ATH10K_FW_WMI_OP_VERSION_TLV:
1535 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1536 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
49274332 1537 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
8cca3d60 1538 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
ca996ec5 1539 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
25c86619 1540 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
6274cd41
YL
1541 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1542 WMI_STAT_PEER;
5c8726ec 1543 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
ca996ec5 1544 break;
9bd21322 1545 case ATH10K_FW_WMI_OP_VERSION_10_4:
d1e52a8e
RM
1546 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1547 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1548 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1549 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1550 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
f9575793
MSS
1551 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1552 WMI_10_4_STAT_PEER_EXTD;
5699a6f2 1553 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
99ad1cba
MK
1554
1555 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1556 ar->fw_features))
1557 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1558 else
1559 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
d1e52a8e 1560 break;
202e86e6
KV
1561 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1562 case ATH10K_FW_WMI_OP_VERSION_MAX:
1563 WARN_ON(1);
1564 return -EINVAL;
cfd1061e 1565 }
5f2144d9 1566
dc3632a1
KV
1567 /* Backwards compatibility for firmwares without
1568 * ATH10K_FW_IE_HTT_OP_VERSION.
1569 */
1570 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1571 switch (ar->wmi.op_version) {
1572 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1573 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1574 break;
1575 case ATH10K_FW_WMI_OP_VERSION_10_1:
1576 case ATH10K_FW_WMI_OP_VERSION_10_2:
1577 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1578 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1579 break;
1580 case ATH10K_FW_WMI_OP_VERSION_TLV:
1581 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1582 break;
9bd21322 1583 case ATH10K_FW_WMI_OP_VERSION_10_4:
dc3632a1
KV
1584 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1585 case ATH10K_FW_WMI_OP_VERSION_MAX:
1586 WARN_ON(1);
1587 return -EINVAL;
1588 }
1589 }
1590
5f2144d9 1591 return 0;
cfd1061e
MK
1592}
1593
7ebf721d
KV
1594int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1595 const struct ath10k_fw_components *fw)
5e3dd157 1596{
5e3dd157 1597 int status;
f9575793 1598 u32 val;
5e3dd157 1599
60631c5c
KV
1600 lockdep_assert_held(&ar->conf_mutex);
1601
7962b0d8
MK
1602 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1603
7ebf721d
KV
1604 ar->running_fw = fw;
1605
64d151d4
MK
1606 ath10k_bmi_start(ar);
1607
5e3dd157
KV
1608 if (ath10k_init_configure_target(ar)) {
1609 status = -EINVAL;
1610 goto err;
1611 }
1612
83091559
KV
1613 status = ath10k_download_cal_data(ar);
1614 if (status)
1615 goto err;
1616
163f5264 1617 /* Some of of qca988x solutions are having global reset issue
617b0f4d
KV
1618 * during target initialization. Bypassing PLL setting before
1619 * downloading firmware and letting the SoC run on REF_CLK is
1620 * fixing the problem. Corresponding firmware change is also needed
1621 * to set the clock source once the target is initialized.
163f5264
RM
1622 */
1623 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1624 ar->fw_features)) {
1625 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1626 if (status) {
1627 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1628 status);
1629 goto err;
1630 }
1631 }
1632
7ebf721d 1633 status = ath10k_download_fw(ar);
5e3dd157
KV
1634 if (status)
1635 goto err;
1636
1637 status = ath10k_init_uart(ar);
1638 if (status)
1639 goto err;
1640
cd003fad
MK
1641 ar->htc.htc_ops.target_send_suspend_complete =
1642 ath10k_send_suspend_complete;
5e3dd157 1643
cd003fad
MK
1644 status = ath10k_htc_init(ar);
1645 if (status) {
7aa7a72a 1646 ath10k_err(ar, "could not init HTC (%d)\n", status);
5e3dd157
KV
1647 goto err;
1648 }
1649
1650 status = ath10k_bmi_done(ar);
1651 if (status)
cd003fad 1652 goto err;
5e3dd157
KV
1653
1654 status = ath10k_wmi_attach(ar);
1655 if (status) {
7aa7a72a 1656 ath10k_err(ar, "WMI attach failed: %d\n", status);
cd003fad 1657 goto err;
5e3dd157
KV
1658 }
1659
95bf21f9
MK
1660 status = ath10k_htt_init(ar);
1661 if (status) {
7aa7a72a 1662 ath10k_err(ar, "failed to init htt: %d\n", status);
95bf21f9
MK
1663 goto err_wmi_detach;
1664 }
1665
1666 status = ath10k_htt_tx_alloc(&ar->htt);
1667 if (status) {
7aa7a72a 1668 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
95bf21f9
MK
1669 goto err_wmi_detach;
1670 }
1671
1672 status = ath10k_htt_rx_alloc(&ar->htt);
1673 if (status) {
7aa7a72a 1674 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
95bf21f9
MK
1675 goto err_htt_tx_detach;
1676 }
1677
67e3c63f
MK
1678 status = ath10k_hif_start(ar);
1679 if (status) {
7aa7a72a 1680 ath10k_err(ar, "could not start HIF: %d\n", status);
95bf21f9 1681 goto err_htt_rx_detach;
67e3c63f
MK
1682 }
1683
1684 status = ath10k_htc_wait_target(&ar->htc);
1685 if (status) {
7aa7a72a 1686 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
67e3c63f
MK
1687 goto err_hif_stop;
1688 }
5e3dd157 1689
43d2a30f
KV
1690 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1691 status = ath10k_htt_connect(&ar->htt);
1692 if (status) {
1693 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1694 goto err_hif_stop;
1695 }
5e3dd157
KV
1696 }
1697
95bf21f9
MK
1698 status = ath10k_wmi_connect(ar);
1699 if (status) {
7aa7a72a 1700 ath10k_err(ar, "could not connect wmi: %d\n", status);
95bf21f9
MK
1701 goto err_hif_stop;
1702 }
1703
1704 status = ath10k_htc_start(&ar->htc);
1705 if (status) {
7aa7a72a 1706 ath10k_err(ar, "failed to start htc: %d\n", status);
95bf21f9
MK
1707 goto err_hif_stop;
1708 }
1709
43d2a30f
KV
1710 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1711 status = ath10k_wmi_wait_for_service_ready(ar);
9eea5689 1712 if (status) {
43d2a30f 1713 ath10k_warn(ar, "wmi service ready event not received");
43d2a30f
KV
1714 goto err_hif_stop;
1715 }
95bf21f9 1716 }
5e3dd157 1717
7aa7a72a 1718 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
c8c39afe 1719 ar->hw->wiphy->fw_version);
5e3dd157 1720
f9575793
MSS
1721 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) {
1722 val = 0;
1723 if (ath10k_peer_stats_enabled(ar))
1724 val = WMI_10_4_PEER_STATS;
1725
7e247a9e 1726 status = ath10k_mac_ext_resource_config(ar, val);
f9575793
MSS
1727 if (status) {
1728 ath10k_err(ar,
1729 "failed to send ext resource cfg command : %d\n",
1730 status);
1731 goto err_hif_stop;
1732 }
1733 }
1734
5e3dd157
KV
1735 status = ath10k_wmi_cmd_init(ar);
1736 if (status) {
7aa7a72a
MK
1737 ath10k_err(ar, "could not send WMI init command (%d)\n",
1738 status);
b7967dc7 1739 goto err_hif_stop;
5e3dd157
KV
1740 }
1741
1742 status = ath10k_wmi_wait_for_unified_ready(ar);
9eea5689 1743 if (status) {
7aa7a72a 1744 ath10k_err(ar, "wmi unified ready event not received\n");
b7967dc7 1745 goto err_hif_stop;
5e3dd157
KV
1746 }
1747
c545070e
MK
1748 /* If firmware indicates Full Rx Reorder support it must be used in a
1749 * slightly different manner. Let HTT code know.
1750 */
1751 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1752 ar->wmi.svc_map));
1753
1754 status = ath10k_htt_rx_ring_refill(ar);
1755 if (status) {
1756 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1757 goto err_hif_stop;
1758 }
1759
43d2a30f
KV
1760 /* we don't care about HTT in UTF mode */
1761 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1762 status = ath10k_htt_setup(&ar->htt);
1763 if (status) {
1764 ath10k_err(ar, "failed to setup htt: %d\n", status);
1765 goto err_hif_stop;
1766 }
95bf21f9 1767 }
5e3dd157 1768
db66ea04
KV
1769 status = ath10k_debug_start(ar);
1770 if (status)
b7967dc7 1771 goto err_hif_stop;
db66ea04 1772
30c78167 1773 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
dfa413de 1774
0579119f 1775 INIT_LIST_HEAD(&ar->arvifs);
1a1b8a88 1776
dd30a36e
MK
1777 return 0;
1778
67e3c63f
MK
1779err_hif_stop:
1780 ath10k_hif_stop(ar);
95bf21f9
MK
1781err_htt_rx_detach:
1782 ath10k_htt_rx_free(&ar->htt);
1783err_htt_tx_detach:
1784 ath10k_htt_tx_free(&ar->htt);
dd30a36e
MK
1785err_wmi_detach:
1786 ath10k_wmi_detach(ar);
1787err:
1788 return status;
1789}
818bdd16 1790EXPORT_SYMBOL(ath10k_core_start);
dd30a36e 1791
00f5482b
MP
1792int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1793{
1794 int ret;
a7a42849 1795 unsigned long time_left;
00f5482b
MP
1796
1797 reinit_completion(&ar->target_suspend);
1798
1799 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1800 if (ret) {
7aa7a72a 1801 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
00f5482b
MP
1802 return ret;
1803 }
1804
a7a42849 1805 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
00f5482b 1806
a7a42849 1807 if (!time_left) {
7aa7a72a 1808 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
00f5482b
MP
1809 return -ETIMEDOUT;
1810 }
1811
1812 return 0;
1813}
1814
dd30a36e
MK
1815void ath10k_core_stop(struct ath10k *ar)
1816{
60631c5c 1817 lockdep_assert_held(&ar->conf_mutex);
f1ee2682 1818 ath10k_debug_stop(ar);
60631c5c 1819
00f5482b 1820 /* try to suspend target */
43d2a30f
KV
1821 if (ar->state != ATH10K_STATE_RESTARTING &&
1822 ar->state != ATH10K_STATE_UTF)
216a1836
MK
1823 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1824
95bf21f9
MK
1825 ath10k_hif_stop(ar);
1826 ath10k_htt_tx_free(&ar->htt);
1827 ath10k_htt_rx_free(&ar->htt);
dd30a36e
MK
1828 ath10k_wmi_detach(ar);
1829}
818bdd16
MK
1830EXPORT_SYMBOL(ath10k_core_stop);
1831
1832/* mac80211 manages fw/hw initialization through start/stop hooks. However in
1833 * order to know what hw capabilities should be advertised to mac80211 it is
1834 * necessary to load the firmware (and tear it down immediately since start
1835 * hook will try to init it again) before registering */
1836static int ath10k_core_probe_fw(struct ath10k *ar)
1837{
29385057
MK
1838 struct bmi_target_info target_info;
1839 int ret = 0;
818bdd16
MK
1840
1841 ret = ath10k_hif_power_up(ar);
1842 if (ret) {
7aa7a72a 1843 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
818bdd16
MK
1844 return ret;
1845 }
1846
29385057
MK
1847 memset(&target_info, 0, sizeof(target_info));
1848 ret = ath10k_bmi_get_target_info(ar, &target_info);
1849 if (ret) {
7aa7a72a 1850 ath10k_err(ar, "could not get target info (%d)\n", ret);
c6ce492d 1851 goto err_power_down;
29385057
MK
1852 }
1853
1854 ar->target_version = target_info.version;
1855 ar->hw->wiphy->hw_version = target_info.version;
1856
1857 ret = ath10k_init_hw_params(ar);
1858 if (ret) {
7aa7a72a 1859 ath10k_err(ar, "could not get hw params (%d)\n", ret);
c6ce492d 1860 goto err_power_down;
29385057
MK
1861 }
1862
1863 ret = ath10k_core_fetch_firmware_files(ar);
1864 if (ret) {
7aa7a72a 1865 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
c6ce492d 1866 goto err_power_down;
29385057
MK
1867 }
1868
23f591ea
KV
1869 ath10k_debug_print_hwfw_info(ar);
1870
3d9195ea
RM
1871 ret = ath10k_core_pre_cal_download(ar);
1872 if (ret) {
1873 /* pre calibration data download is not necessary
1874 * for all the chipsets. Ignore failures and continue.
1875 */
1876 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1877 "could not load pre cal data: %d\n", ret);
1878 }
1879
db0984e5
MP
1880 ret = ath10k_core_get_board_id_from_otp(ar);
1881 if (ret && ret != -EOPNOTSUPP) {
b091f369 1882 ath10k_err(ar, "failed to get board id from otp: %d\n",
db0984e5 1883 ret);
b9c191be 1884 goto err_free_firmware_files;
db0984e5
MP
1885 }
1886
1887 ret = ath10k_core_fetch_board_file(ar);
1888 if (ret) {
1889 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
1890 goto err_free_firmware_files;
1891 }
1892
23f591ea
KV
1893 ath10k_debug_print_board_info(ar);
1894
5f2144d9
KV
1895 ret = ath10k_core_init_firmware_features(ar);
1896 if (ret) {
1897 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1898 ret);
1899 goto err_free_firmware_files;
1900 }
cfd1061e 1901
dcb02db1
VT
1902 ret = ath10k_swap_code_seg_init(ar);
1903 if (ret) {
1904 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
1905 ret);
1906 goto err_free_firmware_files;
1907 }
1908
60631c5c
KV
1909 mutex_lock(&ar->conf_mutex);
1910
7ebf721d
KV
1911 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
1912 &ar->normal_mode_fw);
818bdd16 1913 if (ret) {
7aa7a72a 1914 ath10k_err(ar, "could not init core (%d)\n", ret);
c6ce492d 1915 goto err_unlock;
818bdd16
MK
1916 }
1917
23f591ea 1918 ath10k_debug_print_boot_info(ar);
818bdd16 1919 ath10k_core_stop(ar);
60631c5c
KV
1920
1921 mutex_unlock(&ar->conf_mutex);
1922
818bdd16
MK
1923 ath10k_hif_power_down(ar);
1924 return 0;
c6ce492d
KV
1925
1926err_unlock:
1927 mutex_unlock(&ar->conf_mutex);
1928
5f2144d9 1929err_free_firmware_files:
c6ce492d
KV
1930 ath10k_core_free_firmware_files(ar);
1931
1932err_power_down:
1933 ath10k_hif_power_down(ar);
1934
1935 return ret;
818bdd16 1936}
dd30a36e 1937
6782cb69 1938static void ath10k_core_register_work(struct work_struct *work)
dd30a36e 1939{
6782cb69 1940 struct ath10k *ar = container_of(work, struct ath10k, register_work);
dd30a36e
MK
1941 int status;
1942
818bdd16
MK
1943 status = ath10k_core_probe_fw(ar);
1944 if (status) {
7aa7a72a 1945 ath10k_err(ar, "could not probe fw (%d)\n", status);
6782cb69 1946 goto err;
818bdd16 1947 }
dd30a36e 1948
5e3dd157 1949 status = ath10k_mac_register(ar);
818bdd16 1950 if (status) {
7aa7a72a 1951 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
29385057 1952 goto err_release_fw;
818bdd16 1953 }
5e3dd157 1954
e13cf7a3 1955 status = ath10k_debug_register(ar);
5e3dd157 1956 if (status) {
7aa7a72a 1957 ath10k_err(ar, "unable to initialize debugfs\n");
5e3dd157
KV
1958 goto err_unregister_mac;
1959 }
1960
855aed12
SW
1961 status = ath10k_spectral_create(ar);
1962 if (status) {
7aa7a72a 1963 ath10k_err(ar, "failed to initialize spectral\n");
855aed12
SW
1964 goto err_debug_destroy;
1965 }
1966
fe6f36d6
RM
1967 status = ath10k_thermal_register(ar);
1968 if (status) {
1969 ath10k_err(ar, "could not register thermal device: %d\n",
1970 status);
1971 goto err_spectral_destroy;
1972 }
1973
6782cb69
MK
1974 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1975 return;
5e3dd157 1976
fe6f36d6
RM
1977err_spectral_destroy:
1978 ath10k_spectral_destroy(ar);
855aed12
SW
1979err_debug_destroy:
1980 ath10k_debug_destroy(ar);
5e3dd157
KV
1981err_unregister_mac:
1982 ath10k_mac_unregister(ar);
29385057
MK
1983err_release_fw:
1984 ath10k_core_free_firmware_files(ar);
6782cb69 1985err:
a491a920
MK
1986 /* TODO: It's probably a good idea to release device from the driver
1987 * but calling device_release_driver() here will cause a deadlock.
1988 */
6782cb69
MK
1989 return;
1990}
1991
1992int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1993{
6782cb69 1994 ar->chip_id = chip_id;
6782cb69
MK
1995 queue_work(ar->workqueue, &ar->register_work);
1996
1997 return 0;
5e3dd157
KV
1998}
1999EXPORT_SYMBOL(ath10k_core_register);
2000
2001void ath10k_core_unregister(struct ath10k *ar)
2002{
6782cb69
MK
2003 cancel_work_sync(&ar->register_work);
2004
2005 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2006 return;
2007
fe6f36d6 2008 ath10k_thermal_unregister(ar);
804eef14
SW
2009 /* Stop spectral before unregistering from mac80211 to remove the
2010 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2011 * would be already be free'd recursively, leading to a double free.
2012 */
2013 ath10k_spectral_destroy(ar);
2014
5e3dd157
KV
2015 /* We must unregister from mac80211 before we stop HTC and HIF.
2016 * Otherwise we will fail to submit commands to FW and mac80211 will be
2017 * unhappy about callback failures. */
2018 ath10k_mac_unregister(ar);
db66ea04 2019
43d2a30f
KV
2020 ath10k_testmode_destroy(ar);
2021
29385057 2022 ath10k_core_free_firmware_files(ar);
0a51b343 2023 ath10k_core_free_board_files(ar);
6f1f56ea 2024
e13cf7a3 2025 ath10k_debug_unregister(ar);
5e3dd157
KV
2026}
2027EXPORT_SYMBOL(ath10k_core_unregister);
2028
e7b54194 2029struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
e07db352 2030 enum ath10k_bus bus,
d63955b3 2031 enum ath10k_hw_rev hw_rev,
0d0a6939
MK
2032 const struct ath10k_hif_ops *hif_ops)
2033{
2034 struct ath10k *ar;
e13cf7a3 2035 int ret;
0d0a6939 2036
e7b54194 2037 ar = ath10k_mac_create(priv_size);
0d0a6939
MK
2038 if (!ar)
2039 return NULL;
2040
2041 ar->ath_common.priv = ar;
2042 ar->ath_common.hw = ar->hw;
0d0a6939 2043 ar->dev = dev;
d63955b3 2044 ar->hw_rev = hw_rev;
0d0a6939 2045 ar->hif.ops = hif_ops;
e07db352 2046 ar->hif.bus = bus;
0d0a6939 2047
d63955b3
MK
2048 switch (hw_rev) {
2049 case ATH10K_HW_QCA988X:
2050 ar->regs = &qca988x_regs;
2f2cfc4a 2051 ar->hw_values = &qca988x_values;
d63955b3
MK
2052 break;
2053 case ATH10K_HW_QCA6174:
a226b519 2054 case ATH10K_HW_QCA9377:
d63955b3 2055 ar->regs = &qca6174_regs;
2f2cfc4a 2056 ar->hw_values = &qca6174_values;
d63955b3 2057 break;
8bd47021
VT
2058 case ATH10K_HW_QCA99X0:
2059 ar->regs = &qca99x0_regs;
2060 ar->hw_values = &qca99x0_values;
2061 break;
37a219a5
RM
2062 case ATH10K_HW_QCA4019:
2063 ar->regs = &qca4019_regs;
2064 ar->hw_values = &qca4019_values;
2065 break;
d63955b3
MK
2066 default:
2067 ath10k_err(ar, "unsupported core hardware revision %d\n",
2068 hw_rev);
2069 ret = -ENOTSUPP;
2070 goto err_free_mac;
2071 }
2072
0d0a6939
MK
2073 init_completion(&ar->scan.started);
2074 init_completion(&ar->scan.completed);
2075 init_completion(&ar->scan.on_channel);
2076 init_completion(&ar->target_suspend);
5fd3ac3c 2077 init_completion(&ar->wow.wakeup_completed);
0d0a6939
MK
2078
2079 init_completion(&ar->install_key_done);
2080 init_completion(&ar->vdev_setup_done);
ac2953fc 2081 init_completion(&ar->thermal.wmi_sync);
0d0a6939 2082
5c81c7fd 2083 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
0d0a6939
MK
2084
2085 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2086 if (!ar->workqueue)
e13cf7a3 2087 goto err_free_mac;
0d0a6939 2088
c8ecfc1c
RM
2089 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2090 if (!ar->workqueue_aux)
2091 goto err_free_wq;
2092
0d0a6939
MK
2093 mutex_init(&ar->conf_mutex);
2094 spin_lock_init(&ar->data_lock);
29946878 2095 spin_lock_init(&ar->txqs_lock);
0d0a6939 2096
29946878 2097 INIT_LIST_HEAD(&ar->txqs);
0d0a6939
MK
2098 INIT_LIST_HEAD(&ar->peers);
2099 init_waitqueue_head(&ar->peer_mapping_wq);
7962b0d8
MK
2100 init_waitqueue_head(&ar->htt.empty_tx_wq);
2101 init_waitqueue_head(&ar->wmi.tx_credits_wq);
0d0a6939
MK
2102
2103 init_completion(&ar->offchan_tx_completed);
2104 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2105 skb_queue_head_init(&ar->offchan_tx_queue);
2106
2107 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2108 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2109
6782cb69 2110 INIT_WORK(&ar->register_work, ath10k_core_register_work);
0d0a6939
MK
2111 INIT_WORK(&ar->restart_work, ath10k_core_restart);
2112
e13cf7a3
MK
2113 ret = ath10k_debug_create(ar);
2114 if (ret)
c8ecfc1c 2115 goto err_free_aux_wq;
e13cf7a3 2116
0d0a6939
MK
2117 return ar;
2118
c8ecfc1c
RM
2119err_free_aux_wq:
2120 destroy_workqueue(ar->workqueue_aux);
e13cf7a3
MK
2121err_free_wq:
2122 destroy_workqueue(ar->workqueue);
2123
2124err_free_mac:
0d0a6939 2125 ath10k_mac_destroy(ar);
e13cf7a3 2126
0d0a6939
MK
2127 return NULL;
2128}
2129EXPORT_SYMBOL(ath10k_core_create);
2130
2131void ath10k_core_destroy(struct ath10k *ar)
2132{
2133 flush_workqueue(ar->workqueue);
2134 destroy_workqueue(ar->workqueue);
2135
c8ecfc1c
RM
2136 flush_workqueue(ar->workqueue_aux);
2137 destroy_workqueue(ar->workqueue_aux);
2138
e13cf7a3 2139 ath10k_debug_destroy(ar);
a925a376 2140 ath10k_wmi_free_host_mem(ar);
0d0a6939
MK
2141 ath10k_mac_destroy(ar);
2142}
2143EXPORT_SYMBOL(ath10k_core_destroy);
2144
5e3dd157
KV
2145MODULE_AUTHOR("Qualcomm Atheros");
2146MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
2147MODULE_LICENSE("Dual BSD/GPL");