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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
d7579d12 | 31 | #include "wmi-ops.h" |
5e3dd157 KV |
32 | |
33 | unsigned int ath10k_debug_mask; | |
34 | static bool uart_print; | |
8868b12c RM |
35 | static bool skip_otp; |
36 | ||
5e3dd157 KV |
37 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
38 | module_param(uart_print, bool, 0644); | |
8868b12c RM |
39 | module_param(skip_otp, bool, 0644); |
40 | ||
5e3dd157 KV |
41 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
42 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
8868b12c | 43 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
5e3dd157 KV |
44 | |
45 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
46 | { |
47 | .id = QCA988X_HW_2_0_VERSION, | |
48 | .name = "qca988x hw2.0", | |
49 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 50 | .uart_pin = 7, |
5e3dd157 KV |
51 | .fw = { |
52 | .dir = QCA988X_HW_2_0_FW_DIR, | |
53 | .fw = QCA988X_HW_2_0_FW_FILE, | |
54 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
55 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
56 | .board_size = QCA988X_BOARD_DATA_SZ, |
57 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
58 | }, |
59 | }, | |
60 | }; | |
61 | ||
62 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
63 | { | |
7aa7a72a | 64 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 65 | |
9042e17d | 66 | complete(&ar->target_suspend); |
5e3dd157 KV |
67 | } |
68 | ||
5e3dd157 KV |
69 | static int ath10k_init_configure_target(struct ath10k *ar) |
70 | { | |
71 | u32 param_host; | |
72 | int ret; | |
73 | ||
74 | /* tell target which HTC version it is used*/ | |
75 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
76 | HTC_PROTOCOL_VERSION); | |
77 | if (ret) { | |
7aa7a72a | 78 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
79 | return ret; |
80 | } | |
81 | ||
82 | /* set the firmware mode to STA/IBSS/AP */ | |
83 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
84 | if (ret) { | |
7aa7a72a | 85 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
86 | return ret; |
87 | } | |
88 | ||
89 | /* TODO following parameters need to be re-visited. */ | |
90 | /* num_device */ | |
91 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
92 | /* Firmware mode */ | |
93 | /* FIXME: Why FW_MODE_AP ??.*/ | |
94 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
95 | /* mac_addr_method */ | |
96 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
97 | /* firmware_bridge */ | |
98 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
99 | /* fwsubmode */ | |
100 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
101 | ||
102 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
103 | if (ret) { | |
7aa7a72a | 104 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
105 | return ret; |
106 | } | |
107 | ||
108 | /* We do all byte-swapping on the host */ | |
109 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
110 | if (ret) { | |
7aa7a72a | 111 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
112 | return ret; |
113 | } | |
114 | ||
115 | /* FW descriptor/Data swap flags */ | |
116 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
117 | ||
118 | if (ret) { | |
7aa7a72a | 119 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
120 | return ret; |
121 | } | |
122 | ||
123 | return 0; | |
124 | } | |
125 | ||
126 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
127 | const char *dir, | |
128 | const char *file) | |
129 | { | |
130 | char filename[100]; | |
131 | const struct firmware *fw; | |
132 | int ret; | |
133 | ||
134 | if (file == NULL) | |
135 | return ERR_PTR(-ENOENT); | |
136 | ||
137 | if (dir == NULL) | |
138 | dir = "."; | |
139 | ||
140 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
141 | ret = request_firmware(&fw, filename, ar->dev); | |
142 | if (ret) | |
143 | return ERR_PTR(ret); | |
144 | ||
145 | return fw; | |
146 | } | |
147 | ||
a58227ef KV |
148 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
149 | size_t data_len) | |
5e3dd157 | 150 | { |
9764a2af MK |
151 | u32 board_data_size = ar->hw_params.fw.board_size; |
152 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
153 | u32 board_ext_data_addr; |
154 | int ret; | |
155 | ||
156 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
157 | if (ret) { | |
7aa7a72a MK |
158 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
159 | ret); | |
5e3dd157 KV |
160 | return ret; |
161 | } | |
162 | ||
7aa7a72a | 163 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 164 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
165 | board_ext_data_addr); |
166 | ||
167 | if (board_ext_data_addr == 0) | |
168 | return 0; | |
169 | ||
a58227ef | 170 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 171 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 172 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
173 | return -EINVAL; |
174 | } | |
175 | ||
176 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 177 | data + board_data_size, |
5e3dd157 KV |
178 | board_ext_data_size); |
179 | if (ret) { | |
7aa7a72a | 180 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
181 | return ret; |
182 | } | |
183 | ||
184 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
185 | (board_ext_data_size << 16) | 1); | |
186 | if (ret) { | |
7aa7a72a MK |
187 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
188 | ret); | |
5e3dd157 KV |
189 | return ret; |
190 | } | |
191 | ||
192 | return 0; | |
193 | } | |
194 | ||
a58227ef KV |
195 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
196 | size_t data_len) | |
5e3dd157 | 197 | { |
9764a2af | 198 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 199 | u32 address; |
5e3dd157 KV |
200 | int ret; |
201 | ||
a58227ef | 202 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 203 | if (ret) { |
7aa7a72a | 204 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
205 | goto exit; |
206 | } | |
207 | ||
208 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
209 | if (ret) { | |
7aa7a72a | 210 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
211 | goto exit; |
212 | } | |
213 | ||
a58227ef | 214 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 215 | min_t(u32, board_data_size, |
a58227ef | 216 | data_len)); |
5e3dd157 | 217 | if (ret) { |
7aa7a72a | 218 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
219 | goto exit; |
220 | } | |
221 | ||
222 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
223 | if (ret) { | |
7aa7a72a | 224 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
225 | goto exit; |
226 | } | |
227 | ||
228 | exit: | |
5e3dd157 KV |
229 | return ret; |
230 | } | |
231 | ||
a58227ef KV |
232 | static int ath10k_download_cal_file(struct ath10k *ar) |
233 | { | |
234 | int ret; | |
235 | ||
236 | if (!ar->cal_file) | |
237 | return -ENOENT; | |
238 | ||
239 | if (IS_ERR(ar->cal_file)) | |
240 | return PTR_ERR(ar->cal_file); | |
241 | ||
242 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
243 | ar->cal_file->size); | |
244 | if (ret) { | |
245 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
246 | return ret; | |
247 | } | |
248 | ||
249 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
250 | ||
251 | return 0; | |
252 | } | |
253 | ||
5aabff05 TK |
254 | static int ath10k_download_cal_dt(struct ath10k *ar) |
255 | { | |
256 | struct device_node *node; | |
257 | int data_len; | |
258 | void *data; | |
259 | int ret; | |
260 | ||
261 | node = ar->dev->of_node; | |
262 | if (!node) | |
263 | /* Device Tree is optional, don't print any warnings if | |
264 | * there's no node for ath10k. | |
265 | */ | |
266 | return -ENOENT; | |
267 | ||
268 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
269 | &data_len)) { | |
270 | /* The calibration data node is optional */ | |
271 | return -ENOENT; | |
272 | } | |
273 | ||
274 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
275 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
276 | data_len); | |
277 | ret = -EMSGSIZE; | |
278 | goto out; | |
279 | } | |
280 | ||
281 | data = kmalloc(data_len, GFP_KERNEL); | |
282 | if (!data) { | |
283 | ret = -ENOMEM; | |
284 | goto out; | |
285 | } | |
286 | ||
287 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
288 | data, data_len); | |
289 | if (ret) { | |
290 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
291 | ret); | |
292 | goto out_free; | |
293 | } | |
294 | ||
295 | ret = ath10k_download_board_data(ar, data, data_len); | |
296 | if (ret) { | |
297 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
298 | ret); | |
299 | goto out_free; | |
300 | } | |
301 | ||
302 | ret = 0; | |
303 | ||
304 | out_free: | |
305 | kfree(data); | |
306 | ||
307 | out: | |
308 | return ret; | |
309 | } | |
310 | ||
5e3dd157 KV |
311 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
312 | { | |
d6d4a58d | 313 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
314 | int ret; |
315 | ||
a58227ef | 316 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
317 | if (ret) { |
318 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
319 | return ret; | |
320 | } | |
321 | ||
5e3dd157 KV |
322 | /* OTP is optional */ |
323 | ||
7f06ea1e | 324 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 325 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 326 | ar->otp_data, ar->otp_len); |
5e3dd157 | 327 | return 0; |
7f06ea1e KV |
328 | } |
329 | ||
7aa7a72a | 330 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 331 | address, ar->otp_len); |
5e3dd157 | 332 | |
958df3a0 | 333 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 334 | if (ret) { |
7aa7a72a | 335 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 336 | return ret; |
5e3dd157 KV |
337 | } |
338 | ||
d6d4a58d | 339 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 340 | if (ret) { |
7aa7a72a | 341 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 342 | return ret; |
5e3dd157 KV |
343 | } |
344 | ||
7aa7a72a | 345 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 346 | |
8868b12c | 347 | if (!skip_otp && result != 0) { |
7aa7a72a | 348 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
349 | return -EINVAL; |
350 | } | |
351 | ||
352 | return 0; | |
5e3dd157 KV |
353 | } |
354 | ||
43d2a30f | 355 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 356 | { |
43d2a30f KV |
357 | u32 address, data_len; |
358 | const char *mode_name; | |
359 | const void *data; | |
5e3dd157 KV |
360 | int ret; |
361 | ||
5e3dd157 KV |
362 | address = ar->hw_params.patch_load_addr; |
363 | ||
43d2a30f KV |
364 | switch (mode) { |
365 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
366 | data = ar->firmware_data; | |
367 | data_len = ar->firmware_len; | |
368 | mode_name = "normal"; | |
369 | break; | |
370 | case ATH10K_FIRMWARE_MODE_UTF: | |
371 | data = ar->testmode.utf->data; | |
372 | data_len = ar->testmode.utf->size; | |
373 | mode_name = "utf"; | |
374 | break; | |
375 | default: | |
376 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
377 | return -EINVAL; | |
378 | } | |
379 | ||
380 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
381 | "boot uploading firmware image %p len %d mode %s\n", | |
382 | data, data_len, mode_name); | |
383 | ||
384 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 385 | if (ret) { |
43d2a30f KV |
386 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
387 | mode_name, ret); | |
388 | return ret; | |
5e3dd157 KV |
389 | } |
390 | ||
29385057 MK |
391 | return ret; |
392 | } | |
393 | ||
394 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
395 | { | |
36527916 KV |
396 | if (ar->board && !IS_ERR(ar->board)) |
397 | release_firmware(ar->board); | |
29385057 MK |
398 | |
399 | if (ar->otp && !IS_ERR(ar->otp)) | |
400 | release_firmware(ar->otp); | |
401 | ||
402 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
403 | release_firmware(ar->firmware); | |
404 | ||
a58227ef KV |
405 | if (ar->cal_file && !IS_ERR(ar->cal_file)) |
406 | release_firmware(ar->cal_file); | |
407 | ||
36527916 | 408 | ar->board = NULL; |
958df3a0 KV |
409 | ar->board_data = NULL; |
410 | ar->board_len = 0; | |
411 | ||
29385057 | 412 | ar->otp = NULL; |
958df3a0 KV |
413 | ar->otp_data = NULL; |
414 | ar->otp_len = 0; | |
415 | ||
29385057 | 416 | ar->firmware = NULL; |
958df3a0 KV |
417 | ar->firmware_data = NULL; |
418 | ar->firmware_len = 0; | |
a58227ef KV |
419 | |
420 | ar->cal_file = NULL; | |
421 | } | |
422 | ||
423 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
424 | { | |
425 | char filename[100]; | |
426 | ||
427 | /* cal-<bus>-<id>.bin */ | |
428 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
429 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
430 | ||
431 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
432 | if (IS_ERR(ar->cal_file)) | |
433 | /* calibration file is optional, don't print any warnings */ | |
434 | return PTR_ERR(ar->cal_file); | |
435 | ||
436 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
437 | ATH10K_FW_DIR, filename); | |
438 | ||
439 | return 0; | |
29385057 MK |
440 | } |
441 | ||
1a222435 | 442 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
443 | { |
444 | int ret = 0; | |
445 | ||
446 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 447 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
448 | return -EINVAL; |
449 | } | |
450 | ||
451 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 452 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
453 | return -EINVAL; |
454 | } | |
455 | ||
36527916 KV |
456 | ar->board = ath10k_fetch_fw_file(ar, |
457 | ar->hw_params.fw.dir, | |
458 | ar->hw_params.fw.board); | |
459 | if (IS_ERR(ar->board)) { | |
460 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 461 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
462 | goto err; |
463 | } | |
464 | ||
958df3a0 KV |
465 | ar->board_data = ar->board->data; |
466 | ar->board_len = ar->board->size; | |
467 | ||
29385057 MK |
468 | ar->firmware = ath10k_fetch_fw_file(ar, |
469 | ar->hw_params.fw.dir, | |
470 | ar->hw_params.fw.fw); | |
471 | if (IS_ERR(ar->firmware)) { | |
472 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 473 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
474 | goto err; |
475 | } | |
476 | ||
958df3a0 KV |
477 | ar->firmware_data = ar->firmware->data; |
478 | ar->firmware_len = ar->firmware->size; | |
479 | ||
29385057 MK |
480 | /* OTP may be undefined. If so, don't fetch it at all */ |
481 | if (ar->hw_params.fw.otp == NULL) | |
482 | return 0; | |
483 | ||
484 | ar->otp = ath10k_fetch_fw_file(ar, | |
485 | ar->hw_params.fw.dir, | |
486 | ar->hw_params.fw.otp); | |
487 | if (IS_ERR(ar->otp)) { | |
488 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 489 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
490 | goto err; |
491 | } | |
492 | ||
958df3a0 KV |
493 | ar->otp_data = ar->otp->data; |
494 | ar->otp_len = ar->otp->size; | |
495 | ||
29385057 MK |
496 | return 0; |
497 | ||
498 | err: | |
499 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
500 | return ret; |
501 | } | |
502 | ||
1a222435 KV |
503 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
504 | { | |
505 | size_t magic_len, len, ie_len; | |
506 | int ie_id, i, index, bit, ret; | |
507 | struct ath10k_fw_ie *hdr; | |
508 | const u8 *data; | |
202e86e6 | 509 | __le32 *timestamp, *version; |
1a222435 KV |
510 | |
511 | /* first fetch the firmware file (firmware-*.bin) */ | |
512 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
513 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 514 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 515 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
516 | return PTR_ERR(ar->firmware); |
517 | } | |
518 | ||
519 | data = ar->firmware->data; | |
520 | len = ar->firmware->size; | |
521 | ||
522 | /* magic also includes the null byte, check that as well */ | |
523 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
524 | ||
525 | if (len < magic_len) { | |
7aa7a72a | 526 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 527 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
528 | ret = -EINVAL; |
529 | goto err; | |
1a222435 KV |
530 | } |
531 | ||
532 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 533 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
534 | ret = -EINVAL; |
535 | goto err; | |
1a222435 KV |
536 | } |
537 | ||
538 | /* jump over the padding */ | |
539 | magic_len = ALIGN(magic_len, 4); | |
540 | ||
541 | len -= magic_len; | |
542 | data += magic_len; | |
543 | ||
544 | /* loop elements */ | |
545 | while (len > sizeof(struct ath10k_fw_ie)) { | |
546 | hdr = (struct ath10k_fw_ie *)data; | |
547 | ||
548 | ie_id = le32_to_cpu(hdr->id); | |
549 | ie_len = le32_to_cpu(hdr->len); | |
550 | ||
551 | len -= sizeof(*hdr); | |
552 | data += sizeof(*hdr); | |
553 | ||
554 | if (len < ie_len) { | |
7aa7a72a | 555 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 556 | ie_id, len, ie_len); |
9bab1cc0 MK |
557 | ret = -EINVAL; |
558 | goto err; | |
1a222435 KV |
559 | } |
560 | ||
561 | switch (ie_id) { | |
562 | case ATH10K_FW_IE_FW_VERSION: | |
563 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
564 | break; | |
565 | ||
566 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
567 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
568 | ||
7aa7a72a | 569 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
570 | "found fw version %s\n", |
571 | ar->hw->wiphy->fw_version); | |
572 | break; | |
573 | case ATH10K_FW_IE_TIMESTAMP: | |
574 | if (ie_len != sizeof(u32)) | |
575 | break; | |
576 | ||
577 | timestamp = (__le32 *)data; | |
578 | ||
7aa7a72a | 579 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
580 | le32_to_cpup(timestamp)); |
581 | break; | |
582 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 583 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
584 | "found firmware features ie (%zd B)\n", |
585 | ie_len); | |
586 | ||
587 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
588 | index = i / 8; | |
589 | bit = i % 8; | |
590 | ||
591 | if (index == ie_len) | |
592 | break; | |
593 | ||
f591a1a5 | 594 | if (data[index] & (1 << bit)) { |
7aa7a72a | 595 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
596 | "Enabling feature bit: %i\n", |
597 | i); | |
1a222435 | 598 | __set_bit(i, ar->fw_features); |
f591a1a5 | 599 | } |
1a222435 KV |
600 | } |
601 | ||
7aa7a72a | 602 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
603 | ar->fw_features, |
604 | sizeof(ar->fw_features)); | |
605 | break; | |
606 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 607 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
608 | "found fw image ie (%zd B)\n", |
609 | ie_len); | |
610 | ||
611 | ar->firmware_data = data; | |
612 | ar->firmware_len = ie_len; | |
613 | ||
614 | break; | |
615 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 616 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
617 | "found otp image ie (%zd B)\n", |
618 | ie_len); | |
619 | ||
620 | ar->otp_data = data; | |
621 | ar->otp_len = ie_len; | |
622 | ||
623 | break; | |
202e86e6 KV |
624 | case ATH10K_FW_IE_WMI_OP_VERSION: |
625 | if (ie_len != sizeof(u32)) | |
626 | break; | |
627 | ||
628 | version = (__le32 *)data; | |
629 | ||
630 | ar->wmi.op_version = le32_to_cpup(version); | |
631 | ||
632 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", | |
633 | ar->wmi.op_version); | |
634 | break; | |
1a222435 | 635 | default: |
7aa7a72a | 636 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
637 | le32_to_cpu(hdr->id)); |
638 | break; | |
639 | } | |
640 | ||
641 | /* jump over the padding */ | |
642 | ie_len = ALIGN(ie_len, 4); | |
643 | ||
644 | len -= ie_len; | |
645 | data += ie_len; | |
e05634ee | 646 | } |
1a222435 KV |
647 | |
648 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 649 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 650 | ar->hw_params.fw.dir, name); |
1a222435 KV |
651 | ret = -ENOMEDIUM; |
652 | goto err; | |
653 | } | |
654 | ||
655 | /* now fetch the board file */ | |
656 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 657 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
658 | ret = -EINVAL; |
659 | goto err; | |
660 | } | |
661 | ||
662 | ar->board = ath10k_fetch_fw_file(ar, | |
663 | ar->hw_params.fw.dir, | |
664 | ar->hw_params.fw.board); | |
665 | if (IS_ERR(ar->board)) { | |
666 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 667 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
668 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
669 | ret); | |
1a222435 KV |
670 | goto err; |
671 | } | |
672 | ||
673 | ar->board_data = ar->board->data; | |
674 | ar->board_len = ar->board->size; | |
675 | ||
676 | return 0; | |
677 | ||
678 | err: | |
679 | ath10k_core_free_firmware_files(ar); | |
680 | return ret; | |
681 | } | |
682 | ||
683 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
684 | { | |
685 | int ret; | |
686 | ||
a58227ef KV |
687 | /* calibration file is optional, don't check for any errors */ |
688 | ath10k_fetch_cal_file(ar); | |
689 | ||
4a16fbec RM |
690 | ar->fw_api = 4; |
691 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
692 | ||
693 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); | |
694 | if (ret == 0) | |
695 | goto success; | |
696 | ||
24c88f78 | 697 | ar->fw_api = 3; |
7aa7a72a | 698 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
699 | |
700 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
701 | if (ret == 0) | |
702 | goto success; | |
703 | ||
53c02284 | 704 | ar->fw_api = 2; |
7aa7a72a | 705 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 706 | |
1a222435 | 707 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
708 | if (ret == 0) |
709 | goto success; | |
710 | ||
711 | ar->fw_api = 1; | |
7aa7a72a | 712 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
713 | |
714 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
715 | if (ret) | |
716 | return ret; | |
717 | ||
53c02284 | 718 | success: |
7aa7a72a | 719 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
720 | |
721 | return 0; | |
722 | } | |
723 | ||
83091559 | 724 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
725 | { |
726 | int ret; | |
727 | ||
a58227ef KV |
728 | ret = ath10k_download_cal_file(ar); |
729 | if (ret == 0) { | |
730 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
731 | goto done; | |
732 | } | |
733 | ||
734 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
735 | "boot did not find a calibration file, try DT next: %d\n", |
736 | ret); | |
737 | ||
738 | ret = ath10k_download_cal_dt(ar); | |
739 | if (ret == 0) { | |
740 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
741 | goto done; | |
742 | } | |
743 | ||
744 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
745 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
746 | ret); |
747 | ||
5e3dd157 | 748 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 749 | if (ret) { |
7aa7a72a | 750 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 751 | return ret; |
36a8f413 | 752 | } |
5e3dd157 | 753 | |
a58227ef KV |
754 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
755 | ||
756 | done: | |
757 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
758 | ath10k_cal_mode_str(ar->cal_mode)); | |
759 | return 0; | |
5e3dd157 KV |
760 | } |
761 | ||
762 | static int ath10k_init_uart(struct ath10k *ar) | |
763 | { | |
764 | int ret; | |
765 | ||
766 | /* | |
767 | * Explicitly setting UART prints to zero as target turns it on | |
768 | * based on scratch registers. | |
769 | */ | |
770 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
771 | if (ret) { | |
7aa7a72a | 772 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
773 | return ret; |
774 | } | |
775 | ||
c8c39afe | 776 | if (!uart_print) |
5e3dd157 | 777 | return 0; |
5e3dd157 | 778 | |
3a8200b2 | 779 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 780 | if (ret) { |
7aa7a72a | 781 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
782 | return ret; |
783 | } | |
784 | ||
785 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
786 | if (ret) { | |
7aa7a72a | 787 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
788 | return ret; |
789 | } | |
790 | ||
03fc137b BM |
791 | /* Set the UART baud rate to 19200. */ |
792 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
793 | if (ret) { | |
7aa7a72a | 794 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
795 | return ret; |
796 | } | |
797 | ||
7aa7a72a | 798 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
799 | return 0; |
800 | } | |
801 | ||
802 | static int ath10k_init_hw_params(struct ath10k *ar) | |
803 | { | |
804 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
805 | int i; | |
806 | ||
807 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
808 | hw_params = &ath10k_hw_params_list[i]; | |
809 | ||
810 | if (hw_params->id == ar->target_version) | |
811 | break; | |
812 | } | |
813 | ||
814 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 815 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
816 | ar->target_version); |
817 | return -EINVAL; | |
818 | } | |
819 | ||
820 | ar->hw_params = *hw_params; | |
821 | ||
7aa7a72a | 822 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 823 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
824 | |
825 | return 0; | |
826 | } | |
827 | ||
affd3217 MK |
828 | static void ath10k_core_restart(struct work_struct *work) |
829 | { | |
830 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
831 | ||
7962b0d8 MK |
832 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
833 | ||
834 | /* Place a barrier to make sure the compiler doesn't reorder | |
835 | * CRASH_FLUSH and calling other functions. | |
836 | */ | |
837 | barrier(); | |
838 | ||
839 | ieee80211_stop_queues(ar->hw); | |
840 | ath10k_drain_tx(ar); | |
841 | complete_all(&ar->scan.started); | |
842 | complete_all(&ar->scan.completed); | |
843 | complete_all(&ar->scan.on_channel); | |
844 | complete_all(&ar->offchan_tx_completed); | |
845 | complete_all(&ar->install_key_done); | |
846 | complete_all(&ar->vdev_setup_done); | |
ac2953fc | 847 | complete_all(&ar->thermal.wmi_sync); |
7962b0d8 MK |
848 | wake_up(&ar->htt.empty_tx_wq); |
849 | wake_up(&ar->wmi.tx_credits_wq); | |
850 | wake_up(&ar->peer_mapping_wq); | |
851 | ||
affd3217 MK |
852 | mutex_lock(&ar->conf_mutex); |
853 | ||
854 | switch (ar->state) { | |
855 | case ATH10K_STATE_ON: | |
affd3217 | 856 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 857 | ath10k_hif_stop(ar); |
5c81c7fd | 858 | ath10k_scan_finish(ar); |
affd3217 MK |
859 | ieee80211_restart_hw(ar->hw); |
860 | break; | |
861 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
862 | /* this can happen if driver is being unloaded |
863 | * or if the crash happens during FW probing */ | |
7aa7a72a | 864 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
865 | break; |
866 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
867 | /* hw restart might be requested from multiple places */ |
868 | break; | |
affd3217 MK |
869 | case ATH10K_STATE_RESTARTED: |
870 | ar->state = ATH10K_STATE_WEDGED; | |
871 | /* fall through */ | |
872 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 873 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 874 | break; |
43d2a30f KV |
875 | case ATH10K_STATE_UTF: |
876 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
877 | break; | |
affd3217 MK |
878 | } |
879 | ||
880 | mutex_unlock(&ar->conf_mutex); | |
881 | } | |
882 | ||
5f2144d9 | 883 | static int ath10k_core_init_firmware_features(struct ath10k *ar) |
cfd1061e | 884 | { |
5f2144d9 KV |
885 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
886 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
887 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); | |
888 | return -EINVAL; | |
889 | } | |
890 | ||
202e86e6 KV |
891 | if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { |
892 | ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", | |
893 | ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); | |
894 | return -EINVAL; | |
895 | } | |
896 | ||
897 | /* Backwards compatibility for firmwares without | |
898 | * ATH10K_FW_IE_WMI_OP_VERSION. | |
899 | */ | |
900 | if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { | |
901 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
4a16fbec RM |
902 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, |
903 | ar->fw_features)) | |
202e86e6 KV |
904 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; |
905 | else | |
906 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; | |
907 | } else { | |
908 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; | |
909 | } | |
910 | } | |
911 | ||
912 | switch (ar->wmi.op_version) { | |
913 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
cfd1061e MK |
914 | ar->max_num_peers = TARGET_NUM_PEERS; |
915 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
30c78167 | 916 | ar->max_num_vdevs = TARGET_NUM_VDEVS; |
91ad5f56 | 917 | ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; |
202e86e6 KV |
918 | break; |
919 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
920 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
4a16fbec | 921 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
202e86e6 KV |
922 | ar->max_num_peers = TARGET_10X_NUM_PEERS; |
923 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
30c78167 | 924 | ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; |
91ad5f56 | 925 | ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; |
202e86e6 | 926 | break; |
ca996ec5 MK |
927 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
928 | ar->max_num_peers = TARGET_TLV_NUM_PEERS; | |
929 | ar->max_num_stations = TARGET_TLV_NUM_STATIONS; | |
49274332 | 930 | ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; |
ca996ec5 MK |
931 | ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; |
932 | break; | |
202e86e6 KV |
933 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
934 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
935 | WARN_ON(1); | |
936 | return -EINVAL; | |
cfd1061e | 937 | } |
5f2144d9 KV |
938 | |
939 | return 0; | |
cfd1061e MK |
940 | } |
941 | ||
43d2a30f | 942 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 943 | { |
5e3dd157 KV |
944 | int status; |
945 | ||
60631c5c KV |
946 | lockdep_assert_held(&ar->conf_mutex); |
947 | ||
7962b0d8 MK |
948 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
949 | ||
64d151d4 MK |
950 | ath10k_bmi_start(ar); |
951 | ||
5e3dd157 KV |
952 | if (ath10k_init_configure_target(ar)) { |
953 | status = -EINVAL; | |
954 | goto err; | |
955 | } | |
956 | ||
83091559 KV |
957 | status = ath10k_download_cal_data(ar); |
958 | if (status) | |
959 | goto err; | |
960 | ||
961 | status = ath10k_download_fw(ar, mode); | |
5e3dd157 KV |
962 | if (status) |
963 | goto err; | |
964 | ||
965 | status = ath10k_init_uart(ar); | |
966 | if (status) | |
967 | goto err; | |
968 | ||
cd003fad MK |
969 | ar->htc.htc_ops.target_send_suspend_complete = |
970 | ath10k_send_suspend_complete; | |
5e3dd157 | 971 | |
cd003fad MK |
972 | status = ath10k_htc_init(ar); |
973 | if (status) { | |
7aa7a72a | 974 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
975 | goto err; |
976 | } | |
977 | ||
978 | status = ath10k_bmi_done(ar); | |
979 | if (status) | |
cd003fad | 980 | goto err; |
5e3dd157 KV |
981 | |
982 | status = ath10k_wmi_attach(ar); | |
983 | if (status) { | |
7aa7a72a | 984 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 985 | goto err; |
5e3dd157 KV |
986 | } |
987 | ||
95bf21f9 MK |
988 | status = ath10k_htt_init(ar); |
989 | if (status) { | |
7aa7a72a | 990 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
991 | goto err_wmi_detach; |
992 | } | |
993 | ||
994 | status = ath10k_htt_tx_alloc(&ar->htt); | |
995 | if (status) { | |
7aa7a72a | 996 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
997 | goto err_wmi_detach; |
998 | } | |
999 | ||
1000 | status = ath10k_htt_rx_alloc(&ar->htt); | |
1001 | if (status) { | |
7aa7a72a | 1002 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
1003 | goto err_htt_tx_detach; |
1004 | } | |
1005 | ||
67e3c63f MK |
1006 | status = ath10k_hif_start(ar); |
1007 | if (status) { | |
7aa7a72a | 1008 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 1009 | goto err_htt_rx_detach; |
67e3c63f MK |
1010 | } |
1011 | ||
1012 | status = ath10k_htc_wait_target(&ar->htc); | |
1013 | if (status) { | |
7aa7a72a | 1014 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
1015 | goto err_hif_stop; |
1016 | } | |
5e3dd157 | 1017 | |
43d2a30f KV |
1018 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1019 | status = ath10k_htt_connect(&ar->htt); | |
1020 | if (status) { | |
1021 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
1022 | goto err_hif_stop; | |
1023 | } | |
5e3dd157 KV |
1024 | } |
1025 | ||
95bf21f9 MK |
1026 | status = ath10k_wmi_connect(ar); |
1027 | if (status) { | |
7aa7a72a | 1028 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
1029 | goto err_hif_stop; |
1030 | } | |
1031 | ||
1032 | status = ath10k_htc_start(&ar->htc); | |
1033 | if (status) { | |
7aa7a72a | 1034 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
1035 | goto err_hif_stop; |
1036 | } | |
1037 | ||
43d2a30f KV |
1038 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1039 | status = ath10k_wmi_wait_for_service_ready(ar); | |
1040 | if (status <= 0) { | |
1041 | ath10k_warn(ar, "wmi service ready event not received"); | |
1042 | status = -ETIMEDOUT; | |
1043 | goto err_hif_stop; | |
1044 | } | |
95bf21f9 | 1045 | } |
5e3dd157 | 1046 | |
7aa7a72a | 1047 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 1048 | ar->hw->wiphy->fw_version); |
5e3dd157 | 1049 | |
5e3dd157 KV |
1050 | status = ath10k_wmi_cmd_init(ar); |
1051 | if (status) { | |
7aa7a72a MK |
1052 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
1053 | status); | |
b7967dc7 | 1054 | goto err_hif_stop; |
5e3dd157 KV |
1055 | } |
1056 | ||
1057 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
1058 | if (status <= 0) { | |
7aa7a72a | 1059 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 1060 | status = -ETIMEDOUT; |
b7967dc7 | 1061 | goto err_hif_stop; |
5e3dd157 KV |
1062 | } |
1063 | ||
43d2a30f KV |
1064 | /* we don't care about HTT in UTF mode */ |
1065 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1066 | status = ath10k_htt_setup(&ar->htt); | |
1067 | if (status) { | |
1068 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1069 | goto err_hif_stop; | |
1070 | } | |
95bf21f9 | 1071 | } |
5e3dd157 | 1072 | |
db66ea04 KV |
1073 | status = ath10k_debug_start(ar); |
1074 | if (status) | |
b7967dc7 | 1075 | goto err_hif_stop; |
db66ea04 | 1076 | |
30c78167 | 1077 | ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; |
dfa413de | 1078 | |
0579119f | 1079 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1080 | |
dd30a36e MK |
1081 | return 0; |
1082 | ||
67e3c63f MK |
1083 | err_hif_stop: |
1084 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1085 | err_htt_rx_detach: |
1086 | ath10k_htt_rx_free(&ar->htt); | |
1087 | err_htt_tx_detach: | |
1088 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1089 | err_wmi_detach: |
1090 | ath10k_wmi_detach(ar); | |
1091 | err: | |
1092 | return status; | |
1093 | } | |
818bdd16 | 1094 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1095 | |
00f5482b MP |
1096 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1097 | { | |
1098 | int ret; | |
1099 | ||
1100 | reinit_completion(&ar->target_suspend); | |
1101 | ||
1102 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1103 | if (ret) { | |
7aa7a72a | 1104 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1105 | return ret; |
1106 | } | |
1107 | ||
1108 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
1109 | ||
1110 | if (ret == 0) { | |
7aa7a72a | 1111 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1112 | return -ETIMEDOUT; |
1113 | } | |
1114 | ||
1115 | return 0; | |
1116 | } | |
1117 | ||
dd30a36e MK |
1118 | void ath10k_core_stop(struct ath10k *ar) |
1119 | { | |
60631c5c KV |
1120 | lockdep_assert_held(&ar->conf_mutex); |
1121 | ||
00f5482b | 1122 | /* try to suspend target */ |
43d2a30f KV |
1123 | if (ar->state != ATH10K_STATE_RESTARTING && |
1124 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1125 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1126 | ||
db66ea04 | 1127 | ath10k_debug_stop(ar); |
95bf21f9 MK |
1128 | ath10k_hif_stop(ar); |
1129 | ath10k_htt_tx_free(&ar->htt); | |
1130 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1131 | ath10k_wmi_detach(ar); |
1132 | } | |
818bdd16 MK |
1133 | EXPORT_SYMBOL(ath10k_core_stop); |
1134 | ||
1135 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1136 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1137 | * necessary to load the firmware (and tear it down immediately since start | |
1138 | * hook will try to init it again) before registering */ | |
1139 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1140 | { | |
29385057 MK |
1141 | struct bmi_target_info target_info; |
1142 | int ret = 0; | |
818bdd16 MK |
1143 | |
1144 | ret = ath10k_hif_power_up(ar); | |
1145 | if (ret) { | |
7aa7a72a | 1146 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1147 | return ret; |
1148 | } | |
1149 | ||
29385057 MK |
1150 | memset(&target_info, 0, sizeof(target_info)); |
1151 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1152 | if (ret) { | |
7aa7a72a | 1153 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 1154 | goto err_power_down; |
29385057 MK |
1155 | } |
1156 | ||
1157 | ar->target_version = target_info.version; | |
1158 | ar->hw->wiphy->hw_version = target_info.version; | |
1159 | ||
1160 | ret = ath10k_init_hw_params(ar); | |
1161 | if (ret) { | |
7aa7a72a | 1162 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 1163 | goto err_power_down; |
29385057 MK |
1164 | } |
1165 | ||
1166 | ret = ath10k_core_fetch_firmware_files(ar); | |
1167 | if (ret) { | |
7aa7a72a | 1168 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 1169 | goto err_power_down; |
29385057 MK |
1170 | } |
1171 | ||
5f2144d9 KV |
1172 | ret = ath10k_core_init_firmware_features(ar); |
1173 | if (ret) { | |
1174 | ath10k_err(ar, "fatal problem with firmware features: %d\n", | |
1175 | ret); | |
1176 | goto err_free_firmware_files; | |
1177 | } | |
cfd1061e | 1178 | |
60631c5c KV |
1179 | mutex_lock(&ar->conf_mutex); |
1180 | ||
43d2a30f | 1181 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1182 | if (ret) { |
7aa7a72a | 1183 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 1184 | goto err_unlock; |
818bdd16 MK |
1185 | } |
1186 | ||
8079de0d | 1187 | ath10k_print_driver_info(ar); |
818bdd16 | 1188 | ath10k_core_stop(ar); |
60631c5c KV |
1189 | |
1190 | mutex_unlock(&ar->conf_mutex); | |
1191 | ||
818bdd16 MK |
1192 | ath10k_hif_power_down(ar); |
1193 | return 0; | |
c6ce492d KV |
1194 | |
1195 | err_unlock: | |
1196 | mutex_unlock(&ar->conf_mutex); | |
1197 | ||
5f2144d9 | 1198 | err_free_firmware_files: |
c6ce492d KV |
1199 | ath10k_core_free_firmware_files(ar); |
1200 | ||
1201 | err_power_down: | |
1202 | ath10k_hif_power_down(ar); | |
1203 | ||
1204 | return ret; | |
818bdd16 | 1205 | } |
dd30a36e | 1206 | |
6782cb69 | 1207 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1208 | { |
6782cb69 | 1209 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1210 | int status; |
1211 | ||
818bdd16 MK |
1212 | status = ath10k_core_probe_fw(ar); |
1213 | if (status) { | |
7aa7a72a | 1214 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1215 | goto err; |
818bdd16 | 1216 | } |
dd30a36e | 1217 | |
5e3dd157 | 1218 | status = ath10k_mac_register(ar); |
818bdd16 | 1219 | if (status) { |
7aa7a72a | 1220 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1221 | goto err_release_fw; |
818bdd16 | 1222 | } |
5e3dd157 | 1223 | |
e13cf7a3 | 1224 | status = ath10k_debug_register(ar); |
5e3dd157 | 1225 | if (status) { |
7aa7a72a | 1226 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1227 | goto err_unregister_mac; |
1228 | } | |
1229 | ||
855aed12 SW |
1230 | status = ath10k_spectral_create(ar); |
1231 | if (status) { | |
7aa7a72a | 1232 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1233 | goto err_debug_destroy; |
1234 | } | |
1235 | ||
fe6f36d6 RM |
1236 | status = ath10k_thermal_register(ar); |
1237 | if (status) { | |
1238 | ath10k_err(ar, "could not register thermal device: %d\n", | |
1239 | status); | |
1240 | goto err_spectral_destroy; | |
1241 | } | |
1242 | ||
6782cb69 MK |
1243 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1244 | return; | |
5e3dd157 | 1245 | |
fe6f36d6 RM |
1246 | err_spectral_destroy: |
1247 | ath10k_spectral_destroy(ar); | |
855aed12 SW |
1248 | err_debug_destroy: |
1249 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1250 | err_unregister_mac: |
1251 | ath10k_mac_unregister(ar); | |
29385057 MK |
1252 | err_release_fw: |
1253 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1254 | err: |
a491a920 MK |
1255 | /* TODO: It's probably a good idea to release device from the driver |
1256 | * but calling device_release_driver() here will cause a deadlock. | |
1257 | */ | |
6782cb69 MK |
1258 | return; |
1259 | } | |
1260 | ||
1261 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1262 | { | |
6782cb69 | 1263 | ar->chip_id = chip_id; |
6782cb69 MK |
1264 | queue_work(ar->workqueue, &ar->register_work); |
1265 | ||
1266 | return 0; | |
5e3dd157 KV |
1267 | } |
1268 | EXPORT_SYMBOL(ath10k_core_register); | |
1269 | ||
1270 | void ath10k_core_unregister(struct ath10k *ar) | |
1271 | { | |
6782cb69 MK |
1272 | cancel_work_sync(&ar->register_work); |
1273 | ||
1274 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1275 | return; | |
1276 | ||
fe6f36d6 | 1277 | ath10k_thermal_unregister(ar); |
804eef14 SW |
1278 | /* Stop spectral before unregistering from mac80211 to remove the |
1279 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1280 | * would be already be free'd recursively, leading to a double free. | |
1281 | */ | |
1282 | ath10k_spectral_destroy(ar); | |
1283 | ||
5e3dd157 KV |
1284 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1285 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1286 | * unhappy about callback failures. */ | |
1287 | ath10k_mac_unregister(ar); | |
db66ea04 | 1288 | |
43d2a30f KV |
1289 | ath10k_testmode_destroy(ar); |
1290 | ||
29385057 | 1291 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1292 | |
e13cf7a3 | 1293 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1294 | } |
1295 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1296 | ||
e7b54194 | 1297 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1298 | enum ath10k_bus bus, |
0d0a6939 MK |
1299 | const struct ath10k_hif_ops *hif_ops) |
1300 | { | |
1301 | struct ath10k *ar; | |
e13cf7a3 | 1302 | int ret; |
0d0a6939 | 1303 | |
e7b54194 | 1304 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1305 | if (!ar) |
1306 | return NULL; | |
1307 | ||
1308 | ar->ath_common.priv = ar; | |
1309 | ar->ath_common.hw = ar->hw; | |
0d0a6939 | 1310 | ar->dev = dev; |
0d0a6939 | 1311 | ar->hif.ops = hif_ops; |
e07db352 | 1312 | ar->hif.bus = bus; |
0d0a6939 MK |
1313 | |
1314 | init_completion(&ar->scan.started); | |
1315 | init_completion(&ar->scan.completed); | |
1316 | init_completion(&ar->scan.on_channel); | |
1317 | init_completion(&ar->target_suspend); | |
1318 | ||
1319 | init_completion(&ar->install_key_done); | |
1320 | init_completion(&ar->vdev_setup_done); | |
ac2953fc | 1321 | init_completion(&ar->thermal.wmi_sync); |
0d0a6939 | 1322 | |
5c81c7fd | 1323 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1324 | |
1325 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1326 | if (!ar->workqueue) | |
e13cf7a3 | 1327 | goto err_free_mac; |
0d0a6939 MK |
1328 | |
1329 | mutex_init(&ar->conf_mutex); | |
1330 | spin_lock_init(&ar->data_lock); | |
1331 | ||
1332 | INIT_LIST_HEAD(&ar->peers); | |
1333 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
1334 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
1335 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
1336 | |
1337 | init_completion(&ar->offchan_tx_completed); | |
1338 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1339 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1340 | ||
1341 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1342 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1343 | ||
6782cb69 | 1344 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1345 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1346 | ||
e13cf7a3 MK |
1347 | ret = ath10k_debug_create(ar); |
1348 | if (ret) | |
1349 | goto err_free_wq; | |
1350 | ||
0d0a6939 MK |
1351 | return ar; |
1352 | ||
e13cf7a3 MK |
1353 | err_free_wq: |
1354 | destroy_workqueue(ar->workqueue); | |
1355 | ||
1356 | err_free_mac: | |
0d0a6939 | 1357 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1358 | |
0d0a6939 MK |
1359 | return NULL; |
1360 | } | |
1361 | EXPORT_SYMBOL(ath10k_core_create); | |
1362 | ||
1363 | void ath10k_core_destroy(struct ath10k *ar) | |
1364 | { | |
1365 | flush_workqueue(ar->workqueue); | |
1366 | destroy_workqueue(ar->workqueue); | |
1367 | ||
e13cf7a3 | 1368 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1369 | ath10k_mac_destroy(ar); |
1370 | } | |
1371 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1372 | ||
5e3dd157 KV |
1373 | MODULE_AUTHOR("Qualcomm Atheros"); |
1374 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1375 | MODULE_LICENSE("Dual BSD/GPL"); |