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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
1657b8f8 WR |
21 | #include <linux/dmi.h> |
22 | #include <linux/ctype.h> | |
6847f967 | 23 | #include <asm/byteorder.h> |
5e3dd157 KV |
24 | |
25 | #include "core.h" | |
26 | #include "mac.h" | |
27 | #include "htc.h" | |
28 | #include "hif.h" | |
29 | #include "wmi.h" | |
30 | #include "bmi.h" | |
31 | #include "debug.h" | |
32 | #include "htt.h" | |
43d2a30f | 33 | #include "testmode.h" |
d7579d12 | 34 | #include "wmi-ops.h" |
5e3dd157 KV |
35 | |
36 | unsigned int ath10k_debug_mask; | |
ccec9038 | 37 | static unsigned int ath10k_cryptmode_param; |
5e3dd157 | 38 | static bool uart_print; |
8868b12c | 39 | static bool skip_otp; |
b6c7bafa | 40 | static bool rawmode; |
8868b12c | 41 | |
5e3dd157 | 42 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
ccec9038 | 43 | module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); |
5e3dd157 | 44 | module_param(uart_print, bool, 0644); |
8868b12c | 45 | module_param(skip_otp, bool, 0644); |
b6c7bafa | 46 | module_param(rawmode, bool, 0644); |
8868b12c | 47 | |
5e3dd157 KV |
48 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
49 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
8868b12c | 50 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
ccec9038 | 51 | MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); |
b6c7bafa | 52 | MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); |
5e3dd157 KV |
53 | |
54 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
55 | { |
56 | .id = QCA988X_HW_2_0_VERSION, | |
079a0490 | 57 | .dev_id = QCA988X_2_0_DEVICE_ID, |
5e3dd157 KV |
58 | .name = "qca988x hw2.0", |
59 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 60 | .uart_pin = 7, |
26c19760 | 61 | .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, |
d772703e | 62 | .otp_exe_param = 0, |
9c8fb548 | 63 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 64 | .max_probe_resp_desc_thres = 0, |
0b8e3c4c | 65 | .cal_data_len = 2116, |
5e3dd157 KV |
66 | .fw = { |
67 | .dir = QCA988X_HW_2_0_FW_DIR, | |
5e3dd157 | 68 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, |
9764a2af MK |
69 | .board_size = QCA988X_BOARD_DATA_SZ, |
70 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 | 71 | }, |
ae02c871 | 72 | .hw_ops = &qca988x_ops, |
2f38c3c0 | 73 | .decap_align_bytes = 4, |
5e3dd157 | 74 | }, |
6fd3dd71 SE |
75 | { |
76 | .id = QCA9887_HW_1_0_VERSION, | |
77 | .dev_id = QCA9887_1_0_DEVICE_ID, | |
78 | .name = "qca9887 hw1.0", | |
79 | .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, | |
80 | .uart_pin = 7, | |
26c19760 | 81 | .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, |
6fd3dd71 SE |
82 | .otp_exe_param = 0, |
83 | .channel_counters_freq_hz = 88000, | |
84 | .max_probe_resp_desc_thres = 0, | |
6fd3dd71 SE |
85 | .cal_data_len = 2116, |
86 | .fw = { | |
87 | .dir = QCA9887_HW_1_0_FW_DIR, | |
88 | .board = QCA9887_HW_1_0_BOARD_DATA_FILE, | |
89 | .board_size = QCA9887_BOARD_DATA_SZ, | |
90 | .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, | |
91 | }, | |
ae02c871 | 92 | .hw_ops = &qca988x_ops, |
2f38c3c0 | 93 | .decap_align_bytes = 4, |
6fd3dd71 | 94 | }, |
d63955b3 MK |
95 | { |
96 | .id = QCA6174_HW_2_1_VERSION, | |
079a0490 BM |
97 | .dev_id = QCA6164_2_1_DEVICE_ID, |
98 | .name = "qca6164 hw2.1", | |
99 | .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, | |
100 | .uart_pin = 6, | |
101 | .otp_exe_param = 0, | |
102 | .channel_counters_freq_hz = 88000, | |
103 | .max_probe_resp_desc_thres = 0, | |
0b8e3c4c | 104 | .cal_data_len = 8124, |
079a0490 BM |
105 | .fw = { |
106 | .dir = QCA6174_HW_2_1_FW_DIR, | |
079a0490 BM |
107 | .board = QCA6174_HW_2_1_BOARD_DATA_FILE, |
108 | .board_size = QCA6174_BOARD_DATA_SZ, | |
109 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
110 | }, | |
ae02c871 | 111 | .hw_ops = &qca988x_ops, |
2f38c3c0 | 112 | .decap_align_bytes = 4, |
079a0490 BM |
113 | }, |
114 | { | |
115 | .id = QCA6174_HW_2_1_VERSION, | |
116 | .dev_id = QCA6174_2_1_DEVICE_ID, | |
d63955b3 MK |
117 | .name = "qca6174 hw2.1", |
118 | .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, | |
119 | .uart_pin = 6, | |
d772703e | 120 | .otp_exe_param = 0, |
9c8fb548 | 121 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 122 | .max_probe_resp_desc_thres = 0, |
0b8e3c4c | 123 | .cal_data_len = 8124, |
d63955b3 MK |
124 | .fw = { |
125 | .dir = QCA6174_HW_2_1_FW_DIR, | |
d63955b3 MK |
126 | .board = QCA6174_HW_2_1_BOARD_DATA_FILE, |
127 | .board_size = QCA6174_BOARD_DATA_SZ, | |
128 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
129 | }, | |
ae02c871 | 130 | .hw_ops = &qca988x_ops, |
2f38c3c0 | 131 | .decap_align_bytes = 4, |
d63955b3 MK |
132 | }, |
133 | { | |
134 | .id = QCA6174_HW_3_0_VERSION, | |
079a0490 | 135 | .dev_id = QCA6174_2_1_DEVICE_ID, |
d63955b3 MK |
136 | .name = "qca6174 hw3.0", |
137 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
138 | .uart_pin = 6, | |
d772703e | 139 | .otp_exe_param = 0, |
9c8fb548 | 140 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 141 | .max_probe_resp_desc_thres = 0, |
0b8e3c4c | 142 | .cal_data_len = 8124, |
d63955b3 MK |
143 | .fw = { |
144 | .dir = QCA6174_HW_3_0_FW_DIR, | |
d63955b3 MK |
145 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, |
146 | .board_size = QCA6174_BOARD_DATA_SZ, | |
147 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
148 | }, | |
ae02c871 | 149 | .hw_ops = &qca988x_ops, |
2f38c3c0 | 150 | .decap_align_bytes = 4, |
d63955b3 | 151 | }, |
608b8f73 MK |
152 | { |
153 | .id = QCA6174_HW_3_2_VERSION, | |
079a0490 | 154 | .dev_id = QCA6174_2_1_DEVICE_ID, |
608b8f73 MK |
155 | .name = "qca6174 hw3.2", |
156 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
157 | .uart_pin = 6, | |
d772703e | 158 | .otp_exe_param = 0, |
9c8fb548 | 159 | .channel_counters_freq_hz = 88000, |
7b7da0a0 | 160 | .max_probe_resp_desc_thres = 0, |
0b8e3c4c | 161 | .cal_data_len = 8124, |
608b8f73 MK |
162 | .fw = { |
163 | /* uses same binaries as hw3.0 */ | |
164 | .dir = QCA6174_HW_3_0_FW_DIR, | |
608b8f73 MK |
165 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, |
166 | .board_size = QCA6174_BOARD_DATA_SZ, | |
167 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
168 | }, | |
583a6629 RH |
169 | .hw_ops = &qca6174_ops, |
170 | .hw_clk = qca6174_clk, | |
171 | .target_cpu_freq = 176000000, | |
2f38c3c0 | 172 | .decap_align_bytes = 4, |
608b8f73 | 173 | }, |
8bd47021 VT |
174 | { |
175 | .id = QCA99X0_HW_2_0_DEV_VERSION, | |
079a0490 | 176 | .dev_id = QCA99X0_2_0_DEVICE_ID, |
8bd47021 VT |
177 | .name = "qca99x0 hw2.0", |
178 | .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, | |
179 | .uart_pin = 7, | |
d772703e | 180 | .otp_exe_param = 0x00000700, |
d9156b5f | 181 | .continuous_frag_desc = true, |
5269c659 | 182 | .cck_rate_map_rev2 = true, |
9c8fb548 | 183 | .channel_counters_freq_hz = 150000, |
7b7da0a0 | 184 | .max_probe_resp_desc_thres = 24, |
5699a6f2 RM |
185 | .tx_chain_mask = 0xf, |
186 | .rx_chain_mask = 0xf, | |
187 | .max_spatial_stream = 4, | |
0b8e3c4c | 188 | .cal_data_len = 12064, |
8bd47021 VT |
189 | .fw = { |
190 | .dir = QCA99X0_HW_2_0_FW_DIR, | |
8bd47021 VT |
191 | .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, |
192 | .board_size = QCA99X0_BOARD_DATA_SZ, | |
193 | .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, | |
194 | }, | |
7d42298e | 195 | .sw_decrypt_mcast_mgmt = true, |
ae02c871 | 196 | .hw_ops = &qca99x0_ops, |
2f38c3c0 | 197 | .decap_align_bytes = 1, |
8bd47021 | 198 | }, |
651b4cdc VT |
199 | { |
200 | .id = QCA9984_HW_1_0_DEV_VERSION, | |
201 | .dev_id = QCA9984_1_0_DEVICE_ID, | |
202 | .name = "qca9984/qca9994 hw1.0", | |
203 | .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, | |
204 | .uart_pin = 7, | |
bafe4926 | 205 | .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, |
651b4cdc VT |
206 | .otp_exe_param = 0x00000700, |
207 | .continuous_frag_desc = true, | |
5269c659 | 208 | .cck_rate_map_rev2 = true, |
651b4cdc VT |
209 | .channel_counters_freq_hz = 150000, |
210 | .max_probe_resp_desc_thres = 24, | |
651b4cdc VT |
211 | .tx_chain_mask = 0xf, |
212 | .rx_chain_mask = 0xf, | |
213 | .max_spatial_stream = 4, | |
214 | .cal_data_len = 12064, | |
215 | .fw = { | |
216 | .dir = QCA9984_HW_1_0_FW_DIR, | |
217 | .board = QCA9984_HW_1_0_BOARD_DATA_FILE, | |
218 | .board_size = QCA99X0_BOARD_DATA_SZ, | |
219 | .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, | |
220 | }, | |
7d42298e | 221 | .sw_decrypt_mcast_mgmt = true, |
ae02c871 | 222 | .hw_ops = &qca99x0_ops, |
2f38c3c0 | 223 | .decap_align_bytes = 1, |
651b4cdc | 224 | }, |
e565c312 AK |
225 | { |
226 | .id = QCA9888_HW_2_0_DEV_VERSION, | |
227 | .dev_id = QCA9888_2_0_DEVICE_ID, | |
228 | .name = "qca9888 hw2.0", | |
229 | .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, | |
230 | .uart_pin = 7, | |
bafe4926 | 231 | .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, |
e565c312 AK |
232 | .otp_exe_param = 0x00000700, |
233 | .continuous_frag_desc = true, | |
234 | .channel_counters_freq_hz = 150000, | |
235 | .max_probe_resp_desc_thres = 24, | |
e565c312 AK |
236 | .tx_chain_mask = 3, |
237 | .rx_chain_mask = 3, | |
238 | .max_spatial_stream = 2, | |
239 | .cal_data_len = 12064, | |
240 | .fw = { | |
241 | .dir = QCA9888_HW_2_0_FW_DIR, | |
242 | .board = QCA9888_HW_2_0_BOARD_DATA_FILE, | |
243 | .board_size = QCA99X0_BOARD_DATA_SZ, | |
244 | .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, | |
245 | }, | |
7d42298e | 246 | .sw_decrypt_mcast_mgmt = true, |
ae02c871 | 247 | .hw_ops = &qca99x0_ops, |
2f38c3c0 | 248 | .decap_align_bytes = 1, |
e565c312 | 249 | }, |
034074f3 BM |
250 | { |
251 | .id = QCA9377_HW_1_0_DEV_VERSION, | |
252 | .dev_id = QCA9377_1_0_DEVICE_ID, | |
253 | .name = "qca9377 hw1.0", | |
254 | .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, | |
255 | .uart_pin = 6, | |
256 | .otp_exe_param = 0, | |
257 | .channel_counters_freq_hz = 88000, | |
258 | .max_probe_resp_desc_thres = 0, | |
0b8e3c4c | 259 | .cal_data_len = 8124, |
034074f3 BM |
260 | .fw = { |
261 | .dir = QCA9377_HW_1_0_FW_DIR, | |
034074f3 BM |
262 | .board = QCA9377_HW_1_0_BOARD_DATA_FILE, |
263 | .board_size = QCA9377_BOARD_DATA_SZ, | |
264 | .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, | |
265 | }, | |
ae02c871 | 266 | .hw_ops = &qca988x_ops, |
2f38c3c0 | 267 | .decap_align_bytes = 4, |
034074f3 | 268 | }, |
a226b519 | 269 | { |
12551ced | 270 | .id = QCA9377_HW_1_1_DEV_VERSION, |
079a0490 | 271 | .dev_id = QCA9377_1_0_DEVICE_ID, |
12551ced | 272 | .name = "qca9377 hw1.1", |
a226b519 | 273 | .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, |
6cf21395 | 274 | .uart_pin = 6, |
a226b519 | 275 | .otp_exe_param = 0, |
6cf21395 BM |
276 | .channel_counters_freq_hz = 88000, |
277 | .max_probe_resp_desc_thres = 0, | |
0b8e3c4c | 278 | .cal_data_len = 8124, |
a226b519 BM |
279 | .fw = { |
280 | .dir = QCA9377_HW_1_0_FW_DIR, | |
a226b519 BM |
281 | .board = QCA9377_HW_1_0_BOARD_DATA_FILE, |
282 | .board_size = QCA9377_BOARD_DATA_SZ, | |
283 | .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, | |
284 | }, | |
912b6e88 RH |
285 | .hw_ops = &qca6174_ops, |
286 | .hw_clk = qca6174_clk, | |
287 | .target_cpu_freq = 176000000, | |
2f38c3c0 | 288 | .decap_align_bytes = 4, |
a226b519 | 289 | }, |
b1a958c9 RM |
290 | { |
291 | .id = QCA4019_HW_1_0_DEV_VERSION, | |
292 | .dev_id = 0, | |
293 | .name = "qca4019 hw1.0", | |
294 | .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, | |
295 | .uart_pin = 7, | |
8e100354 | 296 | .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, |
b1a958c9 RM |
297 | .otp_exe_param = 0x0010000, |
298 | .continuous_frag_desc = true, | |
5269c659 | 299 | .cck_rate_map_rev2 = true, |
b1a958c9 RM |
300 | .channel_counters_freq_hz = 125000, |
301 | .max_probe_resp_desc_thres = 24, | |
5699a6f2 RM |
302 | .tx_chain_mask = 0x3, |
303 | .rx_chain_mask = 0x3, | |
304 | .max_spatial_stream = 2, | |
0b8e3c4c | 305 | .cal_data_len = 12064, |
b1a958c9 RM |
306 | .fw = { |
307 | .dir = QCA4019_HW_1_0_FW_DIR, | |
b1a958c9 RM |
308 | .board = QCA4019_HW_1_0_BOARD_DATA_FILE, |
309 | .board_size = QCA4019_BOARD_DATA_SZ, | |
310 | .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, | |
311 | }, | |
7d42298e | 312 | .sw_decrypt_mcast_mgmt = true, |
ae02c871 | 313 | .hw_ops = &qca99x0_ops, |
2f38c3c0 | 314 | .decap_align_bytes = 1, |
b1a958c9 | 315 | }, |
5e3dd157 KV |
316 | }; |
317 | ||
b27bc5a4 MK |
318 | static const char *const ath10k_core_fw_feature_str[] = { |
319 | [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", | |
320 | [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", | |
321 | [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", | |
322 | [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", | |
323 | [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", | |
324 | [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", | |
325 | [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", | |
326 | [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", | |
327 | [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", | |
328 | [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", | |
5af82fa6 | 329 | [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", |
62f77f09 | 330 | [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", |
90eceb3b | 331 | [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", |
9b783763 | 332 | [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", |
64e001f4 | 333 | [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", |
2cdce425 | 334 | [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", |
705d7aa0 | 335 | [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", |
b27bc5a4 MK |
336 | }; |
337 | ||
338 | static unsigned int ath10k_core_get_fw_feature_str(char *buf, | |
339 | size_t buf_len, | |
340 | enum ath10k_fw_features feat) | |
341 | { | |
5af82fa6 KV |
342 | /* make sure that ath10k_core_fw_feature_str[] gets updated */ |
343 | BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != | |
344 | ATH10K_FW_FEATURE_COUNT); | |
345 | ||
b27bc5a4 MK |
346 | if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || |
347 | WARN_ON(!ath10k_core_fw_feature_str[feat])) { | |
348 | return scnprintf(buf, buf_len, "bit%d", feat); | |
349 | } | |
350 | ||
351 | return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); | |
352 | } | |
353 | ||
354 | void ath10k_core_get_fw_features_str(struct ath10k *ar, | |
355 | char *buf, | |
356 | size_t buf_len) | |
357 | { | |
182f1e5a | 358 | size_t len = 0; |
b27bc5a4 MK |
359 | int i; |
360 | ||
361 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
c4cdf753 | 362 | if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { |
b27bc5a4 MK |
363 | if (len > 0) |
364 | len += scnprintf(buf + len, buf_len - len, ","); | |
365 | ||
366 | len += ath10k_core_get_fw_feature_str(buf + len, | |
367 | buf_len - len, | |
368 | i); | |
369 | } | |
370 | } | |
371 | } | |
372 | ||
5e3dd157 KV |
373 | static void ath10k_send_suspend_complete(struct ath10k *ar) |
374 | { | |
7aa7a72a | 375 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 376 | |
9042e17d | 377 | complete(&ar->target_suspend); |
5e3dd157 KV |
378 | } |
379 | ||
5e3dd157 KV |
380 | static int ath10k_init_configure_target(struct ath10k *ar) |
381 | { | |
382 | u32 param_host; | |
383 | int ret; | |
384 | ||
385 | /* tell target which HTC version it is used*/ | |
386 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
387 | HTC_PROTOCOL_VERSION); | |
388 | if (ret) { | |
7aa7a72a | 389 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
390 | return ret; |
391 | } | |
392 | ||
393 | /* set the firmware mode to STA/IBSS/AP */ | |
394 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
395 | if (ret) { | |
7aa7a72a | 396 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
397 | return ret; |
398 | } | |
399 | ||
400 | /* TODO following parameters need to be re-visited. */ | |
401 | /* num_device */ | |
402 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
403 | /* Firmware mode */ | |
404 | /* FIXME: Why FW_MODE_AP ??.*/ | |
405 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
406 | /* mac_addr_method */ | |
407 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
408 | /* firmware_bridge */ | |
409 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
410 | /* fwsubmode */ | |
411 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
412 | ||
413 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
414 | if (ret) { | |
7aa7a72a | 415 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
416 | return ret; |
417 | } | |
418 | ||
419 | /* We do all byte-swapping on the host */ | |
420 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
421 | if (ret) { | |
7aa7a72a | 422 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
423 | return ret; |
424 | } | |
425 | ||
426 | /* FW descriptor/Data swap flags */ | |
427 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
428 | ||
429 | if (ret) { | |
7aa7a72a | 430 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
431 | return ret; |
432 | } | |
433 | ||
36582e5d MK |
434 | /* Some devices have a special sanity check that verifies the PCI |
435 | * Device ID is written to this host interest var. It is known to be | |
436 | * required to boot QCA6164. | |
437 | */ | |
438 | ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, | |
439 | ar->dev_id); | |
440 | if (ret) { | |
441 | ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); | |
442 | return ret; | |
443 | } | |
444 | ||
5e3dd157 KV |
445 | return 0; |
446 | } | |
447 | ||
448 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
449 | const char *dir, | |
450 | const char *file) | |
451 | { | |
452 | char filename[100]; | |
453 | const struct firmware *fw; | |
454 | int ret; | |
455 | ||
456 | if (file == NULL) | |
457 | return ERR_PTR(-ENOENT); | |
458 | ||
459 | if (dir == NULL) | |
460 | dir = "."; | |
461 | ||
462 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
9f5bcfe9 MK |
463 | ret = request_firmware_direct(&fw, filename, ar->dev); |
464 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", | |
465 | filename, ret); | |
466 | ||
5e3dd157 KV |
467 | if (ret) |
468 | return ERR_PTR(ret); | |
469 | ||
470 | return fw; | |
471 | } | |
472 | ||
a58227ef KV |
473 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
474 | size_t data_len) | |
5e3dd157 | 475 | { |
9764a2af MK |
476 | u32 board_data_size = ar->hw_params.fw.board_size; |
477 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
478 | u32 board_ext_data_addr; |
479 | int ret; | |
480 | ||
481 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
482 | if (ret) { | |
7aa7a72a MK |
483 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
484 | ret); | |
5e3dd157 KV |
485 | return ret; |
486 | } | |
487 | ||
7aa7a72a | 488 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 489 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
490 | board_ext_data_addr); |
491 | ||
492 | if (board_ext_data_addr == 0) | |
493 | return 0; | |
494 | ||
a58227ef | 495 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 496 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 497 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
498 | return -EINVAL; |
499 | } | |
500 | ||
501 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 502 | data + board_data_size, |
5e3dd157 KV |
503 | board_ext_data_size); |
504 | if (ret) { | |
7aa7a72a | 505 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
506 | return ret; |
507 | } | |
508 | ||
509 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
510 | (board_ext_data_size << 16) | 1); | |
511 | if (ret) { | |
7aa7a72a MK |
512 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
513 | ret); | |
5e3dd157 KV |
514 | return ret; |
515 | } | |
516 | ||
517 | return 0; | |
518 | } | |
519 | ||
a58227ef KV |
520 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
521 | size_t data_len) | |
5e3dd157 | 522 | { |
9764a2af | 523 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 524 | u32 address; |
5e3dd157 KV |
525 | int ret; |
526 | ||
a58227ef | 527 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 528 | if (ret) { |
7aa7a72a | 529 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
530 | goto exit; |
531 | } | |
532 | ||
533 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
534 | if (ret) { | |
7aa7a72a | 535 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
536 | goto exit; |
537 | } | |
538 | ||
a58227ef | 539 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 540 | min_t(u32, board_data_size, |
a58227ef | 541 | data_len)); |
5e3dd157 | 542 | if (ret) { |
7aa7a72a | 543 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
544 | goto exit; |
545 | } | |
546 | ||
547 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
548 | if (ret) { | |
7aa7a72a | 549 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
550 | goto exit; |
551 | } | |
552 | ||
553 | exit: | |
5e3dd157 KV |
554 | return ret; |
555 | } | |
556 | ||
f454add4 RM |
557 | static int ath10k_download_cal_file(struct ath10k *ar, |
558 | const struct firmware *file) | |
a58227ef KV |
559 | { |
560 | int ret; | |
561 | ||
f454add4 | 562 | if (!file) |
a58227ef KV |
563 | return -ENOENT; |
564 | ||
f454add4 RM |
565 | if (IS_ERR(file)) |
566 | return PTR_ERR(file); | |
a58227ef | 567 | |
f454add4 | 568 | ret = ath10k_download_board_data(ar, file->data, file->size); |
a58227ef KV |
569 | if (ret) { |
570 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
571 | return ret; | |
572 | } | |
573 | ||
574 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | ||
f454add4 | 579 | static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) |
5aabff05 TK |
580 | { |
581 | struct device_node *node; | |
582 | int data_len; | |
583 | void *data; | |
584 | int ret; | |
585 | ||
586 | node = ar->dev->of_node; | |
587 | if (!node) | |
588 | /* Device Tree is optional, don't print any warnings if | |
589 | * there's no node for ath10k. | |
590 | */ | |
591 | return -ENOENT; | |
592 | ||
f454add4 | 593 | if (!of_get_property(node, dt_name, &data_len)) { |
5aabff05 TK |
594 | /* The calibration data node is optional */ |
595 | return -ENOENT; | |
596 | } | |
597 | ||
0b8e3c4c | 598 | if (data_len != ar->hw_params.cal_data_len) { |
5aabff05 TK |
599 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", |
600 | data_len); | |
601 | ret = -EMSGSIZE; | |
602 | goto out; | |
603 | } | |
604 | ||
605 | data = kmalloc(data_len, GFP_KERNEL); | |
606 | if (!data) { | |
607 | ret = -ENOMEM; | |
608 | goto out; | |
609 | } | |
610 | ||
f454add4 | 611 | ret = of_property_read_u8_array(node, dt_name, data, data_len); |
5aabff05 TK |
612 | if (ret) { |
613 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
614 | ret); | |
615 | goto out_free; | |
616 | } | |
617 | ||
618 | ret = ath10k_download_board_data(ar, data, data_len); | |
619 | if (ret) { | |
620 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
621 | ret); | |
622 | goto out_free; | |
623 | } | |
624 | ||
625 | ret = 0; | |
626 | ||
627 | out_free: | |
628 | kfree(data); | |
629 | ||
630 | out: | |
631 | return ret; | |
632 | } | |
633 | ||
6847f967 SE |
634 | static int ath10k_download_cal_eeprom(struct ath10k *ar) |
635 | { | |
636 | size_t data_len; | |
637 | void *data = NULL; | |
638 | int ret; | |
639 | ||
640 | ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); | |
641 | if (ret) { | |
642 | if (ret != -EOPNOTSUPP) | |
643 | ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", | |
644 | ret); | |
645 | goto out_free; | |
646 | } | |
647 | ||
648 | ret = ath10k_download_board_data(ar, data, data_len); | |
649 | if (ret) { | |
650 | ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", | |
651 | ret); | |
652 | goto out_free; | |
653 | } | |
654 | ||
655 | ret = 0; | |
656 | ||
657 | out_free: | |
658 | kfree(data); | |
659 | ||
660 | return ret; | |
661 | } | |
662 | ||
db0984e5 MP |
663 | static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) |
664 | { | |
665 | u32 result, address; | |
666 | u8 board_id, chip_id; | |
667 | int ret; | |
668 | ||
669 | address = ar->hw_params.patch_load_addr; | |
670 | ||
7ebf721d KV |
671 | if (!ar->normal_mode_fw.fw_file.otp_data || |
672 | !ar->normal_mode_fw.fw_file.otp_len) { | |
db0984e5 MP |
673 | ath10k_warn(ar, |
674 | "failed to retrieve board id because of invalid otp\n"); | |
675 | return -ENODATA; | |
676 | } | |
677 | ||
678 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
679 | "boot upload otp to 0x%x len %zd for board id\n", | |
7ebf721d | 680 | address, ar->normal_mode_fw.fw_file.otp_len); |
db0984e5 | 681 | |
7ebf721d KV |
682 | ret = ath10k_bmi_fast_download(ar, address, |
683 | ar->normal_mode_fw.fw_file.otp_data, | |
684 | ar->normal_mode_fw.fw_file.otp_len); | |
db0984e5 MP |
685 | if (ret) { |
686 | ath10k_err(ar, "could not write otp for board id check: %d\n", | |
687 | ret); | |
688 | return ret; | |
689 | } | |
690 | ||
691 | ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, | |
692 | &result); | |
693 | if (ret) { | |
694 | ath10k_err(ar, "could not execute otp for board id check: %d\n", | |
695 | ret); | |
696 | return ret; | |
697 | } | |
698 | ||
699 | board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); | |
700 | chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); | |
701 | ||
702 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
703 | "boot get otp board id result 0x%08x board_id %d chip_id %d\n", | |
704 | result, board_id, chip_id); | |
705 | ||
d2e202c0 RH |
706 | if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || |
707 | (board_id == 0)) { | |
7be52c03 KV |
708 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
709 | "board id does not exist in otp, ignore it\n"); | |
db0984e5 | 710 | return -EOPNOTSUPP; |
d2e202c0 | 711 | } |
db0984e5 MP |
712 | |
713 | ar->id.bmi_ids_valid = true; | |
714 | ar->id.bmi_board_id = board_id; | |
715 | ar->id.bmi_chip_id = chip_id; | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ||
1657b8f8 WR |
720 | static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) |
721 | { | |
722 | struct ath10k *ar = data; | |
723 | const char *bdf_ext; | |
724 | const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; | |
725 | u8 bdf_enabled; | |
726 | int i; | |
727 | ||
728 | if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) | |
729 | return; | |
730 | ||
731 | if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { | |
732 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
733 | "wrong smbios bdf ext type length (%d).\n", | |
734 | hdr->length); | |
735 | return; | |
736 | } | |
737 | ||
738 | bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); | |
739 | if (!bdf_enabled) { | |
740 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); | |
741 | return; | |
742 | } | |
743 | ||
744 | /* Only one string exists (per spec) */ | |
745 | bdf_ext = (char *)hdr + hdr->length; | |
746 | ||
747 | if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { | |
748 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
749 | "bdf variant magic does not match.\n"); | |
750 | return; | |
751 | } | |
752 | ||
753 | for (i = 0; i < strlen(bdf_ext); i++) { | |
754 | if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { | |
755 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
756 | "bdf variant name contains non ascii chars.\n"); | |
757 | return; | |
758 | } | |
759 | } | |
760 | ||
761 | /* Copy extension name without magic suffix */ | |
762 | if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), | |
763 | sizeof(ar->id.bdf_ext)) < 0) { | |
764 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
765 | "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", | |
766 | bdf_ext); | |
767 | return; | |
768 | } | |
769 | ||
770 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
771 | "found and validated bdf variant smbios_type 0x%x bdf %s\n", | |
772 | ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); | |
773 | } | |
774 | ||
775 | static int ath10k_core_check_smbios(struct ath10k *ar) | |
776 | { | |
777 | ar->id.bdf_ext[0] = '\0'; | |
778 | dmi_walk(ath10k_core_check_bdfext, ar); | |
779 | ||
780 | if (ar->id.bdf_ext[0] == '\0') | |
781 | return -ENODATA; | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
5e3dd157 KV |
786 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
787 | { | |
d6d4a58d | 788 | u32 result, address = ar->hw_params.patch_load_addr; |
d772703e | 789 | u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; |
5e3dd157 KV |
790 | int ret; |
791 | ||
7ebf721d KV |
792 | ret = ath10k_download_board_data(ar, |
793 | ar->running_fw->board_data, | |
794 | ar->running_fw->board_len); | |
83091559 KV |
795 | if (ret) { |
796 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
797 | return ret; | |
798 | } | |
799 | ||
5e3dd157 KV |
800 | /* OTP is optional */ |
801 | ||
7ebf721d KV |
802 | if (!ar->running_fw->fw_file.otp_data || |
803 | !ar->running_fw->fw_file.otp_len) { | |
75b34800 | 804 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", |
7ebf721d KV |
805 | ar->running_fw->fw_file.otp_data, |
806 | ar->running_fw->fw_file.otp_len); | |
5e3dd157 | 807 | return 0; |
7f06ea1e KV |
808 | } |
809 | ||
7aa7a72a | 810 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7ebf721d | 811 | address, ar->running_fw->fw_file.otp_len); |
5e3dd157 | 812 | |
7ebf721d KV |
813 | ret = ath10k_bmi_fast_download(ar, address, |
814 | ar->running_fw->fw_file.otp_data, | |
815 | ar->running_fw->fw_file.otp_len); | |
5e3dd157 | 816 | if (ret) { |
7aa7a72a | 817 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 818 | return ret; |
5e3dd157 KV |
819 | } |
820 | ||
d772703e | 821 | ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); |
5e3dd157 | 822 | if (ret) { |
7aa7a72a | 823 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 824 | return ret; |
5e3dd157 KV |
825 | } |
826 | ||
7aa7a72a | 827 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 828 | |
d9153546 | 829 | if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, |
c4cdf753 | 830 | ar->running_fw->fw_file.fw_features)) && |
be62e92a | 831 | result != 0) { |
7aa7a72a | 832 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
833 | return -EINVAL; |
834 | } | |
835 | ||
836 | return 0; | |
5e3dd157 KV |
837 | } |
838 | ||
7ebf721d | 839 | static int ath10k_download_fw(struct ath10k *ar) |
5e3dd157 | 840 | { |
43d2a30f | 841 | u32 address, data_len; |
43d2a30f | 842 | const void *data; |
5e3dd157 KV |
843 | int ret; |
844 | ||
5e3dd157 KV |
845 | address = ar->hw_params.patch_load_addr; |
846 | ||
7ebf721d KV |
847 | data = ar->running_fw->fw_file.firmware_data; |
848 | data_len = ar->running_fw->fw_file.firmware_len; | |
849 | ||
5459c5d4 | 850 | ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); |
7ebf721d KV |
851 | if (ret) { |
852 | ath10k_err(ar, "failed to configure fw code swap: %d\n", | |
853 | ret); | |
854 | return ret; | |
43d2a30f KV |
855 | } |
856 | ||
857 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
75b34800 | 858 | "boot uploading firmware image %pK len %d\n", |
7ebf721d | 859 | data, data_len); |
43d2a30f KV |
860 | |
861 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 862 | if (ret) { |
7ebf721d KV |
863 | ath10k_err(ar, "failed to download firmware: %d\n", |
864 | ret); | |
43d2a30f | 865 | return ret; |
5e3dd157 KV |
866 | } |
867 | ||
29385057 MK |
868 | return ret; |
869 | } | |
870 | ||
0a51b343 | 871 | static void ath10k_core_free_board_files(struct ath10k *ar) |
29385057 | 872 | { |
7ebf721d KV |
873 | if (!IS_ERR(ar->normal_mode_fw.board)) |
874 | release_firmware(ar->normal_mode_fw.board); | |
29385057 | 875 | |
7ebf721d KV |
876 | ar->normal_mode_fw.board = NULL; |
877 | ar->normal_mode_fw.board_data = NULL; | |
878 | ar->normal_mode_fw.board_len = 0; | |
0a51b343 MP |
879 | } |
880 | ||
881 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
882 | { | |
7ebf721d KV |
883 | if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) |
884 | release_firmware(ar->normal_mode_fw.fw_file.firmware); | |
29385057 | 885 | |
db2cf865 | 886 | if (!IS_ERR(ar->cal_file)) |
a58227ef KV |
887 | release_firmware(ar->cal_file); |
888 | ||
9a5f91a1 RM |
889 | if (!IS_ERR(ar->pre_cal_file)) |
890 | release_firmware(ar->pre_cal_file); | |
891 | ||
5459c5d4 | 892 | ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); |
dcb02db1 | 893 | |
7ebf721d KV |
894 | ar->normal_mode_fw.fw_file.otp_data = NULL; |
895 | ar->normal_mode_fw.fw_file.otp_len = 0; | |
958df3a0 | 896 | |
7ebf721d KV |
897 | ar->normal_mode_fw.fw_file.firmware = NULL; |
898 | ar->normal_mode_fw.fw_file.firmware_data = NULL; | |
899 | ar->normal_mode_fw.fw_file.firmware_len = 0; | |
a58227ef KV |
900 | |
901 | ar->cal_file = NULL; | |
9a5f91a1 | 902 | ar->pre_cal_file = NULL; |
a58227ef KV |
903 | } |
904 | ||
905 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
906 | { | |
907 | char filename[100]; | |
908 | ||
3d9195ea RM |
909 | /* pre-cal-<bus>-<id>.bin */ |
910 | scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", | |
911 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
912 | ||
913 | ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
914 | if (!IS_ERR(ar->pre_cal_file)) | |
915 | goto success; | |
916 | ||
a58227ef KV |
917 | /* cal-<bus>-<id>.bin */ |
918 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
919 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
920 | ||
921 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
922 | if (IS_ERR(ar->cal_file)) | |
923 | /* calibration file is optional, don't print any warnings */ | |
924 | return PTR_ERR(ar->cal_file); | |
3d9195ea | 925 | success: |
a58227ef KV |
926 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", |
927 | ATH10K_FW_DIR, filename); | |
928 | ||
929 | return 0; | |
29385057 MK |
930 | } |
931 | ||
0a51b343 | 932 | static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) |
29385057 | 933 | { |
0a51b343 MP |
934 | if (!ar->hw_params.fw.board) { |
935 | ath10k_err(ar, "failed to find board file fw entry\n"); | |
936 | return -EINVAL; | |
937 | } | |
de57e2c8 | 938 | |
7ebf721d KV |
939 | ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, |
940 | ar->hw_params.fw.dir, | |
941 | ar->hw_params.fw.board); | |
942 | if (IS_ERR(ar->normal_mode_fw.board)) | |
943 | return PTR_ERR(ar->normal_mode_fw.board); | |
de57e2c8 | 944 | |
7ebf721d KV |
945 | ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; |
946 | ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; | |
29385057 | 947 | |
de57e2c8 MK |
948 | return 0; |
949 | } | |
950 | ||
0a51b343 MP |
951 | static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, |
952 | const void *buf, size_t buf_len, | |
953 | const char *boardname) | |
de57e2c8 | 954 | { |
0a51b343 MP |
955 | const struct ath10k_fw_ie *hdr; |
956 | bool name_match_found; | |
957 | int ret, board_ie_id; | |
958 | size_t board_ie_len; | |
959 | const void *board_ie_data; | |
960 | ||
961 | name_match_found = false; | |
962 | ||
963 | /* go through ATH10K_BD_IE_BOARD_ elements */ | |
964 | while (buf_len > sizeof(struct ath10k_fw_ie)) { | |
965 | hdr = buf; | |
966 | board_ie_id = le32_to_cpu(hdr->id); | |
967 | board_ie_len = le32_to_cpu(hdr->len); | |
968 | board_ie_data = hdr->data; | |
969 | ||
970 | buf_len -= sizeof(*hdr); | |
971 | buf += sizeof(*hdr); | |
972 | ||
973 | if (buf_len < ALIGN(board_ie_len, 4)) { | |
974 | ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", | |
975 | buf_len, ALIGN(board_ie_len, 4)); | |
976 | ret = -EINVAL; | |
977 | goto out; | |
978 | } | |
979 | ||
980 | switch (board_ie_id) { | |
981 | case ATH10K_BD_IE_BOARD_NAME: | |
982 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", | |
983 | board_ie_data, board_ie_len); | |
984 | ||
985 | if (board_ie_len != strlen(boardname)) | |
986 | break; | |
987 | ||
988 | ret = memcmp(board_ie_data, boardname, strlen(boardname)); | |
989 | if (ret) | |
990 | break; | |
991 | ||
992 | name_match_found = true; | |
993 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
994 | "boot found match for name '%s'", | |
995 | boardname); | |
996 | break; | |
997 | case ATH10K_BD_IE_BOARD_DATA: | |
998 | if (!name_match_found) | |
999 | /* no match found */ | |
1000 | break; | |
1001 | ||
1002 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1003 | "boot found board data for '%s'", | |
1004 | boardname); | |
1005 | ||
7ebf721d KV |
1006 | ar->normal_mode_fw.board_data = board_ie_data; |
1007 | ar->normal_mode_fw.board_len = board_ie_len; | |
0a51b343 MP |
1008 | |
1009 | ret = 0; | |
1010 | goto out; | |
1011 | default: | |
1012 | ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", | |
1013 | board_ie_id); | |
1014 | break; | |
1015 | } | |
1016 | ||
1017 | /* jump over the padding */ | |
1018 | board_ie_len = ALIGN(board_ie_len, 4); | |
1019 | ||
1020 | buf_len -= board_ie_len; | |
1021 | buf += board_ie_len; | |
29385057 MK |
1022 | } |
1023 | ||
0a51b343 MP |
1024 | /* no match found */ |
1025 | ret = -ENOENT; | |
1026 | ||
1027 | out: | |
1028 | return ret; | |
1029 | } | |
1030 | ||
1031 | static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, | |
1032 | const char *boardname, | |
1033 | const char *filename) | |
1034 | { | |
1035 | size_t len, magic_len, ie_len; | |
1036 | struct ath10k_fw_ie *hdr; | |
1037 | const u8 *data; | |
1038 | int ret, ie_id; | |
1039 | ||
7ebf721d KV |
1040 | ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, |
1041 | ar->hw_params.fw.dir, | |
1042 | filename); | |
1043 | if (IS_ERR(ar->normal_mode_fw.board)) | |
1044 | return PTR_ERR(ar->normal_mode_fw.board); | |
29385057 | 1045 | |
7ebf721d KV |
1046 | data = ar->normal_mode_fw.board->data; |
1047 | len = ar->normal_mode_fw.board->size; | |
0a51b343 MP |
1048 | |
1049 | /* magic has extra null byte padded */ | |
1050 | magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; | |
1051 | if (len < magic_len) { | |
1052 | ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", | |
1053 | ar->hw_params.fw.dir, filename, len); | |
1054 | ret = -EINVAL; | |
1055 | goto err; | |
1056 | } | |
1057 | ||
1058 | if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { | |
1059 | ath10k_err(ar, "found invalid board magic\n"); | |
1060 | ret = -EINVAL; | |
1061 | goto err; | |
1062 | } | |
1063 | ||
1064 | /* magic is padded to 4 bytes */ | |
1065 | magic_len = ALIGN(magic_len, 4); | |
1066 | if (len < magic_len) { | |
1067 | ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", | |
1068 | ar->hw_params.fw.dir, filename, len); | |
1069 | ret = -EINVAL; | |
1070 | goto err; | |
1071 | } | |
1072 | ||
1073 | data += magic_len; | |
1074 | len -= magic_len; | |
1075 | ||
1076 | while (len > sizeof(struct ath10k_fw_ie)) { | |
1077 | hdr = (struct ath10k_fw_ie *)data; | |
1078 | ie_id = le32_to_cpu(hdr->id); | |
1079 | ie_len = le32_to_cpu(hdr->len); | |
1080 | ||
1081 | len -= sizeof(*hdr); | |
1082 | data = hdr->data; | |
1083 | ||
1084 | if (len < ALIGN(ie_len, 4)) { | |
1085 | ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", | |
1086 | ie_id, ie_len, len); | |
1087 | ret = -EINVAL; | |
1088 | goto err; | |
1089 | } | |
1090 | ||
1091 | switch (ie_id) { | |
1092 | case ATH10K_BD_IE_BOARD: | |
1093 | ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, | |
1094 | boardname); | |
1657b8f8 WR |
1095 | if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { |
1096 | /* try default bdf if variant was not found */ | |
1097 | char *s, *v = ",variant="; | |
1098 | char boardname2[100]; | |
1099 | ||
1100 | strlcpy(boardname2, boardname, | |
1101 | sizeof(boardname2)); | |
1102 | ||
1103 | s = strstr(boardname2, v); | |
1104 | if (s) | |
1105 | *s = '\0'; /* strip ",variant=%s" */ | |
1106 | ||
1107 | ret = ath10k_core_parse_bd_ie_board(ar, data, | |
1108 | ie_len, | |
1109 | boardname2); | |
1110 | } | |
1111 | ||
0a51b343 MP |
1112 | if (ret == -ENOENT) |
1113 | /* no match found, continue */ | |
1114 | break; | |
1115 | else if (ret) | |
1116 | /* there was an error, bail out */ | |
1117 | goto err; | |
1118 | ||
1119 | /* board data found */ | |
1120 | goto out; | |
1121 | } | |
1122 | ||
1123 | /* jump over the padding */ | |
1124 | ie_len = ALIGN(ie_len, 4); | |
1125 | ||
1126 | len -= ie_len; | |
1127 | data += ie_len; | |
1128 | } | |
1129 | ||
1130 | out: | |
7ebf721d | 1131 | if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { |
0a51b343 MP |
1132 | ath10k_err(ar, |
1133 | "failed to fetch board data for %s from %s/%s\n", | |
bd5632b0 | 1134 | boardname, ar->hw_params.fw.dir, filename); |
0a51b343 MP |
1135 | ret = -ENODATA; |
1136 | goto err; | |
1137 | } | |
1138 | ||
1139 | return 0; | |
1140 | ||
1141 | err: | |
1142 | ath10k_core_free_board_files(ar); | |
1143 | return ret; | |
1144 | } | |
1145 | ||
1146 | static int ath10k_core_create_board_name(struct ath10k *ar, char *name, | |
1147 | size_t name_len) | |
1148 | { | |
1657b8f8 WR |
1149 | /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ |
1150 | char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; | |
1151 | ||
db0984e5 MP |
1152 | if (ar->id.bmi_ids_valid) { |
1153 | scnprintf(name, name_len, | |
1154 | "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", | |
1155 | ath10k_bus_str(ar->hif.bus), | |
1156 | ar->id.bmi_chip_id, | |
1157 | ar->id.bmi_board_id); | |
1158 | goto out; | |
1159 | } | |
1160 | ||
1657b8f8 WR |
1161 | if (ar->id.bdf_ext[0] != '\0') |
1162 | scnprintf(variant, sizeof(variant), ",variant=%s", | |
1163 | ar->id.bdf_ext); | |
1164 | ||
0a51b343 | 1165 | scnprintf(name, name_len, |
1657b8f8 | 1166 | "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", |
0a51b343 MP |
1167 | ath10k_bus_str(ar->hif.bus), |
1168 | ar->id.vendor, ar->id.device, | |
1657b8f8 | 1169 | ar->id.subsystem_vendor, ar->id.subsystem_device, variant); |
db0984e5 | 1170 | out: |
0a51b343 | 1171 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); |
de57e2c8 MK |
1172 | |
1173 | return 0; | |
1174 | } | |
1175 | ||
1176 | static int ath10k_core_fetch_board_file(struct ath10k *ar) | |
1177 | { | |
0a51b343 | 1178 | char boardname[100]; |
de57e2c8 MK |
1179 | int ret; |
1180 | ||
0a51b343 MP |
1181 | ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); |
1182 | if (ret) { | |
1183 | ath10k_err(ar, "failed to create board name: %d", ret); | |
1184 | return ret; | |
de57e2c8 MK |
1185 | } |
1186 | ||
0a51b343 MP |
1187 | ar->bd_api = 2; |
1188 | ret = ath10k_core_fetch_board_data_api_n(ar, boardname, | |
1189 | ATH10K_BOARD_API2_FILE); | |
1190 | if (!ret) | |
1191 | goto success; | |
1192 | ||
1193 | ar->bd_api = 1; | |
1194 | ret = ath10k_core_fetch_board_data_api_1(ar); | |
de57e2c8 | 1195 | if (ret) { |
310c01af KV |
1196 | ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", |
1197 | ar->hw_params.fw.dir); | |
de57e2c8 MK |
1198 | return ret; |
1199 | } | |
958df3a0 | 1200 | |
0a51b343 MP |
1201 | success: |
1202 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); | |
d0ed74f3 MK |
1203 | return 0; |
1204 | } | |
1205 | ||
9dfe240b KV |
1206 | int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, |
1207 | struct ath10k_fw_file *fw_file) | |
1a222435 KV |
1208 | { |
1209 | size_t magic_len, len, ie_len; | |
1210 | int ie_id, i, index, bit, ret; | |
1211 | struct ath10k_fw_ie *hdr; | |
1212 | const u8 *data; | |
202e86e6 | 1213 | __le32 *timestamp, *version; |
1a222435 KV |
1214 | |
1215 | /* first fetch the firmware file (firmware-*.bin) */ | |
7ebf721d KV |
1216 | fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, |
1217 | name); | |
9f5bcfe9 | 1218 | if (IS_ERR(fw_file->firmware)) |
7ebf721d | 1219 | return PTR_ERR(fw_file->firmware); |
1a222435 | 1220 | |
7ebf721d KV |
1221 | data = fw_file->firmware->data; |
1222 | len = fw_file->firmware->size; | |
1a222435 KV |
1223 | |
1224 | /* magic also includes the null byte, check that as well */ | |
1225 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
1226 | ||
1227 | if (len < magic_len) { | |
7aa7a72a | 1228 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 1229 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
1230 | ret = -EINVAL; |
1231 | goto err; | |
1a222435 KV |
1232 | } |
1233 | ||
1234 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 1235 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
1236 | ret = -EINVAL; |
1237 | goto err; | |
1a222435 KV |
1238 | } |
1239 | ||
1240 | /* jump over the padding */ | |
1241 | magic_len = ALIGN(magic_len, 4); | |
1242 | ||
1243 | len -= magic_len; | |
1244 | data += magic_len; | |
1245 | ||
1246 | /* loop elements */ | |
1247 | while (len > sizeof(struct ath10k_fw_ie)) { | |
1248 | hdr = (struct ath10k_fw_ie *)data; | |
1249 | ||
1250 | ie_id = le32_to_cpu(hdr->id); | |
1251 | ie_len = le32_to_cpu(hdr->len); | |
1252 | ||
1253 | len -= sizeof(*hdr); | |
1254 | data += sizeof(*hdr); | |
1255 | ||
1256 | if (len < ie_len) { | |
7aa7a72a | 1257 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 1258 | ie_id, len, ie_len); |
9bab1cc0 MK |
1259 | ret = -EINVAL; |
1260 | goto err; | |
1a222435 KV |
1261 | } |
1262 | ||
1263 | switch (ie_id) { | |
1264 | case ATH10K_FW_IE_FW_VERSION: | |
45317355 | 1265 | if (ie_len > sizeof(fw_file->fw_version) - 1) |
1a222435 KV |
1266 | break; |
1267 | ||
45317355 KV |
1268 | memcpy(fw_file->fw_version, data, ie_len); |
1269 | fw_file->fw_version[ie_len] = '\0'; | |
1a222435 | 1270 | |
7aa7a72a | 1271 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 | 1272 | "found fw version %s\n", |
45317355 | 1273 | fw_file->fw_version); |
1a222435 KV |
1274 | break; |
1275 | case ATH10K_FW_IE_TIMESTAMP: | |
1276 | if (ie_len != sizeof(u32)) | |
1277 | break; | |
1278 | ||
1279 | timestamp = (__le32 *)data; | |
1280 | ||
7aa7a72a | 1281 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
1282 | le32_to_cpup(timestamp)); |
1283 | break; | |
1284 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 1285 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1286 | "found firmware features ie (%zd B)\n", |
1287 | ie_len); | |
1288 | ||
1289 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
1290 | index = i / 8; | |
1291 | bit = i % 8; | |
1292 | ||
1293 | if (index == ie_len) | |
1294 | break; | |
1295 | ||
f591a1a5 | 1296 | if (data[index] & (1 << bit)) { |
7aa7a72a | 1297 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
1298 | "Enabling feature bit: %i\n", |
1299 | i); | |
c4cdf753 | 1300 | __set_bit(i, fw_file->fw_features); |
f591a1a5 | 1301 | } |
1a222435 KV |
1302 | } |
1303 | ||
7aa7a72a | 1304 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
8d0a0710 | 1305 | fw_file->fw_features, |
c4cdf753 | 1306 | sizeof(fw_file->fw_features)); |
1a222435 KV |
1307 | break; |
1308 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 1309 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1310 | "found fw image ie (%zd B)\n", |
1311 | ie_len); | |
1312 | ||
7ebf721d KV |
1313 | fw_file->firmware_data = data; |
1314 | fw_file->firmware_len = ie_len; | |
1a222435 KV |
1315 | |
1316 | break; | |
1317 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 1318 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
1319 | "found otp image ie (%zd B)\n", |
1320 | ie_len); | |
1321 | ||
7ebf721d KV |
1322 | fw_file->otp_data = data; |
1323 | fw_file->otp_len = ie_len; | |
1a222435 KV |
1324 | |
1325 | break; | |
202e86e6 KV |
1326 | case ATH10K_FW_IE_WMI_OP_VERSION: |
1327 | if (ie_len != sizeof(u32)) | |
1328 | break; | |
1329 | ||
1330 | version = (__le32 *)data; | |
1331 | ||
bf3c13ab | 1332 | fw_file->wmi_op_version = le32_to_cpup(version); |
202e86e6 KV |
1333 | |
1334 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", | |
bf3c13ab | 1335 | fw_file->wmi_op_version); |
202e86e6 | 1336 | break; |
8348db29 RM |
1337 | case ATH10K_FW_IE_HTT_OP_VERSION: |
1338 | if (ie_len != sizeof(u32)) | |
1339 | break; | |
1340 | ||
1341 | version = (__le32 *)data; | |
1342 | ||
77561f93 | 1343 | fw_file->htt_op_version = le32_to_cpup(version); |
8348db29 RM |
1344 | |
1345 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", | |
77561f93 | 1346 | fw_file->htt_op_version); |
8348db29 | 1347 | break; |
dcb02db1 VT |
1348 | case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: |
1349 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1350 | "found fw code swap image ie (%zd B)\n", | |
1351 | ie_len); | |
7ebf721d KV |
1352 | fw_file->codeswap_data = data; |
1353 | fw_file->codeswap_len = ie_len; | |
dcb02db1 | 1354 | break; |
1a222435 | 1355 | default: |
7aa7a72a | 1356 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
1357 | le32_to_cpu(hdr->id)); |
1358 | break; | |
1359 | } | |
1360 | ||
1361 | /* jump over the padding */ | |
1362 | ie_len = ALIGN(ie_len, 4); | |
1363 | ||
1364 | len -= ie_len; | |
1365 | data += ie_len; | |
e05634ee | 1366 | } |
1a222435 | 1367 | |
7ebf721d KV |
1368 | if (!fw_file->firmware_data || |
1369 | !fw_file->firmware_len) { | |
7aa7a72a | 1370 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 1371 | ar->hw_params.fw.dir, name); |
1a222435 KV |
1372 | ret = -ENOMEDIUM; |
1373 | goto err; | |
1374 | } | |
1375 | ||
1a222435 KV |
1376 | return 0; |
1377 | ||
1378 | err: | |
1379 | ath10k_core_free_firmware_files(ar); | |
1380 | return ret; | |
1381 | } | |
1382 | ||
1c61bedc ES |
1383 | static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, |
1384 | size_t fw_name_len, int fw_api) | |
1385 | { | |
1386 | scnprintf(fw_name, fw_name_len, "%s-%d.bin", ATH10K_FW_FILE_BASE, fw_api); | |
1387 | } | |
1388 | ||
1a222435 KV |
1389 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) |
1390 | { | |
1c61bedc ES |
1391 | int ret, i; |
1392 | char fw_name[100]; | |
1a222435 | 1393 | |
a58227ef KV |
1394 | /* calibration file is optional, don't check for any errors */ |
1395 | ath10k_fetch_cal_file(ar); | |
1396 | ||
1c61bedc ES |
1397 | for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { |
1398 | ar->fw_api = i; | |
1399 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", | |
1400 | ar->fw_api); | |
53513c30 | 1401 | |
1c61bedc ES |
1402 | ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); |
1403 | ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, | |
1404 | &ar->normal_mode_fw.fw_file); | |
1405 | if (!ret) | |
1406 | goto success; | |
1407 | } | |
24c88f78 | 1408 | |
1c61bedc | 1409 | /* we end up here if we couldn't fetch any firmware */ |
24c88f78 | 1410 | |
1c61bedc ES |
1411 | ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", |
1412 | ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, | |
1413 | ret); | |
53c02284 | 1414 | |
1c61bedc | 1415 | return ret; |
1a222435 | 1416 | |
53c02284 | 1417 | success: |
7aa7a72a | 1418 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
1419 | |
1420 | return 0; | |
1421 | } | |
1422 | ||
3d9195ea RM |
1423 | static int ath10k_core_pre_cal_download(struct ath10k *ar) |
1424 | { | |
1425 | int ret; | |
1426 | ||
1427 | ret = ath10k_download_cal_file(ar, ar->pre_cal_file); | |
1428 | if (ret == 0) { | |
1429 | ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; | |
1430 | goto success; | |
1431 | } | |
1432 | ||
1433 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1434 | "boot did not find a pre calibration file, try DT next: %d\n", | |
1435 | ret); | |
1436 | ||
1437 | ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); | |
1438 | if (ret) { | |
1439 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1440 | "unable to load pre cal data from DT: %d\n", ret); | |
1441 | return ret; | |
1442 | } | |
1443 | ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; | |
1444 | ||
1445 | success: | |
1446 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
1447 | ath10k_cal_mode_str(ar->cal_mode)); | |
1448 | ||
1449 | return 0; | |
1450 | } | |
1451 | ||
1452 | static int ath10k_core_pre_cal_config(struct ath10k *ar) | |
1453 | { | |
1454 | int ret; | |
1455 | ||
1456 | ret = ath10k_core_pre_cal_download(ar); | |
1457 | if (ret) { | |
1458 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1459 | "failed to load pre cal data: %d\n", ret); | |
1460 | return ret; | |
1461 | } | |
1462 | ||
1463 | ret = ath10k_core_get_board_id_from_otp(ar); | |
1464 | if (ret) { | |
1465 | ath10k_err(ar, "failed to get board id: %d\n", ret); | |
1466 | return ret; | |
1467 | } | |
1468 | ||
1469 | ret = ath10k_download_and_run_otp(ar); | |
1470 | if (ret) { | |
1471 | ath10k_err(ar, "failed to run otp: %d\n", ret); | |
1472 | return ret; | |
1473 | } | |
1474 | ||
1475 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1476 | "pre cal configuration done successfully\n"); | |
1477 | ||
1478 | return 0; | |
1479 | } | |
1480 | ||
83091559 | 1481 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
1482 | { |
1483 | int ret; | |
1484 | ||
3d9195ea RM |
1485 | ret = ath10k_core_pre_cal_config(ar); |
1486 | if (ret == 0) | |
1487 | return 0; | |
1488 | ||
1489 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1490 | "pre cal download procedure failed, try cal file: %d\n", | |
1491 | ret); | |
1492 | ||
f454add4 | 1493 | ret = ath10k_download_cal_file(ar, ar->cal_file); |
a58227ef KV |
1494 | if (ret == 0) { |
1495 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
1496 | goto done; | |
1497 | } | |
1498 | ||
1499 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
1500 | "boot did not find a calibration file, try DT next: %d\n", |
1501 | ret); | |
1502 | ||
f454add4 | 1503 | ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); |
5aabff05 TK |
1504 | if (ret == 0) { |
1505 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
1506 | goto done; | |
1507 | } | |
1508 | ||
1509 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
6847f967 SE |
1510 | "boot did not find DT entry, try target EEPROM next: %d\n", |
1511 | ret); | |
1512 | ||
1513 | ret = ath10k_download_cal_eeprom(ar); | |
1514 | if (ret == 0) { | |
1515 | ar->cal_mode = ATH10K_CAL_MODE_EEPROM; | |
1516 | goto done; | |
1517 | } | |
1518 | ||
1519 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
1520 | "boot did not find target EEPROM entry, try OTP next: %d\n", | |
a58227ef KV |
1521 | ret); |
1522 | ||
5e3dd157 | 1523 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 1524 | if (ret) { |
7aa7a72a | 1525 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 1526 | return ret; |
36a8f413 | 1527 | } |
5e3dd157 | 1528 | |
a58227ef KV |
1529 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
1530 | ||
1531 | done: | |
1532 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
1533 | ath10k_cal_mode_str(ar->cal_mode)); | |
1534 | return 0; | |
5e3dd157 KV |
1535 | } |
1536 | ||
1537 | static int ath10k_init_uart(struct ath10k *ar) | |
1538 | { | |
1539 | int ret; | |
1540 | ||
1541 | /* | |
1542 | * Explicitly setting UART prints to zero as target turns it on | |
1543 | * based on scratch registers. | |
1544 | */ | |
1545 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
1546 | if (ret) { | |
7aa7a72a | 1547 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
1548 | return ret; |
1549 | } | |
1550 | ||
c8c39afe | 1551 | if (!uart_print) |
5e3dd157 | 1552 | return 0; |
5e3dd157 | 1553 | |
3a8200b2 | 1554 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 1555 | if (ret) { |
7aa7a72a | 1556 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
1557 | return ret; |
1558 | } | |
1559 | ||
1560 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
1561 | if (ret) { | |
7aa7a72a | 1562 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
1563 | return ret; |
1564 | } | |
1565 | ||
03fc137b BM |
1566 | /* Set the UART baud rate to 19200. */ |
1567 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
1568 | if (ret) { | |
7aa7a72a | 1569 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
1570 | return ret; |
1571 | } | |
1572 | ||
7aa7a72a | 1573 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
1574 | return 0; |
1575 | } | |
1576 | ||
1577 | static int ath10k_init_hw_params(struct ath10k *ar) | |
1578 | { | |
1579 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
1580 | int i; | |
1581 | ||
1582 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
1583 | hw_params = &ath10k_hw_params_list[i]; | |
1584 | ||
079a0490 BM |
1585 | if (hw_params->id == ar->target_version && |
1586 | hw_params->dev_id == ar->dev_id) | |
5e3dd157 KV |
1587 | break; |
1588 | } | |
1589 | ||
1590 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 1591 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
1592 | ar->target_version); |
1593 | return -EINVAL; | |
1594 | } | |
1595 | ||
1596 | ar->hw_params = *hw_params; | |
1597 | ||
7aa7a72a | 1598 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 1599 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
1600 | |
1601 | return 0; | |
1602 | } | |
1603 | ||
affd3217 MK |
1604 | static void ath10k_core_restart(struct work_struct *work) |
1605 | { | |
1606 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
727000e6 | 1607 | int ret; |
affd3217 | 1608 | |
7962b0d8 MK |
1609 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
1610 | ||
1611 | /* Place a barrier to make sure the compiler doesn't reorder | |
1612 | * CRASH_FLUSH and calling other functions. | |
1613 | */ | |
1614 | barrier(); | |
1615 | ||
1616 | ieee80211_stop_queues(ar->hw); | |
1617 | ath10k_drain_tx(ar); | |
881ed54e DW |
1618 | complete(&ar->scan.started); |
1619 | complete(&ar->scan.completed); | |
1620 | complete(&ar->scan.on_channel); | |
1621 | complete(&ar->offchan_tx_completed); | |
1622 | complete(&ar->install_key_done); | |
1623 | complete(&ar->vdev_setup_done); | |
1624 | complete(&ar->thermal.wmi_sync); | |
1625 | complete(&ar->bss_survey_done); | |
7962b0d8 MK |
1626 | wake_up(&ar->htt.empty_tx_wq); |
1627 | wake_up(&ar->wmi.tx_credits_wq); | |
1628 | wake_up(&ar->peer_mapping_wq); | |
1629 | ||
affd3217 MK |
1630 | mutex_lock(&ar->conf_mutex); |
1631 | ||
1632 | switch (ar->state) { | |
1633 | case ATH10K_STATE_ON: | |
affd3217 | 1634 | ar->state = ATH10K_STATE_RESTARTING; |
c2cac2f7 | 1635 | ath10k_halt(ar); |
5c81c7fd | 1636 | ath10k_scan_finish(ar); |
affd3217 MK |
1637 | ieee80211_restart_hw(ar->hw); |
1638 | break; | |
1639 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
1640 | /* this can happen if driver is being unloaded |
1641 | * or if the crash happens during FW probing */ | |
7aa7a72a | 1642 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
1643 | break; |
1644 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
1645 | /* hw restart might be requested from multiple places */ |
1646 | break; | |
affd3217 MK |
1647 | case ATH10K_STATE_RESTARTED: |
1648 | ar->state = ATH10K_STATE_WEDGED; | |
1649 | /* fall through */ | |
1650 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 1651 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 1652 | break; |
43d2a30f KV |
1653 | case ATH10K_STATE_UTF: |
1654 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
1655 | break; | |
affd3217 MK |
1656 | } |
1657 | ||
1658 | mutex_unlock(&ar->conf_mutex); | |
727000e6 AK |
1659 | |
1660 | ret = ath10k_debug_fw_devcoredump(ar); | |
1661 | if (ret) | |
1662 | ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", | |
1663 | ret); | |
affd3217 MK |
1664 | } |
1665 | ||
ebee76f7 BB |
1666 | static void ath10k_core_set_coverage_class_work(struct work_struct *work) |
1667 | { | |
1668 | struct ath10k *ar = container_of(work, struct ath10k, | |
1669 | set_coverage_class_work); | |
1670 | ||
1671 | if (ar->hw_params.hw_ops->set_coverage_class) | |
1672 | ar->hw_params.hw_ops->set_coverage_class(ar, -1); | |
1673 | } | |
1674 | ||
5f2144d9 | 1675 | static int ath10k_core_init_firmware_features(struct ath10k *ar) |
cfd1061e | 1676 | { |
c4cdf753 KV |
1677 | struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; |
1678 | ||
1679 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && | |
1680 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { | |
5f2144d9 KV |
1681 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); |
1682 | return -EINVAL; | |
1683 | } | |
1684 | ||
bf3c13ab | 1685 | if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { |
202e86e6 | 1686 | ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", |
bf3c13ab | 1687 | ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); |
202e86e6 KV |
1688 | return -EINVAL; |
1689 | } | |
1690 | ||
ccec9038 DL |
1691 | ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; |
1692 | switch (ath10k_cryptmode_param) { | |
1693 | case ATH10K_CRYPT_MODE_HW: | |
1694 | clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); | |
1695 | clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); | |
1696 | break; | |
1697 | case ATH10K_CRYPT_MODE_SW: | |
1698 | if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, | |
c4cdf753 | 1699 | fw_file->fw_features)) { |
ccec9038 DL |
1700 | ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); |
1701 | return -EINVAL; | |
1702 | } | |
1703 | ||
1704 | set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); | |
1705 | set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); | |
1706 | break; | |
1707 | default: | |
1708 | ath10k_info(ar, "invalid cryptmode: %d\n", | |
1709 | ath10k_cryptmode_param); | |
1710 | return -EINVAL; | |
1711 | } | |
1712 | ||
1713 | ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; | |
1714 | ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; | |
1715 | ||
b6c7bafa BC |
1716 | if (rawmode) { |
1717 | if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, | |
c4cdf753 | 1718 | fw_file->fw_features)) { |
b6c7bafa BC |
1719 | ath10k_err(ar, "rawmode = 1 requires support from firmware"); |
1720 | return -EINVAL; | |
1721 | } | |
1722 | set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); | |
1723 | } | |
1724 | ||
ccec9038 DL |
1725 | if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { |
1726 | ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; | |
1727 | ||
1728 | /* Workaround: | |
1729 | * | |
1730 | * Firmware A-MSDU aggregation breaks with RAW Tx encap mode | |
1731 | * and causes enormous performance issues (malformed frames, | |
1732 | * etc). | |
1733 | * | |
1734 | * Disabling A-MSDU makes RAW mode stable with heavy traffic | |
1735 | * albeit a bit slower compared to regular operation. | |
1736 | */ | |
1737 | ar->htt.max_num_amsdu = 1; | |
1738 | } | |
1739 | ||
202e86e6 KV |
1740 | /* Backwards compatibility for firmwares without |
1741 | * ATH10K_FW_IE_WMI_OP_VERSION. | |
1742 | */ | |
bf3c13ab | 1743 | if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { |
c4cdf753 | 1744 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { |
4a16fbec | 1745 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, |
c4cdf753 | 1746 | fw_file->fw_features)) |
bf3c13ab | 1747 | fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; |
202e86e6 | 1748 | else |
bf3c13ab | 1749 | fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; |
202e86e6 | 1750 | } else { |
bf3c13ab | 1751 | fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; |
202e86e6 KV |
1752 | } |
1753 | } | |
1754 | ||
bf3c13ab | 1755 | switch (fw_file->wmi_op_version) { |
202e86e6 | 1756 | case ATH10K_FW_WMI_OP_VERSION_MAIN: |
cfd1061e MK |
1757 | ar->max_num_peers = TARGET_NUM_PEERS; |
1758 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
30c78167 | 1759 | ar->max_num_vdevs = TARGET_NUM_VDEVS; |
91ad5f56 | 1760 | ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; |
6274cd41 YL |
1761 | ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | |
1762 | WMI_STAT_PEER; | |
5c8726ec | 1763 | ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; |
202e86e6 KV |
1764 | break; |
1765 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
1766 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
4a16fbec | 1767 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
cc61a1bb | 1768 | if (ath10k_peer_stats_enabled(ar)) { |
af9a6a3a AK |
1769 | ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; |
1770 | ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; | |
1771 | } else { | |
1772 | ar->max_num_peers = TARGET_10X_NUM_PEERS; | |
1773 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
1774 | } | |
30c78167 | 1775 | ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; |
91ad5f56 | 1776 | ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; |
6274cd41 | 1777 | ar->fw_stats_req_mask = WMI_STAT_PEER; |
5c8726ec | 1778 | ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; |
202e86e6 | 1779 | break; |
ca996ec5 MK |
1780 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
1781 | ar->max_num_peers = TARGET_TLV_NUM_PEERS; | |
1782 | ar->max_num_stations = TARGET_TLV_NUM_STATIONS; | |
49274332 | 1783 | ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; |
8cca3d60 | 1784 | ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; |
ca996ec5 | 1785 | ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; |
25c86619 | 1786 | ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; |
6274cd41 YL |
1787 | ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | |
1788 | WMI_STAT_PEER; | |
5c8726ec | 1789 | ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; |
ca996ec5 | 1790 | break; |
9bd21322 | 1791 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
d1e52a8e RM |
1792 | ar->max_num_peers = TARGET_10_4_NUM_PEERS; |
1793 | ar->max_num_stations = TARGET_10_4_NUM_STATIONS; | |
1794 | ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; | |
1795 | ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; | |
1796 | ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; | |
f9575793 MSS |
1797 | ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | |
1798 | WMI_10_4_STAT_PEER_EXTD; | |
5699a6f2 | 1799 | ar->max_spatial_stream = ar->hw_params.max_spatial_stream; |
99ad1cba MK |
1800 | |
1801 | if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, | |
c4cdf753 | 1802 | fw_file->fw_features)) |
99ad1cba MK |
1803 | ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; |
1804 | else | |
1805 | ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; | |
d1e52a8e | 1806 | break; |
202e86e6 KV |
1807 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
1808 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
1809 | WARN_ON(1); | |
1810 | return -EINVAL; | |
cfd1061e | 1811 | } |
5f2144d9 | 1812 | |
dc3632a1 KV |
1813 | /* Backwards compatibility for firmwares without |
1814 | * ATH10K_FW_IE_HTT_OP_VERSION. | |
1815 | */ | |
77561f93 | 1816 | if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { |
bf3c13ab | 1817 | switch (fw_file->wmi_op_version) { |
dc3632a1 | 1818 | case ATH10K_FW_WMI_OP_VERSION_MAIN: |
77561f93 | 1819 | fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; |
dc3632a1 KV |
1820 | break; |
1821 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
1822 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
1823 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: | |
77561f93 | 1824 | fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; |
dc3632a1 KV |
1825 | break; |
1826 | case ATH10K_FW_WMI_OP_VERSION_TLV: | |
77561f93 | 1827 | fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; |
dc3632a1 | 1828 | break; |
9bd21322 | 1829 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
dc3632a1 KV |
1830 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
1831 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
ce30c4fe | 1832 | ath10k_err(ar, "htt op version not found from fw meta data"); |
dc3632a1 KV |
1833 | return -EINVAL; |
1834 | } | |
1835 | } | |
1836 | ||
5f2144d9 | 1837 | return 0; |
cfd1061e MK |
1838 | } |
1839 | ||
47b1848d MK |
1840 | static int ath10k_core_reset_rx_filter(struct ath10k *ar) |
1841 | { | |
1842 | int ret; | |
1843 | int vdev_id; | |
1844 | int vdev_type; | |
1845 | int vdev_subtype; | |
1846 | const u8 *vdev_addr; | |
1847 | ||
1848 | vdev_id = 0; | |
1849 | vdev_type = WMI_VDEV_TYPE_STA; | |
1850 | vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); | |
1851 | vdev_addr = ar->mac_addr; | |
1852 | ||
1853 | ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, | |
1854 | vdev_addr); | |
1855 | if (ret) { | |
1856 | ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); | |
1857 | return ret; | |
1858 | } | |
1859 | ||
1860 | ret = ath10k_wmi_vdev_delete(ar, vdev_id); | |
1861 | if (ret) { | |
1862 | ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); | |
1863 | return ret; | |
1864 | } | |
1865 | ||
1866 | /* WMI and HTT may use separate HIF pipes and are not guaranteed to be | |
1867 | * serialized properly implicitly. | |
1868 | * | |
1869 | * Moreover (most) WMI commands have no explicit acknowledges. It is | |
1870 | * possible to infer it implicitly by poking firmware with echo | |
1871 | * command - getting a reply means all preceding comments have been | |
1872 | * (mostly) processed. | |
1873 | * | |
1874 | * In case of vdev create/delete this is sufficient. | |
1875 | * | |
1876 | * Without this it's possible to end up with a race when HTT Rx ring is | |
1877 | * started before vdev create/delete hack is complete allowing a short | |
1878 | * window of opportunity to receive (and Tx ACK) a bunch of frames. | |
1879 | */ | |
1880 | ret = ath10k_wmi_barrier(ar); | |
1881 | if (ret) { | |
1882 | ath10k_err(ar, "failed to ping firmware: %d\n", ret); | |
1883 | return ret; | |
1884 | } | |
1885 | ||
1886 | return 0; | |
1887 | } | |
1888 | ||
7ebf721d KV |
1889 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, |
1890 | const struct ath10k_fw_components *fw) | |
5e3dd157 | 1891 | { |
5e3dd157 | 1892 | int status; |
f9575793 | 1893 | u32 val; |
5e3dd157 | 1894 | |
60631c5c KV |
1895 | lockdep_assert_held(&ar->conf_mutex); |
1896 | ||
7962b0d8 MK |
1897 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
1898 | ||
7ebf721d KV |
1899 | ar->running_fw = fw; |
1900 | ||
64d151d4 MK |
1901 | ath10k_bmi_start(ar); |
1902 | ||
5e3dd157 KV |
1903 | if (ath10k_init_configure_target(ar)) { |
1904 | status = -EINVAL; | |
1905 | goto err; | |
1906 | } | |
1907 | ||
83091559 KV |
1908 | status = ath10k_download_cal_data(ar); |
1909 | if (status) | |
1910 | goto err; | |
1911 | ||
163f5264 | 1912 | /* Some of of qca988x solutions are having global reset issue |
617b0f4d KV |
1913 | * during target initialization. Bypassing PLL setting before |
1914 | * downloading firmware and letting the SoC run on REF_CLK is | |
1915 | * fixing the problem. Corresponding firmware change is also needed | |
1916 | * to set the clock source once the target is initialized. | |
163f5264 RM |
1917 | */ |
1918 | if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, | |
c4cdf753 | 1919 | ar->running_fw->fw_file.fw_features)) { |
163f5264 RM |
1920 | status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); |
1921 | if (status) { | |
1922 | ath10k_err(ar, "could not write to skip_clock_init: %d\n", | |
1923 | status); | |
1924 | goto err; | |
1925 | } | |
1926 | } | |
1927 | ||
7ebf721d | 1928 | status = ath10k_download_fw(ar); |
5e3dd157 KV |
1929 | if (status) |
1930 | goto err; | |
1931 | ||
1932 | status = ath10k_init_uart(ar); | |
1933 | if (status) | |
1934 | goto err; | |
1935 | ||
cd003fad MK |
1936 | ar->htc.htc_ops.target_send_suspend_complete = |
1937 | ath10k_send_suspend_complete; | |
5e3dd157 | 1938 | |
cd003fad MK |
1939 | status = ath10k_htc_init(ar); |
1940 | if (status) { | |
7aa7a72a | 1941 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
1942 | goto err; |
1943 | } | |
1944 | ||
1945 | status = ath10k_bmi_done(ar); | |
1946 | if (status) | |
cd003fad | 1947 | goto err; |
5e3dd157 KV |
1948 | |
1949 | status = ath10k_wmi_attach(ar); | |
1950 | if (status) { | |
7aa7a72a | 1951 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 1952 | goto err; |
5e3dd157 KV |
1953 | } |
1954 | ||
95bf21f9 MK |
1955 | status = ath10k_htt_init(ar); |
1956 | if (status) { | |
7aa7a72a | 1957 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
1958 | goto err_wmi_detach; |
1959 | } | |
1960 | ||
9ec34a86 | 1961 | status = ath10k_htt_tx_start(&ar->htt); |
95bf21f9 | 1962 | if (status) { |
7aa7a72a | 1963 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
1964 | goto err_wmi_detach; |
1965 | } | |
1966 | ||
1967 | status = ath10k_htt_rx_alloc(&ar->htt); | |
1968 | if (status) { | |
7aa7a72a | 1969 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
1970 | goto err_htt_tx_detach; |
1971 | } | |
1972 | ||
67e3c63f MK |
1973 | status = ath10k_hif_start(ar); |
1974 | if (status) { | |
7aa7a72a | 1975 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 1976 | goto err_htt_rx_detach; |
67e3c63f MK |
1977 | } |
1978 | ||
1979 | status = ath10k_htc_wait_target(&ar->htc); | |
1980 | if (status) { | |
7aa7a72a | 1981 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
1982 | goto err_hif_stop; |
1983 | } | |
5e3dd157 | 1984 | |
43d2a30f KV |
1985 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1986 | status = ath10k_htt_connect(&ar->htt); | |
1987 | if (status) { | |
1988 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
1989 | goto err_hif_stop; | |
1990 | } | |
5e3dd157 KV |
1991 | } |
1992 | ||
95bf21f9 MK |
1993 | status = ath10k_wmi_connect(ar); |
1994 | if (status) { | |
7aa7a72a | 1995 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
1996 | goto err_hif_stop; |
1997 | } | |
1998 | ||
1999 | status = ath10k_htc_start(&ar->htc); | |
2000 | if (status) { | |
7aa7a72a | 2001 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
2002 | goto err_hif_stop; |
2003 | } | |
2004 | ||
43d2a30f KV |
2005 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
2006 | status = ath10k_wmi_wait_for_service_ready(ar); | |
9eea5689 | 2007 | if (status) { |
43d2a30f | 2008 | ath10k_warn(ar, "wmi service ready event not received"); |
43d2a30f KV |
2009 | goto err_hif_stop; |
2010 | } | |
95bf21f9 | 2011 | } |
5e3dd157 | 2012 | |
7aa7a72a | 2013 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 2014 | ar->hw->wiphy->fw_version); |
5e3dd157 | 2015 | |
cb428152 T |
2016 | if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && |
2017 | mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
f9575793 MSS |
2018 | val = 0; |
2019 | if (ath10k_peer_stats_enabled(ar)) | |
2020 | val = WMI_10_4_PEER_STATS; | |
2021 | ||
fa7937e3 RM |
2022 | if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) |
2023 | val |= WMI_10_4_BSS_CHANNEL_INFO_64; | |
2024 | ||
39136248 RM |
2025 | /* 10.4 firmware supports BT-Coex without reloading firmware |
2026 | * via pdev param. To support Bluetooth coexistence pdev param, | |
2027 | * WMI_COEX_GPIO_SUPPORT of extended resource config should be | |
2028 | * enabled always. | |
2029 | */ | |
2030 | if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && | |
2031 | test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, | |
2032 | ar->running_fw->fw_file.fw_features)) | |
2033 | val |= WMI_10_4_COEX_GPIO_SUPPORT; | |
2034 | ||
7e247a9e | 2035 | status = ath10k_mac_ext_resource_config(ar, val); |
f9575793 MSS |
2036 | if (status) { |
2037 | ath10k_err(ar, | |
2038 | "failed to send ext resource cfg command : %d\n", | |
2039 | status); | |
2040 | goto err_hif_stop; | |
2041 | } | |
2042 | } | |
2043 | ||
5e3dd157 KV |
2044 | status = ath10k_wmi_cmd_init(ar); |
2045 | if (status) { | |
7aa7a72a MK |
2046 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
2047 | status); | |
b7967dc7 | 2048 | goto err_hif_stop; |
5e3dd157 KV |
2049 | } |
2050 | ||
2051 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
9eea5689 | 2052 | if (status) { |
7aa7a72a | 2053 | ath10k_err(ar, "wmi unified ready event not received\n"); |
b7967dc7 | 2054 | goto err_hif_stop; |
5e3dd157 KV |
2055 | } |
2056 | ||
47b1848d MK |
2057 | /* Some firmware revisions do not properly set up hardware rx filter |
2058 | * registers. | |
2059 | * | |
2060 | * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK | |
2061 | * is filled with 0s instead of 1s allowing HW to respond with ACKs to | |
2062 | * any frames that matches MAC_PCU_RX_FILTER which is also | |
2063 | * misconfigured to accept anything. | |
2064 | * | |
2065 | * The ADDR1 is programmed using internal firmware structure field and | |
2066 | * can't be (easily/sanely) reached from the driver explicitly. It is | |
2067 | * possible to implicitly make it correct by creating a dummy vdev and | |
2068 | * then deleting it. | |
2069 | */ | |
cb428152 T |
2070 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
2071 | status = ath10k_core_reset_rx_filter(ar); | |
2072 | if (status) { | |
2073 | ath10k_err(ar, | |
2074 | "failed to reset rx filter: %d\n", status); | |
2075 | goto err_hif_stop; | |
2076 | } | |
47b1848d MK |
2077 | } |
2078 | ||
c545070e MK |
2079 | /* If firmware indicates Full Rx Reorder support it must be used in a |
2080 | * slightly different manner. Let HTT code know. | |
2081 | */ | |
2082 | ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, | |
2083 | ar->wmi.svc_map)); | |
2084 | ||
2085 | status = ath10k_htt_rx_ring_refill(ar); | |
2086 | if (status) { | |
2087 | ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); | |
2088 | goto err_hif_stop; | |
2089 | } | |
2090 | ||
30d2049b BG |
2091 | if (ar->max_num_vdevs >= 64) |
2092 | ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; | |
2093 | else | |
2094 | ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; | |
4ad24a9d AK |
2095 | |
2096 | INIT_LIST_HEAD(&ar->arvifs); | |
2097 | ||
43d2a30f KV |
2098 | /* we don't care about HTT in UTF mode */ |
2099 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
2100 | status = ath10k_htt_setup(&ar->htt); | |
2101 | if (status) { | |
2102 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
2103 | goto err_hif_stop; | |
2104 | } | |
95bf21f9 | 2105 | } |
5e3dd157 | 2106 | |
db66ea04 KV |
2107 | status = ath10k_debug_start(ar); |
2108 | if (status) | |
b7967dc7 | 2109 | goto err_hif_stop; |
db66ea04 | 2110 | |
dd30a36e MK |
2111 | return 0; |
2112 | ||
67e3c63f MK |
2113 | err_hif_stop: |
2114 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
2115 | err_htt_rx_detach: |
2116 | ath10k_htt_rx_free(&ar->htt); | |
2117 | err_htt_tx_detach: | |
2118 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
2119 | err_wmi_detach: |
2120 | ath10k_wmi_detach(ar); | |
2121 | err: | |
2122 | return status; | |
2123 | } | |
818bdd16 | 2124 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 2125 | |
00f5482b MP |
2126 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
2127 | { | |
2128 | int ret; | |
a7a42849 | 2129 | unsigned long time_left; |
00f5482b MP |
2130 | |
2131 | reinit_completion(&ar->target_suspend); | |
2132 | ||
2133 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
2134 | if (ret) { | |
7aa7a72a | 2135 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
2136 | return ret; |
2137 | } | |
2138 | ||
a7a42849 | 2139 | time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); |
00f5482b | 2140 | |
a7a42849 | 2141 | if (!time_left) { |
7aa7a72a | 2142 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
2143 | return -ETIMEDOUT; |
2144 | } | |
2145 | ||
2146 | return 0; | |
2147 | } | |
2148 | ||
dd30a36e MK |
2149 | void ath10k_core_stop(struct ath10k *ar) |
2150 | { | |
60631c5c | 2151 | lockdep_assert_held(&ar->conf_mutex); |
f1ee2682 | 2152 | ath10k_debug_stop(ar); |
60631c5c | 2153 | |
00f5482b | 2154 | /* try to suspend target */ |
43d2a30f KV |
2155 | if (ar->state != ATH10K_STATE_RESTARTING && |
2156 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
2157 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
2158 | ||
95bf21f9 | 2159 | ath10k_hif_stop(ar); |
9ec34a86 | 2160 | ath10k_htt_tx_stop(&ar->htt); |
95bf21f9 | 2161 | ath10k_htt_rx_free(&ar->htt); |
dd30a36e MK |
2162 | ath10k_wmi_detach(ar); |
2163 | } | |
818bdd16 MK |
2164 | EXPORT_SYMBOL(ath10k_core_stop); |
2165 | ||
2166 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
2167 | * order to know what hw capabilities should be advertised to mac80211 it is | |
2168 | * necessary to load the firmware (and tear it down immediately since start | |
2169 | * hook will try to init it again) before registering */ | |
2170 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
2171 | { | |
29385057 MK |
2172 | struct bmi_target_info target_info; |
2173 | int ret = 0; | |
818bdd16 MK |
2174 | |
2175 | ret = ath10k_hif_power_up(ar); | |
2176 | if (ret) { | |
7aa7a72a | 2177 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
2178 | return ret; |
2179 | } | |
2180 | ||
29385057 MK |
2181 | memset(&target_info, 0, sizeof(target_info)); |
2182 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
2183 | if (ret) { | |
7aa7a72a | 2184 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 2185 | goto err_power_down; |
29385057 MK |
2186 | } |
2187 | ||
2188 | ar->target_version = target_info.version; | |
2189 | ar->hw->wiphy->hw_version = target_info.version; | |
2190 | ||
2191 | ret = ath10k_init_hw_params(ar); | |
2192 | if (ret) { | |
7aa7a72a | 2193 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 2194 | goto err_power_down; |
29385057 MK |
2195 | } |
2196 | ||
2197 | ret = ath10k_core_fetch_firmware_files(ar); | |
2198 | if (ret) { | |
7aa7a72a | 2199 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 2200 | goto err_power_down; |
29385057 MK |
2201 | } |
2202 | ||
45317355 KV |
2203 | BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != |
2204 | sizeof(ar->normal_mode_fw.fw_file.fw_version)); | |
2205 | memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, | |
2206 | sizeof(ar->hw->wiphy->fw_version)); | |
2207 | ||
23f591ea KV |
2208 | ath10k_debug_print_hwfw_info(ar); |
2209 | ||
3d9195ea RM |
2210 | ret = ath10k_core_pre_cal_download(ar); |
2211 | if (ret) { | |
2212 | /* pre calibration data download is not necessary | |
2213 | * for all the chipsets. Ignore failures and continue. | |
2214 | */ | |
2215 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
2216 | "could not load pre cal data: %d\n", ret); | |
2217 | } | |
2218 | ||
db0984e5 MP |
2219 | ret = ath10k_core_get_board_id_from_otp(ar); |
2220 | if (ret && ret != -EOPNOTSUPP) { | |
b091f369 | 2221 | ath10k_err(ar, "failed to get board id from otp: %d\n", |
db0984e5 | 2222 | ret); |
b9c191be | 2223 | goto err_free_firmware_files; |
db0984e5 MP |
2224 | } |
2225 | ||
1657b8f8 WR |
2226 | ret = ath10k_core_check_smbios(ar); |
2227 | if (ret) | |
2228 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n"); | |
2229 | ||
db0984e5 MP |
2230 | ret = ath10k_core_fetch_board_file(ar); |
2231 | if (ret) { | |
2232 | ath10k_err(ar, "failed to fetch board file: %d\n", ret); | |
2233 | goto err_free_firmware_files; | |
2234 | } | |
2235 | ||
23f591ea KV |
2236 | ath10k_debug_print_board_info(ar); |
2237 | ||
5f2144d9 KV |
2238 | ret = ath10k_core_init_firmware_features(ar); |
2239 | if (ret) { | |
2240 | ath10k_err(ar, "fatal problem with firmware features: %d\n", | |
2241 | ret); | |
2242 | goto err_free_firmware_files; | |
2243 | } | |
cfd1061e | 2244 | |
5459c5d4 | 2245 | ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); |
dcb02db1 VT |
2246 | if (ret) { |
2247 | ath10k_err(ar, "failed to initialize code swap segment: %d\n", | |
2248 | ret); | |
2249 | goto err_free_firmware_files; | |
2250 | } | |
2251 | ||
60631c5c KV |
2252 | mutex_lock(&ar->conf_mutex); |
2253 | ||
7ebf721d KV |
2254 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, |
2255 | &ar->normal_mode_fw); | |
818bdd16 | 2256 | if (ret) { |
7aa7a72a | 2257 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 2258 | goto err_unlock; |
818bdd16 MK |
2259 | } |
2260 | ||
23f591ea | 2261 | ath10k_debug_print_boot_info(ar); |
818bdd16 | 2262 | ath10k_core_stop(ar); |
60631c5c KV |
2263 | |
2264 | mutex_unlock(&ar->conf_mutex); | |
2265 | ||
818bdd16 MK |
2266 | ath10k_hif_power_down(ar); |
2267 | return 0; | |
c6ce492d KV |
2268 | |
2269 | err_unlock: | |
2270 | mutex_unlock(&ar->conf_mutex); | |
2271 | ||
5f2144d9 | 2272 | err_free_firmware_files: |
c6ce492d KV |
2273 | ath10k_core_free_firmware_files(ar); |
2274 | ||
2275 | err_power_down: | |
2276 | ath10k_hif_power_down(ar); | |
2277 | ||
2278 | return ret; | |
818bdd16 | 2279 | } |
dd30a36e | 2280 | |
6782cb69 | 2281 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 2282 | { |
6782cb69 | 2283 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
2284 | int status; |
2285 | ||
8c1d7fa5 TP |
2286 | /* peer stats are enabled by default */ |
2287 | set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); | |
2288 | ||
818bdd16 MK |
2289 | status = ath10k_core_probe_fw(ar); |
2290 | if (status) { | |
7aa7a72a | 2291 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 2292 | goto err; |
818bdd16 | 2293 | } |
dd30a36e | 2294 | |
5e3dd157 | 2295 | status = ath10k_mac_register(ar); |
818bdd16 | 2296 | if (status) { |
7aa7a72a | 2297 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 2298 | goto err_release_fw; |
818bdd16 | 2299 | } |
5e3dd157 | 2300 | |
e13cf7a3 | 2301 | status = ath10k_debug_register(ar); |
5e3dd157 | 2302 | if (status) { |
7aa7a72a | 2303 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
2304 | goto err_unregister_mac; |
2305 | } | |
2306 | ||
855aed12 SW |
2307 | status = ath10k_spectral_create(ar); |
2308 | if (status) { | |
7aa7a72a | 2309 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
2310 | goto err_debug_destroy; |
2311 | } | |
2312 | ||
fe6f36d6 RM |
2313 | status = ath10k_thermal_register(ar); |
2314 | if (status) { | |
2315 | ath10k_err(ar, "could not register thermal device: %d\n", | |
2316 | status); | |
2317 | goto err_spectral_destroy; | |
2318 | } | |
2319 | ||
6782cb69 MK |
2320 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
2321 | return; | |
5e3dd157 | 2322 | |
fe6f36d6 RM |
2323 | err_spectral_destroy: |
2324 | ath10k_spectral_destroy(ar); | |
855aed12 SW |
2325 | err_debug_destroy: |
2326 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
2327 | err_unregister_mac: |
2328 | ath10k_mac_unregister(ar); | |
29385057 MK |
2329 | err_release_fw: |
2330 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 2331 | err: |
a491a920 MK |
2332 | /* TODO: It's probably a good idea to release device from the driver |
2333 | * but calling device_release_driver() here will cause a deadlock. | |
2334 | */ | |
6782cb69 MK |
2335 | return; |
2336 | } | |
2337 | ||
2338 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
2339 | { | |
6782cb69 | 2340 | ar->chip_id = chip_id; |
6782cb69 MK |
2341 | queue_work(ar->workqueue, &ar->register_work); |
2342 | ||
2343 | return 0; | |
5e3dd157 KV |
2344 | } |
2345 | EXPORT_SYMBOL(ath10k_core_register); | |
2346 | ||
2347 | void ath10k_core_unregister(struct ath10k *ar) | |
2348 | { | |
6782cb69 MK |
2349 | cancel_work_sync(&ar->register_work); |
2350 | ||
2351 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
2352 | return; | |
2353 | ||
fe6f36d6 | 2354 | ath10k_thermal_unregister(ar); |
804eef14 SW |
2355 | /* Stop spectral before unregistering from mac80211 to remove the |
2356 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
2357 | * would be already be free'd recursively, leading to a double free. | |
2358 | */ | |
2359 | ath10k_spectral_destroy(ar); | |
2360 | ||
5e3dd157 KV |
2361 | /* We must unregister from mac80211 before we stop HTC and HIF. |
2362 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
2363 | * unhappy about callback failures. */ | |
2364 | ath10k_mac_unregister(ar); | |
db66ea04 | 2365 | |
43d2a30f KV |
2366 | ath10k_testmode_destroy(ar); |
2367 | ||
29385057 | 2368 | ath10k_core_free_firmware_files(ar); |
0a51b343 | 2369 | ath10k_core_free_board_files(ar); |
6f1f56ea | 2370 | |
e13cf7a3 | 2371 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
2372 | } |
2373 | EXPORT_SYMBOL(ath10k_core_unregister); | |
2374 | ||
e7b54194 | 2375 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 2376 | enum ath10k_bus bus, |
d63955b3 | 2377 | enum ath10k_hw_rev hw_rev, |
0d0a6939 MK |
2378 | const struct ath10k_hif_ops *hif_ops) |
2379 | { | |
2380 | struct ath10k *ar; | |
e13cf7a3 | 2381 | int ret; |
0d0a6939 | 2382 | |
e7b54194 | 2383 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
2384 | if (!ar) |
2385 | return NULL; | |
2386 | ||
2387 | ar->ath_common.priv = ar; | |
2388 | ar->ath_common.hw = ar->hw; | |
0d0a6939 | 2389 | ar->dev = dev; |
d63955b3 | 2390 | ar->hw_rev = hw_rev; |
0d0a6939 | 2391 | ar->hif.ops = hif_ops; |
e07db352 | 2392 | ar->hif.bus = bus; |
0d0a6939 | 2393 | |
d63955b3 MK |
2394 | switch (hw_rev) { |
2395 | case ATH10K_HW_QCA988X: | |
6fd3dd71 | 2396 | case ATH10K_HW_QCA9887: |
d63955b3 | 2397 | ar->regs = &qca988x_regs; |
2f2cfc4a | 2398 | ar->hw_values = &qca988x_values; |
d63955b3 MK |
2399 | break; |
2400 | case ATH10K_HW_QCA6174: | |
a226b519 | 2401 | case ATH10K_HW_QCA9377: |
d63955b3 | 2402 | ar->regs = &qca6174_regs; |
2f2cfc4a | 2403 | ar->hw_values = &qca6174_values; |
d63955b3 | 2404 | break; |
8bd47021 | 2405 | case ATH10K_HW_QCA99X0: |
651b4cdc | 2406 | case ATH10K_HW_QCA9984: |
8bd47021 VT |
2407 | ar->regs = &qca99x0_regs; |
2408 | ar->hw_values = &qca99x0_values; | |
2409 | break; | |
e565c312 AK |
2410 | case ATH10K_HW_QCA9888: |
2411 | ar->regs = &qca99x0_regs; | |
2412 | ar->hw_values = &qca9888_values; | |
2413 | break; | |
37a219a5 RM |
2414 | case ATH10K_HW_QCA4019: |
2415 | ar->regs = &qca4019_regs; | |
2416 | ar->hw_values = &qca4019_values; | |
2417 | break; | |
d63955b3 MK |
2418 | default: |
2419 | ath10k_err(ar, "unsupported core hardware revision %d\n", | |
2420 | hw_rev); | |
2421 | ret = -ENOTSUPP; | |
2422 | goto err_free_mac; | |
2423 | } | |
2424 | ||
0d0a6939 MK |
2425 | init_completion(&ar->scan.started); |
2426 | init_completion(&ar->scan.completed); | |
2427 | init_completion(&ar->scan.on_channel); | |
2428 | init_completion(&ar->target_suspend); | |
5fd3ac3c | 2429 | init_completion(&ar->wow.wakeup_completed); |
0d0a6939 MK |
2430 | |
2431 | init_completion(&ar->install_key_done); | |
2432 | init_completion(&ar->vdev_setup_done); | |
ac2953fc | 2433 | init_completion(&ar->thermal.wmi_sync); |
fa7937e3 | 2434 | init_completion(&ar->bss_survey_done); |
0d0a6939 | 2435 | |
5c81c7fd | 2436 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
2437 | |
2438 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
2439 | if (!ar->workqueue) | |
e13cf7a3 | 2440 | goto err_free_mac; |
0d0a6939 | 2441 | |
c8ecfc1c RM |
2442 | ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); |
2443 | if (!ar->workqueue_aux) | |
2444 | goto err_free_wq; | |
2445 | ||
0d0a6939 MK |
2446 | mutex_init(&ar->conf_mutex); |
2447 | spin_lock_init(&ar->data_lock); | |
29946878 | 2448 | spin_lock_init(&ar->txqs_lock); |
0d0a6939 | 2449 | |
29946878 | 2450 | INIT_LIST_HEAD(&ar->txqs); |
0d0a6939 MK |
2451 | INIT_LIST_HEAD(&ar->peers); |
2452 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
2453 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
2454 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
2455 | |
2456 | init_completion(&ar->offchan_tx_completed); | |
2457 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
2458 | skb_queue_head_init(&ar->offchan_tx_queue); | |
2459 | ||
2460 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
2461 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
2462 | ||
6782cb69 | 2463 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 | 2464 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
ebee76f7 BB |
2465 | INIT_WORK(&ar->set_coverage_class_work, |
2466 | ath10k_core_set_coverage_class_work); | |
0d0a6939 | 2467 | |
3c97f5de RM |
2468 | init_dummy_netdev(&ar->napi_dev); |
2469 | ||
e13cf7a3 MK |
2470 | ret = ath10k_debug_create(ar); |
2471 | if (ret) | |
c8ecfc1c | 2472 | goto err_free_aux_wq; |
e13cf7a3 | 2473 | |
0d0a6939 MK |
2474 | return ar; |
2475 | ||
c8ecfc1c RM |
2476 | err_free_aux_wq: |
2477 | destroy_workqueue(ar->workqueue_aux); | |
e13cf7a3 MK |
2478 | err_free_wq: |
2479 | destroy_workqueue(ar->workqueue); | |
2480 | ||
2481 | err_free_mac: | |
0d0a6939 | 2482 | ath10k_mac_destroy(ar); |
e13cf7a3 | 2483 | |
0d0a6939 MK |
2484 | return NULL; |
2485 | } | |
2486 | EXPORT_SYMBOL(ath10k_core_create); | |
2487 | ||
2488 | void ath10k_core_destroy(struct ath10k *ar) | |
2489 | { | |
2490 | flush_workqueue(ar->workqueue); | |
2491 | destroy_workqueue(ar->workqueue); | |
2492 | ||
c8ecfc1c RM |
2493 | flush_workqueue(ar->workqueue_aux); |
2494 | destroy_workqueue(ar->workqueue_aux); | |
2495 | ||
e13cf7a3 | 2496 | ath10k_debug_destroy(ar); |
9ec34a86 | 2497 | ath10k_htt_tx_destroy(&ar->htt); |
a925a376 | 2498 | ath10k_wmi_free_host_mem(ar); |
0d0a6939 MK |
2499 | ath10k_mac_destroy(ar); |
2500 | } | |
2501 | EXPORT_SYMBOL(ath10k_core_destroy); | |
2502 | ||
5e3dd157 | 2503 | MODULE_AUTHOR("Qualcomm Atheros"); |
b855de0f | 2504 | MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); |
5e3dd157 | 2505 | MODULE_LICENSE("Dual BSD/GPL"); |