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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
5e3dd157 KV |
31 | |
32 | unsigned int ath10k_debug_mask; | |
33 | static bool uart_print; | |
34 | static unsigned int ath10k_p2p; | |
8868b12c RM |
35 | static bool skip_otp; |
36 | ||
5e3dd157 KV |
37 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
38 | module_param(uart_print, bool, 0644); | |
39 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
8868b12c RM |
40 | module_param(skip_otp, bool, 0644); |
41 | ||
5e3dd157 KV |
42 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
43 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
44 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
8868b12c | 45 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
5e3dd157 KV |
46 | |
47 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
48 | { |
49 | .id = QCA988X_HW_2_0_VERSION, | |
50 | .name = "qca988x hw2.0", | |
51 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 52 | .uart_pin = 7, |
5e3dd157 KV |
53 | .fw = { |
54 | .dir = QCA988X_HW_2_0_FW_DIR, | |
55 | .fw = QCA988X_HW_2_0_FW_FILE, | |
56 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
57 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
58 | .board_size = QCA988X_BOARD_DATA_SZ, |
59 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
60 | }, |
61 | }, | |
62 | }; | |
63 | ||
64 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
65 | { | |
7aa7a72a | 66 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 67 | |
9042e17d | 68 | complete(&ar->target_suspend); |
5e3dd157 KV |
69 | } |
70 | ||
5e3dd157 KV |
71 | static int ath10k_init_configure_target(struct ath10k *ar) |
72 | { | |
73 | u32 param_host; | |
74 | int ret; | |
75 | ||
76 | /* tell target which HTC version it is used*/ | |
77 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
78 | HTC_PROTOCOL_VERSION); | |
79 | if (ret) { | |
7aa7a72a | 80 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
81 | return ret; |
82 | } | |
83 | ||
84 | /* set the firmware mode to STA/IBSS/AP */ | |
85 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
86 | if (ret) { | |
7aa7a72a | 87 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
88 | return ret; |
89 | } | |
90 | ||
91 | /* TODO following parameters need to be re-visited. */ | |
92 | /* num_device */ | |
93 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
94 | /* Firmware mode */ | |
95 | /* FIXME: Why FW_MODE_AP ??.*/ | |
96 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
97 | /* mac_addr_method */ | |
98 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
99 | /* firmware_bridge */ | |
100 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
101 | /* fwsubmode */ | |
102 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
103 | ||
104 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
105 | if (ret) { | |
7aa7a72a | 106 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
107 | return ret; |
108 | } | |
109 | ||
110 | /* We do all byte-swapping on the host */ | |
111 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
112 | if (ret) { | |
7aa7a72a | 113 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
114 | return ret; |
115 | } | |
116 | ||
117 | /* FW descriptor/Data swap flags */ | |
118 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
119 | ||
120 | if (ret) { | |
7aa7a72a | 121 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
122 | return ret; |
123 | } | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
128 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
129 | const char *dir, | |
130 | const char *file) | |
131 | { | |
132 | char filename[100]; | |
133 | const struct firmware *fw; | |
134 | int ret; | |
135 | ||
136 | if (file == NULL) | |
137 | return ERR_PTR(-ENOENT); | |
138 | ||
139 | if (dir == NULL) | |
140 | dir = "."; | |
141 | ||
142 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
143 | ret = request_firmware(&fw, filename, ar->dev); | |
144 | if (ret) | |
145 | return ERR_PTR(ret); | |
146 | ||
147 | return fw; | |
148 | } | |
149 | ||
a58227ef KV |
150 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
151 | size_t data_len) | |
5e3dd157 | 152 | { |
9764a2af MK |
153 | u32 board_data_size = ar->hw_params.fw.board_size; |
154 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
155 | u32 board_ext_data_addr; |
156 | int ret; | |
157 | ||
158 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
159 | if (ret) { | |
7aa7a72a MK |
160 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
161 | ret); | |
5e3dd157 KV |
162 | return ret; |
163 | } | |
164 | ||
7aa7a72a | 165 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 166 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
167 | board_ext_data_addr); |
168 | ||
169 | if (board_ext_data_addr == 0) | |
170 | return 0; | |
171 | ||
a58227ef | 172 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 173 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 174 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
175 | return -EINVAL; |
176 | } | |
177 | ||
178 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 179 | data + board_data_size, |
5e3dd157 KV |
180 | board_ext_data_size); |
181 | if (ret) { | |
7aa7a72a | 182 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
183 | return ret; |
184 | } | |
185 | ||
186 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
187 | (board_ext_data_size << 16) | 1); | |
188 | if (ret) { | |
7aa7a72a MK |
189 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
190 | ret); | |
5e3dd157 KV |
191 | return ret; |
192 | } | |
193 | ||
194 | return 0; | |
195 | } | |
196 | ||
a58227ef KV |
197 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
198 | size_t data_len) | |
5e3dd157 | 199 | { |
9764a2af | 200 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 201 | u32 address; |
5e3dd157 KV |
202 | int ret; |
203 | ||
a58227ef | 204 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 205 | if (ret) { |
7aa7a72a | 206 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
207 | goto exit; |
208 | } | |
209 | ||
210 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
211 | if (ret) { | |
7aa7a72a | 212 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
213 | goto exit; |
214 | } | |
215 | ||
a58227ef | 216 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 217 | min_t(u32, board_data_size, |
a58227ef | 218 | data_len)); |
5e3dd157 | 219 | if (ret) { |
7aa7a72a | 220 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
221 | goto exit; |
222 | } | |
223 | ||
224 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
225 | if (ret) { | |
7aa7a72a | 226 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
227 | goto exit; |
228 | } | |
229 | ||
230 | exit: | |
5e3dd157 KV |
231 | return ret; |
232 | } | |
233 | ||
a58227ef KV |
234 | static int ath10k_download_cal_file(struct ath10k *ar) |
235 | { | |
236 | int ret; | |
237 | ||
238 | if (!ar->cal_file) | |
239 | return -ENOENT; | |
240 | ||
241 | if (IS_ERR(ar->cal_file)) | |
242 | return PTR_ERR(ar->cal_file); | |
243 | ||
244 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
245 | ar->cal_file->size); | |
246 | if (ret) { | |
247 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
248 | return ret; | |
249 | } | |
250 | ||
251 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
5aabff05 TK |
256 | static int ath10k_download_cal_dt(struct ath10k *ar) |
257 | { | |
258 | struct device_node *node; | |
259 | int data_len; | |
260 | void *data; | |
261 | int ret; | |
262 | ||
263 | node = ar->dev->of_node; | |
264 | if (!node) | |
265 | /* Device Tree is optional, don't print any warnings if | |
266 | * there's no node for ath10k. | |
267 | */ | |
268 | return -ENOENT; | |
269 | ||
270 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
271 | &data_len)) { | |
272 | /* The calibration data node is optional */ | |
273 | return -ENOENT; | |
274 | } | |
275 | ||
276 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
277 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
278 | data_len); | |
279 | ret = -EMSGSIZE; | |
280 | goto out; | |
281 | } | |
282 | ||
283 | data = kmalloc(data_len, GFP_KERNEL); | |
284 | if (!data) { | |
285 | ret = -ENOMEM; | |
286 | goto out; | |
287 | } | |
288 | ||
289 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
290 | data, data_len); | |
291 | if (ret) { | |
292 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
293 | ret); | |
294 | goto out_free; | |
295 | } | |
296 | ||
297 | ret = ath10k_download_board_data(ar, data, data_len); | |
298 | if (ret) { | |
299 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
300 | ret); | |
301 | goto out_free; | |
302 | } | |
303 | ||
304 | ret = 0; | |
305 | ||
306 | out_free: | |
307 | kfree(data); | |
308 | ||
309 | out: | |
310 | return ret; | |
311 | } | |
312 | ||
5e3dd157 KV |
313 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
314 | { | |
d6d4a58d | 315 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
316 | int ret; |
317 | ||
a58227ef | 318 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
319 | if (ret) { |
320 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
321 | return ret; | |
322 | } | |
323 | ||
5e3dd157 KV |
324 | /* OTP is optional */ |
325 | ||
7f06ea1e | 326 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 327 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 328 | ar->otp_data, ar->otp_len); |
5e3dd157 | 329 | return 0; |
7f06ea1e KV |
330 | } |
331 | ||
7aa7a72a | 332 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 333 | address, ar->otp_len); |
5e3dd157 | 334 | |
958df3a0 | 335 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 336 | if (ret) { |
7aa7a72a | 337 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 338 | return ret; |
5e3dd157 KV |
339 | } |
340 | ||
d6d4a58d | 341 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 342 | if (ret) { |
7aa7a72a | 343 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 344 | return ret; |
5e3dd157 KV |
345 | } |
346 | ||
7aa7a72a | 347 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 348 | |
8868b12c | 349 | if (!skip_otp && result != 0) { |
7aa7a72a | 350 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
351 | return -EINVAL; |
352 | } | |
353 | ||
354 | return 0; | |
5e3dd157 KV |
355 | } |
356 | ||
43d2a30f | 357 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 358 | { |
43d2a30f KV |
359 | u32 address, data_len; |
360 | const char *mode_name; | |
361 | const void *data; | |
5e3dd157 KV |
362 | int ret; |
363 | ||
5e3dd157 KV |
364 | address = ar->hw_params.patch_load_addr; |
365 | ||
43d2a30f KV |
366 | switch (mode) { |
367 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
368 | data = ar->firmware_data; | |
369 | data_len = ar->firmware_len; | |
370 | mode_name = "normal"; | |
371 | break; | |
372 | case ATH10K_FIRMWARE_MODE_UTF: | |
373 | data = ar->testmode.utf->data; | |
374 | data_len = ar->testmode.utf->size; | |
375 | mode_name = "utf"; | |
376 | break; | |
377 | default: | |
378 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
379 | return -EINVAL; | |
380 | } | |
381 | ||
382 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
383 | "boot uploading firmware image %p len %d mode %s\n", | |
384 | data, data_len, mode_name); | |
385 | ||
386 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 387 | if (ret) { |
43d2a30f KV |
388 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
389 | mode_name, ret); | |
390 | return ret; | |
5e3dd157 KV |
391 | } |
392 | ||
29385057 MK |
393 | return ret; |
394 | } | |
395 | ||
396 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
397 | { | |
36527916 KV |
398 | if (ar->board && !IS_ERR(ar->board)) |
399 | release_firmware(ar->board); | |
29385057 MK |
400 | |
401 | if (ar->otp && !IS_ERR(ar->otp)) | |
402 | release_firmware(ar->otp); | |
403 | ||
404 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
405 | release_firmware(ar->firmware); | |
406 | ||
a58227ef KV |
407 | if (ar->cal_file && !IS_ERR(ar->cal_file)) |
408 | release_firmware(ar->cal_file); | |
409 | ||
36527916 | 410 | ar->board = NULL; |
958df3a0 KV |
411 | ar->board_data = NULL; |
412 | ar->board_len = 0; | |
413 | ||
29385057 | 414 | ar->otp = NULL; |
958df3a0 KV |
415 | ar->otp_data = NULL; |
416 | ar->otp_len = 0; | |
417 | ||
29385057 | 418 | ar->firmware = NULL; |
958df3a0 KV |
419 | ar->firmware_data = NULL; |
420 | ar->firmware_len = 0; | |
a58227ef KV |
421 | |
422 | ar->cal_file = NULL; | |
423 | } | |
424 | ||
425 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
426 | { | |
427 | char filename[100]; | |
428 | ||
429 | /* cal-<bus>-<id>.bin */ | |
430 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
431 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
432 | ||
433 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
434 | if (IS_ERR(ar->cal_file)) | |
435 | /* calibration file is optional, don't print any warnings */ | |
436 | return PTR_ERR(ar->cal_file); | |
437 | ||
438 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
439 | ATH10K_FW_DIR, filename); | |
440 | ||
441 | return 0; | |
29385057 MK |
442 | } |
443 | ||
1a222435 | 444 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
445 | { |
446 | int ret = 0; | |
447 | ||
448 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 449 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
450 | return -EINVAL; |
451 | } | |
452 | ||
453 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 454 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
455 | return -EINVAL; |
456 | } | |
457 | ||
36527916 KV |
458 | ar->board = ath10k_fetch_fw_file(ar, |
459 | ar->hw_params.fw.dir, | |
460 | ar->hw_params.fw.board); | |
461 | if (IS_ERR(ar->board)) { | |
462 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 463 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
464 | goto err; |
465 | } | |
466 | ||
958df3a0 KV |
467 | ar->board_data = ar->board->data; |
468 | ar->board_len = ar->board->size; | |
469 | ||
29385057 MK |
470 | ar->firmware = ath10k_fetch_fw_file(ar, |
471 | ar->hw_params.fw.dir, | |
472 | ar->hw_params.fw.fw); | |
473 | if (IS_ERR(ar->firmware)) { | |
474 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 475 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
476 | goto err; |
477 | } | |
478 | ||
958df3a0 KV |
479 | ar->firmware_data = ar->firmware->data; |
480 | ar->firmware_len = ar->firmware->size; | |
481 | ||
29385057 MK |
482 | /* OTP may be undefined. If so, don't fetch it at all */ |
483 | if (ar->hw_params.fw.otp == NULL) | |
484 | return 0; | |
485 | ||
486 | ar->otp = ath10k_fetch_fw_file(ar, | |
487 | ar->hw_params.fw.dir, | |
488 | ar->hw_params.fw.otp); | |
489 | if (IS_ERR(ar->otp)) { | |
490 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 491 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
492 | goto err; |
493 | } | |
494 | ||
958df3a0 KV |
495 | ar->otp_data = ar->otp->data; |
496 | ar->otp_len = ar->otp->size; | |
497 | ||
29385057 MK |
498 | return 0; |
499 | ||
500 | err: | |
501 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
502 | return ret; |
503 | } | |
504 | ||
1a222435 KV |
505 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
506 | { | |
507 | size_t magic_len, len, ie_len; | |
508 | int ie_id, i, index, bit, ret; | |
509 | struct ath10k_fw_ie *hdr; | |
510 | const u8 *data; | |
511 | __le32 *timestamp; | |
512 | ||
513 | /* first fetch the firmware file (firmware-*.bin) */ | |
514 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
515 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 516 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 517 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
518 | return PTR_ERR(ar->firmware); |
519 | } | |
520 | ||
521 | data = ar->firmware->data; | |
522 | len = ar->firmware->size; | |
523 | ||
524 | /* magic also includes the null byte, check that as well */ | |
525 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
526 | ||
527 | if (len < magic_len) { | |
7aa7a72a | 528 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 529 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
530 | ret = -EINVAL; |
531 | goto err; | |
1a222435 KV |
532 | } |
533 | ||
534 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 535 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
536 | ret = -EINVAL; |
537 | goto err; | |
1a222435 KV |
538 | } |
539 | ||
540 | /* jump over the padding */ | |
541 | magic_len = ALIGN(magic_len, 4); | |
542 | ||
543 | len -= magic_len; | |
544 | data += magic_len; | |
545 | ||
546 | /* loop elements */ | |
547 | while (len > sizeof(struct ath10k_fw_ie)) { | |
548 | hdr = (struct ath10k_fw_ie *)data; | |
549 | ||
550 | ie_id = le32_to_cpu(hdr->id); | |
551 | ie_len = le32_to_cpu(hdr->len); | |
552 | ||
553 | len -= sizeof(*hdr); | |
554 | data += sizeof(*hdr); | |
555 | ||
556 | if (len < ie_len) { | |
7aa7a72a | 557 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 558 | ie_id, len, ie_len); |
9bab1cc0 MK |
559 | ret = -EINVAL; |
560 | goto err; | |
1a222435 KV |
561 | } |
562 | ||
563 | switch (ie_id) { | |
564 | case ATH10K_FW_IE_FW_VERSION: | |
565 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
566 | break; | |
567 | ||
568 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
569 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
570 | ||
7aa7a72a | 571 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
572 | "found fw version %s\n", |
573 | ar->hw->wiphy->fw_version); | |
574 | break; | |
575 | case ATH10K_FW_IE_TIMESTAMP: | |
576 | if (ie_len != sizeof(u32)) | |
577 | break; | |
578 | ||
579 | timestamp = (__le32 *)data; | |
580 | ||
7aa7a72a | 581 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
582 | le32_to_cpup(timestamp)); |
583 | break; | |
584 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 585 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
586 | "found firmware features ie (%zd B)\n", |
587 | ie_len); | |
588 | ||
589 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
590 | index = i / 8; | |
591 | bit = i % 8; | |
592 | ||
593 | if (index == ie_len) | |
594 | break; | |
595 | ||
f591a1a5 | 596 | if (data[index] & (1 << bit)) { |
7aa7a72a | 597 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
598 | "Enabling feature bit: %i\n", |
599 | i); | |
1a222435 | 600 | __set_bit(i, ar->fw_features); |
f591a1a5 | 601 | } |
1a222435 KV |
602 | } |
603 | ||
7aa7a72a | 604 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
605 | ar->fw_features, |
606 | sizeof(ar->fw_features)); | |
607 | break; | |
608 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 609 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
610 | "found fw image ie (%zd B)\n", |
611 | ie_len); | |
612 | ||
613 | ar->firmware_data = data; | |
614 | ar->firmware_len = ie_len; | |
615 | ||
616 | break; | |
617 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 618 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
619 | "found otp image ie (%zd B)\n", |
620 | ie_len); | |
621 | ||
622 | ar->otp_data = data; | |
623 | ar->otp_len = ie_len; | |
624 | ||
625 | break; | |
626 | default: | |
7aa7a72a | 627 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
628 | le32_to_cpu(hdr->id)); |
629 | break; | |
630 | } | |
631 | ||
632 | /* jump over the padding */ | |
633 | ie_len = ALIGN(ie_len, 4); | |
634 | ||
635 | len -= ie_len; | |
636 | data += ie_len; | |
e05634ee | 637 | } |
1a222435 KV |
638 | |
639 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 640 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 641 | ar->hw_params.fw.dir, name); |
1a222435 KV |
642 | ret = -ENOMEDIUM; |
643 | goto err; | |
644 | } | |
645 | ||
24c88f78 MK |
646 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
647 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
7aa7a72a | 648 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); |
24c88f78 MK |
649 | ret = -EINVAL; |
650 | goto err; | |
651 | } | |
652 | ||
1a222435 KV |
653 | /* now fetch the board file */ |
654 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 655 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
656 | ret = -EINVAL; |
657 | goto err; | |
658 | } | |
659 | ||
660 | ar->board = ath10k_fetch_fw_file(ar, | |
661 | ar->hw_params.fw.dir, | |
662 | ar->hw_params.fw.board); | |
663 | if (IS_ERR(ar->board)) { | |
664 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 665 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
666 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
667 | ret); | |
1a222435 KV |
668 | goto err; |
669 | } | |
670 | ||
671 | ar->board_data = ar->board->data; | |
672 | ar->board_len = ar->board->size; | |
673 | ||
674 | return 0; | |
675 | ||
676 | err: | |
677 | ath10k_core_free_firmware_files(ar); | |
678 | return ret; | |
679 | } | |
680 | ||
681 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
682 | { | |
683 | int ret; | |
684 | ||
a58227ef KV |
685 | /* calibration file is optional, don't check for any errors */ |
686 | ath10k_fetch_cal_file(ar); | |
687 | ||
24c88f78 | 688 | ar->fw_api = 3; |
7aa7a72a | 689 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
690 | |
691 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
692 | if (ret == 0) | |
693 | goto success; | |
694 | ||
53c02284 | 695 | ar->fw_api = 2; |
7aa7a72a | 696 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 697 | |
1a222435 | 698 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
699 | if (ret == 0) |
700 | goto success; | |
701 | ||
702 | ar->fw_api = 1; | |
7aa7a72a | 703 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
704 | |
705 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
706 | if (ret) | |
707 | return ret; | |
708 | ||
53c02284 | 709 | success: |
7aa7a72a | 710 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
711 | |
712 | return 0; | |
713 | } | |
714 | ||
83091559 | 715 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
716 | { |
717 | int ret; | |
718 | ||
a58227ef KV |
719 | ret = ath10k_download_cal_file(ar); |
720 | if (ret == 0) { | |
721 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
722 | goto done; | |
723 | } | |
724 | ||
725 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
726 | "boot did not find a calibration file, try DT next: %d\n", |
727 | ret); | |
728 | ||
729 | ret = ath10k_download_cal_dt(ar); | |
730 | if (ret == 0) { | |
731 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
732 | goto done; | |
733 | } | |
734 | ||
735 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
736 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
737 | ret); |
738 | ||
5e3dd157 | 739 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 740 | if (ret) { |
7aa7a72a | 741 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 742 | return ret; |
36a8f413 | 743 | } |
5e3dd157 | 744 | |
a58227ef KV |
745 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
746 | ||
747 | done: | |
748 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
749 | ath10k_cal_mode_str(ar->cal_mode)); | |
750 | return 0; | |
5e3dd157 KV |
751 | } |
752 | ||
753 | static int ath10k_init_uart(struct ath10k *ar) | |
754 | { | |
755 | int ret; | |
756 | ||
757 | /* | |
758 | * Explicitly setting UART prints to zero as target turns it on | |
759 | * based on scratch registers. | |
760 | */ | |
761 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
762 | if (ret) { | |
7aa7a72a | 763 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
764 | return ret; |
765 | } | |
766 | ||
c8c39afe | 767 | if (!uart_print) |
5e3dd157 | 768 | return 0; |
5e3dd157 | 769 | |
3a8200b2 | 770 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 771 | if (ret) { |
7aa7a72a | 772 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
773 | return ret; |
774 | } | |
775 | ||
776 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
777 | if (ret) { | |
7aa7a72a | 778 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
779 | return ret; |
780 | } | |
781 | ||
03fc137b BM |
782 | /* Set the UART baud rate to 19200. */ |
783 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
784 | if (ret) { | |
7aa7a72a | 785 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
786 | return ret; |
787 | } | |
788 | ||
7aa7a72a | 789 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
790 | return 0; |
791 | } | |
792 | ||
793 | static int ath10k_init_hw_params(struct ath10k *ar) | |
794 | { | |
795 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
796 | int i; | |
797 | ||
798 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
799 | hw_params = &ath10k_hw_params_list[i]; | |
800 | ||
801 | if (hw_params->id == ar->target_version) | |
802 | break; | |
803 | } | |
804 | ||
805 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 806 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
807 | ar->target_version); |
808 | return -EINVAL; | |
809 | } | |
810 | ||
811 | ar->hw_params = *hw_params; | |
812 | ||
7aa7a72a | 813 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 814 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
815 | |
816 | return 0; | |
817 | } | |
818 | ||
affd3217 MK |
819 | static void ath10k_core_restart(struct work_struct *work) |
820 | { | |
821 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
822 | ||
7962b0d8 MK |
823 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
824 | ||
825 | /* Place a barrier to make sure the compiler doesn't reorder | |
826 | * CRASH_FLUSH and calling other functions. | |
827 | */ | |
828 | barrier(); | |
829 | ||
830 | ieee80211_stop_queues(ar->hw); | |
831 | ath10k_drain_tx(ar); | |
832 | complete_all(&ar->scan.started); | |
833 | complete_all(&ar->scan.completed); | |
834 | complete_all(&ar->scan.on_channel); | |
835 | complete_all(&ar->offchan_tx_completed); | |
836 | complete_all(&ar->install_key_done); | |
837 | complete_all(&ar->vdev_setup_done); | |
838 | wake_up(&ar->htt.empty_tx_wq); | |
839 | wake_up(&ar->wmi.tx_credits_wq); | |
840 | wake_up(&ar->peer_mapping_wq); | |
841 | ||
affd3217 MK |
842 | mutex_lock(&ar->conf_mutex); |
843 | ||
844 | switch (ar->state) { | |
845 | case ATH10K_STATE_ON: | |
affd3217 | 846 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 847 | ath10k_hif_stop(ar); |
5c81c7fd | 848 | ath10k_scan_finish(ar); |
affd3217 MK |
849 | ieee80211_restart_hw(ar->hw); |
850 | break; | |
851 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
852 | /* this can happen if driver is being unloaded |
853 | * or if the crash happens during FW probing */ | |
7aa7a72a | 854 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
855 | break; |
856 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
857 | /* hw restart might be requested from multiple places */ |
858 | break; | |
affd3217 MK |
859 | case ATH10K_STATE_RESTARTED: |
860 | ar->state = ATH10K_STATE_WEDGED; | |
861 | /* fall through */ | |
862 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 863 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 864 | break; |
43d2a30f KV |
865 | case ATH10K_STATE_UTF: |
866 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
867 | break; | |
affd3217 MK |
868 | } |
869 | ||
870 | mutex_unlock(&ar->conf_mutex); | |
871 | } | |
872 | ||
cfd1061e MK |
873 | static void ath10k_core_init_max_sta_count(struct ath10k *ar) |
874 | { | |
875 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
876 | ar->max_num_peers = TARGET_10X_NUM_PEERS; | |
877 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
878 | } else { | |
879 | ar->max_num_peers = TARGET_NUM_PEERS; | |
880 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
881 | } | |
882 | } | |
883 | ||
43d2a30f | 884 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 885 | { |
5e3dd157 KV |
886 | int status; |
887 | ||
60631c5c KV |
888 | lockdep_assert_held(&ar->conf_mutex); |
889 | ||
7962b0d8 MK |
890 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
891 | ||
64d151d4 MK |
892 | ath10k_bmi_start(ar); |
893 | ||
5e3dd157 KV |
894 | if (ath10k_init_configure_target(ar)) { |
895 | status = -EINVAL; | |
896 | goto err; | |
897 | } | |
898 | ||
83091559 KV |
899 | status = ath10k_download_cal_data(ar); |
900 | if (status) | |
901 | goto err; | |
902 | ||
903 | status = ath10k_download_fw(ar, mode); | |
5e3dd157 KV |
904 | if (status) |
905 | goto err; | |
906 | ||
907 | status = ath10k_init_uart(ar); | |
908 | if (status) | |
909 | goto err; | |
910 | ||
cd003fad MK |
911 | ar->htc.htc_ops.target_send_suspend_complete = |
912 | ath10k_send_suspend_complete; | |
5e3dd157 | 913 | |
cd003fad MK |
914 | status = ath10k_htc_init(ar); |
915 | if (status) { | |
7aa7a72a | 916 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
917 | goto err; |
918 | } | |
919 | ||
920 | status = ath10k_bmi_done(ar); | |
921 | if (status) | |
cd003fad | 922 | goto err; |
5e3dd157 KV |
923 | |
924 | status = ath10k_wmi_attach(ar); | |
925 | if (status) { | |
7aa7a72a | 926 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 927 | goto err; |
5e3dd157 KV |
928 | } |
929 | ||
95bf21f9 MK |
930 | status = ath10k_htt_init(ar); |
931 | if (status) { | |
7aa7a72a | 932 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
933 | goto err_wmi_detach; |
934 | } | |
935 | ||
936 | status = ath10k_htt_tx_alloc(&ar->htt); | |
937 | if (status) { | |
7aa7a72a | 938 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
939 | goto err_wmi_detach; |
940 | } | |
941 | ||
942 | status = ath10k_htt_rx_alloc(&ar->htt); | |
943 | if (status) { | |
7aa7a72a | 944 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
945 | goto err_htt_tx_detach; |
946 | } | |
947 | ||
67e3c63f MK |
948 | status = ath10k_hif_start(ar); |
949 | if (status) { | |
7aa7a72a | 950 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 951 | goto err_htt_rx_detach; |
67e3c63f MK |
952 | } |
953 | ||
954 | status = ath10k_htc_wait_target(&ar->htc); | |
955 | if (status) { | |
7aa7a72a | 956 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
957 | goto err_hif_stop; |
958 | } | |
5e3dd157 | 959 | |
43d2a30f KV |
960 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
961 | status = ath10k_htt_connect(&ar->htt); | |
962 | if (status) { | |
963 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
964 | goto err_hif_stop; | |
965 | } | |
5e3dd157 KV |
966 | } |
967 | ||
95bf21f9 MK |
968 | status = ath10k_wmi_connect(ar); |
969 | if (status) { | |
7aa7a72a | 970 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
971 | goto err_hif_stop; |
972 | } | |
973 | ||
974 | status = ath10k_htc_start(&ar->htc); | |
975 | if (status) { | |
7aa7a72a | 976 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
977 | goto err_hif_stop; |
978 | } | |
979 | ||
43d2a30f KV |
980 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
981 | status = ath10k_wmi_wait_for_service_ready(ar); | |
982 | if (status <= 0) { | |
983 | ath10k_warn(ar, "wmi service ready event not received"); | |
984 | status = -ETIMEDOUT; | |
985 | goto err_hif_stop; | |
986 | } | |
95bf21f9 | 987 | } |
5e3dd157 | 988 | |
7aa7a72a | 989 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 990 | ar->hw->wiphy->fw_version); |
5e3dd157 | 991 | |
5e3dd157 KV |
992 | status = ath10k_wmi_cmd_init(ar); |
993 | if (status) { | |
7aa7a72a MK |
994 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
995 | status); | |
b7967dc7 | 996 | goto err_hif_stop; |
5e3dd157 KV |
997 | } |
998 | ||
999 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
1000 | if (status <= 0) { | |
7aa7a72a | 1001 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 1002 | status = -ETIMEDOUT; |
b7967dc7 | 1003 | goto err_hif_stop; |
5e3dd157 KV |
1004 | } |
1005 | ||
43d2a30f KV |
1006 | /* we don't care about HTT in UTF mode */ |
1007 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1008 | status = ath10k_htt_setup(&ar->htt); | |
1009 | if (status) { | |
1010 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1011 | goto err_hif_stop; | |
1012 | } | |
95bf21f9 | 1013 | } |
5e3dd157 | 1014 | |
db66ea04 KV |
1015 | status = ath10k_debug_start(ar); |
1016 | if (status) | |
b7967dc7 | 1017 | goto err_hif_stop; |
db66ea04 | 1018 | |
dfa413de | 1019 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) |
16c11176 | 1020 | ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1; |
dfa413de | 1021 | else |
16c11176 | 1022 | ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1; |
dfa413de | 1023 | |
0579119f | 1024 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1025 | |
dd30a36e MK |
1026 | return 0; |
1027 | ||
67e3c63f MK |
1028 | err_hif_stop: |
1029 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1030 | err_htt_rx_detach: |
1031 | ath10k_htt_rx_free(&ar->htt); | |
1032 | err_htt_tx_detach: | |
1033 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1034 | err_wmi_detach: |
1035 | ath10k_wmi_detach(ar); | |
1036 | err: | |
1037 | return status; | |
1038 | } | |
818bdd16 | 1039 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1040 | |
00f5482b MP |
1041 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1042 | { | |
1043 | int ret; | |
1044 | ||
1045 | reinit_completion(&ar->target_suspend); | |
1046 | ||
1047 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1048 | if (ret) { | |
7aa7a72a | 1049 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1050 | return ret; |
1051 | } | |
1052 | ||
1053 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
1054 | ||
1055 | if (ret == 0) { | |
7aa7a72a | 1056 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1057 | return -ETIMEDOUT; |
1058 | } | |
1059 | ||
1060 | return 0; | |
1061 | } | |
1062 | ||
dd30a36e MK |
1063 | void ath10k_core_stop(struct ath10k *ar) |
1064 | { | |
60631c5c KV |
1065 | lockdep_assert_held(&ar->conf_mutex); |
1066 | ||
00f5482b | 1067 | /* try to suspend target */ |
43d2a30f KV |
1068 | if (ar->state != ATH10K_STATE_RESTARTING && |
1069 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1070 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1071 | ||
db66ea04 | 1072 | ath10k_debug_stop(ar); |
95bf21f9 MK |
1073 | ath10k_hif_stop(ar); |
1074 | ath10k_htt_tx_free(&ar->htt); | |
1075 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1076 | ath10k_wmi_detach(ar); |
1077 | } | |
818bdd16 MK |
1078 | EXPORT_SYMBOL(ath10k_core_stop); |
1079 | ||
1080 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1081 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1082 | * necessary to load the firmware (and tear it down immediately since start | |
1083 | * hook will try to init it again) before registering */ | |
1084 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1085 | { | |
29385057 MK |
1086 | struct bmi_target_info target_info; |
1087 | int ret = 0; | |
818bdd16 MK |
1088 | |
1089 | ret = ath10k_hif_power_up(ar); | |
1090 | if (ret) { | |
7aa7a72a | 1091 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1092 | return ret; |
1093 | } | |
1094 | ||
29385057 MK |
1095 | memset(&target_info, 0, sizeof(target_info)); |
1096 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1097 | if (ret) { | |
7aa7a72a | 1098 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 1099 | goto err_power_down; |
29385057 MK |
1100 | } |
1101 | ||
1102 | ar->target_version = target_info.version; | |
1103 | ar->hw->wiphy->hw_version = target_info.version; | |
1104 | ||
1105 | ret = ath10k_init_hw_params(ar); | |
1106 | if (ret) { | |
7aa7a72a | 1107 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 1108 | goto err_power_down; |
29385057 MK |
1109 | } |
1110 | ||
1111 | ret = ath10k_core_fetch_firmware_files(ar); | |
1112 | if (ret) { | |
7aa7a72a | 1113 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 1114 | goto err_power_down; |
29385057 MK |
1115 | } |
1116 | ||
cfd1061e MK |
1117 | ath10k_core_init_max_sta_count(ar); |
1118 | ||
60631c5c KV |
1119 | mutex_lock(&ar->conf_mutex); |
1120 | ||
43d2a30f | 1121 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1122 | if (ret) { |
7aa7a72a | 1123 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 1124 | goto err_unlock; |
818bdd16 MK |
1125 | } |
1126 | ||
8079de0d | 1127 | ath10k_print_driver_info(ar); |
818bdd16 | 1128 | ath10k_core_stop(ar); |
60631c5c KV |
1129 | |
1130 | mutex_unlock(&ar->conf_mutex); | |
1131 | ||
818bdd16 MK |
1132 | ath10k_hif_power_down(ar); |
1133 | return 0; | |
c6ce492d KV |
1134 | |
1135 | err_unlock: | |
1136 | mutex_unlock(&ar->conf_mutex); | |
1137 | ||
1138 | ath10k_core_free_firmware_files(ar); | |
1139 | ||
1140 | err_power_down: | |
1141 | ath10k_hif_power_down(ar); | |
1142 | ||
1143 | return ret; | |
818bdd16 | 1144 | } |
dd30a36e | 1145 | |
6782cb69 | 1146 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1147 | { |
6782cb69 | 1148 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1149 | int status; |
1150 | ||
818bdd16 MK |
1151 | status = ath10k_core_probe_fw(ar); |
1152 | if (status) { | |
7aa7a72a | 1153 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1154 | goto err; |
818bdd16 | 1155 | } |
dd30a36e | 1156 | |
5e3dd157 | 1157 | status = ath10k_mac_register(ar); |
818bdd16 | 1158 | if (status) { |
7aa7a72a | 1159 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1160 | goto err_release_fw; |
818bdd16 | 1161 | } |
5e3dd157 | 1162 | |
e13cf7a3 | 1163 | status = ath10k_debug_register(ar); |
5e3dd157 | 1164 | if (status) { |
7aa7a72a | 1165 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1166 | goto err_unregister_mac; |
1167 | } | |
1168 | ||
855aed12 SW |
1169 | status = ath10k_spectral_create(ar); |
1170 | if (status) { | |
7aa7a72a | 1171 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1172 | goto err_debug_destroy; |
1173 | } | |
1174 | ||
6782cb69 MK |
1175 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1176 | return; | |
5e3dd157 | 1177 | |
855aed12 SW |
1178 | err_debug_destroy: |
1179 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1180 | err_unregister_mac: |
1181 | ath10k_mac_unregister(ar); | |
29385057 MK |
1182 | err_release_fw: |
1183 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1184 | err: |
a491a920 MK |
1185 | /* TODO: It's probably a good idea to release device from the driver |
1186 | * but calling device_release_driver() here will cause a deadlock. | |
1187 | */ | |
6782cb69 MK |
1188 | return; |
1189 | } | |
1190 | ||
1191 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1192 | { | |
6782cb69 | 1193 | ar->chip_id = chip_id; |
6782cb69 MK |
1194 | queue_work(ar->workqueue, &ar->register_work); |
1195 | ||
1196 | return 0; | |
5e3dd157 KV |
1197 | } |
1198 | EXPORT_SYMBOL(ath10k_core_register); | |
1199 | ||
1200 | void ath10k_core_unregister(struct ath10k *ar) | |
1201 | { | |
6782cb69 MK |
1202 | cancel_work_sync(&ar->register_work); |
1203 | ||
1204 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1205 | return; | |
1206 | ||
804eef14 SW |
1207 | /* Stop spectral before unregistering from mac80211 to remove the |
1208 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1209 | * would be already be free'd recursively, leading to a double free. | |
1210 | */ | |
1211 | ath10k_spectral_destroy(ar); | |
1212 | ||
5e3dd157 KV |
1213 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1214 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1215 | * unhappy about callback failures. */ | |
1216 | ath10k_mac_unregister(ar); | |
db66ea04 | 1217 | |
43d2a30f KV |
1218 | ath10k_testmode_destroy(ar); |
1219 | ||
29385057 | 1220 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1221 | |
e13cf7a3 | 1222 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1223 | } |
1224 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1225 | ||
e7b54194 | 1226 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1227 | enum ath10k_bus bus, |
0d0a6939 MK |
1228 | const struct ath10k_hif_ops *hif_ops) |
1229 | { | |
1230 | struct ath10k *ar; | |
e13cf7a3 | 1231 | int ret; |
0d0a6939 | 1232 | |
e7b54194 | 1233 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1234 | if (!ar) |
1235 | return NULL; | |
1236 | ||
1237 | ar->ath_common.priv = ar; | |
1238 | ar->ath_common.hw = ar->hw; | |
1239 | ||
1240 | ar->p2p = !!ath10k_p2p; | |
1241 | ar->dev = dev; | |
1242 | ||
0d0a6939 | 1243 | ar->hif.ops = hif_ops; |
e07db352 | 1244 | ar->hif.bus = bus; |
0d0a6939 MK |
1245 | |
1246 | init_completion(&ar->scan.started); | |
1247 | init_completion(&ar->scan.completed); | |
1248 | init_completion(&ar->scan.on_channel); | |
1249 | init_completion(&ar->target_suspend); | |
1250 | ||
1251 | init_completion(&ar->install_key_done); | |
1252 | init_completion(&ar->vdev_setup_done); | |
1253 | ||
5c81c7fd | 1254 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1255 | |
1256 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1257 | if (!ar->workqueue) | |
e13cf7a3 | 1258 | goto err_free_mac; |
0d0a6939 MK |
1259 | |
1260 | mutex_init(&ar->conf_mutex); | |
1261 | spin_lock_init(&ar->data_lock); | |
1262 | ||
1263 | INIT_LIST_HEAD(&ar->peers); | |
1264 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
1265 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
1266 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
1267 | |
1268 | init_completion(&ar->offchan_tx_completed); | |
1269 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1270 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1271 | ||
1272 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1273 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1274 | ||
6782cb69 | 1275 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1276 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1277 | ||
e13cf7a3 MK |
1278 | ret = ath10k_debug_create(ar); |
1279 | if (ret) | |
1280 | goto err_free_wq; | |
1281 | ||
0d0a6939 MK |
1282 | return ar; |
1283 | ||
e13cf7a3 MK |
1284 | err_free_wq: |
1285 | destroy_workqueue(ar->workqueue); | |
1286 | ||
1287 | err_free_mac: | |
0d0a6939 | 1288 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1289 | |
0d0a6939 MK |
1290 | return NULL; |
1291 | } | |
1292 | EXPORT_SYMBOL(ath10k_core_create); | |
1293 | ||
1294 | void ath10k_core_destroy(struct ath10k *ar) | |
1295 | { | |
1296 | flush_workqueue(ar->workqueue); | |
1297 | destroy_workqueue(ar->workqueue); | |
1298 | ||
e13cf7a3 | 1299 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1300 | ath10k_mac_destroy(ar); |
1301 | } | |
1302 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1303 | ||
5e3dd157 KV |
1304 | MODULE_AUTHOR("Qualcomm Atheros"); |
1305 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1306 | MODULE_LICENSE("Dual BSD/GPL"); |