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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
20 | ||
21 | #include "core.h" | |
22 | #include "mac.h" | |
23 | #include "htc.h" | |
24 | #include "hif.h" | |
25 | #include "wmi.h" | |
26 | #include "bmi.h" | |
27 | #include "debug.h" | |
28 | #include "htt.h" | |
29 | ||
30 | unsigned int ath10k_debug_mask; | |
31 | static bool uart_print; | |
32 | static unsigned int ath10k_p2p; | |
33 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); | |
34 | module_param(uart_print, bool, 0644); | |
35 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
36 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); | |
37 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
38 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
39 | ||
40 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
41 | { |
42 | .id = QCA988X_HW_2_0_VERSION, | |
43 | .name = "qca988x hw2.0", | |
44 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
45 | .fw = { | |
46 | .dir = QCA988X_HW_2_0_FW_DIR, | |
47 | .fw = QCA988X_HW_2_0_FW_FILE, | |
48 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
49 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
50 | }, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
55 | { | |
effea968 | 56 | ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 57 | |
9042e17d | 58 | complete(&ar->target_suspend); |
5e3dd157 KV |
59 | } |
60 | ||
5e3dd157 KV |
61 | static int ath10k_init_connect_htc(struct ath10k *ar) |
62 | { | |
63 | int status; | |
64 | ||
65 | status = ath10k_wmi_connect_htc_service(ar); | |
66 | if (status) | |
67 | goto conn_fail; | |
68 | ||
69 | /* Start HTC */ | |
cd003fad | 70 | status = ath10k_htc_start(&ar->htc); |
5e3dd157 KV |
71 | if (status) |
72 | goto conn_fail; | |
73 | ||
74 | /* Wait for WMI event to be ready */ | |
75 | status = ath10k_wmi_wait_for_service_ready(ar); | |
76 | if (status <= 0) { | |
77 | ath10k_warn("wmi service ready event not received"); | |
78 | status = -ETIMEDOUT; | |
79 | goto timeout; | |
80 | } | |
81 | ||
effea968 | 82 | ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n"); |
5e3dd157 KV |
83 | return 0; |
84 | ||
85 | timeout: | |
cd003fad | 86 | ath10k_htc_stop(&ar->htc); |
5e3dd157 KV |
87 | conn_fail: |
88 | return status; | |
89 | } | |
90 | ||
91 | static int ath10k_init_configure_target(struct ath10k *ar) | |
92 | { | |
93 | u32 param_host; | |
94 | int ret; | |
95 | ||
96 | /* tell target which HTC version it is used*/ | |
97 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
98 | HTC_PROTOCOL_VERSION); | |
99 | if (ret) { | |
100 | ath10k_err("settings HTC version failed\n"); | |
101 | return ret; | |
102 | } | |
103 | ||
104 | /* set the firmware mode to STA/IBSS/AP */ | |
105 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
106 | if (ret) { | |
107 | ath10k_err("setting firmware mode (1/2) failed\n"); | |
108 | return ret; | |
109 | } | |
110 | ||
111 | /* TODO following parameters need to be re-visited. */ | |
112 | /* num_device */ | |
113 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
114 | /* Firmware mode */ | |
115 | /* FIXME: Why FW_MODE_AP ??.*/ | |
116 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
117 | /* mac_addr_method */ | |
118 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
119 | /* firmware_bridge */ | |
120 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
121 | /* fwsubmode */ | |
122 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
123 | ||
124 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
125 | if (ret) { | |
126 | ath10k_err("setting firmware mode (2/2) failed\n"); | |
127 | return ret; | |
128 | } | |
129 | ||
130 | /* We do all byte-swapping on the host */ | |
131 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
132 | if (ret) { | |
133 | ath10k_err("setting host CPU BE mode failed\n"); | |
134 | return ret; | |
135 | } | |
136 | ||
137 | /* FW descriptor/Data swap flags */ | |
138 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
139 | ||
140 | if (ret) { | |
141 | ath10k_err("setting FW data/desc swap flags failed\n"); | |
142 | return ret; | |
143 | } | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
148 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
149 | const char *dir, | |
150 | const char *file) | |
151 | { | |
152 | char filename[100]; | |
153 | const struct firmware *fw; | |
154 | int ret; | |
155 | ||
156 | if (file == NULL) | |
157 | return ERR_PTR(-ENOENT); | |
158 | ||
159 | if (dir == NULL) | |
160 | dir = "."; | |
161 | ||
162 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
163 | ret = request_firmware(&fw, filename, ar->dev); | |
164 | if (ret) | |
165 | return ERR_PTR(ret); | |
166 | ||
167 | return fw; | |
168 | } | |
169 | ||
958df3a0 | 170 | static int ath10k_push_board_ext_data(struct ath10k *ar) |
5e3dd157 KV |
171 | { |
172 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
173 | u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; | |
174 | u32 board_ext_data_addr; | |
175 | int ret; | |
176 | ||
177 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
178 | if (ret) { | |
179 | ath10k_err("could not read board ext data addr (%d)\n", ret); | |
180 | return ret; | |
181 | } | |
182 | ||
b52b7688 | 183 | ath10k_dbg(ATH10K_DBG_BOOT, |
effea968 | 184 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
185 | board_ext_data_addr); |
186 | ||
187 | if (board_ext_data_addr == 0) | |
188 | return 0; | |
189 | ||
958df3a0 | 190 | if (ar->board_len != (board_data_size + board_ext_data_size)) { |
5e3dd157 | 191 | ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n", |
958df3a0 | 192 | ar->board_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
193 | return -EINVAL; |
194 | } | |
195 | ||
196 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
958df3a0 | 197 | ar->board_data + board_data_size, |
5e3dd157 KV |
198 | board_ext_data_size); |
199 | if (ret) { | |
200 | ath10k_err("could not write board ext data (%d)\n", ret); | |
201 | return ret; | |
202 | } | |
203 | ||
204 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
205 | (board_ext_data_size << 16) | 1); | |
206 | if (ret) { | |
207 | ath10k_err("could not write board ext data bit (%d)\n", ret); | |
208 | return ret; | |
209 | } | |
210 | ||
211 | return 0; | |
212 | } | |
213 | ||
214 | static int ath10k_download_board_data(struct ath10k *ar) | |
215 | { | |
216 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
217 | u32 address; | |
5e3dd157 KV |
218 | int ret; |
219 | ||
958df3a0 | 220 | ret = ath10k_push_board_ext_data(ar); |
5e3dd157 KV |
221 | if (ret) { |
222 | ath10k_err("could not push board ext data (%d)\n", ret); | |
223 | goto exit; | |
224 | } | |
225 | ||
226 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
227 | if (ret) { | |
228 | ath10k_err("could not read board data addr (%d)\n", ret); | |
229 | goto exit; | |
230 | } | |
231 | ||
958df3a0 KV |
232 | ret = ath10k_bmi_write_memory(ar, address, ar->board_data, |
233 | min_t(u32, board_data_size, | |
234 | ar->board_len)); | |
5e3dd157 KV |
235 | if (ret) { |
236 | ath10k_err("could not write board data (%d)\n", ret); | |
237 | goto exit; | |
238 | } | |
239 | ||
240 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
241 | if (ret) { | |
242 | ath10k_err("could not write board data bit (%d)\n", ret); | |
243 | goto exit; | |
244 | } | |
245 | ||
246 | exit: | |
5e3dd157 KV |
247 | return ret; |
248 | } | |
249 | ||
250 | static int ath10k_download_and_run_otp(struct ath10k *ar) | |
251 | { | |
d6d4a58d | 252 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
253 | int ret; |
254 | ||
255 | /* OTP is optional */ | |
256 | ||
958df3a0 | 257 | if (!ar->otp_data || !ar->otp_len) |
5e3dd157 | 258 | return 0; |
5e3dd157 | 259 | |
958df3a0 | 260 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 KV |
261 | if (ret) { |
262 | ath10k_err("could not write otp (%d)\n", ret); | |
263 | goto exit; | |
264 | } | |
265 | ||
d6d4a58d | 266 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 KV |
267 | if (ret) { |
268 | ath10k_err("could not execute otp (%d)\n", ret); | |
269 | goto exit; | |
270 | } | |
271 | ||
272 | exit: | |
5e3dd157 KV |
273 | return ret; |
274 | } | |
275 | ||
276 | static int ath10k_download_fw(struct ath10k *ar) | |
277 | { | |
5e3dd157 KV |
278 | u32 address; |
279 | int ret; | |
280 | ||
5e3dd157 KV |
281 | address = ar->hw_params.patch_load_addr; |
282 | ||
958df3a0 KV |
283 | ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data, |
284 | ar->firmware_len); | |
5e3dd157 KV |
285 | if (ret) { |
286 | ath10k_err("could not write fw (%d)\n", ret); | |
287 | goto exit; | |
288 | } | |
289 | ||
290 | exit: | |
29385057 MK |
291 | return ret; |
292 | } | |
293 | ||
294 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
295 | { | |
36527916 KV |
296 | if (ar->board && !IS_ERR(ar->board)) |
297 | release_firmware(ar->board); | |
29385057 MK |
298 | |
299 | if (ar->otp && !IS_ERR(ar->otp)) | |
300 | release_firmware(ar->otp); | |
301 | ||
302 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
303 | release_firmware(ar->firmware); | |
304 | ||
36527916 | 305 | ar->board = NULL; |
958df3a0 KV |
306 | ar->board_data = NULL; |
307 | ar->board_len = 0; | |
308 | ||
29385057 | 309 | ar->otp = NULL; |
958df3a0 KV |
310 | ar->otp_data = NULL; |
311 | ar->otp_len = 0; | |
312 | ||
29385057 | 313 | ar->firmware = NULL; |
958df3a0 KV |
314 | ar->firmware_data = NULL; |
315 | ar->firmware_len = 0; | |
29385057 MK |
316 | } |
317 | ||
1a222435 | 318 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
319 | { |
320 | int ret = 0; | |
321 | ||
322 | if (ar->hw_params.fw.fw == NULL) { | |
323 | ath10k_err("firmware file not defined\n"); | |
324 | return -EINVAL; | |
325 | } | |
326 | ||
327 | if (ar->hw_params.fw.board == NULL) { | |
328 | ath10k_err("board data file not defined"); | |
329 | return -EINVAL; | |
330 | } | |
331 | ||
36527916 KV |
332 | ar->board = ath10k_fetch_fw_file(ar, |
333 | ar->hw_params.fw.dir, | |
334 | ar->hw_params.fw.board); | |
335 | if (IS_ERR(ar->board)) { | |
336 | ret = PTR_ERR(ar->board); | |
29385057 MK |
337 | ath10k_err("could not fetch board data (%d)\n", ret); |
338 | goto err; | |
339 | } | |
340 | ||
958df3a0 KV |
341 | ar->board_data = ar->board->data; |
342 | ar->board_len = ar->board->size; | |
343 | ||
29385057 MK |
344 | ar->firmware = ath10k_fetch_fw_file(ar, |
345 | ar->hw_params.fw.dir, | |
346 | ar->hw_params.fw.fw); | |
347 | if (IS_ERR(ar->firmware)) { | |
348 | ret = PTR_ERR(ar->firmware); | |
349 | ath10k_err("could not fetch firmware (%d)\n", ret); | |
350 | goto err; | |
351 | } | |
352 | ||
958df3a0 KV |
353 | ar->firmware_data = ar->firmware->data; |
354 | ar->firmware_len = ar->firmware->size; | |
355 | ||
29385057 MK |
356 | /* OTP may be undefined. If so, don't fetch it at all */ |
357 | if (ar->hw_params.fw.otp == NULL) | |
358 | return 0; | |
359 | ||
360 | ar->otp = ath10k_fetch_fw_file(ar, | |
361 | ar->hw_params.fw.dir, | |
362 | ar->hw_params.fw.otp); | |
363 | if (IS_ERR(ar->otp)) { | |
364 | ret = PTR_ERR(ar->otp); | |
365 | ath10k_err("could not fetch otp (%d)\n", ret); | |
366 | goto err; | |
367 | } | |
368 | ||
958df3a0 KV |
369 | ar->otp_data = ar->otp->data; |
370 | ar->otp_len = ar->otp->size; | |
371 | ||
29385057 MK |
372 | return 0; |
373 | ||
374 | err: | |
375 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
376 | return ret; |
377 | } | |
378 | ||
1a222435 KV |
379 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
380 | { | |
381 | size_t magic_len, len, ie_len; | |
382 | int ie_id, i, index, bit, ret; | |
383 | struct ath10k_fw_ie *hdr; | |
384 | const u8 *data; | |
385 | __le32 *timestamp; | |
386 | ||
387 | /* first fetch the firmware file (firmware-*.bin) */ | |
388 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
389 | if (IS_ERR(ar->firmware)) { | |
390 | ath10k_err("Could not fetch firmware file '%s': %ld\n", | |
391 | name, PTR_ERR(ar->firmware)); | |
392 | return PTR_ERR(ar->firmware); | |
393 | } | |
394 | ||
395 | data = ar->firmware->data; | |
396 | len = ar->firmware->size; | |
397 | ||
398 | /* magic also includes the null byte, check that as well */ | |
399 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
400 | ||
401 | if (len < magic_len) { | |
fd9c4864 | 402 | ath10k_err("firmware image too small to contain magic: %zu\n", |
1a222435 | 403 | len); |
9bab1cc0 MK |
404 | ret = -EINVAL; |
405 | goto err; | |
1a222435 KV |
406 | } |
407 | ||
408 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
409 | ath10k_err("Invalid firmware magic\n"); | |
9bab1cc0 MK |
410 | ret = -EINVAL; |
411 | goto err; | |
1a222435 KV |
412 | } |
413 | ||
414 | /* jump over the padding */ | |
415 | magic_len = ALIGN(magic_len, 4); | |
416 | ||
417 | len -= magic_len; | |
418 | data += magic_len; | |
419 | ||
420 | /* loop elements */ | |
421 | while (len > sizeof(struct ath10k_fw_ie)) { | |
422 | hdr = (struct ath10k_fw_ie *)data; | |
423 | ||
424 | ie_id = le32_to_cpu(hdr->id); | |
425 | ie_len = le32_to_cpu(hdr->len); | |
426 | ||
427 | len -= sizeof(*hdr); | |
428 | data += sizeof(*hdr); | |
429 | ||
430 | if (len < ie_len) { | |
fd9c4864 | 431 | ath10k_err("Invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 432 | ie_id, len, ie_len); |
9bab1cc0 MK |
433 | ret = -EINVAL; |
434 | goto err; | |
1a222435 KV |
435 | } |
436 | ||
437 | switch (ie_id) { | |
438 | case ATH10K_FW_IE_FW_VERSION: | |
439 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
440 | break; | |
441 | ||
442 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
443 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
444 | ||
445 | ath10k_dbg(ATH10K_DBG_BOOT, | |
446 | "found fw version %s\n", | |
447 | ar->hw->wiphy->fw_version); | |
448 | break; | |
449 | case ATH10K_FW_IE_TIMESTAMP: | |
450 | if (ie_len != sizeof(u32)) | |
451 | break; | |
452 | ||
453 | timestamp = (__le32 *)data; | |
454 | ||
455 | ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n", | |
456 | le32_to_cpup(timestamp)); | |
457 | break; | |
458 | case ATH10K_FW_IE_FEATURES: | |
459 | ath10k_dbg(ATH10K_DBG_BOOT, | |
460 | "found firmware features ie (%zd B)\n", | |
461 | ie_len); | |
462 | ||
463 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
464 | index = i / 8; | |
465 | bit = i % 8; | |
466 | ||
467 | if (index == ie_len) | |
468 | break; | |
469 | ||
f591a1a5 BG |
470 | if (data[index] & (1 << bit)) { |
471 | ath10k_dbg(ATH10K_DBG_BOOT, | |
472 | "Enabling feature bit: %i\n", | |
473 | i); | |
1a222435 | 474 | __set_bit(i, ar->fw_features); |
f591a1a5 | 475 | } |
1a222435 KV |
476 | } |
477 | ||
478 | ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "", | |
479 | ar->fw_features, | |
480 | sizeof(ar->fw_features)); | |
481 | break; | |
482 | case ATH10K_FW_IE_FW_IMAGE: | |
483 | ath10k_dbg(ATH10K_DBG_BOOT, | |
484 | "found fw image ie (%zd B)\n", | |
485 | ie_len); | |
486 | ||
487 | ar->firmware_data = data; | |
488 | ar->firmware_len = ie_len; | |
489 | ||
490 | break; | |
491 | case ATH10K_FW_IE_OTP_IMAGE: | |
492 | ath10k_dbg(ATH10K_DBG_BOOT, | |
493 | "found otp image ie (%zd B)\n", | |
494 | ie_len); | |
495 | ||
496 | ar->otp_data = data; | |
497 | ar->otp_len = ie_len; | |
498 | ||
499 | break; | |
500 | default: | |
501 | ath10k_warn("Unknown FW IE: %u\n", | |
502 | le32_to_cpu(hdr->id)); | |
503 | break; | |
504 | } | |
505 | ||
506 | /* jump over the padding */ | |
507 | ie_len = ALIGN(ie_len, 4); | |
508 | ||
509 | len -= ie_len; | |
510 | data += ie_len; | |
e05634ee | 511 | } |
1a222435 KV |
512 | |
513 | if (!ar->firmware_data || !ar->firmware_len) { | |
514 | ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from %s, skipping\n", | |
515 | name); | |
516 | ret = -ENOMEDIUM; | |
517 | goto err; | |
518 | } | |
519 | ||
520 | /* now fetch the board file */ | |
521 | if (ar->hw_params.fw.board == NULL) { | |
522 | ath10k_err("board data file not defined"); | |
523 | ret = -EINVAL; | |
524 | goto err; | |
525 | } | |
526 | ||
527 | ar->board = ath10k_fetch_fw_file(ar, | |
528 | ar->hw_params.fw.dir, | |
529 | ar->hw_params.fw.board); | |
530 | if (IS_ERR(ar->board)) { | |
531 | ret = PTR_ERR(ar->board); | |
532 | ath10k_err("could not fetch board data (%d)\n", ret); | |
533 | goto err; | |
534 | } | |
535 | ||
536 | ar->board_data = ar->board->data; | |
537 | ar->board_len = ar->board->size; | |
538 | ||
539 | return 0; | |
540 | ||
541 | err: | |
542 | ath10k_core_free_firmware_files(ar); | |
543 | return ret; | |
544 | } | |
545 | ||
546 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
547 | { | |
548 | int ret; | |
549 | ||
550 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); | |
551 | if (ret == 0) { | |
552 | ar->fw_api = 2; | |
553 | goto out; | |
554 | } | |
555 | ||
556 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
557 | if (ret) | |
558 | return ret; | |
559 | ||
560 | ar->fw_api = 1; | |
561 | ||
562 | out: | |
563 | ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); | |
564 | ||
565 | return 0; | |
566 | } | |
567 | ||
5e3dd157 KV |
568 | static int ath10k_init_download_firmware(struct ath10k *ar) |
569 | { | |
570 | int ret; | |
571 | ||
572 | ret = ath10k_download_board_data(ar); | |
573 | if (ret) | |
574 | return ret; | |
575 | ||
576 | ret = ath10k_download_and_run_otp(ar); | |
577 | if (ret) | |
578 | return ret; | |
579 | ||
580 | ret = ath10k_download_fw(ar); | |
581 | if (ret) | |
582 | return ret; | |
583 | ||
584 | return ret; | |
585 | } | |
586 | ||
587 | static int ath10k_init_uart(struct ath10k *ar) | |
588 | { | |
589 | int ret; | |
590 | ||
591 | /* | |
592 | * Explicitly setting UART prints to zero as target turns it on | |
593 | * based on scratch registers. | |
594 | */ | |
595 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
596 | if (ret) { | |
597 | ath10k_warn("could not disable UART prints (%d)\n", ret); | |
598 | return ret; | |
599 | } | |
600 | ||
c8c39afe | 601 | if (!uart_print) |
5e3dd157 | 602 | return 0; |
5e3dd157 KV |
603 | |
604 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); | |
605 | if (ret) { | |
606 | ath10k_warn("could not enable UART prints (%d)\n", ret); | |
607 | return ret; | |
608 | } | |
609 | ||
610 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
611 | if (ret) { | |
612 | ath10k_warn("could not enable UART prints (%d)\n", ret); | |
613 | return ret; | |
614 | } | |
615 | ||
03fc137b BM |
616 | /* Set the UART baud rate to 19200. */ |
617 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
618 | if (ret) { | |
619 | ath10k_warn("could not set the baud rate (%d)\n", ret); | |
620 | return ret; | |
621 | } | |
622 | ||
5e3dd157 KV |
623 | ath10k_info("UART prints enabled\n"); |
624 | return 0; | |
625 | } | |
626 | ||
627 | static int ath10k_init_hw_params(struct ath10k *ar) | |
628 | { | |
629 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
630 | int i; | |
631 | ||
632 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
633 | hw_params = &ath10k_hw_params_list[i]; | |
634 | ||
635 | if (hw_params->id == ar->target_version) | |
636 | break; | |
637 | } | |
638 | ||
639 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
640 | ath10k_err("Unsupported hardware version: 0x%x\n", | |
641 | ar->target_version); | |
642 | return -EINVAL; | |
643 | } | |
644 | ||
645 | ar->hw_params = *hw_params; | |
646 | ||
c8c39afe KV |
647 | ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
648 | ar->hw_params.name, ar->target_version); | |
5e3dd157 KV |
649 | |
650 | return 0; | |
651 | } | |
652 | ||
affd3217 MK |
653 | static void ath10k_core_restart(struct work_struct *work) |
654 | { | |
655 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
656 | ||
657 | mutex_lock(&ar->conf_mutex); | |
658 | ||
659 | switch (ar->state) { | |
660 | case ATH10K_STATE_ON: | |
661 | ath10k_halt(ar); | |
662 | ar->state = ATH10K_STATE_RESTARTING; | |
663 | ieee80211_restart_hw(ar->hw); | |
664 | break; | |
665 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
666 | /* this can happen if driver is being unloaded |
667 | * or if the crash happens during FW probing */ | |
affd3217 MK |
668 | ath10k_warn("cannot restart a device that hasn't been started\n"); |
669 | break; | |
670 | case ATH10K_STATE_RESTARTING: | |
671 | case ATH10K_STATE_RESTARTED: | |
672 | ar->state = ATH10K_STATE_WEDGED; | |
673 | /* fall through */ | |
674 | case ATH10K_STATE_WEDGED: | |
675 | ath10k_warn("device is wedged, will not restart\n"); | |
676 | break; | |
677 | } | |
678 | ||
679 | mutex_unlock(&ar->conf_mutex); | |
680 | } | |
681 | ||
5e3dd157 | 682 | struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, |
5e3dd157 KV |
683 | const struct ath10k_hif_ops *hif_ops) |
684 | { | |
685 | struct ath10k *ar; | |
686 | ||
687 | ar = ath10k_mac_create(); | |
688 | if (!ar) | |
689 | return NULL; | |
690 | ||
691 | ar->ath_common.priv = ar; | |
692 | ar->ath_common.hw = ar->hw; | |
693 | ||
694 | ar->p2p = !!ath10k_p2p; | |
695 | ar->dev = dev; | |
696 | ||
697 | ar->hif.priv = hif_priv; | |
698 | ar->hif.ops = hif_ops; | |
5e3dd157 | 699 | |
5e3dd157 KV |
700 | init_completion(&ar->scan.started); |
701 | init_completion(&ar->scan.completed); | |
702 | init_completion(&ar->scan.on_channel); | |
9042e17d | 703 | init_completion(&ar->target_suspend); |
5e3dd157 KV |
704 | |
705 | init_completion(&ar->install_key_done); | |
706 | init_completion(&ar->vdev_setup_done); | |
707 | ||
708 | setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar); | |
709 | ||
710 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
711 | if (!ar->workqueue) | |
712 | goto err_wq; | |
713 | ||
714 | mutex_init(&ar->conf_mutex); | |
715 | spin_lock_init(&ar->data_lock); | |
716 | ||
717 | INIT_LIST_HEAD(&ar->peers); | |
718 | init_waitqueue_head(&ar->peer_mapping_wq); | |
719 | ||
720 | init_completion(&ar->offchan_tx_completed); | |
721 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
722 | skb_queue_head_init(&ar->offchan_tx_queue); | |
723 | ||
5e00d31a BM |
724 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); |
725 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
726 | ||
affd3217 MK |
727 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
728 | ||
5e3dd157 KV |
729 | return ar; |
730 | ||
731 | err_wq: | |
732 | ath10k_mac_destroy(ar); | |
733 | return NULL; | |
734 | } | |
735 | EXPORT_SYMBOL(ath10k_core_create); | |
736 | ||
737 | void ath10k_core_destroy(struct ath10k *ar) | |
738 | { | |
739 | flush_workqueue(ar->workqueue); | |
740 | destroy_workqueue(ar->workqueue); | |
741 | ||
742 | ath10k_mac_destroy(ar); | |
743 | } | |
744 | EXPORT_SYMBOL(ath10k_core_destroy); | |
745 | ||
dd30a36e | 746 | int ath10k_core_start(struct ath10k *ar) |
5e3dd157 | 747 | { |
5e3dd157 KV |
748 | int status; |
749 | ||
60631c5c KV |
750 | lockdep_assert_held(&ar->conf_mutex); |
751 | ||
64d151d4 MK |
752 | ath10k_bmi_start(ar); |
753 | ||
5e3dd157 KV |
754 | if (ath10k_init_configure_target(ar)) { |
755 | status = -EINVAL; | |
756 | goto err; | |
757 | } | |
758 | ||
759 | status = ath10k_init_download_firmware(ar); | |
760 | if (status) | |
761 | goto err; | |
762 | ||
763 | status = ath10k_init_uart(ar); | |
764 | if (status) | |
765 | goto err; | |
766 | ||
cd003fad MK |
767 | ar->htc.htc_ops.target_send_suspend_complete = |
768 | ath10k_send_suspend_complete; | |
5e3dd157 | 769 | |
cd003fad MK |
770 | status = ath10k_htc_init(ar); |
771 | if (status) { | |
772 | ath10k_err("could not init HTC (%d)\n", status); | |
5e3dd157 KV |
773 | goto err; |
774 | } | |
775 | ||
776 | status = ath10k_bmi_done(ar); | |
777 | if (status) | |
cd003fad | 778 | goto err; |
5e3dd157 KV |
779 | |
780 | status = ath10k_wmi_attach(ar); | |
781 | if (status) { | |
782 | ath10k_err("WMI attach failed: %d\n", status); | |
cd003fad | 783 | goto err; |
5e3dd157 KV |
784 | } |
785 | ||
67e3c63f MK |
786 | status = ath10k_hif_start(ar); |
787 | if (status) { | |
788 | ath10k_err("could not start HIF: %d\n", status); | |
5e3dd157 | 789 | goto err_wmi_detach; |
67e3c63f MK |
790 | } |
791 | ||
792 | status = ath10k_htc_wait_target(&ar->htc); | |
793 | if (status) { | |
794 | ath10k_err("failed to connect to HTC: %d\n", status); | |
795 | goto err_hif_stop; | |
796 | } | |
5e3dd157 | 797 | |
edb8236d MK |
798 | status = ath10k_htt_attach(ar); |
799 | if (status) { | |
800 | ath10k_err("could not attach htt (%d)\n", status); | |
67e3c63f | 801 | goto err_hif_stop; |
5e3dd157 KV |
802 | } |
803 | ||
804 | status = ath10k_init_connect_htc(ar); | |
805 | if (status) | |
806 | goto err_htt_detach; | |
807 | ||
c8c39afe KV |
808 | ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n", |
809 | ar->hw->wiphy->fw_version); | |
5e3dd157 | 810 | |
5e3dd157 KV |
811 | status = ath10k_wmi_cmd_init(ar); |
812 | if (status) { | |
813 | ath10k_err("could not send WMI init command (%d)\n", status); | |
814 | goto err_disconnect_htc; | |
815 | } | |
816 | ||
817 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
818 | if (status <= 0) { | |
819 | ath10k_err("wmi unified ready event not received\n"); | |
820 | status = -ETIMEDOUT; | |
821 | goto err_disconnect_htc; | |
822 | } | |
823 | ||
edb8236d | 824 | status = ath10k_htt_attach_target(&ar->htt); |
5e3dd157 KV |
825 | if (status) |
826 | goto err_disconnect_htc; | |
827 | ||
db66ea04 KV |
828 | status = ath10k_debug_start(ar); |
829 | if (status) | |
830 | goto err_disconnect_htc; | |
831 | ||
1a1b8a88 | 832 | ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; |
0579119f | 833 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 834 | |
650b91fb KV |
835 | if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags)) |
836 | ath10k_info("%s (0x%x) fw %s api %d htt %d.%d\n", | |
837 | ar->hw_params.name, ar->target_version, | |
838 | ar->hw->wiphy->fw_version, ar->fw_api, | |
839 | ar->htt.target_version_major, | |
840 | ar->htt.target_version_minor); | |
841 | ||
842 | __set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags); | |
c8c39afe | 843 | |
dd30a36e MK |
844 | return 0; |
845 | ||
846 | err_disconnect_htc: | |
847 | ath10k_htc_stop(&ar->htc); | |
848 | err_htt_detach: | |
849 | ath10k_htt_detach(&ar->htt); | |
67e3c63f MK |
850 | err_hif_stop: |
851 | ath10k_hif_stop(ar); | |
dd30a36e MK |
852 | err_wmi_detach: |
853 | ath10k_wmi_detach(ar); | |
854 | err: | |
855 | return status; | |
856 | } | |
818bdd16 | 857 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 858 | |
00f5482b MP |
859 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
860 | { | |
861 | int ret; | |
862 | ||
863 | reinit_completion(&ar->target_suspend); | |
864 | ||
865 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
866 | if (ret) { | |
867 | ath10k_warn("could not suspend target (%d)\n", ret); | |
868 | return ret; | |
869 | } | |
870 | ||
871 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
872 | ||
873 | if (ret == 0) { | |
874 | ath10k_warn("suspend timed out - target pause event never came\n"); | |
875 | return -ETIMEDOUT; | |
876 | } | |
877 | ||
878 | return 0; | |
879 | } | |
880 | ||
dd30a36e MK |
881 | void ath10k_core_stop(struct ath10k *ar) |
882 | { | |
60631c5c KV |
883 | lockdep_assert_held(&ar->conf_mutex); |
884 | ||
00f5482b MP |
885 | /* try to suspend target */ |
886 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); | |
db66ea04 | 887 | ath10k_debug_stop(ar); |
dd30a36e MK |
888 | ath10k_htc_stop(&ar->htc); |
889 | ath10k_htt_detach(&ar->htt); | |
890 | ath10k_wmi_detach(ar); | |
891 | } | |
818bdd16 MK |
892 | EXPORT_SYMBOL(ath10k_core_stop); |
893 | ||
894 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
895 | * order to know what hw capabilities should be advertised to mac80211 it is | |
896 | * necessary to load the firmware (and tear it down immediately since start | |
897 | * hook will try to init it again) before registering */ | |
898 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
899 | { | |
29385057 MK |
900 | struct bmi_target_info target_info; |
901 | int ret = 0; | |
818bdd16 MK |
902 | |
903 | ret = ath10k_hif_power_up(ar); | |
904 | if (ret) { | |
905 | ath10k_err("could not start pci hif (%d)\n", ret); | |
906 | return ret; | |
907 | } | |
908 | ||
29385057 MK |
909 | memset(&target_info, 0, sizeof(target_info)); |
910 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
911 | if (ret) { | |
912 | ath10k_err("could not get target info (%d)\n", ret); | |
913 | ath10k_hif_power_down(ar); | |
914 | return ret; | |
915 | } | |
916 | ||
917 | ar->target_version = target_info.version; | |
918 | ar->hw->wiphy->hw_version = target_info.version; | |
919 | ||
920 | ret = ath10k_init_hw_params(ar); | |
921 | if (ret) { | |
922 | ath10k_err("could not get hw params (%d)\n", ret); | |
923 | ath10k_hif_power_down(ar); | |
924 | return ret; | |
925 | } | |
926 | ||
927 | ret = ath10k_core_fetch_firmware_files(ar); | |
928 | if (ret) { | |
929 | ath10k_err("could not fetch firmware files (%d)\n", ret); | |
930 | ath10k_hif_power_down(ar); | |
931 | return ret; | |
932 | } | |
933 | ||
60631c5c KV |
934 | mutex_lock(&ar->conf_mutex); |
935 | ||
818bdd16 MK |
936 | ret = ath10k_core_start(ar); |
937 | if (ret) { | |
938 | ath10k_err("could not init core (%d)\n", ret); | |
29385057 | 939 | ath10k_core_free_firmware_files(ar); |
818bdd16 | 940 | ath10k_hif_power_down(ar); |
60631c5c | 941 | mutex_unlock(&ar->conf_mutex); |
818bdd16 MK |
942 | return ret; |
943 | } | |
944 | ||
945 | ath10k_core_stop(ar); | |
60631c5c KV |
946 | |
947 | mutex_unlock(&ar->conf_mutex); | |
948 | ||
818bdd16 MK |
949 | ath10k_hif_power_down(ar); |
950 | return 0; | |
951 | } | |
dd30a36e | 952 | |
e01ae68c KV |
953 | static int ath10k_core_check_chip_id(struct ath10k *ar) |
954 | { | |
955 | u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); | |
956 | ||
effea968 KV |
957 | ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", |
958 | ar->chip_id, hw_revision); | |
959 | ||
e01ae68c KV |
960 | /* Check that we are not using hw1.0 (some of them have same pci id |
961 | * as hw2.0) before doing anything else as ath10k crashes horribly | |
962 | * due to missing hw1.0 workarounds. */ | |
963 | switch (hw_revision) { | |
964 | case QCA988X_HW_1_0_CHIP_ID_REV: | |
965 | ath10k_err("ERROR: qca988x hw1.0 is not supported\n"); | |
966 | return -EOPNOTSUPP; | |
967 | ||
968 | case QCA988X_HW_2_0_CHIP_ID_REV: | |
969 | /* known hardware revision, continue normally */ | |
970 | return 0; | |
971 | ||
972 | default: | |
973 | ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n", | |
974 | ar->chip_id); | |
975 | return 0; | |
976 | } | |
977 | ||
978 | return 0; | |
979 | } | |
980 | ||
981 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
dd30a36e MK |
982 | { |
983 | int status; | |
984 | ||
e01ae68c KV |
985 | ar->chip_id = chip_id; |
986 | ||
987 | status = ath10k_core_check_chip_id(ar); | |
988 | if (status) { | |
989 | ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id); | |
990 | return status; | |
991 | } | |
992 | ||
818bdd16 MK |
993 | status = ath10k_core_probe_fw(ar); |
994 | if (status) { | |
995 | ath10k_err("could not probe fw (%d)\n", status); | |
996 | return status; | |
997 | } | |
dd30a36e | 998 | |
5e3dd157 | 999 | status = ath10k_mac_register(ar); |
818bdd16 MK |
1000 | if (status) { |
1001 | ath10k_err("could not register to mac80211 (%d)\n", status); | |
29385057 | 1002 | goto err_release_fw; |
818bdd16 | 1003 | } |
5e3dd157 KV |
1004 | |
1005 | status = ath10k_debug_create(ar); | |
1006 | if (status) { | |
1007 | ath10k_err("unable to initialize debugfs\n"); | |
1008 | goto err_unregister_mac; | |
1009 | } | |
1010 | ||
1011 | return 0; | |
1012 | ||
1013 | err_unregister_mac: | |
1014 | ath10k_mac_unregister(ar); | |
29385057 MK |
1015 | err_release_fw: |
1016 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
1017 | return status; |
1018 | } | |
1019 | EXPORT_SYMBOL(ath10k_core_register); | |
1020 | ||
1021 | void ath10k_core_unregister(struct ath10k *ar) | |
1022 | { | |
1023 | /* We must unregister from mac80211 before we stop HTC and HIF. | |
1024 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1025 | * unhappy about callback failures. */ | |
1026 | ath10k_mac_unregister(ar); | |
db66ea04 | 1027 | |
29385057 | 1028 | ath10k_core_free_firmware_files(ar); |
6f1f56ea BG |
1029 | |
1030 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1031 | } |
1032 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1033 | ||
5e3dd157 KV |
1034 | MODULE_AUTHOR("Qualcomm Atheros"); |
1035 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1036 | MODULE_LICENSE("Dual BSD/GPL"); |