]>
Commit | Line | Data |
---|---|---|
5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
edb8236d | 18 | #include "core.h" |
5e3dd157 KV |
19 | #include "htc.h" |
20 | #include "htt.h" | |
21 | #include "txrx.h" | |
22 | #include "debug.h" | |
a9bf0506 | 23 | #include "trace.h" |
aa5b4fbc | 24 | #include "mac.h" |
5e3dd157 KV |
25 | |
26 | #include <linux/log2.h> | |
27 | ||
c545070e MK |
28 | #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX |
29 | #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) | |
5e3dd157 KV |
30 | |
31 | /* when under memory pressure rx ring refill may fail and needs a retry */ | |
32 | #define HTT_RX_RING_REFILL_RETRY_MS 50 | |
33 | ||
f6dc2095 | 34 | static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); |
6c5151a9 | 35 | static void ath10k_htt_txrx_compl_task(unsigned long ptr); |
f6dc2095 | 36 | |
c545070e MK |
37 | static struct sk_buff * |
38 | ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr) | |
39 | { | |
40 | struct ath10k_skb_rxcb *rxcb; | |
41 | ||
42 | hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) | |
43 | if (rxcb->paddr == paddr) | |
44 | return ATH10K_RXCB_SKB(rxcb); | |
45 | ||
46 | WARN_ON_ONCE(1); | |
47 | return NULL; | |
48 | } | |
49 | ||
5e3dd157 KV |
50 | static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) |
51 | { | |
52 | struct sk_buff *skb; | |
c545070e MK |
53 | struct ath10k_skb_rxcb *rxcb; |
54 | struct hlist_node *n; | |
5e3dd157 KV |
55 | int i; |
56 | ||
c545070e MK |
57 | if (htt->rx_ring.in_ord_rx) { |
58 | hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { | |
59 | skb = ATH10K_RXCB_SKB(rxcb); | |
60 | dma_unmap_single(htt->ar->dev, rxcb->paddr, | |
61 | skb->len + skb_tailroom(skb), | |
62 | DMA_FROM_DEVICE); | |
63 | hash_del(&rxcb->hlist); | |
64 | dev_kfree_skb_any(skb); | |
65 | } | |
66 | } else { | |
67 | for (i = 0; i < htt->rx_ring.size; i++) { | |
68 | skb = htt->rx_ring.netbufs_ring[i]; | |
69 | if (!skb) | |
70 | continue; | |
71 | ||
72 | rxcb = ATH10K_SKB_RXCB(skb); | |
73 | dma_unmap_single(htt->ar->dev, rxcb->paddr, | |
74 | skb->len + skb_tailroom(skb), | |
75 | DMA_FROM_DEVICE); | |
76 | dev_kfree_skb_any(skb); | |
77 | } | |
5e3dd157 KV |
78 | } |
79 | ||
80 | htt->rx_ring.fill_cnt = 0; | |
c545070e MK |
81 | hash_init(htt->rx_ring.skb_table); |
82 | memset(htt->rx_ring.netbufs_ring, 0, | |
83 | htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); | |
5e3dd157 KV |
84 | } |
85 | ||
86 | static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) | |
87 | { | |
88 | struct htt_rx_desc *rx_desc; | |
c545070e | 89 | struct ath10k_skb_rxcb *rxcb; |
5e3dd157 KV |
90 | struct sk_buff *skb; |
91 | dma_addr_t paddr; | |
92 | int ret = 0, idx; | |
93 | ||
c545070e MK |
94 | /* The Full Rx Reorder firmware has no way of telling the host |
95 | * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. | |
96 | * To keep things simple make sure ring is always half empty. This | |
97 | * guarantees there'll be no replenishment overruns possible. | |
98 | */ | |
99 | BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); | |
100 | ||
8cc7f26c | 101 | idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); |
5e3dd157 KV |
102 | while (num > 0) { |
103 | skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); | |
104 | if (!skb) { | |
105 | ret = -ENOMEM; | |
106 | goto fail; | |
107 | } | |
108 | ||
109 | if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) | |
110 | skb_pull(skb, | |
111 | PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - | |
112 | skb->data); | |
113 | ||
114 | /* Clear rx_desc attention word before posting to Rx ring */ | |
115 | rx_desc = (struct htt_rx_desc *)skb->data; | |
116 | rx_desc->attention.flags = __cpu_to_le32(0); | |
117 | ||
118 | paddr = dma_map_single(htt->ar->dev, skb->data, | |
119 | skb->len + skb_tailroom(skb), | |
120 | DMA_FROM_DEVICE); | |
121 | ||
122 | if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { | |
123 | dev_kfree_skb_any(skb); | |
124 | ret = -ENOMEM; | |
125 | goto fail; | |
126 | } | |
127 | ||
c545070e MK |
128 | rxcb = ATH10K_SKB_RXCB(skb); |
129 | rxcb->paddr = paddr; | |
5e3dd157 KV |
130 | htt->rx_ring.netbufs_ring[idx] = skb; |
131 | htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); | |
132 | htt->rx_ring.fill_cnt++; | |
133 | ||
c545070e MK |
134 | if (htt->rx_ring.in_ord_rx) { |
135 | hash_add(htt->rx_ring.skb_table, | |
136 | &ATH10K_SKB_RXCB(skb)->hlist, | |
137 | (u32)paddr); | |
138 | } | |
139 | ||
5e3dd157 KV |
140 | num--; |
141 | idx++; | |
142 | idx &= htt->rx_ring.size_mask; | |
143 | } | |
144 | ||
145 | fail: | |
5de6dfc8 VT |
146 | /* |
147 | * Make sure the rx buffer is updated before available buffer | |
148 | * index to avoid any potential rx ring corruption. | |
149 | */ | |
150 | mb(); | |
8cc7f26c | 151 | *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); |
5e3dd157 KV |
152 | return ret; |
153 | } | |
154 | ||
155 | static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) | |
156 | { | |
157 | lockdep_assert_held(&htt->rx_ring.lock); | |
158 | return __ath10k_htt_rx_ring_fill_n(htt, num); | |
159 | } | |
160 | ||
161 | static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) | |
162 | { | |
6e712d42 | 163 | int ret, num_deficit, num_to_fill; |
5e3dd157 | 164 | |
6e712d42 MK |
165 | /* Refilling the whole RX ring buffer proves to be a bad idea. The |
166 | * reason is RX may take up significant amount of CPU cycles and starve | |
167 | * other tasks, e.g. TX on an ethernet device while acting as a bridge | |
168 | * with ath10k wlan interface. This ended up with very poor performance | |
169 | * once CPU the host system was overwhelmed with RX on ath10k. | |
170 | * | |
171 | * By limiting the number of refills the replenishing occurs | |
172 | * progressively. This in turns makes use of the fact tasklets are | |
173 | * processed in FIFO order. This means actual RX processing can starve | |
174 | * out refilling. If there's not enough buffers on RX ring FW will not | |
175 | * report RX until it is refilled with enough buffers. This | |
176 | * automatically balances load wrt to CPU power. | |
177 | * | |
178 | * This probably comes at a cost of lower maximum throughput but | |
3eafdfd6 | 179 | * improves the average and stability. */ |
5e3dd157 | 180 | spin_lock_bh(&htt->rx_ring.lock); |
6e712d42 MK |
181 | num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; |
182 | num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); | |
183 | num_deficit -= num_to_fill; | |
5e3dd157 KV |
184 | ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); |
185 | if (ret == -ENOMEM) { | |
186 | /* | |
187 | * Failed to fill it to the desired level - | |
188 | * we'll start a timer and try again next time. | |
189 | * As long as enough buffers are left in the ring for | |
190 | * another A-MPDU rx, no special recovery is needed. | |
191 | */ | |
192 | mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + | |
193 | msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); | |
6e712d42 MK |
194 | } else if (num_deficit > 0) { |
195 | tasklet_schedule(&htt->rx_replenish_task); | |
5e3dd157 KV |
196 | } |
197 | spin_unlock_bh(&htt->rx_ring.lock); | |
198 | } | |
199 | ||
200 | static void ath10k_htt_rx_ring_refill_retry(unsigned long arg) | |
201 | { | |
202 | struct ath10k_htt *htt = (struct ath10k_htt *)arg; | |
af762c0b | 203 | |
5e3dd157 KV |
204 | ath10k_htt_rx_msdu_buff_replenish(htt); |
205 | } | |
206 | ||
c545070e | 207 | int ath10k_htt_rx_ring_refill(struct ath10k *ar) |
5e3dd157 | 208 | { |
c545070e MK |
209 | struct ath10k_htt *htt = &ar->htt; |
210 | int ret; | |
3e841fd0 | 211 | |
c545070e MK |
212 | spin_lock_bh(&htt->rx_ring.lock); |
213 | ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - | |
214 | htt->rx_ring.fill_cnt)); | |
215 | spin_unlock_bh(&htt->rx_ring.lock); | |
3e841fd0 | 216 | |
c545070e MK |
217 | if (ret) |
218 | ath10k_htt_rx_ring_free(htt); | |
219 | ||
220 | return ret; | |
3e841fd0 | 221 | } |
5e3dd157 | 222 | |
95bf21f9 | 223 | void ath10k_htt_rx_free(struct ath10k_htt *htt) |
3e841fd0 | 224 | { |
5e3dd157 | 225 | del_timer_sync(&htt->rx_ring.refill_retry_timer); |
6e712d42 | 226 | tasklet_kill(&htt->rx_replenish_task); |
6c5151a9 MK |
227 | tasklet_kill(&htt->txrx_compl_task); |
228 | ||
229 | skb_queue_purge(&htt->tx_compl_q); | |
230 | skb_queue_purge(&htt->rx_compl_q); | |
c545070e | 231 | skb_queue_purge(&htt->rx_in_ord_compl_q); |
5e3dd157 | 232 | |
c545070e | 233 | ath10k_htt_rx_ring_free(htt); |
5e3dd157 KV |
234 | |
235 | dma_free_coherent(htt->ar->dev, | |
236 | (htt->rx_ring.size * | |
237 | sizeof(htt->rx_ring.paddrs_ring)), | |
238 | htt->rx_ring.paddrs_ring, | |
239 | htt->rx_ring.base_paddr); | |
240 | ||
241 | dma_free_coherent(htt->ar->dev, | |
242 | sizeof(*htt->rx_ring.alloc_idx.vaddr), | |
243 | htt->rx_ring.alloc_idx.vaddr, | |
244 | htt->rx_ring.alloc_idx.paddr); | |
245 | ||
246 | kfree(htt->rx_ring.netbufs_ring); | |
247 | } | |
248 | ||
249 | static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) | |
250 | { | |
7aa7a72a | 251 | struct ath10k *ar = htt->ar; |
5e3dd157 KV |
252 | int idx; |
253 | struct sk_buff *msdu; | |
254 | ||
45967089 | 255 | lockdep_assert_held(&htt->rx_ring.lock); |
5e3dd157 | 256 | |
8d60ee87 | 257 | if (htt->rx_ring.fill_cnt == 0) { |
7aa7a72a | 258 | ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); |
8d60ee87 MK |
259 | return NULL; |
260 | } | |
5e3dd157 KV |
261 | |
262 | idx = htt->rx_ring.sw_rd_idx.msdu_payld; | |
263 | msdu = htt->rx_ring.netbufs_ring[idx]; | |
3e841fd0 | 264 | htt->rx_ring.netbufs_ring[idx] = NULL; |
c545070e | 265 | htt->rx_ring.paddrs_ring[idx] = 0; |
5e3dd157 KV |
266 | |
267 | idx++; | |
268 | idx &= htt->rx_ring.size_mask; | |
269 | htt->rx_ring.sw_rd_idx.msdu_payld = idx; | |
270 | htt->rx_ring.fill_cnt--; | |
271 | ||
4de02806 | 272 | dma_unmap_single(htt->ar->dev, |
8582bf3b | 273 | ATH10K_SKB_RXCB(msdu)->paddr, |
4de02806 MK |
274 | msdu->len + skb_tailroom(msdu), |
275 | DMA_FROM_DEVICE); | |
276 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", | |
277 | msdu->data, msdu->len + skb_tailroom(msdu)); | |
4de02806 | 278 | |
5e3dd157 KV |
279 | return msdu; |
280 | } | |
281 | ||
d84dd60f | 282 | /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ |
5e3dd157 KV |
283 | static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, |
284 | u8 **fw_desc, int *fw_desc_len, | |
f0e2770f | 285 | struct sk_buff_head *amsdu) |
5e3dd157 | 286 | { |
7aa7a72a | 287 | struct ath10k *ar = htt->ar; |
5e3dd157 | 288 | int msdu_len, msdu_chaining = 0; |
9aa505d2 | 289 | struct sk_buff *msdu; |
5e3dd157 KV |
290 | struct htt_rx_desc *rx_desc; |
291 | ||
45967089 MK |
292 | lockdep_assert_held(&htt->rx_ring.lock); |
293 | ||
9aa505d2 | 294 | for (;;) { |
5e3dd157 KV |
295 | int last_msdu, msdu_len_invalid, msdu_chained; |
296 | ||
9aa505d2 MK |
297 | msdu = ath10k_htt_rx_netbuf_pop(htt); |
298 | if (!msdu) { | |
9aa505d2 | 299 | __skb_queue_purge(amsdu); |
e0bd7513 | 300 | return -ENOENT; |
9aa505d2 MK |
301 | } |
302 | ||
303 | __skb_queue_tail(amsdu, msdu); | |
304 | ||
5e3dd157 KV |
305 | rx_desc = (struct htt_rx_desc *)msdu->data; |
306 | ||
307 | /* FIXME: we must report msdu payload since this is what caller | |
308 | * expects now */ | |
309 | skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); | |
310 | skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); | |
311 | ||
312 | /* | |
313 | * Sanity check - confirm the HW is finished filling in the | |
314 | * rx data. | |
315 | * If the HW and SW are working correctly, then it's guaranteed | |
316 | * that the HW's MAC DMA is done before this point in the SW. | |
317 | * To prevent the case that we handle a stale Rx descriptor, | |
318 | * just assert for now until we have a way to recover. | |
319 | */ | |
320 | if (!(__le32_to_cpu(rx_desc->attention.flags) | |
321 | & RX_ATTENTION_FLAGS_MSDU_DONE)) { | |
9aa505d2 | 322 | __skb_queue_purge(amsdu); |
e0bd7513 | 323 | return -EIO; |
5e3dd157 KV |
324 | } |
325 | ||
326 | /* | |
327 | * Copy the FW rx descriptor for this MSDU from the rx | |
328 | * indication message into the MSDU's netbuf. HL uses the | |
329 | * same rx indication message definition as LL, and simply | |
330 | * appends new info (fields from the HW rx desc, and the | |
331 | * MSDU payload itself). So, the offset into the rx | |
332 | * indication message only has to account for the standard | |
333 | * offset of the per-MSDU FW rx desc info within the | |
334 | * message, and how many bytes of the per-MSDU FW rx desc | |
335 | * info have already been consumed. (And the endianness of | |
336 | * the host, since for a big-endian host, the rx ind | |
337 | * message contents, including the per-MSDU rx desc bytes, | |
338 | * were byteswapped during upload.) | |
339 | */ | |
340 | if (*fw_desc_len > 0) { | |
341 | rx_desc->fw_desc.info0 = **fw_desc; | |
342 | /* | |
343 | * The target is expected to only provide the basic | |
344 | * per-MSDU rx descriptors. Just to be sure, verify | |
345 | * that the target has not attached extension data | |
346 | * (e.g. LRO flow ID). | |
347 | */ | |
348 | ||
349 | /* or more, if there's extension data */ | |
350 | (*fw_desc)++; | |
351 | (*fw_desc_len)--; | |
352 | } else { | |
353 | /* | |
354 | * When an oversized AMSDU happened, FW will lost | |
355 | * some of MSDU status - in this case, the FW | |
356 | * descriptors provided will be less than the | |
357 | * actual MSDUs inside this MPDU. Mark the FW | |
358 | * descriptors so that it will still deliver to | |
359 | * upper stack, if no CRC error for this MPDU. | |
360 | * | |
361 | * FIX THIS - the FW descriptors are actually for | |
362 | * MSDUs in the end of this A-MSDU instead of the | |
363 | * beginning. | |
364 | */ | |
365 | rx_desc->fw_desc.info0 = 0; | |
366 | } | |
367 | ||
368 | msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) | |
369 | & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | | |
370 | RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); | |
371 | msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0), | |
372 | RX_MSDU_START_INFO0_MSDU_LENGTH); | |
373 | msdu_chained = rx_desc->frag_info.ring2_more_count; | |
374 | ||
375 | if (msdu_len_invalid) | |
376 | msdu_len = 0; | |
377 | ||
378 | skb_trim(msdu, 0); | |
379 | skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); | |
380 | msdu_len -= msdu->len; | |
381 | ||
9aa505d2 | 382 | /* Note: Chained buffers do not contain rx descriptor */ |
5e3dd157 | 383 | while (msdu_chained--) { |
9aa505d2 MK |
384 | msdu = ath10k_htt_rx_netbuf_pop(htt); |
385 | if (!msdu) { | |
9aa505d2 | 386 | __skb_queue_purge(amsdu); |
e0bd7513 | 387 | return -ENOENT; |
b30595ae MK |
388 | } |
389 | ||
9aa505d2 MK |
390 | __skb_queue_tail(amsdu, msdu); |
391 | skb_trim(msdu, 0); | |
392 | skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); | |
393 | msdu_len -= msdu->len; | |
ede9c8e0 | 394 | msdu_chaining = 1; |
5e3dd157 KV |
395 | } |
396 | ||
5e3dd157 KV |
397 | last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) & |
398 | RX_MSDU_END_INFO0_LAST_MSDU; | |
399 | ||
b04e204f | 400 | trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, |
a0883cf7 | 401 | sizeof(*rx_desc) - sizeof(u32)); |
d8bb26b9 | 402 | |
9aa505d2 MK |
403 | if (last_msdu) |
404 | break; | |
5e3dd157 | 405 | } |
5e3dd157 | 406 | |
9aa505d2 | 407 | if (skb_queue_empty(amsdu)) |
d84dd60f JD |
408 | msdu_chaining = -1; |
409 | ||
5e3dd157 KV |
410 | /* |
411 | * Don't refill the ring yet. | |
412 | * | |
413 | * First, the elements popped here are still in use - it is not | |
414 | * safe to overwrite them until the matching call to | |
415 | * mpdu_desc_list_next. Second, for efficiency it is preferable to | |
416 | * refill the rx ring with 1 PPDU's worth of rx buffers (something | |
417 | * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers | |
418 | * (something like 3 buffers). Consequently, we'll rely on the txrx | |
419 | * SW to tell us when it is done pulling all the PPDU's rx buffers | |
420 | * out of the rx ring, and then refill it just once. | |
421 | */ | |
422 | ||
423 | return msdu_chaining; | |
424 | } | |
425 | ||
6e712d42 MK |
426 | static void ath10k_htt_rx_replenish_task(unsigned long ptr) |
427 | { | |
428 | struct ath10k_htt *htt = (struct ath10k_htt *)ptr; | |
af762c0b | 429 | |
6e712d42 MK |
430 | ath10k_htt_rx_msdu_buff_replenish(htt); |
431 | } | |
432 | ||
c545070e MK |
433 | static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, |
434 | u32 paddr) | |
435 | { | |
436 | struct ath10k *ar = htt->ar; | |
437 | struct ath10k_skb_rxcb *rxcb; | |
438 | struct sk_buff *msdu; | |
439 | ||
440 | lockdep_assert_held(&htt->rx_ring.lock); | |
441 | ||
442 | msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); | |
443 | if (!msdu) | |
444 | return NULL; | |
445 | ||
446 | rxcb = ATH10K_SKB_RXCB(msdu); | |
447 | hash_del(&rxcb->hlist); | |
448 | htt->rx_ring.fill_cnt--; | |
449 | ||
450 | dma_unmap_single(htt->ar->dev, rxcb->paddr, | |
451 | msdu->len + skb_tailroom(msdu), | |
452 | DMA_FROM_DEVICE); | |
453 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", | |
454 | msdu->data, msdu->len + skb_tailroom(msdu)); | |
455 | ||
456 | return msdu; | |
457 | } | |
458 | ||
459 | static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt, | |
460 | struct htt_rx_in_ord_ind *ev, | |
461 | struct sk_buff_head *list) | |
462 | { | |
463 | struct ath10k *ar = htt->ar; | |
464 | struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs; | |
465 | struct htt_rx_desc *rxd; | |
466 | struct sk_buff *msdu; | |
467 | int msdu_count; | |
468 | bool is_offload; | |
469 | u32 paddr; | |
470 | ||
471 | lockdep_assert_held(&htt->rx_ring.lock); | |
472 | ||
473 | msdu_count = __le16_to_cpu(ev->msdu_count); | |
474 | is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); | |
475 | ||
476 | while (msdu_count--) { | |
477 | paddr = __le32_to_cpu(msdu_desc->msdu_paddr); | |
478 | ||
479 | msdu = ath10k_htt_rx_pop_paddr(htt, paddr); | |
480 | if (!msdu) { | |
481 | __skb_queue_purge(list); | |
482 | return -ENOENT; | |
483 | } | |
484 | ||
485 | __skb_queue_tail(list, msdu); | |
486 | ||
487 | if (!is_offload) { | |
488 | rxd = (void *)msdu->data; | |
489 | ||
490 | trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); | |
491 | ||
492 | skb_put(msdu, sizeof(*rxd)); | |
493 | skb_pull(msdu, sizeof(*rxd)); | |
494 | skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); | |
495 | ||
496 | if (!(__le32_to_cpu(rxd->attention.flags) & | |
497 | RX_ATTENTION_FLAGS_MSDU_DONE)) { | |
498 | ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); | |
499 | return -EIO; | |
500 | } | |
501 | } | |
502 | ||
503 | msdu_desc++; | |
504 | } | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
95bf21f9 | 509 | int ath10k_htt_rx_alloc(struct ath10k_htt *htt) |
5e3dd157 | 510 | { |
7aa7a72a | 511 | struct ath10k *ar = htt->ar; |
5e3dd157 KV |
512 | dma_addr_t paddr; |
513 | void *vaddr; | |
bd8bdbb6 | 514 | size_t size; |
5e3dd157 KV |
515 | struct timer_list *timer = &htt->rx_ring.refill_retry_timer; |
516 | ||
51fc7d74 MK |
517 | htt->rx_confused = false; |
518 | ||
fe2407a8 MK |
519 | /* XXX: The fill level could be changed during runtime in response to |
520 | * the host processing latency. Is this really worth it? | |
521 | */ | |
522 | htt->rx_ring.size = HTT_RX_RING_SIZE; | |
523 | htt->rx_ring.size_mask = htt->rx_ring.size - 1; | |
524 | htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL; | |
525 | ||
5e3dd157 | 526 | if (!is_power_of_2(htt->rx_ring.size)) { |
7aa7a72a | 527 | ath10k_warn(ar, "htt rx ring size is not power of 2\n"); |
5e3dd157 KV |
528 | return -EINVAL; |
529 | } | |
530 | ||
5e3dd157 | 531 | htt->rx_ring.netbufs_ring = |
3e841fd0 | 532 | kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), |
5e3dd157 KV |
533 | GFP_KERNEL); |
534 | if (!htt->rx_ring.netbufs_ring) | |
535 | goto err_netbuf; | |
536 | ||
bd8bdbb6 KV |
537 | size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); |
538 | ||
539 | vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA); | |
5e3dd157 KV |
540 | if (!vaddr) |
541 | goto err_dma_ring; | |
542 | ||
543 | htt->rx_ring.paddrs_ring = vaddr; | |
544 | htt->rx_ring.base_paddr = paddr; | |
545 | ||
546 | vaddr = dma_alloc_coherent(htt->ar->dev, | |
547 | sizeof(*htt->rx_ring.alloc_idx.vaddr), | |
548 | &paddr, GFP_DMA); | |
549 | if (!vaddr) | |
550 | goto err_dma_idx; | |
551 | ||
552 | htt->rx_ring.alloc_idx.vaddr = vaddr; | |
553 | htt->rx_ring.alloc_idx.paddr = paddr; | |
c545070e | 554 | htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; |
5e3dd157 KV |
555 | *htt->rx_ring.alloc_idx.vaddr = 0; |
556 | ||
557 | /* Initialize the Rx refill retry timer */ | |
558 | setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt); | |
559 | ||
560 | spin_lock_init(&htt->rx_ring.lock); | |
561 | ||
562 | htt->rx_ring.fill_cnt = 0; | |
c545070e MK |
563 | htt->rx_ring.sw_rd_idx.msdu_payld = 0; |
564 | hash_init(htt->rx_ring.skb_table); | |
5e3dd157 | 565 | |
6e712d42 MK |
566 | tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task, |
567 | (unsigned long)htt); | |
568 | ||
6c5151a9 MK |
569 | skb_queue_head_init(&htt->tx_compl_q); |
570 | skb_queue_head_init(&htt->rx_compl_q); | |
c545070e | 571 | skb_queue_head_init(&htt->rx_in_ord_compl_q); |
6c5151a9 MK |
572 | |
573 | tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task, | |
574 | (unsigned long)htt); | |
575 | ||
7aa7a72a | 576 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", |
5e3dd157 KV |
577 | htt->rx_ring.size, htt->rx_ring.fill_level); |
578 | return 0; | |
579 | ||
5e3dd157 KV |
580 | err_dma_idx: |
581 | dma_free_coherent(htt->ar->dev, | |
582 | (htt->rx_ring.size * | |
583 | sizeof(htt->rx_ring.paddrs_ring)), | |
584 | htt->rx_ring.paddrs_ring, | |
585 | htt->rx_ring.base_paddr); | |
586 | err_dma_ring: | |
587 | kfree(htt->rx_ring.netbufs_ring); | |
588 | err_netbuf: | |
589 | return -ENOMEM; | |
590 | } | |
591 | ||
7aa7a72a MK |
592 | static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, |
593 | enum htt_rx_mpdu_encrypt_type type) | |
5e3dd157 KV |
594 | { |
595 | switch (type) { | |
890d3b2a MK |
596 | case HTT_RX_MPDU_ENCRYPT_NONE: |
597 | return 0; | |
5e3dd157 KV |
598 | case HTT_RX_MPDU_ENCRYPT_WEP40: |
599 | case HTT_RX_MPDU_ENCRYPT_WEP104: | |
890d3b2a | 600 | return IEEE80211_WEP_IV_LEN; |
5e3dd157 | 601 | case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: |
5e3dd157 | 602 | case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: |
890d3b2a | 603 | return IEEE80211_TKIP_IV_LEN; |
5e3dd157 | 604 | case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: |
890d3b2a MK |
605 | return IEEE80211_CCMP_HDR_LEN; |
606 | case HTT_RX_MPDU_ENCRYPT_WEP128: | |
607 | case HTT_RX_MPDU_ENCRYPT_WAPI: | |
608 | break; | |
5e3dd157 KV |
609 | } |
610 | ||
890d3b2a | 611 | ath10k_warn(ar, "unsupported encryption type %d\n", type); |
5e3dd157 KV |
612 | return 0; |
613 | } | |
614 | ||
890d3b2a MK |
615 | #define MICHAEL_MIC_LEN 8 |
616 | ||
7aa7a72a MK |
617 | static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar, |
618 | enum htt_rx_mpdu_encrypt_type type) | |
5e3dd157 KV |
619 | { |
620 | switch (type) { | |
621 | case HTT_RX_MPDU_ENCRYPT_NONE: | |
890d3b2a | 622 | return 0; |
5e3dd157 KV |
623 | case HTT_RX_MPDU_ENCRYPT_WEP40: |
624 | case HTT_RX_MPDU_ENCRYPT_WEP104: | |
890d3b2a | 625 | return IEEE80211_WEP_ICV_LEN; |
5e3dd157 KV |
626 | case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: |
627 | case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: | |
890d3b2a | 628 | return IEEE80211_TKIP_ICV_LEN; |
5e3dd157 | 629 | case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: |
890d3b2a MK |
630 | return IEEE80211_CCMP_MIC_LEN; |
631 | case HTT_RX_MPDU_ENCRYPT_WEP128: | |
632 | case HTT_RX_MPDU_ENCRYPT_WAPI: | |
633 | break; | |
5e3dd157 KV |
634 | } |
635 | ||
890d3b2a | 636 | ath10k_warn(ar, "unsupported encryption type %d\n", type); |
5e3dd157 KV |
637 | return 0; |
638 | } | |
639 | ||
f6dc2095 MK |
640 | struct amsdu_subframe_hdr { |
641 | u8 dst[ETH_ALEN]; | |
642 | u8 src[ETH_ALEN]; | |
643 | __be16 len; | |
644 | } __packed; | |
645 | ||
87326c97 | 646 | static void ath10k_htt_rx_h_rates(struct ath10k *ar, |
b9fd8a84 MK |
647 | struct ieee80211_rx_status *status, |
648 | struct htt_rx_desc *rxd) | |
73539b40 | 649 | { |
5528e032 MK |
650 | struct ieee80211_supported_band *sband; |
651 | u8 cck, rate, bw, sgi, mcs, nss; | |
73539b40 | 652 | u8 preamble = 0; |
b9fd8a84 | 653 | u32 info1, info2, info3; |
73539b40 | 654 | |
b9fd8a84 MK |
655 | info1 = __le32_to_cpu(rxd->ppdu_start.info1); |
656 | info2 = __le32_to_cpu(rxd->ppdu_start.info2); | |
657 | info3 = __le32_to_cpu(rxd->ppdu_start.info3); | |
658 | ||
659 | preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); | |
73539b40 JD |
660 | |
661 | switch (preamble) { | |
662 | case HTT_RX_LEGACY: | |
5528e032 MK |
663 | /* To get legacy rate index band is required. Since band can't |
664 | * be undefined check if freq is non-zero. | |
665 | */ | |
666 | if (!status->freq) | |
667 | return; | |
668 | ||
b9fd8a84 MK |
669 | cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; |
670 | rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); | |
5528e032 | 671 | rate &= ~RX_PPDU_START_RATE_FLAG; |
73539b40 | 672 | |
5528e032 MK |
673 | sband = &ar->mac.sbands[status->band]; |
674 | status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate); | |
73539b40 JD |
675 | break; |
676 | case HTT_RX_HT: | |
677 | case HTT_RX_HT_WITH_TXBF: | |
b9fd8a84 MK |
678 | /* HT-SIG - Table 20-11 in info2 and info3 */ |
679 | mcs = info2 & 0x1F; | |
73539b40 | 680 | nss = mcs >> 3; |
b9fd8a84 MK |
681 | bw = (info2 >> 7) & 1; |
682 | sgi = (info3 >> 7) & 1; | |
73539b40 JD |
683 | |
684 | status->rate_idx = mcs; | |
685 | status->flag |= RX_FLAG_HT; | |
686 | if (sgi) | |
687 | status->flag |= RX_FLAG_SHORT_GI; | |
688 | if (bw) | |
689 | status->flag |= RX_FLAG_40MHZ; | |
690 | break; | |
691 | case HTT_RX_VHT: | |
692 | case HTT_RX_VHT_WITH_TXBF: | |
b9fd8a84 | 693 | /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 |
73539b40 | 694 | TODO check this */ |
b9fd8a84 MK |
695 | mcs = (info3 >> 4) & 0x0F; |
696 | nss = ((info2 >> 10) & 0x07) + 1; | |
697 | bw = info2 & 3; | |
698 | sgi = info3 & 1; | |
73539b40 JD |
699 | |
700 | status->rate_idx = mcs; | |
701 | status->vht_nss = nss; | |
702 | ||
703 | if (sgi) | |
704 | status->flag |= RX_FLAG_SHORT_GI; | |
705 | ||
706 | switch (bw) { | |
707 | /* 20MHZ */ | |
708 | case 0: | |
709 | break; | |
710 | /* 40MHZ */ | |
711 | case 1: | |
712 | status->flag |= RX_FLAG_40MHZ; | |
713 | break; | |
714 | /* 80MHZ */ | |
715 | case 2: | |
716 | status->vht_flag |= RX_VHT_FLAG_80MHZ; | |
717 | } | |
718 | ||
719 | status->flag |= RX_FLAG_VHT; | |
720 | break; | |
721 | default: | |
722 | break; | |
723 | } | |
724 | } | |
725 | ||
36653f05 JD |
726 | static bool ath10k_htt_rx_h_channel(struct ath10k *ar, |
727 | struct ieee80211_rx_status *status) | |
728 | { | |
729 | struct ieee80211_channel *ch; | |
730 | ||
731 | spin_lock_bh(&ar->data_lock); | |
732 | ch = ar->scan_channel; | |
733 | if (!ch) | |
734 | ch = ar->rx_channel; | |
735 | spin_unlock_bh(&ar->data_lock); | |
736 | ||
737 | if (!ch) | |
738 | return false; | |
739 | ||
740 | status->band = ch->band; | |
741 | status->freq = ch->center_freq; | |
742 | ||
743 | return true; | |
744 | } | |
745 | ||
b9fd8a84 MK |
746 | static void ath10k_htt_rx_h_signal(struct ath10k *ar, |
747 | struct ieee80211_rx_status *status, | |
748 | struct htt_rx_desc *rxd) | |
749 | { | |
750 | /* FIXME: Get real NF */ | |
751 | status->signal = ATH10K_DEFAULT_NOISE_FLOOR + | |
752 | rxd->ppdu_start.rssi_comb; | |
753 | status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; | |
754 | } | |
755 | ||
756 | static void ath10k_htt_rx_h_mactime(struct ath10k *ar, | |
757 | struct ieee80211_rx_status *status, | |
758 | struct htt_rx_desc *rxd) | |
759 | { | |
760 | /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This | |
761 | * means all prior MSDUs in a PPDU are reported to mac80211 without the | |
762 | * TSF. Is it worth holding frames until end of PPDU is known? | |
763 | * | |
764 | * FIXME: Can we get/compute 64bit TSF? | |
765 | */ | |
3ec79e3a | 766 | status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); |
b9fd8a84 MK |
767 | status->flag |= RX_FLAG_MACTIME_END; |
768 | } | |
769 | ||
770 | static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, | |
771 | struct sk_buff_head *amsdu, | |
772 | struct ieee80211_rx_status *status) | |
773 | { | |
774 | struct sk_buff *first; | |
775 | struct htt_rx_desc *rxd; | |
776 | bool is_first_ppdu; | |
777 | bool is_last_ppdu; | |
778 | ||
779 | if (skb_queue_empty(amsdu)) | |
780 | return; | |
781 | ||
782 | first = skb_peek(amsdu); | |
783 | rxd = (void *)first->data - sizeof(*rxd); | |
784 | ||
785 | is_first_ppdu = !!(rxd->attention.flags & | |
786 | __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); | |
787 | is_last_ppdu = !!(rxd->attention.flags & | |
788 | __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); | |
789 | ||
790 | if (is_first_ppdu) { | |
791 | /* New PPDU starts so clear out the old per-PPDU status. */ | |
792 | status->freq = 0; | |
793 | status->rate_idx = 0; | |
794 | status->vht_nss = 0; | |
795 | status->vht_flag &= ~RX_VHT_FLAG_80MHZ; | |
796 | status->flag &= ~(RX_FLAG_HT | | |
797 | RX_FLAG_VHT | | |
798 | RX_FLAG_SHORT_GI | | |
799 | RX_FLAG_40MHZ | | |
800 | RX_FLAG_MACTIME_END); | |
801 | status->flag |= RX_FLAG_NO_SIGNAL_VAL; | |
802 | ||
803 | ath10k_htt_rx_h_signal(ar, status, rxd); | |
804 | ath10k_htt_rx_h_channel(ar, status); | |
805 | ath10k_htt_rx_h_rates(ar, status, rxd); | |
806 | } | |
807 | ||
808 | if (is_last_ppdu) | |
809 | ath10k_htt_rx_h_mactime(ar, status, rxd); | |
810 | } | |
811 | ||
76f5329a JD |
812 | static const char * const tid_to_ac[] = { |
813 | "BE", | |
814 | "BK", | |
815 | "BK", | |
816 | "BE", | |
817 | "VI", | |
818 | "VI", | |
819 | "VO", | |
820 | "VO", | |
821 | }; | |
822 | ||
823 | static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) | |
824 | { | |
825 | u8 *qc; | |
826 | int tid; | |
827 | ||
828 | if (!ieee80211_is_data_qos(hdr->frame_control)) | |
829 | return ""; | |
830 | ||
831 | qc = ieee80211_get_qos_ctl(hdr); | |
832 | tid = *qc & IEEE80211_QOS_CTL_TID_MASK; | |
833 | if (tid < 8) | |
834 | snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); | |
835 | else | |
836 | snprintf(out, size, "tid %d", tid); | |
837 | ||
838 | return out; | |
839 | } | |
840 | ||
85f6d7cf JD |
841 | static void ath10k_process_rx(struct ath10k *ar, |
842 | struct ieee80211_rx_status *rx_status, | |
843 | struct sk_buff *skb) | |
73539b40 JD |
844 | { |
845 | struct ieee80211_rx_status *status; | |
76f5329a JD |
846 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
847 | char tid[32]; | |
73539b40 | 848 | |
85f6d7cf JD |
849 | status = IEEE80211_SKB_RXCB(skb); |
850 | *status = *rx_status; | |
73539b40 | 851 | |
7aa7a72a | 852 | ath10k_dbg(ar, ATH10K_DBG_DATA, |
76f5329a | 853 | "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", |
85f6d7cf JD |
854 | skb, |
855 | skb->len, | |
76f5329a JD |
856 | ieee80211_get_SA(hdr), |
857 | ath10k_get_tid(hdr, tid, sizeof(tid)), | |
858 | is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? | |
859 | "mcast" : "ucast", | |
860 | (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, | |
73539b40 JD |
861 | status->flag == 0 ? "legacy" : "", |
862 | status->flag & RX_FLAG_HT ? "ht" : "", | |
863 | status->flag & RX_FLAG_VHT ? "vht" : "", | |
864 | status->flag & RX_FLAG_40MHZ ? "40" : "", | |
865 | status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "", | |
866 | status->flag & RX_FLAG_SHORT_GI ? "sgi " : "", | |
867 | status->rate_idx, | |
868 | status->vht_nss, | |
869 | status->freq, | |
87326c97 | 870 | status->band, status->flag, |
78433f96 | 871 | !!(status->flag & RX_FLAG_FAILED_FCS_CRC), |
76f5329a JD |
872 | !!(status->flag & RX_FLAG_MMIC_ERROR), |
873 | !!(status->flag & RX_FLAG_AMSDU_MORE)); | |
7aa7a72a | 874 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", |
85f6d7cf | 875 | skb->data, skb->len); |
5ce8e7fd RM |
876 | trace_ath10k_rx_hdr(ar, skb->data, skb->len); |
877 | trace_ath10k_rx_payload(ar, skb->data, skb->len); | |
73539b40 | 878 | |
85f6d7cf | 879 | ieee80211_rx(ar->hw, skb); |
73539b40 JD |
880 | } |
881 | ||
d960c369 MK |
882 | static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr) |
883 | { | |
884 | /* nwifi header is padded to 4 bytes. this fixes 4addr rx */ | |
885 | return round_up(ieee80211_hdrlen(hdr->frame_control), 4); | |
886 | } | |
887 | ||
581c25f8 MK |
888 | static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, |
889 | struct sk_buff *msdu, | |
890 | struct ieee80211_rx_status *status, | |
891 | enum htt_rx_mpdu_encrypt_type enctype, | |
892 | bool is_decrypted) | |
5e3dd157 | 893 | { |
581c25f8 | 894 | struct ieee80211_hdr *hdr; |
5e3dd157 | 895 | struct htt_rx_desc *rxd; |
581c25f8 MK |
896 | size_t hdr_len; |
897 | size_t crypto_len; | |
898 | bool is_first; | |
899 | bool is_last; | |
900 | ||
901 | rxd = (void *)msdu->data - sizeof(*rxd); | |
902 | is_first = !!(rxd->msdu_end.info0 & | |
903 | __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); | |
904 | is_last = !!(rxd->msdu_end.info0 & | |
905 | __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); | |
906 | ||
907 | /* Delivered decapped frame: | |
908 | * [802.11 header] | |
909 | * [crypto param] <-- can be trimmed if !fcs_err && | |
910 | * !decrypt_err && !peer_idx_invalid | |
911 | * [amsdu header] <-- only if A-MSDU | |
912 | * [rfc1042/llc] | |
913 | * [payload] | |
914 | * [FCS] <-- at end, needs to be trimmed | |
915 | */ | |
916 | ||
917 | /* This probably shouldn't happen but warn just in case */ | |
918 | if (unlikely(WARN_ON_ONCE(!is_first))) | |
919 | return; | |
920 | ||
921 | /* This probably shouldn't happen but warn just in case */ | |
922 | if (unlikely(WARN_ON_ONCE(!(is_first && is_last)))) | |
923 | return; | |
924 | ||
925 | skb_trim(msdu, msdu->len - FCS_LEN); | |
926 | ||
927 | /* In most cases this will be true for sniffed frames. It makes sense | |
928 | * to deliver them as-is without stripping the crypto param. This would | |
929 | * also make sense for software based decryption (which is not | |
930 | * implemented in ath10k). | |
931 | * | |
932 | * If there's no error then the frame is decrypted. At least that is | |
933 | * the case for frames that come in via fragmented rx indication. | |
934 | */ | |
935 | if (!is_decrypted) | |
936 | return; | |
937 | ||
938 | /* The payload is decrypted so strip crypto params. Start from tail | |
939 | * since hdr is used to compute some stuff. | |
940 | */ | |
941 | ||
942 | hdr = (void *)msdu->data; | |
943 | ||
944 | /* Tail */ | |
945 | skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype)); | |
946 | ||
947 | /* MMIC */ | |
948 | if (!ieee80211_has_morefrags(hdr->frame_control) && | |
949 | enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) | |
950 | skb_trim(msdu, msdu->len - 8); | |
951 | ||
952 | /* Head */ | |
953 | hdr_len = ieee80211_hdrlen(hdr->frame_control); | |
954 | crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); | |
955 | ||
956 | memmove((void *)msdu->data + crypto_len, | |
957 | (void *)msdu->data, hdr_len); | |
958 | skb_pull(msdu, crypto_len); | |
959 | } | |
960 | ||
961 | static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, | |
962 | struct sk_buff *msdu, | |
963 | struct ieee80211_rx_status *status, | |
964 | const u8 first_hdr[64]) | |
965 | { | |
f6dc2095 | 966 | struct ieee80211_hdr *hdr; |
581c25f8 MK |
967 | size_t hdr_len; |
968 | u8 da[ETH_ALEN]; | |
969 | u8 sa[ETH_ALEN]; | |
5e3dd157 | 970 | |
581c25f8 MK |
971 | /* Delivered decapped frame: |
972 | * [nwifi 802.11 header] <-- replaced with 802.11 hdr | |
973 | * [rfc1042/llc] | |
974 | * | |
975 | * Note: The nwifi header doesn't have QoS Control and is | |
976 | * (always?) a 3addr frame. | |
977 | * | |
978 | * Note2: There's no A-MSDU subframe header. Even if it's part | |
979 | * of an A-MSDU. | |
980 | */ | |
9aa505d2 | 981 | |
581c25f8 MK |
982 | /* pull decapped header and copy SA & DA */ |
983 | hdr = (struct ieee80211_hdr *)msdu->data; | |
984 | hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); | |
985 | ether_addr_copy(da, ieee80211_get_DA(hdr)); | |
986 | ether_addr_copy(sa, ieee80211_get_SA(hdr)); | |
987 | skb_pull(msdu, hdr_len); | |
5e3dd157 | 988 | |
581c25f8 MK |
989 | /* push original 802.11 header */ |
990 | hdr = (struct ieee80211_hdr *)first_hdr; | |
f6dc2095 | 991 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
581c25f8 | 992 | memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); |
5e3dd157 | 993 | |
581c25f8 MK |
994 | /* original 802.11 header has a different DA and in |
995 | * case of 4addr it may also have different SA | |
996 | */ | |
997 | hdr = (struct ieee80211_hdr *)msdu->data; | |
998 | ether_addr_copy(ieee80211_get_DA(hdr), da); | |
999 | ether_addr_copy(ieee80211_get_SA(hdr), sa); | |
1000 | } | |
5e3dd157 | 1001 | |
581c25f8 MK |
1002 | static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, |
1003 | struct sk_buff *msdu, | |
1004 | enum htt_rx_mpdu_encrypt_type enctype) | |
1005 | { | |
1006 | struct ieee80211_hdr *hdr; | |
1007 | struct htt_rx_desc *rxd; | |
1008 | size_t hdr_len, crypto_len; | |
1009 | void *rfc1042; | |
1010 | bool is_first, is_last, is_amsdu; | |
e3fbf8d2 | 1011 | |
581c25f8 MK |
1012 | rxd = (void *)msdu->data - sizeof(*rxd); |
1013 | hdr = (void *)rxd->rx_hdr_status; | |
f6dc2095 | 1014 | |
581c25f8 MK |
1015 | is_first = !!(rxd->msdu_end.info0 & |
1016 | __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); | |
1017 | is_last = !!(rxd->msdu_end.info0 & | |
1018 | __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); | |
1019 | is_amsdu = !(is_first && is_last); | |
5e3dd157 | 1020 | |
581c25f8 | 1021 | rfc1042 = hdr; |
5e3dd157 | 1022 | |
581c25f8 MK |
1023 | if (is_first) { |
1024 | hdr_len = ieee80211_hdrlen(hdr->frame_control); | |
1025 | crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); | |
652de35e | 1026 | |
581c25f8 MK |
1027 | rfc1042 += round_up(hdr_len, 4) + |
1028 | round_up(crypto_len, 4); | |
f6dc2095 | 1029 | } |
5e3dd157 | 1030 | |
581c25f8 MK |
1031 | if (is_amsdu) |
1032 | rfc1042 += sizeof(struct amsdu_subframe_hdr); | |
1033 | ||
1034 | return rfc1042; | |
5e3dd157 KV |
1035 | } |
1036 | ||
581c25f8 MK |
1037 | static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, |
1038 | struct sk_buff *msdu, | |
1039 | struct ieee80211_rx_status *status, | |
1040 | const u8 first_hdr[64], | |
1041 | enum htt_rx_mpdu_encrypt_type enctype) | |
5e3dd157 | 1042 | { |
5e3dd157 | 1043 | struct ieee80211_hdr *hdr; |
581c25f8 MK |
1044 | struct ethhdr *eth; |
1045 | size_t hdr_len; | |
e3fbf8d2 | 1046 | void *rfc1042; |
581c25f8 MK |
1047 | u8 da[ETH_ALEN]; |
1048 | u8 sa[ETH_ALEN]; | |
5e3dd157 | 1049 | |
581c25f8 MK |
1050 | /* Delivered decapped frame: |
1051 | * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc | |
1052 | * [payload] | |
1053 | */ | |
1054 | ||
1055 | rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); | |
1056 | if (WARN_ON_ONCE(!rfc1042)) | |
1057 | return; | |
1058 | ||
1059 | /* pull decapped header and copy SA & DA */ | |
1060 | eth = (struct ethhdr *)msdu->data; | |
1061 | ether_addr_copy(da, eth->h_dest); | |
1062 | ether_addr_copy(sa, eth->h_source); | |
1063 | skb_pull(msdu, sizeof(struct ethhdr)); | |
1064 | ||
1065 | /* push rfc1042/llc/snap */ | |
1066 | memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, | |
1067 | sizeof(struct rfc1042_hdr)); | |
1068 | ||
1069 | /* push original 802.11 header */ | |
1070 | hdr = (struct ieee80211_hdr *)first_hdr; | |
1071 | hdr_len = ieee80211_hdrlen(hdr->frame_control); | |
1072 | memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); | |
1073 | ||
1074 | /* original 802.11 header has a different DA and in | |
1075 | * case of 4addr it may also have different SA | |
1076 | */ | |
1077 | hdr = (struct ieee80211_hdr *)msdu->data; | |
1078 | ether_addr_copy(ieee80211_get_DA(hdr), da); | |
1079 | ether_addr_copy(ieee80211_get_SA(hdr), sa); | |
1080 | } | |
1081 | ||
1082 | static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, | |
1083 | struct sk_buff *msdu, | |
1084 | struct ieee80211_rx_status *status, | |
1085 | const u8 first_hdr[64]) | |
1086 | { | |
1087 | struct ieee80211_hdr *hdr; | |
1088 | size_t hdr_len; | |
1089 | ||
1090 | /* Delivered decapped frame: | |
1091 | * [amsdu header] <-- replaced with 802.11 hdr | |
1092 | * [rfc1042/llc] | |
1093 | * [payload] | |
1094 | */ | |
1095 | ||
1096 | skb_pull(msdu, sizeof(struct amsdu_subframe_hdr)); | |
1097 | ||
1098 | hdr = (struct ieee80211_hdr *)first_hdr; | |
e3fbf8d2 | 1099 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
581c25f8 MK |
1100 | memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); |
1101 | } | |
5e3dd157 | 1102 | |
581c25f8 MK |
1103 | static void ath10k_htt_rx_h_undecap(struct ath10k *ar, |
1104 | struct sk_buff *msdu, | |
1105 | struct ieee80211_rx_status *status, | |
1106 | u8 first_hdr[64], | |
1107 | enum htt_rx_mpdu_encrypt_type enctype, | |
1108 | bool is_decrypted) | |
1109 | { | |
1110 | struct htt_rx_desc *rxd; | |
1111 | enum rx_msdu_decap_format decap; | |
1112 | struct ieee80211_hdr *hdr; | |
f6dc2095 | 1113 | |
581c25f8 MK |
1114 | /* First msdu's decapped header: |
1115 | * [802.11 header] <-- padded to 4 bytes long | |
1116 | * [crypto param] <-- padded to 4 bytes long | |
1117 | * [amsdu header] <-- only if A-MSDU | |
1118 | * [rfc1042/llc] | |
1119 | * | |
1120 | * Other (2nd, 3rd, ..) msdu's decapped header: | |
1121 | * [amsdu header] <-- only if A-MSDU | |
1122 | * [rfc1042/llc] | |
1123 | */ | |
1124 | ||
1125 | rxd = (void *)msdu->data - sizeof(*rxd); | |
1126 | hdr = (void *)rxd->rx_hdr_status; | |
1127 | decap = MS(__le32_to_cpu(rxd->msdu_start.info1), | |
1128 | RX_MSDU_START_INFO1_DECAP_FORMAT); | |
1129 | ||
1130 | switch (decap) { | |
5e3dd157 | 1131 | case RX_MSDU_DECAP_RAW: |
581c25f8 MK |
1132 | ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, |
1133 | is_decrypted); | |
5e3dd157 KV |
1134 | break; |
1135 | case RX_MSDU_DECAP_NATIVE_WIFI: | |
581c25f8 | 1136 | ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr); |
5e3dd157 KV |
1137 | break; |
1138 | case RX_MSDU_DECAP_ETHERNET2_DIX: | |
581c25f8 | 1139 | ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); |
e3fbf8d2 MK |
1140 | break; |
1141 | case RX_MSDU_DECAP_8023_SNAP_LLC: | |
581c25f8 | 1142 | ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr); |
e3fbf8d2 | 1143 | break; |
5e3dd157 | 1144 | } |
5e3dd157 KV |
1145 | } |
1146 | ||
605f81aa MK |
1147 | static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) |
1148 | { | |
1149 | struct htt_rx_desc *rxd; | |
1150 | u32 flags, info; | |
1151 | bool is_ip4, is_ip6; | |
1152 | bool is_tcp, is_udp; | |
1153 | bool ip_csum_ok, tcpudp_csum_ok; | |
1154 | ||
1155 | rxd = (void *)skb->data - sizeof(*rxd); | |
1156 | flags = __le32_to_cpu(rxd->attention.flags); | |
1157 | info = __le32_to_cpu(rxd->msdu_start.info1); | |
1158 | ||
1159 | is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); | |
1160 | is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); | |
1161 | is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); | |
1162 | is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); | |
1163 | ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); | |
1164 | tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); | |
1165 | ||
1166 | if (!is_ip4 && !is_ip6) | |
1167 | return CHECKSUM_NONE; | |
1168 | if (!is_tcp && !is_udp) | |
1169 | return CHECKSUM_NONE; | |
1170 | if (!ip_csum_ok) | |
1171 | return CHECKSUM_NONE; | |
1172 | if (!tcpudp_csum_ok) | |
1173 | return CHECKSUM_NONE; | |
1174 | ||
1175 | return CHECKSUM_UNNECESSARY; | |
1176 | } | |
1177 | ||
581c25f8 MK |
1178 | static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) |
1179 | { | |
1180 | msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); | |
1181 | } | |
1182 | ||
1183 | static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, | |
1184 | struct sk_buff_head *amsdu, | |
1185 | struct ieee80211_rx_status *status) | |
1186 | { | |
1187 | struct sk_buff *first; | |
1188 | struct sk_buff *last; | |
1189 | struct sk_buff *msdu; | |
1190 | struct htt_rx_desc *rxd; | |
1191 | struct ieee80211_hdr *hdr; | |
1192 | enum htt_rx_mpdu_encrypt_type enctype; | |
1193 | u8 first_hdr[64]; | |
1194 | u8 *qos; | |
1195 | size_t hdr_len; | |
1196 | bool has_fcs_err; | |
1197 | bool has_crypto_err; | |
1198 | bool has_tkip_err; | |
1199 | bool has_peer_idx_invalid; | |
1200 | bool is_decrypted; | |
1201 | u32 attention; | |
1202 | ||
1203 | if (skb_queue_empty(amsdu)) | |
1204 | return; | |
1205 | ||
1206 | first = skb_peek(amsdu); | |
1207 | rxd = (void *)first->data - sizeof(*rxd); | |
1208 | ||
1209 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), | |
1210 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); | |
1211 | ||
1212 | /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 | |
1213 | * decapped header. It'll be used for undecapping of each MSDU. | |
1214 | */ | |
1215 | hdr = (void *)rxd->rx_hdr_status; | |
1216 | hdr_len = ieee80211_hdrlen(hdr->frame_control); | |
1217 | memcpy(first_hdr, hdr, hdr_len); | |
1218 | ||
1219 | /* Each A-MSDU subframe will use the original header as the base and be | |
1220 | * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. | |
1221 | */ | |
1222 | hdr = (void *)first_hdr; | |
1223 | qos = ieee80211_get_qos_ctl(hdr); | |
1224 | qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; | |
1225 | ||
1226 | /* Some attention flags are valid only in the last MSDU. */ | |
1227 | last = skb_peek_tail(amsdu); | |
1228 | rxd = (void *)last->data - sizeof(*rxd); | |
1229 | attention = __le32_to_cpu(rxd->attention.flags); | |
1230 | ||
1231 | has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); | |
1232 | has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); | |
1233 | has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); | |
1234 | has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); | |
1235 | ||
1236 | /* Note: If hardware captures an encrypted frame that it can't decrypt, | |
1237 | * e.g. due to fcs error, missing peer or invalid key data it will | |
1238 | * report the frame as raw. | |
1239 | */ | |
1240 | is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && | |
1241 | !has_fcs_err && | |
1242 | !has_crypto_err && | |
1243 | !has_peer_idx_invalid); | |
1244 | ||
1245 | /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ | |
1246 | status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | | |
1247 | RX_FLAG_MMIC_ERROR | | |
1248 | RX_FLAG_DECRYPTED | | |
1249 | RX_FLAG_IV_STRIPPED | | |
1250 | RX_FLAG_MMIC_STRIPPED); | |
1251 | ||
1252 | if (has_fcs_err) | |
1253 | status->flag |= RX_FLAG_FAILED_FCS_CRC; | |
1254 | ||
1255 | if (has_tkip_err) | |
1256 | status->flag |= RX_FLAG_MMIC_ERROR; | |
1257 | ||
1258 | if (is_decrypted) | |
1259 | status->flag |= RX_FLAG_DECRYPTED | | |
1260 | RX_FLAG_IV_STRIPPED | | |
1261 | RX_FLAG_MMIC_STRIPPED; | |
1262 | ||
1263 | skb_queue_walk(amsdu, msdu) { | |
1264 | ath10k_htt_rx_h_csum_offload(msdu); | |
1265 | ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, | |
1266 | is_decrypted); | |
1267 | ||
1268 | /* Undecapping involves copying the original 802.11 header back | |
1269 | * to sk_buff. If frame is protected and hardware has decrypted | |
1270 | * it then remove the protected bit. | |
1271 | */ | |
1272 | if (!is_decrypted) | |
1273 | continue; | |
1274 | ||
1275 | hdr = (void *)msdu->data; | |
1276 | hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); | |
1277 | } | |
1278 | } | |
1279 | ||
1280 | static void ath10k_htt_rx_h_deliver(struct ath10k *ar, | |
1281 | struct sk_buff_head *amsdu, | |
1282 | struct ieee80211_rx_status *status) | |
1283 | { | |
1284 | struct sk_buff *msdu; | |
1285 | ||
1286 | while ((msdu = __skb_dequeue(amsdu))) { | |
1287 | /* Setup per-MSDU flags */ | |
1288 | if (skb_queue_empty(amsdu)) | |
1289 | status->flag &= ~RX_FLAG_AMSDU_MORE; | |
1290 | else | |
1291 | status->flag |= RX_FLAG_AMSDU_MORE; | |
1292 | ||
1293 | ath10k_process_rx(ar, status, msdu); | |
1294 | } | |
1295 | } | |
1296 | ||
9aa505d2 | 1297 | static int ath10k_unchain_msdu(struct sk_buff_head *amsdu) |
bfa35368 | 1298 | { |
9aa505d2 | 1299 | struct sk_buff *skb, *first; |
bfa35368 BG |
1300 | int space; |
1301 | int total_len = 0; | |
1302 | ||
1303 | /* TODO: Might could optimize this by using | |
1304 | * skb_try_coalesce or similar method to | |
1305 | * decrease copying, or maybe get mac80211 to | |
1306 | * provide a way to just receive a list of | |
1307 | * skb? | |
1308 | */ | |
1309 | ||
9aa505d2 | 1310 | first = __skb_dequeue(amsdu); |
bfa35368 BG |
1311 | |
1312 | /* Allocate total length all at once. */ | |
9aa505d2 MK |
1313 | skb_queue_walk(amsdu, skb) |
1314 | total_len += skb->len; | |
bfa35368 | 1315 | |
9aa505d2 | 1316 | space = total_len - skb_tailroom(first); |
bfa35368 | 1317 | if ((space > 0) && |
9aa505d2 | 1318 | (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { |
bfa35368 BG |
1319 | /* TODO: bump some rx-oom error stat */ |
1320 | /* put it back together so we can free the | |
1321 | * whole list at once. | |
1322 | */ | |
9aa505d2 | 1323 | __skb_queue_head(amsdu, first); |
bfa35368 BG |
1324 | return -1; |
1325 | } | |
1326 | ||
1327 | /* Walk list again, copying contents into | |
1328 | * msdu_head | |
1329 | */ | |
9aa505d2 MK |
1330 | while ((skb = __skb_dequeue(amsdu))) { |
1331 | skb_copy_from_linear_data(skb, skb_put(first, skb->len), | |
1332 | skb->len); | |
1333 | dev_kfree_skb_any(skb); | |
bfa35368 BG |
1334 | } |
1335 | ||
9aa505d2 | 1336 | __skb_queue_head(amsdu, first); |
bfa35368 BG |
1337 | return 0; |
1338 | } | |
1339 | ||
581c25f8 MK |
1340 | static void ath10k_htt_rx_h_unchain(struct ath10k *ar, |
1341 | struct sk_buff_head *amsdu, | |
1342 | bool chained) | |
2acc4eb2 | 1343 | { |
581c25f8 MK |
1344 | struct sk_buff *first; |
1345 | struct htt_rx_desc *rxd; | |
1346 | enum rx_msdu_decap_format decap; | |
7aa7a72a | 1347 | |
581c25f8 MK |
1348 | first = skb_peek(amsdu); |
1349 | rxd = (void *)first->data - sizeof(*rxd); | |
1350 | decap = MS(__le32_to_cpu(rxd->msdu_start.info1), | |
1351 | RX_MSDU_START_INFO1_DECAP_FORMAT); | |
2acc4eb2 | 1352 | |
581c25f8 MK |
1353 | if (!chained) |
1354 | return; | |
1355 | ||
1356 | /* FIXME: Current unchaining logic can only handle simple case of raw | |
1357 | * msdu chaining. If decapping is other than raw the chaining may be | |
1358 | * more complex and this isn't handled by the current code. Don't even | |
1359 | * try re-constructing such frames - it'll be pretty much garbage. | |
1360 | */ | |
1361 | if (decap != RX_MSDU_DECAP_RAW || | |
1362 | skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { | |
1363 | __skb_queue_purge(amsdu); | |
1364 | return; | |
2acc4eb2 JD |
1365 | } |
1366 | ||
581c25f8 MK |
1367 | ath10k_unchain_msdu(amsdu); |
1368 | } | |
1369 | ||
1370 | static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, | |
1371 | struct sk_buff_head *amsdu, | |
1372 | struct ieee80211_rx_status *rx_status) | |
1373 | { | |
1374 | struct sk_buff *msdu; | |
1375 | struct htt_rx_desc *rxd; | |
d67d0a02 MK |
1376 | bool is_mgmt; |
1377 | bool has_fcs_err; | |
581c25f8 MK |
1378 | |
1379 | msdu = skb_peek(amsdu); | |
1380 | rxd = (void *)msdu->data - sizeof(*rxd); | |
1381 | ||
1382 | /* FIXME: It might be a good idea to do some fuzzy-testing to drop | |
1383 | * invalid/dangerous frames. | |
1384 | */ | |
1385 | ||
1386 | if (!rx_status->freq) { | |
1387 | ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n"); | |
36653f05 JD |
1388 | return false; |
1389 | } | |
1390 | ||
d67d0a02 MK |
1391 | is_mgmt = !!(rxd->attention.flags & |
1392 | __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); | |
1393 | has_fcs_err = !!(rxd->attention.flags & | |
1394 | __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR)); | |
1395 | ||
581c25f8 MK |
1396 | /* Management frames are handled via WMI events. The pros of such |
1397 | * approach is that channel is explicitly provided in WMI events | |
1398 | * whereas HTT doesn't provide channel information for Rxed frames. | |
d67d0a02 MK |
1399 | * |
1400 | * However some firmware revisions don't report corrupted frames via | |
1401 | * WMI so don't drop them. | |
581c25f8 | 1402 | */ |
d67d0a02 | 1403 | if (is_mgmt && !has_fcs_err) { |
7aa7a72a | 1404 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n"); |
2acc4eb2 JD |
1405 | return false; |
1406 | } | |
1407 | ||
581c25f8 MK |
1408 | if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { |
1409 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); | |
2acc4eb2 JD |
1410 | return false; |
1411 | } | |
1412 | ||
1413 | return true; | |
1414 | } | |
1415 | ||
581c25f8 MK |
1416 | static void ath10k_htt_rx_h_filter(struct ath10k *ar, |
1417 | struct sk_buff_head *amsdu, | |
1418 | struct ieee80211_rx_status *rx_status) | |
1419 | { | |
1420 | if (skb_queue_empty(amsdu)) | |
1421 | return; | |
1422 | ||
1423 | if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) | |
1424 | return; | |
1425 | ||
1426 | __skb_queue_purge(amsdu); | |
1427 | } | |
1428 | ||
5e3dd157 KV |
1429 | static void ath10k_htt_rx_handler(struct ath10k_htt *htt, |
1430 | struct htt_rx_indication *rx) | |
1431 | { | |
7aa7a72a | 1432 | struct ath10k *ar = htt->ar; |
6df92a3d | 1433 | struct ieee80211_rx_status *rx_status = &htt->rx_status; |
5e3dd157 | 1434 | struct htt_rx_indication_mpdu_range *mpdu_ranges; |
9aa505d2 | 1435 | struct sk_buff_head amsdu; |
5e3dd157 KV |
1436 | int num_mpdu_ranges; |
1437 | int fw_desc_len; | |
1438 | u8 *fw_desc; | |
d540690d | 1439 | int i, ret, mpdu_count = 0; |
5e3dd157 | 1440 | |
45967089 MK |
1441 | lockdep_assert_held(&htt->rx_ring.lock); |
1442 | ||
e0bd7513 MK |
1443 | if (htt->rx_confused) |
1444 | return; | |
1445 | ||
5e3dd157 KV |
1446 | fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes); |
1447 | fw_desc = (u8 *)&rx->fw_desc; | |
1448 | ||
1449 | num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), | |
1450 | HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); | |
1451 | mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); | |
1452 | ||
7aa7a72a | 1453 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", |
5e3dd157 KV |
1454 | rx, sizeof(*rx) + |
1455 | (sizeof(struct htt_rx_indication_mpdu_range) * | |
1456 | num_mpdu_ranges)); | |
1457 | ||
d540690d MK |
1458 | for (i = 0; i < num_mpdu_ranges; i++) |
1459 | mpdu_count += mpdu_ranges[i].mpdu_count; | |
1460 | ||
1461 | while (mpdu_count--) { | |
d540690d MK |
1462 | __skb_queue_head_init(&amsdu); |
1463 | ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, | |
f0e2770f | 1464 | &fw_desc_len, &amsdu); |
d540690d | 1465 | if (ret < 0) { |
e0bd7513 | 1466 | ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); |
d540690d | 1467 | __skb_queue_purge(&amsdu); |
e0bd7513 MK |
1468 | /* FIXME: It's probably a good idea to reboot the |
1469 | * device instead of leaving it inoperable. | |
1470 | */ | |
1471 | htt->rx_confused = true; | |
1472 | break; | |
d540690d | 1473 | } |
5e3dd157 | 1474 | |
b9fd8a84 | 1475 | ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status); |
581c25f8 MK |
1476 | ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0); |
1477 | ath10k_htt_rx_h_filter(ar, &amsdu, rx_status); | |
1478 | ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status); | |
1479 | ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status); | |
5e3dd157 KV |
1480 | } |
1481 | ||
6e712d42 | 1482 | tasklet_schedule(&htt->rx_replenish_task); |
5e3dd157 KV |
1483 | } |
1484 | ||
1485 | static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt, | |
5b07e07f | 1486 | struct htt_rx_fragment_indication *frag) |
5e3dd157 | 1487 | { |
7aa7a72a | 1488 | struct ath10k *ar = htt->ar; |
6df92a3d | 1489 | struct ieee80211_rx_status *rx_status = &htt->rx_status; |
9aa505d2 | 1490 | struct sk_buff_head amsdu; |
d84dd60f | 1491 | int ret; |
5e3dd157 | 1492 | u8 *fw_desc; |
581c25f8 | 1493 | int fw_desc_len; |
5e3dd157 KV |
1494 | |
1495 | fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes); | |
1496 | fw_desc = (u8 *)frag->fw_msdu_rx_desc; | |
1497 | ||
9aa505d2 | 1498 | __skb_queue_head_init(&amsdu); |
45967089 MK |
1499 | |
1500 | spin_lock_bh(&htt->rx_ring.lock); | |
d84dd60f | 1501 | ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len, |
f0e2770f | 1502 | &amsdu); |
45967089 | 1503 | spin_unlock_bh(&htt->rx_ring.lock); |
5e3dd157 | 1504 | |
686687c9 MK |
1505 | tasklet_schedule(&htt->rx_replenish_task); |
1506 | ||
7aa7a72a | 1507 | ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n"); |
5e3dd157 | 1508 | |
d84dd60f | 1509 | if (ret) { |
7aa7a72a | 1510 | ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n", |
d84dd60f | 1511 | ret); |
9aa505d2 | 1512 | __skb_queue_purge(&amsdu); |
5e3dd157 KV |
1513 | return; |
1514 | } | |
1515 | ||
9aa505d2 MK |
1516 | if (skb_queue_len(&amsdu) != 1) { |
1517 | ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n"); | |
1518 | __skb_queue_purge(&amsdu); | |
1519 | return; | |
1520 | } | |
1521 | ||
89a5a317 | 1522 | ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status); |
581c25f8 MK |
1523 | ath10k_htt_rx_h_filter(ar, &amsdu, rx_status); |
1524 | ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status); | |
1525 | ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status); | |
5e3dd157 | 1526 | |
5e3dd157 | 1527 | if (fw_desc_len > 0) { |
7aa7a72a | 1528 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
5e3dd157 KV |
1529 | "expecting more fragmented rx in one indication %d\n", |
1530 | fw_desc_len); | |
1531 | } | |
1532 | } | |
1533 | ||
6c5151a9 MK |
1534 | static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar, |
1535 | struct sk_buff *skb) | |
1536 | { | |
1537 | struct ath10k_htt *htt = &ar->htt; | |
1538 | struct htt_resp *resp = (struct htt_resp *)skb->data; | |
1539 | struct htt_tx_done tx_done = {}; | |
1540 | int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); | |
1541 | __le16 msdu_id; | |
1542 | int i; | |
1543 | ||
45967089 MK |
1544 | lockdep_assert_held(&htt->tx_lock); |
1545 | ||
6c5151a9 MK |
1546 | switch (status) { |
1547 | case HTT_DATA_TX_STATUS_NO_ACK: | |
1548 | tx_done.no_ack = true; | |
1549 | break; | |
1550 | case HTT_DATA_TX_STATUS_OK: | |
1551 | break; | |
1552 | case HTT_DATA_TX_STATUS_DISCARD: | |
1553 | case HTT_DATA_TX_STATUS_POSTPONE: | |
1554 | case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: | |
1555 | tx_done.discard = true; | |
1556 | break; | |
1557 | default: | |
7aa7a72a | 1558 | ath10k_warn(ar, "unhandled tx completion status %d\n", status); |
6c5151a9 MK |
1559 | tx_done.discard = true; |
1560 | break; | |
1561 | } | |
1562 | ||
7aa7a72a | 1563 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", |
6c5151a9 MK |
1564 | resp->data_tx_completion.num_msdus); |
1565 | ||
1566 | for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { | |
1567 | msdu_id = resp->data_tx_completion.msdus[i]; | |
1568 | tx_done.msdu_id = __le16_to_cpu(msdu_id); | |
1569 | ath10k_txrx_tx_unref(htt, &tx_done); | |
1570 | } | |
1571 | } | |
1572 | ||
aa5b4fbc MK |
1573 | static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) |
1574 | { | |
1575 | struct htt_rx_addba *ev = &resp->rx_addba; | |
1576 | struct ath10k_peer *peer; | |
1577 | struct ath10k_vif *arvif; | |
1578 | u16 info0, tid, peer_id; | |
1579 | ||
1580 | info0 = __le16_to_cpu(ev->info0); | |
1581 | tid = MS(info0, HTT_RX_BA_INFO0_TID); | |
1582 | peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); | |
1583 | ||
7aa7a72a | 1584 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
aa5b4fbc MK |
1585 | "htt rx addba tid %hu peer_id %hu size %hhu\n", |
1586 | tid, peer_id, ev->window_size); | |
1587 | ||
1588 | spin_lock_bh(&ar->data_lock); | |
1589 | peer = ath10k_peer_find_by_id(ar, peer_id); | |
1590 | if (!peer) { | |
7aa7a72a | 1591 | ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", |
aa5b4fbc MK |
1592 | peer_id); |
1593 | spin_unlock_bh(&ar->data_lock); | |
1594 | return; | |
1595 | } | |
1596 | ||
1597 | arvif = ath10k_get_arvif(ar, peer->vdev_id); | |
1598 | if (!arvif) { | |
7aa7a72a | 1599 | ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", |
aa5b4fbc MK |
1600 | peer->vdev_id); |
1601 | spin_unlock_bh(&ar->data_lock); | |
1602 | return; | |
1603 | } | |
1604 | ||
7aa7a72a | 1605 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
aa5b4fbc MK |
1606 | "htt rx start rx ba session sta %pM tid %hu size %hhu\n", |
1607 | peer->addr, tid, ev->window_size); | |
1608 | ||
1609 | ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); | |
1610 | spin_unlock_bh(&ar->data_lock); | |
1611 | } | |
1612 | ||
1613 | static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) | |
1614 | { | |
1615 | struct htt_rx_delba *ev = &resp->rx_delba; | |
1616 | struct ath10k_peer *peer; | |
1617 | struct ath10k_vif *arvif; | |
1618 | u16 info0, tid, peer_id; | |
1619 | ||
1620 | info0 = __le16_to_cpu(ev->info0); | |
1621 | tid = MS(info0, HTT_RX_BA_INFO0_TID); | |
1622 | peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); | |
1623 | ||
7aa7a72a | 1624 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
aa5b4fbc MK |
1625 | "htt rx delba tid %hu peer_id %hu\n", |
1626 | tid, peer_id); | |
1627 | ||
1628 | spin_lock_bh(&ar->data_lock); | |
1629 | peer = ath10k_peer_find_by_id(ar, peer_id); | |
1630 | if (!peer) { | |
7aa7a72a | 1631 | ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", |
aa5b4fbc MK |
1632 | peer_id); |
1633 | spin_unlock_bh(&ar->data_lock); | |
1634 | return; | |
1635 | } | |
1636 | ||
1637 | arvif = ath10k_get_arvif(ar, peer->vdev_id); | |
1638 | if (!arvif) { | |
7aa7a72a | 1639 | ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", |
aa5b4fbc MK |
1640 | peer->vdev_id); |
1641 | spin_unlock_bh(&ar->data_lock); | |
1642 | return; | |
1643 | } | |
1644 | ||
7aa7a72a | 1645 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
aa5b4fbc MK |
1646 | "htt rx stop rx ba session sta %pM tid %hu\n", |
1647 | peer->addr, tid); | |
1648 | ||
1649 | ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); | |
1650 | spin_unlock_bh(&ar->data_lock); | |
1651 | } | |
1652 | ||
c545070e MK |
1653 | static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, |
1654 | struct sk_buff_head *amsdu) | |
1655 | { | |
1656 | struct sk_buff *msdu; | |
1657 | struct htt_rx_desc *rxd; | |
1658 | ||
1659 | if (skb_queue_empty(list)) | |
1660 | return -ENOBUFS; | |
1661 | ||
1662 | if (WARN_ON(!skb_queue_empty(amsdu))) | |
1663 | return -EINVAL; | |
1664 | ||
1665 | while ((msdu = __skb_dequeue(list))) { | |
1666 | __skb_queue_tail(amsdu, msdu); | |
1667 | ||
1668 | rxd = (void *)msdu->data - sizeof(*rxd); | |
1669 | if (rxd->msdu_end.info0 & | |
1670 | __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) | |
1671 | break; | |
1672 | } | |
1673 | ||
1674 | msdu = skb_peek_tail(amsdu); | |
1675 | rxd = (void *)msdu->data - sizeof(*rxd); | |
1676 | if (!(rxd->msdu_end.info0 & | |
1677 | __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { | |
1678 | skb_queue_splice_init(amsdu, list); | |
1679 | return -EAGAIN; | |
1680 | } | |
1681 | ||
1682 | return 0; | |
1683 | } | |
1684 | ||
1685 | static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, | |
1686 | struct sk_buff *skb) | |
1687 | { | |
1688 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
1689 | ||
1690 | if (!ieee80211_has_protected(hdr->frame_control)) | |
1691 | return; | |
1692 | ||
1693 | /* Offloaded frames are already decrypted but firmware insists they are | |
1694 | * protected in the 802.11 header. Strip the flag. Otherwise mac80211 | |
1695 | * will drop the frame. | |
1696 | */ | |
1697 | ||
1698 | hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); | |
1699 | status->flag |= RX_FLAG_DECRYPTED | | |
1700 | RX_FLAG_IV_STRIPPED | | |
1701 | RX_FLAG_MMIC_STRIPPED; | |
1702 | } | |
1703 | ||
1704 | static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar, | |
1705 | struct sk_buff_head *list) | |
1706 | { | |
1707 | struct ath10k_htt *htt = &ar->htt; | |
1708 | struct ieee80211_rx_status *status = &htt->rx_status; | |
1709 | struct htt_rx_offload_msdu *rx; | |
1710 | struct sk_buff *msdu; | |
1711 | size_t offset; | |
1712 | ||
1713 | while ((msdu = __skb_dequeue(list))) { | |
1714 | /* Offloaded frames don't have Rx descriptor. Instead they have | |
1715 | * a short meta information header. | |
1716 | */ | |
1717 | ||
1718 | rx = (void *)msdu->data; | |
1719 | ||
1720 | skb_put(msdu, sizeof(*rx)); | |
1721 | skb_pull(msdu, sizeof(*rx)); | |
1722 | ||
1723 | if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { | |
1724 | ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); | |
1725 | dev_kfree_skb_any(msdu); | |
1726 | continue; | |
1727 | } | |
1728 | ||
1729 | skb_put(msdu, __le16_to_cpu(rx->msdu_len)); | |
1730 | ||
1731 | /* Offloaded rx header length isn't multiple of 2 nor 4 so the | |
1732 | * actual payload is unaligned. Align the frame. Otherwise | |
1733 | * mac80211 complains. This shouldn't reduce performance much | |
1734 | * because these offloaded frames are rare. | |
1735 | */ | |
1736 | offset = 4 - ((unsigned long)msdu->data & 3); | |
1737 | skb_put(msdu, offset); | |
1738 | memmove(msdu->data + offset, msdu->data, msdu->len); | |
1739 | skb_pull(msdu, offset); | |
1740 | ||
1741 | /* FIXME: The frame is NWifi. Re-construct QoS Control | |
1742 | * if possible later. | |
1743 | */ | |
1744 | ||
1745 | memset(status, 0, sizeof(*status)); | |
1746 | status->flag |= RX_FLAG_NO_SIGNAL_VAL; | |
1747 | ||
1748 | ath10k_htt_rx_h_rx_offload_prot(status, msdu); | |
1749 | ath10k_htt_rx_h_channel(ar, status); | |
1750 | ath10k_process_rx(ar, status, msdu); | |
1751 | } | |
1752 | } | |
1753 | ||
1754 | static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) | |
1755 | { | |
1756 | struct ath10k_htt *htt = &ar->htt; | |
1757 | struct htt_resp *resp = (void *)skb->data; | |
1758 | struct ieee80211_rx_status *status = &htt->rx_status; | |
1759 | struct sk_buff_head list; | |
1760 | struct sk_buff_head amsdu; | |
1761 | u16 peer_id; | |
1762 | u16 msdu_count; | |
1763 | u8 vdev_id; | |
1764 | u8 tid; | |
1765 | bool offload; | |
1766 | bool frag; | |
1767 | int ret; | |
1768 | ||
1769 | lockdep_assert_held(&htt->rx_ring.lock); | |
1770 | ||
1771 | if (htt->rx_confused) | |
1772 | return; | |
1773 | ||
1774 | skb_pull(skb, sizeof(resp->hdr)); | |
1775 | skb_pull(skb, sizeof(resp->rx_in_ord_ind)); | |
1776 | ||
1777 | peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); | |
1778 | msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); | |
1779 | vdev_id = resp->rx_in_ord_ind.vdev_id; | |
1780 | tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); | |
1781 | offload = !!(resp->rx_in_ord_ind.info & | |
1782 | HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); | |
1783 | frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); | |
1784 | ||
1785 | ath10k_dbg(ar, ATH10K_DBG_HTT, | |
1786 | "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", | |
1787 | vdev_id, peer_id, tid, offload, frag, msdu_count); | |
1788 | ||
1789 | if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) { | |
1790 | ath10k_warn(ar, "dropping invalid in order rx indication\n"); | |
1791 | return; | |
1792 | } | |
1793 | ||
1794 | /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later | |
1795 | * extracted and processed. | |
1796 | */ | |
1797 | __skb_queue_head_init(&list); | |
1798 | ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list); | |
1799 | if (ret < 0) { | |
1800 | ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); | |
1801 | htt->rx_confused = true; | |
1802 | return; | |
1803 | } | |
1804 | ||
1805 | /* Offloaded frames are very different and need to be handled | |
1806 | * separately. | |
1807 | */ | |
1808 | if (offload) | |
1809 | ath10k_htt_rx_h_rx_offload(ar, &list); | |
1810 | ||
1811 | while (!skb_queue_empty(&list)) { | |
1812 | __skb_queue_head_init(&amsdu); | |
1813 | ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu); | |
1814 | switch (ret) { | |
1815 | case 0: | |
1816 | /* Note: The in-order indication may report interleaved | |
1817 | * frames from different PPDUs meaning reported rx rate | |
1818 | * to mac80211 isn't accurate/reliable. It's still | |
1819 | * better to report something than nothing though. This | |
1820 | * should still give an idea about rx rate to the user. | |
1821 | */ | |
1822 | ath10k_htt_rx_h_ppdu(ar, &amsdu, status); | |
1823 | ath10k_htt_rx_h_filter(ar, &amsdu, status); | |
1824 | ath10k_htt_rx_h_mpdu(ar, &amsdu, status); | |
1825 | ath10k_htt_rx_h_deliver(ar, &amsdu, status); | |
1826 | break; | |
1827 | case -EAGAIN: | |
1828 | /* fall through */ | |
1829 | default: | |
1830 | /* Should not happen. */ | |
1831 | ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); | |
1832 | htt->rx_confused = true; | |
1833 | __skb_queue_purge(&list); | |
1834 | return; | |
1835 | } | |
1836 | } | |
1837 | ||
1838 | tasklet_schedule(&htt->rx_replenish_task); | |
1839 | } | |
1840 | ||
5e3dd157 KV |
1841 | void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) |
1842 | { | |
edb8236d | 1843 | struct ath10k_htt *htt = &ar->htt; |
5e3dd157 | 1844 | struct htt_resp *resp = (struct htt_resp *)skb->data; |
8348db29 | 1845 | enum htt_t2h_msg_type type; |
5e3dd157 KV |
1846 | |
1847 | /* confirm alignment */ | |
1848 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) | |
7aa7a72a | 1849 | ath10k_warn(ar, "unaligned htt message, expect trouble\n"); |
5e3dd157 | 1850 | |
7aa7a72a | 1851 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", |
5e3dd157 | 1852 | resp->hdr.msg_type); |
8348db29 RM |
1853 | |
1854 | if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { | |
1855 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", | |
1856 | resp->hdr.msg_type, ar->htt.t2h_msg_types_max); | |
1857 | dev_kfree_skb_any(skb); | |
1858 | return; | |
1859 | } | |
1860 | type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; | |
1861 | ||
1862 | switch (type) { | |
5e3dd157 KV |
1863 | case HTT_T2H_MSG_TYPE_VERSION_CONF: { |
1864 | htt->target_version_major = resp->ver_resp.major; | |
1865 | htt->target_version_minor = resp->ver_resp.minor; | |
1866 | complete(&htt->target_version_received); | |
1867 | break; | |
1868 | } | |
6c5151a9 | 1869 | case HTT_T2H_MSG_TYPE_RX_IND: |
45967089 MK |
1870 | spin_lock_bh(&htt->rx_ring.lock); |
1871 | __skb_queue_tail(&htt->rx_compl_q, skb); | |
1872 | spin_unlock_bh(&htt->rx_ring.lock); | |
6c5151a9 MK |
1873 | tasklet_schedule(&htt->txrx_compl_task); |
1874 | return; | |
5e3dd157 KV |
1875 | case HTT_T2H_MSG_TYPE_PEER_MAP: { |
1876 | struct htt_peer_map_event ev = { | |
1877 | .vdev_id = resp->peer_map.vdev_id, | |
1878 | .peer_id = __le16_to_cpu(resp->peer_map.peer_id), | |
1879 | }; | |
1880 | memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); | |
1881 | ath10k_peer_map_event(htt, &ev); | |
1882 | break; | |
1883 | } | |
1884 | case HTT_T2H_MSG_TYPE_PEER_UNMAP: { | |
1885 | struct htt_peer_unmap_event ev = { | |
1886 | .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), | |
1887 | }; | |
1888 | ath10k_peer_unmap_event(htt, &ev); | |
1889 | break; | |
1890 | } | |
1891 | case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { | |
1892 | struct htt_tx_done tx_done = {}; | |
1893 | int status = __le32_to_cpu(resp->mgmt_tx_completion.status); | |
1894 | ||
1895 | tx_done.msdu_id = | |
1896 | __le32_to_cpu(resp->mgmt_tx_completion.desc_id); | |
1897 | ||
1898 | switch (status) { | |
1899 | case HTT_MGMT_TX_STATUS_OK: | |
1900 | break; | |
1901 | case HTT_MGMT_TX_STATUS_RETRY: | |
1902 | tx_done.no_ack = true; | |
1903 | break; | |
1904 | case HTT_MGMT_TX_STATUS_DROP: | |
1905 | tx_done.discard = true; | |
1906 | break; | |
1907 | } | |
1908 | ||
6c5151a9 | 1909 | spin_lock_bh(&htt->tx_lock); |
0a89f8a0 | 1910 | ath10k_txrx_tx_unref(htt, &tx_done); |
6c5151a9 | 1911 | spin_unlock_bh(&htt->tx_lock); |
5e3dd157 KV |
1912 | break; |
1913 | } | |
6c5151a9 MK |
1914 | case HTT_T2H_MSG_TYPE_TX_COMPL_IND: |
1915 | spin_lock_bh(&htt->tx_lock); | |
1916 | __skb_queue_tail(&htt->tx_compl_q, skb); | |
1917 | spin_unlock_bh(&htt->tx_lock); | |
1918 | tasklet_schedule(&htt->txrx_compl_task); | |
1919 | return; | |
5e3dd157 KV |
1920 | case HTT_T2H_MSG_TYPE_SEC_IND: { |
1921 | struct ath10k *ar = htt->ar; | |
1922 | struct htt_security_indication *ev = &resp->security_indication; | |
1923 | ||
7aa7a72a | 1924 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
5e3dd157 KV |
1925 | "sec ind peer_id %d unicast %d type %d\n", |
1926 | __le16_to_cpu(ev->peer_id), | |
1927 | !!(ev->flags & HTT_SECURITY_IS_UNICAST), | |
1928 | MS(ev->flags, HTT_SECURITY_TYPE)); | |
1929 | complete(&ar->install_key_done); | |
1930 | break; | |
1931 | } | |
1932 | case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { | |
7aa7a72a | 1933 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", |
5e3dd157 KV |
1934 | skb->data, skb->len); |
1935 | ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind); | |
1936 | break; | |
1937 | } | |
1938 | case HTT_T2H_MSG_TYPE_TEST: | |
5e3dd157 | 1939 | break; |
5e3dd157 | 1940 | case HTT_T2H_MSG_TYPE_STATS_CONF: |
d35a6c18 | 1941 | trace_ath10k_htt_stats(ar, skb->data, skb->len); |
a9bf0506 KV |
1942 | break; |
1943 | case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: | |
708b9bde MK |
1944 | /* Firmware can return tx frames if it's unable to fully |
1945 | * process them and suspects host may be able to fix it. ath10k | |
1946 | * sends all tx frames as already inspected so this shouldn't | |
1947 | * happen unless fw has a bug. | |
1948 | */ | |
7aa7a72a | 1949 | ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); |
708b9bde | 1950 | break; |
5e3dd157 | 1951 | case HTT_T2H_MSG_TYPE_RX_ADDBA: |
aa5b4fbc MK |
1952 | ath10k_htt_rx_addba(ar, resp); |
1953 | break; | |
5e3dd157 | 1954 | case HTT_T2H_MSG_TYPE_RX_DELBA: |
aa5b4fbc MK |
1955 | ath10k_htt_rx_delba(ar, resp); |
1956 | break; | |
bfdd7937 RM |
1957 | case HTT_T2H_MSG_TYPE_PKTLOG: { |
1958 | struct ath10k_pktlog_hdr *hdr = | |
1959 | (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload; | |
1960 | ||
1961 | trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, | |
1962 | sizeof(*hdr) + | |
1963 | __le16_to_cpu(hdr->size)); | |
1964 | break; | |
1965 | } | |
aa5b4fbc MK |
1966 | case HTT_T2H_MSG_TYPE_RX_FLUSH: { |
1967 | /* Ignore this event because mac80211 takes care of Rx | |
1968 | * aggregation reordering. | |
1969 | */ | |
1970 | break; | |
1971 | } | |
c545070e MK |
1972 | case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { |
1973 | spin_lock_bh(&htt->rx_ring.lock); | |
1974 | __skb_queue_tail(&htt->rx_in_ord_compl_q, skb); | |
1975 | spin_unlock_bh(&htt->rx_ring.lock); | |
1976 | tasklet_schedule(&htt->txrx_compl_task); | |
1977 | return; | |
1978 | } | |
1979 | case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: | |
8348db29 RM |
1980 | break; |
1981 | case HTT_T2H_MSG_TYPE_CHAN_CHANGE: | |
c545070e | 1982 | break; |
5e3dd157 | 1983 | default: |
2358a544 MK |
1984 | ath10k_warn(ar, "htt event (%d) not handled\n", |
1985 | resp->hdr.msg_type); | |
7aa7a72a | 1986 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", |
5e3dd157 KV |
1987 | skb->data, skb->len); |
1988 | break; | |
1989 | }; | |
1990 | ||
1991 | /* Free the indication buffer */ | |
1992 | dev_kfree_skb_any(skb); | |
1993 | } | |
6c5151a9 MK |
1994 | |
1995 | static void ath10k_htt_txrx_compl_task(unsigned long ptr) | |
1996 | { | |
1997 | struct ath10k_htt *htt = (struct ath10k_htt *)ptr; | |
c545070e | 1998 | struct ath10k *ar = htt->ar; |
6c5151a9 MK |
1999 | struct htt_resp *resp; |
2000 | struct sk_buff *skb; | |
2001 | ||
45967089 MK |
2002 | spin_lock_bh(&htt->tx_lock); |
2003 | while ((skb = __skb_dequeue(&htt->tx_compl_q))) { | |
6c5151a9 MK |
2004 | ath10k_htt_rx_frm_tx_compl(htt->ar, skb); |
2005 | dev_kfree_skb_any(skb); | |
2006 | } | |
45967089 | 2007 | spin_unlock_bh(&htt->tx_lock); |
6c5151a9 | 2008 | |
45967089 MK |
2009 | spin_lock_bh(&htt->rx_ring.lock); |
2010 | while ((skb = __skb_dequeue(&htt->rx_compl_q))) { | |
6c5151a9 MK |
2011 | resp = (struct htt_resp *)skb->data; |
2012 | ath10k_htt_rx_handler(htt, &resp->rx_ind); | |
2013 | dev_kfree_skb_any(skb); | |
2014 | } | |
c545070e MK |
2015 | |
2016 | while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) { | |
2017 | ath10k_htt_rx_in_ord_ind(ar, skb); | |
2018 | dev_kfree_skb_any(skb); | |
2019 | } | |
45967089 | 2020 | spin_unlock_bh(&htt->rx_ring.lock); |
6c5151a9 | 2021 | } |