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ath10k: add more details to some debug messages
[mirror_ubuntu-eoan-kernel.git] / drivers / net / wireless / ath / ath10k / htt_rx.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
edb8236d 18#include "core.h"
5e3dd157
KV		 19#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
a9bf0506 23#include "trace.h"
5e3dd157
KV		 24
25#include <linux/log2.h>
26
27/* slightly larger than one large A-MPDU */
28#define HTT_RX_RING_SIZE_MIN 128
29
30/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
31#define HTT_RX_RING_SIZE_MAX 2048
32
33#define HTT_RX_AVG_FRM_BYTES 1000
34
35/* ms, very conservative */
36#define HTT_RX_HOST_LATENCY_MAX_MS 20
37
38/* ms, conservative */
39#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
40
41/* when under memory pressure rx ring refill may fail and needs a retry */
42#define HTT_RX_RING_REFILL_RETRY_MS 50
43
f6dc2095
MK		 44
45static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
46
47
5e3dd157
KV		 48static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
135 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
173 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
6e712d42 185 int ret, num_deficit, num_to_fill;
5e3dd157 186
6e712d42
MK		 187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
5e3dd157 202 spin_lock_bh(&htt->rx_ring.lock);
6e712d42
MK		 203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
5e3dd157
KV		 206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
6e712d42
MK		 216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
5e3dd157
KV		 218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
225 ath10k_htt_rx_msdu_buff_replenish(htt);
226}
227
228static unsigned ath10k_htt_rx_ring_elems(struct ath10k_htt *htt)
229{
230 return (__le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr) -
231 htt->rx_ring.sw_rd_idx.msdu_payld) & htt->rx_ring.size_mask;
232}
233
234void ath10k_htt_rx_detach(struct ath10k_htt *htt)
235{
236 int sw_rd_idx = htt->rx_ring.sw_rd_idx.msdu_payld;
237
238 del_timer_sync(&htt->rx_ring.refill_retry_timer);
6e712d42 239 tasklet_kill(&htt->rx_replenish_task);
5e3dd157
KV		 240
241 while (sw_rd_idx != __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr))) {
242 struct sk_buff *skb =
243 htt->rx_ring.netbufs_ring[sw_rd_idx];
244 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(skb);
245
246 dma_unmap_single(htt->ar->dev, cb->paddr,
247 skb->len + skb_tailroom(skb),
248 DMA_FROM_DEVICE);
249 dev_kfree_skb_any(htt->rx_ring.netbufs_ring[sw_rd_idx]);
250 sw_rd_idx++;
251 sw_rd_idx &= htt->rx_ring.size_mask;
252 }
253
254 dma_free_coherent(htt->ar->dev,
255 (htt->rx_ring.size *
256 sizeof(htt->rx_ring.paddrs_ring)),
257 htt->rx_ring.paddrs_ring,
258 htt->rx_ring.base_paddr);
259
260 dma_free_coherent(htt->ar->dev,
261 sizeof(*htt->rx_ring.alloc_idx.vaddr),
262 htt->rx_ring.alloc_idx.vaddr,
263 htt->rx_ring.alloc_idx.paddr);
264
265 kfree(htt->rx_ring.netbufs_ring);
266}
267
268static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
269{
270 int idx;
271 struct sk_buff *msdu;
272
273 spin_lock_bh(&htt->rx_ring.lock);
274
275 if (ath10k_htt_rx_ring_elems(htt) == 0)
276 ath10k_warn("htt rx ring is empty!\n");
277
278 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
279 msdu = htt->rx_ring.netbufs_ring[idx];
280
281 idx++;
282 idx &= htt->rx_ring.size_mask;
283 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
284 htt->rx_ring.fill_cnt--;
285
286 spin_unlock_bh(&htt->rx_ring.lock);
287 return msdu;
288}
289
290static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
291{
292 struct sk_buff *next;
293
294 while (skb) {
295 next = skb->next;
296 dev_kfree_skb_any(skb);
297 skb = next;
298 }
299}
300
301static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
302 u8 **fw_desc, int *fw_desc_len,
303 struct sk_buff **head_msdu,
304 struct sk_buff **tail_msdu)
305{
306 int msdu_len, msdu_chaining = 0;
307 struct sk_buff *msdu;
308 struct htt_rx_desc *rx_desc;
309
310 if (ath10k_htt_rx_ring_elems(htt) == 0)
311 ath10k_warn("htt rx ring is empty!\n");
312
313 if (htt->rx_confused) {
314 ath10k_warn("htt is confused. refusing rx\n");
315 return 0;
316 }
317
318 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
319 while (msdu) {
320 int last_msdu, msdu_len_invalid, msdu_chained;
321
322 dma_unmap_single(htt->ar->dev,
323 ATH10K_SKB_CB(msdu)->paddr,
324 msdu->len + skb_tailroom(msdu),
325 DMA_FROM_DEVICE);
326
75fb2f94 327 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
5e3dd157
KV		 328 msdu->data, msdu->len + skb_tailroom(msdu));
329
330 rx_desc = (struct htt_rx_desc *)msdu->data;
331
332 /* FIXME: we must report msdu payload since this is what caller
333 * expects now */
334 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
335 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
336
337 /*
338 * Sanity check - confirm the HW is finished filling in the
339 * rx data.
340 * If the HW and SW are working correctly, then it's guaranteed
341 * that the HW's MAC DMA is done before this point in the SW.
342 * To prevent the case that we handle a stale Rx descriptor,
343 * just assert for now until we have a way to recover.
344 */
345 if (!(__le32_to_cpu(rx_desc->attention.flags)
346 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
347 ath10k_htt_rx_free_msdu_chain(*head_msdu);
348 *head_msdu = NULL;
349 msdu = NULL;
350 ath10k_err("htt rx stopped. cannot recover\n");
351 htt->rx_confused = true;
352 break;
353 }
354
355 /*
356 * Copy the FW rx descriptor for this MSDU from the rx
357 * indication message into the MSDU's netbuf. HL uses the
358 * same rx indication message definition as LL, and simply
359 * appends new info (fields from the HW rx desc, and the
360 * MSDU payload itself). So, the offset into the rx
361 * indication message only has to account for the standard
362 * offset of the per-MSDU FW rx desc info within the
363 * message, and how many bytes of the per-MSDU FW rx desc
364 * info have already been consumed. (And the endianness of
365 * the host, since for a big-endian host, the rx ind
366 * message contents, including the per-MSDU rx desc bytes,
367 * were byteswapped during upload.)
368 */
369 if (*fw_desc_len > 0) {
370 rx_desc->fw_desc.info0 = **fw_desc;
371 /*
372 * The target is expected to only provide the basic
373 * per-MSDU rx descriptors. Just to be sure, verify
374 * that the target has not attached extension data
375 * (e.g. LRO flow ID).
376 */
377
378 /* or more, if there's extension data */
379 (*fw_desc)++;
380 (*fw_desc_len)--;
381 } else {
382 /*
383 * When an oversized AMSDU happened, FW will lost
384 * some of MSDU status - in this case, the FW
385 * descriptors provided will be less than the
386 * actual MSDUs inside this MPDU. Mark the FW
387 * descriptors so that it will still deliver to
388 * upper stack, if no CRC error for this MPDU.
389 *
390 * FIX THIS - the FW descriptors are actually for
391 * MSDUs in the end of this A-MSDU instead of the
392 * beginning.
393 */
394 rx_desc->fw_desc.info0 = 0;
395 }
396
397 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
398 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
399 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
400 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
401 RX_MSDU_START_INFO0_MSDU_LENGTH);
402 msdu_chained = rx_desc->frag_info.ring2_more_count;
403
404 if (msdu_len_invalid)
405 msdu_len = 0;
406
407 skb_trim(msdu, 0);
408 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
409 msdu_len -= msdu->len;
410
411 /* FIXME: Do chained buffers include htt_rx_desc or not? */
412 while (msdu_chained--) {
413 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
414
415 dma_unmap_single(htt->ar->dev,
416 ATH10K_SKB_CB(next)->paddr,
417 next->len + skb_tailroom(next),
418 DMA_FROM_DEVICE);
419
75fb2f94
BG		 420 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
421 "htt rx chained: ", next->data,
5e3dd157
KV		 422 next->len + skb_tailroom(next));
423
424 skb_trim(next, 0);
425 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
426 msdu_len -= next->len;
427
428 msdu->next = next;
429 msdu = next;
430 msdu_chaining = 1;
431 }
432
5e3dd157
KV		 433 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
434 RX_MSDU_END_INFO0_LAST_MSDU;
435
436 if (last_msdu) {
437 msdu->next = NULL;
438 break;
439 } else {
440 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
441 msdu->next = next;
442 msdu = next;
443 }
444 }
445 *tail_msdu = msdu;
446
447 /*
448 * Don't refill the ring yet.
449 *
450 * First, the elements popped here are still in use - it is not
451 * safe to overwrite them until the matching call to
452 * mpdu_desc_list_next. Second, for efficiency it is preferable to
453 * refill the rx ring with 1 PPDU's worth of rx buffers (something
454 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
455 * (something like 3 buffers). Consequently, we'll rely on the txrx
456 * SW to tell us when it is done pulling all the PPDU's rx buffers
457 * out of the rx ring, and then refill it just once.
458 */
459
460 return msdu_chaining;
461}
462
6e712d42
MK		 463static void ath10k_htt_rx_replenish_task(unsigned long ptr)
464{
465 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
466 ath10k_htt_rx_msdu_buff_replenish(htt);
467}
468
5e3dd157
KV		 469int ath10k_htt_rx_attach(struct ath10k_htt *htt)
470{
471 dma_addr_t paddr;
472 void *vaddr;
473 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
474
475 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
476 if (!is_power_of_2(htt->rx_ring.size)) {
477 ath10k_warn("htt rx ring size is not power of 2\n");
478 return -EINVAL;
479 }
480
481 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
482
483 /*
484 * Set the initial value for the level to which the rx ring
485 * should be filled, based on the max throughput and the
486 * worst likely latency for the host to fill the rx ring
487 * with new buffers. In theory, this fill level can be
488 * dynamically adjusted from the initial value set here, to
489 * reflect the actual host latency rather than a
490 * conservative assumption about the host latency.
491 */
492 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
493
494 htt->rx_ring.netbufs_ring =
495 kmalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
496 GFP_KERNEL);
497 if (!htt->rx_ring.netbufs_ring)
498 goto err_netbuf;
499
500 vaddr = dma_alloc_coherent(htt->ar->dev,
501 (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
502 &paddr, GFP_DMA);
503 if (!vaddr)
504 goto err_dma_ring;
505
506 htt->rx_ring.paddrs_ring = vaddr;
507 htt->rx_ring.base_paddr = paddr;
508
509 vaddr = dma_alloc_coherent(htt->ar->dev,
510 sizeof(*htt->rx_ring.alloc_idx.vaddr),
511 &paddr, GFP_DMA);
512 if (!vaddr)
513 goto err_dma_idx;
514
515 htt->rx_ring.alloc_idx.vaddr = vaddr;
516 htt->rx_ring.alloc_idx.paddr = paddr;
517 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
518 *htt->rx_ring.alloc_idx.vaddr = 0;
519
520 /* Initialize the Rx refill retry timer */
521 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
522
523 spin_lock_init(&htt->rx_ring.lock);
524
525 htt->rx_ring.fill_cnt = 0;
526 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
527 goto err_fill_ring;
528
6e712d42
MK		 529 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
530 (unsigned long)htt);
531
aad0b65f 532 ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
5e3dd157
KV		 533 htt->rx_ring.size, htt->rx_ring.fill_level);
534 return 0;
535
536err_fill_ring:
537 ath10k_htt_rx_ring_free(htt);
538 dma_free_coherent(htt->ar->dev,
539 sizeof(*htt->rx_ring.alloc_idx.vaddr),
540 htt->rx_ring.alloc_idx.vaddr,
541 htt->rx_ring.alloc_idx.paddr);
542err_dma_idx:
543 dma_free_coherent(htt->ar->dev,
544 (htt->rx_ring.size *
545 sizeof(htt->rx_ring.paddrs_ring)),
546 htt->rx_ring.paddrs_ring,
547 htt->rx_ring.base_paddr);
548err_dma_ring:
549 kfree(htt->rx_ring.netbufs_ring);
550err_netbuf:
551 return -ENOMEM;
552}
553
554static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
555{
556 switch (type) {
557 case HTT_RX_MPDU_ENCRYPT_WEP40:
558 case HTT_RX_MPDU_ENCRYPT_WEP104:
559 return 4;
560 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
561 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
562 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
563 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
564 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
565 return 8;
566 case HTT_RX_MPDU_ENCRYPT_NONE:
567 return 0;
568 }
569
570 ath10k_warn("unknown encryption type %d\n", type);
571 return 0;
572}
573
574static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
575{
576 switch (type) {
577 case HTT_RX_MPDU_ENCRYPT_NONE:
578 case HTT_RX_MPDU_ENCRYPT_WEP40:
579 case HTT_RX_MPDU_ENCRYPT_WEP104:
580 case HTT_RX_MPDU_ENCRYPT_WEP128:
581 case HTT_RX_MPDU_ENCRYPT_WAPI:
582 return 0;
583 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
584 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
585 return 4;
586 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
587 return 8;
588 }
589
590 ath10k_warn("unknown encryption type %d\n", type);
591 return 0;
592}
593
594/* Applies for first msdu in chain, before altering it. */
595static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
596{
597 struct htt_rx_desc *rxd;
598 enum rx_msdu_decap_format fmt;
599
600 rxd = (void *)skb->data - sizeof(*rxd);
601 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
602 RX_MSDU_START_INFO1_DECAP_FORMAT);
603
604 if (fmt == RX_MSDU_DECAP_RAW)
605 return (void *)skb->data;
606 else
607 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
608}
609
610/* This function only applies for first msdu in an msdu chain */
611static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
612{
613 if (ieee80211_is_data_qos(hdr->frame_control)) {
614 u8 *qc = ieee80211_get_qos_ctl(hdr);
615 if (qc[0] & 0x80)
616 return true;
617 }
618 return false;
619}
620
f6dc2095
MK		 621struct rfc1042_hdr {
622 u8 llc_dsap;
623 u8 llc_ssap;
624 u8 llc_ctrl;
625 u8 snap_oui[3];
626 __be16 snap_type;
627} __packed;
628
629struct amsdu_subframe_hdr {
630 u8 dst[ETH_ALEN];
631 u8 src[ETH_ALEN];
632 __be16 len;
633} __packed;
634
635static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
636 struct htt_rx_info *info)
5e3dd157
KV		 637{
638 struct htt_rx_desc *rxd;
5e3dd157 639 struct sk_buff *first;
5e3dd157
KV		 640 struct sk_buff *skb = info->skb;
641 enum rx_msdu_decap_format fmt;
642 enum htt_rx_mpdu_encrypt_type enctype;
f6dc2095 643 struct ieee80211_hdr *hdr;
784f69d3 644 u8 hdr_buf[64], addr[ETH_ALEN], *qos;
5e3dd157 645 unsigned int hdr_len;
5e3dd157
KV		 646
647 rxd = (void *)skb->data - sizeof(*rxd);
5e3dd157
KV		 648 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
649 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
650
f6dc2095
MK		 651 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
652 hdr_len = ieee80211_hdrlen(hdr->frame_control);
653 memcpy(hdr_buf, hdr, hdr_len);
654 hdr = (struct ieee80211_hdr *)hdr_buf;
5e3dd157 655
5e3dd157
KV		 656 first = skb;
657 while (skb) {
658 void *decap_hdr;
f6dc2095 659 int len;
5e3dd157
KV		 660
661 rxd = (void *)skb->data - sizeof(*rxd);
662 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
f6dc2095 663 RX_MSDU_START_INFO1_DECAP_FORMAT);
5e3dd157
KV		 664 decap_hdr = (void *)rxd->rx_hdr_status;
665
f6dc2095 666 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
5e3dd157 667
f6dc2095
MK		 668 /* First frame in an A-MSDU chain has more decapped data. */
669 if (skb == first) {
670 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
671 len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
672 4);
673 decap_hdr += len;
5e3dd157
KV		 674 }
675
f6dc2095
MK		 676 switch (fmt) {
677 case RX_MSDU_DECAP_RAW:
e3fbf8d2 678 /* remove trailing FCS */
f6dc2095
MK		 679 skb_trim(skb, skb->len - FCS_LEN);
680 break;
681 case RX_MSDU_DECAP_NATIVE_WIFI:
784f69d3
MK		 682 /* pull decapped header and copy DA */
683 hdr = (struct ieee80211_hdr *)skb->data;
684 hdr_len = ieee80211_hdrlen(hdr->frame_control);
685 memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN);
686 skb_pull(skb, hdr_len);
687
688 /* push original 802.11 header */
689 hdr = (struct ieee80211_hdr *)hdr_buf;
690 hdr_len = ieee80211_hdrlen(hdr->frame_control);
691 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
692
693 /* original A-MSDU header has the bit set but we're
694 * not including A-MSDU subframe header */
695 hdr = (struct ieee80211_hdr *)skb->data;
696 qos = ieee80211_get_qos_ctl(hdr);
697 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
698
699 /* original 802.11 header has a different DA */
700 memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN);
f6dc2095
MK		 701 break;
702 case RX_MSDU_DECAP_ETHERNET2_DIX:
e3fbf8d2
MK		 703 /* strip ethernet header and insert decapped 802.11
704 * header, amsdu subframe header and rfc1042 header */
705
f6dc2095
MK		 706 len = 0;
707 len += sizeof(struct rfc1042_hdr);
708 len += sizeof(struct amsdu_subframe_hdr);
709
710 skb_pull(skb, sizeof(struct ethhdr));
711 memcpy(skb_push(skb, len), decap_hdr, len);
712 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
713 break;
714 case RX_MSDU_DECAP_8023_SNAP_LLC:
e3fbf8d2
MK		 715 /* insert decapped 802.11 header making a singly
716 * A-MSDU */
f6dc2095
MK		 717 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
718 break;
5e3dd157
KV		 719 }
720
f6dc2095
MK		 721 info->skb = skb;
722 info->encrypt_type = enctype;
5e3dd157 723 skb = skb->next;
f6dc2095 724 info->skb->next = NULL;
5e3dd157 725
652de35e
KV		 726 if (skb)
727 info->amsdu_more = true;
728
f6dc2095
MK		 729 ath10k_process_rx(htt->ar, info);
730 }
5e3dd157 731
f6dc2095
MK		 732 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
733 * monitor interface active for sniffing purposes. */
5e3dd157
KV		 734}
735
f6dc2095 736static void ath10k_htt_rx_msdu(struct ath10k_htt *htt, struct htt_rx_info *info)
5e3dd157
KV		 737{
738 struct sk_buff *skb = info->skb;
739 struct htt_rx_desc *rxd;
740 struct ieee80211_hdr *hdr;
741 enum rx_msdu_decap_format fmt;
742 enum htt_rx_mpdu_encrypt_type enctype;
e3fbf8d2
MK		 743 int hdr_len;
744 void *rfc1042;
5e3dd157
KV		 745
746 /* This shouldn't happen. If it does than it may be a FW bug. */
747 if (skb->next) {
75fb2f94 748 ath10k_warn("htt rx received chained non A-MSDU frame\n");
5e3dd157
KV		 749 ath10k_htt_rx_free_msdu_chain(skb->next);
750 skb->next = NULL;
751 }
752
753 rxd = (void *)skb->data - sizeof(*rxd);
754 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
755 RX_MSDU_START_INFO1_DECAP_FORMAT);
756 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
757 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
e3fbf8d2
MK		 758 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
759 hdr_len = ieee80211_hdrlen(hdr->frame_control);
5e3dd157 760
f6dc2095
MK		 761 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
762
5e3dd157
KV		 763 switch (fmt) {
764 case RX_MSDU_DECAP_RAW:
765 /* remove trailing FCS */
e3fbf8d2 766 skb_trim(skb, skb->len - FCS_LEN);
5e3dd157
KV		 767 break;
768 case RX_MSDU_DECAP_NATIVE_WIFI:
784f69d3
MK		 769 /* Pull decapped header */
770 hdr = (struct ieee80211_hdr *)skb->data;
771 hdr_len = ieee80211_hdrlen(hdr->frame_control);
772 skb_pull(skb, hdr_len);
773
774 /* Push original header */
775 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
776 hdr_len = ieee80211_hdrlen(hdr->frame_control);
777 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
5e3dd157
KV		 778 break;
779 case RX_MSDU_DECAP_ETHERNET2_DIX:
e3fbf8d2
MK		 780 /* strip ethernet header and insert decapped 802.11 header and
781 * rfc1042 header */
5e3dd157 782
e3fbf8d2
MK		 783 rfc1042 = hdr;
784 rfc1042 += roundup(hdr_len, 4);
785 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
5e3dd157 786
e3fbf8d2
MK		 787 skb_pull(skb, sizeof(struct ethhdr));
788 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
789 rfc1042, sizeof(struct rfc1042_hdr));
790 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
791 break;
792 case RX_MSDU_DECAP_8023_SNAP_LLC:
793 /* remove A-MSDU subframe header and insert
794 * decapped 802.11 header. rfc1042 header is already there */
5e3dd157 795
e3fbf8d2
MK		 796 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
797 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
798 break;
5e3dd157
KV		 799 }
800
801 info->skb = skb;
802 info->encrypt_type = enctype;
f6dc2095
MK		 803
804 ath10k_process_rx(htt->ar, info);
5e3dd157
KV		 805}
806
807static bool ath10k_htt_rx_has_decrypt_err(struct sk_buff *skb)
808{
809 struct htt_rx_desc *rxd;
810 u32 flags;
811
812 rxd = (void *)skb->data - sizeof(*rxd);
813 flags = __le32_to_cpu(rxd->attention.flags);
814
815 if (flags & RX_ATTENTION_FLAGS_DECRYPT_ERR)
816 return true;
817
818 return false;
819}
820
821static bool ath10k_htt_rx_has_fcs_err(struct sk_buff *skb)
822{
823 struct htt_rx_desc *rxd;
824 u32 flags;
825
826 rxd = (void *)skb->data - sizeof(*rxd);
827 flags = __le32_to_cpu(rxd->attention.flags);
828
829 if (flags & RX_ATTENTION_FLAGS_FCS_ERR)
830 return true;
831
832 return false;
833}
834
22569400
JD		 835static bool ath10k_htt_rx_has_mic_err(struct sk_buff *skb)
836{
837 struct htt_rx_desc *rxd;
838 u32 flags;
839
840 rxd = (void *)skb->data - sizeof(*rxd);
841 flags = __le32_to_cpu(rxd->attention.flags);
842
843 if (flags & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
844 return true;
845
846 return false;
847}
848
605f81aa
MK		 849static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
850{
851 struct htt_rx_desc *rxd;
852 u32 flags, info;
853 bool is_ip4, is_ip6;
854 bool is_tcp, is_udp;
855 bool ip_csum_ok, tcpudp_csum_ok;
856
857 rxd = (void *)skb->data - sizeof(*rxd);
858 flags = __le32_to_cpu(rxd->attention.flags);
859 info = __le32_to_cpu(rxd->msdu_start.info1);
860
861 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
862 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
863 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
864 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
865 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
866 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
867
868 if (!is_ip4 && !is_ip6)
869 return CHECKSUM_NONE;
870 if (!is_tcp && !is_udp)
871 return CHECKSUM_NONE;
872 if (!ip_csum_ok)
873 return CHECKSUM_NONE;
874 if (!tcpudp_csum_ok)
875 return CHECKSUM_NONE;
876
877 return CHECKSUM_UNNECESSARY;
878}
879
5e3dd157
KV		 880static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
881 struct htt_rx_indication *rx)
882{
883 struct htt_rx_info info;
884 struct htt_rx_indication_mpdu_range *mpdu_ranges;
885 struct ieee80211_hdr *hdr;
886 int num_mpdu_ranges;
887 int fw_desc_len;
888 u8 *fw_desc;
889 int i, j;
5e3dd157
KV		 890
891 memset(&info, 0, sizeof(info));
892
893 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
894 fw_desc = (u8 *)&rx->fw_desc;
895
896 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
897 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
898 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
899
900 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
901 rx, sizeof(*rx) +
902 (sizeof(struct htt_rx_indication_mpdu_range) *
903 num_mpdu_ranges));
904
905 for (i = 0; i < num_mpdu_ranges; i++) {
906 info.status = mpdu_ranges[i].mpdu_range_status;
907
908 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
909 struct sk_buff *msdu_head, *msdu_tail;
910 enum htt_rx_mpdu_status status;
911 int msdu_chaining;
912
913 msdu_head = NULL;
914 msdu_tail = NULL;
915 msdu_chaining = ath10k_htt_rx_amsdu_pop(htt,
916 &fw_desc,
917 &fw_desc_len,
918 &msdu_head,
919 &msdu_tail);
920
921 if (!msdu_head) {
922 ath10k_warn("htt rx no data!\n");
923 continue;
924 }
925
926 if (msdu_head->len == 0) {
927 ath10k_dbg(ATH10K_DBG_HTT,
928 "htt rx dropping due to zero-len\n");
929 ath10k_htt_rx_free_msdu_chain(msdu_head);
930 continue;
931 }
932
933 if (ath10k_htt_rx_has_decrypt_err(msdu_head)) {
c6b56b03
BG		 934 ath10k_dbg(ATH10K_DBG_HTT,
935 "htt rx dropping due to decrypt-err\n");
5e3dd157
KV		 936 ath10k_htt_rx_free_msdu_chain(msdu_head);
937 continue;
938 }
939
940 status = info.status;
941
942 /* Skip mgmt frames while we handle this in WMI */
943 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL) {
75fb2f94 944 ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
5e3dd157
KV		 945 ath10k_htt_rx_free_msdu_chain(msdu_head);
946 continue;
947 }
948
949 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
950 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
716ae53c 951 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
5e3dd157
KV		 952 !htt->ar->monitor_enabled) {
953 ath10k_dbg(ATH10K_DBG_HTT,
954 "htt rx ignoring frame w/ status %d\n",
955 status);
956 ath10k_htt_rx_free_msdu_chain(msdu_head);
957 continue;
958 }
959
e8a50f8b 960 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
75fb2f94
BG		 961 ath10k_dbg(ATH10K_DBG_HTT,
962 "htt rx CAC running\n");
e8a50f8b
MP		 963 ath10k_htt_rx_free_msdu_chain(msdu_head);
964 continue;
965 }
966
5e3dd157
KV		 967 /* FIXME: we do not support chaining yet.
968 * this needs investigation */
969 if (msdu_chaining) {
75fb2f94 970 ath10k_warn("htt rx msdu_chaining is true\n");
5e3dd157
KV		 971 ath10k_htt_rx_free_msdu_chain(msdu_head);
972 continue;
973 }
974
975 info.skb = msdu_head;
976 info.fcs_err = ath10k_htt_rx_has_fcs_err(msdu_head);
22569400 977 info.mic_err = ath10k_htt_rx_has_mic_err(msdu_head);
c6b56b03
BG		 978
979 if (info.fcs_err)
980 ath10k_dbg(ATH10K_DBG_HTT,
981 "htt rx has FCS err\n");
982
983 if (info.mic_err)
984 ath10k_dbg(ATH10K_DBG_HTT,
985 "htt rx has MIC err\n");
986
5e3dd157
KV		 987 info.signal = ATH10K_DEFAULT_NOISE_FLOOR;
988 info.signal += rx->ppdu.combined_rssi;
989
990 info.rate.info0 = rx->ppdu.info0;
991 info.rate.info1 = __le32_to_cpu(rx->ppdu.info1);
992 info.rate.info2 = __le32_to_cpu(rx->ppdu.info2);
993
994 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
995
996 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
f6dc2095 997 ath10k_htt_rx_amsdu(htt, &info);
5e3dd157 998 else
f6dc2095 999 ath10k_htt_rx_msdu(htt, &info);
5e3dd157
KV		 1000 }
1001 }
1002
6e712d42 1003 tasklet_schedule(&htt->rx_replenish_task);
5e3dd157
KV		 1004}
1005
1006static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1007 struct htt_rx_fragment_indication *frag)
1008{
1009 struct sk_buff *msdu_head, *msdu_tail;
1010 struct htt_rx_desc *rxd;
1011 enum rx_msdu_decap_format fmt;
1012 struct htt_rx_info info = {};
1013 struct ieee80211_hdr *hdr;
1014 int msdu_chaining;
1015 bool tkip_mic_err;
1016 bool decrypt_err;
1017 u8 *fw_desc;
1018 int fw_desc_len, hdrlen, paramlen;
1019 int trim;
1020
1021 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1022 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1023
1024 msdu_head = NULL;
1025 msdu_tail = NULL;
1026 msdu_chaining = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
1027 &msdu_head, &msdu_tail);
1028
1029 ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1030
1031 if (!msdu_head) {
1032 ath10k_warn("htt rx frag no data\n");
1033 return;
1034 }
1035
1036 if (msdu_chaining || msdu_head != msdu_tail) {
1037 ath10k_warn("aggregation with fragmentation?!\n");
1038 ath10k_htt_rx_free_msdu_chain(msdu_head);
1039 return;
1040 }
1041
1042 /* FIXME: implement signal strength */
1043
1044 hdr = (struct ieee80211_hdr *)msdu_head->data;
1045 rxd = (void *)msdu_head->data - sizeof(*rxd);
1046 tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
1047 RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1048 decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
1049 RX_ATTENTION_FLAGS_DECRYPT_ERR);
1050 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1051 RX_MSDU_START_INFO1_DECAP_FORMAT);
1052
1053 if (fmt != RX_MSDU_DECAP_RAW) {
1054 ath10k_warn("we dont support non-raw fragmented rx yet\n");
1055 dev_kfree_skb_any(msdu_head);
1056 goto end;
1057 }
1058
1059 info.skb = msdu_head;
1060 info.status = HTT_RX_IND_MPDU_STATUS_OK;
1061 info.encrypt_type = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1062 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
605f81aa 1063 info.skb->ip_summed = ath10k_htt_rx_get_csum_state(info.skb);
5e3dd157
KV		 1064
1065 if (tkip_mic_err) {
1066 ath10k_warn("tkip mic error\n");
1067 info.status = HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR;
1068 }
1069
1070 if (decrypt_err) {
1071 ath10k_warn("decryption err in fragmented rx\n");
1072 dev_kfree_skb_any(info.skb);
1073 goto end;
1074 }
1075
1076 if (info.encrypt_type != HTT_RX_MPDU_ENCRYPT_NONE) {
1077 hdrlen = ieee80211_hdrlen(hdr->frame_control);
1078 paramlen = ath10k_htt_rx_crypto_param_len(info.encrypt_type);
1079
1080 /* It is more efficient to move the header than the payload */
1081 memmove((void *)info.skb->data + paramlen,
1082 (void *)info.skb->data,
1083 hdrlen);
1084 skb_pull(info.skb, paramlen);
1085 hdr = (struct ieee80211_hdr *)info.skb->data;
1086 }
1087
1088 /* remove trailing FCS */
1089 trim = 4;
1090
1091 /* remove crypto trailer */
1092 trim += ath10k_htt_rx_crypto_tail_len(info.encrypt_type);
1093
1094 /* last fragment of TKIP frags has MIC */
1095 if (!ieee80211_has_morefrags(hdr->frame_control) &&
1096 info.encrypt_type == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1097 trim += 8;
1098
1099 if (trim > info.skb->len) {
1100 ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
1101 dev_kfree_skb_any(info.skb);
1102 goto end;
1103 }
1104
1105 skb_trim(info.skb, info.skb->len - trim);
1106
75fb2f94 1107 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
5e3dd157
KV		 1108 info.skb->data, info.skb->len);
1109 ath10k_process_rx(htt->ar, &info);
1110
1111end:
1112 if (fw_desc_len > 0) {
1113 ath10k_dbg(ATH10K_DBG_HTT,
1114 "expecting more fragmented rx in one indication %d\n",
1115 fw_desc_len);
1116 }
1117}
1118
1119void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1120{
edb8236d 1121 struct ath10k_htt *htt = &ar->htt;
5e3dd157
KV		 1122 struct htt_resp *resp = (struct htt_resp *)skb->data;
1123
1124 /* confirm alignment */
1125 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1126 ath10k_warn("unaligned htt message, expect trouble\n");
1127
75fb2f94 1128 ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
5e3dd157
KV		 1129 resp->hdr.msg_type);
1130 switch (resp->hdr.msg_type) {
1131 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1132 htt->target_version_major = resp->ver_resp.major;
1133 htt->target_version_minor = resp->ver_resp.minor;
1134 complete(&htt->target_version_received);
1135 break;
1136 }
1137 case HTT_T2H_MSG_TYPE_RX_IND: {
1138 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1139 break;
1140 }
1141 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1142 struct htt_peer_map_event ev = {
1143 .vdev_id = resp->peer_map.vdev_id,
1144 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1145 };
1146 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1147 ath10k_peer_map_event(htt, &ev);
1148 break;
1149 }
1150 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1151 struct htt_peer_unmap_event ev = {
1152 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1153 };
1154 ath10k_peer_unmap_event(htt, &ev);
1155 break;
1156 }
1157 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1158 struct htt_tx_done tx_done = {};
1159 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1160
1161 tx_done.msdu_id =
1162 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1163
1164 switch (status) {
1165 case HTT_MGMT_TX_STATUS_OK:
1166 break;
1167 case HTT_MGMT_TX_STATUS_RETRY:
1168 tx_done.no_ack = true;
1169 break;
1170 case HTT_MGMT_TX_STATUS_DROP:
1171 tx_done.discard = true;
1172 break;
1173 }
1174
0a89f8a0 1175 ath10k_txrx_tx_unref(htt, &tx_done);
5e3dd157
KV		 1176 break;
1177 }
1178 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: {
1179 struct htt_tx_done tx_done = {};
1180 int status = MS(resp->data_tx_completion.flags,
1181 HTT_DATA_TX_STATUS);
1182 __le16 msdu_id;
1183 int i;
1184
1185 switch (status) {
1186 case HTT_DATA_TX_STATUS_NO_ACK:
1187 tx_done.no_ack = true;
1188 break;
1189 case HTT_DATA_TX_STATUS_OK:
1190 break;
1191 case HTT_DATA_TX_STATUS_DISCARD:
1192 case HTT_DATA_TX_STATUS_POSTPONE:
1193 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1194 tx_done.discard = true;
1195 break;
1196 default:
1197 ath10k_warn("unhandled tx completion status %d\n",
1198 status);
1199 tx_done.discard = true;
1200 break;
1201 }
1202
1203 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1204 resp->data_tx_completion.num_msdus);
1205
1206 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1207 msdu_id = resp->data_tx_completion.msdus[i];
1208 tx_done.msdu_id = __le16_to_cpu(msdu_id);
0a89f8a0 1209 ath10k_txrx_tx_unref(htt, &tx_done);
5e3dd157
KV		 1210 }
1211 break;
1212 }
1213 case HTT_T2H_MSG_TYPE_SEC_IND: {
1214 struct ath10k *ar = htt->ar;
1215 struct htt_security_indication *ev = &resp->security_indication;
1216
1217 ath10k_dbg(ATH10K_DBG_HTT,
1218 "sec ind peer_id %d unicast %d type %d\n",
1219 __le16_to_cpu(ev->peer_id),
1220 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1221 MS(ev->flags, HTT_SECURITY_TYPE));
1222 complete(&ar->install_key_done);
1223 break;
1224 }
1225 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1226 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1227 skb->data, skb->len);
1228 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1229 break;
1230 }
1231 case HTT_T2H_MSG_TYPE_TEST:
1232 /* FIX THIS */
1233 break;
5e3dd157 1234 case HTT_T2H_MSG_TYPE_STATS_CONF:
a9bf0506
KV		 1235 trace_ath10k_htt_stats(skb->data, skb->len);
1236 break;
1237 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
5e3dd157
KV		 1238 case HTT_T2H_MSG_TYPE_RX_ADDBA:
1239 case HTT_T2H_MSG_TYPE_RX_DELBA:
1240 case HTT_T2H_MSG_TYPE_RX_FLUSH:
1241 default:
1242 ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1243 resp->hdr.msg_type);
1244 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1245 skb->data, skb->len);
1246 break;
1247 };
1248
1249 /* Free the indication buffer */
1250 dev_kfree_skb_any(skb);
1251}
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