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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/skbuff.h> | |
2fe5288c | 19 | #include <linux/ctype.h> |
5e3dd157 KV |
20 | |
21 | #include "core.h" | |
22 | #include "htc.h" | |
23 | #include "debug.h" | |
24 | #include "wmi.h" | |
ca996ec5 | 25 | #include "wmi-tlv.h" |
5e3dd157 | 26 | #include "mac.h" |
43d2a30f | 27 | #include "testmode.h" |
d7579d12 | 28 | #include "wmi-ops.h" |
6a94888f | 29 | #include "p2p.h" |
587f7031 | 30 | #include "hw.h" |
5e3dd157 | 31 | |
ce42870e BM |
32 | /* MAIN WMI cmd track */ |
33 | static struct wmi_cmd_map wmi_cmd_map = { | |
34 | .init_cmdid = WMI_INIT_CMDID, | |
35 | .start_scan_cmdid = WMI_START_SCAN_CMDID, | |
36 | .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, | |
37 | .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, | |
38 | .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, | |
39 | .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, | |
40 | .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, | |
41 | .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, | |
42 | .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, | |
43 | .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, | |
44 | .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, | |
45 | .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, | |
46 | .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, | |
47 | .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, | |
48 | .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, | |
49 | .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
50 | .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, | |
51 | .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, | |
52 | .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, | |
53 | .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, | |
54 | .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, | |
55 | .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, | |
56 | .vdev_up_cmdid = WMI_VDEV_UP_CMDID, | |
57 | .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, | |
58 | .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, | |
59 | .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, | |
60 | .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, | |
61 | .peer_create_cmdid = WMI_PEER_CREATE_CMDID, | |
62 | .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, | |
63 | .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, | |
64 | .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, | |
65 | .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, | |
66 | .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, | |
67 | .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, | |
68 | .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, | |
69 | .bcn_tx_cmdid = WMI_BCN_TX_CMDID, | |
70 | .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, | |
71 | .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, | |
72 | .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, | |
73 | .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, | |
74 | .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, | |
75 | .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, | |
76 | .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, | |
77 | .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, | |
78 | .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, | |
79 | .delba_send_cmdid = WMI_DELBA_SEND_CMDID, | |
80 | .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, | |
81 | .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, | |
82 | .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, | |
83 | .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, | |
84 | .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, | |
85 | .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, | |
86 | .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, | |
87 | .roam_scan_mode = WMI_ROAM_SCAN_MODE, | |
88 | .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, | |
89 | .roam_scan_period = WMI_ROAM_SCAN_PERIOD, | |
90 | .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
91 | .roam_ap_profile = WMI_ROAM_AP_PROFILE, | |
92 | .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, | |
93 | .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, | |
94 | .ofl_scan_period = WMI_OFL_SCAN_PERIOD, | |
95 | .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, | |
96 | .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, | |
97 | .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, | |
98 | .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, | |
99 | .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, | |
100 | .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, | |
101 | .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, | |
102 | .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, | |
103 | .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, | |
104 | .wlan_profile_set_hist_intvl_cmdid = | |
105 | WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
106 | .wlan_profile_get_profile_data_cmdid = | |
107 | WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
108 | .wlan_profile_enable_profile_id_cmdid = | |
109 | WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
110 | .wlan_profile_list_profile_id_cmdid = | |
111 | WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
112 | .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, | |
113 | .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, | |
114 | .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, | |
115 | .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, | |
116 | .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, | |
117 | .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, | |
118 | .wow_enable_disable_wake_event_cmdid = | |
119 | WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
120 | .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, | |
121 | .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
122 | .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, | |
123 | .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, | |
124 | .vdev_spectral_scan_configure_cmdid = | |
125 | WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
126 | .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
127 | .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, | |
128 | .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, | |
129 | .network_list_offload_config_cmdid = | |
130 | WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, | |
131 | .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, | |
132 | .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, | |
133 | .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
134 | .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, | |
135 | .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, | |
136 | .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, | |
137 | .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, | |
138 | .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, | |
139 | .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, | |
140 | .echo_cmdid = WMI_ECHO_CMDID, | |
141 | .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, | |
142 | .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, | |
143 | .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, | |
144 | .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, | |
145 | .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, | |
146 | .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, | |
147 | .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, | |
148 | .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, | |
149 | .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 150 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
772b4aee RM |
151 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
152 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
153 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
154 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
155 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
156 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
157 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
158 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
159 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
160 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
161 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
162 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
163 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
164 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
165 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
166 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
167 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
168 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
169 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
170 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
171 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
172 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
173 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
174 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
175 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
176 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
177 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
178 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
179 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
180 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
181 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
182 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
183 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
184 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
185 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
186 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
187 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
188 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
189 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
190 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
191 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
192 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
ce42870e BM |
193 | }; |
194 | ||
b7e3adf9 BM |
195 | /* 10.X WMI cmd track */ |
196 | static struct wmi_cmd_map wmi_10x_cmd_map = { | |
197 | .init_cmdid = WMI_10X_INIT_CMDID, | |
198 | .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, | |
199 | .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, | |
200 | .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, | |
34957b25 | 201 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
202 | .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, |
203 | .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, | |
204 | .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, | |
205 | .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, | |
206 | .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, | |
207 | .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, | |
208 | .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, | |
209 | .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, | |
210 | .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, | |
211 | .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, | |
212 | .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
213 | .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, | |
214 | .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, | |
215 | .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, | |
216 | .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, | |
217 | .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, | |
218 | .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, | |
219 | .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, | |
220 | .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, | |
221 | .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, | |
222 | .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, | |
223 | .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, | |
224 | .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, | |
225 | .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, | |
226 | .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, | |
227 | .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, | |
228 | .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, | |
229 | .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, | |
230 | .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, | |
231 | .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, | |
232 | .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, | |
233 | .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, | |
34957b25 | 234 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
235 | .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, |
236 | .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, | |
237 | .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, | |
34957b25 | 238 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
239 | .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, |
240 | .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, | |
241 | .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, | |
242 | .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, | |
243 | .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, | |
244 | .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, | |
245 | .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, | |
246 | .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, | |
247 | .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, | |
248 | .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, | |
249 | .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, | |
250 | .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, | |
251 | .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, | |
252 | .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, | |
253 | .roam_scan_rssi_change_threshold = | |
254 | WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
255 | .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, | |
256 | .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, | |
257 | .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, | |
258 | .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, | |
259 | .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, | |
260 | .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, | |
261 | .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, | |
262 | .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, | |
34957b25 | 263 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, |
542fb174 | 264 | .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, |
34957b25 | 265 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
266 | .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, |
267 | .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, | |
268 | .wlan_profile_set_hist_intvl_cmdid = | |
269 | WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
270 | .wlan_profile_get_profile_data_cmdid = | |
271 | WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
272 | .wlan_profile_enable_profile_id_cmdid = | |
273 | WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
274 | .wlan_profile_list_profile_id_cmdid = | |
275 | WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
276 | .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, | |
277 | .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, | |
278 | .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, | |
279 | .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, | |
280 | .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, | |
281 | .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, | |
282 | .wow_enable_disable_wake_event_cmdid = | |
283 | WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
284 | .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, | |
285 | .wow_hostwakeup_from_sleep_cmdid = | |
286 | WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
287 | .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, | |
288 | .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, | |
289 | .vdev_spectral_scan_configure_cmdid = | |
290 | WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
291 | .vdev_spectral_scan_enable_cmdid = | |
292 | WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
293 | .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, | |
34957b25 BM |
294 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, |
295 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
296 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
297 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
298 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
299 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
300 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
301 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
302 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
303 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
304 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
b7e3adf9 BM |
305 | .echo_cmdid = WMI_10X_ECHO_CMDID, |
306 | .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, | |
307 | .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, | |
308 | .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, | |
34957b25 BM |
309 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, |
310 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
311 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
312 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
b7e3adf9 BM |
313 | .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, |
314 | .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 315 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
772b4aee RM |
316 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
317 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
318 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
319 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
320 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
321 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
322 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
323 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
324 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
325 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
326 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
327 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
328 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
329 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
330 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
331 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
332 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
333 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
334 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
335 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
336 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
337 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
338 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
339 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
340 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
341 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
342 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
343 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
344 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
345 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
346 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
347 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
348 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
349 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
350 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
351 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
352 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
353 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
354 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
355 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
356 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
357 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
b7e3adf9 | 358 | }; |
ce42870e | 359 | |
4a16fbec RM |
360 | /* 10.2.4 WMI cmd track */ |
361 | static struct wmi_cmd_map wmi_10_2_4_cmd_map = { | |
362 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
363 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
364 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
365 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
366 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
367 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
368 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
369 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
370 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
371 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
372 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
373 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
374 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
375 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
376 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
377 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
378 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
379 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
380 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
381 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
382 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
383 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
384 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
385 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
386 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
387 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
388 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
389 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
390 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
391 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
392 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
393 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
394 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
395 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
396 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
397 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
398 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
399 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
400 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
401 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
402 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
403 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
404 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
405 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
406 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
407 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
408 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
409 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
410 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
411 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
412 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
413 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
414 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
415 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
416 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
417 | .roam_scan_rssi_change_threshold = | |
418 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
419 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
420 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
421 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
422 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
423 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
424 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
425 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
426 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
427 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
428 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
429 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
430 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
431 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
432 | .wlan_profile_set_hist_intvl_cmdid = | |
433 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
434 | .wlan_profile_get_profile_data_cmdid = | |
435 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
436 | .wlan_profile_enable_profile_id_cmdid = | |
437 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
438 | .wlan_profile_list_profile_id_cmdid = | |
439 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
440 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
441 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
442 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
443 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
444 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
445 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
446 | .wow_enable_disable_wake_event_cmdid = | |
447 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
448 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
449 | .wow_hostwakeup_from_sleep_cmdid = | |
450 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
451 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
452 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
453 | .vdev_spectral_scan_configure_cmdid = | |
454 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
455 | .vdev_spectral_scan_enable_cmdid = | |
456 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
457 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
458 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
459 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
460 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
461 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
462 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
463 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
464 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
465 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
466 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
467 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
468 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
469 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
470 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
471 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
472 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
473 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
474 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
475 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
476 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
477 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
478 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 479 | .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, |
772b4aee RM |
480 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
481 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
482 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
483 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
484 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
485 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
486 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
487 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
488 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
489 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
490 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
491 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
492 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
493 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
494 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
495 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
496 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
497 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
498 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
499 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
500 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
501 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
502 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
503 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
504 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
505 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
506 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
507 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
508 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
509 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
510 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
511 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
512 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
513 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
514 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
515 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
516 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
517 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
518 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
519 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
520 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
521 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
4a16fbec RM |
522 | }; |
523 | ||
2d491e69 RM |
524 | /* 10.4 WMI cmd track */ |
525 | static struct wmi_cmd_map wmi_10_4_cmd_map = { | |
526 | .init_cmdid = WMI_10_4_INIT_CMDID, | |
527 | .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID, | |
528 | .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID, | |
529 | .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID, | |
530 | .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, | |
531 | .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, | |
532 | .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID, | |
533 | .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID, | |
534 | .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, | |
535 | .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, | |
536 | .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, | |
537 | .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, | |
538 | .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, | |
539 | .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, | |
540 | .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, | |
541 | .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
542 | .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, | |
543 | .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, | |
544 | .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID, | |
545 | .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID, | |
546 | .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID, | |
547 | .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID, | |
548 | .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID, | |
549 | .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID, | |
550 | .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID, | |
551 | .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID, | |
552 | .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID, | |
553 | .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID, | |
554 | .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID, | |
555 | .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID, | |
556 | .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID, | |
557 | .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID, | |
558 | .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, | |
559 | .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, | |
560 | .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID, | |
561 | .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID, | |
562 | .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID, | |
563 | .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID, | |
564 | .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID, | |
565 | .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID, | |
566 | .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID, | |
567 | .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID, | |
568 | .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID, | |
569 | .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID, | |
570 | .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID, | |
571 | .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID, | |
572 | .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID, | |
573 | .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID, | |
574 | .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID, | |
575 | .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID, | |
576 | .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID, | |
577 | .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID, | |
578 | .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID, | |
579 | .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE, | |
580 | .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, | |
581 | .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD, | |
582 | .roam_scan_rssi_change_threshold = | |
583 | WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
584 | .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE, | |
585 | .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, | |
586 | .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, | |
587 | .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD, | |
588 | .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO, | |
589 | .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, | |
590 | .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE, | |
591 | .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, | |
592 | .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, | |
593 | .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID, | |
594 | .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, | |
595 | .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, | |
596 | .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, | |
597 | .wlan_profile_set_hist_intvl_cmdid = | |
598 | WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
599 | .wlan_profile_get_profile_data_cmdid = | |
600 | WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
601 | .wlan_profile_enable_profile_id_cmdid = | |
602 | WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
603 | .wlan_profile_list_profile_id_cmdid = | |
604 | WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
605 | .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID, | |
606 | .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID, | |
607 | .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID, | |
608 | .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID, | |
609 | .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, | |
610 | .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, | |
611 | .wow_enable_disable_wake_event_cmdid = | |
612 | WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
613 | .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID, | |
614 | .wow_hostwakeup_from_sleep_cmdid = | |
615 | WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
616 | .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID, | |
617 | .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID, | |
618 | .vdev_spectral_scan_configure_cmdid = | |
619 | WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
620 | .vdev_spectral_scan_enable_cmdid = | |
621 | WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
622 | .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID, | |
623 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
624 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
625 | .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID, | |
626 | .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, | |
627 | .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
628 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
629 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
630 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
631 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
632 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
633 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
634 | .echo_cmdid = WMI_10_4_ECHO_CMDID, | |
635 | .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID, | |
636 | .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID, | |
637 | .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID, | |
638 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
639 | .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, | |
640 | .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, | |
641 | .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID, | |
642 | .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID, | |
643 | .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID, | |
644 | .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, | |
645 | .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED, | |
646 | .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED, | |
647 | .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED, | |
648 | .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED, | |
649 | .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, | |
650 | .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, | |
651 | .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, | |
652 | .wlan_peer_caching_add_peer_cmdid = | |
653 | WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, | |
654 | .wlan_peer_caching_evict_peer_cmdid = | |
655 | WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, | |
656 | .wlan_peer_caching_restore_peer_cmdid = | |
657 | WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, | |
658 | .wlan_peer_caching_print_all_peers_info_cmdid = | |
659 | WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, | |
660 | .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, | |
661 | .peer_add_proxy_sta_entry_cmdid = | |
662 | WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, | |
663 | .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID, | |
664 | .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID, | |
665 | .nan_cmdid = WMI_10_4_NAN_CMDID, | |
666 | .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID, | |
667 | .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID, | |
668 | .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, | |
669 | .pdev_smart_ant_set_rx_antenna_cmdid = | |
670 | WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, | |
671 | .peer_smart_ant_set_tx_antenna_cmdid = | |
672 | WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, | |
673 | .peer_smart_ant_set_train_info_cmdid = | |
674 | WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, | |
675 | .peer_smart_ant_set_node_config_ops_cmdid = | |
676 | WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, | |
677 | .pdev_set_antenna_switch_table_cmdid = | |
678 | WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, | |
679 | .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, | |
680 | .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, | |
681 | .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, | |
682 | .pdev_ratepwr_chainmsk_table_cmdid = | |
683 | WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, | |
684 | .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID, | |
685 | .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID, | |
686 | .fwtest_cmdid = WMI_10_4_FWTEST_CMDID, | |
687 | .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID, | |
688 | .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID, | |
689 | .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, | |
690 | .pdev_get_ani_ofdm_config_cmdid = | |
691 | WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, | |
692 | .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, | |
693 | .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, | |
694 | .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID, | |
695 | .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID, | |
696 | .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, | |
697 | .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID, | |
698 | .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID, | |
699 | .vdev_filter_neighbor_rx_packets_cmdid = | |
700 | WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, | |
701 | .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID, | |
702 | .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID, | |
703 | .pdev_bss_chan_info_request_cmdid = | |
704 | WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, | |
705 | }; | |
706 | ||
6d1506e7 BM |
707 | /* MAIN WMI VDEV param map */ |
708 | static struct wmi_vdev_param_map wmi_vdev_param_map = { | |
709 | .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, | |
710 | .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
711 | .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, | |
712 | .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, | |
713 | .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, | |
714 | .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, | |
715 | .slot_time = WMI_VDEV_PARAM_SLOT_TIME, | |
716 | .preamble = WMI_VDEV_PARAM_PREAMBLE, | |
717 | .swba_time = WMI_VDEV_PARAM_SWBA_TIME, | |
718 | .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, | |
719 | .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, | |
720 | .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, | |
721 | .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, | |
722 | .wmi_vdev_oc_scheduler_air_time_limit = | |
723 | WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
724 | .wds = WMI_VDEV_PARAM_WDS, | |
725 | .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, | |
726 | .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, | |
727 | .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, | |
728 | .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, | |
729 | .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, | |
730 | .chwidth = WMI_VDEV_PARAM_CHWIDTH, | |
731 | .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, | |
732 | .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, | |
733 | .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, | |
734 | .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, | |
735 | .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, | |
736 | .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, | |
737 | .sgi = WMI_VDEV_PARAM_SGI, | |
738 | .ldpc = WMI_VDEV_PARAM_LDPC, | |
739 | .tx_stbc = WMI_VDEV_PARAM_TX_STBC, | |
740 | .rx_stbc = WMI_VDEV_PARAM_RX_STBC, | |
741 | .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, | |
742 | .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, | |
743 | .nss = WMI_VDEV_PARAM_NSS, | |
744 | .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, | |
745 | .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, | |
746 | .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, | |
747 | .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, | |
748 | .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
749 | .ap_keepalive_min_idle_inactive_time_secs = | |
750 | WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
751 | .ap_keepalive_max_idle_inactive_time_secs = | |
752 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
753 | .ap_keepalive_max_unresponsive_time_secs = | |
754 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
755 | .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, | |
756 | .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
757 | .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, | |
758 | .txbf = WMI_VDEV_PARAM_TXBF, | |
759 | .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, | |
760 | .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, | |
761 | .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, | |
762 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
763 | WMI_VDEV_PARAM_UNSUPPORTED, | |
93841a15 RM |
764 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
765 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
766 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
767 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
768 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
769 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
770 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
771 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
772 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
773 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
774 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
775 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
776 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
777 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
778 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
779 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
6d1506e7 BM |
780 | }; |
781 | ||
782 | /* 10.X WMI VDEV param map */ | |
783 | static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { | |
784 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
785 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
786 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
787 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
788 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
789 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
790 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
791 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
792 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
793 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
794 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
795 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
796 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
797 | .wmi_vdev_oc_scheduler_air_time_limit = | |
798 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
799 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
800 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
801 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
802 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
803 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
804 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
805 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
806 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
807 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
808 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
809 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
810 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
811 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
812 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
813 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
814 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
815 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
816 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
817 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
818 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
819 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
820 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
821 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
822 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
823 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
824 | .ap_keepalive_min_idle_inactive_time_secs = | |
825 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
826 | .ap_keepalive_max_idle_inactive_time_secs = | |
827 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
828 | .ap_keepalive_max_unresponsive_time_secs = | |
829 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
830 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
831 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
832 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
833 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
834 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
835 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
836 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
837 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
838 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
93841a15 RM |
839 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
840 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
841 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
842 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
843 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
844 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
845 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
846 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
847 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
848 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
849 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
850 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
851 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
852 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
853 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
854 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
6d1506e7 BM |
855 | }; |
856 | ||
4a16fbec RM |
857 | static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { |
858 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
859 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
860 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
861 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
862 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
863 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
864 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
865 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
866 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
867 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
868 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
869 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
870 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
871 | .wmi_vdev_oc_scheduler_air_time_limit = | |
872 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
873 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
874 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
875 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
876 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
877 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
878 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
879 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
880 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
881 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
882 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
883 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
884 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
885 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
886 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
887 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
888 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
889 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
890 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
891 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
892 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
893 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
894 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
895 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
896 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
897 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
898 | .ap_keepalive_min_idle_inactive_time_secs = | |
899 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
900 | .ap_keepalive_max_idle_inactive_time_secs = | |
901 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
902 | .ap_keepalive_max_unresponsive_time_secs = | |
903 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
904 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
905 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
906 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
907 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
908 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
909 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
910 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
911 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
912 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
93841a15 RM |
913 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
914 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
915 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
916 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
917 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
918 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
919 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
920 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
921 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
922 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
923 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
924 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
925 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
926 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
927 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
928 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
929 | }; | |
930 | ||
931 | static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = { | |
932 | .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD, | |
933 | .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
934 | .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, | |
935 | .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, | |
936 | .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE, | |
937 | .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, | |
938 | .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME, | |
939 | .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE, | |
940 | .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME, | |
941 | .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD, | |
942 | .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, | |
943 | .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL, | |
944 | .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD, | |
945 | .wmi_vdev_oc_scheduler_air_time_limit = | |
946 | WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
947 | .wds = WMI_10_4_VDEV_PARAM_WDS, | |
948 | .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW, | |
949 | .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, | |
950 | .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, | |
951 | .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, | |
952 | .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM, | |
953 | .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH, | |
954 | .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET, | |
955 | .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, | |
956 | .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, | |
957 | .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE, | |
958 | .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE, | |
959 | .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE, | |
960 | .sgi = WMI_10_4_VDEV_PARAM_SGI, | |
961 | .ldpc = WMI_10_4_VDEV_PARAM_LDPC, | |
962 | .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC, | |
963 | .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC, | |
964 | .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, | |
965 | .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID, | |
966 | .nss = WMI_10_4_VDEV_PARAM_NSS, | |
967 | .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, | |
968 | .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, | |
969 | .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE, | |
970 | .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE, | |
971 | .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
972 | .ap_keepalive_min_idle_inactive_time_secs = | |
973 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
974 | .ap_keepalive_max_idle_inactive_time_secs = | |
975 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
976 | .ap_keepalive_max_unresponsive_time_secs = | |
977 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
978 | .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, | |
979 | .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, | |
980 | .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, | |
981 | .txbf = WMI_10_4_VDEV_PARAM_TXBF, | |
982 | .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, | |
983 | .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY, | |
984 | .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, | |
985 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
986 | WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
987 | .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, | |
988 | .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, | |
989 | .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET, | |
990 | .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, | |
991 | .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK, | |
992 | .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, | |
993 | .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, | |
994 | .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, | |
995 | .early_rx_bmiss_sample_cycle = | |
996 | WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, | |
997 | .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, | |
998 | .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, | |
999 | .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, | |
1000 | .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA, | |
1001 | .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC, | |
1002 | .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, | |
1003 | .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, | |
4a16fbec RM |
1004 | }; |
1005 | ||
226a339b BM |
1006 | static struct wmi_pdev_param_map wmi_pdev_param_map = { |
1007 | .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, | |
1008 | .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, | |
1009 | .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1010 | .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1011 | .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, | |
1012 | .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, | |
1013 | .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, | |
1014 | .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1015 | .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, | |
1016 | .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, | |
1017 | .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1018 | .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1019 | .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, | |
1020 | .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1021 | .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, | |
1022 | .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1023 | .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1024 | .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1025 | .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1026 | .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1027 | .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1028 | .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1029 | .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1030 | .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, | |
1031 | .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, | |
1032 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
1033 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
1034 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
1035 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
1036 | .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1037 | .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1038 | .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1039 | .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1040 | .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, | |
1041 | .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, | |
226a339b BM |
1042 | .dcs = WMI_PDEV_PARAM_DCS, |
1043 | .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, | |
1044 | .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, | |
1045 | .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1046 | .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1047 | .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, | |
1048 | .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, | |
1049 | .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, | |
1050 | .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, | |
1051 | .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, | |
1052 | .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1053 | .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, | |
1054 | .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
a7bd3e99 | 1055 | .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, |
d86561ff RM |
1056 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
1057 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1058 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
1059 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1060 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1061 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
1062 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
1063 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1064 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1065 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1066 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1067 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1068 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1069 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1070 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
1071 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1072 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1073 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1074 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1075 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1076 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1077 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
1078 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
1079 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
1080 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1081 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1082 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
1083 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
1084 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
1085 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
1086 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
1087 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
1088 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1089 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1090 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1091 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1092 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1093 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
1094 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1095 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1096 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
1097 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
226a339b BM |
1098 | }; |
1099 | ||
1100 | static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { | |
1101 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
1102 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
1103 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1104 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1105 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
1106 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
1107 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
1108 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1109 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
1110 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
1111 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1112 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1113 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
1114 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1115 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
1116 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1117 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1118 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1119 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1120 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1121 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1122 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1123 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1124 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
1125 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
1126 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
1127 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
1128 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
1129 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
1130 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1131 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1132 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1133 | .bcnflt_stats_update_period = | |
1134 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1135 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
ab6258ed | 1136 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, |
226a339b BM |
1137 | .dcs = WMI_10X_PDEV_PARAM_DCS, |
1138 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
1139 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
1140 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1141 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1142 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
1143 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
1144 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
1145 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
1146 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
1147 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
1148 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
1149 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
a7bd3e99 | 1150 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, |
d86561ff RM |
1151 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
1152 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1153 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
1154 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1155 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1156 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
1157 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
1158 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1159 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1160 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1161 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1162 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1163 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1164 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1165 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
1166 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1167 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1168 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1169 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1170 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1171 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1172 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
1173 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
1174 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
1175 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1176 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1177 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
1178 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
1179 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
1180 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
1181 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
1182 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
1183 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1184 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1185 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1186 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1187 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1188 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
1189 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1190 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1191 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
1192 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
226a339b BM |
1193 | }; |
1194 | ||
4a16fbec RM |
1195 | static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { |
1196 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
1197 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
1198 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1199 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1200 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
1201 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
1202 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
1203 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1204 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
1205 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
1206 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1207 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1208 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
1209 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1210 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
1211 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1212 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1213 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1214 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1215 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1216 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1217 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1218 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1219 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
1220 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
1221 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
1222 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
1223 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
1224 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
1225 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1226 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1227 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1228 | .bcnflt_stats_update_period = | |
1229 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1230 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
1231 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, | |
1232 | .dcs = WMI_10X_PDEV_PARAM_DCS, | |
1233 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
1234 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
1235 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1236 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1237 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
1238 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
1239 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
1240 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
1241 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
1242 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
1243 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
1244 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
1245 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, | |
d86561ff RM |
1246 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
1247 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1248 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
1249 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1250 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1251 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
1252 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
1253 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1254 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1255 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1256 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1257 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1258 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1259 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1260 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
1261 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1262 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1263 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1264 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1265 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1266 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1267 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
1268 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
1269 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
1270 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1271 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1272 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
1273 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
1274 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
1275 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
1276 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
1277 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
1278 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1279 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1280 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1281 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1282 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1283 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
1284 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1285 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1286 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
1287 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
4a16fbec RM |
1288 | }; |
1289 | ||
24c88f78 MK |
1290 | /* firmware 10.2 specific mappings */ |
1291 | static struct wmi_cmd_map wmi_10_2_cmd_map = { | |
1292 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
1293 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
1294 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
1295 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
1296 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
1297 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
1298 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
1299 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
1300 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
1301 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
1302 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
1303 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
1304 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
1305 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
1306 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
1307 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
1308 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
1309 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
1310 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
1311 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
1312 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
1313 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
1314 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
1315 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
1316 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
1317 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
1318 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
1319 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
1320 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
1321 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
1322 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
1323 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
1324 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
1325 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
1326 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
1327 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
1328 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
1329 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
1330 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
1331 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
1332 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
1333 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
1334 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
1335 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
1336 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
1337 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
1338 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
1339 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
1340 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
1341 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
1342 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
1343 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
1344 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
1345 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
1346 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
1347 | .roam_scan_rssi_change_threshold = | |
1348 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
1349 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
1350 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
1351 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
1352 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
1353 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
1354 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
1355 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
1356 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
1357 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
1358 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
1359 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
1360 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
1361 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
1362 | .wlan_profile_set_hist_intvl_cmdid = | |
1363 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
1364 | .wlan_profile_get_profile_data_cmdid = | |
1365 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
1366 | .wlan_profile_enable_profile_id_cmdid = | |
1367 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
1368 | .wlan_profile_list_profile_id_cmdid = | |
1369 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
1370 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
1371 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
1372 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
1373 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
1374 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
1375 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
1376 | .wow_enable_disable_wake_event_cmdid = | |
1377 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
1378 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
1379 | .wow_hostwakeup_from_sleep_cmdid = | |
1380 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
1381 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
1382 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
1383 | .vdev_spectral_scan_configure_cmdid = | |
1384 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
1385 | .vdev_spectral_scan_enable_cmdid = | |
1386 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
1387 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
1388 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
1389 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
1390 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
1391 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
1392 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
1393 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
1394 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
1395 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
1396 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
1397 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
1398 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
1399 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
1400 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
1401 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
1402 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
1403 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
1404 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
1405 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
1406 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
1407 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
1408 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 1409 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
772b4aee RM |
1410 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
1411 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
1412 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
1413 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
1414 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
1415 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
1416 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
1417 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
1418 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
1419 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
1420 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
1421 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
1422 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
1423 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
1424 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
1425 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
1426 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
1427 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
1428 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
1429 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1430 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1431 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1432 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1433 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1434 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
1435 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
1436 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
1437 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
1438 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
1439 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
1440 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
1441 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
24c88f78 MK |
1442 | }; |
1443 | ||
d86561ff RM |
1444 | static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = { |
1445 | .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK, | |
1446 | .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, | |
1447 | .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1448 | .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1449 | .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, | |
1450 | .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, | |
1451 | .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, | |
1452 | .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1453 | .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE, | |
1454 | .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW, | |
1455 | .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1456 | .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1457 | .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, | |
1458 | .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1459 | .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE, | |
1460 | .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1461 | .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1462 | .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1463 | .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1464 | .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1465 | .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1466 | .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1467 | .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1468 | .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE, | |
1469 | .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, | |
1470 | .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
1471 | .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, | |
1472 | .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
1473 | .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
1474 | .pdev_stats_update_period = | |
1475 | WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1476 | .vdev_stats_update_period = | |
1477 | WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1478 | .peer_stats_update_period = | |
1479 | WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1480 | .bcnflt_stats_update_period = | |
1481 | WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1482 | .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS, | |
1483 | .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, | |
1484 | .dcs = WMI_10_4_PDEV_PARAM_DCS, | |
1485 | .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE, | |
1486 | .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, | |
1487 | .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1488 | .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1489 | .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, | |
1490 | .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN, | |
1491 | .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA, | |
1492 | .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, | |
1493 | .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, | |
1494 | .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, | |
1495 | .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR, | |
1496 | .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE, | |
1497 | .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD, | |
1498 | .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST, | |
1499 | .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, | |
1500 | .smart_antenna_default_antenna = | |
1501 | WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, | |
1502 | .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, | |
1503 | .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID, | |
1504 | .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, | |
1505 | .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER, | |
1506 | .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, | |
1507 | .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, | |
1508 | .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, | |
1509 | .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, | |
1510 | .remove_mcast2ucast_buffer = | |
1511 | WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, | |
1512 | .peer_sta_ps_statechg_enable = | |
1513 | WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, | |
1514 | .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, | |
1515 | .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, | |
1516 | .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, | |
1517 | .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, | |
1518 | .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, | |
1519 | .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, | |
1520 | .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, | |
1521 | .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, | |
1522 | .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS, | |
1523 | .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, | |
1524 | .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION, | |
1525 | .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, | |
1526 | .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE, | |
1527 | .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, | |
1528 | .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, | |
1529 | .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, | |
1530 | .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN, | |
1531 | .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, | |
1532 | .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, | |
1533 | .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, | |
1534 | .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, | |
1535 | .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, | |
1536 | .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, | |
1537 | .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, | |
1538 | .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, | |
1539 | .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET, | |
1540 | .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, | |
1541 | .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR, | |
1542 | .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR, | |
1543 | }; | |
1544 | ||
0226d602 MK |
1545 | void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, |
1546 | const struct wmi_channel_arg *arg) | |
2d66721c MK |
1547 | { |
1548 | u32 flags = 0; | |
1549 | ||
1550 | memset(ch, 0, sizeof(*ch)); | |
1551 | ||
1552 | if (arg->passive) | |
1553 | flags |= WMI_CHAN_FLAG_PASSIVE; | |
1554 | if (arg->allow_ibss) | |
1555 | flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; | |
1556 | if (arg->allow_ht) | |
1557 | flags |= WMI_CHAN_FLAG_ALLOW_HT; | |
1558 | if (arg->allow_vht) | |
1559 | flags |= WMI_CHAN_FLAG_ALLOW_VHT; | |
1560 | if (arg->ht40plus) | |
1561 | flags |= WMI_CHAN_FLAG_HT40_PLUS; | |
1562 | if (arg->chan_radar) | |
1563 | flags |= WMI_CHAN_FLAG_DFS; | |
1564 | ||
1565 | ch->mhz = __cpu_to_le32(arg->freq); | |
1566 | ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); | |
1567 | ch->band_center_freq2 = 0; | |
1568 | ch->min_power = arg->min_power; | |
1569 | ch->max_power = arg->max_power; | |
1570 | ch->reg_power = arg->max_reg_power; | |
1571 | ch->antenna_max = arg->max_antenna_gain; | |
1572 | ||
1573 | /* mode & flags share storage */ | |
1574 | ch->mode = arg->mode; | |
1575 | ch->flags |= __cpu_to_le32(flags); | |
1576 | } | |
1577 | ||
5e3dd157 KV |
1578 | int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) |
1579 | { | |
9eea5689 | 1580 | unsigned long time_left; |
af762c0b | 1581 | |
9eea5689 NMG |
1582 | time_left = wait_for_completion_timeout(&ar->wmi.service_ready, |
1583 | WMI_SERVICE_READY_TIMEOUT_HZ); | |
1584 | if (!time_left) | |
1585 | return -ETIMEDOUT; | |
1586 | return 0; | |
5e3dd157 KV |
1587 | } |
1588 | ||
1589 | int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) | |
1590 | { | |
9eea5689 | 1591 | unsigned long time_left; |
af762c0b | 1592 | |
9eea5689 NMG |
1593 | time_left = wait_for_completion_timeout(&ar->wmi.unified_ready, |
1594 | WMI_UNIFIED_READY_TIMEOUT_HZ); | |
1595 | if (!time_left) | |
1596 | return -ETIMEDOUT; | |
1597 | return 0; | |
5e3dd157 KV |
1598 | } |
1599 | ||
666a73f3 | 1600 | struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) |
5e3dd157 KV |
1601 | { |
1602 | struct sk_buff *skb; | |
1603 | u32 round_len = roundup(len, 4); | |
1604 | ||
7aa7a72a | 1605 | skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); |
5e3dd157 KV |
1606 | if (!skb) |
1607 | return NULL; | |
1608 | ||
1609 | skb_reserve(skb, WMI_SKB_HEADROOM); | |
1610 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) | |
7aa7a72a | 1611 | ath10k_warn(ar, "Unaligned WMI skb\n"); |
5e3dd157 KV |
1612 | |
1613 | skb_put(skb, round_len); | |
1614 | memset(skb->data, 0, round_len); | |
1615 | ||
1616 | return skb; | |
1617 | } | |
1618 | ||
1619 | static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) | |
1620 | { | |
1621 | dev_kfree_skb(skb); | |
5e3dd157 KV |
1622 | } |
1623 | ||
d7579d12 MK |
1624 | int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, |
1625 | u32 cmd_id) | |
5e3dd157 KV |
1626 | { |
1627 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); | |
1628 | struct wmi_cmd_hdr *cmd_hdr; | |
be8b3943 | 1629 | int ret; |
5e3dd157 KV |
1630 | u32 cmd = 0; |
1631 | ||
1632 | if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
1633 | return -ENOMEM; | |
1634 | ||
1635 | cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); | |
1636 | ||
1637 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
1638 | cmd_hdr->cmd_id = __cpu_to_le32(cmd); | |
1639 | ||
5e3dd157 | 1640 | memset(skb_cb, 0, sizeof(*skb_cb)); |
be8b3943 | 1641 | ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); |
d35a6c18 | 1642 | trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret); |
5e3dd157 | 1643 | |
be8b3943 MK |
1644 | if (ret) |
1645 | goto err_pull; | |
5e3dd157 | 1646 | |
be8b3943 MK |
1647 | return 0; |
1648 | ||
1649 | err_pull: | |
1650 | skb_pull(skb, sizeof(struct wmi_cmd_hdr)); | |
1651 | return ret; | |
1652 | } | |
1653 | ||
ed54388a MK |
1654 | static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) |
1655 | { | |
af21319f | 1656 | struct ath10k *ar = arvif->ar; |
9ad50182 | 1657 | struct ath10k_skb_cb *cb; |
af21319f | 1658 | struct sk_buff *bcn; |
ed54388a MK |
1659 | int ret; |
1660 | ||
af21319f | 1661 | spin_lock_bh(&ar->data_lock); |
ed54388a | 1662 | |
af21319f | 1663 | bcn = arvif->beacon; |
ed54388a | 1664 | |
af21319f MK |
1665 | if (!bcn) |
1666 | goto unlock; | |
ed54388a | 1667 | |
9ad50182 | 1668 | cb = ATH10K_SKB_CB(bcn); |
ed54388a | 1669 | |
af21319f MK |
1670 | switch (arvif->beacon_state) { |
1671 | case ATH10K_BEACON_SENDING: | |
1672 | case ATH10K_BEACON_SENT: | |
1673 | break; | |
1674 | case ATH10K_BEACON_SCHEDULED: | |
1675 | arvif->beacon_state = ATH10K_BEACON_SENDING; | |
1676 | spin_unlock_bh(&ar->data_lock); | |
1677 | ||
1678 | ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, | |
1679 | arvif->vdev_id, | |
1680 | bcn->data, bcn->len, | |
1681 | cb->paddr, | |
1682 | cb->bcn.dtim_zero, | |
1683 | cb->bcn.deliver_cab); | |
1684 | ||
1685 | spin_lock_bh(&ar->data_lock); | |
1686 | ||
1687 | if (ret == 0) | |
1688 | arvif->beacon_state = ATH10K_BEACON_SENT; | |
1689 | else | |
1690 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; | |
1691 | } | |
ed54388a | 1692 | |
af21319f MK |
1693 | unlock: |
1694 | spin_unlock_bh(&ar->data_lock); | |
ed54388a MK |
1695 | } |
1696 | ||
1697 | static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, | |
1698 | struct ieee80211_vif *vif) | |
1699 | { | |
1700 | struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif); | |
1701 | ||
1702 | ath10k_wmi_tx_beacon_nowait(arvif); | |
1703 | } | |
1704 | ||
1705 | static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) | |
1706 | { | |
ed54388a MK |
1707 | ieee80211_iterate_active_interfaces_atomic(ar->hw, |
1708 | IEEE80211_IFACE_ITER_NORMAL, | |
1709 | ath10k_wmi_tx_beacons_iter, | |
1710 | NULL); | |
ed54388a MK |
1711 | } |
1712 | ||
12acbc43 | 1713 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) |
be8b3943 | 1714 | { |
ed54388a MK |
1715 | /* try to send pending beacons first. they take priority */ |
1716 | ath10k_wmi_tx_beacons_nowait(ar); | |
1717 | ||
be8b3943 MK |
1718 | wake_up(&ar->wmi.tx_credits_wq); |
1719 | } | |
1720 | ||
666a73f3 | 1721 | int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) |
be8b3943 | 1722 | { |
34957b25 | 1723 | int ret = -EOPNOTSUPP; |
be8b3943 | 1724 | |
56b84287 KV |
1725 | might_sleep(); |
1726 | ||
34957b25 | 1727 | if (cmd_id == WMI_CMD_UNSUPPORTED) { |
7aa7a72a | 1728 | ath10k_warn(ar, "wmi command %d is not supported by firmware\n", |
55321559 BM |
1729 | cmd_id); |
1730 | return ret; | |
1731 | } | |
be8b3943 MK |
1732 | |
1733 | wait_event_timeout(ar->wmi.tx_credits_wq, ({ | |
ed54388a MK |
1734 | /* try to send pending beacons first. they take priority */ |
1735 | ath10k_wmi_tx_beacons_nowait(ar); | |
1736 | ||
be8b3943 | 1737 | ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); |
7962b0d8 MK |
1738 | |
1739 | if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) | |
1740 | ret = -ESHUTDOWN; | |
1741 | ||
be8b3943 MK |
1742 | (ret != -EAGAIN); |
1743 | }), 3*HZ); | |
1744 | ||
1745 | if (ret) | |
5e3dd157 | 1746 | dev_kfree_skb_any(skb); |
5e3dd157 | 1747 | |
be8b3943 | 1748 | return ret; |
5e3dd157 KV |
1749 | } |
1750 | ||
d7579d12 MK |
1751 | static struct sk_buff * |
1752 | ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) | |
5e00d31a | 1753 | { |
5e00d31a BM |
1754 | struct wmi_mgmt_tx_cmd *cmd; |
1755 | struct ieee80211_hdr *hdr; | |
d7579d12 | 1756 | struct sk_buff *skb; |
5e00d31a | 1757 | int len; |
d7579d12 | 1758 | u32 buf_len = msdu->len; |
5e00d31a BM |
1759 | u16 fc; |
1760 | ||
d7579d12 | 1761 | hdr = (struct ieee80211_hdr *)msdu->data; |
5e00d31a BM |
1762 | fc = le16_to_cpu(hdr->frame_control); |
1763 | ||
1764 | if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) | |
d7579d12 | 1765 | return ERR_PTR(-EINVAL); |
5e00d31a | 1766 | |
d7579d12 | 1767 | len = sizeof(cmd->hdr) + msdu->len; |
eeab266c MK |
1768 | |
1769 | if ((ieee80211_is_action(hdr->frame_control) || | |
1770 | ieee80211_is_deauth(hdr->frame_control) || | |
1771 | ieee80211_is_disassoc(hdr->frame_control)) && | |
1772 | ieee80211_has_protected(hdr->frame_control)) { | |
1773 | len += IEEE80211_CCMP_MIC_LEN; | |
1774 | buf_len += IEEE80211_CCMP_MIC_LEN; | |
1775 | } | |
1776 | ||
5e00d31a BM |
1777 | len = round_up(len, 4); |
1778 | ||
d7579d12 MK |
1779 | skb = ath10k_wmi_alloc_skb(ar, len); |
1780 | if (!skb) | |
1781 | return ERR_PTR(-ENOMEM); | |
5e00d31a | 1782 | |
d7579d12 | 1783 | cmd = (struct wmi_mgmt_tx_cmd *)skb->data; |
5e00d31a | 1784 | |
d7579d12 | 1785 | cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id); |
5e00d31a BM |
1786 | cmd->hdr.tx_rate = 0; |
1787 | cmd->hdr.tx_power = 0; | |
eeab266c | 1788 | cmd->hdr.buf_len = __cpu_to_le32(buf_len); |
5e00d31a | 1789 | |
b25f32cb | 1790 | ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); |
d7579d12 | 1791 | memcpy(cmd->buf, msdu->data, msdu->len); |
5e00d31a | 1792 | |
7aa7a72a | 1793 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", |
d7579d12 | 1794 | msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, |
5e00d31a | 1795 | fc & IEEE80211_FCTL_STYPE); |
5ce8e7fd RM |
1796 | trace_ath10k_tx_hdr(ar, skb->data, skb->len); |
1797 | trace_ath10k_tx_payload(ar, skb->data, skb->len); | |
5e00d31a | 1798 | |
d7579d12 | 1799 | return skb; |
5e00d31a BM |
1800 | } |
1801 | ||
5c81c7fd MK |
1802 | static void ath10k_wmi_event_scan_started(struct ath10k *ar) |
1803 | { | |
1804 | lockdep_assert_held(&ar->data_lock); | |
1805 | ||
1806 | switch (ar->scan.state) { | |
1807 | case ATH10K_SCAN_IDLE: | |
1808 | case ATH10K_SCAN_RUNNING: | |
1809 | case ATH10K_SCAN_ABORTING: | |
7aa7a72a | 1810 | ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1811 | ath10k_scan_state_str(ar->scan.state), |
1812 | ar->scan.state); | |
1813 | break; | |
1814 | case ATH10K_SCAN_STARTING: | |
1815 | ar->scan.state = ATH10K_SCAN_RUNNING; | |
1816 | ||
1817 | if (ar->scan.is_roc) | |
1818 | ieee80211_ready_on_channel(ar->hw); | |
1819 | ||
1820 | complete(&ar->scan.started); | |
1821 | break; | |
1822 | } | |
1823 | } | |
1824 | ||
2f9eec0b BG |
1825 | static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar) |
1826 | { | |
1827 | lockdep_assert_held(&ar->data_lock); | |
1828 | ||
1829 | switch (ar->scan.state) { | |
1830 | case ATH10K_SCAN_IDLE: | |
1831 | case ATH10K_SCAN_RUNNING: | |
1832 | case ATH10K_SCAN_ABORTING: | |
1833 | ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n", | |
1834 | ath10k_scan_state_str(ar->scan.state), | |
1835 | ar->scan.state); | |
1836 | break; | |
1837 | case ATH10K_SCAN_STARTING: | |
1838 | complete(&ar->scan.started); | |
1839 | __ath10k_scan_finish(ar); | |
1840 | break; | |
1841 | } | |
1842 | } | |
1843 | ||
5c81c7fd MK |
1844 | static void ath10k_wmi_event_scan_completed(struct ath10k *ar) |
1845 | { | |
1846 | lockdep_assert_held(&ar->data_lock); | |
1847 | ||
1848 | switch (ar->scan.state) { | |
1849 | case ATH10K_SCAN_IDLE: | |
1850 | case ATH10K_SCAN_STARTING: | |
1851 | /* One suspected reason scan can be completed while starting is | |
1852 | * if firmware fails to deliver all scan events to the host, | |
1853 | * e.g. when transport pipe is full. This has been observed | |
1854 | * with spectral scan phyerr events starving wmi transport | |
1855 | * pipe. In such case the "scan completed" event should be (and | |
1856 | * is) ignored by the host as it may be just firmware's scan | |
1857 | * state machine recovering. | |
1858 | */ | |
7aa7a72a | 1859 | ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1860 | ath10k_scan_state_str(ar->scan.state), |
1861 | ar->scan.state); | |
1862 | break; | |
1863 | case ATH10K_SCAN_RUNNING: | |
1864 | case ATH10K_SCAN_ABORTING: | |
1865 | __ath10k_scan_finish(ar); | |
1866 | break; | |
1867 | } | |
1868 | } | |
1869 | ||
1870 | static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) | |
1871 | { | |
1872 | lockdep_assert_held(&ar->data_lock); | |
1873 | ||
1874 | switch (ar->scan.state) { | |
1875 | case ATH10K_SCAN_IDLE: | |
1876 | case ATH10K_SCAN_STARTING: | |
7aa7a72a | 1877 | ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1878 | ath10k_scan_state_str(ar->scan.state), |
1879 | ar->scan.state); | |
1880 | break; | |
1881 | case ATH10K_SCAN_RUNNING: | |
1882 | case ATH10K_SCAN_ABORTING: | |
1883 | ar->scan_channel = NULL; | |
1884 | break; | |
1885 | } | |
1886 | } | |
1887 | ||
1888 | static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) | |
1889 | { | |
1890 | lockdep_assert_held(&ar->data_lock); | |
1891 | ||
1892 | switch (ar->scan.state) { | |
1893 | case ATH10K_SCAN_IDLE: | |
1894 | case ATH10K_SCAN_STARTING: | |
7aa7a72a | 1895 | ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1896 | ath10k_scan_state_str(ar->scan.state), |
1897 | ar->scan.state); | |
1898 | break; | |
1899 | case ATH10K_SCAN_RUNNING: | |
1900 | case ATH10K_SCAN_ABORTING: | |
1901 | ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); | |
1902 | ||
1903 | if (ar->scan.is_roc && ar->scan.roc_freq == freq) | |
1904 | complete(&ar->scan.on_channel); | |
1905 | break; | |
1906 | } | |
1907 | } | |
1908 | ||
9ff8b724 MK |
1909 | static const char * |
1910 | ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, | |
1911 | enum wmi_scan_completion_reason reason) | |
1912 | { | |
1913 | switch (type) { | |
1914 | case WMI_SCAN_EVENT_STARTED: | |
1915 | return "started"; | |
1916 | case WMI_SCAN_EVENT_COMPLETED: | |
1917 | switch (reason) { | |
1918 | case WMI_SCAN_REASON_COMPLETED: | |
1919 | return "completed"; | |
1920 | case WMI_SCAN_REASON_CANCELLED: | |
1921 | return "completed [cancelled]"; | |
1922 | case WMI_SCAN_REASON_PREEMPTED: | |
1923 | return "completed [preempted]"; | |
1924 | case WMI_SCAN_REASON_TIMEDOUT: | |
1925 | return "completed [timedout]"; | |
b2297baa RM |
1926 | case WMI_SCAN_REASON_INTERNAL_FAILURE: |
1927 | return "completed [internal err]"; | |
9ff8b724 MK |
1928 | case WMI_SCAN_REASON_MAX: |
1929 | break; | |
1930 | } | |
1931 | return "completed [unknown]"; | |
1932 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
1933 | return "bss channel"; | |
1934 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
1935 | return "foreign channel"; | |
1936 | case WMI_SCAN_EVENT_DEQUEUED: | |
1937 | return "dequeued"; | |
1938 | case WMI_SCAN_EVENT_PREEMPTED: | |
1939 | return "preempted"; | |
1940 | case WMI_SCAN_EVENT_START_FAILED: | |
1941 | return "start failed"; | |
b2297baa RM |
1942 | case WMI_SCAN_EVENT_RESTARTED: |
1943 | return "restarted"; | |
1944 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
1945 | return "foreign channel exit"; | |
9ff8b724 MK |
1946 | default: |
1947 | return "unknown"; | |
1948 | } | |
1949 | } | |
1950 | ||
d7579d12 MK |
1951 | static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, |
1952 | struct wmi_scan_ev_arg *arg) | |
32653cf1 MK |
1953 | { |
1954 | struct wmi_scan_event *ev = (void *)skb->data; | |
1955 | ||
1956 | if (skb->len < sizeof(*ev)) | |
1957 | return -EPROTO; | |
1958 | ||
1959 | skb_pull(skb, sizeof(*ev)); | |
1960 | arg->event_type = ev->event_type; | |
1961 | arg->reason = ev->reason; | |
1962 | arg->channel_freq = ev->channel_freq; | |
1963 | arg->scan_req_id = ev->scan_req_id; | |
1964 | arg->scan_id = ev->scan_id; | |
1965 | arg->vdev_id = ev->vdev_id; | |
1966 | ||
1967 | return 0; | |
1968 | } | |
1969 | ||
0226d602 | 1970 | int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 1971 | { |
32653cf1 | 1972 | struct wmi_scan_ev_arg arg = {}; |
5e3dd157 KV |
1973 | enum wmi_scan_event_type event_type; |
1974 | enum wmi_scan_completion_reason reason; | |
1975 | u32 freq; | |
1976 | u32 req_id; | |
1977 | u32 scan_id; | |
1978 | u32 vdev_id; | |
32653cf1 | 1979 | int ret; |
5e3dd157 | 1980 | |
d7579d12 | 1981 | ret = ath10k_wmi_pull_scan(ar, skb, &arg); |
32653cf1 MK |
1982 | if (ret) { |
1983 | ath10k_warn(ar, "failed to parse scan event: %d\n", ret); | |
1984 | return ret; | |
1985 | } | |
1986 | ||
1987 | event_type = __le32_to_cpu(arg.event_type); | |
1988 | reason = __le32_to_cpu(arg.reason); | |
1989 | freq = __le32_to_cpu(arg.channel_freq); | |
1990 | req_id = __le32_to_cpu(arg.scan_req_id); | |
1991 | scan_id = __le32_to_cpu(arg.scan_id); | |
1992 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
5e3dd157 | 1993 | |
5c81c7fd MK |
1994 | spin_lock_bh(&ar->data_lock); |
1995 | ||
7aa7a72a | 1996 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5c81c7fd | 1997 | "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", |
9ff8b724 | 1998 | ath10k_wmi_event_scan_type_str(event_type, reason), |
5c81c7fd MK |
1999 | event_type, reason, freq, req_id, scan_id, vdev_id, |
2000 | ath10k_scan_state_str(ar->scan.state), ar->scan.state); | |
5e3dd157 KV |
2001 | |
2002 | switch (event_type) { | |
2003 | case WMI_SCAN_EVENT_STARTED: | |
5c81c7fd | 2004 | ath10k_wmi_event_scan_started(ar); |
5e3dd157 KV |
2005 | break; |
2006 | case WMI_SCAN_EVENT_COMPLETED: | |
5c81c7fd | 2007 | ath10k_wmi_event_scan_completed(ar); |
5e3dd157 KV |
2008 | break; |
2009 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
5c81c7fd | 2010 | ath10k_wmi_event_scan_bss_chan(ar); |
5e3dd157 KV |
2011 | break; |
2012 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
5c81c7fd MK |
2013 | ath10k_wmi_event_scan_foreign_chan(ar, freq); |
2014 | break; | |
2015 | case WMI_SCAN_EVENT_START_FAILED: | |
7aa7a72a | 2016 | ath10k_warn(ar, "received scan start failure event\n"); |
2f9eec0b | 2017 | ath10k_wmi_event_scan_start_failed(ar); |
5e3dd157 KV |
2018 | break; |
2019 | case WMI_SCAN_EVENT_DEQUEUED: | |
5e3dd157 | 2020 | case WMI_SCAN_EVENT_PREEMPTED: |
b2297baa RM |
2021 | case WMI_SCAN_EVENT_RESTARTED: |
2022 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
5e3dd157 KV |
2023 | default: |
2024 | break; | |
2025 | } | |
2026 | ||
2027 | spin_unlock_bh(&ar->data_lock); | |
2028 | return 0; | |
2029 | } | |
2030 | ||
2031 | static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode) | |
2032 | { | |
2033 | enum ieee80211_band band; | |
2034 | ||
2035 | switch (phy_mode) { | |
2036 | case MODE_11A: | |
2037 | case MODE_11NA_HT20: | |
2038 | case MODE_11NA_HT40: | |
2039 | case MODE_11AC_VHT20: | |
2040 | case MODE_11AC_VHT40: | |
2041 | case MODE_11AC_VHT80: | |
2042 | band = IEEE80211_BAND_5GHZ; | |
2043 | break; | |
2044 | case MODE_11G: | |
2045 | case MODE_11B: | |
2046 | case MODE_11GONLY: | |
2047 | case MODE_11NG_HT20: | |
2048 | case MODE_11NG_HT40: | |
2049 | case MODE_11AC_VHT20_2G: | |
2050 | case MODE_11AC_VHT40_2G: | |
2051 | case MODE_11AC_VHT80_2G: | |
2052 | default: | |
2053 | band = IEEE80211_BAND_2GHZ; | |
2054 | } | |
2055 | ||
2056 | return band; | |
2057 | } | |
2058 | ||
504f6cdf SM |
2059 | /* If keys are configured, HW decrypts all frames |
2060 | * with protected bit set. Mark such frames as decrypted. | |
2061 | */ | |
2062 | static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, | |
2063 | struct sk_buff *skb, | |
2064 | struct ieee80211_rx_status *status) | |
2065 | { | |
2066 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
2067 | unsigned int hdrlen; | |
2068 | bool peer_key; | |
2069 | u8 *addr, keyidx; | |
2070 | ||
2071 | if (!ieee80211_is_auth(hdr->frame_control) || | |
2072 | !ieee80211_has_protected(hdr->frame_control)) | |
2073 | return; | |
2074 | ||
2075 | hdrlen = ieee80211_hdrlen(hdr->frame_control); | |
2076 | if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN)) | |
2077 | return; | |
2078 | ||
2079 | keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT; | |
2080 | addr = ieee80211_get_SA(hdr); | |
2081 | ||
2082 | spin_lock_bh(&ar->data_lock); | |
2083 | peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx); | |
2084 | spin_unlock_bh(&ar->data_lock); | |
2085 | ||
2086 | if (peer_key) { | |
2087 | ath10k_dbg(ar, ATH10K_DBG_MAC, | |
2088 | "mac wep key present for peer %pM\n", addr); | |
2089 | status->flag |= RX_FLAG_DECRYPTED; | |
2090 | } | |
2091 | } | |
2092 | ||
d7579d12 MK |
2093 | static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, |
2094 | struct wmi_mgmt_rx_ev_arg *arg) | |
5e3dd157 | 2095 | { |
0d9b0438 MK |
2096 | struct wmi_mgmt_rx_event_v1 *ev_v1; |
2097 | struct wmi_mgmt_rx_event_v2 *ev_v2; | |
2098 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; | |
32653cf1 MK |
2099 | size_t pull_len; |
2100 | u32 msdu_len; | |
2101 | ||
2102 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | |
2103 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | |
2104 | ev_hdr = &ev_v2->hdr.v1; | |
2105 | pull_len = sizeof(*ev_v2); | |
2106 | } else { | |
2107 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | |
2108 | ev_hdr = &ev_v1->hdr; | |
2109 | pull_len = sizeof(*ev_v1); | |
2110 | } | |
2111 | ||
2112 | if (skb->len < pull_len) | |
2113 | return -EPROTO; | |
2114 | ||
2115 | skb_pull(skb, pull_len); | |
2116 | arg->channel = ev_hdr->channel; | |
2117 | arg->buf_len = ev_hdr->buf_len; | |
2118 | arg->status = ev_hdr->status; | |
2119 | arg->snr = ev_hdr->snr; | |
2120 | arg->phy_mode = ev_hdr->phy_mode; | |
2121 | arg->rate = ev_hdr->rate; | |
2122 | ||
2123 | msdu_len = __le32_to_cpu(arg->buf_len); | |
2124 | if (skb->len < msdu_len) | |
2125 | return -EPROTO; | |
2126 | ||
2127 | /* the WMI buffer might've ended up being padded to 4 bytes due to HTC | |
2128 | * trailer with credit update. Trim the excess garbage. | |
2129 | */ | |
2130 | skb_trim(skb, msdu_len); | |
2131 | ||
2132 | return 0; | |
2133 | } | |
2134 | ||
1c092961 RM |
2135 | static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar, |
2136 | struct sk_buff *skb, | |
2137 | struct wmi_mgmt_rx_ev_arg *arg) | |
2138 | { | |
2139 | struct wmi_10_4_mgmt_rx_event *ev; | |
2140 | struct wmi_10_4_mgmt_rx_hdr *ev_hdr; | |
2141 | size_t pull_len; | |
2142 | u32 msdu_len; | |
2143 | ||
2144 | ev = (struct wmi_10_4_mgmt_rx_event *)skb->data; | |
2145 | ev_hdr = &ev->hdr; | |
2146 | pull_len = sizeof(*ev); | |
2147 | ||
2148 | if (skb->len < pull_len) | |
2149 | return -EPROTO; | |
2150 | ||
2151 | skb_pull(skb, pull_len); | |
2152 | arg->channel = ev_hdr->channel; | |
2153 | arg->buf_len = ev_hdr->buf_len; | |
2154 | arg->status = ev_hdr->status; | |
2155 | arg->snr = ev_hdr->snr; | |
2156 | arg->phy_mode = ev_hdr->phy_mode; | |
2157 | arg->rate = ev_hdr->rate; | |
2158 | ||
2159 | msdu_len = __le32_to_cpu(arg->buf_len); | |
2160 | if (skb->len < msdu_len) | |
2161 | return -EPROTO; | |
2162 | ||
2163 | /* Make sure bytes added for padding are removed. */ | |
2164 | skb_trim(skb, msdu_len); | |
2165 | ||
2166 | return 0; | |
2167 | } | |
2168 | ||
0226d602 | 2169 | int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) |
32653cf1 MK |
2170 | { |
2171 | struct wmi_mgmt_rx_ev_arg arg = {}; | |
5e3dd157 KV |
2172 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); |
2173 | struct ieee80211_hdr *hdr; | |
01cebe1c | 2174 | struct ieee80211_supported_band *sband; |
5e3dd157 KV |
2175 | u32 rx_status; |
2176 | u32 channel; | |
2177 | u32 phy_mode; | |
2178 | u32 snr; | |
2179 | u32 rate; | |
2180 | u32 buf_len; | |
2181 | u16 fc; | |
32653cf1 | 2182 | int ret; |
0d9b0438 | 2183 | |
d7579d12 | 2184 | ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); |
32653cf1 MK |
2185 | if (ret) { |
2186 | ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); | |
08603f2e | 2187 | dev_kfree_skb(skb); |
32653cf1 | 2188 | return ret; |
0d9b0438 | 2189 | } |
5e3dd157 | 2190 | |
32653cf1 MK |
2191 | channel = __le32_to_cpu(arg.channel); |
2192 | buf_len = __le32_to_cpu(arg.buf_len); | |
2193 | rx_status = __le32_to_cpu(arg.status); | |
2194 | snr = __le32_to_cpu(arg.snr); | |
2195 | phy_mode = __le32_to_cpu(arg.phy_mode); | |
2196 | rate = __le32_to_cpu(arg.rate); | |
5e3dd157 KV |
2197 | |
2198 | memset(status, 0, sizeof(*status)); | |
2199 | ||
7aa7a72a | 2200 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
5e3dd157 KV |
2201 | "event mgmt rx status %08x\n", rx_status); |
2202 | ||
e8a50f8b MP |
2203 | if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { |
2204 | dev_kfree_skb(skb); | |
2205 | return 0; | |
2206 | } | |
2207 | ||
5e3dd157 KV |
2208 | if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) { |
2209 | dev_kfree_skb(skb); | |
2210 | return 0; | |
2211 | } | |
2212 | ||
2213 | if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) { | |
2214 | dev_kfree_skb(skb); | |
2215 | return 0; | |
2216 | } | |
2217 | ||
d67d0a02 MK |
2218 | if (rx_status & WMI_RX_STATUS_ERR_CRC) { |
2219 | dev_kfree_skb(skb); | |
2220 | return 0; | |
2221 | } | |
2222 | ||
5e3dd157 KV |
2223 | if (rx_status & WMI_RX_STATUS_ERR_MIC) |
2224 | status->flag |= RX_FLAG_MMIC_ERROR; | |
2225 | ||
21040bf9 | 2226 | /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to |
453cdb61 | 2227 | * MODE_11B. This means phy_mode is not a reliable source for the band |
21040bf9 MK |
2228 | * of mgmt rx. |
2229 | */ | |
2230 | if (channel >= 1 && channel <= 14) { | |
2231 | status->band = IEEE80211_BAND_2GHZ; | |
2232 | } else if (channel >= 36 && channel <= 165) { | |
2233 | status->band = IEEE80211_BAND_5GHZ; | |
453cdb61 | 2234 | } else { |
21040bf9 MK |
2235 | /* Shouldn't happen unless list of advertised channels to |
2236 | * mac80211 has been changed. | |
2237 | */ | |
2238 | WARN_ON_ONCE(1); | |
2239 | dev_kfree_skb(skb); | |
2240 | return 0; | |
453cdb61 MK |
2241 | } |
2242 | ||
21040bf9 MK |
2243 | if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ) |
2244 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); | |
2245 | ||
01cebe1c MK |
2246 | sband = &ar->mac.sbands[status->band]; |
2247 | ||
5e3dd157 KV |
2248 | status->freq = ieee80211_channel_to_frequency(channel, status->band); |
2249 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; | |
01cebe1c | 2250 | status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100); |
5e3dd157 | 2251 | |
5e3dd157 KV |
2252 | hdr = (struct ieee80211_hdr *)skb->data; |
2253 | fc = le16_to_cpu(hdr->frame_control); | |
2254 | ||
504f6cdf SM |
2255 | ath10k_wmi_handle_wep_reauth(ar, skb, status); |
2256 | ||
2b6a6a90 MK |
2257 | /* FW delivers WEP Shared Auth frame with Protected Bit set and |
2258 | * encrypted payload. However in case of PMF it delivers decrypted | |
2259 | * frames with Protected Bit set. */ | |
2260 | if (ieee80211_has_protected(hdr->frame_control) && | |
2261 | !ieee80211_is_auth(hdr->frame_control)) { | |
eeab266c MK |
2262 | status->flag |= RX_FLAG_DECRYPTED; |
2263 | ||
2264 | if (!ieee80211_is_action(hdr->frame_control) && | |
2265 | !ieee80211_is_deauth(hdr->frame_control) && | |
2266 | !ieee80211_is_disassoc(hdr->frame_control)) { | |
2267 | status->flag |= RX_FLAG_IV_STRIPPED | | |
2268 | RX_FLAG_MMIC_STRIPPED; | |
2269 | hdr->frame_control = __cpu_to_le16(fc & | |
5e3dd157 | 2270 | ~IEEE80211_FCTL_PROTECTED); |
eeab266c | 2271 | } |
5e3dd157 KV |
2272 | } |
2273 | ||
cc9904e6 MK |
2274 | if (ieee80211_is_beacon(hdr->frame_control)) |
2275 | ath10k_mac_handle_beacon(ar, skb); | |
2276 | ||
7aa7a72a | 2277 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
5e3dd157 KV |
2278 | "event mgmt rx skb %p len %d ftype %02x stype %02x\n", |
2279 | skb, skb->len, | |
2280 | fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); | |
2281 | ||
7aa7a72a | 2282 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
5e3dd157 KV |
2283 | "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", |
2284 | status->freq, status->band, status->signal, | |
2285 | status->rate_idx); | |
2286 | ||
5e3dd157 KV |
2287 | ieee80211_rx(ar->hw, skb); |
2288 | return 0; | |
2289 | } | |
2290 | ||
2e1dea40 MK |
2291 | static int freq_to_idx(struct ath10k *ar, int freq) |
2292 | { | |
2293 | struct ieee80211_supported_band *sband; | |
2294 | int band, ch, idx = 0; | |
2295 | ||
2296 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { | |
2297 | sband = ar->hw->wiphy->bands[band]; | |
2298 | if (!sband) | |
2299 | continue; | |
2300 | ||
2301 | for (ch = 0; ch < sband->n_channels; ch++, idx++) | |
2302 | if (sband->channels[ch].center_freq == freq) | |
2303 | goto exit; | |
2304 | } | |
2305 | ||
2306 | exit: | |
2307 | return idx; | |
2308 | } | |
2309 | ||
d7579d12 MK |
2310 | static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, |
2311 | struct wmi_ch_info_ev_arg *arg) | |
32653cf1 MK |
2312 | { |
2313 | struct wmi_chan_info_event *ev = (void *)skb->data; | |
2314 | ||
2315 | if (skb->len < sizeof(*ev)) | |
2316 | return -EPROTO; | |
2317 | ||
2318 | skb_pull(skb, sizeof(*ev)); | |
2319 | arg->err_code = ev->err_code; | |
2320 | arg->freq = ev->freq; | |
2321 | arg->cmd_flags = ev->cmd_flags; | |
2322 | arg->noise_floor = ev->noise_floor; | |
2323 | arg->rx_clear_count = ev->rx_clear_count; | |
2324 | arg->cycle_count = ev->cycle_count; | |
2325 | ||
2326 | return 0; | |
2327 | } | |
2328 | ||
b2297baa RM |
2329 | static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar, |
2330 | struct sk_buff *skb, | |
2331 | struct wmi_ch_info_ev_arg *arg) | |
2332 | { | |
2333 | struct wmi_10_4_chan_info_event *ev = (void *)skb->data; | |
2334 | ||
2335 | if (skb->len < sizeof(*ev)) | |
2336 | return -EPROTO; | |
2337 | ||
2338 | skb_pull(skb, sizeof(*ev)); | |
2339 | arg->err_code = ev->err_code; | |
2340 | arg->freq = ev->freq; | |
2341 | arg->cmd_flags = ev->cmd_flags; | |
2342 | arg->noise_floor = ev->noise_floor; | |
2343 | arg->rx_clear_count = ev->rx_clear_count; | |
2344 | arg->cycle_count = ev->cycle_count; | |
2345 | arg->chan_tx_pwr_range = ev->chan_tx_pwr_range; | |
2346 | arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; | |
2347 | arg->rx_frame_count = ev->rx_frame_count; | |
2348 | ||
2349 | return 0; | |
2350 | } | |
2351 | ||
0226d602 | 2352 | void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2353 | { |
32653cf1 | 2354 | struct wmi_ch_info_ev_arg arg = {}; |
2e1dea40 MK |
2355 | struct survey_info *survey; |
2356 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; | |
32653cf1 | 2357 | int idx, ret; |
2e1dea40 | 2358 | |
d7579d12 | 2359 | ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); |
32653cf1 MK |
2360 | if (ret) { |
2361 | ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); | |
2362 | return; | |
2363 | } | |
2e1dea40 | 2364 | |
32653cf1 MK |
2365 | err_code = __le32_to_cpu(arg.err_code); |
2366 | freq = __le32_to_cpu(arg.freq); | |
2367 | cmd_flags = __le32_to_cpu(arg.cmd_flags); | |
2368 | noise_floor = __le32_to_cpu(arg.noise_floor); | |
2369 | rx_clear_count = __le32_to_cpu(arg.rx_clear_count); | |
2370 | cycle_count = __le32_to_cpu(arg.cycle_count); | |
2e1dea40 | 2371 | |
7aa7a72a | 2372 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
2e1dea40 MK |
2373 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", |
2374 | err_code, freq, cmd_flags, noise_floor, rx_clear_count, | |
2375 | cycle_count); | |
2376 | ||
2377 | spin_lock_bh(&ar->data_lock); | |
2378 | ||
5c81c7fd MK |
2379 | switch (ar->scan.state) { |
2380 | case ATH10K_SCAN_IDLE: | |
2381 | case ATH10K_SCAN_STARTING: | |
7aa7a72a | 2382 | ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); |
2e1dea40 | 2383 | goto exit; |
5c81c7fd MK |
2384 | case ATH10K_SCAN_RUNNING: |
2385 | case ATH10K_SCAN_ABORTING: | |
2386 | break; | |
2e1dea40 MK |
2387 | } |
2388 | ||
2389 | idx = freq_to_idx(ar, freq); | |
2390 | if (idx >= ARRAY_SIZE(ar->survey)) { | |
7aa7a72a | 2391 | ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", |
2e1dea40 MK |
2392 | freq, idx); |
2393 | goto exit; | |
2394 | } | |
2395 | ||
2396 | if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { | |
44b7d483 MK |
2397 | if (ar->ch_info_can_report_survey) { |
2398 | survey = &ar->survey[idx]; | |
2399 | survey->noise = noise_floor; | |
2400 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
2401 | ||
2402 | ath10k_hw_fill_survey_time(ar, | |
2403 | survey, | |
2404 | cycle_count, | |
2405 | rx_clear_count, | |
2406 | ar->survey_last_cycle_count, | |
2407 | ar->survey_last_rx_clear_count); | |
2408 | } | |
2409 | ||
2410 | ar->ch_info_can_report_survey = false; | |
2411 | } else { | |
2412 | ar->ch_info_can_report_survey = true; | |
2e1dea40 MK |
2413 | } |
2414 | ||
3d2a2e29 VT |
2415 | if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) { |
2416 | ar->survey_last_rx_clear_count = rx_clear_count; | |
2417 | ar->survey_last_cycle_count = cycle_count; | |
2418 | } | |
2e1dea40 MK |
2419 | |
2420 | exit: | |
2421 | spin_unlock_bh(&ar->data_lock); | |
5e3dd157 KV |
2422 | } |
2423 | ||
0226d602 | 2424 | void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2425 | { |
7aa7a72a | 2426 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); |
5e3dd157 KV |
2427 | } |
2428 | ||
0226d602 | 2429 | int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2430 | { |
7aa7a72a | 2431 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", |
869526b9 KV |
2432 | skb->len); |
2433 | ||
d35a6c18 | 2434 | trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); |
869526b9 KV |
2435 | |
2436 | return 0; | |
5e3dd157 KV |
2437 | } |
2438 | ||
b91251fb MK |
2439 | void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, |
2440 | struct ath10k_fw_stats_pdev *dst) | |
d15fb520 | 2441 | { |
d15fb520 MK |
2442 | dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); |
2443 | dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); | |
2444 | dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); | |
2445 | dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); | |
2446 | dst->cycle_count = __le32_to_cpu(src->cycle_count); | |
2447 | dst->phy_err_count = __le32_to_cpu(src->phy_err_count); | |
2448 | dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); | |
b91251fb | 2449 | } |
d15fb520 | 2450 | |
b91251fb MK |
2451 | void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, |
2452 | struct ath10k_fw_stats_pdev *dst) | |
2453 | { | |
2454 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
2455 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
2456 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
2457 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
2458 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
2459 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
2460 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
2461 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
2462 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
2463 | dst->underrun = __le32_to_cpu(src->underrun); | |
2464 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
2465 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
2466 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
2467 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
2468 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
2469 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
2470 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
2471 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
2472 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
2473 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
2474 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
2475 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
2476 | } | |
d15fb520 | 2477 | |
b91251fb MK |
2478 | void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, |
2479 | struct ath10k_fw_stats_pdev *dst) | |
2480 | { | |
2481 | dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); | |
2482 | dst->status_rcvd = __le32_to_cpu(src->status_rcvd); | |
2483 | dst->r0_frags = __le32_to_cpu(src->r0_frags); | |
2484 | dst->r1_frags = __le32_to_cpu(src->r1_frags); | |
2485 | dst->r2_frags = __le32_to_cpu(src->r2_frags); | |
2486 | dst->r3_frags = __le32_to_cpu(src->r3_frags); | |
2487 | dst->htt_msdus = __le32_to_cpu(src->htt_msdus); | |
2488 | dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); | |
2489 | dst->loc_msdus = __le32_to_cpu(src->loc_msdus); | |
2490 | dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); | |
2491 | dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); | |
2492 | dst->phy_errs = __le32_to_cpu(src->phy_errs); | |
2493 | dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); | |
2494 | dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); | |
2495 | } | |
2496 | ||
2497 | void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, | |
2498 | struct ath10k_fw_stats_pdev *dst) | |
2499 | { | |
2500 | dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); | |
2501 | dst->rts_bad = __le32_to_cpu(src->rts_bad); | |
2502 | dst->rts_good = __le32_to_cpu(src->rts_good); | |
2503 | dst->fcs_bad = __le32_to_cpu(src->fcs_bad); | |
2504 | dst->no_beacons = __le32_to_cpu(src->no_beacons); | |
2505 | dst->mib_int_count = __le32_to_cpu(src->mib_int_count); | |
d15fb520 MK |
2506 | } |
2507 | ||
0226d602 MK |
2508 | void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, |
2509 | struct ath10k_fw_stats_peer *dst) | |
d15fb520 MK |
2510 | { |
2511 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
2512 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
2513 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
2514 | } | |
2515 | ||
d7579d12 MK |
2516 | static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, |
2517 | struct sk_buff *skb, | |
2518 | struct ath10k_fw_stats *stats) | |
d15fb520 MK |
2519 | { |
2520 | const struct wmi_stats_event *ev = (void *)skb->data; | |
2521 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
2522 | int i; | |
2523 | ||
2524 | if (!skb_pull(skb, sizeof(*ev))) | |
2525 | return -EPROTO; | |
2526 | ||
2527 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2528 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2529 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2530 | ||
5326849a | 2531 | for (i = 0; i < num_pdev_stats; i++) { |
d15fb520 | 2532 | const struct wmi_pdev_stats *src; |
5326849a | 2533 | struct ath10k_fw_stats_pdev *dst; |
d15fb520 MK |
2534 | |
2535 | src = (void *)skb->data; | |
2536 | if (!skb_pull(skb, sizeof(*src))) | |
2537 | return -EPROTO; | |
2538 | ||
5326849a MK |
2539 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2540 | if (!dst) | |
2541 | continue; | |
2542 | ||
b91251fb MK |
2543 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
2544 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2545 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2546 | ||
5326849a | 2547 | list_add_tail(&dst->list, &stats->pdevs); |
d15fb520 MK |
2548 | } |
2549 | ||
2550 | /* fw doesn't implement vdev stats */ | |
2551 | ||
2552 | for (i = 0; i < num_peer_stats; i++) { | |
2553 | const struct wmi_peer_stats *src; | |
5326849a | 2554 | struct ath10k_fw_stats_peer *dst; |
d15fb520 MK |
2555 | |
2556 | src = (void *)skb->data; | |
2557 | if (!skb_pull(skb, sizeof(*src))) | |
2558 | return -EPROTO; | |
2559 | ||
5326849a MK |
2560 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2561 | if (!dst) | |
2562 | continue; | |
2563 | ||
2564 | ath10k_wmi_pull_peer_stats(src, dst); | |
2565 | list_add_tail(&dst->list, &stats->peers); | |
d15fb520 MK |
2566 | } |
2567 | ||
2568 | return 0; | |
2569 | } | |
2570 | ||
d7579d12 MK |
2571 | static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, |
2572 | struct sk_buff *skb, | |
2573 | struct ath10k_fw_stats *stats) | |
d15fb520 MK |
2574 | { |
2575 | const struct wmi_stats_event *ev = (void *)skb->data; | |
2576 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
2577 | int i; | |
2578 | ||
2579 | if (!skb_pull(skb, sizeof(*ev))) | |
2580 | return -EPROTO; | |
2581 | ||
2582 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2583 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2584 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2585 | ||
5326849a | 2586 | for (i = 0; i < num_pdev_stats; i++) { |
d15fb520 | 2587 | const struct wmi_10x_pdev_stats *src; |
5326849a | 2588 | struct ath10k_fw_stats_pdev *dst; |
d15fb520 MK |
2589 | |
2590 | src = (void *)skb->data; | |
2591 | if (!skb_pull(skb, sizeof(*src))) | |
2592 | return -EPROTO; | |
2593 | ||
5326849a MK |
2594 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2595 | if (!dst) | |
2596 | continue; | |
2597 | ||
b91251fb MK |
2598 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
2599 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2600 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2601 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
d15fb520 | 2602 | |
5326849a | 2603 | list_add_tail(&dst->list, &stats->pdevs); |
d15fb520 MK |
2604 | } |
2605 | ||
2606 | /* fw doesn't implement vdev stats */ | |
2607 | ||
2608 | for (i = 0; i < num_peer_stats; i++) { | |
2609 | const struct wmi_10x_peer_stats *src; | |
5326849a | 2610 | struct ath10k_fw_stats_peer *dst; |
d15fb520 MK |
2611 | |
2612 | src = (void *)skb->data; | |
2613 | if (!skb_pull(skb, sizeof(*src))) | |
2614 | return -EPROTO; | |
2615 | ||
5326849a MK |
2616 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2617 | if (!dst) | |
2618 | continue; | |
2619 | ||
2620 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
2621 | ||
2622 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
d15fb520 | 2623 | |
5326849a | 2624 | list_add_tail(&dst->list, &stats->peers); |
d15fb520 MK |
2625 | } |
2626 | ||
2627 | return 0; | |
2628 | } | |
2629 | ||
20de2229 MK |
2630 | static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, |
2631 | struct sk_buff *skb, | |
2632 | struct ath10k_fw_stats *stats) | |
2633 | { | |
2634 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
2635 | u32 num_pdev_stats; | |
2636 | u32 num_pdev_ext_stats; | |
2637 | u32 num_vdev_stats; | |
2638 | u32 num_peer_stats; | |
2639 | int i; | |
2640 | ||
2641 | if (!skb_pull(skb, sizeof(*ev))) | |
2642 | return -EPROTO; | |
2643 | ||
2644 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2645 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
2646 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2647 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2648 | ||
2649 | for (i = 0; i < num_pdev_stats; i++) { | |
2650 | const struct wmi_10_2_pdev_stats *src; | |
2651 | struct ath10k_fw_stats_pdev *dst; | |
2652 | ||
2653 | src = (void *)skb->data; | |
2654 | if (!skb_pull(skb, sizeof(*src))) | |
2655 | return -EPROTO; | |
2656 | ||
2657 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2658 | if (!dst) | |
2659 | continue; | |
2660 | ||
2661 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
2662 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2663 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2664 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
2665 | /* FIXME: expose 10.2 specific values */ | |
2666 | ||
2667 | list_add_tail(&dst->list, &stats->pdevs); | |
2668 | } | |
2669 | ||
2670 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
2671 | const struct wmi_10_2_pdev_ext_stats *src; | |
2672 | ||
2673 | src = (void *)skb->data; | |
2674 | if (!skb_pull(skb, sizeof(*src))) | |
2675 | return -EPROTO; | |
2676 | ||
2677 | /* FIXME: expose values to userspace | |
2678 | * | |
2679 | * Note: Even though this loop seems to do nothing it is | |
2680 | * required to parse following sub-structures properly. | |
2681 | */ | |
2682 | } | |
2683 | ||
2684 | /* fw doesn't implement vdev stats */ | |
2685 | ||
2686 | for (i = 0; i < num_peer_stats; i++) { | |
2687 | const struct wmi_10_2_peer_stats *src; | |
2688 | struct ath10k_fw_stats_peer *dst; | |
2689 | ||
2690 | src = (void *)skb->data; | |
2691 | if (!skb_pull(skb, sizeof(*src))) | |
2692 | return -EPROTO; | |
2693 | ||
2694 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2695 | if (!dst) | |
2696 | continue; | |
2697 | ||
2698 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
2699 | ||
2700 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
2701 | /* FIXME: expose 10.2 specific values */ | |
2702 | ||
2703 | list_add_tail(&dst->list, &stats->peers); | |
2704 | } | |
2705 | ||
2706 | return 0; | |
2707 | } | |
2708 | ||
2709 | static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, | |
2710 | struct sk_buff *skb, | |
2711 | struct ath10k_fw_stats *stats) | |
2712 | { | |
2713 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
2714 | u32 num_pdev_stats; | |
2715 | u32 num_pdev_ext_stats; | |
2716 | u32 num_vdev_stats; | |
2717 | u32 num_peer_stats; | |
2718 | int i; | |
2719 | ||
2720 | if (!skb_pull(skb, sizeof(*ev))) | |
2721 | return -EPROTO; | |
2722 | ||
2723 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2724 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
2725 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2726 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2727 | ||
2728 | for (i = 0; i < num_pdev_stats; i++) { | |
2729 | const struct wmi_10_2_pdev_stats *src; | |
2730 | struct ath10k_fw_stats_pdev *dst; | |
2731 | ||
2732 | src = (void *)skb->data; | |
2733 | if (!skb_pull(skb, sizeof(*src))) | |
2734 | return -EPROTO; | |
2735 | ||
2736 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2737 | if (!dst) | |
2738 | continue; | |
2739 | ||
2740 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
2741 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2742 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2743 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
2744 | /* FIXME: expose 10.2 specific values */ | |
2745 | ||
2746 | list_add_tail(&dst->list, &stats->pdevs); | |
2747 | } | |
2748 | ||
2749 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
2750 | const struct wmi_10_2_pdev_ext_stats *src; | |
2751 | ||
2752 | src = (void *)skb->data; | |
2753 | if (!skb_pull(skb, sizeof(*src))) | |
2754 | return -EPROTO; | |
2755 | ||
2756 | /* FIXME: expose values to userspace | |
2757 | * | |
2758 | * Note: Even though this loop seems to do nothing it is | |
2759 | * required to parse following sub-structures properly. | |
2760 | */ | |
2761 | } | |
2762 | ||
2763 | /* fw doesn't implement vdev stats */ | |
2764 | ||
2765 | for (i = 0; i < num_peer_stats; i++) { | |
2766 | const struct wmi_10_2_4_peer_stats *src; | |
2767 | struct ath10k_fw_stats_peer *dst; | |
2768 | ||
2769 | src = (void *)skb->data; | |
2770 | if (!skb_pull(skb, sizeof(*src))) | |
2771 | return -EPROTO; | |
2772 | ||
2773 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2774 | if (!dst) | |
2775 | continue; | |
2776 | ||
2777 | ath10k_wmi_pull_peer_stats(&src->common.old, dst); | |
2778 | ||
2779 | dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); | |
2780 | /* FIXME: expose 10.2 specific values */ | |
2781 | ||
2782 | list_add_tail(&dst->list, &stats->peers); | |
2783 | } | |
2784 | ||
2785 | return 0; | |
2786 | } | |
2787 | ||
0226d602 | 2788 | void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2789 | { |
7aa7a72a | 2790 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); |
60ef401a | 2791 | ath10k_debug_fw_stats_process(ar, skb); |
5e3dd157 KV |
2792 | } |
2793 | ||
d7579d12 MK |
2794 | static int |
2795 | ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, | |
2796 | struct wmi_vdev_start_ev_arg *arg) | |
32653cf1 MK |
2797 | { |
2798 | struct wmi_vdev_start_response_event *ev = (void *)skb->data; | |
2799 | ||
2800 | if (skb->len < sizeof(*ev)) | |
2801 | return -EPROTO; | |
2802 | ||
2803 | skb_pull(skb, sizeof(*ev)); | |
2804 | arg->vdev_id = ev->vdev_id; | |
2805 | arg->req_id = ev->req_id; | |
2806 | arg->resp_type = ev->resp_type; | |
2807 | arg->status = ev->status; | |
2808 | ||
2809 | return 0; | |
2810 | } | |
2811 | ||
0226d602 | 2812 | void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2813 | { |
32653cf1 MK |
2814 | struct wmi_vdev_start_ev_arg arg = {}; |
2815 | int ret; | |
5e3dd157 | 2816 | |
7aa7a72a | 2817 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); |
5e3dd157 | 2818 | |
d7579d12 | 2819 | ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); |
32653cf1 MK |
2820 | if (ret) { |
2821 | ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); | |
2822 | return; | |
2823 | } | |
5e3dd157 | 2824 | |
32653cf1 | 2825 | if (WARN_ON(__le32_to_cpu(arg.status))) |
5e3dd157 KV |
2826 | return; |
2827 | ||
2828 | complete(&ar->vdev_setup_done); | |
2829 | } | |
2830 | ||
0226d602 | 2831 | void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2832 | { |
7aa7a72a | 2833 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); |
5e3dd157 KV |
2834 | complete(&ar->vdev_setup_done); |
2835 | } | |
2836 | ||
d7579d12 MK |
2837 | static int |
2838 | ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, | |
2839 | struct wmi_peer_kick_ev_arg *arg) | |
32653cf1 MK |
2840 | { |
2841 | struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; | |
2842 | ||
2843 | if (skb->len < sizeof(*ev)) | |
2844 | return -EPROTO; | |
2845 | ||
2846 | skb_pull(skb, sizeof(*ev)); | |
2847 | arg->mac_addr = ev->peer_macaddr.addr; | |
2848 | ||
2849 | return 0; | |
2850 | } | |
2851 | ||
0226d602 | 2852 | void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2853 | { |
32653cf1 | 2854 | struct wmi_peer_kick_ev_arg arg = {}; |
5a13e76e | 2855 | struct ieee80211_sta *sta; |
32653cf1 | 2856 | int ret; |
5a13e76e | 2857 | |
d7579d12 | 2858 | ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); |
32653cf1 MK |
2859 | if (ret) { |
2860 | ath10k_warn(ar, "failed to parse peer kickout event: %d\n", | |
2861 | ret); | |
2862 | return; | |
2863 | } | |
5a13e76e | 2864 | |
7aa7a72a | 2865 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", |
32653cf1 | 2866 | arg.mac_addr); |
5a13e76e KV |
2867 | |
2868 | rcu_read_lock(); | |
2869 | ||
32653cf1 | 2870 | sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); |
5a13e76e | 2871 | if (!sta) { |
7aa7a72a | 2872 | ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", |
32653cf1 | 2873 | arg.mac_addr); |
5a13e76e KV |
2874 | goto exit; |
2875 | } | |
2876 | ||
2877 | ieee80211_report_low_ack(sta, 10); | |
2878 | ||
2879 | exit: | |
2880 | rcu_read_unlock(); | |
5e3dd157 KV |
2881 | } |
2882 | ||
2883 | /* | |
2884 | * FIXME | |
2885 | * | |
2886 | * We don't report to mac80211 sleep state of connected | |
2887 | * stations. Due to this mac80211 can't fill in TIM IE | |
2888 | * correctly. | |
2889 | * | |
2890 | * I know of no way of getting nullfunc frames that contain | |
2891 | * sleep transition from connected stations - these do not | |
2892 | * seem to be sent from the target to the host. There also | |
2893 | * doesn't seem to be a dedicated event for that. So the | |
2894 | * only way left to do this would be to read tim_bitmap | |
2895 | * during SWBA. | |
2896 | * | |
2897 | * We could probably try using tim_bitmap from SWBA to tell | |
2898 | * mac80211 which stations are asleep and which are not. The | |
2899 | * problem here is calling mac80211 functions so many times | |
2900 | * could take too long and make us miss the time to submit | |
2901 | * the beacon to the target. | |
2902 | * | |
2903 | * So as a workaround we try to extend the TIM IE if there | |
2904 | * is unicast buffered for stations with aid > 7 and fill it | |
2905 | * in ourselves. | |
2906 | */ | |
2907 | static void ath10k_wmi_update_tim(struct ath10k *ar, | |
2908 | struct ath10k_vif *arvif, | |
2909 | struct sk_buff *bcn, | |
a03fee34 | 2910 | const struct wmi_tim_info_arg *tim_info) |
5e3dd157 KV |
2911 | { |
2912 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; | |
2913 | struct ieee80211_tim_ie *tim; | |
2914 | u8 *ies, *ie; | |
2915 | u8 ie_len, pvm_len; | |
af762c0b | 2916 | __le32 t; |
a03fee34 RM |
2917 | u32 v, tim_len; |
2918 | ||
2919 | /* When FW reports 0 in tim_len, ensure atleast first byte | |
2920 | * in tim_bitmap is considered for pvm calculation. | |
2921 | */ | |
2922 | tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1; | |
5e3dd157 KV |
2923 | |
2924 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. | |
2925 | * we must copy the bitmap upon change and reuse it later */ | |
32653cf1 | 2926 | if (__le32_to_cpu(tim_info->tim_changed)) { |
5e3dd157 KV |
2927 | int i; |
2928 | ||
a03fee34 RM |
2929 | if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) { |
2930 | ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu", | |
2931 | tim_len, sizeof(arvif->u.ap.tim_bitmap)); | |
2932 | tim_len = sizeof(arvif->u.ap.tim_bitmap); | |
2933 | } | |
5e3dd157 | 2934 | |
a03fee34 | 2935 | for (i = 0; i < tim_len; i++) { |
32653cf1 | 2936 | t = tim_info->tim_bitmap[i / 4]; |
af762c0b | 2937 | v = __le32_to_cpu(t); |
5e3dd157 KV |
2938 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; |
2939 | } | |
2940 | ||
a03fee34 RM |
2941 | /* FW reports either length 0 or length based on max supported |
2942 | * station. so we calculate this on our own | |
2943 | */ | |
5e3dd157 | 2944 | arvif->u.ap.tim_len = 0; |
a03fee34 | 2945 | for (i = 0; i < tim_len; i++) |
5e3dd157 KV |
2946 | if (arvif->u.ap.tim_bitmap[i]) |
2947 | arvif->u.ap.tim_len = i; | |
2948 | ||
2949 | arvif->u.ap.tim_len++; | |
2950 | } | |
2951 | ||
2952 | ies = bcn->data; | |
2953 | ies += ieee80211_hdrlen(hdr->frame_control); | |
2954 | ies += 12; /* fixed parameters */ | |
2955 | ||
2956 | ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, | |
2957 | (u8 *)skb_tail_pointer(bcn) - ies); | |
2958 | if (!ie) { | |
09af8f85 | 2959 | if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) |
7aa7a72a | 2960 | ath10k_warn(ar, "no tim ie found;\n"); |
5e3dd157 KV |
2961 | return; |
2962 | } | |
2963 | ||
2964 | tim = (void *)ie + 2; | |
2965 | ie_len = ie[1]; | |
2966 | pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ | |
2967 | ||
2968 | if (pvm_len < arvif->u.ap.tim_len) { | |
a03fee34 | 2969 | int expand_size = tim_len - pvm_len; |
5e3dd157 KV |
2970 | int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); |
2971 | void *next_ie = ie + 2 + ie_len; | |
2972 | ||
2973 | if (skb_put(bcn, expand_size)) { | |
2974 | memmove(next_ie + expand_size, next_ie, move_size); | |
2975 | ||
2976 | ie[1] += expand_size; | |
2977 | ie_len += expand_size; | |
2978 | pvm_len += expand_size; | |
2979 | } else { | |
7aa7a72a | 2980 | ath10k_warn(ar, "tim expansion failed\n"); |
5e3dd157 KV |
2981 | } |
2982 | } | |
2983 | ||
a03fee34 | 2984 | if (pvm_len > tim_len) { |
7aa7a72a | 2985 | ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); |
5e3dd157 KV |
2986 | return; |
2987 | } | |
2988 | ||
32653cf1 | 2989 | tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); |
5e3dd157 KV |
2990 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); |
2991 | ||
748afc47 MK |
2992 | if (tim->dtim_count == 0) { |
2993 | ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true; | |
2994 | ||
32653cf1 | 2995 | if (__le32_to_cpu(tim_info->tim_mcast) == 1) |
748afc47 MK |
2996 | ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true; |
2997 | } | |
2998 | ||
7aa7a72a | 2999 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", |
5e3dd157 KV |
3000 | tim->dtim_count, tim->dtim_period, |
3001 | tim->bitmap_ctrl, pvm_len); | |
3002 | } | |
3003 | ||
5e3dd157 KV |
3004 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, |
3005 | struct sk_buff *bcn, | |
32653cf1 | 3006 | const struct wmi_p2p_noa_info *noa) |
5e3dd157 | 3007 | { |
5e3dd157 KV |
3008 | if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO) |
3009 | return; | |
3010 | ||
7aa7a72a | 3011 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); |
5e3dd157 | 3012 | |
6a94888f MK |
3013 | if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) |
3014 | ath10k_p2p_noa_update(arvif, noa); | |
5e3dd157 KV |
3015 | |
3016 | if (arvif->u.ap.noa_data) | |
3017 | if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) | |
3018 | memcpy(skb_put(bcn, arvif->u.ap.noa_len), | |
3019 | arvif->u.ap.noa_data, | |
3020 | arvif->u.ap.noa_len); | |
5e3dd157 | 3021 | |
6a94888f | 3022 | return; |
5e3dd157 KV |
3023 | } |
3024 | ||
d7579d12 MK |
3025 | static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, |
3026 | struct wmi_swba_ev_arg *arg) | |
32653cf1 MK |
3027 | { |
3028 | struct wmi_host_swba_event *ev = (void *)skb->data; | |
3029 | u32 map; | |
3030 | size_t i; | |
3031 | ||
3032 | if (skb->len < sizeof(*ev)) | |
3033 | return -EPROTO; | |
3034 | ||
3035 | skb_pull(skb, sizeof(*ev)); | |
3036 | arg->vdev_map = ev->vdev_map; | |
3037 | ||
3038 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
3039 | if (!(map & BIT(0))) | |
3040 | continue; | |
3041 | ||
3042 | /* If this happens there were some changes in firmware and | |
3043 | * ath10k should update the max size of tim_info array. | |
3044 | */ | |
3045 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
3046 | break; | |
3047 | ||
a03fee34 RM |
3048 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > |
3049 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
3050 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
3051 | return -EPROTO; | |
3052 | } | |
3053 | ||
3054 | arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; | |
3055 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
3056 | arg->tim_info[i].tim_bitmap = | |
3057 | ev->bcn_info[i].tim_info.tim_bitmap; | |
3058 | arg->tim_info[i].tim_changed = | |
3059 | ev->bcn_info[i].tim_info.tim_changed; | |
3060 | arg->tim_info[i].tim_num_ps_pending = | |
3061 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
3062 | ||
32653cf1 MK |
3063 | arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; |
3064 | i++; | |
3065 | } | |
3066 | ||
3067 | return 0; | |
3068 | } | |
3069 | ||
3cec3be3 RM |
3070 | static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar, |
3071 | struct sk_buff *skb, | |
3072 | struct wmi_swba_ev_arg *arg) | |
3073 | { | |
3074 | struct wmi_10_4_host_swba_event *ev = (void *)skb->data; | |
3075 | u32 map, tim_len; | |
3076 | size_t i; | |
3077 | ||
3078 | if (skb->len < sizeof(*ev)) | |
3079 | return -EPROTO; | |
3080 | ||
3081 | skb_pull(skb, sizeof(*ev)); | |
3082 | arg->vdev_map = ev->vdev_map; | |
3083 | ||
3084 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
3085 | if (!(map & BIT(0))) | |
3086 | continue; | |
3087 | ||
3088 | /* If this happens there were some changes in firmware and | |
3089 | * ath10k should update the max size of tim_info array. | |
3090 | */ | |
3091 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
3092 | break; | |
3093 | ||
3094 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > | |
3095 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
3096 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
3097 | return -EPROTO; | |
3098 | } | |
3099 | ||
3100 | tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len); | |
3101 | if (tim_len) { | |
3102 | /* Exclude 4 byte guard length */ | |
3103 | tim_len -= 4; | |
3104 | arg->tim_info[i].tim_len = __cpu_to_le32(tim_len); | |
3105 | } else { | |
3106 | arg->tim_info[i].tim_len = 0; | |
3107 | } | |
3108 | ||
3109 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
3110 | arg->tim_info[i].tim_bitmap = | |
3111 | ev->bcn_info[i].tim_info.tim_bitmap; | |
3112 | arg->tim_info[i].tim_changed = | |
3113 | ev->bcn_info[i].tim_info.tim_changed; | |
3114 | arg->tim_info[i].tim_num_ps_pending = | |
3115 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
3116 | ||
3117 | /* 10.4 firmware doesn't have p2p support. notice of absence | |
3118 | * info can be ignored for now. | |
3119 | */ | |
3120 | ||
3121 | i++; | |
3122 | } | |
3123 | ||
3124 | return 0; | |
3125 | } | |
3126 | ||
08e75ea8 VN |
3127 | static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar) |
3128 | { | |
3129 | return WMI_TXBF_CONF_BEFORE_ASSOC; | |
3130 | } | |
3131 | ||
0226d602 | 3132 | void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3133 | { |
32653cf1 | 3134 | struct wmi_swba_ev_arg arg = {}; |
5e3dd157 KV |
3135 | u32 map; |
3136 | int i = -1; | |
a03fee34 | 3137 | const struct wmi_tim_info_arg *tim_info; |
32653cf1 | 3138 | const struct wmi_p2p_noa_info *noa_info; |
5e3dd157 | 3139 | struct ath10k_vif *arvif; |
5e3dd157 | 3140 | struct sk_buff *bcn; |
64badcb6 | 3141 | dma_addr_t paddr; |
767d34fc | 3142 | int ret, vdev_id = 0; |
5e3dd157 | 3143 | |
d7579d12 | 3144 | ret = ath10k_wmi_pull_swba(ar, skb, &arg); |
32653cf1 MK |
3145 | if (ret) { |
3146 | ath10k_warn(ar, "failed to parse swba event: %d\n", ret); | |
3147 | return; | |
3148 | } | |
3149 | ||
3150 | map = __le32_to_cpu(arg.vdev_map); | |
5e3dd157 | 3151 | |
7aa7a72a | 3152 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", |
32653cf1 | 3153 | map); |
5e3dd157 KV |
3154 | |
3155 | for (; map; map >>= 1, vdev_id++) { | |
3156 | if (!(map & 0x1)) | |
3157 | continue; | |
3158 | ||
3159 | i++; | |
3160 | ||
3161 | if (i >= WMI_MAX_AP_VDEV) { | |
7aa7a72a | 3162 | ath10k_warn(ar, "swba has corrupted vdev map\n"); |
5e3dd157 KV |
3163 | break; |
3164 | } | |
3165 | ||
a03fee34 | 3166 | tim_info = &arg.tim_info[i]; |
32653cf1 | 3167 | noa_info = arg.noa_info[i]; |
5e3dd157 | 3168 | |
7aa7a72a | 3169 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
7a8a396b | 3170 | "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", |
5e3dd157 | 3171 | i, |
32653cf1 MK |
3172 | __le32_to_cpu(tim_info->tim_len), |
3173 | __le32_to_cpu(tim_info->tim_mcast), | |
3174 | __le32_to_cpu(tim_info->tim_changed), | |
3175 | __le32_to_cpu(tim_info->tim_num_ps_pending), | |
3176 | __le32_to_cpu(tim_info->tim_bitmap[3]), | |
3177 | __le32_to_cpu(tim_info->tim_bitmap[2]), | |
3178 | __le32_to_cpu(tim_info->tim_bitmap[1]), | |
3179 | __le32_to_cpu(tim_info->tim_bitmap[0])); | |
5e3dd157 | 3180 | |
a03fee34 RM |
3181 | /* TODO: Only first 4 word from tim_bitmap is dumped. |
3182 | * Extend debug code to dump full tim_bitmap. | |
3183 | */ | |
3184 | ||
5e3dd157 KV |
3185 | arvif = ath10k_get_arvif(ar, vdev_id); |
3186 | if (arvif == NULL) { | |
7aa7a72a MK |
3187 | ath10k_warn(ar, "no vif for vdev_id %d found\n", |
3188 | vdev_id); | |
5e3dd157 KV |
3189 | continue; |
3190 | } | |
3191 | ||
c2df44b3 MK |
3192 | /* There are no completions for beacons so wait for next SWBA |
3193 | * before telling mac80211 to decrement CSA counter | |
3194 | * | |
3195 | * Once CSA counter is completed stop sending beacons until | |
3196 | * actual channel switch is done */ | |
3197 | if (arvif->vif->csa_active && | |
3198 | ieee80211_csa_is_complete(arvif->vif)) { | |
3199 | ieee80211_csa_finish(arvif->vif); | |
3200 | continue; | |
3201 | } | |
3202 | ||
5e3dd157 KV |
3203 | bcn = ieee80211_beacon_get(ar->hw, arvif->vif); |
3204 | if (!bcn) { | |
7aa7a72a | 3205 | ath10k_warn(ar, "could not get mac80211 beacon\n"); |
5e3dd157 KV |
3206 | continue; |
3207 | } | |
3208 | ||
4b604558 | 3209 | ath10k_tx_h_seq_no(arvif->vif, bcn); |
32653cf1 MK |
3210 | ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); |
3211 | ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); | |
5e3dd157 | 3212 | |
ed54388a | 3213 | spin_lock_bh(&ar->data_lock); |
748afc47 | 3214 | |
ed54388a | 3215 | if (arvif->beacon) { |
af21319f MK |
3216 | switch (arvif->beacon_state) { |
3217 | case ATH10K_BEACON_SENT: | |
3218 | break; | |
3219 | case ATH10K_BEACON_SCHEDULED: | |
3220 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", | |
3221 | arvif->vdev_id); | |
3222 | break; | |
3223 | case ATH10K_BEACON_SENDING: | |
3224 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", | |
748afc47 | 3225 | arvif->vdev_id); |
af21319f MK |
3226 | dev_kfree_skb(bcn); |
3227 | goto skip; | |
3228 | } | |
748afc47 | 3229 | |
64badcb6 | 3230 | ath10k_mac_vif_beacon_free(arvif); |
ed54388a | 3231 | } |
5e3dd157 | 3232 | |
64badcb6 MK |
3233 | if (!arvif->beacon_buf) { |
3234 | paddr = dma_map_single(arvif->ar->dev, bcn->data, | |
3235 | bcn->len, DMA_TO_DEVICE); | |
3236 | ret = dma_mapping_error(arvif->ar->dev, paddr); | |
3237 | if (ret) { | |
3238 | ath10k_warn(ar, "failed to map beacon: %d\n", | |
3239 | ret); | |
3240 | dev_kfree_skb_any(bcn); | |
5e55e3cb | 3241 | ret = -EIO; |
64badcb6 MK |
3242 | goto skip; |
3243 | } | |
3244 | ||
3245 | ATH10K_SKB_CB(bcn)->paddr = paddr; | |
3246 | } else { | |
3247 | if (bcn->len > IEEE80211_MAX_FRAME_LEN) { | |
3248 | ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n", | |
3249 | bcn->len, IEEE80211_MAX_FRAME_LEN); | |
3250 | skb_trim(bcn, IEEE80211_MAX_FRAME_LEN); | |
3251 | } | |
3252 | memcpy(arvif->beacon_buf, bcn->data, bcn->len); | |
3253 | ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr; | |
767d34fc | 3254 | } |
748afc47 | 3255 | |
ed54388a | 3256 | arvif->beacon = bcn; |
af21319f | 3257 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; |
5e3dd157 | 3258 | |
5ce8e7fd RM |
3259 | trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); |
3260 | trace_ath10k_tx_payload(ar, bcn->data, bcn->len); | |
3261 | ||
767d34fc | 3262 | skip: |
ed54388a | 3263 | spin_unlock_bh(&ar->data_lock); |
5e3dd157 | 3264 | } |
af21319f MK |
3265 | |
3266 | ath10k_wmi_tx_beacons_nowait(ar); | |
5e3dd157 KV |
3267 | } |
3268 | ||
0226d602 | 3269 | void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3270 | { |
7aa7a72a | 3271 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); |
5e3dd157 KV |
3272 | } |
3273 | ||
9702c686 | 3274 | static void ath10k_dfs_radar_report(struct ath10k *ar, |
991adf71 | 3275 | struct wmi_phyerr_ev_arg *phyerr, |
2332d0ae | 3276 | const struct phyerr_radar_report *rr, |
9702c686 JD |
3277 | u64 tsf) |
3278 | { | |
3279 | u32 reg0, reg1, tsf32l; | |
500ff9f9 | 3280 | struct ieee80211_channel *ch; |
9702c686 JD |
3281 | struct pulse_event pe; |
3282 | u64 tsf64; | |
3283 | u8 rssi, width; | |
3284 | ||
3285 | reg0 = __le32_to_cpu(rr->reg0); | |
3286 | reg1 = __le32_to_cpu(rr->reg1); | |
3287 | ||
7aa7a72a | 3288 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3289 | "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", |
3290 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), | |
3291 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), | |
3292 | MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), | |
3293 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); | |
7aa7a72a | 3294 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3295 | "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", |
3296 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), | |
3297 | MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), | |
3298 | MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), | |
3299 | MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), | |
3300 | MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); | |
7aa7a72a | 3301 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3302 | "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", |
3303 | MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), | |
3304 | MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); | |
3305 | ||
3306 | if (!ar->dfs_detector) | |
3307 | return; | |
3308 | ||
500ff9f9 MK |
3309 | spin_lock_bh(&ar->data_lock); |
3310 | ch = ar->rx_channel; | |
3311 | spin_unlock_bh(&ar->data_lock); | |
3312 | ||
3313 | if (!ch) { | |
3314 | ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n"); | |
3315 | goto radar_detected; | |
3316 | } | |
3317 | ||
9702c686 | 3318 | /* report event to DFS pattern detector */ |
991adf71 | 3319 | tsf32l = phyerr->tsf_timestamp; |
9702c686 JD |
3320 | tsf64 = tsf & (~0xFFFFFFFFULL); |
3321 | tsf64 |= tsf32l; | |
3322 | ||
3323 | width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); | |
2332d0ae | 3324 | rssi = phyerr->rssi_combined; |
9702c686 JD |
3325 | |
3326 | /* hardware store this as 8 bit signed value, | |
3327 | * set to zero if negative number | |
3328 | */ | |
3329 | if (rssi & 0x80) | |
3330 | rssi = 0; | |
3331 | ||
3332 | pe.ts = tsf64; | |
500ff9f9 | 3333 | pe.freq = ch->center_freq; |
9702c686 JD |
3334 | pe.width = width; |
3335 | pe.rssi = rssi; | |
2c3f26a0 | 3336 | pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0); |
7aa7a72a | 3337 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3338 | "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", |
3339 | pe.freq, pe.width, pe.rssi, pe.ts); | |
3340 | ||
3341 | ATH10K_DFS_STAT_INC(ar, pulses_detected); | |
3342 | ||
3343 | if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) { | |
7aa7a72a | 3344 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3345 | "dfs no pulse pattern detected, yet\n"); |
3346 | return; | |
3347 | } | |
3348 | ||
500ff9f9 | 3349 | radar_detected: |
7aa7a72a | 3350 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); |
9702c686 | 3351 | ATH10K_DFS_STAT_INC(ar, radar_detected); |
7d9b40b4 MP |
3352 | |
3353 | /* Control radar events reporting in debugfs file | |
3354 | dfs_block_radar_events */ | |
3355 | if (ar->dfs_block_radar_events) { | |
7aa7a72a | 3356 | ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); |
7d9b40b4 MP |
3357 | return; |
3358 | } | |
3359 | ||
9702c686 JD |
3360 | ieee80211_radar_detected(ar->hw); |
3361 | } | |
3362 | ||
3363 | static int ath10k_dfs_fft_report(struct ath10k *ar, | |
991adf71 | 3364 | struct wmi_phyerr_ev_arg *phyerr, |
2332d0ae | 3365 | const struct phyerr_fft_report *fftr, |
9702c686 JD |
3366 | u64 tsf) |
3367 | { | |
3368 | u32 reg0, reg1; | |
3369 | u8 rssi, peak_mag; | |
3370 | ||
3371 | reg0 = __le32_to_cpu(fftr->reg0); | |
3372 | reg1 = __le32_to_cpu(fftr->reg1); | |
2332d0ae | 3373 | rssi = phyerr->rssi_combined; |
9702c686 | 3374 | |
7aa7a72a | 3375 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3376 | "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", |
3377 | MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), | |
3378 | MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), | |
3379 | MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), | |
3380 | MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); | |
7aa7a72a | 3381 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3382 | "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", |
3383 | MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), | |
3384 | MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), | |
3385 | MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), | |
3386 | MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); | |
3387 | ||
3388 | peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); | |
3389 | ||
3390 | /* false event detection */ | |
3391 | if (rssi == DFS_RSSI_POSSIBLY_FALSE && | |
3392 | peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { | |
7aa7a72a | 3393 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); |
9702c686 JD |
3394 | ATH10K_DFS_STAT_INC(ar, pulses_discarded); |
3395 | return -EINVAL; | |
3396 | } | |
3397 | ||
3398 | return 0; | |
3399 | } | |
3400 | ||
0226d602 | 3401 | void ath10k_wmi_event_dfs(struct ath10k *ar, |
991adf71 | 3402 | struct wmi_phyerr_ev_arg *phyerr, |
0226d602 | 3403 | u64 tsf) |
9702c686 JD |
3404 | { |
3405 | int buf_len, tlv_len, res, i = 0; | |
2332d0ae MK |
3406 | const struct phyerr_tlv *tlv; |
3407 | const struct phyerr_radar_report *rr; | |
3408 | const struct phyerr_fft_report *fftr; | |
3409 | const u8 *tlv_buf; | |
9702c686 | 3410 | |
991adf71 | 3411 | buf_len = phyerr->buf_len; |
7aa7a72a | 3412 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 | 3413 | "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", |
2332d0ae | 3414 | phyerr->phy_err_code, phyerr->rssi_combined, |
991adf71 | 3415 | phyerr->tsf_timestamp, tsf, buf_len); |
9702c686 JD |
3416 | |
3417 | /* Skip event if DFS disabled */ | |
3418 | if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) | |
3419 | return; | |
3420 | ||
3421 | ATH10K_DFS_STAT_INC(ar, pulses_total); | |
3422 | ||
3423 | while (i < buf_len) { | |
3424 | if (i + sizeof(*tlv) > buf_len) { | |
7aa7a72a MK |
3425 | ath10k_warn(ar, "too short buf for tlv header (%d)\n", |
3426 | i); | |
9702c686 JD |
3427 | return; |
3428 | } | |
3429 | ||
2332d0ae | 3430 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
9702c686 | 3431 | tlv_len = __le16_to_cpu(tlv->len); |
2332d0ae | 3432 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
7aa7a72a | 3433 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3434 | "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", |
3435 | tlv_len, tlv->tag, tlv->sig); | |
3436 | ||
3437 | switch (tlv->tag) { | |
3438 | case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: | |
3439 | if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { | |
7aa7a72a | 3440 | ath10k_warn(ar, "too short radar pulse summary (%d)\n", |
9702c686 JD |
3441 | i); |
3442 | return; | |
3443 | } | |
3444 | ||
3445 | rr = (struct phyerr_radar_report *)tlv_buf; | |
2332d0ae | 3446 | ath10k_dfs_radar_report(ar, phyerr, rr, tsf); |
9702c686 JD |
3447 | break; |
3448 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
3449 | if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { | |
7aa7a72a MK |
3450 | ath10k_warn(ar, "too short fft report (%d)\n", |
3451 | i); | |
9702c686 JD |
3452 | return; |
3453 | } | |
3454 | ||
3455 | fftr = (struct phyerr_fft_report *)tlv_buf; | |
2332d0ae | 3456 | res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf); |
9702c686 JD |
3457 | if (res) |
3458 | return; | |
3459 | break; | |
3460 | } | |
3461 | ||
3462 | i += sizeof(*tlv) + tlv_len; | |
3463 | } | |
3464 | } | |
3465 | ||
0226d602 | 3466 | void ath10k_wmi_event_spectral_scan(struct ath10k *ar, |
991adf71 | 3467 | struct wmi_phyerr_ev_arg *phyerr, |
0226d602 | 3468 | u64 tsf) |
9702c686 | 3469 | { |
855aed12 SW |
3470 | int buf_len, tlv_len, res, i = 0; |
3471 | struct phyerr_tlv *tlv; | |
2332d0ae MK |
3472 | const void *tlv_buf; |
3473 | const struct phyerr_fft_report *fftr; | |
855aed12 SW |
3474 | size_t fftr_len; |
3475 | ||
991adf71 | 3476 | buf_len = phyerr->buf_len; |
855aed12 SW |
3477 | |
3478 | while (i < buf_len) { | |
3479 | if (i + sizeof(*tlv) > buf_len) { | |
7aa7a72a | 3480 | ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", |
855aed12 SW |
3481 | i); |
3482 | return; | |
3483 | } | |
3484 | ||
2332d0ae | 3485 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
855aed12 | 3486 | tlv_len = __le16_to_cpu(tlv->len); |
2332d0ae | 3487 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
855aed12 SW |
3488 | |
3489 | if (i + sizeof(*tlv) + tlv_len > buf_len) { | |
7aa7a72a | 3490 | ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", |
855aed12 SW |
3491 | i); |
3492 | return; | |
3493 | } | |
3494 | ||
3495 | switch (tlv->tag) { | |
3496 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
3497 | if (sizeof(*fftr) > tlv_len) { | |
7aa7a72a | 3498 | ath10k_warn(ar, "failed to parse fft report at byte %d\n", |
855aed12 SW |
3499 | i); |
3500 | return; | |
3501 | } | |
3502 | ||
3503 | fftr_len = tlv_len - sizeof(*fftr); | |
2332d0ae MK |
3504 | fftr = tlv_buf; |
3505 | res = ath10k_spectral_process_fft(ar, phyerr, | |
855aed12 SW |
3506 | fftr, fftr_len, |
3507 | tsf); | |
3508 | if (res < 0) { | |
3413e97d | 3509 | ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n", |
855aed12 SW |
3510 | res); |
3511 | return; | |
3512 | } | |
3513 | break; | |
3514 | } | |
3515 | ||
3516 | i += sizeof(*tlv) + tlv_len; | |
3517 | } | |
9702c686 JD |
3518 | } |
3519 | ||
991adf71 RM |
3520 | static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
3521 | struct sk_buff *skb, | |
3522 | struct wmi_phyerr_hdr_arg *arg) | |
32653cf1 MK |
3523 | { |
3524 | struct wmi_phyerr_event *ev = (void *)skb->data; | |
3525 | ||
3526 | if (skb->len < sizeof(*ev)) | |
3527 | return -EPROTO; | |
3528 | ||
991adf71 RM |
3529 | arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs); |
3530 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
3531 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
3532 | arg->buf_len = skb->len - sizeof(*ev); | |
32653cf1 MK |
3533 | arg->phyerrs = ev->phyerrs; |
3534 | ||
3535 | return 0; | |
3536 | } | |
3537 | ||
2b0a2e0d RM |
3538 | static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
3539 | struct sk_buff *skb, | |
3540 | struct wmi_phyerr_hdr_arg *arg) | |
3541 | { | |
3542 | struct wmi_10_4_phyerr_event *ev = (void *)skb->data; | |
3543 | ||
3544 | if (skb->len < sizeof(*ev)) | |
3545 | return -EPROTO; | |
3546 | ||
3547 | /* 10.4 firmware always reports only one phyerr */ | |
3548 | arg->num_phyerrs = 1; | |
3549 | ||
3550 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
3551 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
3552 | arg->buf_len = skb->len; | |
3553 | arg->phyerrs = skb->data; | |
3554 | ||
3555 | return 0; | |
3556 | } | |
3557 | ||
991adf71 RM |
3558 | int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, |
3559 | const void *phyerr_buf, | |
3560 | int left_len, | |
3561 | struct wmi_phyerr_ev_arg *arg) | |
3562 | { | |
3563 | const struct wmi_phyerr *phyerr = phyerr_buf; | |
3564 | int i; | |
3565 | ||
3566 | if (left_len < sizeof(*phyerr)) { | |
3567 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%d)\n", | |
3568 | left_len, sizeof(*phyerr)); | |
3569 | return -EINVAL; | |
3570 | } | |
3571 | ||
3572 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
3573 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
3574 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
3575 | arg->rssi_combined = phyerr->rssi_combined; | |
3576 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
3577 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
3578 | arg->buf = phyerr->buf; | |
3579 | arg->hdr_len = sizeof(*phyerr); | |
3580 | ||
3581 | for (i = 0; i < 4; i++) | |
3582 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
3583 | ||
3584 | switch (phyerr->phy_err_code) { | |
3585 | case PHY_ERROR_GEN_SPECTRAL_SCAN: | |
3586 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
3587 | break; | |
3588 | case PHY_ERROR_GEN_FALSE_RADAR_EXT: | |
3589 | arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT; | |
3590 | break; | |
3591 | case PHY_ERROR_GEN_RADAR: | |
3592 | arg->phy_err_code = PHY_ERROR_RADAR; | |
3593 | break; | |
3594 | default: | |
3595 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
3596 | break; | |
3597 | } | |
3598 | ||
3599 | return 0; | |
3600 | } | |
3601 | ||
2b0a2e0d RM |
3602 | static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar, |
3603 | const void *phyerr_buf, | |
3604 | int left_len, | |
3605 | struct wmi_phyerr_ev_arg *arg) | |
3606 | { | |
3607 | const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf; | |
3608 | u32 phy_err_mask; | |
3609 | int i; | |
3610 | ||
3611 | if (left_len < sizeof(*phyerr)) { | |
3612 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%d)\n", | |
3613 | left_len, sizeof(*phyerr)); | |
3614 | return -EINVAL; | |
3615 | } | |
3616 | ||
3617 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
3618 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
3619 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
3620 | arg->rssi_combined = phyerr->rssi_combined; | |
3621 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
3622 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
3623 | arg->buf = phyerr->buf; | |
3624 | arg->hdr_len = sizeof(*phyerr); | |
3625 | ||
3626 | for (i = 0; i < 4; i++) | |
3627 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
3628 | ||
3629 | phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]); | |
3630 | ||
3631 | if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK) | |
3632 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
3633 | else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK) | |
3634 | arg->phy_err_code = PHY_ERROR_RADAR; | |
3635 | else | |
3636 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
3637 | ||
3638 | return 0; | |
3639 | } | |
3640 | ||
0226d602 | 3641 | void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3642 | { |
991adf71 RM |
3643 | struct wmi_phyerr_hdr_arg hdr_arg = {}; |
3644 | struct wmi_phyerr_ev_arg phyerr_arg = {}; | |
3645 | const void *phyerr; | |
9702c686 JD |
3646 | u32 count, i, buf_len, phy_err_code; |
3647 | u64 tsf; | |
32653cf1 | 3648 | int left_len, ret; |
9702c686 JD |
3649 | |
3650 | ATH10K_DFS_STAT_INC(ar, phy_errors); | |
3651 | ||
991adf71 | 3652 | ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg); |
32653cf1 | 3653 | if (ret) { |
991adf71 | 3654 | ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret); |
9702c686 JD |
3655 | return; |
3656 | } | |
3657 | ||
9702c686 | 3658 | /* Check number of included events */ |
991adf71 | 3659 | count = hdr_arg.num_phyerrs; |
9702c686 | 3660 | |
991adf71 RM |
3661 | left_len = hdr_arg.buf_len; |
3662 | ||
3663 | tsf = hdr_arg.tsf_u32; | |
9702c686 | 3664 | tsf <<= 32; |
991adf71 | 3665 | tsf |= hdr_arg.tsf_l32; |
9702c686 | 3666 | |
7aa7a72a | 3667 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
9702c686 JD |
3668 | "wmi event phyerr count %d tsf64 0x%llX\n", |
3669 | count, tsf); | |
3670 | ||
991adf71 | 3671 | phyerr = hdr_arg.phyerrs; |
9702c686 | 3672 | for (i = 0; i < count; i++) { |
991adf71 RM |
3673 | ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg); |
3674 | if (ret) { | |
3675 | ath10k_warn(ar, "failed to parse phyerr event (%d)\n", | |
7aa7a72a | 3676 | i); |
9702c686 JD |
3677 | return; |
3678 | } | |
3679 | ||
991adf71 RM |
3680 | left_len -= phyerr_arg.hdr_len; |
3681 | buf_len = phyerr_arg.buf_len; | |
3682 | phy_err_code = phyerr_arg.phy_err_code; | |
9702c686 JD |
3683 | |
3684 | if (left_len < buf_len) { | |
7aa7a72a | 3685 | ath10k_warn(ar, "single event (%d) wrong buf len\n", i); |
9702c686 JD |
3686 | return; |
3687 | } | |
3688 | ||
3689 | left_len -= buf_len; | |
3690 | ||
3691 | switch (phy_err_code) { | |
3692 | case PHY_ERROR_RADAR: | |
991adf71 | 3693 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
9702c686 JD |
3694 | break; |
3695 | case PHY_ERROR_SPECTRAL_SCAN: | |
991adf71 | 3696 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); |
9702c686 JD |
3697 | break; |
3698 | case PHY_ERROR_FALSE_RADAR_EXT: | |
991adf71 RM |
3699 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
3700 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); | |
9702c686 JD |
3701 | break; |
3702 | default: | |
3703 | break; | |
3704 | } | |
3705 | ||
991adf71 | 3706 | phyerr = phyerr + phyerr_arg.hdr_len + buf_len; |
9702c686 | 3707 | } |
5e3dd157 KV |
3708 | } |
3709 | ||
0226d602 | 3710 | void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3711 | { |
c1a4654a MK |
3712 | struct wmi_roam_ev_arg arg = {}; |
3713 | int ret; | |
3714 | u32 vdev_id; | |
3715 | u32 reason; | |
3716 | s32 rssi; | |
3717 | ||
3718 | ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg); | |
3719 | if (ret) { | |
3720 | ath10k_warn(ar, "failed to parse roam event: %d\n", ret); | |
3721 | return; | |
3722 | } | |
3723 | ||
3724 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
3725 | reason = __le32_to_cpu(arg.reason); | |
3726 | rssi = __le32_to_cpu(arg.rssi); | |
3727 | rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT; | |
3728 | ||
3729 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
3730 | "wmi roam event vdev %u reason 0x%08x rssi %d\n", | |
3731 | vdev_id, reason, rssi); | |
3732 | ||
3733 | if (reason >= WMI_ROAM_REASON_MAX) | |
3734 | ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n", | |
3735 | reason, vdev_id); | |
3736 | ||
3737 | switch (reason) { | |
c1a4654a | 3738 | case WMI_ROAM_REASON_BEACON_MISS: |
cc9904e6 MK |
3739 | ath10k_mac_handle_beacon_miss(ar, vdev_id); |
3740 | break; | |
3741 | case WMI_ROAM_REASON_BETTER_AP: | |
c1a4654a MK |
3742 | case WMI_ROAM_REASON_LOW_RSSI: |
3743 | case WMI_ROAM_REASON_SUITABLE_AP_FOUND: | |
3744 | case WMI_ROAM_REASON_HO_FAILED: | |
3745 | ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n", | |
3746 | reason, vdev_id); | |
3747 | break; | |
3748 | } | |
5e3dd157 KV |
3749 | } |
3750 | ||
0226d602 | 3751 | void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3752 | { |
7aa7a72a | 3753 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); |
5e3dd157 KV |
3754 | } |
3755 | ||
0226d602 | 3756 | void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3757 | { |
2fe5288c KV |
3758 | char buf[101], c; |
3759 | int i; | |
3760 | ||
3761 | for (i = 0; i < sizeof(buf) - 1; i++) { | |
3762 | if (i >= skb->len) | |
3763 | break; | |
3764 | ||
3765 | c = skb->data[i]; | |
3766 | ||
3767 | if (c == '\0') | |
3768 | break; | |
3769 | ||
3770 | if (isascii(c) && isprint(c)) | |
3771 | buf[i] = c; | |
3772 | else | |
3773 | buf[i] = '.'; | |
3774 | } | |
3775 | ||
3776 | if (i == sizeof(buf) - 1) | |
7aa7a72a | 3777 | ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); |
2fe5288c KV |
3778 | |
3779 | /* for some reason the debug prints end with \n, remove that */ | |
3780 | if (skb->data[i - 1] == '\n') | |
3781 | i--; | |
3782 | ||
3783 | /* the last byte is always reserved for the null character */ | |
3784 | buf[i] = '\0'; | |
3785 | ||
3be004c3 | 3786 | ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); |
5e3dd157 KV |
3787 | } |
3788 | ||
0226d602 | 3789 | void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3790 | { |
7aa7a72a | 3791 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); |
5e3dd157 KV |
3792 | } |
3793 | ||
0226d602 | 3794 | void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3795 | { |
7aa7a72a | 3796 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); |
5e3dd157 KV |
3797 | } |
3798 | ||
0226d602 MK |
3799 | void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, |
3800 | struct sk_buff *skb) | |
5e3dd157 | 3801 | { |
7aa7a72a | 3802 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); |
5e3dd157 KV |
3803 | } |
3804 | ||
0226d602 MK |
3805 | void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, |
3806 | struct sk_buff *skb) | |
5e3dd157 | 3807 | { |
7aa7a72a | 3808 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); |
5e3dd157 KV |
3809 | } |
3810 | ||
0226d602 | 3811 | void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3812 | { |
7aa7a72a | 3813 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); |
5e3dd157 KV |
3814 | } |
3815 | ||
0226d602 | 3816 | void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3817 | { |
5fd3ac3c JD |
3818 | struct wmi_wow_ev_arg ev = {}; |
3819 | int ret; | |
3820 | ||
3821 | complete(&ar->wow.wakeup_completed); | |
3822 | ||
3823 | ret = ath10k_wmi_pull_wow_event(ar, skb, &ev); | |
3824 | if (ret) { | |
3825 | ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret); | |
3826 | return; | |
3827 | } | |
3828 | ||
3829 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n", | |
3830 | wow_reason(ev.wake_reason)); | |
5e3dd157 KV |
3831 | } |
3832 | ||
0226d602 | 3833 | void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3834 | { |
7aa7a72a | 3835 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); |
5e3dd157 KV |
3836 | } |
3837 | ||
0226d602 | 3838 | void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3839 | { |
7aa7a72a | 3840 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n"); |
5e3dd157 KV |
3841 | } |
3842 | ||
0226d602 | 3843 | void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3844 | { |
7aa7a72a | 3845 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); |
5e3dd157 KV |
3846 | } |
3847 | ||
0226d602 | 3848 | void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3849 | { |
7aa7a72a | 3850 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); |
5e3dd157 KV |
3851 | } |
3852 | ||
0226d602 | 3853 | void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3854 | { |
7aa7a72a | 3855 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); |
5e3dd157 KV |
3856 | } |
3857 | ||
0226d602 | 3858 | void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3859 | { |
7aa7a72a | 3860 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); |
5e3dd157 KV |
3861 | } |
3862 | ||
0226d602 | 3863 | void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3864 | { |
7aa7a72a | 3865 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); |
5e3dd157 KV |
3866 | } |
3867 | ||
0226d602 MK |
3868 | void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, |
3869 | struct sk_buff *skb) | |
5e3dd157 | 3870 | { |
7aa7a72a | 3871 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); |
5e3dd157 KV |
3872 | } |
3873 | ||
0226d602 | 3874 | void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 | 3875 | { |
7aa7a72a | 3876 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); |
8a6618b0 BM |
3877 | } |
3878 | ||
0226d602 | 3879 | void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 | 3880 | { |
7aa7a72a | 3881 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); |
8a6618b0 BM |
3882 | } |
3883 | ||
0226d602 | 3884 | void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 | 3885 | { |
7aa7a72a | 3886 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); |
8a6618b0 BM |
3887 | } |
3888 | ||
b3effe61 | 3889 | static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, |
5b07e07f | 3890 | u32 num_units, u32 unit_len) |
b3effe61 BM |
3891 | { |
3892 | dma_addr_t paddr; | |
3893 | u32 pool_size; | |
3894 | int idx = ar->wmi.num_mem_chunks; | |
3895 | ||
3896 | pool_size = num_units * round_up(unit_len, 4); | |
3897 | ||
3898 | if (!pool_size) | |
3899 | return -EINVAL; | |
3900 | ||
3901 | ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev, | |
3902 | pool_size, | |
3903 | &paddr, | |
c8ecfc1c | 3904 | GFP_KERNEL); |
b3effe61 | 3905 | if (!ar->wmi.mem_chunks[idx].vaddr) { |
7aa7a72a | 3906 | ath10k_warn(ar, "failed to allocate memory chunk\n"); |
b3effe61 BM |
3907 | return -ENOMEM; |
3908 | } | |
3909 | ||
3910 | memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size); | |
3911 | ||
3912 | ar->wmi.mem_chunks[idx].paddr = paddr; | |
3913 | ar->wmi.mem_chunks[idx].len = pool_size; | |
3914 | ar->wmi.mem_chunks[idx].req_id = req_id; | |
3915 | ar->wmi.num_mem_chunks++; | |
3916 | ||
3917 | return 0; | |
3918 | } | |
3919 | ||
d7579d12 MK |
3920 | static int |
3921 | ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
3922 | struct wmi_svc_rdy_ev_arg *arg) | |
5c01aa3d MK |
3923 | { |
3924 | struct wmi_service_ready_event *ev; | |
3925 | size_t i, n; | |
3926 | ||
3927 | if (skb->len < sizeof(*ev)) | |
3928 | return -EPROTO; | |
3929 | ||
3930 | ev = (void *)skb->data; | |
3931 | skb_pull(skb, sizeof(*ev)); | |
3932 | arg->min_tx_power = ev->hw_min_tx_power; | |
3933 | arg->max_tx_power = ev->hw_max_tx_power; | |
3934 | arg->ht_cap = ev->ht_cap_info; | |
3935 | arg->vht_cap = ev->vht_cap_info; | |
3936 | arg->sw_ver0 = ev->sw_version; | |
3937 | arg->sw_ver1 = ev->sw_version_1; | |
3938 | arg->phy_capab = ev->phy_capability; | |
3939 | arg->num_rf_chains = ev->num_rf_chains; | |
3940 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
3941 | arg->num_mem_reqs = ev->num_mem_reqs; | |
3942 | arg->service_map = ev->wmi_service_bitmap; | |
2a3e60d3 | 3943 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
5c01aa3d MK |
3944 | |
3945 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
3946 | ARRAY_SIZE(arg->mem_reqs)); | |
3947 | for (i = 0; i < n; i++) | |
3948 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
3949 | ||
3950 | if (skb->len < | |
3951 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
3952 | return -EPROTO; | |
3953 | ||
3954 | return 0; | |
3955 | } | |
3956 | ||
d7579d12 MK |
3957 | static int |
3958 | ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
3959 | struct wmi_svc_rdy_ev_arg *arg) | |
5c01aa3d MK |
3960 | { |
3961 | struct wmi_10x_service_ready_event *ev; | |
3962 | int i, n; | |
3963 | ||
3964 | if (skb->len < sizeof(*ev)) | |
3965 | return -EPROTO; | |
3966 | ||
3967 | ev = (void *)skb->data; | |
3968 | skb_pull(skb, sizeof(*ev)); | |
3969 | arg->min_tx_power = ev->hw_min_tx_power; | |
3970 | arg->max_tx_power = ev->hw_max_tx_power; | |
3971 | arg->ht_cap = ev->ht_cap_info; | |
3972 | arg->vht_cap = ev->vht_cap_info; | |
3973 | arg->sw_ver0 = ev->sw_version; | |
3974 | arg->phy_capab = ev->phy_capability; | |
3975 | arg->num_rf_chains = ev->num_rf_chains; | |
3976 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
3977 | arg->num_mem_reqs = ev->num_mem_reqs; | |
3978 | arg->service_map = ev->wmi_service_bitmap; | |
2a3e60d3 | 3979 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
5c01aa3d MK |
3980 | |
3981 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
3982 | ARRAY_SIZE(arg->mem_reqs)); | |
3983 | for (i = 0; i < n; i++) | |
3984 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
3985 | ||
3986 | if (skb->len < | |
3987 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
3988 | return -EPROTO; | |
3989 | ||
3990 | return 0; | |
3991 | } | |
3992 | ||
c8ecfc1c | 3993 | static void ath10k_wmi_event_service_ready_work(struct work_struct *work) |
5e3dd157 | 3994 | { |
c8ecfc1c RM |
3995 | struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work); |
3996 | struct sk_buff *skb = ar->svc_rdy_skb; | |
5c01aa3d MK |
3997 | struct wmi_svc_rdy_ev_arg arg = {}; |
3998 | u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; | |
5c01aa3d MK |
3999 | int ret; |
4000 | ||
c8ecfc1c RM |
4001 | if (!skb) { |
4002 | ath10k_warn(ar, "invalid service ready event skb\n"); | |
4003 | return; | |
4004 | } | |
4005 | ||
d7579d12 | 4006 | ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); |
5c01aa3d MK |
4007 | if (ret) { |
4008 | ath10k_warn(ar, "failed to parse service ready: %d\n", ret); | |
5e3dd157 KV |
4009 | return; |
4010 | } | |
4011 | ||
d7579d12 MK |
4012 | memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); |
4013 | ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, | |
4014 | arg.service_map_len); | |
4015 | ||
5c01aa3d MK |
4016 | ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); |
4017 | ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); | |
4018 | ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); | |
4019 | ar->vht_cap_info = __le32_to_cpu(arg.vht_cap); | |
5e3dd157 | 4020 | ar->fw_version_major = |
5c01aa3d MK |
4021 | (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24; |
4022 | ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff); | |
5e3dd157 | 4023 | ar->fw_version_release = |
5c01aa3d MK |
4024 | (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16; |
4025 | ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff); | |
4026 | ar->phy_capability = __le32_to_cpu(arg.phy_capab); | |
4027 | ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains); | |
4028 | ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd); | |
4029 | ||
5c01aa3d | 4030 | ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", |
2a3e60d3 | 4031 | arg.service_map, arg.service_map_len); |
8865bee4 | 4032 | |
1a222435 KV |
4033 | /* only manually set fw features when not using FW IE format */ |
4034 | if (ar->fw_api == 1 && ar->fw_version_build > 636) | |
0d9b0438 MK |
4035 | set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); |
4036 | ||
5c8726ec | 4037 | if (ar->num_rf_chains > ar->max_spatial_stream) { |
7aa7a72a | 4038 | ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", |
5c8726ec RM |
4039 | ar->num_rf_chains, ar->max_spatial_stream); |
4040 | ar->num_rf_chains = ar->max_spatial_stream; | |
8865bee4 | 4041 | } |
5e3dd157 | 4042 | |
fdb959c7 MK |
4043 | ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1; |
4044 | ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1; | |
4045 | ||
5e3dd157 KV |
4046 | if (strlen(ar->hw->wiphy->fw_version) == 0) { |
4047 | snprintf(ar->hw->wiphy->fw_version, | |
4048 | sizeof(ar->hw->wiphy->fw_version), | |
4049 | "%u.%u.%u.%u", | |
4050 | ar->fw_version_major, | |
4051 | ar->fw_version_minor, | |
4052 | ar->fw_version_release, | |
4053 | ar->fw_version_build); | |
4054 | } | |
4055 | ||
5c01aa3d MK |
4056 | num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs); |
4057 | if (num_mem_reqs > WMI_MAX_MEM_REQS) { | |
7aa7a72a | 4058 | ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", |
b3effe61 BM |
4059 | num_mem_reqs); |
4060 | return; | |
6f97d256 BM |
4061 | } |
4062 | ||
b0399417 RM |
4063 | if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) { |
4064 | ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX + | |
4065 | TARGET_10_4_NUM_VDEVS; | |
4066 | ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS + | |
4067 | TARGET_10_4_NUM_VDEVS; | |
4068 | ar->num_tids = ar->num_active_peers * 2; | |
4069 | ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX; | |
4070 | } | |
4071 | ||
4072 | /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE | |
4073 | * and WMI_SERVICE_IRAM_TIDS, etc. | |
4074 | */ | |
4075 | ||
b3effe61 | 4076 | for (i = 0; i < num_mem_reqs; ++i) { |
5c01aa3d MK |
4077 | req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id); |
4078 | num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units); | |
4079 | unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size); | |
4080 | num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info); | |
b3effe61 | 4081 | |
b0399417 RM |
4082 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { |
4083 | if (ar->num_active_peers) | |
4084 | num_units = ar->num_active_peers + 1; | |
4085 | else | |
4086 | num_units = ar->max_num_peers + 1; | |
4087 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
b3effe61 BM |
4088 | /* number of units to allocate is number of |
4089 | * peers, 1 extra for self peer on target */ | |
4090 | /* this needs to be tied, host and target | |
4091 | * can get out of sync */ | |
b0399417 RM |
4092 | num_units = ar->max_num_peers + 1; |
4093 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
4094 | num_units = ar->max_num_vdevs + 1; | |
4095 | } | |
b3effe61 | 4096 | |
7aa7a72a | 4097 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
b3effe61 BM |
4098 | "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", |
4099 | req_id, | |
5c01aa3d | 4100 | __le32_to_cpu(arg.mem_reqs[i]->num_units), |
b3effe61 BM |
4101 | num_unit_info, |
4102 | unit_size, | |
4103 | num_units); | |
4104 | ||
4105 | ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, | |
4106 | unit_size); | |
4107 | if (ret) | |
4108 | return; | |
4109 | } | |
4110 | ||
7aa7a72a | 4111 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
ca996ec5 | 4112 | "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", |
5c01aa3d MK |
4113 | __le32_to_cpu(arg.min_tx_power), |
4114 | __le32_to_cpu(arg.max_tx_power), | |
4115 | __le32_to_cpu(arg.ht_cap), | |
4116 | __le32_to_cpu(arg.vht_cap), | |
4117 | __le32_to_cpu(arg.sw_ver0), | |
4118 | __le32_to_cpu(arg.sw_ver1), | |
ca996ec5 | 4119 | __le32_to_cpu(arg.fw_build), |
5c01aa3d MK |
4120 | __le32_to_cpu(arg.phy_capab), |
4121 | __le32_to_cpu(arg.num_rf_chains), | |
4122 | __le32_to_cpu(arg.eeprom_rd), | |
4123 | __le32_to_cpu(arg.num_mem_reqs)); | |
6f97d256 | 4124 | |
c8ecfc1c RM |
4125 | dev_kfree_skb(skb); |
4126 | ar->svc_rdy_skb = NULL; | |
6f97d256 BM |
4127 | complete(&ar->wmi.service_ready); |
4128 | } | |
4129 | ||
c8ecfc1c RM |
4130 | void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) |
4131 | { | |
4132 | ar->svc_rdy_skb = skb; | |
4133 | queue_work(ar->workqueue_aux, &ar->svc_rdy_work); | |
4134 | } | |
4135 | ||
d7579d12 MK |
4136 | static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
4137 | struct wmi_rdy_ev_arg *arg) | |
5e3dd157 | 4138 | { |
32653cf1 | 4139 | struct wmi_ready_event *ev = (void *)skb->data; |
5e3dd157 | 4140 | |
32653cf1 MK |
4141 | if (skb->len < sizeof(*ev)) |
4142 | return -EPROTO; | |
4143 | ||
4144 | skb_pull(skb, sizeof(*ev)); | |
4145 | arg->sw_version = ev->sw_version; | |
4146 | arg->abi_version = ev->abi_version; | |
4147 | arg->status = ev->status; | |
4148 | arg->mac_addr = ev->mac_addr.addr; | |
4149 | ||
4150 | return 0; | |
4151 | } | |
5e3dd157 | 4152 | |
c1a4654a MK |
4153 | static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb, |
4154 | struct wmi_roam_ev_arg *arg) | |
4155 | { | |
4156 | struct wmi_roam_ev *ev = (void *)skb->data; | |
4157 | ||
4158 | if (skb->len < sizeof(*ev)) | |
4159 | return -EPROTO; | |
4160 | ||
4161 | skb_pull(skb, sizeof(*ev)); | |
4162 | arg->vdev_id = ev->vdev_id; | |
4163 | arg->reason = ev->reason; | |
4164 | ||
4165 | return 0; | |
4166 | } | |
4167 | ||
0226d602 | 4168 | int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) |
32653cf1 MK |
4169 | { |
4170 | struct wmi_rdy_ev_arg arg = {}; | |
4171 | int ret; | |
4172 | ||
d7579d12 | 4173 | ret = ath10k_wmi_pull_rdy(ar, skb, &arg); |
32653cf1 MK |
4174 | if (ret) { |
4175 | ath10k_warn(ar, "failed to parse ready event: %d\n", ret); | |
4176 | return ret; | |
4177 | } | |
5e3dd157 | 4178 | |
7aa7a72a | 4179 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
32653cf1 MK |
4180 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", |
4181 | __le32_to_cpu(arg.sw_version), | |
4182 | __le32_to_cpu(arg.abi_version), | |
4183 | arg.mac_addr, | |
4184 | __le32_to_cpu(arg.status)); | |
5e3dd157 | 4185 | |
32653cf1 | 4186 | ether_addr_copy(ar->mac_addr, arg.mac_addr); |
5e3dd157 KV |
4187 | complete(&ar->wmi.unified_ready); |
4188 | return 0; | |
4189 | } | |
4190 | ||
a57a6a27 RM |
4191 | static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) |
4192 | { | |
4193 | const struct wmi_pdev_temperature_event *ev; | |
4194 | ||
4195 | ev = (struct wmi_pdev_temperature_event *)skb->data; | |
4196 | if (WARN_ON(skb->len < sizeof(*ev))) | |
4197 | return -EPROTO; | |
4198 | ||
ac2953fc | 4199 | ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); |
a57a6a27 RM |
4200 | return 0; |
4201 | } | |
4202 | ||
d7579d12 | 4203 | static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 KV |
4204 | { |
4205 | struct wmi_cmd_hdr *cmd_hdr; | |
4206 | enum wmi_event_id id; | |
5e3dd157 KV |
4207 | |
4208 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4209 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4210 | ||
4211 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
469d479f | 4212 | goto out; |
5e3dd157 | 4213 | |
d35a6c18 | 4214 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
5e3dd157 KV |
4215 | |
4216 | switch (id) { | |
4217 | case WMI_MGMT_RX_EVENTID: | |
4218 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4219 | /* mgmt_rx() owns the skb now! */ | |
4220 | return; | |
4221 | case WMI_SCAN_EVENTID: | |
4222 | ath10k_wmi_event_scan(ar, skb); | |
4223 | break; | |
4224 | case WMI_CHAN_INFO_EVENTID: | |
4225 | ath10k_wmi_event_chan_info(ar, skb); | |
4226 | break; | |
4227 | case WMI_ECHO_EVENTID: | |
4228 | ath10k_wmi_event_echo(ar, skb); | |
4229 | break; | |
4230 | case WMI_DEBUG_MESG_EVENTID: | |
4231 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4232 | break; | |
4233 | case WMI_UPDATE_STATS_EVENTID: | |
4234 | ath10k_wmi_event_update_stats(ar, skb); | |
4235 | break; | |
4236 | case WMI_VDEV_START_RESP_EVENTID: | |
4237 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4238 | break; | |
4239 | case WMI_VDEV_STOPPED_EVENTID: | |
4240 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4241 | break; | |
4242 | case WMI_PEER_STA_KICKOUT_EVENTID: | |
4243 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4244 | break; | |
4245 | case WMI_HOST_SWBA_EVENTID: | |
4246 | ath10k_wmi_event_host_swba(ar, skb); | |
4247 | break; | |
4248 | case WMI_TBTTOFFSET_UPDATE_EVENTID: | |
4249 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4250 | break; | |
4251 | case WMI_PHYERR_EVENTID: | |
4252 | ath10k_wmi_event_phyerr(ar, skb); | |
4253 | break; | |
4254 | case WMI_ROAM_EVENTID: | |
4255 | ath10k_wmi_event_roam(ar, skb); | |
4256 | break; | |
4257 | case WMI_PROFILE_MATCH: | |
4258 | ath10k_wmi_event_profile_match(ar, skb); | |
4259 | break; | |
4260 | case WMI_DEBUG_PRINT_EVENTID: | |
4261 | ath10k_wmi_event_debug_print(ar, skb); | |
4262 | break; | |
4263 | case WMI_PDEV_QVIT_EVENTID: | |
4264 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
4265 | break; | |
4266 | case WMI_WLAN_PROFILE_DATA_EVENTID: | |
4267 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
4268 | break; | |
4269 | case WMI_RTT_MEASUREMENT_REPORT_EVENTID: | |
4270 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
4271 | break; | |
4272 | case WMI_TSF_MEASUREMENT_REPORT_EVENTID: | |
4273 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
4274 | break; | |
4275 | case WMI_RTT_ERROR_REPORT_EVENTID: | |
4276 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
4277 | break; | |
4278 | case WMI_WOW_WAKEUP_HOST_EVENTID: | |
4279 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
4280 | break; | |
4281 | case WMI_DCS_INTERFERENCE_EVENTID: | |
4282 | ath10k_wmi_event_dcs_interference(ar, skb); | |
4283 | break; | |
4284 | case WMI_PDEV_TPC_CONFIG_EVENTID: | |
4285 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
4286 | break; | |
4287 | case WMI_PDEV_FTM_INTG_EVENTID: | |
4288 | ath10k_wmi_event_pdev_ftm_intg(ar, skb); | |
4289 | break; | |
4290 | case WMI_GTK_OFFLOAD_STATUS_EVENTID: | |
4291 | ath10k_wmi_event_gtk_offload_status(ar, skb); | |
4292 | break; | |
4293 | case WMI_GTK_REKEY_FAIL_EVENTID: | |
4294 | ath10k_wmi_event_gtk_rekey_fail(ar, skb); | |
4295 | break; | |
4296 | case WMI_TX_DELBA_COMPLETE_EVENTID: | |
4297 | ath10k_wmi_event_delba_complete(ar, skb); | |
4298 | break; | |
4299 | case WMI_TX_ADDBA_COMPLETE_EVENTID: | |
4300 | ath10k_wmi_event_addba_complete(ar, skb); | |
4301 | break; | |
4302 | case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: | |
4303 | ath10k_wmi_event_vdev_install_key_complete(ar, skb); | |
4304 | break; | |
4305 | case WMI_SERVICE_READY_EVENTID: | |
b34d2b3d | 4306 | ath10k_wmi_event_service_ready(ar, skb); |
c8ecfc1c | 4307 | return; |
5e3dd157 | 4308 | case WMI_READY_EVENTID: |
b34d2b3d | 4309 | ath10k_wmi_event_ready(ar, skb); |
5e3dd157 KV |
4310 | break; |
4311 | default: | |
7aa7a72a | 4312 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
5e3dd157 KV |
4313 | break; |
4314 | } | |
4315 | ||
469d479f | 4316 | out: |
5e3dd157 KV |
4317 | dev_kfree_skb(skb); |
4318 | } | |
4319 | ||
d7579d12 | 4320 | static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 BM |
4321 | { |
4322 | struct wmi_cmd_hdr *cmd_hdr; | |
4323 | enum wmi_10x_event_id id; | |
43d2a30f | 4324 | bool consumed; |
8a6618b0 BM |
4325 | |
4326 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4327 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4328 | ||
4329 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
469d479f | 4330 | goto out; |
8a6618b0 | 4331 | |
d35a6c18 | 4332 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
8a6618b0 | 4333 | |
43d2a30f KV |
4334 | consumed = ath10k_tm_event_wmi(ar, id, skb); |
4335 | ||
4336 | /* Ready event must be handled normally also in UTF mode so that we | |
4337 | * know the UTF firmware has booted, others we are just bypass WMI | |
4338 | * events to testmode. | |
4339 | */ | |
4340 | if (consumed && id != WMI_10X_READY_EVENTID) { | |
4341 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
4342 | "wmi testmode consumed 0x%x\n", id); | |
4343 | goto out; | |
4344 | } | |
4345 | ||
8a6618b0 BM |
4346 | switch (id) { |
4347 | case WMI_10X_MGMT_RX_EVENTID: | |
4348 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4349 | /* mgmt_rx() owns the skb now! */ | |
4350 | return; | |
4351 | case WMI_10X_SCAN_EVENTID: | |
4352 | ath10k_wmi_event_scan(ar, skb); | |
4353 | break; | |
4354 | case WMI_10X_CHAN_INFO_EVENTID: | |
4355 | ath10k_wmi_event_chan_info(ar, skb); | |
4356 | break; | |
4357 | case WMI_10X_ECHO_EVENTID: | |
4358 | ath10k_wmi_event_echo(ar, skb); | |
4359 | break; | |
4360 | case WMI_10X_DEBUG_MESG_EVENTID: | |
4361 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4362 | break; | |
4363 | case WMI_10X_UPDATE_STATS_EVENTID: | |
4364 | ath10k_wmi_event_update_stats(ar, skb); | |
4365 | break; | |
4366 | case WMI_10X_VDEV_START_RESP_EVENTID: | |
4367 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4368 | break; | |
4369 | case WMI_10X_VDEV_STOPPED_EVENTID: | |
4370 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4371 | break; | |
4372 | case WMI_10X_PEER_STA_KICKOUT_EVENTID: | |
4373 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4374 | break; | |
4375 | case WMI_10X_HOST_SWBA_EVENTID: | |
4376 | ath10k_wmi_event_host_swba(ar, skb); | |
4377 | break; | |
4378 | case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: | |
4379 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4380 | break; | |
4381 | case WMI_10X_PHYERR_EVENTID: | |
4382 | ath10k_wmi_event_phyerr(ar, skb); | |
4383 | break; | |
4384 | case WMI_10X_ROAM_EVENTID: | |
4385 | ath10k_wmi_event_roam(ar, skb); | |
4386 | break; | |
4387 | case WMI_10X_PROFILE_MATCH: | |
4388 | ath10k_wmi_event_profile_match(ar, skb); | |
4389 | break; | |
4390 | case WMI_10X_DEBUG_PRINT_EVENTID: | |
4391 | ath10k_wmi_event_debug_print(ar, skb); | |
4392 | break; | |
4393 | case WMI_10X_PDEV_QVIT_EVENTID: | |
4394 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
4395 | break; | |
4396 | case WMI_10X_WLAN_PROFILE_DATA_EVENTID: | |
4397 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
4398 | break; | |
4399 | case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: | |
4400 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
4401 | break; | |
4402 | case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: | |
4403 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
4404 | break; | |
4405 | case WMI_10X_RTT_ERROR_REPORT_EVENTID: | |
4406 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
4407 | break; | |
4408 | case WMI_10X_WOW_WAKEUP_HOST_EVENTID: | |
4409 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
4410 | break; | |
4411 | case WMI_10X_DCS_INTERFERENCE_EVENTID: | |
4412 | ath10k_wmi_event_dcs_interference(ar, skb); | |
4413 | break; | |
4414 | case WMI_10X_PDEV_TPC_CONFIG_EVENTID: | |
4415 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
4416 | break; | |
4417 | case WMI_10X_INST_RSSI_STATS_EVENTID: | |
4418 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
4419 | break; | |
4420 | case WMI_10X_VDEV_STANDBY_REQ_EVENTID: | |
4421 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
4422 | break; | |
4423 | case WMI_10X_VDEV_RESUME_REQ_EVENTID: | |
4424 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
4425 | break; | |
4426 | case WMI_10X_SERVICE_READY_EVENTID: | |
b34d2b3d | 4427 | ath10k_wmi_event_service_ready(ar, skb); |
c8ecfc1c | 4428 | return; |
8a6618b0 | 4429 | case WMI_10X_READY_EVENTID: |
b34d2b3d | 4430 | ath10k_wmi_event_ready(ar, skb); |
8a6618b0 | 4431 | break; |
43d2a30f KV |
4432 | case WMI_10X_PDEV_UTF_EVENTID: |
4433 | /* ignore utf events */ | |
4434 | break; | |
8a6618b0 | 4435 | default: |
7aa7a72a | 4436 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
8a6618b0 BM |
4437 | break; |
4438 | } | |
4439 | ||
43d2a30f | 4440 | out: |
8a6618b0 BM |
4441 | dev_kfree_skb(skb); |
4442 | } | |
4443 | ||
d7579d12 | 4444 | static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) |
24c88f78 MK |
4445 | { |
4446 | struct wmi_cmd_hdr *cmd_hdr; | |
4447 | enum wmi_10_2_event_id id; | |
4448 | ||
4449 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4450 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4451 | ||
4452 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
469d479f | 4453 | goto out; |
24c88f78 | 4454 | |
d35a6c18 | 4455 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
24c88f78 MK |
4456 | |
4457 | switch (id) { | |
4458 | case WMI_10_2_MGMT_RX_EVENTID: | |
4459 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4460 | /* mgmt_rx() owns the skb now! */ | |
4461 | return; | |
4462 | case WMI_10_2_SCAN_EVENTID: | |
4463 | ath10k_wmi_event_scan(ar, skb); | |
4464 | break; | |
4465 | case WMI_10_2_CHAN_INFO_EVENTID: | |
4466 | ath10k_wmi_event_chan_info(ar, skb); | |
4467 | break; | |
4468 | case WMI_10_2_ECHO_EVENTID: | |
4469 | ath10k_wmi_event_echo(ar, skb); | |
4470 | break; | |
4471 | case WMI_10_2_DEBUG_MESG_EVENTID: | |
4472 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4473 | break; | |
4474 | case WMI_10_2_UPDATE_STATS_EVENTID: | |
4475 | ath10k_wmi_event_update_stats(ar, skb); | |
4476 | break; | |
4477 | case WMI_10_2_VDEV_START_RESP_EVENTID: | |
4478 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4479 | break; | |
4480 | case WMI_10_2_VDEV_STOPPED_EVENTID: | |
4481 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4482 | break; | |
4483 | case WMI_10_2_PEER_STA_KICKOUT_EVENTID: | |
4484 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4485 | break; | |
4486 | case WMI_10_2_HOST_SWBA_EVENTID: | |
4487 | ath10k_wmi_event_host_swba(ar, skb); | |
4488 | break; | |
4489 | case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: | |
4490 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4491 | break; | |
4492 | case WMI_10_2_PHYERR_EVENTID: | |
4493 | ath10k_wmi_event_phyerr(ar, skb); | |
4494 | break; | |
4495 | case WMI_10_2_ROAM_EVENTID: | |
4496 | ath10k_wmi_event_roam(ar, skb); | |
4497 | break; | |
4498 | case WMI_10_2_PROFILE_MATCH: | |
4499 | ath10k_wmi_event_profile_match(ar, skb); | |
4500 | break; | |
4501 | case WMI_10_2_DEBUG_PRINT_EVENTID: | |
4502 | ath10k_wmi_event_debug_print(ar, skb); | |
4503 | break; | |
4504 | case WMI_10_2_PDEV_QVIT_EVENTID: | |
4505 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
4506 | break; | |
4507 | case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: | |
4508 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
4509 | break; | |
4510 | case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: | |
4511 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
4512 | break; | |
4513 | case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: | |
4514 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
4515 | break; | |
4516 | case WMI_10_2_RTT_ERROR_REPORT_EVENTID: | |
4517 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
4518 | break; | |
4519 | case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: | |
4520 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
4521 | break; | |
4522 | case WMI_10_2_DCS_INTERFERENCE_EVENTID: | |
4523 | ath10k_wmi_event_dcs_interference(ar, skb); | |
4524 | break; | |
4525 | case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: | |
4526 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
4527 | break; | |
4528 | case WMI_10_2_INST_RSSI_STATS_EVENTID: | |
4529 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
4530 | break; | |
4531 | case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: | |
4532 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
4533 | break; | |
4534 | case WMI_10_2_VDEV_RESUME_REQ_EVENTID: | |
4535 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
4536 | break; | |
4537 | case WMI_10_2_SERVICE_READY_EVENTID: | |
b34d2b3d | 4538 | ath10k_wmi_event_service_ready(ar, skb); |
c8ecfc1c | 4539 | return; |
24c88f78 | 4540 | case WMI_10_2_READY_EVENTID: |
b34d2b3d | 4541 | ath10k_wmi_event_ready(ar, skb); |
24c88f78 | 4542 | break; |
a57a6a27 RM |
4543 | case WMI_10_2_PDEV_TEMPERATURE_EVENTID: |
4544 | ath10k_wmi_event_temperature(ar, skb); | |
4545 | break; | |
24c88f78 MK |
4546 | case WMI_10_2_RTT_KEEPALIVE_EVENTID: |
4547 | case WMI_10_2_GPIO_INPUT_EVENTID: | |
4548 | case WMI_10_2_PEER_RATECODE_LIST_EVENTID: | |
4549 | case WMI_10_2_GENERIC_BUFFER_EVENTID: | |
4550 | case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: | |
4551 | case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: | |
4552 | case WMI_10_2_WDS_PEER_EVENTID: | |
7aa7a72a | 4553 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
24c88f78 MK |
4554 | "received event id %d not implemented\n", id); |
4555 | break; | |
4556 | default: | |
7aa7a72a | 4557 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
24c88f78 MK |
4558 | break; |
4559 | } | |
4560 | ||
469d479f | 4561 | out: |
24c88f78 MK |
4562 | dev_kfree_skb(skb); |
4563 | } | |
8a6618b0 | 4564 | |
1c092961 RM |
4565 | static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb) |
4566 | { | |
4567 | struct wmi_cmd_hdr *cmd_hdr; | |
4568 | enum wmi_10_4_event_id id; | |
4569 | ||
4570 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4571 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4572 | ||
4573 | if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) | |
4574 | goto out; | |
4575 | ||
4576 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); | |
4577 | ||
4578 | switch (id) { | |
4579 | case WMI_10_4_MGMT_RX_EVENTID: | |
4580 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4581 | /* mgmt_rx() owns the skb now! */ | |
4582 | return; | |
373b48cf RM |
4583 | case WMI_10_4_ECHO_EVENTID: |
4584 | ath10k_wmi_event_echo(ar, skb); | |
4585 | break; | |
4586 | case WMI_10_4_DEBUG_MESG_EVENTID: | |
4587 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4588 | break; | |
4589 | case WMI_10_4_SERVICE_READY_EVENTID: | |
4590 | ath10k_wmi_event_service_ready(ar, skb); | |
c8ecfc1c | 4591 | return; |
b2297baa RM |
4592 | case WMI_10_4_SCAN_EVENTID: |
4593 | ath10k_wmi_event_scan(ar, skb); | |
4594 | break; | |
4595 | case WMI_10_4_CHAN_INFO_EVENTID: | |
4596 | ath10k_wmi_event_chan_info(ar, skb); | |
4597 | break; | |
2b0a2e0d RM |
4598 | case WMI_10_4_PHYERR_EVENTID: |
4599 | ath10k_wmi_event_phyerr(ar, skb); | |
4600 | break; | |
d02e752f RM |
4601 | case WMI_10_4_READY_EVENTID: |
4602 | ath10k_wmi_event_ready(ar, skb); | |
4603 | break; | |
373b48cf RM |
4604 | case WMI_10_4_PEER_STA_KICKOUT_EVENTID: |
4605 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4606 | break; | |
3cec3be3 RM |
4607 | case WMI_10_4_HOST_SWBA_EVENTID: |
4608 | ath10k_wmi_event_host_swba(ar, skb); | |
4609 | break; | |
373b48cf RM |
4610 | case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID: |
4611 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4612 | break; | |
4613 | case WMI_10_4_DEBUG_PRINT_EVENTID: | |
4614 | ath10k_wmi_event_debug_print(ar, skb); | |
4615 | break; | |
4616 | case WMI_10_4_VDEV_START_RESP_EVENTID: | |
4617 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4618 | break; | |
4619 | case WMI_10_4_VDEV_STOPPED_EVENTID: | |
4620 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4621 | break; | |
4622 | case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: | |
4623 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
4624 | "received event id %d not implemented\n", id); | |
4625 | break; | |
1c092961 RM |
4626 | default: |
4627 | ath10k_warn(ar, "Unknown eventid: %d\n", id); | |
4628 | break; | |
4629 | } | |
4630 | ||
4631 | out: | |
4632 | dev_kfree_skb(skb); | |
4633 | } | |
4634 | ||
ce42870e BM |
4635 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) |
4636 | { | |
d7579d12 MK |
4637 | int ret; |
4638 | ||
4639 | ret = ath10k_wmi_rx(ar, skb); | |
4640 | if (ret) | |
4641 | ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); | |
ce42870e BM |
4642 | } |
4643 | ||
95bf21f9 | 4644 | int ath10k_wmi_connect(struct ath10k *ar) |
5e3dd157 KV |
4645 | { |
4646 | int status; | |
4647 | struct ath10k_htc_svc_conn_req conn_req; | |
4648 | struct ath10k_htc_svc_conn_resp conn_resp; | |
4649 | ||
4650 | memset(&conn_req, 0, sizeof(conn_req)); | |
4651 | memset(&conn_resp, 0, sizeof(conn_resp)); | |
4652 | ||
4653 | /* these fields are the same for all service endpoints */ | |
4654 | conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; | |
4655 | conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; | |
be8b3943 | 4656 | conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; |
5e3dd157 KV |
4657 | |
4658 | /* connect to control service */ | |
4659 | conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; | |
4660 | ||
cd003fad | 4661 | status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); |
5e3dd157 | 4662 | if (status) { |
7aa7a72a | 4663 | ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", |
5e3dd157 KV |
4664 | status); |
4665 | return status; | |
4666 | } | |
4667 | ||
4668 | ar->wmi.eid = conn_resp.eid; | |
4669 | return 0; | |
4670 | } | |
4671 | ||
d7579d12 MK |
4672 | static struct sk_buff * |
4673 | ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, | |
4674 | u16 ctl2g, u16 ctl5g, | |
4675 | enum wmi_dfs_region dfs_reg) | |
5e3dd157 KV |
4676 | { |
4677 | struct wmi_pdev_set_regdomain_cmd *cmd; | |
4678 | struct sk_buff *skb; | |
4679 | ||
7aa7a72a | 4680 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 4681 | if (!skb) |
d7579d12 | 4682 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
4683 | |
4684 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; | |
4685 | cmd->reg_domain = __cpu_to_le32(rd); | |
4686 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
4687 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
4688 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
4689 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
4690 | ||
7aa7a72a | 4691 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
4692 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", |
4693 | rd, rd2g, rd5g, ctl2g, ctl5g); | |
d7579d12 | 4694 | return skb; |
5e3dd157 KV |
4695 | } |
4696 | ||
d7579d12 MK |
4697 | static struct sk_buff * |
4698 | ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 | |
4699 | rd5g, u16 ctl2g, u16 ctl5g, | |
4700 | enum wmi_dfs_region dfs_reg) | |
821af6ae MP |
4701 | { |
4702 | struct wmi_pdev_set_regdomain_cmd_10x *cmd; | |
4703 | struct sk_buff *skb; | |
4704 | ||
7aa7a72a | 4705 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
821af6ae | 4706 | if (!skb) |
d7579d12 | 4707 | return ERR_PTR(-ENOMEM); |
821af6ae MP |
4708 | |
4709 | cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; | |
4710 | cmd->reg_domain = __cpu_to_le32(rd); | |
4711 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
4712 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
4713 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
4714 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
4715 | cmd->dfs_domain = __cpu_to_le32(dfs_reg); | |
4716 | ||
7aa7a72a | 4717 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
821af6ae MP |
4718 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", |
4719 | rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); | |
d7579d12 | 4720 | return skb; |
821af6ae MP |
4721 | } |
4722 | ||
d7579d12 MK |
4723 | static struct sk_buff * |
4724 | ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) | |
5e3dd157 KV |
4725 | { |
4726 | struct wmi_pdev_suspend_cmd *cmd; | |
4727 | struct sk_buff *skb; | |
4728 | ||
7aa7a72a | 4729 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 4730 | if (!skb) |
d7579d12 | 4731 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
4732 | |
4733 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; | |
00f5482b | 4734 | cmd->suspend_opt = __cpu_to_le32(suspend_opt); |
5e3dd157 | 4735 | |
d7579d12 | 4736 | return skb; |
5e3dd157 KV |
4737 | } |
4738 | ||
d7579d12 MK |
4739 | static struct sk_buff * |
4740 | ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) | |
5e3dd157 KV |
4741 | { |
4742 | struct sk_buff *skb; | |
4743 | ||
7aa7a72a | 4744 | skb = ath10k_wmi_alloc_skb(ar, 0); |
d7579d12 MK |
4745 | if (!skb) |
4746 | return ERR_PTR(-ENOMEM); | |
5e3dd157 | 4747 | |
d7579d12 | 4748 | return skb; |
5e3dd157 KV |
4749 | } |
4750 | ||
d7579d12 MK |
4751 | static struct sk_buff * |
4752 | ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | |
5e3dd157 KV |
4753 | { |
4754 | struct wmi_pdev_set_param_cmd *cmd; | |
4755 | struct sk_buff *skb; | |
4756 | ||
226a339b | 4757 | if (id == WMI_PDEV_PARAM_UNSUPPORTED) { |
7aa7a72a MK |
4758 | ath10k_warn(ar, "pdev param %d not supported by firmware\n", |
4759 | id); | |
d7579d12 | 4760 | return ERR_PTR(-EOPNOTSUPP); |
226a339b BM |
4761 | } |
4762 | ||
7aa7a72a | 4763 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 4764 | if (!skb) |
d7579d12 | 4765 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
4766 | |
4767 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; | |
4768 | cmd->param_id = __cpu_to_le32(id); | |
4769 | cmd->param_value = __cpu_to_le32(value); | |
4770 | ||
7aa7a72a | 4771 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", |
5e3dd157 | 4772 | id, value); |
d7579d12 | 4773 | return skb; |
5e3dd157 KV |
4774 | } |
4775 | ||
0226d602 MK |
4776 | void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, |
4777 | struct wmi_host_mem_chunks *chunks) | |
cf9fca8f MK |
4778 | { |
4779 | struct host_memory_chunk *chunk; | |
4780 | int i; | |
4781 | ||
4782 | chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks); | |
4783 | ||
4784 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
4785 | chunk = &chunks->items[i]; | |
4786 | chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); | |
4787 | chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len); | |
4788 | chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); | |
4789 | ||
4790 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
4791 | "wmi chunk %d len %d requested, addr 0x%llx\n", | |
4792 | i, | |
4793 | ar->wmi.mem_chunks[i].len, | |
4794 | (unsigned long long)ar->wmi.mem_chunks[i].paddr); | |
4795 | } | |
4796 | } | |
4797 | ||
d7579d12 | 4798 | static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) |
5e3dd157 KV |
4799 | { |
4800 | struct wmi_init_cmd *cmd; | |
4801 | struct sk_buff *buf; | |
4802 | struct wmi_resource_config config = {}; | |
b3effe61 | 4803 | u32 len, val; |
5e3dd157 KV |
4804 | |
4805 | config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); | |
cfd1061e | 4806 | config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS); |
5e3dd157 KV |
4807 | config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); |
4808 | ||
4809 | config.num_offload_reorder_bufs = | |
4810 | __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); | |
4811 | ||
4812 | config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); | |
4813 | config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); | |
4814 | config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); | |
4815 | config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); | |
4816 | config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); | |
4817 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
4818 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
4819 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
4820 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); | |
ccec9038 | 4821 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
5e3dd157 KV |
4822 | config.scan_max_pending_reqs = |
4823 | __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); | |
4824 | ||
4825 | config.bmiss_offload_max_vdev = | |
4826 | __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); | |
4827 | ||
4828 | config.roam_offload_max_vdev = | |
4829 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); | |
4830 | ||
4831 | config.roam_offload_max_ap_profiles = | |
4832 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
4833 | ||
4834 | config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); | |
4835 | config.num_mcast_table_elems = | |
4836 | __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); | |
4837 | ||
4838 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); | |
4839 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); | |
4840 | config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); | |
4841 | config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); | |
4842 | config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); | |
4843 | ||
4844 | val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
4845 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
4846 | ||
4847 | config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); | |
4848 | ||
4849 | config.gtk_offload_max_vdev = | |
4850 | __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); | |
4851 | ||
4852 | config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); | |
4853 | config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); | |
4854 | ||
b3effe61 BM |
4855 | len = sizeof(*cmd) + |
4856 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
4857 | ||
7aa7a72a | 4858 | buf = ath10k_wmi_alloc_skb(ar, len); |
5e3dd157 | 4859 | if (!buf) |
d7579d12 | 4860 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
4861 | |
4862 | cmd = (struct wmi_init_cmd *)buf->data; | |
b3effe61 | 4863 | |
5e3dd157 | 4864 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
cf9fca8f | 4865 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
5e3dd157 | 4866 | |
7aa7a72a | 4867 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); |
d7579d12 | 4868 | return buf; |
5e3dd157 KV |
4869 | } |
4870 | ||
d7579d12 | 4871 | static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) |
12b2b9e3 BM |
4872 | { |
4873 | struct wmi_init_cmd_10x *cmd; | |
4874 | struct sk_buff *buf; | |
4875 | struct wmi_resource_config_10x config = {}; | |
4876 | u32 len, val; | |
12b2b9e3 | 4877 | |
ec6a73f0 BM |
4878 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); |
4879 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
4880 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); | |
4881 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
4882 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); | |
4883 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
4884 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
4885 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
4886 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
4887 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
4888 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
ccec9038 | 4889 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
12b2b9e3 | 4890 | config.scan_max_pending_reqs = |
ec6a73f0 | 4891 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); |
12b2b9e3 BM |
4892 | |
4893 | config.bmiss_offload_max_vdev = | |
ec6a73f0 | 4894 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); |
12b2b9e3 BM |
4895 | |
4896 | config.roam_offload_max_vdev = | |
ec6a73f0 | 4897 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); |
12b2b9e3 BM |
4898 | |
4899 | config.roam_offload_max_ap_profiles = | |
ec6a73f0 | 4900 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); |
12b2b9e3 | 4901 | |
ec6a73f0 | 4902 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); |
12b2b9e3 | 4903 | config.num_mcast_table_elems = |
ec6a73f0 | 4904 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); |
12b2b9e3 | 4905 | |
ec6a73f0 BM |
4906 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); |
4907 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
4908 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
4909 | config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); | |
4910 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); | |
12b2b9e3 | 4911 | |
ec6a73f0 | 4912 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; |
12b2b9e3 BM |
4913 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); |
4914 | ||
ec6a73f0 | 4915 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); |
12b2b9e3 | 4916 | |
ec6a73f0 BM |
4917 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); |
4918 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
12b2b9e3 BM |
4919 | |
4920 | len = sizeof(*cmd) + | |
4921 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
4922 | ||
7aa7a72a | 4923 | buf = ath10k_wmi_alloc_skb(ar, len); |
12b2b9e3 | 4924 | if (!buf) |
d7579d12 | 4925 | return ERR_PTR(-ENOMEM); |
12b2b9e3 BM |
4926 | |
4927 | cmd = (struct wmi_init_cmd_10x *)buf->data; | |
4928 | ||
12b2b9e3 | 4929 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
cf9fca8f | 4930 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
12b2b9e3 | 4931 | |
7aa7a72a | 4932 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); |
d7579d12 | 4933 | return buf; |
12b2b9e3 BM |
4934 | } |
4935 | ||
d7579d12 | 4936 | static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) |
24c88f78 MK |
4937 | { |
4938 | struct wmi_init_cmd_10_2 *cmd; | |
4939 | struct sk_buff *buf; | |
4940 | struct wmi_resource_config_10x config = {}; | |
b6c8e287 | 4941 | u32 len, val, features; |
24c88f78 MK |
4942 | |
4943 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); | |
4944 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
4945 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); | |
4946 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
4947 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); | |
4948 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
4949 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
4950 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
4951 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
4952 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
4953 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
ccec9038 | 4954 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
24c88f78 MK |
4955 | |
4956 | config.scan_max_pending_reqs = | |
4957 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); | |
4958 | ||
4959 | config.bmiss_offload_max_vdev = | |
4960 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); | |
4961 | ||
4962 | config.roam_offload_max_vdev = | |
4963 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); | |
4964 | ||
4965 | config.roam_offload_max_ap_profiles = | |
4966 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
4967 | ||
4968 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); | |
4969 | config.num_mcast_table_elems = | |
4970 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); | |
4971 | ||
4972 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); | |
4973 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
4974 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
f6603ff2 | 4975 | config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); |
24c88f78 MK |
4976 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); |
4977 | ||
4978 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
4979 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
4980 | ||
4981 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); | |
4982 | ||
4983 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); | |
4984 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
4985 | ||
4986 | len = sizeof(*cmd) + | |
4987 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
4988 | ||
7aa7a72a | 4989 | buf = ath10k_wmi_alloc_skb(ar, len); |
24c88f78 | 4990 | if (!buf) |
d7579d12 | 4991 | return ERR_PTR(-ENOMEM); |
24c88f78 MK |
4992 | |
4993 | cmd = (struct wmi_init_cmd_10_2 *)buf->data; | |
4994 | ||
b6c8e287 | 4995 | features = WMI_10_2_RX_BATCH_MODE; |
de0c789b YL |
4996 | if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map)) |
4997 | features |= WMI_10_2_COEX_GPIO; | |
b6c8e287 SM |
4998 | cmd->resource_config.feature_mask = __cpu_to_le32(features); |
4999 | ||
24c88f78 | 5000 | memcpy(&cmd->resource_config.common, &config, sizeof(config)); |
cf9fca8f | 5001 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
24c88f78 | 5002 | |
7aa7a72a | 5003 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); |
d7579d12 | 5004 | return buf; |
5e3dd157 KV |
5005 | } |
5006 | ||
d1e52a8e RM |
5007 | static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar) |
5008 | { | |
5009 | struct wmi_init_cmd_10_4 *cmd; | |
5010 | struct sk_buff *buf; | |
5011 | struct wmi_resource_config_10_4 config = {}; | |
5012 | u32 len; | |
5013 | ||
5014 | config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs); | |
5015 | config.num_peers = __cpu_to_le32(ar->max_num_peers); | |
5016 | config.num_active_peers = __cpu_to_le32(ar->num_active_peers); | |
5017 | config.num_tids = __cpu_to_le32(ar->num_tids); | |
5018 | ||
5019 | config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS); | |
5020 | config.num_offload_reorder_buffs = | |
5021 | __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS); | |
5022 | config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS); | |
5023 | config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT); | |
5024 | config.tx_chain_mask = __cpu_to_le32(TARGET_10_4_TX_CHAIN_MASK); | |
5025 | config.rx_chain_mask = __cpu_to_le32(TARGET_10_4_RX_CHAIN_MASK); | |
5026 | ||
5027 | config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
5028 | config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
5029 | config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
5030 | config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI); | |
5031 | ||
5032 | config.rx_decap_mode = __cpu_to_le32(TARGET_10_4_RX_DECAP_MODE); | |
5033 | config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS); | |
5034 | config.bmiss_offload_max_vdev = | |
5035 | __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV); | |
5036 | config.roam_offload_max_vdev = | |
5037 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV); | |
5038 | config.roam_offload_max_ap_profiles = | |
5039 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES); | |
5040 | config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS); | |
5041 | config.num_mcast_table_elems = | |
5042 | __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS); | |
5043 | ||
5044 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE); | |
5045 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE); | |
5046 | config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES); | |
5047 | config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE); | |
5048 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM); | |
5049 | ||
5050 | config.rx_skip_defrag_timeout_dup_detection_check = | |
5051 | __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK); | |
5052 | ||
5053 | config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG); | |
5054 | config.gtk_offload_max_vdev = | |
5055 | __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV); | |
5056 | config.num_msdu_desc = __cpu_to_le32(TARGET_10_4_NUM_MSDU_DESC); | |
5057 | config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS); | |
5058 | config.max_peer_ext_stats = | |
5059 | __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS); | |
5060 | config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP); | |
5061 | ||
5062 | config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE); | |
5063 | config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE); | |
5064 | config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE); | |
5065 | config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE); | |
5066 | ||
5067 | config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE); | |
5068 | config.tt_support = | |
5069 | __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG); | |
5070 | config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG); | |
5071 | config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG); | |
5072 | config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG); | |
5073 | ||
5074 | len = sizeof(*cmd) + | |
5075 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
5076 | ||
5077 | buf = ath10k_wmi_alloc_skb(ar, len); | |
5078 | if (!buf) | |
5079 | return ERR_PTR(-ENOMEM); | |
5080 | ||
5081 | cmd = (struct wmi_init_cmd_10_4 *)buf->data; | |
5082 | memcpy(&cmd->resource_config, &config, sizeof(config)); | |
5083 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | |
5084 | ||
5085 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n"); | |
5086 | return buf; | |
5087 | } | |
5088 | ||
0226d602 | 5089 | int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) |
5e3dd157 | 5090 | { |
a6aa5da3 MK |
5091 | if (arg->ie_len && !arg->ie) |
5092 | return -EINVAL; | |
5093 | if (arg->n_channels && !arg->channels) | |
5094 | return -EINVAL; | |
5095 | if (arg->n_ssids && !arg->ssids) | |
5096 | return -EINVAL; | |
5097 | if (arg->n_bssids && !arg->bssids) | |
5098 | return -EINVAL; | |
5e3dd157 | 5099 | |
a6aa5da3 MK |
5100 | if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) |
5101 | return -EINVAL; | |
5102 | if (arg->n_channels > ARRAY_SIZE(arg->channels)) | |
5103 | return -EINVAL; | |
5104 | if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) | |
5105 | return -EINVAL; | |
5106 | if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) | |
5107 | return -EINVAL; | |
5e3dd157 | 5108 | |
a6aa5da3 MK |
5109 | return 0; |
5110 | } | |
5e3dd157 | 5111 | |
a6aa5da3 MK |
5112 | static size_t |
5113 | ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) | |
5114 | { | |
5115 | int len = 0; | |
5116 | ||
5117 | if (arg->ie_len) { | |
5e3dd157 KV |
5118 | len += sizeof(struct wmi_ie_data); |
5119 | len += roundup(arg->ie_len, 4); | |
5120 | } | |
5121 | ||
5122 | if (arg->n_channels) { | |
5e3dd157 KV |
5123 | len += sizeof(struct wmi_chan_list); |
5124 | len += sizeof(__le32) * arg->n_channels; | |
5125 | } | |
5126 | ||
5127 | if (arg->n_ssids) { | |
5e3dd157 KV |
5128 | len += sizeof(struct wmi_ssid_list); |
5129 | len += sizeof(struct wmi_ssid) * arg->n_ssids; | |
5130 | } | |
5131 | ||
5132 | if (arg->n_bssids) { | |
5e3dd157 KV |
5133 | len += sizeof(struct wmi_bssid_list); |
5134 | len += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
5135 | } | |
5136 | ||
5137 | return len; | |
5138 | } | |
5139 | ||
0226d602 MK |
5140 | void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, |
5141 | const struct wmi_start_scan_arg *arg) | |
5e3dd157 | 5142 | { |
5e3dd157 KV |
5143 | u32 scan_id; |
5144 | u32 scan_req_id; | |
5e3dd157 KV |
5145 | |
5146 | scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; | |
5147 | scan_id |= arg->scan_id; | |
5148 | ||
5149 | scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
5150 | scan_req_id |= arg->scan_req_id; | |
5151 | ||
a6aa5da3 MK |
5152 | cmn->scan_id = __cpu_to_le32(scan_id); |
5153 | cmn->scan_req_id = __cpu_to_le32(scan_req_id); | |
5154 | cmn->vdev_id = __cpu_to_le32(arg->vdev_id); | |
5155 | cmn->scan_priority = __cpu_to_le32(arg->scan_priority); | |
5156 | cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); | |
5157 | cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); | |
5158 | cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); | |
5159 | cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time); | |
5160 | cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time); | |
5161 | cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); | |
5162 | cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); | |
5163 | cmn->idle_time = __cpu_to_le32(arg->idle_time); | |
5164 | cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time); | |
5165 | cmn->probe_delay = __cpu_to_le32(arg->probe_delay); | |
5166 | cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); | |
5167 | } | |
5168 | ||
5169 | static void | |
5170 | ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, | |
5171 | const struct wmi_start_scan_arg *arg) | |
5172 | { | |
5173 | struct wmi_ie_data *ie; | |
5174 | struct wmi_chan_list *channels; | |
5175 | struct wmi_ssid_list *ssids; | |
5176 | struct wmi_bssid_list *bssids; | |
5177 | void *ptr = tlvs->tlvs; | |
5178 | int i; | |
5e3dd157 KV |
5179 | |
5180 | if (arg->n_channels) { | |
a6aa5da3 | 5181 | channels = ptr; |
5e3dd157 KV |
5182 | channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); |
5183 | channels->num_chan = __cpu_to_le32(arg->n_channels); | |
5184 | ||
5185 | for (i = 0; i < arg->n_channels; i++) | |
24c88f78 MK |
5186 | channels->channel_list[i].freq = |
5187 | __cpu_to_le16(arg->channels[i]); | |
5e3dd157 | 5188 | |
a6aa5da3 MK |
5189 | ptr += sizeof(*channels); |
5190 | ptr += sizeof(__le32) * arg->n_channels; | |
5e3dd157 KV |
5191 | } |
5192 | ||
5193 | if (arg->n_ssids) { | |
a6aa5da3 | 5194 | ssids = ptr; |
5e3dd157 KV |
5195 | ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); |
5196 | ssids->num_ssids = __cpu_to_le32(arg->n_ssids); | |
5197 | ||
5198 | for (i = 0; i < arg->n_ssids; i++) { | |
5199 | ssids->ssids[i].ssid_len = | |
5200 | __cpu_to_le32(arg->ssids[i].len); | |
5201 | memcpy(&ssids->ssids[i].ssid, | |
5202 | arg->ssids[i].ssid, | |
5203 | arg->ssids[i].len); | |
5204 | } | |
5205 | ||
a6aa5da3 MK |
5206 | ptr += sizeof(*ssids); |
5207 | ptr += sizeof(struct wmi_ssid) * arg->n_ssids; | |
5e3dd157 KV |
5208 | } |
5209 | ||
5210 | if (arg->n_bssids) { | |
a6aa5da3 | 5211 | bssids = ptr; |
5e3dd157 KV |
5212 | bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); |
5213 | bssids->num_bssid = __cpu_to_le32(arg->n_bssids); | |
5214 | ||
5215 | for (i = 0; i < arg->n_bssids; i++) | |
5216 | memcpy(&bssids->bssid_list[i], | |
5217 | arg->bssids[i].bssid, | |
5218 | ETH_ALEN); | |
5219 | ||
a6aa5da3 MK |
5220 | ptr += sizeof(*bssids); |
5221 | ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
5e3dd157 KV |
5222 | } |
5223 | ||
5224 | if (arg->ie_len) { | |
a6aa5da3 | 5225 | ie = ptr; |
5e3dd157 KV |
5226 | ie->tag = __cpu_to_le32(WMI_IE_TAG); |
5227 | ie->ie_len = __cpu_to_le32(arg->ie_len); | |
5228 | memcpy(ie->ie_data, arg->ie, arg->ie_len); | |
5229 | ||
a6aa5da3 MK |
5230 | ptr += sizeof(*ie); |
5231 | ptr += roundup(arg->ie_len, 4); | |
5e3dd157 | 5232 | } |
a6aa5da3 | 5233 | } |
5e3dd157 | 5234 | |
d7579d12 MK |
5235 | static struct sk_buff * |
5236 | ath10k_wmi_op_gen_start_scan(struct ath10k *ar, | |
5237 | const struct wmi_start_scan_arg *arg) | |
a6aa5da3 | 5238 | { |
d7579d12 | 5239 | struct wmi_start_scan_cmd *cmd; |
a6aa5da3 MK |
5240 | struct sk_buff *skb; |
5241 | size_t len; | |
5242 | int ret; | |
5243 | ||
5244 | ret = ath10k_wmi_start_scan_verify(arg); | |
5245 | if (ret) | |
d7579d12 | 5246 | return ERR_PTR(ret); |
a6aa5da3 | 5247 | |
d7579d12 | 5248 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); |
a6aa5da3 MK |
5249 | skb = ath10k_wmi_alloc_skb(ar, len); |
5250 | if (!skb) | |
d7579d12 | 5251 | return ERR_PTR(-ENOMEM); |
a6aa5da3 | 5252 | |
d7579d12 | 5253 | cmd = (struct wmi_start_scan_cmd *)skb->data; |
a6aa5da3 | 5254 | |
d7579d12 MK |
5255 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); |
5256 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
a6aa5da3 | 5257 | |
d7579d12 | 5258 | cmd->burst_duration_ms = __cpu_to_le32(0); |
5e3dd157 | 5259 | |
7aa7a72a | 5260 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); |
d7579d12 MK |
5261 | return skb; |
5262 | } | |
5263 | ||
5264 | static struct sk_buff * | |
5265 | ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, | |
5266 | const struct wmi_start_scan_arg *arg) | |
5267 | { | |
5268 | struct wmi_10x_start_scan_cmd *cmd; | |
5269 | struct sk_buff *skb; | |
5270 | size_t len; | |
5271 | int ret; | |
5272 | ||
5273 | ret = ath10k_wmi_start_scan_verify(arg); | |
5274 | if (ret) | |
5275 | return ERR_PTR(ret); | |
5276 | ||
5277 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); | |
5278 | skb = ath10k_wmi_alloc_skb(ar, len); | |
5279 | if (!skb) | |
5280 | return ERR_PTR(-ENOMEM); | |
5281 | ||
5282 | cmd = (struct wmi_10x_start_scan_cmd *)skb->data; | |
5283 | ||
5284 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | |
5285 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
5286 | ||
5287 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); | |
5288 | return skb; | |
5e3dd157 KV |
5289 | } |
5290 | ||
5291 | void ath10k_wmi_start_scan_init(struct ath10k *ar, | |
5292 | struct wmi_start_scan_arg *arg) | |
5293 | { | |
5294 | /* setup commonly used values */ | |
5295 | arg->scan_req_id = 1; | |
5296 | arg->scan_priority = WMI_SCAN_PRIORITY_LOW; | |
5297 | arg->dwell_time_active = 50; | |
5298 | arg->dwell_time_passive = 150; | |
5299 | arg->min_rest_time = 50; | |
5300 | arg->max_rest_time = 500; | |
5301 | arg->repeat_probe_time = 0; | |
5302 | arg->probe_spacing_time = 0; | |
5303 | arg->idle_time = 0; | |
c322892f | 5304 | arg->max_scan_time = 20000; |
5e3dd157 KV |
5305 | arg->probe_delay = 5; |
5306 | arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | |
5307 | | WMI_SCAN_EVENT_COMPLETED | |
5308 | | WMI_SCAN_EVENT_BSS_CHANNEL | |
5309 | | WMI_SCAN_EVENT_FOREIGN_CHANNEL | |
5310 | | WMI_SCAN_EVENT_DEQUEUED; | |
5e3dd157 KV |
5311 | arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; |
5312 | arg->n_bssids = 1; | |
5313 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; | |
5314 | } | |
5315 | ||
d7579d12 MK |
5316 | static struct sk_buff * |
5317 | ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, | |
5318 | const struct wmi_stop_scan_arg *arg) | |
5e3dd157 KV |
5319 | { |
5320 | struct wmi_stop_scan_cmd *cmd; | |
5321 | struct sk_buff *skb; | |
5322 | u32 scan_id; | |
5323 | u32 req_id; | |
5324 | ||
5325 | if (arg->req_id > 0xFFF) | |
d7579d12 | 5326 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5327 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) |
d7579d12 | 5328 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5329 | |
7aa7a72a | 5330 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5331 | if (!skb) |
d7579d12 | 5332 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5333 | |
5334 | scan_id = arg->u.scan_id; | |
5335 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; | |
5336 | ||
5337 | req_id = arg->req_id; | |
5338 | req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
5339 | ||
5340 | cmd = (struct wmi_stop_scan_cmd *)skb->data; | |
5341 | cmd->req_type = __cpu_to_le32(arg->req_type); | |
5342 | cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); | |
5343 | cmd->scan_id = __cpu_to_le32(scan_id); | |
5344 | cmd->scan_req_id = __cpu_to_le32(req_id); | |
5345 | ||
7aa7a72a | 5346 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5347 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", |
5348 | arg->req_id, arg->req_type, arg->u.scan_id); | |
d7579d12 | 5349 | return skb; |
5e3dd157 KV |
5350 | } |
5351 | ||
d7579d12 MK |
5352 | static struct sk_buff * |
5353 | ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, | |
5354 | enum wmi_vdev_type type, | |
5355 | enum wmi_vdev_subtype subtype, | |
5356 | const u8 macaddr[ETH_ALEN]) | |
5e3dd157 KV |
5357 | { |
5358 | struct wmi_vdev_create_cmd *cmd; | |
5359 | struct sk_buff *skb; | |
5360 | ||
7aa7a72a | 5361 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5362 | if (!skb) |
d7579d12 | 5363 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5364 | |
5365 | cmd = (struct wmi_vdev_create_cmd *)skb->data; | |
5366 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5367 | cmd->vdev_type = __cpu_to_le32(type); | |
5368 | cmd->vdev_subtype = __cpu_to_le32(subtype); | |
b25f32cb | 5369 | ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); |
5e3dd157 | 5370 | |
7aa7a72a | 5371 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5372 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", |
5373 | vdev_id, type, subtype, macaddr); | |
d7579d12 | 5374 | return skb; |
5e3dd157 KV |
5375 | } |
5376 | ||
d7579d12 MK |
5377 | static struct sk_buff * |
5378 | ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) | |
5e3dd157 KV |
5379 | { |
5380 | struct wmi_vdev_delete_cmd *cmd; | |
5381 | struct sk_buff *skb; | |
5382 | ||
7aa7a72a | 5383 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5384 | if (!skb) |
d7579d12 | 5385 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5386 | |
5387 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; | |
5388 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5389 | ||
7aa7a72a | 5390 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 | 5391 | "WMI vdev delete id %d\n", vdev_id); |
d7579d12 | 5392 | return skb; |
5e3dd157 KV |
5393 | } |
5394 | ||
d7579d12 MK |
5395 | static struct sk_buff * |
5396 | ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, | |
5397 | const struct wmi_vdev_start_request_arg *arg, | |
5398 | bool restart) | |
5e3dd157 KV |
5399 | { |
5400 | struct wmi_vdev_start_request_cmd *cmd; | |
5401 | struct sk_buff *skb; | |
5402 | const char *cmdname; | |
5403 | u32 flags = 0; | |
5404 | ||
5e3dd157 | 5405 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) |
d7579d12 | 5406 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5407 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) |
d7579d12 | 5408 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5409 | |
d7579d12 | 5410 | if (restart) |
5e3dd157 KV |
5411 | cmdname = "restart"; |
5412 | else | |
d7579d12 | 5413 | cmdname = "start"; |
5e3dd157 | 5414 | |
7aa7a72a | 5415 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5416 | if (!skb) |
d7579d12 | 5417 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5418 | |
5419 | if (arg->hidden_ssid) | |
5420 | flags |= WMI_VDEV_START_HIDDEN_SSID; | |
5421 | if (arg->pmf_enabled) | |
5422 | flags |= WMI_VDEV_START_PMF_ENABLED; | |
5423 | ||
5424 | cmd = (struct wmi_vdev_start_request_cmd *)skb->data; | |
5425 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
5426 | cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); | |
5427 | cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); | |
5428 | cmd->dtim_period = __cpu_to_le32(arg->dtim_period); | |
5429 | cmd->flags = __cpu_to_le32(flags); | |
5430 | cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); | |
5431 | cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); | |
5432 | ||
5433 | if (arg->ssid) { | |
5434 | cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); | |
5435 | memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); | |
5436 | } | |
5437 | ||
2d66721c | 5438 | ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); |
5e3dd157 | 5439 | |
7aa7a72a | 5440 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
8cc7f26c KV |
5441 | "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", |
5442 | cmdname, arg->vdev_id, | |
e8a50f8b MP |
5443 | flags, arg->channel.freq, arg->channel.mode, |
5444 | cmd->chan.flags, arg->channel.max_power); | |
5e3dd157 | 5445 | |
d7579d12 | 5446 | return skb; |
5e3dd157 KV |
5447 | } |
5448 | ||
d7579d12 MK |
5449 | static struct sk_buff * |
5450 | ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) | |
5e3dd157 KV |
5451 | { |
5452 | struct wmi_vdev_stop_cmd *cmd; | |
5453 | struct sk_buff *skb; | |
5454 | ||
7aa7a72a | 5455 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5456 | if (!skb) |
d7579d12 | 5457 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5458 | |
5459 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; | |
5460 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5461 | ||
7aa7a72a | 5462 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); |
d7579d12 | 5463 | return skb; |
5e3dd157 KV |
5464 | } |
5465 | ||
d7579d12 MK |
5466 | static struct sk_buff * |
5467 | ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, | |
5468 | const u8 *bssid) | |
5e3dd157 KV |
5469 | { |
5470 | struct wmi_vdev_up_cmd *cmd; | |
5471 | struct sk_buff *skb; | |
5472 | ||
7aa7a72a | 5473 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5474 | if (!skb) |
d7579d12 | 5475 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5476 | |
5477 | cmd = (struct wmi_vdev_up_cmd *)skb->data; | |
5478 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5479 | cmd->vdev_assoc_id = __cpu_to_le32(aid); | |
b25f32cb | 5480 | ether_addr_copy(cmd->vdev_bssid.addr, bssid); |
5e3dd157 | 5481 | |
7aa7a72a | 5482 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5483 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", |
5484 | vdev_id, aid, bssid); | |
d7579d12 | 5485 | return skb; |
5e3dd157 KV |
5486 | } |
5487 | ||
d7579d12 MK |
5488 | static struct sk_buff * |
5489 | ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) | |
5e3dd157 KV |
5490 | { |
5491 | struct wmi_vdev_down_cmd *cmd; | |
5492 | struct sk_buff *skb; | |
5493 | ||
7aa7a72a | 5494 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5495 | if (!skb) |
d7579d12 | 5496 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5497 | |
5498 | cmd = (struct wmi_vdev_down_cmd *)skb->data; | |
5499 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5500 | ||
7aa7a72a | 5501 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 | 5502 | "wmi mgmt vdev down id 0x%x\n", vdev_id); |
d7579d12 | 5503 | return skb; |
5e3dd157 KV |
5504 | } |
5505 | ||
d7579d12 MK |
5506 | static struct sk_buff * |
5507 | ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |
5508 | u32 param_id, u32 param_value) | |
5e3dd157 KV |
5509 | { |
5510 | struct wmi_vdev_set_param_cmd *cmd; | |
5511 | struct sk_buff *skb; | |
5512 | ||
6d1506e7 | 5513 | if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { |
7aa7a72a | 5514 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
6d1506e7 BM |
5515 | "vdev param %d not supported by firmware\n", |
5516 | param_id); | |
d7579d12 | 5517 | return ERR_PTR(-EOPNOTSUPP); |
6d1506e7 BM |
5518 | } |
5519 | ||
7aa7a72a | 5520 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5521 | if (!skb) |
d7579d12 | 5522 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5523 | |
5524 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; | |
5525 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5526 | cmd->param_id = __cpu_to_le32(param_id); | |
5527 | cmd->param_value = __cpu_to_le32(param_value); | |
5528 | ||
7aa7a72a | 5529 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5530 | "wmi vdev id 0x%x set param %d value %d\n", |
5531 | vdev_id, param_id, param_value); | |
d7579d12 | 5532 | return skb; |
5e3dd157 KV |
5533 | } |
5534 | ||
d7579d12 MK |
5535 | static struct sk_buff * |
5536 | ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, | |
5537 | const struct wmi_vdev_install_key_arg *arg) | |
5e3dd157 KV |
5538 | { |
5539 | struct wmi_vdev_install_key_cmd *cmd; | |
5540 | struct sk_buff *skb; | |
5541 | ||
5542 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) | |
d7579d12 | 5543 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5544 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) |
d7579d12 | 5545 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5546 | |
7aa7a72a | 5547 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); |
5e3dd157 | 5548 | if (!skb) |
d7579d12 | 5549 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5550 | |
5551 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; | |
5552 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
5553 | cmd->key_idx = __cpu_to_le32(arg->key_idx); | |
5554 | cmd->key_flags = __cpu_to_le32(arg->key_flags); | |
5555 | cmd->key_cipher = __cpu_to_le32(arg->key_cipher); | |
5556 | cmd->key_len = __cpu_to_le32(arg->key_len); | |
5557 | cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); | |
5558 | cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); | |
5559 | ||
5560 | if (arg->macaddr) | |
b25f32cb | 5561 | ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); |
5e3dd157 KV |
5562 | if (arg->key_data) |
5563 | memcpy(cmd->key_data, arg->key_data, arg->key_len); | |
5564 | ||
7aa7a72a | 5565 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
e0c508ab MK |
5566 | "wmi vdev install key idx %d cipher %d len %d\n", |
5567 | arg->key_idx, arg->key_cipher, arg->key_len); | |
d7579d12 | 5568 | return skb; |
5e3dd157 KV |
5569 | } |
5570 | ||
d7579d12 MK |
5571 | static struct sk_buff * |
5572 | ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, | |
5573 | const struct wmi_vdev_spectral_conf_arg *arg) | |
855aed12 SW |
5574 | { |
5575 | struct wmi_vdev_spectral_conf_cmd *cmd; | |
5576 | struct sk_buff *skb; | |
855aed12 | 5577 | |
7aa7a72a | 5578 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
855aed12 | 5579 | if (!skb) |
d7579d12 | 5580 | return ERR_PTR(-ENOMEM); |
855aed12 SW |
5581 | |
5582 | cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; | |
5583 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
5584 | cmd->scan_count = __cpu_to_le32(arg->scan_count); | |
5585 | cmd->scan_period = __cpu_to_le32(arg->scan_period); | |
5586 | cmd->scan_priority = __cpu_to_le32(arg->scan_priority); | |
5587 | cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); | |
5588 | cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); | |
5589 | cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); | |
5590 | cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); | |
5591 | cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); | |
5592 | cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); | |
5593 | cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); | |
5594 | cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); | |
5595 | cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); | |
5596 | cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); | |
5597 | cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); | |
5598 | cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); | |
5599 | cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); | |
5600 | cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); | |
5601 | cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); | |
5602 | ||
d7579d12 | 5603 | return skb; |
855aed12 SW |
5604 | } |
5605 | ||
d7579d12 MK |
5606 | static struct sk_buff * |
5607 | ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, | |
5608 | u32 trigger, u32 enable) | |
855aed12 SW |
5609 | { |
5610 | struct wmi_vdev_spectral_enable_cmd *cmd; | |
5611 | struct sk_buff *skb; | |
855aed12 | 5612 | |
7aa7a72a | 5613 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
855aed12 | 5614 | if (!skb) |
d7579d12 | 5615 | return ERR_PTR(-ENOMEM); |
855aed12 SW |
5616 | |
5617 | cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; | |
5618 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5619 | cmd->trigger_cmd = __cpu_to_le32(trigger); | |
5620 | cmd->enable_cmd = __cpu_to_le32(enable); | |
5621 | ||
d7579d12 | 5622 | return skb; |
855aed12 SW |
5623 | } |
5624 | ||
d7579d12 MK |
5625 | static struct sk_buff * |
5626 | ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, | |
7390ed34 MP |
5627 | const u8 peer_addr[ETH_ALEN], |
5628 | enum wmi_peer_type peer_type) | |
5e3dd157 KV |
5629 | { |
5630 | struct wmi_peer_create_cmd *cmd; | |
5631 | struct sk_buff *skb; | |
5632 | ||
7aa7a72a | 5633 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5634 | if (!skb) |
d7579d12 | 5635 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5636 | |
5637 | cmd = (struct wmi_peer_create_cmd *)skb->data; | |
5638 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
b25f32cb | 5639 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 5640 | |
7aa7a72a | 5641 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5642 | "wmi peer create vdev_id %d peer_addr %pM\n", |
5643 | vdev_id, peer_addr); | |
d7579d12 | 5644 | return skb; |
5e3dd157 KV |
5645 | } |
5646 | ||
d7579d12 MK |
5647 | static struct sk_buff * |
5648 | ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, | |
5649 | const u8 peer_addr[ETH_ALEN]) | |
5e3dd157 KV |
5650 | { |
5651 | struct wmi_peer_delete_cmd *cmd; | |
5652 | struct sk_buff *skb; | |
5653 | ||
7aa7a72a | 5654 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5655 | if (!skb) |
d7579d12 | 5656 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5657 | |
5658 | cmd = (struct wmi_peer_delete_cmd *)skb->data; | |
5659 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
b25f32cb | 5660 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 5661 | |
7aa7a72a | 5662 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5663 | "wmi peer delete vdev_id %d peer_addr %pM\n", |
5664 | vdev_id, peer_addr); | |
d7579d12 | 5665 | return skb; |
5e3dd157 KV |
5666 | } |
5667 | ||
d7579d12 MK |
5668 | static struct sk_buff * |
5669 | ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, | |
5670 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | |
5e3dd157 KV |
5671 | { |
5672 | struct wmi_peer_flush_tids_cmd *cmd; | |
5673 | struct sk_buff *skb; | |
5674 | ||
7aa7a72a | 5675 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5676 | if (!skb) |
d7579d12 | 5677 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5678 | |
5679 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; | |
5680 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5681 | cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); | |
b25f32cb | 5682 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 5683 | |
7aa7a72a | 5684 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5685 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", |
5686 | vdev_id, peer_addr, tid_bitmap); | |
d7579d12 | 5687 | return skb; |
5e3dd157 KV |
5688 | } |
5689 | ||
d7579d12 MK |
5690 | static struct sk_buff * |
5691 | ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, | |
5692 | const u8 *peer_addr, | |
5693 | enum wmi_peer_param param_id, | |
5694 | u32 param_value) | |
5e3dd157 KV |
5695 | { |
5696 | struct wmi_peer_set_param_cmd *cmd; | |
5697 | struct sk_buff *skb; | |
5698 | ||
7aa7a72a | 5699 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5700 | if (!skb) |
d7579d12 | 5701 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5702 | |
5703 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; | |
5704 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5705 | cmd->param_id = __cpu_to_le32(param_id); | |
5706 | cmd->param_value = __cpu_to_le32(param_value); | |
b25f32cb | 5707 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 5708 | |
7aa7a72a | 5709 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5710 | "wmi vdev %d peer 0x%pM set param %d value %d\n", |
5711 | vdev_id, peer_addr, param_id, param_value); | |
d7579d12 | 5712 | return skb; |
5e3dd157 KV |
5713 | } |
5714 | ||
d7579d12 MK |
5715 | static struct sk_buff * |
5716 | ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, | |
5717 | enum wmi_sta_ps_mode psmode) | |
5e3dd157 KV |
5718 | { |
5719 | struct wmi_sta_powersave_mode_cmd *cmd; | |
5720 | struct sk_buff *skb; | |
5721 | ||
7aa7a72a | 5722 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5723 | if (!skb) |
d7579d12 | 5724 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5725 | |
5726 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; | |
5727 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5728 | cmd->sta_ps_mode = __cpu_to_le32(psmode); | |
5729 | ||
7aa7a72a | 5730 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5731 | "wmi set powersave id 0x%x mode %d\n", |
5732 | vdev_id, psmode); | |
d7579d12 | 5733 | return skb; |
5e3dd157 KV |
5734 | } |
5735 | ||
d7579d12 MK |
5736 | static struct sk_buff * |
5737 | ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, | |
5738 | enum wmi_sta_powersave_param param_id, | |
5739 | u32 value) | |
5e3dd157 KV |
5740 | { |
5741 | struct wmi_sta_powersave_param_cmd *cmd; | |
5742 | struct sk_buff *skb; | |
5743 | ||
7aa7a72a | 5744 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5745 | if (!skb) |
d7579d12 | 5746 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5747 | |
5748 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; | |
5749 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5750 | cmd->param_id = __cpu_to_le32(param_id); | |
5751 | cmd->param_value = __cpu_to_le32(value); | |
5752 | ||
7aa7a72a | 5753 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5754 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", |
5755 | vdev_id, param_id, value); | |
d7579d12 | 5756 | return skb; |
5e3dd157 KV |
5757 | } |
5758 | ||
d7579d12 MK |
5759 | static struct sk_buff * |
5760 | ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
5761 | enum wmi_ap_ps_peer_param param_id, u32 value) | |
5e3dd157 KV |
5762 | { |
5763 | struct wmi_ap_ps_peer_cmd *cmd; | |
5764 | struct sk_buff *skb; | |
5765 | ||
5766 | if (!mac) | |
d7579d12 | 5767 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5768 | |
7aa7a72a | 5769 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5770 | if (!skb) |
d7579d12 | 5771 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5772 | |
5773 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; | |
5774 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5775 | cmd->param_id = __cpu_to_le32(param_id); | |
5776 | cmd->param_value = __cpu_to_le32(value); | |
b25f32cb | 5777 | ether_addr_copy(cmd->peer_macaddr.addr, mac); |
5e3dd157 | 5778 | |
7aa7a72a | 5779 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5780 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", |
5781 | vdev_id, param_id, value, mac); | |
d7579d12 | 5782 | return skb; |
5e3dd157 KV |
5783 | } |
5784 | ||
d7579d12 MK |
5785 | static struct sk_buff * |
5786 | ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, | |
5787 | const struct wmi_scan_chan_list_arg *arg) | |
5e3dd157 KV |
5788 | { |
5789 | struct wmi_scan_chan_list_cmd *cmd; | |
5790 | struct sk_buff *skb; | |
5791 | struct wmi_channel_arg *ch; | |
5792 | struct wmi_channel *ci; | |
5793 | int len; | |
5794 | int i; | |
5795 | ||
5796 | len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); | |
5797 | ||
7aa7a72a | 5798 | skb = ath10k_wmi_alloc_skb(ar, len); |
5e3dd157 | 5799 | if (!skb) |
d7579d12 | 5800 | return ERR_PTR(-EINVAL); |
5e3dd157 KV |
5801 | |
5802 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; | |
5803 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); | |
5804 | ||
5805 | for (i = 0; i < arg->n_channels; i++) { | |
5e3dd157 KV |
5806 | ch = &arg->channels[i]; |
5807 | ci = &cmd->chan_info[i]; | |
5808 | ||
2d66721c | 5809 | ath10k_wmi_put_wmi_channel(ci, ch); |
5e3dd157 KV |
5810 | } |
5811 | ||
d7579d12 | 5812 | return skb; |
5e3dd157 KV |
5813 | } |
5814 | ||
24c88f78 MK |
5815 | static void |
5816 | ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, | |
5817 | const struct wmi_peer_assoc_complete_arg *arg) | |
5e3dd157 | 5818 | { |
24c88f78 | 5819 | struct wmi_common_peer_assoc_complete_cmd *cmd = buf; |
5e3dd157 | 5820 | |
5e3dd157 KV |
5821 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); |
5822 | cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); | |
5823 | cmd->peer_associd = __cpu_to_le32(arg->peer_aid); | |
5824 | cmd->peer_flags = __cpu_to_le32(arg->peer_flags); | |
5825 | cmd->peer_caps = __cpu_to_le32(arg->peer_caps); | |
5826 | cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); | |
5827 | cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); | |
5828 | cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); | |
5829 | cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); | |
5830 | cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); | |
5831 | cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); | |
5832 | cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); | |
5833 | cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); | |
5834 | ||
b25f32cb | 5835 | ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); |
5e3dd157 KV |
5836 | |
5837 | cmd->peer_legacy_rates.num_rates = | |
5838 | __cpu_to_le32(arg->peer_legacy_rates.num_rates); | |
5839 | memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, | |
5840 | arg->peer_legacy_rates.num_rates); | |
5841 | ||
5842 | cmd->peer_ht_rates.num_rates = | |
5843 | __cpu_to_le32(arg->peer_ht_rates.num_rates); | |
5844 | memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, | |
5845 | arg->peer_ht_rates.num_rates); | |
5846 | ||
5847 | cmd->peer_vht_rates.rx_max_rate = | |
5848 | __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); | |
5849 | cmd->peer_vht_rates.rx_mcs_set = | |
5850 | __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); | |
5851 | cmd->peer_vht_rates.tx_max_rate = | |
5852 | __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); | |
5853 | cmd->peer_vht_rates.tx_mcs_set = | |
5854 | __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); | |
24c88f78 MK |
5855 | } |
5856 | ||
5857 | static void | |
5858 | ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, | |
5859 | const struct wmi_peer_assoc_complete_arg *arg) | |
5860 | { | |
5861 | struct wmi_main_peer_assoc_complete_cmd *cmd = buf; | |
5862 | ||
5863 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
5864 | memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); | |
5865 | } | |
5866 | ||
5867 | static void | |
5868 | ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, | |
5869 | const struct wmi_peer_assoc_complete_arg *arg) | |
5870 | { | |
5871 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
5872 | } | |
5873 | ||
5874 | static void | |
5875 | ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, | |
5876 | const struct wmi_peer_assoc_complete_arg *arg) | |
5877 | { | |
5878 | struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; | |
5879 | int max_mcs, max_nss; | |
5880 | u32 info0; | |
5881 | ||
5882 | /* TODO: Is using max values okay with firmware? */ | |
5883 | max_mcs = 0xf; | |
5884 | max_nss = 0xf; | |
5885 | ||
5886 | info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | | |
5887 | SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); | |
5888 | ||
5889 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
5890 | cmd->info0 = __cpu_to_le32(info0); | |
5891 | } | |
5892 | ||
d7579d12 MK |
5893 | static int |
5894 | ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) | |
24c88f78 | 5895 | { |
24c88f78 MK |
5896 | if (arg->peer_mpdu_density > 16) |
5897 | return -EINVAL; | |
5898 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) | |
5899 | return -EINVAL; | |
5900 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) | |
5901 | return -EINVAL; | |
5902 | ||
d7579d12 MK |
5903 | return 0; |
5904 | } | |
5905 | ||
5906 | static struct sk_buff * | |
5907 | ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, | |
5908 | const struct wmi_peer_assoc_complete_arg *arg) | |
5909 | { | |
5910 | size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); | |
5911 | struct sk_buff *skb; | |
5912 | int ret; | |
5913 | ||
5914 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
5915 | if (ret) | |
5916 | return ERR_PTR(ret); | |
24c88f78 | 5917 | |
7aa7a72a | 5918 | skb = ath10k_wmi_alloc_skb(ar, len); |
24c88f78 | 5919 | if (!skb) |
d7579d12 | 5920 | return ERR_PTR(-ENOMEM); |
24c88f78 | 5921 | |
d7579d12 MK |
5922 | ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); |
5923 | ||
5924 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
5925 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
5926 | arg->vdev_id, arg->addr, | |
5927 | arg->peer_reassoc ? "reassociate" : "new"); | |
5928 | return skb; | |
5929 | } | |
5930 | ||
5931 | static struct sk_buff * | |
5932 | ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, | |
5933 | const struct wmi_peer_assoc_complete_arg *arg) | |
5934 | { | |
5935 | size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); | |
5936 | struct sk_buff *skb; | |
5937 | int ret; | |
5938 | ||
5939 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
5940 | if (ret) | |
5941 | return ERR_PTR(ret); | |
5942 | ||
5943 | skb = ath10k_wmi_alloc_skb(ar, len); | |
5944 | if (!skb) | |
5945 | return ERR_PTR(-ENOMEM); | |
5946 | ||
5947 | ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); | |
5948 | ||
5949 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
5950 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
5951 | arg->vdev_id, arg->addr, | |
5952 | arg->peer_reassoc ? "reassociate" : "new"); | |
5953 | return skb; | |
5954 | } | |
5955 | ||
5956 | static struct sk_buff * | |
5957 | ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, | |
5958 | const struct wmi_peer_assoc_complete_arg *arg) | |
5959 | { | |
5960 | size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); | |
5961 | struct sk_buff *skb; | |
5962 | int ret; | |
5963 | ||
5964 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
5965 | if (ret) | |
5966 | return ERR_PTR(ret); | |
5967 | ||
5968 | skb = ath10k_wmi_alloc_skb(ar, len); | |
5969 | if (!skb) | |
5970 | return ERR_PTR(-ENOMEM); | |
5971 | ||
5972 | ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); | |
5e3dd157 | 5973 | |
7aa7a72a | 5974 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
44d6fa90 CYY |
5975 | "wmi peer assoc vdev %d addr %pM (%s)\n", |
5976 | arg->vdev_id, arg->addr, | |
5977 | arg->peer_reassoc ? "reassociate" : "new"); | |
d7579d12 | 5978 | return skb; |
5e3dd157 KV |
5979 | } |
5980 | ||
a57a6a27 RM |
5981 | static struct sk_buff * |
5982 | ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) | |
5983 | { | |
5984 | struct sk_buff *skb; | |
5985 | ||
5986 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
5987 | if (!skb) | |
5988 | return ERR_PTR(-ENOMEM); | |
5989 | ||
5990 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); | |
5991 | return skb; | |
5992 | } | |
5993 | ||
748afc47 | 5994 | /* This function assumes the beacon is already DMA mapped */ |
d7579d12 | 5995 | static struct sk_buff * |
9ad50182 MK |
5996 | ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, |
5997 | size_t bcn_len, u32 bcn_paddr, bool dtim_zero, | |
5998 | bool deliver_cab) | |
5e3dd157 | 5999 | { |
748afc47 | 6000 | struct wmi_bcn_tx_ref_cmd *cmd; |
5e3dd157 | 6001 | struct sk_buff *skb; |
748afc47 | 6002 | struct ieee80211_hdr *hdr; |
748afc47 | 6003 | u16 fc; |
5e3dd157 | 6004 | |
7aa7a72a | 6005 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6006 | if (!skb) |
d7579d12 | 6007 | return ERR_PTR(-ENOMEM); |
5e3dd157 | 6008 | |
9ad50182 | 6009 | hdr = (struct ieee80211_hdr *)bcn; |
748afc47 MK |
6010 | fc = le16_to_cpu(hdr->frame_control); |
6011 | ||
6012 | cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; | |
9ad50182 MK |
6013 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
6014 | cmd->data_len = __cpu_to_le32(bcn_len); | |
6015 | cmd->data_ptr = __cpu_to_le32(bcn_paddr); | |
748afc47 MK |
6016 | cmd->msdu_id = 0; |
6017 | cmd->frame_control = __cpu_to_le32(fc); | |
6018 | cmd->flags = 0; | |
24c88f78 | 6019 | cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); |
748afc47 | 6020 | |
9ad50182 | 6021 | if (dtim_zero) |
748afc47 MK |
6022 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); |
6023 | ||
9ad50182 | 6024 | if (deliver_cab) |
748afc47 MK |
6025 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); |
6026 | ||
d7579d12 | 6027 | return skb; |
5e3dd157 KV |
6028 | } |
6029 | ||
5e752e42 MK |
6030 | void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, |
6031 | const struct wmi_wmm_params_arg *arg) | |
5e3dd157 KV |
6032 | { |
6033 | params->cwmin = __cpu_to_le32(arg->cwmin); | |
6034 | params->cwmax = __cpu_to_le32(arg->cwmax); | |
6035 | params->aifs = __cpu_to_le32(arg->aifs); | |
6036 | params->txop = __cpu_to_le32(arg->txop); | |
6037 | params->acm = __cpu_to_le32(arg->acm); | |
6038 | params->no_ack = __cpu_to_le32(arg->no_ack); | |
6039 | } | |
6040 | ||
d7579d12 MK |
6041 | static struct sk_buff * |
6042 | ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, | |
5e752e42 | 6043 | const struct wmi_wmm_params_all_arg *arg) |
5e3dd157 KV |
6044 | { |
6045 | struct wmi_pdev_set_wmm_params *cmd; | |
6046 | struct sk_buff *skb; | |
6047 | ||
7aa7a72a | 6048 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6049 | if (!skb) |
d7579d12 | 6050 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6051 | |
6052 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; | |
5e752e42 MK |
6053 | ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); |
6054 | ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); | |
6055 | ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); | |
6056 | ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); | |
5e3dd157 | 6057 | |
7aa7a72a | 6058 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); |
d7579d12 | 6059 | return skb; |
5e3dd157 KV |
6060 | } |
6061 | ||
d7579d12 | 6062 | static struct sk_buff * |
de23d3ef | 6063 | ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask) |
5e3dd157 KV |
6064 | { |
6065 | struct wmi_request_stats_cmd *cmd; | |
6066 | struct sk_buff *skb; | |
6067 | ||
7aa7a72a | 6068 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6069 | if (!skb) |
d7579d12 | 6070 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6071 | |
6072 | cmd = (struct wmi_request_stats_cmd *)skb->data; | |
de23d3ef | 6073 | cmd->stats_id = __cpu_to_le32(stats_mask); |
5e3dd157 | 6074 | |
de23d3ef MK |
6075 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n", |
6076 | stats_mask); | |
d7579d12 | 6077 | return skb; |
5e3dd157 | 6078 | } |
9cfbce75 | 6079 | |
d7579d12 MK |
6080 | static struct sk_buff * |
6081 | ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, | |
6082 | enum wmi_force_fw_hang_type type, u32 delay_ms) | |
9cfbce75 MK |
6083 | { |
6084 | struct wmi_force_fw_hang_cmd *cmd; | |
6085 | struct sk_buff *skb; | |
6086 | ||
7aa7a72a | 6087 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
9cfbce75 | 6088 | if (!skb) |
d7579d12 | 6089 | return ERR_PTR(-ENOMEM); |
9cfbce75 MK |
6090 | |
6091 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; | |
6092 | cmd->type = __cpu_to_le32(type); | |
6093 | cmd->delay_ms = __cpu_to_le32(delay_ms); | |
6094 | ||
7aa7a72a | 6095 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", |
9cfbce75 | 6096 | type, delay_ms); |
d7579d12 | 6097 | return skb; |
9cfbce75 | 6098 | } |
f118a3e5 | 6099 | |
d7579d12 | 6100 | static struct sk_buff * |
467210a6 SJ |
6101 | ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable, |
6102 | u32 log_level) | |
f118a3e5 KV |
6103 | { |
6104 | struct wmi_dbglog_cfg_cmd *cmd; | |
6105 | struct sk_buff *skb; | |
6106 | u32 cfg; | |
6107 | ||
7aa7a72a | 6108 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
f118a3e5 | 6109 | if (!skb) |
d7579d12 | 6110 | return ERR_PTR(-ENOMEM); |
f118a3e5 KV |
6111 | |
6112 | cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; | |
6113 | ||
6114 | if (module_enable) { | |
467210a6 | 6115 | cfg = SM(log_level, |
f118a3e5 KV |
6116 | ATH10K_DBGLOG_CFG_LOG_LVL); |
6117 | } else { | |
6118 | /* set back defaults, all modules with WARN level */ | |
6119 | cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, | |
6120 | ATH10K_DBGLOG_CFG_LOG_LVL); | |
6121 | module_enable = ~0; | |
6122 | } | |
6123 | ||
6124 | cmd->module_enable = __cpu_to_le32(module_enable); | |
6125 | cmd->module_valid = __cpu_to_le32(~0); | |
6126 | cmd->config_enable = __cpu_to_le32(cfg); | |
6127 | cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); | |
6128 | ||
7aa7a72a | 6129 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
f118a3e5 KV |
6130 | "wmi dbglog cfg modules %08x %08x config %08x %08x\n", |
6131 | __le32_to_cpu(cmd->module_enable), | |
6132 | __le32_to_cpu(cmd->module_valid), | |
6133 | __le32_to_cpu(cmd->config_enable), | |
6134 | __le32_to_cpu(cmd->config_valid)); | |
d7579d12 | 6135 | return skb; |
f118a3e5 | 6136 | } |
b79b9baa | 6137 | |
d7579d12 MK |
6138 | static struct sk_buff * |
6139 | ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) | |
90174455 RM |
6140 | { |
6141 | struct wmi_pdev_pktlog_enable_cmd *cmd; | |
6142 | struct sk_buff *skb; | |
6143 | ||
6144 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6145 | if (!skb) | |
d7579d12 | 6146 | return ERR_PTR(-ENOMEM); |
90174455 RM |
6147 | |
6148 | ev_bitmap &= ATH10K_PKTLOG_ANY; | |
90174455 RM |
6149 | |
6150 | cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; | |
6151 | cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); | |
d7579d12 MK |
6152 | |
6153 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", | |
6154 | ev_bitmap); | |
6155 | return skb; | |
90174455 RM |
6156 | } |
6157 | ||
d7579d12 MK |
6158 | static struct sk_buff * |
6159 | ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) | |
90174455 RM |
6160 | { |
6161 | struct sk_buff *skb; | |
6162 | ||
6163 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
6164 | if (!skb) | |
d7579d12 | 6165 | return ERR_PTR(-ENOMEM); |
90174455 RM |
6166 | |
6167 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); | |
d7579d12 | 6168 | return skb; |
90174455 RM |
6169 | } |
6170 | ||
ffdd738d RM |
6171 | static struct sk_buff * |
6172 | ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, | |
6173 | u32 duration, u32 next_offset, | |
6174 | u32 enabled) | |
6175 | { | |
6176 | struct wmi_pdev_set_quiet_cmd *cmd; | |
6177 | struct sk_buff *skb; | |
6178 | ||
6179 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6180 | if (!skb) | |
6181 | return ERR_PTR(-ENOMEM); | |
6182 | ||
6183 | cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; | |
6184 | cmd->period = __cpu_to_le32(period); | |
6185 | cmd->duration = __cpu_to_le32(duration); | |
6186 | cmd->next_start = __cpu_to_le32(next_offset); | |
6187 | cmd->enabled = __cpu_to_le32(enabled); | |
6188 | ||
6189 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6190 | "wmi quiet param: period %u duration %u enabled %d\n", | |
6191 | period, duration, enabled); | |
6192 | return skb; | |
6193 | } | |
6194 | ||
dc8ab278 RM |
6195 | static struct sk_buff * |
6196 | ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, | |
6197 | const u8 *mac) | |
6198 | { | |
6199 | struct wmi_addba_clear_resp_cmd *cmd; | |
6200 | struct sk_buff *skb; | |
6201 | ||
6202 | if (!mac) | |
6203 | return ERR_PTR(-EINVAL); | |
6204 | ||
6205 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6206 | if (!skb) | |
6207 | return ERR_PTR(-ENOMEM); | |
6208 | ||
6209 | cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; | |
6210 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6211 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6212 | ||
6213 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6214 | "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", | |
6215 | vdev_id, mac); | |
6216 | return skb; | |
6217 | } | |
6218 | ||
65c0893d RM |
6219 | static struct sk_buff * |
6220 | ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6221 | u32 tid, u32 buf_size) | |
6222 | { | |
6223 | struct wmi_addba_send_cmd *cmd; | |
6224 | struct sk_buff *skb; | |
6225 | ||
6226 | if (!mac) | |
6227 | return ERR_PTR(-EINVAL); | |
6228 | ||
6229 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6230 | if (!skb) | |
6231 | return ERR_PTR(-ENOMEM); | |
6232 | ||
6233 | cmd = (struct wmi_addba_send_cmd *)skb->data; | |
6234 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6235 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6236 | cmd->tid = __cpu_to_le32(tid); | |
6237 | cmd->buffersize = __cpu_to_le32(buf_size); | |
6238 | ||
6239 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6240 | "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", | |
6241 | vdev_id, mac, tid, buf_size); | |
6242 | return skb; | |
6243 | } | |
6244 | ||
11597413 RM |
6245 | static struct sk_buff * |
6246 | ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6247 | u32 tid, u32 status) | |
6248 | { | |
6249 | struct wmi_addba_setresponse_cmd *cmd; | |
6250 | struct sk_buff *skb; | |
6251 | ||
6252 | if (!mac) | |
6253 | return ERR_PTR(-EINVAL); | |
6254 | ||
6255 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6256 | if (!skb) | |
6257 | return ERR_PTR(-ENOMEM); | |
6258 | ||
6259 | cmd = (struct wmi_addba_setresponse_cmd *)skb->data; | |
6260 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6261 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6262 | cmd->tid = __cpu_to_le32(tid); | |
6263 | cmd->statuscode = __cpu_to_le32(status); | |
6264 | ||
6265 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6266 | "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", | |
6267 | vdev_id, mac, tid, status); | |
6268 | return skb; | |
6269 | } | |
6270 | ||
50abef85 RM |
6271 | static struct sk_buff * |
6272 | ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6273 | u32 tid, u32 initiator, u32 reason) | |
6274 | { | |
6275 | struct wmi_delba_send_cmd *cmd; | |
6276 | struct sk_buff *skb; | |
6277 | ||
6278 | if (!mac) | |
6279 | return ERR_PTR(-EINVAL); | |
6280 | ||
6281 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6282 | if (!skb) | |
6283 | return ERR_PTR(-ENOMEM); | |
6284 | ||
6285 | cmd = (struct wmi_delba_send_cmd *)skb->data; | |
6286 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6287 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6288 | cmd->tid = __cpu_to_le32(tid); | |
6289 | cmd->initiator = __cpu_to_le32(initiator); | |
6290 | cmd->reasoncode = __cpu_to_le32(reason); | |
6291 | ||
6292 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6293 | "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", | |
6294 | vdev_id, mac, tid, initiator, reason); | |
6295 | return skb; | |
6296 | } | |
6297 | ||
d7579d12 MK |
6298 | static const struct wmi_ops wmi_ops = { |
6299 | .rx = ath10k_wmi_op_rx, | |
6300 | .map_svc = wmi_main_svc_map, | |
6301 | ||
6302 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
6303 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
6304 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
6305 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
6306 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
6307 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 6308 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
d7579d12 MK |
6309 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
6310 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, | |
6311 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
6312 | .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, | |
c1a4654a | 6313 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
d7579d12 MK |
6314 | |
6315 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
6316 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
6317 | .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, | |
6318 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
6319 | .gen_init = ath10k_wmi_op_gen_init, | |
6320 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, | |
6321 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
6322 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
6323 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
6324 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
6325 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
6326 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
6327 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
6328 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
6329 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
6330 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
6331 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6d492fe2 | 6332 | /* .gen_vdev_wmm_conf not implemented */ |
d7579d12 MK |
6333 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
6334 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
6335 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
6336 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
6337 | .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, | |
6338 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
6339 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
6340 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
6341 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
6342 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
6343 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
6344 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
6345 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
6346 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
6347 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
6348 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
6349 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 6350 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
a57a6a27 | 6351 | /* .gen_pdev_get_temperature not implemented */ |
dc8ab278 | 6352 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 6353 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 6354 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 6355 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
be9ce9d8 | 6356 | /* .gen_bcn_tmpl not implemented */ |
4c4955fe | 6357 | /* .gen_prb_tmpl not implemented */ |
369242b4 | 6358 | /* .gen_p2p_go_bcn_ie not implemented */ |
5b272e30 | 6359 | /* .gen_adaptive_qcs not implemented */ |
d7579d12 MK |
6360 | }; |
6361 | ||
6362 | static const struct wmi_ops wmi_10_1_ops = { | |
6363 | .rx = ath10k_wmi_10_1_op_rx, | |
6364 | .map_svc = wmi_10x_svc_map, | |
6365 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
6366 | .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, | |
6367 | .gen_init = ath10k_wmi_10_1_op_gen_init, | |
6368 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
6369 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
6370 | .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, | |
a57a6a27 | 6371 | /* .gen_pdev_get_temperature not implemented */ |
d7579d12 MK |
6372 | |
6373 | /* shared with main branch */ | |
6374 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
6375 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
6376 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
6377 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
6378 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
6379 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 6380 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
d7579d12 MK |
6381 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
6382 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
c1a4654a | 6383 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
d7579d12 MK |
6384 | |
6385 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
6386 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
6387 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
6388 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
6389 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
6390 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
6391 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
6392 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
6393 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
6394 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
6395 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
6396 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
6397 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
6398 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6d492fe2 | 6399 | /* .gen_vdev_wmm_conf not implemented */ |
d7579d12 MK |
6400 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
6401 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
6402 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
6403 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
6404 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
6405 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
6406 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
6407 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
6408 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
6409 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
6410 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
6411 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
6412 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
6413 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
6414 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
6415 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 6416 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
dc8ab278 | 6417 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 6418 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 6419 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 6420 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
be9ce9d8 | 6421 | /* .gen_bcn_tmpl not implemented */ |
4c4955fe | 6422 | /* .gen_prb_tmpl not implemented */ |
369242b4 | 6423 | /* .gen_p2p_go_bcn_ie not implemented */ |
5b272e30 | 6424 | /* .gen_adaptive_qcs not implemented */ |
d7579d12 MK |
6425 | }; |
6426 | ||
6427 | static const struct wmi_ops wmi_10_2_ops = { | |
6428 | .rx = ath10k_wmi_10_2_op_rx, | |
20de2229 | 6429 | .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, |
d7579d12 MK |
6430 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
6431 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
a57a6a27 | 6432 | /* .gen_pdev_get_temperature not implemented */ |
d7579d12 MK |
6433 | |
6434 | /* shared with 10.1 */ | |
6435 | .map_svc = wmi_10x_svc_map, | |
6436 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
d7579d12 MK |
6437 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
6438 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
6439 | ||
6440 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
6441 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
6442 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
6443 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
6444 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
6445 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 6446 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
d7579d12 MK |
6447 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
6448 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
c1a4654a | 6449 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
d7579d12 MK |
6450 | |
6451 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
6452 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
6453 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
6454 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
6455 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
6456 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
6457 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
6458 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
6459 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
6460 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
6461 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
6462 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
6463 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
6464 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6d492fe2 | 6465 | /* .gen_vdev_wmm_conf not implemented */ |
d7579d12 MK |
6466 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
6467 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
6468 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
6469 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
6470 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
6471 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
6472 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
6473 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
6474 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
6475 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
6476 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
6477 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
6478 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
6479 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
6480 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
6481 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 6482 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
dc8ab278 | 6483 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 6484 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 6485 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 6486 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
d7579d12 MK |
6487 | }; |
6488 | ||
4a16fbec RM |
6489 | static const struct wmi_ops wmi_10_2_4_ops = { |
6490 | .rx = ath10k_wmi_10_2_op_rx, | |
20de2229 | 6491 | .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, |
4a16fbec RM |
6492 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
6493 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
a57a6a27 | 6494 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, |
4a16fbec RM |
6495 | |
6496 | /* shared with 10.1 */ | |
6497 | .map_svc = wmi_10x_svc_map, | |
6498 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
4a16fbec RM |
6499 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
6500 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
6501 | ||
6502 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
6503 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
6504 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
6505 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
6506 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
6507 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 6508 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
4a16fbec RM |
6509 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
6510 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
c1a4654a | 6511 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
4a16fbec RM |
6512 | |
6513 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
6514 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
6515 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
6516 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
6517 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
6518 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
6519 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
6520 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
6521 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
6522 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
6523 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
6524 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
6525 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
6526 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6527 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | |
6528 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
6529 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
6530 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
6531 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
6532 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
6533 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
6534 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
6535 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
6536 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
6537 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
6538 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
6539 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
6540 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
6541 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
6542 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 6543 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
dc8ab278 | 6544 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 6545 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 6546 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 6547 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
be9ce9d8 | 6548 | /* .gen_bcn_tmpl not implemented */ |
4c4955fe | 6549 | /* .gen_prb_tmpl not implemented */ |
369242b4 | 6550 | /* .gen_p2p_go_bcn_ie not implemented */ |
5b272e30 | 6551 | /* .gen_adaptive_qcs not implemented */ |
4a16fbec RM |
6552 | }; |
6553 | ||
840357cc | 6554 | static const struct wmi_ops wmi_10_4_ops = { |
1c092961 | 6555 | .rx = ath10k_wmi_10_4_op_rx, |
840357cc | 6556 | .map_svc = wmi_10_4_svc_map, |
b2297baa RM |
6557 | |
6558 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
1c092961 | 6559 | .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev, |
b2297baa | 6560 | .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev, |
373b48cf RM |
6561 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, |
6562 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
3cec3be3 | 6563 | .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev, |
2b0a2e0d RM |
6564 | .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr, |
6565 | .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev, | |
1c092961 | 6566 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, |
d02e752f | 6567 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, |
08e75ea8 | 6568 | .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme, |
373b48cf RM |
6569 | |
6570 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
6571 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
6572 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
6573 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
d1e52a8e | 6574 | .gen_init = ath10k_wmi_10_4_op_gen_init, |
b2297baa RM |
6575 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, |
6576 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
373b48cf RM |
6577 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, |
6578 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
6579 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
6580 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
6581 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
6582 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
6583 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
6584 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
6585 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | |
6586 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
6587 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
6588 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
6589 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
6590 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
6591 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
6592 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
6593 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
6594 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
6595 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
6596 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
6597 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
6598 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
6599 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
6600 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | |
b2887410 VT |
6601 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
6602 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | |
6603 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | |
6604 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | |
373b48cf RM |
6605 | |
6606 | /* shared with 10.2 */ | |
6607 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
840357cc RM |
6608 | }; |
6609 | ||
b79b9baa MK |
6610 | int ath10k_wmi_attach(struct ath10k *ar) |
6611 | { | |
d7579d12 | 6612 | switch (ar->wmi.op_version) { |
9bd21322 | 6613 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
840357cc | 6614 | ar->wmi.ops = &wmi_10_4_ops; |
2d491e69 | 6615 | ar->wmi.cmd = &wmi_10_4_cmd_map; |
93841a15 | 6616 | ar->wmi.vdev_param = &wmi_10_4_vdev_param_map; |
d86561ff | 6617 | ar->wmi.pdev_param = &wmi_10_4_pdev_param_map; |
9bd21322 | 6618 | break; |
4a16fbec RM |
6619 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
6620 | ar->wmi.cmd = &wmi_10_2_4_cmd_map; | |
6621 | ar->wmi.ops = &wmi_10_2_4_ops; | |
6622 | ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; | |
6623 | ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; | |
6624 | break; | |
d7579d12 MK |
6625 | case ATH10K_FW_WMI_OP_VERSION_10_2: |
6626 | ar->wmi.cmd = &wmi_10_2_cmd_map; | |
6627 | ar->wmi.ops = &wmi_10_2_ops; | |
b79b9baa MK |
6628 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; |
6629 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
d7579d12 MK |
6630 | break; |
6631 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
6632 | ar->wmi.cmd = &wmi_10x_cmd_map; | |
6633 | ar->wmi.ops = &wmi_10_1_ops; | |
6634 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; | |
6635 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
6636 | break; | |
6637 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
b79b9baa | 6638 | ar->wmi.cmd = &wmi_cmd_map; |
d7579d12 | 6639 | ar->wmi.ops = &wmi_ops; |
b79b9baa MK |
6640 | ar->wmi.vdev_param = &wmi_vdev_param_map; |
6641 | ar->wmi.pdev_param = &wmi_pdev_param_map; | |
d7579d12 | 6642 | break; |
ca996ec5 MK |
6643 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
6644 | ath10k_wmi_tlv_attach(ar); | |
6645 | break; | |
d7579d12 MK |
6646 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
6647 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
6648 | ath10k_err(ar, "unsupported WMI op version: %d\n", | |
6649 | ar->wmi.op_version); | |
6650 | return -EINVAL; | |
b79b9baa MK |
6651 | } |
6652 | ||
6653 | init_completion(&ar->wmi.service_ready); | |
6654 | init_completion(&ar->wmi.unified_ready); | |
b79b9baa | 6655 | |
c8ecfc1c RM |
6656 | INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work); |
6657 | ||
b79b9baa MK |
6658 | return 0; |
6659 | } | |
6660 | ||
6661 | void ath10k_wmi_detach(struct ath10k *ar) | |
6662 | { | |
6663 | int i; | |
6664 | ||
c8ecfc1c RM |
6665 | cancel_work_sync(&ar->svc_rdy_work); |
6666 | ||
6667 | if (ar->svc_rdy_skb) | |
6668 | dev_kfree_skb(ar->svc_rdy_skb); | |
6669 | ||
b79b9baa MK |
6670 | /* free the host memory chunks requested by firmware */ |
6671 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
6672 | dma_free_coherent(ar->dev, | |
6673 | ar->wmi.mem_chunks[i].len, | |
6674 | ar->wmi.mem_chunks[i].vaddr, | |
6675 | ar->wmi.mem_chunks[i].paddr); | |
6676 | } | |
6677 | ||
6678 | ar->wmi.num_mem_chunks = 0; | |
6679 | } |