]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - drivers/net/wireless/ath/ath9k/ar9003_calib.c
projects / mirror_ubuntu-hirsute-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ath9k_hw: Define IQcal correction coefficient registers using index
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / wireless / ath / ath9k / ar9003_calib.c
CommitLineData
795f5e2c
LR		 1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "hw.h"
18#include "hw-ops.h"
19#include "ar9003_phy.h"
20
6497827f
FF		 21enum ar9003_cal_types {
22 IQ_MISMATCH_CAL = BIT(0),
23 TEMP_COMP_CAL = BIT(1),
24};
25
795f5e2c
LR		 26static void ar9003_hw_setup_calibration(struct ath_hw *ah,
27 struct ath9k_cal_list *currCal)
28{
4b01931e
LR		 29 struct ath_common *common = ath9k_hw_common(ah);
30
31 /* Select calibration to run */
32 switch (currCal->calData->calType) {
33 case IQ_MISMATCH_CAL:
34 /*
35 * Start calibration with
36 * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
37 */
38 REG_RMW_FIELD(ah, AR_PHY_TIMING4,
39 AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
40 currCal->calData->calCountMax);
41 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
42
226afe68
JP		 43 ath_dbg(common, ATH_DBG_CALIBRATE,
44 "starting IQ Mismatch Calibration\n");
4b01931e
LR		 45
46 /* Kick-off cal */
47 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
48 break;
49 case TEMP_COMP_CAL:
50 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
51 AR_PHY_65NM_CH0_THERM_LOCAL, 1);
52 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
53 AR_PHY_65NM_CH0_THERM_START, 1);
54
226afe68
JP		 55 ath_dbg(common, ATH_DBG_CALIBRATE,
56 "starting Temperature Compensation Calibration\n");
4b01931e 57 break;
4b01931e 58 }
795f5e2c
LR		 59}
60
df23acaa
LR		 61/*
62 * Generic calibration routine.
63 * Recalibrate the lower PHY chips to account for temperature/environment
64 * changes.
65 */
66static bool ar9003_hw_per_calibration(struct ath_hw *ah,
67 struct ath9k_channel *ichan,
68 u8 rxchainmask,
69 struct ath9k_cal_list *currCal)
70{
20bd2a09 71 struct ath9k_hw_cal_data *caldata = ah->caldata;
df23acaa
LR		 72 /* Cal is assumed not done until explicitly set below */
73 bool iscaldone = false;
74
75 /* Calibration in progress. */
76 if (currCal->calState == CAL_RUNNING) {
77 /* Check to see if it has finished. */
78 if (!(REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL)) {
79 /*
80 * Accumulate cal measures for active chains
81 */
82 currCal->calData->calCollect(ah);
83 ah->cal_samples++;
84
85 if (ah->cal_samples >=
86 currCal->calData->calNumSamples) {
87 unsigned int i, numChains = 0;
88 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
89 if (rxchainmask & (1 << i))
90 numChains++;
91 }
92
93 /*
94 * Process accumulated data
95 */
96 currCal->calData->calPostProc(ah, numChains);
97
98 /* Calibration has finished. */
20bd2a09 99 caldata->CalValid |= currCal->calData->calType;
df23acaa
LR		 100 currCal->calState = CAL_DONE;
101 iscaldone = true;
102 } else {
103 /*
104 * Set-up collection of another sub-sample until we
105 * get desired number
106 */
107 ar9003_hw_setup_calibration(ah, currCal);
108 }
109 }
20bd2a09 110 } else if (!(caldata->CalValid & currCal->calData->calType)) {
df23acaa
LR		 111 /* If current cal is marked invalid in channel, kick it off */
112 ath9k_hw_reset_calibration(ah, currCal);
113 }
114
115 return iscaldone;
116}
117
795f5e2c
LR		 118static bool ar9003_hw_calibrate(struct ath_hw *ah,
119 struct ath9k_channel *chan,
120 u8 rxchainmask,
121 bool longcal)
122{
df23acaa
LR		 123 bool iscaldone = true;
124 struct ath9k_cal_list *currCal = ah->cal_list_curr;
125
126 /*
127 * For given calibration:
128 * 1. Call generic cal routine
129 * 2. When this cal is done (isCalDone) if we have more cals waiting
130 * (eg after reset), mask this to upper layers by not propagating
131 * isCalDone if it is set to TRUE.
132 * Instead, change isCalDone to FALSE and setup the waiting cal(s)
133 * to be run.
134 */
135 if (currCal &&
136 (currCal->calState == CAL_RUNNING ||
137 currCal->calState == CAL_WAITING)) {
138 iscaldone = ar9003_hw_per_calibration(ah, chan,
139 rxchainmask, currCal);
140 if (iscaldone) {
141 ah->cal_list_curr = currCal = currCal->calNext;
142
143 if (currCal->calState == CAL_WAITING) {
144 iscaldone = false;
145 ath9k_hw_reset_calibration(ah, currCal);
146 }
147 }
148 }
795f5e2c 149
df23acaa
LR		 150 /* Do NF cal only at longer intervals */
151 if (longcal) {
93697460
FF		 152 /*
153 * Get the value from the previous NF cal and update
154 * history buffer.
155 */
156 ath9k_hw_getnf(ah, chan);
157
df23acaa
LR		 158 /*
159 * Load the NF from history buffer of the current channel.
160 * NF is slow time-variant, so it is OK to use a historical
161 * value.
162 */
163 ath9k_hw_loadnf(ah, ah->curchan);
164
165 /* start NF calibration, without updating BB NF register */
00c86590 166 ath9k_hw_start_nfcal(ah, false);
df23acaa
LR		 167 }
168
169 return iscaldone;
795f5e2c
LR		 170}
171
590b7d2f
LR		 172static void ar9003_hw_iqcal_collect(struct ath_hw *ah)
173{
174 int i;
175
176 /* Accumulate IQ cal measures for active chains */
177 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
178 ah->totalPowerMeasI[i] +=
179 REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
180 ah->totalPowerMeasQ[i] +=
181 REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
182 ah->totalIqCorrMeas[i] +=
183 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
226afe68
JP		 184 ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
185 "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
186 ah->cal_samples, i, ah->totalPowerMeasI[i],
187 ah->totalPowerMeasQ[i],
188 ah->totalIqCorrMeas[i]);
590b7d2f
LR		 189 }
190}
191
192static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
193{
194 struct ath_common *common = ath9k_hw_common(ah);
195 u32 powerMeasQ, powerMeasI, iqCorrMeas;
196 u32 qCoffDenom, iCoffDenom;
197 int32_t qCoff, iCoff;
198 int iqCorrNeg, i;
07b2fa5a 199 static const u_int32_t offset_array[3] = {
590b7d2f
LR		 200 AR_PHY_RX_IQCAL_CORR_B0,
201 AR_PHY_RX_IQCAL_CORR_B1,
202 AR_PHY_RX_IQCAL_CORR_B2,
203 };
204
205 for (i = 0; i < numChains; i++) {
206 powerMeasI = ah->totalPowerMeasI[i];
207 powerMeasQ = ah->totalPowerMeasQ[i];
208 iqCorrMeas = ah->totalIqCorrMeas[i];
209
226afe68
JP		 210 ath_dbg(common, ATH_DBG_CALIBRATE,
211 "Starting IQ Cal and Correction for Chain %d\n",
212 i);
590b7d2f 213
226afe68
JP		 214 ath_dbg(common, ATH_DBG_CALIBRATE,
215 "Orignal: Chn %diq_corr_meas = 0x%08x\n",
216 i, ah->totalIqCorrMeas[i]);
590b7d2f
LR		 217
218 iqCorrNeg = 0;
219
220 if (iqCorrMeas > 0x80000000) {
221 iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
222 iqCorrNeg = 1;
223 }
224
226afe68
JP		 225 ath_dbg(common, ATH_DBG_CALIBRATE,
226 "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
227 ath_dbg(common, ATH_DBG_CALIBRATE,
228 "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
229 ath_dbg(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
230 iqCorrNeg);
590b7d2f
LR		 231
232 iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 256;
233 qCoffDenom = powerMeasQ / 64;
234
235 if ((iCoffDenom != 0) && (qCoffDenom != 0)) {
236 iCoff = iqCorrMeas / iCoffDenom;
237 qCoff = powerMeasI / qCoffDenom - 64;
226afe68
JP		 238 ath_dbg(common, ATH_DBG_CALIBRATE,
239 "Chn %d iCoff = 0x%08x\n", i, iCoff);
240 ath_dbg(common, ATH_DBG_CALIBRATE,
241 "Chn %d qCoff = 0x%08x\n", i, qCoff);
590b7d2f
LR		 242
243 /* Force bounds on iCoff */
244 if (iCoff >= 63)
245 iCoff = 63;
246 else if (iCoff <= -63)
247 iCoff = -63;
248
249 /* Negate iCoff if iqCorrNeg == 0 */
250 if (iqCorrNeg == 0x0)
251 iCoff = -iCoff;
252
253 /* Force bounds on qCoff */
254 if (qCoff >= 63)
255 qCoff = 63;
256 else if (qCoff <= -63)
257 qCoff = -63;
258
259 iCoff = iCoff & 0x7f;
260 qCoff = qCoff & 0x7f;
261
226afe68
JP		 262 ath_dbg(common, ATH_DBG_CALIBRATE,
263 "Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
264 i, iCoff, qCoff);
265 ath_dbg(common, ATH_DBG_CALIBRATE,
266 "Register offset (0x%04x) before update = 0x%x\n",
267 offset_array[i],
268 REG_READ(ah, offset_array[i]));
590b7d2f
LR		 269
270 REG_RMW_FIELD(ah, offset_array[i],
271 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
272 iCoff);
273 REG_RMW_FIELD(ah, offset_array[i],
274 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
275 qCoff);
226afe68
JP		 276 ath_dbg(common, ATH_DBG_CALIBRATE,
277 "Register offset (0x%04x) QI COFF (bitfields 0x%08x) after update = 0x%x\n",
278 offset_array[i],
279 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
280 REG_READ(ah, offset_array[i]));
281 ath_dbg(common, ATH_DBG_CALIBRATE,
282 "Register offset (0x%04x) QQ COFF (bitfields 0x%08x) after update = 0x%x\n",
283 offset_array[i],
284 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
285 REG_READ(ah, offset_array[i]));
286
287 ath_dbg(common, ATH_DBG_CALIBRATE,
288 "IQ Cal and Correction done for Chain %d\n", i);
590b7d2f
LR		 289 }
290 }
291
292 REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0,
293 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE);
226afe68
JP		 294 ath_dbg(common, ATH_DBG_CALIBRATE,
295 "IQ Cal and Correction (offset 0x%04x) enabled (bit position 0x%08x). New Value 0x%08x\n",
296 (unsigned) (AR_PHY_RX_IQCAL_CORR_B0),
297 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE,
298 REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0));
590b7d2f
LR		 299}
300
301static const struct ath9k_percal_data iq_cal_single_sample = {
302 IQ_MISMATCH_CAL,
303 MIN_CAL_SAMPLES,
304 PER_MAX_LOG_COUNT,
305 ar9003_hw_iqcal_collect,
306 ar9003_hw_iqcalibrate
307};
308
795f5e2c
LR		 309static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
310{
590b7d2f 311 ah->iq_caldata.calData = &iq_cal_single_sample;
795f5e2c
LR		 312}
313
df23acaa
LR		 314/*
315 * solve 4x4 linear equation used in loopback iq cal.
316 */
317static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah,
318 s32 sin_2phi_1,
319 s32 cos_2phi_1,
320 s32 sin_2phi_2,
321 s32 cos_2phi_2,
322 s32 mag_a0_d0,
323 s32 phs_a0_d0,
324 s32 mag_a1_d0,
325 s32 phs_a1_d0,
326 s32 solved_eq[])
327{
328 s32 f1 = cos_2phi_1 - cos_2phi_2,
329 f3 = sin_2phi_1 - sin_2phi_2,
330 f2;
331 s32 mag_tx, phs_tx, mag_rx, phs_rx;
332 const s32 result_shift = 1 << 15;
333 struct ath_common *common = ath9k_hw_common(ah);
334
335 f2 = (f1 * f1 + f3 * f3) / result_shift;
336
337 if (!f2) {
226afe68 338 ath_dbg(common, ATH_DBG_CALIBRATE, "Divide by 0\n");
df23acaa
LR		 339 return false;
340 }
341
342 /* mag mismatch, tx */
343 mag_tx = f1 * (mag_a0_d0 - mag_a1_d0) + f3 * (phs_a0_d0 - phs_a1_d0);
344 /* phs mismatch, tx */
345 phs_tx = f3 * (-mag_a0_d0 + mag_a1_d0) + f1 * (phs_a0_d0 - phs_a1_d0);
346
347 mag_tx = (mag_tx / f2);
348 phs_tx = (phs_tx / f2);
349
350 /* mag mismatch, rx */
351 mag_rx = mag_a0_d0 - (cos_2phi_1 * mag_tx + sin_2phi_1 * phs_tx) /
352 result_shift;
353 /* phs mismatch, rx */
354 phs_rx = phs_a0_d0 + (sin_2phi_1 * mag_tx - cos_2phi_1 * phs_tx) /
355 result_shift;
356
357 solved_eq[0] = mag_tx;
358 solved_eq[1] = phs_tx;
359 solved_eq[2] = mag_rx;
360 solved_eq[3] = phs_rx;
361
362 return true;
363}
364
365static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im)
77d6d39a 366{
df23acaa
LR		 367 s32 abs_i = abs(in_re),
368 abs_q = abs(in_im),
369 max_abs, min_abs;
370
371 if (abs_i > abs_q) {
372 max_abs = abs_i;
373 min_abs = abs_q;
374 } else {
375 max_abs = abs_q;
376 min_abs = abs_i;
377 }
378
379 return max_abs - (max_abs / 32) + (min_abs / 8) + (min_abs / 4);
380}
381
382#define DELPT 32
383
384static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
385 s32 chain_idx,
386 const s32 iq_res[],
387 s32 iqc_coeff[])
388{
389 s32 i2_m_q2_a0_d0, i2_p_q2_a0_d0, iq_corr_a0_d0,
390 i2_m_q2_a0_d1, i2_p_q2_a0_d1, iq_corr_a0_d1,
391 i2_m_q2_a1_d0, i2_p_q2_a1_d0, iq_corr_a1_d0,
392 i2_m_q2_a1_d1, i2_p_q2_a1_d1, iq_corr_a1_d1;
393 s32 mag_a0_d0, mag_a1_d0, mag_a0_d1, mag_a1_d1,
394 phs_a0_d0, phs_a1_d0, phs_a0_d1, phs_a1_d1,
395 sin_2phi_1, cos_2phi_1,
396 sin_2phi_2, cos_2phi_2;
397 s32 mag_tx, phs_tx, mag_rx, phs_rx;
398 s32 solved_eq[4], mag_corr_tx, phs_corr_tx, mag_corr_rx, phs_corr_rx,
399 q_q_coff, q_i_coff;
400 const s32 res_scale = 1 << 15;
401 const s32 delpt_shift = 1 << 8;
402 s32 mag1, mag2;
403 struct ath_common *common = ath9k_hw_common(ah);
404
405 i2_m_q2_a0_d0 = iq_res[0] & 0xfff;
406 i2_p_q2_a0_d0 = (iq_res[0] >> 12) & 0xfff;
407 iq_corr_a0_d0 = ((iq_res[0] >> 24) & 0xff) + ((iq_res[1] & 0xf) << 8);
408
409 if (i2_m_q2_a0_d0 > 0x800)
410 i2_m_q2_a0_d0 = -((0xfff - i2_m_q2_a0_d0) + 1);
411
412 if (i2_p_q2_a0_d0 > 0x800)
413 i2_p_q2_a0_d0 = -((0xfff - i2_p_q2_a0_d0) + 1);
414
415 if (iq_corr_a0_d0 > 0x800)
416 iq_corr_a0_d0 = -((0xfff - iq_corr_a0_d0) + 1);
417
418 i2_m_q2_a0_d1 = (iq_res[1] >> 4) & 0xfff;
419 i2_p_q2_a0_d1 = (iq_res[2] & 0xfff);
420 iq_corr_a0_d1 = (iq_res[2] >> 12) & 0xfff;
421
422 if (i2_m_q2_a0_d1 > 0x800)
423 i2_m_q2_a0_d1 = -((0xfff - i2_m_q2_a0_d1) + 1);
424
425 if (i2_p_q2_a0_d1 > 0x800)
426 i2_p_q2_a0_d1 = -((0xfff - i2_p_q2_a0_d1) + 1);
427
428 if (iq_corr_a0_d1 > 0x800)
429 iq_corr_a0_d1 = -((0xfff - iq_corr_a0_d1) + 1);
430
431 i2_m_q2_a1_d0 = ((iq_res[2] >> 24) & 0xff) + ((iq_res[3] & 0xf) << 8);
432 i2_p_q2_a1_d0 = (iq_res[3] >> 4) & 0xfff;
433 iq_corr_a1_d0 = iq_res[4] & 0xfff;
434
435 if (i2_m_q2_a1_d0 > 0x800)
436 i2_m_q2_a1_d0 = -((0xfff - i2_m_q2_a1_d0) + 1);
437
438 if (i2_p_q2_a1_d0 > 0x800)
439 i2_p_q2_a1_d0 = -((0xfff - i2_p_q2_a1_d0) + 1);
440
441 if (iq_corr_a1_d0 > 0x800)
442 iq_corr_a1_d0 = -((0xfff - iq_corr_a1_d0) + 1);
443
444 i2_m_q2_a1_d1 = (iq_res[4] >> 12) & 0xfff;
445 i2_p_q2_a1_d1 = ((iq_res[4] >> 24) & 0xff) + ((iq_res[5] & 0xf) << 8);
446 iq_corr_a1_d1 = (iq_res[5] >> 4) & 0xfff;
447
448 if (i2_m_q2_a1_d1 > 0x800)
449 i2_m_q2_a1_d1 = -((0xfff - i2_m_q2_a1_d1) + 1);
450
451 if (i2_p_q2_a1_d1 > 0x800)
452 i2_p_q2_a1_d1 = -((0xfff - i2_p_q2_a1_d1) + 1);
453
454 if (iq_corr_a1_d1 > 0x800)
455 iq_corr_a1_d1 = -((0xfff - iq_corr_a1_d1) + 1);
456
457 if ((i2_p_q2_a0_d0 == 0) || (i2_p_q2_a0_d1 == 0) ||
458 (i2_p_q2_a1_d0 == 0) || (i2_p_q2_a1_d1 == 0)) {
226afe68
JP		 459 ath_dbg(common, ATH_DBG_CALIBRATE,
460 "Divide by 0:\n"
461 "a0_d0=%d\n"
462 "a0_d1=%d\n"
463 "a2_d0=%d\n"
464 "a1_d1=%d\n",
465 i2_p_q2_a0_d0, i2_p_q2_a0_d1,
466 i2_p_q2_a1_d0, i2_p_q2_a1_d1);
df23acaa
LR		 467 return false;
468 }
469
470 mag_a0_d0 = (i2_m_q2_a0_d0 * res_scale) / i2_p_q2_a0_d0;
471 phs_a0_d0 = (iq_corr_a0_d0 * res_scale) / i2_p_q2_a0_d0;
472
473 mag_a0_d1 = (i2_m_q2_a0_d1 * res_scale) / i2_p_q2_a0_d1;
474 phs_a0_d1 = (iq_corr_a0_d1 * res_scale) / i2_p_q2_a0_d1;
475
476 mag_a1_d0 = (i2_m_q2_a1_d0 * res_scale) / i2_p_q2_a1_d0;
477 phs_a1_d0 = (iq_corr_a1_d0 * res_scale) / i2_p_q2_a1_d0;
478
479 mag_a1_d1 = (i2_m_q2_a1_d1 * res_scale) / i2_p_q2_a1_d1;
480 phs_a1_d1 = (iq_corr_a1_d1 * res_scale) / i2_p_q2_a1_d1;
481
482 /* w/o analog phase shift */
483 sin_2phi_1 = (((mag_a0_d0 - mag_a0_d1) * delpt_shift) / DELPT);
484 /* w/o analog phase shift */
485 cos_2phi_1 = (((phs_a0_d1 - phs_a0_d0) * delpt_shift) / DELPT);
486 /* w/ analog phase shift */
487 sin_2phi_2 = (((mag_a1_d0 - mag_a1_d1) * delpt_shift) / DELPT);
488 /* w/ analog phase shift */
489 cos_2phi_2 = (((phs_a1_d1 - phs_a1_d0) * delpt_shift) / DELPT);
490
491 /*
492 * force sin^2 + cos^2 = 1;
493 * find magnitude by approximation
494 */
495 mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1);
496 mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2);
497
498 if ((mag1 == 0) || (mag2 == 0)) {
226afe68
JP		 499 ath_dbg(common, ATH_DBG_CALIBRATE,
500 "Divide by 0: mag1=%d, mag2=%d\n",
501 mag1, mag2);
df23acaa
LR		 502 return false;
503 }
504
505 /* normalization sin and cos by mag */
506 sin_2phi_1 = (sin_2phi_1 * res_scale / mag1);
507 cos_2phi_1 = (cos_2phi_1 * res_scale / mag1);
508 sin_2phi_2 = (sin_2phi_2 * res_scale / mag2);
509 cos_2phi_2 = (cos_2phi_2 * res_scale / mag2);
510
511 /* calculate IQ mismatch */
512 if (!ar9003_hw_solve_iq_cal(ah,
513 sin_2phi_1, cos_2phi_1,
514 sin_2phi_2, cos_2phi_2,
515 mag_a0_d0, phs_a0_d0,
516 mag_a1_d0,
517 phs_a1_d0, solved_eq)) {
226afe68
JP		 518 ath_dbg(common, ATH_DBG_CALIBRATE,
519 "Call to ar9003_hw_solve_iq_cal() failed.\n");
df23acaa
LR		 520 return false;
521 }
522
523 mag_tx = solved_eq[0];
524 phs_tx = solved_eq[1];
525 mag_rx = solved_eq[2];
526 phs_rx = solved_eq[3];
527
226afe68
JP		 528 ath_dbg(common, ATH_DBG_CALIBRATE,
529 "chain %d: mag mismatch=%d phase mismatch=%d\n",
530 chain_idx, mag_tx/res_scale, phs_tx/res_scale);
df23acaa
LR		 531
532 if (res_scale == mag_tx) {
226afe68
JP		 533 ath_dbg(common, ATH_DBG_CALIBRATE,
534 "Divide by 0: mag_tx=%d, res_scale=%d\n",
535 mag_tx, res_scale);
df23acaa
LR		 536 return false;
537 }
538
539 /* calculate and quantize Tx IQ correction factor */
540 mag_corr_tx = (mag_tx * res_scale) / (res_scale - mag_tx);
541 phs_corr_tx = -phs_tx;
542
543 q_q_coff = (mag_corr_tx * 128 / res_scale);
544 q_i_coff = (phs_corr_tx * 256 / res_scale);
545
226afe68
JP		 546 ath_dbg(common, ATH_DBG_CALIBRATE,
547 "tx chain %d: mag corr=%d phase corr=%d\n",
548 chain_idx, q_q_coff, q_i_coff);
df23acaa
LR		 549
550 if (q_i_coff < -63)
551 q_i_coff = -63;
552 if (q_i_coff > 63)
553 q_i_coff = 63;
554 if (q_q_coff < -63)
555 q_q_coff = -63;
556 if (q_q_coff > 63)
557 q_q_coff = 63;
558
559 iqc_coeff[0] = (q_q_coff * 128) + q_i_coff;
560
226afe68
JP		 561 ath_dbg(common, ATH_DBG_CALIBRATE,
562 "tx chain %d: iq corr coeff=%x\n",
563 chain_idx, iqc_coeff[0]);
df23acaa
LR		 564
565 if (-mag_rx == res_scale) {
226afe68
JP		 566 ath_dbg(common, ATH_DBG_CALIBRATE,
567 "Divide by 0: mag_rx=%d, res_scale=%d\n",
568 mag_rx, res_scale);
df23acaa
LR		 569 return false;
570 }
571
572 /* calculate and quantize Rx IQ correction factors */
573 mag_corr_rx = (-mag_rx * res_scale) / (res_scale + mag_rx);
574 phs_corr_rx = -phs_rx;
575
576 q_q_coff = (mag_corr_rx * 128 / res_scale);
577 q_i_coff = (phs_corr_rx * 256 / res_scale);
578
226afe68
JP		 579 ath_dbg(common, ATH_DBG_CALIBRATE,
580 "rx chain %d: mag corr=%d phase corr=%d\n",
581 chain_idx, q_q_coff, q_i_coff);
df23acaa
LR		 582
583 if (q_i_coff < -63)
584 q_i_coff = -63;
585 if (q_i_coff > 63)
586 q_i_coff = 63;
587 if (q_q_coff < -63)
588 q_q_coff = -63;
589 if (q_q_coff > 63)
590 q_q_coff = 63;
591
592 iqc_coeff[1] = (q_q_coff * 128) + q_i_coff;
593
226afe68
JP		 594 ath_dbg(common, ATH_DBG_CALIBRATE,
595 "rx chain %d: iq corr coeff=%x\n",
596 chain_idx, iqc_coeff[1]);
df23acaa
LR		 597
598 return true;
599}
600
601static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
602{
603 struct ath_common *common = ath9k_hw_common(ah);
07b2fa5a 604 static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
df23acaa
LR		 605 AR_PHY_TX_IQCAL_STATUS_B0,
606 AR_PHY_TX_IQCAL_STATUS_B1,
607 AR_PHY_TX_IQCAL_STATUS_B2,
608 };
07b2fa5a 609 static const u32 rx_corr[AR9300_MAX_CHAINS] = {
df23acaa
LR		 610 AR_PHY_RX_IQCAL_CORR_B0,
611 AR_PHY_RX_IQCAL_CORR_B1,
612 AR_PHY_RX_IQCAL_CORR_B2,
613 };
07b2fa5a 614 static const u_int32_t chan_info_tab[] = {
df23acaa
LR		 615 AR_PHY_CHAN_INFO_TAB_0,
616 AR_PHY_CHAN_INFO_TAB_1,
617 AR_PHY_CHAN_INFO_TAB_2,
618 };
31faff81 619 u32 tx_corr_coeff[AR9300_MAX_CHAINS];
df23acaa
LR		 620 s32 iq_res[6];
621 s32 iqc_coeff[2];
622 s32 i, j;
623 u32 num_chains = 0;
624
31faff81
VT		 625 tx_corr_coeff[0] = AR_PHY_TX_IQCAL_CORR_COEFF_B0(0);
626 tx_corr_coeff[1] = AR_PHY_TX_IQCAL_CORR_COEFF_B1(0);
627 tx_corr_coeff[2] = AR_PHY_TX_IQCAL_CORR_COEFF_B2(0);
628
df23acaa
LR		 629 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
630 if (ah->txchainmask & (1 << i))
631 num_chains++;
632 }
633
634 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
635 AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
636 DELPT);
637 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
638 AR_PHY_TX_IQCAL_START_DO_CAL,
639 AR_PHY_TX_IQCAL_START_DO_CAL);
640
641 if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
642 AR_PHY_TX_IQCAL_START_DO_CAL,
643 0, AH_WAIT_TIMEOUT)) {
226afe68
JP		 644 ath_dbg(common, ATH_DBG_CALIBRATE,
645 "Tx IQ Cal not complete.\n");
df23acaa
LR		 646 goto TX_IQ_CAL_FAILED;
647 }
648
649 for (i = 0; i < num_chains; i++) {
226afe68
JP		 650 ath_dbg(common, ATH_DBG_CALIBRATE,
651 "Doing Tx IQ Cal for chain %d.\n", i);
df23acaa
LR		 652
653 if (REG_READ(ah, txiqcal_status[i]) &
654 AR_PHY_TX_IQCAL_STATUS_FAILED) {
226afe68
JP		 655 ath_dbg(common, ATH_DBG_CALIBRATE,
656 "Tx IQ Cal failed for chain %d.\n", i);
df23acaa
LR		 657 goto TX_IQ_CAL_FAILED;
658 }
659
660 for (j = 0; j < 3; j++) {
661 u_int8_t idx = 2 * j,
662 offset = 4 * j;
663
664 REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
665 AR_PHY_CHAN_INFO_TAB_S2_READ, 0);
666
667 /* 32 bits */
668 iq_res[idx] = REG_READ(ah, chan_info_tab[i] + offset);
669
670 REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
671 AR_PHY_CHAN_INFO_TAB_S2_READ, 1);
672
673 /* 16 bits */
674 iq_res[idx+1] = 0xffff & REG_READ(ah,
675 chan_info_tab[i] +
676 offset);
677
226afe68
JP		 678 ath_dbg(common, ATH_DBG_CALIBRATE,
679 "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
680 idx, iq_res[idx], idx+1, iq_res[idx+1]);
df23acaa
LR		 681 }
682
683 if (!ar9003_hw_calc_iq_corr(ah, i, iq_res, iqc_coeff)) {
226afe68
JP		 684 ath_dbg(common, ATH_DBG_CALIBRATE,
685 "Failed in calculation of IQ correction.\n");
df23acaa
LR		 686 goto TX_IQ_CAL_FAILED;
687 }
688
226afe68
JP		 689 ath_dbg(common, ATH_DBG_CALIBRATE,
690 "IQ_COEFF[0] = 0x%x IQ_COEFF[1] = 0x%x\n",
691 iqc_coeff[0], iqc_coeff[1]);
df23acaa
LR		 692
693 REG_RMW_FIELD(ah, tx_corr_coeff[i],
694 AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
695 iqc_coeff[0]);
696 REG_RMW_FIELD(ah, rx_corr[i],
697 AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_Q_COFF,
698 iqc_coeff[1] >> 7);
699 REG_RMW_FIELD(ah, rx_corr[i],
700 AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_I_COFF,
701 iqc_coeff[1]);
702 }
703
704 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
705 AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
706 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
707 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
708
709 return;
710
711TX_IQ_CAL_FAILED:
226afe68 712 ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
df23acaa
LR		 713}
714
715static bool ar9003_hw_init_cal(struct ath_hw *ah,
716 struct ath9k_channel *chan)
717{
718 struct ath_common *common = ath9k_hw_common(ah);
a9d85fbd 719 int val;
df23acaa 720
a9d85fbd 721 val = REG_READ(ah, AR_ENT_OTP);
226afe68 722 ath_dbg(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
a9d85fbd 723
6559e83e
VT		 724 if (AR_SREV_9485(ah))
725 ar9003_hw_set_chain_masks(ah, 0x1, 0x1);
726 else if (val & AR_ENT_OTP_CHAIN2_DISABLE)
a9d85fbd
SB		 727 ar9003_hw_set_chain_masks(ah, 0x3, 0x3);
728 else
729 /*
730 * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain
731 * mode before running AGC/TxIQ cals
732 */
733 ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
df23acaa 734
c5395b67
LR		 735 /* Do Tx IQ Calibration */
736 ar9003_hw_tx_iq_cal(ah);
737 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
738 udelay(5);
739 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
740
df23acaa
LR		 741 /* Calibrate the AGC */
742 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
743 REG_READ(ah, AR_PHY_AGC_CONTROL) |
744 AR_PHY_AGC_CONTROL_CAL);
745
746 /* Poll for offset calibration complete */
747 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
748 0, AH_WAIT_TIMEOUT)) {
226afe68
JP		 749 ath_dbg(common, ATH_DBG_CALIBRATE,
750 "offset calibration failed to complete in 1ms; noisy environment?\n");
df23acaa
LR		 751 return false;
752 }
753
df23acaa
LR		 754 /* Revert chainmasks to their original values before NF cal */
755 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
756
00c86590
FF		 757 ath9k_hw_start_nfcal(ah, true);
758
df23acaa
LR		 759 /* Initialize list pointers */
760 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
6497827f 761 ah->supp_cals = IQ_MISMATCH_CAL;
df23acaa 762
6497827f 763 if (ah->supp_cals & IQ_MISMATCH_CAL) {
df23acaa
LR		 764 INIT_CAL(&ah->iq_caldata);
765 INSERT_CAL(ah, &ah->iq_caldata);
226afe68
JP		 766 ath_dbg(common, ATH_DBG_CALIBRATE,
767 "enabling IQ Calibration.\n");
df23acaa
LR		 768 }
769
6497827f 770 if (ah->supp_cals & TEMP_COMP_CAL) {
df23acaa
LR		 771 INIT_CAL(&ah->tempCompCalData);
772 INSERT_CAL(ah, &ah->tempCompCalData);
226afe68
JP		 773 ath_dbg(common, ATH_DBG_CALIBRATE,
774 "enabling Temperature Compensation Calibration.\n");
df23acaa
LR		 775 }
776
777 /* Initialize current pointer to first element in list */
778 ah->cal_list_curr = ah->cal_list;
779
780 if (ah->cal_list_curr)
781 ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
782
20bd2a09
FF		 783 if (ah->caldata)
784 ah->caldata->CalValid = 0;
df23acaa
LR		 785
786 return true;
77d6d39a
LR		 787}
788
795f5e2c
LR		 789void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
790{
791 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
792 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
793
794 priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
795 priv_ops->init_cal = ar9003_hw_init_cal;
796 priv_ops->setup_calibration = ar9003_hw_setup_calibration;
795f5e2c
LR		 797
798 ops->calibrate = ar9003_hw_calibrate;
799}
Ubuntu Hirsute Linux kernel mirror