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ath9k: free GPIO resource for SOC GPIOs
[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / ath / ath9k / btcoex.c
CommitLineData
17d50d1d 1/*
5b68138e 2 * Copyright (c) 2009-2011 Atheros Communications Inc.
17d50d1d
VT
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
ee40fa06 17#include <linux/export.h>
cfe8cba9 18#include "hw.h"
17d50d1d 19
8b4fc5ba
LR
20enum ath_bt_mode {
21 ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
22 ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
23 ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
32b1076d 24 ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
8b4fc5ba
LR
25};
26
27struct ath_btcoex_config {
28 u8 bt_time_extend;
29 bool bt_txstate_extend;
30 bool bt_txframe_extend;
31 enum ath_bt_mode bt_mode; /* coexistence mode */
32 bool bt_quiet_collision;
33 bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
34 u8 bt_priority_time;
35 u8 bt_first_slot_time;
36 bool bt_hold_rx_clear;
37};
1773912b 38
54f10b05
RM
39static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
40 [AR9300_NUM_WLAN_WEIGHTS] = {
41 { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
42 { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
43 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
44};
1773912b 45
5160b46f
SM
46static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
47 [AR9300_NUM_WLAN_WEIGHTS] = {
8227bf45
RM
48 { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
49 { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
50 { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
51 { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
2884561a 52 { 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
8227bf45
RM
53};
54
766ec4a9 55void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
af03abec 56{
766ec4a9 57 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
8b4fc5ba
LR
58 const struct ath_btcoex_config ath_bt_config = {
59 .bt_time_extend = 0,
60 .bt_txstate_extend = true,
61 .bt_txframe_extend = true,
62 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
63 .bt_quiet_collision = true,
64 .bt_rxclear_polarity = true,
65 .bt_priority_time = 2,
66 .bt_first_slot_time = 5,
67 .bt_hold_rx_clear = true,
68 };
a6ef530f
VN
69 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
70
71 if (AR_SREV_9300_20_OR_LATER(ah))
72 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
1773912b 73
766ec4a9
LR
74 btcoex_hw->bt_coex_mode =
75 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
1773912b
VT
76 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
77 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
78 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
79 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
80 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
a6ef530f 81 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
1773912b
VT
82 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
83 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
84 SM(qnum, AR_BT_QCU_THRESH);
85
766ec4a9 86 btcoex_hw->bt_coex_mode2 =
1773912b
VT
87 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
88 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
89 AR_BT_DISABLE_BT_ANT;
1773912b 90}
7322fd19 91EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
1773912b 92
d68475de
SM
93void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
94{
95 struct ath_common *common = ath9k_hw_common(ah);
96 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
97
98 /*
99 * Check if BTCOEX is globally disabled.
100 */
101 if (!common->btcoex_enabled) {
102 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
103 return;
104 }
105
e1ff147d
SM
106 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
107 btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
108 } else if (AR_SREV_9300_20_OR_LATER(ah)) {
d68475de
SM
109 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
110 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
111 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
112 btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
113 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
114 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
115 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
116
117 if (AR_SREV_9285(ah)) {
118 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
119 btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
120 } else {
121 btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
122 }
123 }
124}
125EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
126
75d7839f 127void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
17d50d1d 128{
766ec4a9 129 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
1773912b 130
7a2f0f58
LR
131 /* connect bt_active to baseband */
132 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
133 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
134 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
1773912b 135
7a2f0f58
LR
136 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
137 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
1773912b 138
7a2f0f58
LR
139 /* Set input mux for bt_active to gpio pin */
140 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
141 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
766ec4a9 142 btcoex_hw->btactive_gpio);
f14462c6 143
7a2f0f58 144 /* Configure the desired gpio port for input */
b2d70d49
MP
145 ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
146 "ath9k-btactive");
7a2f0f58 147}
7322fd19 148EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
7a2f0f58 149
75d7839f 150void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
7a2f0f58 151{
766ec4a9 152 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
17d50d1d 153
7a2f0f58
LR
154 /* btcoex 3-wire */
155 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
156 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
157 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
17d50d1d 158
7a2f0f58
LR
159 /* Set input mux for bt_prority_async and
160 * bt_active_async to GPIO pins */
161 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
162 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
766ec4a9 163 btcoex_hw->btactive_gpio);
17d50d1d 164
7a2f0f58
LR
165 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
166 AR_GPIO_INPUT_MUX1_BT_PRIORITY,
766ec4a9 167 btcoex_hw->btpriority_gpio);
1773912b 168
7a2f0f58 169 /* Configure the desired GPIO ports for input */
b2d70d49
MP
170 ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
171 "ath9k-btactive");
172 ath9k_hw_gpio_request_in(ah, btcoex_hw->btpriority_gpio,
173 "ath9k-btpriority");
7a2f0f58 174}
7322fd19 175EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
7a2f0f58 176
db222190
MP
177void ath9k_hw_btcoex_deinit(struct ath_hw *ah)
178{
179 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
180
181 ath9k_hw_gpio_free(ah, btcoex_hw->btactive_gpio);
182 ath9k_hw_gpio_free(ah, btcoex_hw->btpriority_gpio);
183 ath9k_hw_gpio_free(ah, btcoex_hw->wlanactive_gpio);
184}
185EXPORT_SYMBOL(ath9k_hw_btcoex_deinit);
186
d3c83ac1
SM
187void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
188{
189 ah->btcoex_hw.mci.ready = false;
190 ah->btcoex_hw.mci.bt_state = 0;
191 ah->btcoex_hw.mci.bt_ver_major = 3;
192 ah->btcoex_hw.mci.bt_ver_minor = 0;
193 ah->btcoex_hw.mci.bt_version_known = false;
194 ah->btcoex_hw.mci.update_2g5g = true;
195 ah->btcoex_hw.mci.is_2g = true;
196 ah->btcoex_hw.mci.wlan_channels_update = false;
197 ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
198 ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
199 ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
200 ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
201 ah->btcoex_hw.mci.query_bt = true;
202 ah->btcoex_hw.mci.unhalt_bt_gpm = true;
203 ah->btcoex_hw.mci.halted_bt_gpm = false;
204 ah->btcoex_hw.mci.need_flush_btinfo = false;
205 ah->btcoex_hw.mci.wlan_cal_seq = 0;
206 ah->btcoex_hw.mci.wlan_cal_done = 0;
3c5c9d04 207 ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
d3c83ac1
SM
208}
209EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
210
bc74bf8f
LR
211static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
212{
766ec4a9 213 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
bc74bf8f
LR
214
215 /* Configure the desired GPIO port for TX_FRAME output */
b2d70d49
MP
216 ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
217 "ath9k-wlanactive",
218 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
bc74bf8f
LR
219}
220
5160b46f
SM
221/*
222 * For AR9002, bt_weight/wlan_weight are used.
223 * For AR9003 and above, stomp_type is used.
224 */
5e197292
LR
225void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
226 u32 bt_weight,
5160b46f
SM
227 u32 wlan_weight,
228 enum ath_stomp_type stomp_type)
5e197292
LR
229{
230 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
db60428b
RM
231 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
232 u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
233 bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
234 const u32 *weight = ar9003_wlan_weights[stomp_type];
235 int i;
5e197292 236
db60428b 237 if (!AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f
SM
238 btcoex_hw->bt_coex_weights =
239 SM(bt_weight, AR_BTCOEX_BT_WGHT) |
240 SM(wlan_weight, AR_BTCOEX_WL_WGHT);
db60428b
RM
241 return;
242 }
243
244 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
245 enum ath_stomp_type stype =
246 ((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
247 btcoex_hw->mci.stomp_ftp) ?
248 ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
249 weight = mci_wlan_weights[stype];
5160b46f 250 }
db60428b
RM
251
252 for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
253 btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
254 btcoex_hw->wlan_weight[i] = weight[i];
255 if (concur_tx && i) {
256 btcoex_hw->wlan_weight[i] &=
257 ~(0xff << txprio_shift[i-1]);
258 btcoex_hw->wlan_weight[i] |=
259 (btcoex_hw->tx_prio[stomp_type] <<
260 txprio_shift[i-1]);
261 }
262 }
263 /* Last WLAN weight has to be adjusted wrt tx priority */
264 if (concur_tx) {
265 btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
266 btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
267 << txprio_shift[i-1]);
268 }
269
5e197292 270}
7322fd19 271EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
5e197292 272
a6ef530f 273
bc74bf8f
LR
274static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
275{
54f10b05 276 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
21cb9879 277 u32 val;
54f10b05 278 int i;
bc74bf8f
LR
279
280 /*
281 * Program coex mode and weight registers to
282 * enable coex 3-wire
283 */
54f10b05
RM
284 REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
285 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
bc74bf8f 286
a6ef530f 287 if (AR_SREV_9300_20_OR_LATER(ah)) {
54f10b05
RM
288 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
289 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
290 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
291 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
292 btcoex->bt_weight[i]);
a6ef530f 293 } else
54f10b05 294 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
a6ef530f 295
21cb9879
VN
296 if (AR_SREV_9271(ah)) {
297 val = REG_READ(ah, 0x50040);
298 val &= 0xFFFFFEFF;
299 REG_WRITE(ah, 0x50040, val);
300 }
301
bc74bf8f
LR
302 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
303 REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
304
b2d70d49
MP
305 ath9k_hw_gpio_request_out(ah, btcoex->wlanactive_gpio,
306 "ath9k-wlanactive",
307 AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
bc74bf8f
LR
308}
309
8227bf45
RM
310static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
311{
312 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
313 int i;
314
315 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
316 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
317 btcoex->wlan_weight[i]);
318
319 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
320 btcoex->enabled = true;
321}
322
e1ff147d
SM
323static void ath9k_hw_btcoex_disable_mci(struct ath_hw *ah)
324{
325 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
326 int i;
327
328 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
329
330 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
331 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
332 btcoex_hw->wlan_weight[i]);
333}
334
17d50d1d
VT
335void ath9k_hw_btcoex_enable(struct ath_hw *ah)
336{
766ec4a9 337 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
f14462c6 338
8a309305 339 switch (ath9k_hw_get_btcoex_scheme(ah)) {
bc74bf8f 340 case ATH_BTCOEX_CFG_NONE:
8a309305 341 return;
bc74bf8f
LR
342 case ATH_BTCOEX_CFG_2WIRE:
343 ath9k_hw_btcoex_enable_2wire(ah);
344 break;
345 case ATH_BTCOEX_CFG_3WIRE:
346 ath9k_hw_btcoex_enable_3wire(ah);
347 break;
e1ff147d
SM
348 case ATH_BTCOEX_CFG_MCI:
349 ath9k_hw_btcoex_enable_mci(ah);
350 break;
1773912b
VT
351 }
352
e1ff147d
SM
353 if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI) {
354 REG_RMW(ah, AR_GPIO_PDPU,
355 (0x2 << (btcoex_hw->btactive_gpio * 2)),
356 (0x3 << (btcoex_hw->btactive_gpio * 2)));
357 }
17d50d1d 358
766ec4a9 359 ah->btcoex_hw.enabled = true;
17d50d1d 360}
7322fd19 361EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
17d50d1d
VT
362
363void ath9k_hw_btcoex_disable(struct ath_hw *ah)
364{
766ec4a9 365 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
54f10b05 366 int i;
f14462c6 367
8227bf45 368 btcoex_hw->enabled = false;
e1ff147d
SM
369
370 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) {
371 ath9k_hw_btcoex_disable_mci(ah);
0466e254 372 return;
8227bf45 373 }
e1ff147d 374
30b81898
SM
375 if (!AR_SREV_9300_20_OR_LATER(ah))
376 ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
17d50d1d 377
b2d70d49
MP
378 ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
379 NULL, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
17d50d1d 380
766ec4a9 381 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
1773912b 382 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
1773912b 383 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
a6ef530f
VN
384
385 if (AR_SREV_9300_20_OR_LATER(ah)) {
386 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
387 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
54f10b05
RM
388 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
389 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
a6ef530f
VN
390 } else
391 REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
392
1773912b 393 }
17d50d1d 394}
7322fd19 395EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
978f78bf 396
978f78bf
VN
397/*
398 * Configures appropriate weight based on stomp type.
399 */
400void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
401 enum ath_stomp_type stomp_type)
402{
403 if (AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f 404 ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
978f78bf
VN
405 return;
406 }
407
408 switch (stomp_type) {
409 case ATH_BTCOEX_STOMP_ALL:
410 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f 411 AR_STOMP_ALL_WLAN_WGHT, 0);
978f78bf
VN
412 break;
413 case ATH_BTCOEX_STOMP_LOW:
414 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f 415 AR_STOMP_LOW_WLAN_WGHT, 0);
978f78bf
VN
416 break;
417 case ATH_BTCOEX_STOMP_NONE:
418 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f 419 AR_STOMP_NONE_WLAN_WGHT, 0);
978f78bf
VN
420 break;
421 default:
d2182b69 422 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
978f78bf
VN
423 break;
424 }
978f78bf
VN
425}
426EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
db60428b
RM
427
428void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
429{
430 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
431 int i;
432
433 for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
434 btcoex->tx_prio[i] = stomp_txprio[i];
435}
436EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);