[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / ath / ath9k / btcoex.c

/*
 * Copyright (c) 2009-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/export.h>
#include <linux/types.h>
#include <linux/ath9k_platform.h>
#include "hw.h"

enum ath_bt_mode {
	ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
	ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
	ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
	ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
};

struct ath_btcoex_config {
	u8 bt_time_extend;
	bool bt_txstate_extend;
	bool bt_txframe_extend;
	enum ath_bt_mode bt_mode; /* coexistence mode */
	bool bt_quiet_collision;
	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	u8 bt_priority_time;
	u8 bt_first_slot_time;
	bool bt_hold_rx_clear;
	u8 wl_active_time;
	u8 wl_qc_time;
};

static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				    [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
};

static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				 [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
	{ 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
};

void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	const struct ath_btcoex_config ath_bt_config = {
		.bt_time_extend = 0,
		.bt_txstate_extend = true,
		.bt_txframe_extend = true,
		.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
		.bt_quiet_collision = true,
		.bt_rxclear_polarity = true,
		.bt_priority_time = 2,
		.bt_first_slot_time = 5,
		.bt_hold_rx_clear = true,
		.wl_active_time = 0x20,
		.wl_qc_time = 0x20,
	};
	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
	u8 time_extend = ath_bt_config.bt_time_extend;
	u8 first_slot_time = ath_bt_config.bt_first_slot_time;

	if (AR_SREV_9300_20_OR_LATER(ah))
		rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;

	if (AR_SREV_SOC(ah)) {
		first_slot_time = 0x1d;
		time_extend = 0xa;

		btcoex_hw->bt_coex_mode3 =
			SM(ath_bt_config.wl_active_time, AR_BT_WL_ACTIVE_TIME) |
			SM(ath_bt_config.wl_qc_time, AR_BT_WL_QC_TIME);

		btcoex_hw->bt_coex_mode2 =
			AR_BT_PROTECT_BT_AFTER_WAKEUP |
			AR_BT_PHY_ERR_BT_COLL_ENABLE;
	}

	btcoex_hw->bt_coex_mode =
		(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
		SM(time_extend, AR_BT_TIME_EXTEND) |
		SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
		SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
		SM(ath_bt_config.bt_mode, AR_BT_MODE) |
		SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
		SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
		SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
		SM(first_slot_time, AR_BT_FIRST_SLOT_TIME) |
		SM(qnum, AR_BT_QCU_THRESH);

	btcoex_hw->bt_coex_mode2 |=
		SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
		SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
		AR_BT_DISABLE_BT_ANT;
}
EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);

static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio,
				     u8 btactive_gpio, u8 btpriority_gpio)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	struct ath9k_platform_data *pdata = ah->dev->platform_data;

	if (btcoex_hw->scheme != ATH_BTCOEX_CFG_2WIRE &&
	    btcoex_hw->scheme != ATH_BTCOEX_CFG_3WIRE)
		return;

	/* bt priority GPIO will be ignored by 2 wire scheme */
	if (pdata && (pdata->bt_active_pin || pdata->bt_priority_pin ||
		      pdata->wlan_active_pin)) {
		btcoex_hw->btactive_gpio = pdata->bt_active_pin;
		btcoex_hw->wlanactive_gpio = pdata->wlan_active_pin;
		btcoex_hw->btpriority_gpio = pdata->bt_priority_pin;
	} else {
		btcoex_hw->btactive_gpio = btactive_gpio;
		btcoex_hw->wlanactive_gpio = wlanactive_gpio;
		btcoex_hw->btpriority_gpio = btpriority_gpio;
	}
}

void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
{
	struct ath_common *common = ath9k_hw_common(ah);
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/*
	 * Check if BTCOEX is globally disabled.
	 */
	if (!common->btcoex_enabled) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
		return;
	}

	if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
	} else if (AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;

		ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9300,
					 ATH_BTACTIVE_GPIO_9300,
					 ATH_BTPRIORITY_GPIO_9300);
	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
		if (AR_SREV_9285(ah))
			btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
		else
			btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;

		ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9280,
					 ATH_BTACTIVE_GPIO_9280,
					 ATH_BTPRIORITY_GPIO_9285);
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);

void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* connect bt_active to baseband */
	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
		    (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
		     AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));

	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
		    AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);

	/* Set input mux for bt_active to gpio pin */
	if (!AR_SREV_SOC(ah))
		REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			      AR_GPIO_INPUT_MUX1_BT_ACTIVE,
			      btcoex_hw->btactive_gpio);

	/* Configure the desired gpio port for input */
	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
				 "ath9k-btactive");
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);

void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* btcoex 3-wire */
	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
			(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
			 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));

	/* Set input mux for bt_prority_async and
	 *                  bt_active_async to GPIO pins */
	if (!AR_SREV_SOC(ah)) {
		REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			      AR_GPIO_INPUT_MUX1_BT_ACTIVE,
			      btcoex_hw->btactive_gpio);
		REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			      AR_GPIO_INPUT_MUX1_BT_PRIORITY,
			      btcoex_hw->btpriority_gpio);
	}

	/* Configure the desired GPIO ports for input */
	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
				 "ath9k-btactive");
	ath9k_hw_gpio_request_in(ah, btcoex_hw->btpriority_gpio,
				 "ath9k-btpriority");
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);

void ath9k_hw_btcoex_deinit(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	ath9k_hw_gpio_free(ah, btcoex_hw->btactive_gpio);
	ath9k_hw_gpio_free(ah, btcoex_hw->btpriority_gpio);
	ath9k_hw_gpio_free(ah, btcoex_hw->wlanactive_gpio);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_deinit);

void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
{
	ah->btcoex_hw.mci.ready = false;
	ah->btcoex_hw.mci.bt_state = 0;
	ah->btcoex_hw.mci.bt_ver_major = 3;
	ah->btcoex_hw.mci.bt_ver_minor = 0;
	ah->btcoex_hw.mci.bt_version_known = false;
	ah->btcoex_hw.mci.update_2g5g = true;
	ah->btcoex_hw.mci.is_2g = true;
	ah->btcoex_hw.mci.wlan_channels_update = false;
	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	ah->btcoex_hw.mci.query_bt = true;
	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	ah->btcoex_hw.mci.halted_bt_gpm = false;
	ah->btcoex_hw.mci.need_flush_btinfo = false;
	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	ah->btcoex_hw.mci.wlan_cal_done = 0;
	ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);

static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* Configure the desired GPIO port for TX_FRAME output */
	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
				  "ath9k-wlanactive",
				  AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
}

/*
 * For AR9002, bt_weight/wlan_weight are used.
 * For AR9003 and above, stomp_type is used.
 */
void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
				u32 bt_weight,
				u32 wlan_weight,
				enum ath_stomp_type stomp_type)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
	u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
	bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
	const u32 *weight = ar9003_wlan_weights[stomp_type];
	int i;

	if (!AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->bt_coex_weights =
			SM(bt_weight, AR_BTCOEX_BT_WGHT) |
			SM(wlan_weight, AR_BTCOEX_WL_WGHT);
		return;
	}

	if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
		enum ath_stomp_type stype =
			((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
			 btcoex_hw->mci.stomp_ftp) ?
			ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
		weight = mci_wlan_weights[stype];
	}

	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
		btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
		btcoex_hw->wlan_weight[i] = weight[i];
		if (concur_tx && i) {
			btcoex_hw->wlan_weight[i] &=
				~(0xff << txprio_shift[i-1]);
			btcoex_hw->wlan_weight[i] |=
				(btcoex_hw->tx_prio[stomp_type] <<
				 txprio_shift[i-1]);
		}
	}

	/* Last WLAN weight has to be adjusted wrt tx priority */
	if (concur_tx) {
		btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
		btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
						      << txprio_shift[i-1]);
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);


static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	u32  val;
	int i;

	/*
	 * Program coex mode and weight registers to
	 * enable coex 3-wire
	 */
	if (AR_SREV_SOC(ah))
		REG_CLR_BIT(ah, AR_BT_COEX_MODE2, AR_BT_PHY_ERR_BT_COLL_ENABLE);

	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);

	if (AR_SREV_SOC(ah))
		REG_WRITE(ah, AR_BT_COEX_MODE3, btcoex->bt_coex_mode3);

	if (AR_SREV_9300_20_OR_LATER(ah)) {
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
		for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
			REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
				  btcoex->bt_weight[i]);
	} else
		REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);

	if (AR_SREV_9271(ah)) {
		val = REG_READ(ah, 0x50040);
		val &= 0xFFFFFEFF;
		REG_WRITE(ah, 0x50040, val);
	}

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);

	ath9k_hw_gpio_request_out(ah, btcoex->wlanactive_gpio,
				  "ath9k-wlanactive",
				  AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
}

static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
		REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
			  btcoex->wlan_weight[i]);

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	btcoex->enabled = true;
}

static void ath9k_hw_btcoex_disable_mci(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	int i;

	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);

	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
		REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
			  btcoex_hw->wlan_weight[i]);
}

void ath9k_hw_btcoex_enable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	switch (ath9k_hw_get_btcoex_scheme(ah)) {
	case ATH_BTCOEX_CFG_NONE:
		return;
	case ATH_BTCOEX_CFG_2WIRE:
		ath9k_hw_btcoex_enable_2wire(ah);
		break;
	case ATH_BTCOEX_CFG_3WIRE:
		ath9k_hw_btcoex_enable_3wire(ah);
		break;
	case ATH_BTCOEX_CFG_MCI:
		ath9k_hw_btcoex_enable_mci(ah);
		break;
	}

	if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI &&
	    !AR_SREV_SOC(ah)) {
		REG_RMW(ah, AR_GPIO_PDPU,
			(0x2 << (btcoex_hw->btactive_gpio * 2)),
			(0x3 << (btcoex_hw->btactive_gpio * 2)));
	}

	ah->btcoex_hw.enabled = true;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_enable);

void ath9k_hw_btcoex_disable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	int i;

	btcoex_hw->enabled = false;

	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) {
		ath9k_hw_btcoex_disable_mci(ah);
		return;
	}

	if (!AR_SREV_9300_20_OR_LATER(ah))
		ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);

	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
				  NULL, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
		REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
		REG_WRITE(ah, AR_BT_COEX_MODE2, 0);

		if (AR_SREV_9300_20_OR_LATER(ah)) {
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
			for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
				REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
		} else
			REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);

	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_disable);

/*
 * Configures appropriate weight based on stomp type.
 */
void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
			      enum ath_stomp_type stomp_type)
{
	if (AR_SREV_9300_20_OR_LATER(ah)) {
		ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
		return;
	}

	switch (stomp_type) {
	case ATH_BTCOEX_STOMP_ALL:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_ALL_WLAN_WGHT, 0);
		break;
	case ATH_BTCOEX_STOMP_LOW:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_LOW_WLAN_WGHT, 0);
		break;
	case ATH_BTCOEX_STOMP_NONE:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_NONE_WLAN_WGHT, 0);
		break;
	default:
		ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
		break;
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);

void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
		btcoex->tx_prio[i] = stomp_txprio[i];
}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);
Commit	Line	Data
17d50d1d	1	/*
5b68138e	2	* Copyright (c) 2009-2011 Atheros Communications Inc.
17d50d1d VT	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
ee40fa06	17	#include <linux/export.h>
c8770bcf MP	18	#include <linux/types.h>
c8770bcf MP	19	#include <linux/ath9k_platform.h>
cfe8cba9	20	#include "hw.h"
17d50d1d	21
8b4fc5ba LR	22	enum ath_bt_mode {
	23	ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
	24	ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
	25	ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
32b1076d	26	ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
8b4fc5ba LR	27	};
	28
	29	struct ath_btcoex_config {
	30	u8 bt_time_extend;
	31	bool bt_txstate_extend;
	32	bool bt_txframe_extend;
	33	enum ath_bt_mode bt_mode; /* coexistence mode */
	34	bool bt_quiet_collision;
	35	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	36	u8 bt_priority_time;
	37	u8 bt_first_slot_time;
	38	bool bt_hold_rx_clear;
c7212b71 MP	39	u8 wl_active_time;
c7212b71 MP	40	u8 wl_qc_time;
8b4fc5ba	41	};
1773912b	42
54f10b05 RM	43	static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
	44	[AR9300_NUM_WLAN_WEIGHTS] = {
	45	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	46	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	47	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
	48	};
1773912b	49
5160b46f SM	50	static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
5160b46f SM	51	[AR9300_NUM_WLAN_WEIGHTS] = {
8227bf45 RM	52	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	53	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	54	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	55	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
2884561a	56	{ 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
8227bf45 RM	57	};
8227bf45 RM	58
766ec4a9	59	void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
af03abec	60	{
766ec4a9	61	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
8b4fc5ba LR	62	const struct ath_btcoex_config ath_bt_config = {
	63	.bt_time_extend = 0,
	64	.bt_txstate_extend = true,
	65	.bt_txframe_extend = true,
	66	.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
	67	.bt_quiet_collision = true,
	68	.bt_rxclear_polarity = true,
	69	.bt_priority_time = 2,
	70	.bt_first_slot_time = 5,
	71	.bt_hold_rx_clear = true,
c7212b71 MP	72	.wl_active_time = 0x20,
c7212b71 MP	73	.wl_qc_time = 0x20,
8b4fc5ba	74	};
a6ef530f	75	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
c7212b71 MP	76	u8 time_extend = ath_bt_config.bt_time_extend;
c7212b71 MP	77	u8 first_slot_time = ath_bt_config.bt_first_slot_time;
a6ef530f VN	78
	79	if (AR_SREV_9300_20_OR_LATER(ah))
	80	rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
1773912b	81
c7212b71 MP	82	if (AR_SREV_SOC(ah)) {
	83	first_slot_time = 0x1d;
	84	time_extend = 0xa;
	85
	86	btcoex_hw->bt_coex_mode3 =
	87	SM(ath_bt_config.wl_active_time, AR_BT_WL_ACTIVE_TIME) \|
	88	SM(ath_bt_config.wl_qc_time, AR_BT_WL_QC_TIME);
	89
	90	btcoex_hw->bt_coex_mode2 =
	91	AR_BT_PROTECT_BT_AFTER_WAKEUP \|
	92	AR_BT_PHY_ERR_BT_COLL_ENABLE;
	93	}
	94
766ec4a9 LR	95	btcoex_hw->bt_coex_mode =
766ec4a9 LR	96	(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) \|
c7212b71	97	SM(time_extend, AR_BT_TIME_EXTEND) \|
1773912b VT	98	SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) \|
	99	SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) \|
	100	SM(ath_bt_config.bt_mode, AR_BT_MODE) \|
	101	SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) \|
a6ef530f	102	SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) \|
1773912b	103	SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) \|
c7212b71	104	SM(first_slot_time, AR_BT_FIRST_SLOT_TIME) \|
1773912b VT	105	SM(qnum, AR_BT_QCU_THRESH);
1773912b VT	106
c7212b71	107	btcoex_hw->bt_coex_mode2 \|=
1773912b VT	108	SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) \|
	109	SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) \|
	110	AR_BT_DISABLE_BT_ANT;
1773912b	111	}
7322fd19	112	EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
1773912b	113
c8770bcf MP	114	static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio,
	115	u8 btactive_gpio, u8 btpriority_gpio)
	116	{
	117	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	118	struct ath9k_platform_data *pdata = ah->dev->platform_data;
	119
	120	if (btcoex_hw->scheme != ATH_BTCOEX_CFG_2WIRE &&
	121	btcoex_hw->scheme != ATH_BTCOEX_CFG_3WIRE)
	122	return;
	123
	124	/* bt priority GPIO will be ignored by 2 wire scheme */
	125	if (pdata && (pdata->bt_active_pin \|\| pdata->bt_priority_pin \|\|
	126	pdata->wlan_active_pin)) {
	127	btcoex_hw->btactive_gpio = pdata->bt_active_pin;
	128	btcoex_hw->wlanactive_gpio = pdata->wlan_active_pin;
	129	btcoex_hw->btpriority_gpio = pdata->bt_priority_pin;
	130	} else {
	131	btcoex_hw->btactive_gpio = btactive_gpio;
	132	btcoex_hw->wlanactive_gpio = wlanactive_gpio;
	133	btcoex_hw->btpriority_gpio = btpriority_gpio;
	134	}
	135	}
	136
d68475de SM	137	void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
	138	{
	139	struct ath_common *common = ath9k_hw_common(ah);
	140	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	141
	142	/*
	143	* Check if BTCOEX is globally disabled.
	144	*/
	145	if (!common->btcoex_enabled) {
	146	btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
	147	return;
	148	}
	149
e1ff147d SM	150	if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
	151	btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
	152	} else if (AR_SREV_9300_20_OR_LATER(ah)) {
d68475de	153	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
d68475de	154
c8770bcf MP	155	ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9300,
	156	ATH_BTACTIVE_GPIO_9300,
	157	ATH_BTPRIORITY_GPIO_9300);
	158	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
	159	if (AR_SREV_9285(ah))
d68475de	160	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
c8770bcf	161	else
d68475de	162	btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
c8770bcf MP	163
	164	ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9280,
	165	ATH_BTACTIVE_GPIO_9280,
	166	ATH_BTPRIORITY_GPIO_9285);
d68475de SM	167	}
	168	}
	169	EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
	170
75d7839f	171	void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
17d50d1d	172	{
766ec4a9	173	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
1773912b	174
7a2f0f58 LR	175	/* connect bt_active to baseband */
	176	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
	177	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF \|
	178	AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
1773912b	179
7a2f0f58 LR	180	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
7a2f0f58 LR	181	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
1773912b	182
7a2f0f58	183	/* Set input mux for bt_active to gpio pin */
dfcf02cd MP	184	if (!AR_SREV_SOC(ah))
	185	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	186	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
	187	btcoex_hw->btactive_gpio);
f14462c6	188
7a2f0f58	189	/* Configure the desired gpio port for input */
b2d70d49 MP	190	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
b2d70d49 MP	191	"ath9k-btactive");
7a2f0f58	192	}
7322fd19	193	EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
7a2f0f58	194
75d7839f	195	void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
7a2f0f58	196	{
766ec4a9	197	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
17d50d1d	198
7a2f0f58 LR	199	/* btcoex 3-wire */
	200	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
	201	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB \|
	202	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
17d50d1d	203
7a2f0f58 LR	204	/* Set input mux for bt_prority_async and
7a2f0f58 LR	205	* bt_active_async to GPIO pins */
dfcf02cd MP	206	if (!AR_SREV_SOC(ah)) {
	207	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	208	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
	209	btcoex_hw->btactive_gpio);
	210	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	211	AR_GPIO_INPUT_MUX1_BT_PRIORITY,
	212	btcoex_hw->btpriority_gpio);
	213	}
1773912b	214
7a2f0f58	215	/* Configure the desired GPIO ports for input */
b2d70d49 MP	216	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
	217	"ath9k-btactive");
	218	ath9k_hw_gpio_request_in(ah, btcoex_hw->btpriority_gpio,
	219	"ath9k-btpriority");
7a2f0f58	220	}
7322fd19	221	EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
7a2f0f58	222
db222190 MP	223	void ath9k_hw_btcoex_deinit(struct ath_hw *ah)
	224	{
	225	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	226
	227	ath9k_hw_gpio_free(ah, btcoex_hw->btactive_gpio);
	228	ath9k_hw_gpio_free(ah, btcoex_hw->btpriority_gpio);
	229	ath9k_hw_gpio_free(ah, btcoex_hw->wlanactive_gpio);
	230	}
	231	EXPORT_SYMBOL(ath9k_hw_btcoex_deinit);
	232
d3c83ac1 SM	233	void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
	234	{
	235	ah->btcoex_hw.mci.ready = false;
	236	ah->btcoex_hw.mci.bt_state = 0;
	237	ah->btcoex_hw.mci.bt_ver_major = 3;
	238	ah->btcoex_hw.mci.bt_ver_minor = 0;
	239	ah->btcoex_hw.mci.bt_version_known = false;
	240	ah->btcoex_hw.mci.update_2g5g = true;
	241	ah->btcoex_hw.mci.is_2g = true;
	242	ah->btcoex_hw.mci.wlan_channels_update = false;
	243	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	244	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	245	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	246	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	247	ah->btcoex_hw.mci.query_bt = true;
	248	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	249	ah->btcoex_hw.mci.halted_bt_gpm = false;
	250	ah->btcoex_hw.mci.need_flush_btinfo = false;
	251	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	252	ah->btcoex_hw.mci.wlan_cal_done = 0;
3c5c9d04	253	ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
d3c83ac1 SM	254	}
	255	EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
	256
bc74bf8f LR	257	static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
bc74bf8f LR	258	{
766ec4a9	259	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
bc74bf8f LR	260
bc74bf8f LR	261	/* Configure the desired GPIO port for TX_FRAME output */
b2d70d49 MP	262	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
	263	"ath9k-wlanactive",
	264	AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
bc74bf8f LR	265	}
bc74bf8f LR	266
5160b46f SM	267	/*
	268	* For AR9002, bt_weight/wlan_weight are used.
	269	* For AR9003 and above, stomp_type is used.
	270	*/
5e197292 LR	271	void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
5e197292 LR	272	u32 bt_weight,
5160b46f SM	273	u32 wlan_weight,
5160b46f SM	274	enum ath_stomp_type stomp_type)
5e197292 LR	275	{
5e197292 LR	276	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
db60428b RM	277	struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
	278	u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
	279	bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
	280	const u32 *weight = ar9003_wlan_weights[stomp_type];
	281	int i;
5e197292	282
db60428b	283	if (!AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f SM	284	btcoex_hw->bt_coex_weights =
	285	SM(bt_weight, AR_BTCOEX_BT_WGHT) \|
	286	SM(wlan_weight, AR_BTCOEX_WL_WGHT);
db60428b RM	287	return;
	288	}
	289
	290	if (AR_SREV_9462(ah) \|\| AR_SREV_9565(ah)) {
	291	enum ath_stomp_type stype =
	292	((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
	293	btcoex_hw->mci.stomp_ftp) ?
	294	ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
	295	weight = mci_wlan_weights[stype];
5160b46f	296	}
db60428b RM	297
	298	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
	299	btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
	300	btcoex_hw->wlan_weight[i] = weight[i];
	301	if (concur_tx && i) {
	302	btcoex_hw->wlan_weight[i] &=
	303	~(0xff << txprio_shift[i-1]);
	304	btcoex_hw->wlan_weight[i] \|=
	305	(btcoex_hw->tx_prio[stomp_type] <<
	306	txprio_shift[i-1]);
	307	}
	308	}
dfcf02cd	309
db60428b RM	310	/* Last WLAN weight has to be adjusted wrt tx priority */
	311	if (concur_tx) {
	312	btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
	313	btcoex_hw->wlan_weight[i-1] \|= (btcoex_hw->tx_prio[stomp_type]
	314	<< txprio_shift[i-1]);
	315	}
5e197292	316	}
7322fd19	317	EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
5e197292	318
a6ef530f	319
bc74bf8f LR	320	static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
bc74bf8f LR	321	{
54f10b05	322	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
21cb9879	323	u32 val;
54f10b05	324	int i;
bc74bf8f LR	325
	326	/*
	327	* Program coex mode and weight registers to
	328	* enable coex 3-wire
	329	*/
c7212b71 MP	330	if (AR_SREV_SOC(ah))
	331	REG_CLR_BIT(ah, AR_BT_COEX_MODE2, AR_BT_PHY_ERR_BT_COLL_ENABLE);
	332
54f10b05 RM	333	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
54f10b05 RM	334	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
bc74bf8f	335
c7212b71 MP	336	if (AR_SREV_SOC(ah))
	337	REG_WRITE(ah, AR_BT_COEX_MODE3, btcoex->bt_coex_mode3);
	338
a6ef530f	339	if (AR_SREV_9300_20_OR_LATER(ah)) {
54f10b05 RM	340	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
	341	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
	342	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	343	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
	344	btcoex->bt_weight[i]);
a6ef530f	345	} else
54f10b05	346	REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
a6ef530f	347
21cb9879 VN	348	if (AR_SREV_9271(ah)) {
	349	val = REG_READ(ah, 0x50040);
	350	val &= 0xFFFFFEFF;
	351	REG_WRITE(ah, 0x50040, val);
	352	}
	353
bc74bf8f LR	354	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	355	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
	356
b2d70d49 MP	357	ath9k_hw_gpio_request_out(ah, btcoex->wlanactive_gpio,
	358	"ath9k-wlanactive",
	359	AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
bc74bf8f LR	360	}
bc74bf8f LR	361
8227bf45 RM	362	static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
	363	{
	364	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	365	int i;
	366
	367	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	368	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	369	btcoex->wlan_weight[i]);
	370
	371	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	372	btcoex->enabled = true;
	373	}
	374
e1ff147d SM	375	static void ath9k_hw_btcoex_disable_mci(struct ath_hw *ah)
	376	{
	377	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	378	int i;
	379
	380	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
	381
	382	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	383	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	384	btcoex_hw->wlan_weight[i]);
	385	}
	386
17d50d1d VT	387	void ath9k_hw_btcoex_enable(struct ath_hw *ah)
17d50d1d VT	388	{
766ec4a9	389	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
f14462c6	390
8a309305	391	switch (ath9k_hw_get_btcoex_scheme(ah)) {
bc74bf8f	392	case ATH_BTCOEX_CFG_NONE:
8a309305	393	return;
bc74bf8f LR	394	case ATH_BTCOEX_CFG_2WIRE:
	395	ath9k_hw_btcoex_enable_2wire(ah);
	396	break;
	397	case ATH_BTCOEX_CFG_3WIRE:
	398	ath9k_hw_btcoex_enable_3wire(ah);
	399	break;
e1ff147d SM	400	case ATH_BTCOEX_CFG_MCI:
	401	ath9k_hw_btcoex_enable_mci(ah);
	402	break;
1773912b VT	403	}
1773912b VT	404
dfcf02cd MP	405	if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI &&
dfcf02cd MP	406	!AR_SREV_SOC(ah)) {
e1ff147d SM	407	REG_RMW(ah, AR_GPIO_PDPU,
	408	(0x2 << (btcoex_hw->btactive_gpio * 2)),
	409	(0x3 << (btcoex_hw->btactive_gpio * 2)));
	410	}
17d50d1d	411
766ec4a9	412	ah->btcoex_hw.enabled = true;
17d50d1d	413	}
7322fd19	414	EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
17d50d1d VT	415
	416	void ath9k_hw_btcoex_disable(struct ath_hw *ah)
	417	{
766ec4a9	418	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
54f10b05	419	int i;
f14462c6	420
8227bf45	421	btcoex_hw->enabled = false;
e1ff147d SM	422
	423	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) {
	424	ath9k_hw_btcoex_disable_mci(ah);
0466e254	425	return;
8227bf45	426	}
e1ff147d	427
30b81898 SM	428	if (!AR_SREV_9300_20_OR_LATER(ah))
30b81898 SM	429	ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
17d50d1d	430
b2d70d49 MP	431	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
b2d70d49 MP	432	NULL, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
17d50d1d	433
766ec4a9	434	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
1773912b	435	REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET \| AR_BT_MODE);
1773912b	436	REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
a6ef530f VN	437
	438	if (AR_SREV_9300_20_OR_LATER(ah)) {
	439	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
	440	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
54f10b05 RM	441	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
54f10b05 RM	442	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
a6ef530f VN	443	} else
	444	REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
	445
1773912b	446	}
17d50d1d	447	}
7322fd19	448	EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
978f78bf	449
978f78bf VN	450	/*
	451	* Configures appropriate weight based on stomp type.
	452	*/
	453	void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
	454	enum ath_stomp_type stomp_type)
	455	{
	456	if (AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f	457	ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
978f78bf VN	458	return;
	459	}
	460
	461	switch (stomp_type) {
	462	case ATH_BTCOEX_STOMP_ALL:
	463	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f	464	AR_STOMP_ALL_WLAN_WGHT, 0);
978f78bf VN	465	break;
	466	case ATH_BTCOEX_STOMP_LOW:
	467	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f	468	AR_STOMP_LOW_WLAN_WGHT, 0);
978f78bf VN	469	break;
	470	case ATH_BTCOEX_STOMP_NONE:
	471	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f	472	AR_STOMP_NONE_WLAN_WGHT, 0);
978f78bf VN	473	break;
978f78bf VN	474	default:
d2182b69	475	ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
978f78bf VN	476	break;
978f78bf VN	477	}
978f78bf VN	478	}
978f78bf VN	479	EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
db60428b RM	480
	481	void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw ah, u8 stomp_txprio)
	482	{
	483	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	484	int i;
	485
	486	for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
	487	btcoex->tx_prio[i] = stomp_txprio[i];
	488	}
	489	EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);