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Commit | Line | Data |
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0fca65c1 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
0fca65c1 S |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "ath9k.h" | |
18 | ||
19 | /********************************/ | |
20 | /* LED functions */ | |
21 | /********************************/ | |
22 | ||
0cf55c21 | 23 | #ifdef CONFIG_MAC80211_LEDS |
0fca65c1 S |
24 | static void ath_led_brightness(struct led_classdev *led_cdev, |
25 | enum led_brightness brightness) | |
26 | { | |
0cf55c21 | 27 | struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev); |
aeeb2065 SM |
28 | u32 val = (brightness == LED_OFF); |
29 | ||
30 | if (sc->sc_ah->config.led_active_high) | |
31 | val = !val; | |
32 | ||
33 | ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val); | |
0fca65c1 S |
34 | } |
35 | ||
36 | void ath_deinit_leds(struct ath_softc *sc) | |
37 | { | |
0cf55c21 FF |
38 | if (!sc->led_registered) |
39 | return; | |
40 | ||
41 | ath_led_brightness(&sc->led_cdev, LED_OFF); | |
42 | led_classdev_unregister(&sc->led_cdev); | |
0fca65c1 S |
43 | } |
44 | ||
45 | void ath_init_leds(struct ath_softc *sc) | |
46 | { | |
0fca65c1 S |
47 | int ret; |
48 | ||
7b27ba4e FF |
49 | if (AR_SREV_9100(sc->sc_ah)) |
50 | return; | |
51 | ||
0c8a1e43 | 52 | if (!ath9k_led_blink) |
0cf55c21 FF |
53 | sc->led_cdev.default_trigger = |
54 | ieee80211_get_radio_led_name(sc->hw); | |
55 | ||
56 | snprintf(sc->led_name, sizeof(sc->led_name), | |
57 | "ath9k-%s", wiphy_name(sc->hw->wiphy)); | |
58 | sc->led_cdev.name = sc->led_name; | |
59 | sc->led_cdev.brightness_set = ath_led_brightness; | |
60 | ||
61 | ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev); | |
62 | if (ret < 0) | |
63 | return; | |
64 | ||
65 | sc->led_registered = true; | |
0fca65c1 | 66 | } |
8f176a3a RM |
67 | |
68 | void ath_fill_led_pin(struct ath_softc *sc) | |
69 | { | |
70 | struct ath_hw *ah = sc->sc_ah; | |
71 | ||
72 | if (AR_SREV_9100(ah) || (ah->led_pin >= 0)) | |
73 | return; | |
74 | ||
75 | if (AR_SREV_9287(ah)) | |
76 | ah->led_pin = ATH_LED_PIN_9287; | |
77 | else if (AR_SREV_9485(sc->sc_ah)) | |
78 | ah->led_pin = ATH_LED_PIN_9485; | |
79 | else if (AR_SREV_9300(sc->sc_ah)) | |
80 | ah->led_pin = ATH_LED_PIN_9300; | |
81 | else if (AR_SREV_9462(sc->sc_ah) || AR_SREV_9565(sc->sc_ah)) | |
82 | ah->led_pin = ATH_LED_PIN_9462; | |
83 | else | |
84 | ah->led_pin = ATH_LED_PIN_DEF; | |
85 | ||
86 | /* Configure gpio 1 for output */ | |
87 | ath9k_hw_cfg_output(ah, ah->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT); | |
88 | ||
89 | /* LED off, active low */ | |
aeeb2065 | 90 | ath9k_hw_set_gpio(ah, ah->led_pin, (ah->config.led_active_high) ? 0 : 1); |
8f176a3a | 91 | } |
0cf55c21 | 92 | #endif |
0fca65c1 S |
93 | |
94 | /*******************/ | |
95 | /* Rfkill */ | |
96 | /*******************/ | |
97 | ||
98 | static bool ath_is_rfkill_set(struct ath_softc *sc) | |
99 | { | |
100 | struct ath_hw *ah = sc->sc_ah; | |
90826313 | 101 | bool is_blocked; |
0fca65c1 | 102 | |
90826313 MSS |
103 | ath9k_ps_wakeup(sc); |
104 | is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) == | |
0fca65c1 | 105 | ah->rfkill_polarity; |
90826313 MSS |
106 | ath9k_ps_restore(sc); |
107 | ||
108 | return is_blocked; | |
0fca65c1 S |
109 | } |
110 | ||
111 | void ath9k_rfkill_poll_state(struct ieee80211_hw *hw) | |
112 | { | |
9ac58615 | 113 | struct ath_softc *sc = hw->priv; |
0fca65c1 S |
114 | bool blocked = !!ath_is_rfkill_set(sc); |
115 | ||
116 | wiphy_rfkill_set_hw_state(hw->wiphy, blocked); | |
117 | } | |
118 | ||
119 | void ath_start_rfkill_poll(struct ath_softc *sc) | |
120 | { | |
121 | struct ath_hw *ah = sc->sc_ah; | |
122 | ||
123 | if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) | |
124 | wiphy_rfkill_start_polling(sc->hw->wiphy); | |
125 | } | |
126 | ||
4daa7760 SM |
127 | #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT |
128 | ||
0fca65c1 S |
129 | /******************/ |
130 | /* BTCOEX */ | |
131 | /******************/ | |
132 | ||
133 | /* | |
134 | * Detects if there is any priority bt traffic | |
135 | */ | |
136 | static void ath_detect_bt_priority(struct ath_softc *sc) | |
137 | { | |
138 | struct ath_btcoex *btcoex = &sc->btcoex; | |
139 | struct ath_hw *ah = sc->sc_ah; | |
140 | ||
141 | if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio)) | |
142 | btcoex->bt_priority_cnt++; | |
143 | ||
144 | if (time_after(jiffies, btcoex->bt_priority_time + | |
145 | msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) { | |
e6930c4b SM |
146 | clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
147 | clear_bit(BT_OP_SCAN, &btcoex->op_flags); | |
58da1318 VT |
148 | /* Detect if colocated bt started scanning */ |
149 | if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) { | |
d2182b69 | 150 | ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, |
226afe68 | 151 | "BT scan detected\n"); |
e6930c4b SM |
152 | set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
153 | set_bit(BT_OP_SCAN, &btcoex->op_flags); | |
58da1318 | 154 | } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) { |
d2182b69 | 155 | ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, |
226afe68 | 156 | "BT priority traffic detected\n"); |
e6930c4b | 157 | set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
0fca65c1 S |
158 | } |
159 | ||
160 | btcoex->bt_priority_cnt = 0; | |
161 | btcoex->bt_priority_time = jiffies; | |
162 | } | |
163 | } | |
164 | ||
78b1775b SM |
165 | static void ath_mci_ftp_adjust(struct ath_softc *sc) |
166 | { | |
167 | struct ath_btcoex *btcoex = &sc->btcoex; | |
168 | struct ath_mci_profile *mci = &btcoex->mci; | |
169 | struct ath_hw *ah = sc->sc_ah; | |
170 | ||
78b1775b SM |
171 | if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) { |
172 | if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) && | |
173 | (mci->num_pan || mci->num_other_acl)) | |
174 | ah->btcoex_hw.mci.stomp_ftp = | |
175 | (sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH); | |
176 | else | |
177 | ah->btcoex_hw.mci.stomp_ftp = false; | |
178 | btcoex->bt_wait_time = 0; | |
179 | sc->rx.num_pkts = 0; | |
180 | } | |
181 | } | |
182 | ||
0fca65c1 S |
183 | /* |
184 | * This is the master bt coex timer which runs for every | |
185 | * 45ms, bt traffic will be given priority during 55% of this | |
186 | * period while wlan gets remaining 45% | |
187 | */ | |
188 | static void ath_btcoex_period_timer(unsigned long data) | |
189 | { | |
190 | struct ath_softc *sc = (struct ath_softc *) data; | |
191 | struct ath_hw *ah = sc->sc_ah; | |
192 | struct ath_btcoex *btcoex = &sc->btcoex; | |
750f32cf | 193 | enum ath_stomp_type stomp_type; |
58da1318 | 194 | u32 timer_period; |
08d4df41 RM |
195 | unsigned long flags; |
196 | ||
197 | spin_lock_irqsave(&sc->sc_pm_lock, flags); | |
198 | if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) { | |
be41b052 | 199 | btcoex->bt_wait_time += btcoex->btcoex_period; |
08d4df41 RM |
200 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); |
201 | goto skip_hw_wakeup; | |
202 | } | |
203 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); | |
0fca65c1 | 204 | |
e82cb03f RM |
205 | ath9k_mci_update_rssi(sc); |
206 | ||
a039a993 | 207 | ath9k_ps_wakeup(sc); |
750f32cf | 208 | |
7dc181c2 RM |
209 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) |
210 | ath_detect_bt_priority(sc); | |
58da1318 | 211 | |
78b1775b SM |
212 | if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) |
213 | ath_mci_ftp_adjust(sc); | |
6995fb80 | 214 | |
0fca65c1 S |
215 | spin_lock_bh(&btcoex->btcoex_lock); |
216 | ||
750f32cf SM |
217 | stomp_type = btcoex->bt_stomp_type; |
218 | timer_period = btcoex->btcoex_no_stomp; | |
219 | ||
220 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) { | |
221 | if (test_bit(BT_OP_SCAN, &btcoex->op_flags)) { | |
222 | stomp_type = ATH_BTCOEX_STOMP_ALL; | |
223 | timer_period = btcoex->btscan_no_stomp; | |
224 | } | |
2884561a RM |
225 | } else if (btcoex->stomp_audio >= 5) { |
226 | stomp_type = ATH_BTCOEX_STOMP_AUDIO; | |
227 | btcoex->stomp_audio = 0; | |
750f32cf | 228 | } |
0fca65c1 | 229 | |
750f32cf | 230 | ath9k_hw_btcoex_bt_stomp(ah, stomp_type); |
bc6d5c29 | 231 | ath9k_hw_btcoex_enable(ah); |
750f32cf | 232 | |
0fca65c1 S |
233 | spin_unlock_bh(&btcoex->btcoex_lock); |
234 | ||
168c6f89 FF |
235 | if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) |
236 | mod_timer(&btcoex->no_stomp_timer, | |
237 | jiffies + msecs_to_jiffies(timer_period)); | |
0fca65c1 | 238 | |
a039a993 | 239 | ath9k_ps_restore(sc); |
750f32cf | 240 | |
08d4df41 | 241 | skip_hw_wakeup: |
750f32cf SM |
242 | mod_timer(&btcoex->period_timer, |
243 | jiffies + msecs_to_jiffies(btcoex->btcoex_period)); | |
0fca65c1 S |
244 | } |
245 | ||
246 | /* | |
247 | * Generic tsf based hw timer which configures weight | |
248 | * registers to time slice between wlan and bt traffic | |
249 | */ | |
168c6f89 | 250 | static void ath_btcoex_no_stomp_timer(unsigned long arg) |
0fca65c1 S |
251 | { |
252 | struct ath_softc *sc = (struct ath_softc *)arg; | |
253 | struct ath_hw *ah = sc->sc_ah; | |
254 | struct ath_btcoex *btcoex = &sc->btcoex; | |
d99eeb87 | 255 | struct ath_common *common = ath9k_hw_common(ah); |
0fca65c1 | 256 | |
d2182b69 | 257 | ath_dbg(common, BTCOEX, "no stomp timer running\n"); |
0fca65c1 | 258 | |
a039a993 | 259 | ath9k_ps_wakeup(sc); |
0fca65c1 S |
260 | spin_lock_bh(&btcoex->btcoex_lock); |
261 | ||
e6930c4b | 262 | if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || |
750f32cf SM |
263 | (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && |
264 | test_bit(BT_OP_SCAN, &btcoex->op_flags))) | |
978f78bf | 265 | ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); |
2884561a | 266 | else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL) |
978f78bf | 267 | ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW); |
0fca65c1 | 268 | |
bc6d5c29 | 269 | ath9k_hw_btcoex_enable(ah); |
0fca65c1 | 270 | spin_unlock_bh(&btcoex->btcoex_lock); |
a039a993 | 271 | ath9k_ps_restore(sc); |
0fca65c1 S |
272 | } |
273 | ||
44b9b56e | 274 | static void ath_init_btcoex_timer(struct ath_softc *sc) |
0fca65c1 S |
275 | { |
276 | struct ath_btcoex *btcoex = &sc->btcoex; | |
277 | ||
dfd0587a | 278 | btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD; |
168c6f89 | 279 | btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * |
0fca65c1 | 280 | btcoex->btcoex_period / 100; |
168c6f89 | 281 | btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * |
58da1318 | 282 | btcoex->btcoex_period / 100; |
e1ff147d | 283 | btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW; |
0fca65c1 S |
284 | |
285 | setup_timer(&btcoex->period_timer, ath_btcoex_period_timer, | |
286 | (unsigned long) sc); | |
168c6f89 FF |
287 | setup_timer(&btcoex->no_stomp_timer, ath_btcoex_no_stomp_timer, |
288 | (unsigned long) sc); | |
0fca65c1 S |
289 | |
290 | spin_lock_init(&btcoex->btcoex_lock); | |
0fca65c1 S |
291 | } |
292 | ||
293 | /* | |
294 | * (Re)start btcoex timers | |
295 | */ | |
296 | void ath9k_btcoex_timer_resume(struct ath_softc *sc) | |
297 | { | |
298 | struct ath_btcoex *btcoex = &sc->btcoex; | |
299 | struct ath_hw *ah = sc->sc_ah; | |
300 | ||
d2182b69 | 301 | ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n"); |
0fca65c1 S |
302 | |
303 | /* make sure duty cycle timer is also stopped when resuming */ | |
168c6f89 | 304 | del_timer_sync(&btcoex->no_stomp_timer); |
0fca65c1 S |
305 | |
306 | btcoex->bt_priority_cnt = 0; | |
307 | btcoex->bt_priority_time = jiffies; | |
c11216d1 MSS |
308 | clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
309 | clear_bit(BT_OP_SCAN, &btcoex->op_flags); | |
0fca65c1 S |
310 | |
311 | mod_timer(&btcoex->period_timer, jiffies); | |
312 | } | |
313 | ||
314 | ||
315 | /* | |
316 | * Pause btcoex timer and bt duty cycle timer | |
317 | */ | |
318 | void ath9k_btcoex_timer_pause(struct ath_softc *sc) | |
319 | { | |
320 | struct ath_btcoex *btcoex = &sc->btcoex; | |
0fca65c1 S |
321 | |
322 | del_timer_sync(&btcoex->period_timer); | |
168c6f89 | 323 | del_timer_sync(&btcoex->no_stomp_timer); |
0fca65c1 | 324 | } |
5908120f | 325 | |
08d4df41 RM |
326 | void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) |
327 | { | |
328 | struct ath_btcoex *btcoex = &sc->btcoex; | |
329 | ||
168c6f89 | 330 | del_timer_sync(&btcoex->no_stomp_timer); |
08d4df41 RM |
331 | } |
332 | ||
c0ac53fa SM |
333 | u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen) |
334 | { | |
e6930c4b | 335 | struct ath_btcoex *btcoex = &sc->btcoex; |
c0ac53fa SM |
336 | struct ath_mci_profile *mci = &sc->btcoex.mci; |
337 | u16 aggr_limit = 0; | |
338 | ||
339 | if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit) | |
340 | aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4; | |
e6930c4b | 341 | else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags)) |
c0ac53fa SM |
342 | aggr_limit = min((max_4ms_framelen * 3) / 8, |
343 | (u32)ATH_AMPDU_LIMIT_MAX); | |
344 | ||
345 | return aggr_limit; | |
346 | } | |
347 | ||
56ca0dba SM |
348 | void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status) |
349 | { | |
9a15858f | 350 | if (status & ATH9K_INT_MCI) |
56ca0dba SM |
351 | ath_mci_intr(sc); |
352 | } | |
353 | ||
df198b17 SM |
354 | void ath9k_start_btcoex(struct ath_softc *sc) |
355 | { | |
356 | struct ath_hw *ah = sc->sc_ah; | |
357 | ||
358 | if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && | |
359 | !ah->btcoex_hw.enabled) { | |
360 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) | |
361 | ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, | |
5160b46f SM |
362 | AR_STOMP_LOW_WLAN_WGHT, 0); |
363 | else | |
364 | ath9k_hw_btcoex_set_weight(ah, 0, 0, | |
365 | ATH_BTCOEX_STOMP_NONE); | |
df198b17 SM |
366 | ath9k_hw_btcoex_enable(ah); |
367 | ||
368 | if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) | |
369 | ath9k_btcoex_timer_resume(sc); | |
370 | } | |
371 | } | |
372 | ||
373 | void ath9k_stop_btcoex(struct ath_softc *sc) | |
374 | { | |
375 | struct ath_hw *ah = sc->sc_ah; | |
376 | ||
377 | if (ah->btcoex_hw.enabled && | |
378 | ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) { | |
df198b17 SM |
379 | if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) |
380 | ath9k_btcoex_timer_pause(sc); | |
c32cdbd8 | 381 | ath9k_hw_btcoex_disable(ah); |
6a73f507 | 382 | if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) |
bff2ec2b | 383 | ath_mci_flush_profile(&sc->btcoex.mci); |
df198b17 SM |
384 | } |
385 | } | |
386 | ||
5908120f SM |
387 | void ath9k_deinit_btcoex(struct ath_softc *sc) |
388 | { | |
dd89f05a MSS |
389 | struct ath_hw *ah = sc->sc_ah; |
390 | ||
dd89f05a | 391 | if (ath9k_hw_mci_is_enabled(ah)) |
5908120f SM |
392 | ath_mci_cleanup(sc); |
393 | } | |
394 | ||
395 | int ath9k_init_btcoex(struct ath_softc *sc) | |
396 | { | |
397 | struct ath_txq *txq; | |
398 | struct ath_hw *ah = sc->sc_ah; | |
399 | int r; | |
400 | ||
d68475de SM |
401 | ath9k_hw_btcoex_init_scheme(ah); |
402 | ||
5908120f SM |
403 | switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) { |
404 | case ATH_BTCOEX_CFG_NONE: | |
405 | break; | |
406 | case ATH_BTCOEX_CFG_2WIRE: | |
407 | ath9k_hw_btcoex_init_2wire(sc->sc_ah); | |
408 | break; | |
409 | case ATH_BTCOEX_CFG_3WIRE: | |
410 | ath9k_hw_btcoex_init_3wire(sc->sc_ah); | |
44b9b56e | 411 | ath_init_btcoex_timer(sc); |
bea843c7 | 412 | txq = sc->tx.txq_map[IEEE80211_AC_BE]; |
5908120f | 413 | ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum); |
e1ff147d SM |
414 | break; |
415 | case ATH_BTCOEX_CFG_MCI: | |
416 | ath_init_btcoex_timer(sc); | |
417 | ||
418 | sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE; | |
419 | INIT_LIST_HEAD(&sc->btcoex.mci.info); | |
420 | ath9k_hw_btcoex_init_mci(ah); | |
421 | ||
422 | r = ath_mci_setup(sc); | |
423 | if (r) | |
424 | return r; | |
5908120f SM |
425 | |
426 | break; | |
427 | default: | |
428 | WARN_ON(1); | |
429 | break; | |
430 | } | |
431 | ||
432 | return 0; | |
433 | } | |
4daa7760 | 434 | |
ac46ba43 | 435 | static int ath9k_dump_mci_btcoex(struct ath_softc *sc, u8 *buf, u32 size) |
4df50ca8 | 436 | { |
4df50ca8 RM |
437 | struct ath_btcoex *btcoex = &sc->btcoex; |
438 | struct ath_mci_profile *mci = &btcoex->mci; | |
439 | struct ath_hw *ah = sc->sc_ah; | |
440 | struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; | |
ac46ba43 | 441 | u32 len = 0; |
4df50ca8 RM |
442 | int i; |
443 | ||
444 | ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci)); | |
ac46ba43 SM |
445 | ATH_DUMP_BTCOEX("MGMT", mci->num_mgmt); |
446 | ATH_DUMP_BTCOEX("SCO", mci->num_sco); | |
447 | ATH_DUMP_BTCOEX("A2DP", mci->num_a2dp); | |
448 | ATH_DUMP_BTCOEX("HID", mci->num_hid); | |
449 | ATH_DUMP_BTCOEX("PAN", mci->num_pan); | |
450 | ATH_DUMP_BTCOEX("ACL", mci->num_other_acl); | |
451 | ATH_DUMP_BTCOEX("BDR", mci->num_bdr); | |
4df50ca8 RM |
452 | ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit); |
453 | ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type); | |
454 | ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period); | |
455 | ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle); | |
456 | ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time); | |
457 | ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx); | |
ac46ba43 SM |
458 | ATH_DUMP_BTCOEX("Concurrent RSSI cnt", btcoex->rssi_count); |
459 | ||
5e88ba62 | 460 | len += scnprintf(buf + len, size - len, "BT Weights: "); |
4df50ca8 | 461 | for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) |
5e88ba62 ZK |
462 | len += scnprintf(buf + len, size - len, "%08x ", |
463 | btcoex_hw->bt_weight[i]); | |
464 | len += scnprintf(buf + len, size - len, "\n"); | |
465 | len += scnprintf(buf + len, size - len, "WLAN Weights: "); | |
4df50ca8 | 466 | for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) |
5e88ba62 ZK |
467 | len += scnprintf(buf + len, size - len, "%08x ", |
468 | btcoex_hw->wlan_weight[i]); | |
469 | len += scnprintf(buf + len, size - len, "\n"); | |
470 | len += scnprintf(buf + len, size - len, "Tx Priorities: "); | |
4df50ca8 | 471 | for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++) |
5e88ba62 | 472 | len += scnprintf(buf + len, size - len, "%08x ", |
4df50ca8 | 473 | btcoex_hw->tx_prio[i]); |
ac46ba43 | 474 | |
5e88ba62 | 475 | len += scnprintf(buf + len, size - len, "\n"); |
4df50ca8 RM |
476 | |
477 | return len; | |
478 | } | |
ac46ba43 SM |
479 | |
480 | static int ath9k_dump_legacy_btcoex(struct ath_softc *sc, u8 *buf, u32 size) | |
481 | { | |
482 | ||
483 | struct ath_btcoex *btcoex = &sc->btcoex; | |
484 | u32 len = 0; | |
485 | ||
486 | ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type); | |
487 | ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period); | |
488 | ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle); | |
489 | ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time); | |
490 | ||
491 | return len; | |
492 | } | |
493 | ||
494 | int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) | |
495 | { | |
496 | if (ath9k_hw_mci_is_enabled(sc->sc_ah)) | |
497 | return ath9k_dump_mci_btcoex(sc, buf, size); | |
498 | else | |
499 | return ath9k_dump_legacy_btcoex(sc, buf, size); | |
500 | } | |
501 | ||
4daa7760 | 502 | #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ |