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Commit | Line | Data |
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fb9987d0 S |
1 | /* |
2 | * Copyright (c) 2010 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "htc.h" | |
18 | ||
19 | /******/ | |
20 | /* TX */ | |
21 | /******/ | |
22 | ||
066dae93 FF |
23 | static const int subtype_txq_to_hwq[] = { |
24 | [WME_AC_BE] = ATH_TXQ_AC_BE, | |
25 | [WME_AC_BK] = ATH_TXQ_AC_BK, | |
26 | [WME_AC_VI] = ATH_TXQ_AC_VI, | |
27 | [WME_AC_VO] = ATH_TXQ_AC_VO, | |
28 | }; | |
29 | ||
ca74b83b | 30 | #define ATH9K_HTC_INIT_TXQ(subtype) do { \ |
066dae93 | 31 | qi.tqi_subtype = subtype_txq_to_hwq[subtype]; \ |
ca74b83b S |
32 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \ |
33 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \ | |
34 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \ | |
35 | qi.tqi_physCompBuf = 0; \ | |
36 | qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \ | |
37 | TXQ_FLAG_TXDESCINT_ENABLE; \ | |
38 | } while (0) | |
39 | ||
fb9987d0 S |
40 | int get_hw_qnum(u16 queue, int *hwq_map) |
41 | { | |
42 | switch (queue) { | |
43 | case 0: | |
e8c35a77 | 44 | return hwq_map[WME_AC_VO]; |
fb9987d0 | 45 | case 1: |
e8c35a77 | 46 | return hwq_map[WME_AC_VI]; |
fb9987d0 | 47 | case 2: |
e8c35a77 | 48 | return hwq_map[WME_AC_BE]; |
fb9987d0 | 49 | case 3: |
e8c35a77 | 50 | return hwq_map[WME_AC_BK]; |
fb9987d0 | 51 | default: |
e8c35a77 | 52 | return hwq_map[WME_AC_BE]; |
fb9987d0 S |
53 | } |
54 | } | |
55 | ||
e1572c5e S |
56 | int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum, |
57 | struct ath9k_tx_queue_info *qinfo) | |
fb9987d0 S |
58 | { |
59 | struct ath_hw *ah = priv->ah; | |
60 | int error = 0; | |
61 | struct ath9k_tx_queue_info qi; | |
62 | ||
63 | ath9k_hw_get_txq_props(ah, qnum, &qi); | |
64 | ||
65 | qi.tqi_aifs = qinfo->tqi_aifs; | |
66 | qi.tqi_cwmin = qinfo->tqi_cwmin / 2; /* XXX */ | |
67 | qi.tqi_cwmax = qinfo->tqi_cwmax; | |
68 | qi.tqi_burstTime = qinfo->tqi_burstTime; | |
69 | qi.tqi_readyTime = qinfo->tqi_readyTime; | |
70 | ||
71 | if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) { | |
3800276a JP |
72 | ath_err(ath9k_hw_common(ah), |
73 | "Unable to update hardware queue %u!\n", qnum); | |
fb9987d0 S |
74 | error = -EIO; |
75 | } else { | |
76 | ath9k_hw_resettxqueue(ah, qnum); | |
77 | } | |
78 | ||
79 | return error; | |
80 | } | |
81 | ||
82 | int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb) | |
83 | { | |
84 | struct ieee80211_hdr *hdr; | |
85 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | |
86 | struct ieee80211_sta *sta = tx_info->control.sta; | |
87 | struct ath9k_htc_sta *ista; | |
fb9987d0 S |
88 | struct ath9k_htc_tx_ctl tx_ctl; |
89 | enum htc_endpoint_id epid; | |
b80841c9 | 90 | u16 qnum; |
fb9987d0 S |
91 | __le16 fc; |
92 | u8 *tx_fhdr; | |
da93f106 | 93 | u8 sta_idx, vif_idx; |
fb9987d0 S |
94 | |
95 | hdr = (struct ieee80211_hdr *) skb->data; | |
96 | fc = hdr->frame_control; | |
97 | ||
da93f106 RM |
98 | if (tx_info->control.vif && |
99 | (struct ath9k_htc_vif *) tx_info->control.vif->drv_priv) | |
100 | vif_idx = ((struct ath9k_htc_vif *) | |
101 | tx_info->control.vif->drv_priv)->index; | |
102 | else | |
103 | vif_idx = priv->nvifs; | |
104 | ||
fb9987d0 S |
105 | if (sta) { |
106 | ista = (struct ath9k_htc_sta *) sta->drv_priv; | |
107 | sta_idx = ista->index; | |
108 | } else { | |
109 | sta_idx = 0; | |
110 | } | |
111 | ||
112 | memset(&tx_ctl, 0, sizeof(struct ath9k_htc_tx_ctl)); | |
113 | ||
114 | if (ieee80211_is_data(fc)) { | |
115 | struct tx_frame_hdr tx_hdr; | |
116 | u8 *qc; | |
117 | ||
118 | memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr)); | |
119 | ||
120 | tx_hdr.node_idx = sta_idx; | |
da93f106 | 121 | tx_hdr.vif_idx = vif_idx; |
fb9987d0 S |
122 | |
123 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { | |
124 | tx_ctl.type = ATH9K_HTC_AMPDU; | |
125 | tx_hdr.data_type = ATH9K_HTC_AMPDU; | |
126 | } else { | |
127 | tx_ctl.type = ATH9K_HTC_NORMAL; | |
128 | tx_hdr.data_type = ATH9K_HTC_NORMAL; | |
129 | } | |
130 | ||
3bf30b56 | 131 | if (ieee80211_is_data_qos(fc)) { |
fb9987d0 S |
132 | qc = ieee80211_get_qos_ctl(hdr); |
133 | tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | |
134 | } | |
135 | ||
136 | /* Check for RTS protection */ | |
137 | if (priv->hw->wiphy->rts_threshold != (u32) -1) | |
138 | if (skb->len > priv->hw->wiphy->rts_threshold) | |
139 | tx_hdr.flags |= ATH9K_HTC_TX_RTSCTS; | |
140 | ||
141 | /* CTS-to-self */ | |
142 | if (!(tx_hdr.flags & ATH9K_HTC_TX_RTSCTS) && | |
143 | (priv->op_flags & OP_PROTECT_ENABLE)) | |
144 | tx_hdr.flags |= ATH9K_HTC_TX_CTSONLY; | |
145 | ||
146 | tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb); | |
147 | if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR) | |
148 | tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID; | |
149 | else | |
150 | tx_hdr.keyix = tx_info->control.hw_key->hw_key_idx; | |
151 | ||
152 | tx_fhdr = skb_push(skb, sizeof(tx_hdr)); | |
153 | memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr)); | |
154 | ||
155 | qnum = skb_get_queue_mapping(skb); | |
fb9987d0 | 156 | |
b80841c9 | 157 | switch (qnum) { |
fb9987d0 | 158 | case 0: |
b80841c9 S |
159 | TX_QSTAT_INC(WME_AC_VO); |
160 | epid = priv->data_vo_ep; | |
fb9987d0 | 161 | break; |
b80841c9 | 162 | case 1: |
2edb4583 | 163 | TX_QSTAT_INC(WME_AC_VI); |
fb9987d0 S |
164 | epid = priv->data_vi_ep; |
165 | break; | |
b80841c9 S |
166 | case 2: |
167 | TX_QSTAT_INC(WME_AC_BE); | |
168 | epid = priv->data_be_ep; | |
fb9987d0 | 169 | break; |
b80841c9 | 170 | case 3: |
fb9987d0 | 171 | default: |
2edb4583 | 172 | TX_QSTAT_INC(WME_AC_BK); |
fb9987d0 S |
173 | epid = priv->data_bk_ep; |
174 | break; | |
175 | } | |
176 | } else { | |
177 | struct tx_mgmt_hdr mgmt_hdr; | |
178 | ||
179 | memset(&mgmt_hdr, 0, sizeof(struct tx_mgmt_hdr)); | |
180 | ||
181 | tx_ctl.type = ATH9K_HTC_NORMAL; | |
182 | ||
183 | mgmt_hdr.node_idx = sta_idx; | |
da93f106 | 184 | mgmt_hdr.vif_idx = vif_idx; |
fb9987d0 S |
185 | mgmt_hdr.tidno = 0; |
186 | mgmt_hdr.flags = 0; | |
187 | ||
188 | mgmt_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb); | |
189 | if (mgmt_hdr.key_type == ATH9K_KEY_TYPE_CLEAR) | |
190 | mgmt_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID; | |
191 | else | |
192 | mgmt_hdr.keyix = tx_info->control.hw_key->hw_key_idx; | |
193 | ||
194 | tx_fhdr = skb_push(skb, sizeof(mgmt_hdr)); | |
195 | memcpy(tx_fhdr, (u8 *) &mgmt_hdr, sizeof(mgmt_hdr)); | |
196 | epid = priv->mgmt_ep; | |
197 | } | |
198 | ||
199 | return htc_send(priv->htc, skb, epid, &tx_ctl); | |
200 | } | |
201 | ||
d7ca2139 S |
202 | static bool ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv, |
203 | struct ath9k_htc_sta *ista, u8 tid) | |
204 | { | |
205 | bool ret = false; | |
206 | ||
207 | spin_lock_bh(&priv->tx_lock); | |
208 | if ((tid < ATH9K_HTC_MAX_TID) && (ista->tid_state[tid] == AGGR_STOP)) | |
209 | ret = true; | |
210 | spin_unlock_bh(&priv->tx_lock); | |
211 | ||
212 | return ret; | |
213 | } | |
214 | ||
fb9987d0 S |
215 | void ath9k_tx_tasklet(unsigned long data) |
216 | { | |
217 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data; | |
218 | struct ieee80211_sta *sta; | |
219 | struct ieee80211_hdr *hdr; | |
220 | struct ieee80211_tx_info *tx_info; | |
221 | struct sk_buff *skb = NULL; | |
222 | __le16 fc; | |
223 | ||
224 | while ((skb = skb_dequeue(&priv->tx_queue)) != NULL) { | |
225 | ||
226 | hdr = (struct ieee80211_hdr *) skb->data; | |
227 | fc = hdr->frame_control; | |
228 | tx_info = IEEE80211_SKB_CB(skb); | |
ef98c3cd S |
229 | |
230 | memset(&tx_info->status, 0, sizeof(tx_info->status)); | |
fb9987d0 S |
231 | |
232 | rcu_read_lock(); | |
233 | ||
ef98c3cd S |
234 | sta = ieee80211_find_sta(priv->vif, hdr->addr1); |
235 | if (!sta) { | |
236 | rcu_read_unlock(); | |
237 | ieee80211_tx_status(priv->hw, skb); | |
238 | continue; | |
239 | } | |
240 | ||
241 | /* Check if we need to start aggregation */ | |
242 | ||
fb9987d0 | 243 | if (sta && conf_is_ht(&priv->hw->conf) && |
d7ca2139 | 244 | !(skb->protocol == cpu_to_be16(ETH_P_PAE))) { |
fb9987d0 S |
245 | if (ieee80211_is_data_qos(fc)) { |
246 | u8 *qc, tid; | |
247 | struct ath9k_htc_sta *ista; | |
248 | ||
249 | qc = ieee80211_get_qos_ctl(hdr); | |
250 | tid = qc[0] & 0xf; | |
251 | ista = (struct ath9k_htc_sta *)sta->drv_priv; | |
252 | ||
d7ca2139 | 253 | if (ath9k_htc_check_tx_aggr(priv, ista, tid)) { |
bd2ce6e4 | 254 | ieee80211_start_tx_ba_session(sta, tid, 0); |
d7ca2139 | 255 | spin_lock_bh(&priv->tx_lock); |
fb9987d0 | 256 | ista->tid_state[tid] = AGGR_PROGRESS; |
d7ca2139 | 257 | spin_unlock_bh(&priv->tx_lock); |
fb9987d0 S |
258 | } |
259 | } | |
260 | } | |
261 | ||
262 | rcu_read_unlock(); | |
263 | ||
ef98c3cd | 264 | /* Send status to mac80211 */ |
fb9987d0 S |
265 | ieee80211_tx_status(priv->hw, skb); |
266 | } | |
7757dfed S |
267 | |
268 | /* Wake TX queues if needed */ | |
269 | spin_lock_bh(&priv->tx_lock); | |
270 | if (priv->tx_queues_stop) { | |
271 | priv->tx_queues_stop = false; | |
272 | spin_unlock_bh(&priv->tx_lock); | |
226afe68 JP |
273 | ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_XMIT, |
274 | "Waking up TX queues\n"); | |
7757dfed S |
275 | ieee80211_wake_queues(priv->hw); |
276 | return; | |
277 | } | |
278 | spin_unlock_bh(&priv->tx_lock); | |
fb9987d0 S |
279 | } |
280 | ||
281 | void ath9k_htc_txep(void *drv_priv, struct sk_buff *skb, | |
282 | enum htc_endpoint_id ep_id, bool txok) | |
283 | { | |
284 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) drv_priv; | |
d439260e | 285 | struct ath_common *common = ath9k_hw_common(priv->ah); |
fb9987d0 S |
286 | struct ieee80211_tx_info *tx_info; |
287 | ||
288 | if (!skb) | |
289 | return; | |
290 | ||
d439260e | 291 | if (ep_id == priv->mgmt_ep) { |
fb9987d0 | 292 | skb_pull(skb, sizeof(struct tx_mgmt_hdr)); |
d439260e S |
293 | } else if ((ep_id == priv->data_bk_ep) || |
294 | (ep_id == priv->data_be_ep) || | |
295 | (ep_id == priv->data_vi_ep) || | |
296 | (ep_id == priv->data_vo_ep)) { | |
fb9987d0 | 297 | skb_pull(skb, sizeof(struct tx_frame_hdr)); |
d439260e | 298 | } else { |
3800276a | 299 | ath_err(common, "Unsupported TX EPID: %d\n", ep_id); |
d439260e S |
300 | dev_kfree_skb_any(skb); |
301 | return; | |
302 | } | |
fb9987d0 S |
303 | |
304 | tx_info = IEEE80211_SKB_CB(skb); | |
305 | ||
306 | if (txok) | |
307 | tx_info->flags |= IEEE80211_TX_STAT_ACK; | |
308 | ||
309 | skb_queue_tail(&priv->tx_queue, skb); | |
310 | tasklet_schedule(&priv->tx_tasklet); | |
311 | } | |
312 | ||
313 | int ath9k_tx_init(struct ath9k_htc_priv *priv) | |
314 | { | |
315 | skb_queue_head_init(&priv->tx_queue); | |
316 | return 0; | |
317 | } | |
318 | ||
319 | void ath9k_tx_cleanup(struct ath9k_htc_priv *priv) | |
320 | { | |
321 | ||
322 | } | |
323 | ||
e8c35a77 | 324 | bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, int subtype) |
fb9987d0 S |
325 | { |
326 | struct ath_hw *ah = priv->ah; | |
327 | struct ath_common *common = ath9k_hw_common(ah); | |
328 | struct ath9k_tx_queue_info qi; | |
329 | int qnum; | |
330 | ||
331 | memset(&qi, 0, sizeof(qi)); | |
ca74b83b | 332 | ATH9K_HTC_INIT_TXQ(subtype); |
fb9987d0 S |
333 | |
334 | qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi); | |
335 | if (qnum == -1) | |
336 | return false; | |
337 | ||
338 | if (qnum >= ARRAY_SIZE(priv->hwq_map)) { | |
3800276a JP |
339 | ath_err(common, "qnum %u out of range, max %zu!\n", |
340 | qnum, ARRAY_SIZE(priv->hwq_map)); | |
fb9987d0 S |
341 | ath9k_hw_releasetxqueue(ah, qnum); |
342 | return false; | |
343 | } | |
344 | ||
345 | priv->hwq_map[subtype] = qnum; | |
346 | return true; | |
347 | } | |
348 | ||
ca74b83b S |
349 | int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv) |
350 | { | |
351 | struct ath9k_tx_queue_info qi; | |
352 | ||
353 | memset(&qi, 0, sizeof(qi)); | |
354 | ATH9K_HTC_INIT_TXQ(0); | |
355 | ||
356 | return ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_CAB, &qi); | |
357 | } | |
358 | ||
fb9987d0 S |
359 | /******/ |
360 | /* RX */ | |
361 | /******/ | |
362 | ||
0995d110 S |
363 | /* |
364 | * Calculate the RX filter to be set in the HW. | |
365 | */ | |
366 | u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv) | |
367 | { | |
368 | #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR) | |
369 | ||
370 | struct ath_hw *ah = priv->ah; | |
371 | u32 rfilt; | |
372 | ||
373 | rfilt = (ath9k_hw_getrxfilter(ah) & RX_FILTER_PRESERVE) | |
374 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST | |
375 | | ATH9K_RX_FILTER_MCAST; | |
376 | ||
94a40c0c | 377 | if (priv->rxfilter & FIF_PROBE_REQ) |
0995d110 S |
378 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; |
379 | ||
380 | /* | |
381 | * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station | |
382 | * mode interface or when in monitor mode. AP mode does not need this | |
383 | * since it receives all in-BSS frames anyway. | |
384 | */ | |
385 | if (((ah->opmode != NL80211_IFTYPE_AP) && | |
386 | (priv->rxfilter & FIF_PROMISC_IN_BSS)) || | |
387 | (ah->opmode == NL80211_IFTYPE_MONITOR)) | |
388 | rfilt |= ATH9K_RX_FILTER_PROM; | |
389 | ||
390 | if (priv->rxfilter & FIF_CONTROL) | |
391 | rfilt |= ATH9K_RX_FILTER_CONTROL; | |
392 | ||
393 | if ((ah->opmode == NL80211_IFTYPE_STATION) && | |
394 | !(priv->rxfilter & FIF_BCN_PRBRESP_PROMISC)) | |
395 | rfilt |= ATH9K_RX_FILTER_MYBEACON; | |
396 | else | |
397 | rfilt |= ATH9K_RX_FILTER_BEACON; | |
398 | ||
399 | if (conf_is_ht(&priv->hw->conf)) | |
400 | rfilt |= ATH9K_RX_FILTER_COMP_BAR; | |
401 | ||
402 | return rfilt; | |
403 | ||
404 | #undef RX_FILTER_PRESERVE | |
405 | } | |
406 | ||
407 | /* | |
408 | * Recv initialization for opmode change. | |
409 | */ | |
410 | static void ath9k_htc_opmode_init(struct ath9k_htc_priv *priv) | |
411 | { | |
412 | struct ath_hw *ah = priv->ah; | |
413 | struct ath_common *common = ath9k_hw_common(ah); | |
414 | ||
415 | u32 rfilt, mfilt[2]; | |
416 | ||
417 | /* configure rx filter */ | |
418 | rfilt = ath9k_htc_calcrxfilter(priv); | |
419 | ath9k_hw_setrxfilter(ah, rfilt); | |
420 | ||
421 | /* configure bssid mask */ | |
364734fa | 422 | ath_hw_setbssidmask(common); |
0995d110 S |
423 | |
424 | /* configure operational mode */ | |
425 | ath9k_hw_setopmode(ah); | |
426 | ||
0995d110 S |
427 | /* calculate and install multicast filter */ |
428 | mfilt[0] = mfilt[1] = ~0; | |
429 | ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]); | |
430 | } | |
431 | ||
fb9987d0 S |
432 | void ath9k_host_rx_init(struct ath9k_htc_priv *priv) |
433 | { | |
434 | ath9k_hw_rxena(priv->ah); | |
0995d110 | 435 | ath9k_htc_opmode_init(priv); |
40346b66 | 436 | ath9k_hw_startpcureceive(priv->ah, (priv->op_flags & OP_SCANNING)); |
fb9987d0 S |
437 | priv->rx.last_rssi = ATH_RSSI_DUMMY_MARKER; |
438 | } | |
439 | ||
440 | static void ath9k_process_rate(struct ieee80211_hw *hw, | |
441 | struct ieee80211_rx_status *rxs, | |
442 | u8 rx_rate, u8 rs_flags) | |
443 | { | |
444 | struct ieee80211_supported_band *sband; | |
445 | enum ieee80211_band band; | |
446 | unsigned int i = 0; | |
447 | ||
448 | if (rx_rate & 0x80) { | |
449 | /* HT rate */ | |
450 | rxs->flag |= RX_FLAG_HT; | |
451 | if (rs_flags & ATH9K_RX_2040) | |
452 | rxs->flag |= RX_FLAG_40MHZ; | |
453 | if (rs_flags & ATH9K_RX_GI) | |
454 | rxs->flag |= RX_FLAG_SHORT_GI; | |
455 | rxs->rate_idx = rx_rate & 0x7f; | |
456 | return; | |
457 | } | |
458 | ||
459 | band = hw->conf.channel->band; | |
460 | sband = hw->wiphy->bands[band]; | |
461 | ||
462 | for (i = 0; i < sband->n_bitrates; i++) { | |
463 | if (sband->bitrates[i].hw_value == rx_rate) { | |
464 | rxs->rate_idx = i; | |
465 | return; | |
466 | } | |
467 | if (sband->bitrates[i].hw_value_short == rx_rate) { | |
468 | rxs->rate_idx = i; | |
469 | rxs->flag |= RX_FLAG_SHORTPRE; | |
470 | return; | |
471 | } | |
472 | } | |
473 | ||
474 | } | |
475 | ||
476 | static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv, | |
477 | struct ath9k_htc_rxbuf *rxbuf, | |
478 | struct ieee80211_rx_status *rx_status) | |
479 | ||
480 | { | |
481 | struct ieee80211_hdr *hdr; | |
482 | struct ieee80211_hw *hw = priv->hw; | |
483 | struct sk_buff *skb = rxbuf->skb; | |
484 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
4f824719 | 485 | struct ath_htc_rx_status *rxstatus; |
fb9987d0 S |
486 | int hdrlen, padpos, padsize; |
487 | int last_rssi = ATH_RSSI_DUMMY_MARKER; | |
488 | __le16 fc; | |
489 | ||
4f824719 | 490 | if (skb->len <= HTC_RX_FRAME_HEADER_SIZE) { |
3800276a | 491 | ath_err(common, "Corrupted RX frame, dropping\n"); |
4f824719 S |
492 | goto rx_next; |
493 | } | |
494 | ||
495 | rxstatus = (struct ath_htc_rx_status *)skb->data; | |
496 | ||
497 | if (be16_to_cpu(rxstatus->rs_datalen) - | |
498 | (skb->len - HTC_RX_FRAME_HEADER_SIZE) != 0) { | |
3800276a JP |
499 | ath_err(common, |
500 | "Corrupted RX data len, dropping (dlen: %d, skblen: %d)\n", | |
501 | rxstatus->rs_datalen, skb->len); | |
4f824719 S |
502 | goto rx_next; |
503 | } | |
504 | ||
505 | /* Get the RX status information */ | |
506 | memcpy(&rxbuf->rxstatus, rxstatus, HTC_RX_FRAME_HEADER_SIZE); | |
507 | skb_pull(skb, HTC_RX_FRAME_HEADER_SIZE); | |
508 | ||
fb9987d0 S |
509 | hdr = (struct ieee80211_hdr *)skb->data; |
510 | fc = hdr->frame_control; | |
511 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); | |
512 | ||
513 | padpos = ath9k_cmn_padpos(fc); | |
514 | ||
515 | padsize = padpos & 3; | |
32fbccaf | 516 | if (padsize && skb->len >= padpos+padsize+FCS_LEN) { |
fb9987d0 S |
517 | memmove(skb->data + padsize, skb->data, padpos); |
518 | skb_pull(skb, padsize); | |
519 | } | |
520 | ||
521 | memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); | |
522 | ||
523 | if (rxbuf->rxstatus.rs_status != 0) { | |
524 | if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_CRC) | |
525 | rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; | |
526 | if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_PHY) | |
527 | goto rx_next; | |
528 | ||
529 | if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT) { | |
530 | /* FIXME */ | |
531 | } else if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_MIC) { | |
532 | if (ieee80211_is_ctl(fc)) | |
533 | /* | |
534 | * Sometimes, we get invalid | |
535 | * MIC failures on valid control frames. | |
536 | * Remove these mic errors. | |
537 | */ | |
538 | rxbuf->rxstatus.rs_status &= ~ATH9K_RXERR_MIC; | |
539 | else | |
540 | rx_status->flag |= RX_FLAG_MMIC_ERROR; | |
541 | } | |
542 | ||
543 | /* | |
544 | * Reject error frames with the exception of | |
545 | * decryption and MIC failures. For monitor mode, | |
546 | * we also ignore the CRC error. | |
547 | */ | |
548 | if (priv->ah->opmode == NL80211_IFTYPE_MONITOR) { | |
549 | if (rxbuf->rxstatus.rs_status & | |
550 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | | |
551 | ATH9K_RXERR_CRC)) | |
552 | goto rx_next; | |
553 | } else { | |
554 | if (rxbuf->rxstatus.rs_status & | |
555 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { | |
556 | goto rx_next; | |
557 | } | |
558 | } | |
559 | } | |
560 | ||
561 | if (!(rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT)) { | |
562 | u8 keyix; | |
563 | keyix = rxbuf->rxstatus.rs_keyix; | |
564 | if (keyix != ATH9K_RXKEYIX_INVALID) { | |
565 | rx_status->flag |= RX_FLAG_DECRYPTED; | |
566 | } else if (ieee80211_has_protected(fc) && | |
567 | skb->len >= hdrlen + 4) { | |
568 | keyix = skb->data[hdrlen + 3] >> 6; | |
569 | if (test_bit(keyix, common->keymap)) | |
570 | rx_status->flag |= RX_FLAG_DECRYPTED; | |
571 | } | |
572 | } | |
573 | ||
574 | ath9k_process_rate(hw, rx_status, rxbuf->rxstatus.rs_rate, | |
575 | rxbuf->rxstatus.rs_flags); | |
576 | ||
577 | if (priv->op_flags & OP_ASSOCIATED) { | |
578 | if (rxbuf->rxstatus.rs_rssi != ATH9K_RSSI_BAD && | |
579 | !rxbuf->rxstatus.rs_moreaggr) | |
580 | ATH_RSSI_LPF(priv->rx.last_rssi, | |
581 | rxbuf->rxstatus.rs_rssi); | |
582 | ||
583 | last_rssi = priv->rx.last_rssi; | |
584 | ||
585 | if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) | |
586 | rxbuf->rxstatus.rs_rssi = ATH_EP_RND(last_rssi, | |
587 | ATH_RSSI_EP_MULTIPLIER); | |
588 | ||
589 | if (rxbuf->rxstatus.rs_rssi < 0) | |
590 | rxbuf->rxstatus.rs_rssi = 0; | |
591 | ||
592 | if (ieee80211_is_beacon(fc)) | |
593 | priv->ah->stats.avgbrssi = rxbuf->rxstatus.rs_rssi; | |
594 | } | |
595 | ||
7f1f5a00 | 596 | rx_status->mactime = be64_to_cpu(rxbuf->rxstatus.rs_tstamp); |
fb9987d0 S |
597 | rx_status->band = hw->conf.channel->band; |
598 | rx_status->freq = hw->conf.channel->center_freq; | |
599 | rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR; | |
600 | rx_status->antenna = rxbuf->rxstatus.rs_antenna; | |
601 | rx_status->flag |= RX_FLAG_TSFT; | |
602 | ||
603 | return true; | |
604 | ||
605 | rx_next: | |
606 | return false; | |
607 | } | |
608 | ||
609 | /* | |
610 | * FIXME: Handle FLUSH later on. | |
611 | */ | |
612 | void ath9k_rx_tasklet(unsigned long data) | |
613 | { | |
614 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data; | |
615 | struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL; | |
616 | struct ieee80211_rx_status rx_status; | |
617 | struct sk_buff *skb; | |
618 | unsigned long flags; | |
bde748a4 | 619 | struct ieee80211_hdr *hdr; |
fb9987d0 S |
620 | |
621 | do { | |
622 | spin_lock_irqsave(&priv->rx.rxbuflock, flags); | |
623 | list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) { | |
624 | if (tmp_buf->in_process) { | |
625 | rxbuf = tmp_buf; | |
626 | break; | |
627 | } | |
628 | } | |
629 | ||
630 | if (rxbuf == NULL) { | |
631 | spin_unlock_irqrestore(&priv->rx.rxbuflock, flags); | |
632 | break; | |
633 | } | |
634 | ||
635 | if (!rxbuf->skb) | |
636 | goto requeue; | |
637 | ||
638 | if (!ath9k_rx_prepare(priv, rxbuf, &rx_status)) { | |
639 | dev_kfree_skb_any(rxbuf->skb); | |
640 | goto requeue; | |
641 | } | |
642 | ||
643 | memcpy(IEEE80211_SKB_RXCB(rxbuf->skb), &rx_status, | |
644 | sizeof(struct ieee80211_rx_status)); | |
645 | skb = rxbuf->skb; | |
bde748a4 VN |
646 | hdr = (struct ieee80211_hdr *) skb->data; |
647 | ||
648 | if (ieee80211_is_beacon(hdr->frame_control) && priv->ps_enabled) | |
649 | ieee80211_queue_work(priv->hw, &priv->ps_work); | |
650 | ||
fb9987d0 S |
651 | spin_unlock_irqrestore(&priv->rx.rxbuflock, flags); |
652 | ||
653 | ieee80211_rx(priv->hw, skb); | |
654 | ||
655 | spin_lock_irqsave(&priv->rx.rxbuflock, flags); | |
656 | requeue: | |
657 | rxbuf->in_process = false; | |
658 | rxbuf->skb = NULL; | |
659 | list_move_tail(&rxbuf->list, &priv->rx.rxbuf); | |
660 | rxbuf = NULL; | |
661 | spin_unlock_irqrestore(&priv->rx.rxbuflock, flags); | |
662 | } while (1); | |
663 | ||
664 | } | |
665 | ||
666 | void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb, | |
667 | enum htc_endpoint_id ep_id) | |
668 | { | |
669 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)drv_priv; | |
670 | struct ath_hw *ah = priv->ah; | |
671 | struct ath_common *common = ath9k_hw_common(ah); | |
672 | struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL; | |
fb9987d0 S |
673 | |
674 | spin_lock(&priv->rx.rxbuflock); | |
675 | list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) { | |
676 | if (!tmp_buf->in_process) { | |
677 | rxbuf = tmp_buf; | |
678 | break; | |
679 | } | |
680 | } | |
681 | spin_unlock(&priv->rx.rxbuflock); | |
682 | ||
683 | if (rxbuf == NULL) { | |
226afe68 JP |
684 | ath_dbg(common, ATH_DBG_ANY, |
685 | "No free RX buffer\n"); | |
fb9987d0 S |
686 | goto err; |
687 | } | |
688 | ||
fb9987d0 | 689 | spin_lock(&priv->rx.rxbuflock); |
fb9987d0 S |
690 | rxbuf->skb = skb; |
691 | rxbuf->in_process = true; | |
692 | spin_unlock(&priv->rx.rxbuflock); | |
693 | ||
694 | tasklet_schedule(&priv->rx_tasklet); | |
695 | return; | |
696 | err: | |
697 | dev_kfree_skb_any(skb); | |
fb9987d0 S |
698 | } |
699 | ||
700 | /* FIXME: Locking for cleanup/init */ | |
701 | ||
702 | void ath9k_rx_cleanup(struct ath9k_htc_priv *priv) | |
703 | { | |
704 | struct ath9k_htc_rxbuf *rxbuf, *tbuf; | |
705 | ||
706 | list_for_each_entry_safe(rxbuf, tbuf, &priv->rx.rxbuf, list) { | |
707 | list_del(&rxbuf->list); | |
708 | if (rxbuf->skb) | |
709 | dev_kfree_skb_any(rxbuf->skb); | |
710 | kfree(rxbuf); | |
711 | } | |
712 | } | |
713 | ||
714 | int ath9k_rx_init(struct ath9k_htc_priv *priv) | |
715 | { | |
716 | struct ath_hw *ah = priv->ah; | |
717 | struct ath_common *common = ath9k_hw_common(ah); | |
718 | struct ath9k_htc_rxbuf *rxbuf; | |
719 | int i = 0; | |
720 | ||
721 | INIT_LIST_HEAD(&priv->rx.rxbuf); | |
722 | spin_lock_init(&priv->rx.rxbuflock); | |
723 | ||
724 | for (i = 0; i < ATH9K_HTC_RXBUF; i++) { | |
725 | rxbuf = kzalloc(sizeof(struct ath9k_htc_rxbuf), GFP_KERNEL); | |
726 | if (rxbuf == NULL) { | |
3800276a | 727 | ath_err(common, "Unable to allocate RX buffers\n"); |
fb9987d0 S |
728 | goto err; |
729 | } | |
730 | list_add_tail(&rxbuf->list, &priv->rx.rxbuf); | |
731 | } | |
732 | ||
733 | return 0; | |
734 | ||
735 | err: | |
736 | ath9k_rx_cleanup(priv); | |
737 | return -ENOMEM; | |
738 | } |