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Commit | Line | Data |
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d70357d5 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2010-2011 Atheros Communications Inc. |
d70357d5 LR |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef ATH9K_HW_OPS_H | |
18 | #define ATH9K_HW_OPS_H | |
19 | ||
20 | #include "hw.h" | |
21 | ||
22 | /* Hardware core and driver accessible callbacks */ | |
23 | ||
24 | static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, | |
84c87dc8 | 25 | bool power_off) |
d70357d5 | 26 | { |
23677ce3 | 27 | if (!ah->aspm_enabled) |
3b9cf1be SG |
28 | return; |
29 | ||
84c87dc8 | 30 | ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off); |
d70357d5 LR |
31 | } |
32 | ||
cee1f625 VT |
33 | static inline void ath9k_hw_rxena(struct ath_hw *ah) |
34 | { | |
35 | ath9k_hw_ops(ah)->rx_enable(ah); | |
36 | } | |
37 | ||
87d5efbb VT |
38 | static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, |
39 | u32 link) | |
40 | { | |
41 | ath9k_hw_ops(ah)->set_desc_link(ds, link); | |
42 | } | |
43 | ||
795f5e2c LR |
44 | static inline bool ath9k_hw_calibrate(struct ath_hw *ah, |
45 | struct ath9k_channel *chan, | |
46 | u8 rxchainmask, | |
47 | bool longcal) | |
48 | { | |
49 | return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal); | |
50 | } | |
51 | ||
55e82df4 VT |
52 | static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked) |
53 | { | |
54 | return ath9k_hw_ops(ah)->get_isr(ah, masked); | |
55 | } | |
56 | ||
2b63a41d FF |
57 | static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds, |
58 | struct ath_tx_info *i) | |
59 | { | |
60 | return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i); | |
61 | } | |
62 | ||
cc610ac0 VT |
63 | static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, |
64 | struct ath_tx_status *ts) | |
65 | { | |
66 | return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); | |
67 | } | |
68 | ||
69de3721 MSS |
69 | static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, |
70 | struct ath_hw_antcomb_conf *antconf) | |
71 | { | |
72 | ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf); | |
73 | } | |
74 | ||
75 | static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, | |
76 | struct ath_hw_antcomb_conf *antconf) | |
77 | { | |
78 | ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf); | |
79 | } | |
80 | ||
362cd03f SM |
81 | static inline void ath9k_hw_antctrl_shared_chain_lnadiv(struct ath_hw *ah, |
82 | bool enable) | |
83 | { | |
84 | if (ath9k_hw_ops(ah)->antctrl_shared_chain_lnadiv) | |
85 | ath9k_hw_ops(ah)->antctrl_shared_chain_lnadiv(ah, enable); | |
86 | } | |
87 | ||
8fe65368 LR |
88 | /* Private hardware call ops */ |
89 | ||
90 | /* PHY ops */ | |
91 | ||
92 | static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah, | |
93 | struct ath9k_channel *chan) | |
94 | { | |
95 | return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan); | |
96 | } | |
97 | ||
98 | static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, | |
99 | struct ath9k_channel *chan) | |
100 | { | |
101 | ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan); | |
102 | } | |
103 | ||
104 | static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah) | |
105 | { | |
106 | if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks) | |
107 | return 0; | |
108 | ||
109 | return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah); | |
110 | } | |
111 | ||
112 | static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah) | |
113 | { | |
114 | if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks) | |
115 | return; | |
116 | ||
117 | ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah); | |
118 | } | |
119 | ||
120 | static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah, | |
121 | struct ath9k_channel *chan, | |
122 | u16 modesIndex) | |
123 | { | |
124 | if (!ath9k_hw_private_ops(ah)->set_rf_regs) | |
125 | return true; | |
126 | ||
127 | return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex); | |
128 | } | |
129 | ||
130 | static inline void ath9k_hw_init_bb(struct ath_hw *ah, | |
131 | struct ath9k_channel *chan) | |
132 | { | |
133 | return ath9k_hw_private_ops(ah)->init_bb(ah, chan); | |
134 | } | |
135 | ||
136 | static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah, | |
137 | struct ath9k_channel *chan) | |
138 | { | |
139 | return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan); | |
140 | } | |
141 | ||
142 | static inline int ath9k_hw_process_ini(struct ath_hw *ah, | |
143 | struct ath9k_channel *chan) | |
144 | { | |
145 | return ath9k_hw_private_ops(ah)->process_ini(ah, chan); | |
146 | } | |
147 | ||
148 | static inline void ath9k_olc_init(struct ath_hw *ah) | |
149 | { | |
150 | if (!ath9k_hw_private_ops(ah)->olc_init) | |
151 | return; | |
152 | ||
153 | return ath9k_hw_private_ops(ah)->olc_init(ah); | |
154 | } | |
155 | ||
156 | static inline void ath9k_hw_set_rfmode(struct ath_hw *ah, | |
157 | struct ath9k_channel *chan) | |
158 | { | |
159 | return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan); | |
160 | } | |
161 | ||
162 | static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah) | |
163 | { | |
164 | return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah); | |
165 | } | |
166 | ||
167 | static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah, | |
168 | struct ath9k_channel *chan) | |
169 | { | |
170 | return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan); | |
171 | } | |
172 | ||
173 | static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah) | |
174 | { | |
175 | return ath9k_hw_private_ops(ah)->rfbus_req(ah); | |
176 | } | |
177 | ||
178 | static inline void ath9k_hw_rfbus_done(struct ath_hw *ah) | |
179 | { | |
180 | return ath9k_hw_private_ops(ah)->rfbus_done(ah); | |
181 | } | |
182 | ||
8fe65368 LR |
183 | static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah) |
184 | { | |
185 | if (!ath9k_hw_private_ops(ah)->restore_chainmask) | |
186 | return; | |
187 | ||
188 | return ath9k_hw_private_ops(ah)->restore_chainmask(ah); | |
189 | } | |
190 | ||
c16fcb49 FF |
191 | static inline bool ath9k_hw_ani_control(struct ath_hw *ah, |
192 | enum ath9k_ani_cmd cmd, int param) | |
193 | { | |
194 | return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param); | |
195 | } | |
196 | ||
641d9921 FF |
197 | static inline void ath9k_hw_do_getnf(struct ath_hw *ah, |
198 | int16_t nfarray[NUM_NF_READINGS]) | |
199 | { | |
795f5e2c LR |
200 | ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray); |
201 | } | |
202 | ||
203 | static inline bool ath9k_hw_init_cal(struct ath_hw *ah, | |
204 | struct ath9k_channel *chan) | |
205 | { | |
206 | return ath9k_hw_private_ops(ah)->init_cal(ah, chan); | |
207 | } | |
208 | ||
209 | static inline void ath9k_hw_setup_calibration(struct ath_hw *ah, | |
210 | struct ath9k_cal_list *currCal) | |
211 | { | |
212 | ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal); | |
213 | } | |
214 | ||
5f0c04ea RM |
215 | static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah, |
216 | struct ath9k_channel *chan, | |
217 | u8 *ini_reloaded) | |
218 | { | |
219 | return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan, | |
220 | ini_reloaded); | |
221 | } | |
9a66af33 ZK |
222 | |
223 | static inline void ath9k_hw_set_radar_params(struct ath_hw *ah) | |
224 | { | |
225 | if (!ath9k_hw_private_ops(ah)->set_radar_params) | |
226 | return; | |
227 | ||
228 | ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf); | |
229 | } | |
230 | ||
d70357d5 | 231 | #endif /* ATH9K_HW_OPS_H */ |