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ath9k: fill channel mode in caldata
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / ath / ath9k / mci.h
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1/*
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef MCI_H
18#define MCI_H
19
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20#include "ar9003_mci.h"
21
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22#define ATH_MCI_SCHED_BUF_SIZE (16 * 16) /* 16 entries, 4 dword each */
23#define ATH_MCI_GPM_MAX_ENTRY 16
24#define ATH_MCI_GPM_BUF_SIZE (ATH_MCI_GPM_MAX_ENTRY * 16)
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25#define ATH_MCI_DEF_BT_PERIOD 40
26#define ATH_MCI_BDR_DUTY_CYCLE 20
27#define ATH_MCI_MAX_DUTY_CYCLE 90
28
29#define ATH_MCI_DEF_AGGR_LIMIT 6 /* in 0.24 ms */
30#define ATH_MCI_MAX_ACL_PROFILE 7
31#define ATH_MCI_MAX_SCO_PROFILE 1
32#define ATH_MCI_MAX_PROFILE (ATH_MCI_MAX_ACL_PROFILE +\
33 ATH_MCI_MAX_SCO_PROFILE)
34
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35#define ATH_MCI_INQUIRY_PRIO 62
36#define ATH_MCI_HI_PRIO 60
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37#define ATH_MCI_NUM_BT_CHANNELS 79
38
39#define MCI_GPM_SET_CHANNEL_BIT(_p_gpm, _bt_chan) \
40 do { \
41 if (_bt_chan < ATH_MCI_NUM_BT_CHANNELS) { \
42 *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_CHANNEL_MAP + \
43 (_bt_chan / 8)) |= (1 << (_bt_chan & 7)); \
44 } \
45 } while (0)
46
47#define MCI_GPM_CLR_CHANNEL_BIT(_p_gpm, _bt_chan) \
48 do { \
49 if (_bt_chan < ATH_MCI_NUM_BT_CHANNELS) { \
50 *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_CHANNEL_MAP + \
51 (_bt_chan / 8)) &= ~(1 << (_bt_chan & 7));\
52 } \
53 } while (0)
54
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55#define INC_PROF(_mci, _info) do { \
56 switch (_info->type) { \
57 case MCI_GPM_COEX_PROFILE_RFCOMM:\
58 _mci->num_other_acl++; \
59 break; \
60 case MCI_GPM_COEX_PROFILE_A2DP: \
61 _mci->num_a2dp++; \
62 if (!_info->edr) \
63 _mci->num_bdr++; \
64 break; \
65 case MCI_GPM_COEX_PROFILE_HID: \
66 _mci->num_hid++; \
67 break; \
68 case MCI_GPM_COEX_PROFILE_BNEP: \
69 _mci->num_pan++; \
70 break; \
71 case MCI_GPM_COEX_PROFILE_VOICE: \
72 _mci->num_sco++; \
73 break; \
74 default: \
75 break; \
76 } \
77 } while (0)
78
79#define DEC_PROF(_mci, _info) do { \
80 switch (_info->type) { \
81 case MCI_GPM_COEX_PROFILE_RFCOMM:\
82 _mci->num_other_acl--; \
83 break; \
84 case MCI_GPM_COEX_PROFILE_A2DP: \
85 _mci->num_a2dp--; \
86 if (!_info->edr) \
87 _mci->num_bdr--; \
88 break; \
89 case MCI_GPM_COEX_PROFILE_HID: \
90 _mci->num_hid--; \
91 break; \
92 case MCI_GPM_COEX_PROFILE_BNEP: \
93 _mci->num_pan--; \
94 break; \
95 case MCI_GPM_COEX_PROFILE_VOICE: \
96 _mci->num_sco--; \
97 break; \
98 default: \
99 break; \
100 } \
101 } while (0)
102
103#define NUM_PROF(_mci) (_mci->num_other_acl + _mci->num_a2dp + \
104 _mci->num_hid + _mci->num_pan + _mci->num_sco)
105
106struct ath_mci_profile_info {
107 u8 type;
108 u8 conn_handle;
109 bool start;
110 bool master;
111 bool edr;
112 u8 voice_type;
113 u16 T; /* Voice: Tvoice, HID: Tsniff, in slots */
114 u8 W; /* Voice: Wvoice, HID: Sniff timeout, in slots */
115 u8 A; /* HID: Sniff attempt, in slots */
116 struct list_head list;
117};
118
119struct ath_mci_profile_status {
120 bool is_critical;
121 bool is_link;
122 u8 conn_handle;
123};
124
125struct ath_mci_profile {
126 struct list_head info;
127 DECLARE_BITMAP(status, ATH_MCI_MAX_PROFILE);
128 u16 aggr_limit;
129 u8 num_mgmt;
130 u8 num_sco;
131 u8 num_a2dp;
132 u8 num_hid;
133 u8 num_pan;
134 u8 num_other_acl;
135 u8 num_bdr;
db60428b 136 u8 voice_priority;
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137};
138
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139struct ath_mci_buf {
140 void *bf_addr; /* virtual addr of desc */
141 dma_addr_t bf_paddr; /* physical addr of buffer */
142 u32 bf_len; /* len of data */
143};
144
145struct ath_mci_coex {
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146 struct ath_mci_buf sched_buf;
147 struct ath_mci_buf gpm_buf;
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148};
149
7dc181c2 150void ath_mci_flush_profile(struct ath_mci_profile *mci);
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151int ath_mci_setup(struct ath_softc *sc);
152void ath_mci_cleanup(struct ath_softc *sc);
19686ddf 153void ath_mci_intr(struct ath_softc *sc);
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154
155#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
156void ath_mci_enable(struct ath_softc *sc);
50072ebc 157void ath9k_mci_update_wlan_channels(struct ath_softc *sc, bool allow_all);
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158#else
159static inline void ath_mci_enable(struct ath_softc *sc)
160{
161}
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162static inline void ath9k_mci_update_wlan_channels(struct ath_softc *sc,
163 bool allow_all)
164{
165}
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166#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
167
168#endif /* MCI_H*/