[mirror_ubuntu-jammy-kernel.git] / drivers / net / wireless / ath / carl9170 / fwcmd.h

/*
 * Shared Atheros AR9170 Header
 *
 * Firmware command interface definitions
 *
 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
 * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; see the file COPYING.  If not, see
 * http://www.gnu.org/licenses/.
 *
 * This file incorporates work covered by the following copyright and
 * permission notice:
 *    Copyright (c) 2007-2008 Atheros Communications, Inc.
 *
 *    Permission to use, copy, modify, and/or distribute this software for any
 *    purpose with or without fee is hereby granted, provided that the above
 *    copyright notice and this permission notice appear in all copies.
 *
 *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef __CARL9170_SHARED_FWCMD_H
#define __CARL9170_SHARED_FWCMD_H

#define	CARL9170_MAX_CMD_LEN		64
#define	CARL9170_MAX_CMD_PAYLOAD_LEN	60

#define CARL9170FW_API_MIN_VER		1
#define CARL9170FW_API_MAX_VER		1

enum carl9170_cmd_oids {
	CARL9170_CMD_RREG		= 0x00,
	CARL9170_CMD_WREG		= 0x01,
	CARL9170_CMD_ECHO		= 0x02,
	CARL9170_CMD_SWRST		= 0x03,
	CARL9170_CMD_REBOOT		= 0x04,
	CARL9170_CMD_BCN_CTRL		= 0x05,
	CARL9170_CMD_READ_TSF		= 0x06,
	CARL9170_CMD_RX_FILTER		= 0x07,
	CARL9170_CMD_WOL		= 0x08,
	CARL9170_CMD_TALLY		= 0x09,

	/* CAM */
	CARL9170_CMD_EKEY		= 0x10,
	CARL9170_CMD_DKEY		= 0x11,

	/* RF / PHY */
	CARL9170_CMD_FREQUENCY		= 0x20,
	CARL9170_CMD_RF_INIT		= 0x21,
	CARL9170_CMD_SYNTH		= 0x22,
	CARL9170_CMD_FREQ_START		= 0x23,
	CARL9170_CMD_PSM		= 0x24,

	/* Asychronous command flag */
	CARL9170_CMD_ASYNC_FLAG		= 0x40,
	CARL9170_CMD_WREG_ASYNC		= (CARL9170_CMD_WREG |
					   CARL9170_CMD_ASYNC_FLAG),
	CARL9170_CMD_REBOOT_ASYNC	= (CARL9170_CMD_REBOOT |
					   CARL9170_CMD_ASYNC_FLAG),
	CARL9170_CMD_BCN_CTRL_ASYNC	= (CARL9170_CMD_BCN_CTRL |
					   CARL9170_CMD_ASYNC_FLAG),
	CARL9170_CMD_PSM_ASYNC		= (CARL9170_CMD_PSM |
					   CARL9170_CMD_ASYNC_FLAG),

	/* responses and traps */
	CARL9170_RSP_FLAG		= 0xc0,
	CARL9170_RSP_PRETBTT		= 0xc0,
	CARL9170_RSP_TXCOMP		= 0xc1,
	CARL9170_RSP_BEACON_CONFIG	= 0xc2,
	CARL9170_RSP_ATIM		= 0xc3,
	CARL9170_RSP_WATCHDOG		= 0xc6,
	CARL9170_RSP_TEXT		= 0xca,
	CARL9170_RSP_HEXDUMP		= 0xcc,
	CARL9170_RSP_RADAR		= 0xcd,
	CARL9170_RSP_GPIO		= 0xce,
	CARL9170_RSP_BOOT		= 0xcf,
};

struct carl9170_set_key_cmd {
	__le16		user;
	__le16		keyId;
	__le16		type;
	u8		macAddr[6];
	u32		key[4];
} __packed __aligned(4);
#define CARL9170_SET_KEY_CMD_SIZE		28

struct carl9170_disable_key_cmd {
	__le16		user;
	__le16		padding;
} __packed __aligned(4);
#define CARL9170_DISABLE_KEY_CMD_SIZE		4

struct carl9170_u32_list {
	u32	vals[0];
} __packed;

struct carl9170_reg_list {
	__le32		regs[0];
} __packed;

struct carl9170_write_reg {
	struct {
		__le32		addr;
		__le32		val;
	} regs[0] __packed;
} __packed;

#define	CARL9170FW_PHY_HT_ENABLE		0x4
#define	CARL9170FW_PHY_HT_DYN2040		0x8
#define	CARL9170FW_PHY_HT_EXT_CHAN_OFF		0x3
#define	CARL9170FW_PHY_HT_EXT_CHAN_OFF_S	2

struct carl9170_rf_init {
	__le32		freq;
	u8		ht_settings;
	u8		padding2[3];
	__le32		delta_slope_coeff_exp;
	__le32		delta_slope_coeff_man;
	__le32		delta_slope_coeff_exp_shgi;
	__le32		delta_slope_coeff_man_shgi;
	__le32		finiteLoopCount;
} __packed;
#define CARL9170_RF_INIT_SIZE		28

struct carl9170_rf_init_result {
	__le32		ret;		/* AR9170_PHY_REG_AGC_CONTROL */
} __packed;
#define	CARL9170_RF_INIT_RESULT_SIZE	4

#define	CARL9170_PSM_SLEEP		0x1000
#define	CARL9170_PSM_SOFTWARE		0
#define	CARL9170_PSM_WAKE		0 /* internally used. */
#define	CARL9170_PSM_COUNTER		0xfff
#define	CARL9170_PSM_COUNTER_S		0

struct carl9170_psm {
	__le32		state;
} __packed;
#define CARL9170_PSM_SIZE		4

/*
 * Note: If a bit in rx_filter is set, then it
 * means that the particular frames which matches
 * the condition are FILTERED/REMOVED/DISCARDED!
 * (This is can be a bit confusing, especially
 * because someone people think it's the exact
 * opposite way, so watch out!)
 */
struct carl9170_rx_filter_cmd {
	__le32		rx_filter;
} __packed;
#define CARL9170_RX_FILTER_CMD_SIZE	4

#define CARL9170_RX_FILTER_BAD		0x01
#define CARL9170_RX_FILTER_OTHER_RA	0x02
#define CARL9170_RX_FILTER_DECRY_FAIL	0x04
#define CARL9170_RX_FILTER_CTL_OTHER	0x08
#define CARL9170_RX_FILTER_CTL_PSPOLL	0x10
#define CARL9170_RX_FILTER_CTL_BACKR	0x20
#define CARL9170_RX_FILTER_MGMT		0x40
#define CARL9170_RX_FILTER_DATA		0x80
#define CARL9170_RX_FILTER_EVERYTHING	(~0)

struct carl9170_bcn_ctrl_cmd {
	__le32		vif_id;
	__le32		mode;
	__le32		bcn_addr;
	__le32		bcn_len;
} __packed;
#define CARL9170_BCN_CTRL_CMD_SIZE	16

#define CARL9170_BCN_CTRL_DRAIN	0
#define CARL9170_BCN_CTRL_CAB_TRIGGER	1

struct carl9170_wol_cmd {
	__le32		flags;
	u8		mac[6];
	u8		bssid[6];
	__le32		null_interval;
	__le32		free_for_use2;
	__le32		mask;
	u8		pattern[32];
} __packed;

#define CARL9170_WOL_CMD_SIZE		60

#define CARL9170_WOL_DISCONNECT		1
#define CARL9170_WOL_MAGIC_PKT		2

struct carl9170_cmd_head {
	union {
		struct {
			u8	len;
			u8	cmd;
			u8	seq;
			u8	ext;
		} __packed;

		u32 hdr_data;
	} __packed;
} __packed;

struct carl9170_cmd {
	struct carl9170_cmd_head hdr;
	union {
		struct carl9170_set_key_cmd	setkey;
		struct carl9170_disable_key_cmd	disablekey;
		struct carl9170_u32_list	echo;
		struct carl9170_reg_list	rreg;
		struct carl9170_write_reg	wreg;
		struct carl9170_rf_init		rf_init;
		struct carl9170_psm		psm;
		struct carl9170_wol_cmd		wol;
		struct carl9170_bcn_ctrl_cmd	bcn_ctrl;
		struct carl9170_rx_filter_cmd	rx_filter;
		u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
	} __packed;
} __packed __aligned(4);

#define	CARL9170_TX_STATUS_QUEUE	3
#define	CARL9170_TX_STATUS_QUEUE_S	0
#define	CARL9170_TX_STATUS_RIX_S	2
#define	CARL9170_TX_STATUS_RIX		(3 << CARL9170_TX_STATUS_RIX_S)
#define	CARL9170_TX_STATUS_TRIES_S	4
#define	CARL9170_TX_STATUS_TRIES	(7 << CARL9170_TX_STATUS_TRIES_S)
#define	CARL9170_TX_STATUS_SUCCESS	0x80

#ifdef __CARL9170FW__
/*
 * NOTE:
 * Both structs [carl9170_tx_status and _carl9170_tx_status]
 * need to be "bit for bit" in sync.
 */
struct carl9170_tx_status {
	/*
	 * Beware of compiler bugs in all gcc pre 4.4!
	 */

	u8 cookie;
	u8 queue:2;
	u8 rix:2;
	u8 tries:3;
	u8 success:1;
} __packed;
#endif /* __CARL9170FW__ */

struct _carl9170_tx_status {
	/*
	 * This version should be immune to all alignment bugs.
	 */

	u8 cookie;
	u8 info;
} __packed;
#define CARL9170_TX_STATUS_SIZE		2

#define	CARL9170_RSP_TX_STATUS_NUM	(CARL9170_MAX_CMD_PAYLOAD_LEN /	\
					 sizeof(struct _carl9170_tx_status))

#define	CARL9170_TX_MAX_RATE_TRIES	7

#define	CARL9170_TX_MAX_RATES		4
#define	CARL9170_TX_MAX_RETRY_RATES	(CARL9170_TX_MAX_RATES - 1)
#define	CARL9170_ERR_MAGIC		"ERR:"
#define	CARL9170_BUG_MAGIC		"BUG:"

struct carl9170_gpio {
	__le32 gpio;
} __packed;
#define CARL9170_GPIO_SIZE		4

struct carl9170_tsf_rsp {
	union {
		__le32 tsf[2];
		__le64 tsf_64;
	} __packed;
} __packed;
#define CARL9170_TSF_RSP_SIZE		8

struct carl9170_tally_rsp {
	__le32 active;
	__le32 cca;
	__le32 tx_time;
	__le32 rx_total;
	__le32 rx_overrun;
	__le32 tick;
} __packed;

struct carl9170_rsp {
	struct carl9170_cmd_head hdr;

	union {
		struct carl9170_rf_init_result	rf_init_res;
		struct carl9170_u32_list	rreg_res;
		struct carl9170_u32_list	echo;
#ifdef __CARL9170FW__
		struct carl9170_tx_status	tx_status[0];
#endif /* __CARL9170FW__ */
		struct _carl9170_tx_status	_tx_status[0];
		struct carl9170_gpio		gpio;
		struct carl9170_tsf_rsp		tsf;
		struct carl9170_psm		psm;
		struct carl9170_tally_rsp	tally;
		u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
	} __packed;
} __packed __aligned(4);

#endif /* __CARL9170_SHARED_FWCMD_H */
Commit	Line	Data
aae9af60 CL	1	/*
	2	* Shared Atheros AR9170 Header
	3	*
	4	* Firmware command interface definitions
	5	*
	6	* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
85ee5122	7	* Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
aae9af60 CL	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; see the file COPYING. If not, see
	20	* http://www.gnu.org/licenses/.
	21	*
	22	* This file incorporates work covered by the following copyright and
	23	* permission notice:
	24	* Copyright (c) 2007-2008 Atheros Communications, Inc.
	25	*
	26	* Permission to use, copy, modify, and/or distribute this software for any
	27	* purpose with or without fee is hereby granted, provided that the above
	28	* copyright notice and this permission notice appear in all copies.
	29	*
	30	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	31	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	32	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	33	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	34	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	35	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	36	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	37	*/
	38
	39	#ifndef __CARL9170_SHARED_FWCMD_H
	40	#define __CARL9170_SHARED_FWCMD_H
	41
	42	#define CARL9170_MAX_CMD_LEN 64
	43	#define CARL9170_MAX_CMD_PAYLOAD_LEN 60
	44
	45	#define CARL9170FW_API_MIN_VER 1
	46	#define CARL9170FW_API_MAX_VER 1
	47
	48	enum carl9170_cmd_oids {
	49	CARL9170_CMD_RREG = 0x00,
	50	CARL9170_CMD_WREG = 0x01,
	51	CARL9170_CMD_ECHO = 0x02,
	52	CARL9170_CMD_SWRST = 0x03,
	53	CARL9170_CMD_REBOOT = 0x04,
	54	CARL9170_CMD_BCN_CTRL = 0x05,
	55	CARL9170_CMD_READ_TSF = 0x06,
5c895691	56	CARL9170_CMD_RX_FILTER = 0x07,
85ee5122	57	CARL9170_CMD_WOL = 0x08,
f5e2289a	58	CARL9170_CMD_TALLY = 0x09,
aae9af60 CL	59
	60	/* CAM */
	61	CARL9170_CMD_EKEY = 0x10,
	62	CARL9170_CMD_DKEY = 0x11,
	63
	64	/* RF / PHY */
	65	CARL9170_CMD_FREQUENCY = 0x20,
	66	CARL9170_CMD_RF_INIT = 0x21,
	67	CARL9170_CMD_SYNTH = 0x22,
	68	CARL9170_CMD_FREQ_START = 0x23,
	69	CARL9170_CMD_PSM = 0x24,
	70
	71	/* Asychronous command flag */
	72	CARL9170_CMD_ASYNC_FLAG = 0x40,
	73	CARL9170_CMD_WREG_ASYNC = (CARL9170_CMD_WREG \|
	74	CARL9170_CMD_ASYNC_FLAG),
	75	CARL9170_CMD_REBOOT_ASYNC = (CARL9170_CMD_REBOOT \|
	76	CARL9170_CMD_ASYNC_FLAG),
	77	CARL9170_CMD_BCN_CTRL_ASYNC = (CARL9170_CMD_BCN_CTRL \|
	78	CARL9170_CMD_ASYNC_FLAG),
	79	CARL9170_CMD_PSM_ASYNC = (CARL9170_CMD_PSM \|
	80	CARL9170_CMD_ASYNC_FLAG),
	81
	82	/* responses and traps */
	83	CARL9170_RSP_FLAG = 0xc0,
	84	CARL9170_RSP_PRETBTT = 0xc0,
	85	CARL9170_RSP_TXCOMP = 0xc1,
	86	CARL9170_RSP_BEACON_CONFIG = 0xc2,
	87	CARL9170_RSP_ATIM = 0xc3,
	88	CARL9170_RSP_WATCHDOG = 0xc6,
	89	CARL9170_RSP_TEXT = 0xca,
	90	CARL9170_RSP_HEXDUMP = 0xcc,
	91	CARL9170_RSP_RADAR = 0xcd,
	92	CARL9170_RSP_GPIO = 0xce,
	93	CARL9170_RSP_BOOT = 0xcf,
	94	};
	95
	96	struct carl9170_set_key_cmd {
	97	__le16 user;
	98	__le16 keyId;
	99	__le16 type;
	100	u8 macAddr[6];
	101	u32 key[4];
3f1240e4	102	} __packed __aligned(4);
aae9af60 CL	103	#define CARL9170_SET_KEY_CMD_SIZE 28
	104
	105	struct carl9170_disable_key_cmd {
	106	__le16 user;
	107	__le16 padding;
3f1240e4	108	} __packed __aligned(4);
aae9af60 CL	109	#define CARL9170_DISABLE_KEY_CMD_SIZE 4
	110
	111	struct carl9170_u32_list {
	112	u32 vals[0];
	113	} __packed;
	114
	115	struct carl9170_reg_list {
	116	__le32 regs[0];
	117	} __packed;
	118
	119	struct carl9170_write_reg {
	120	struct {
	121	__le32 addr;
	122	__le32 val;
	123	} regs[0] __packed;
	124	} __packed;
	125
	126	#define CARL9170FW_PHY_HT_ENABLE 0x4
	127	#define CARL9170FW_PHY_HT_DYN2040 0x8
	128	#define CARL9170FW_PHY_HT_EXT_CHAN_OFF 0x3
	129	#define CARL9170FW_PHY_HT_EXT_CHAN_OFF_S 2
	130
	131	struct carl9170_rf_init {
	132	__le32 freq;
	133	u8 ht_settings;
	134	u8 padding2[3];
	135	__le32 delta_slope_coeff_exp;
	136	__le32 delta_slope_coeff_man;
	137	__le32 delta_slope_coeff_exp_shgi;
	138	__le32 delta_slope_coeff_man_shgi;
	139	__le32 finiteLoopCount;
	140	} __packed;
	141	#define CARL9170_RF_INIT_SIZE 28
	142
	143	struct carl9170_rf_init_result {
	144	__le32 ret; /* AR9170_PHY_REG_AGC_CONTROL */
	145	} __packed;
	146	#define CARL9170_RF_INIT_RESULT_SIZE 4
	147
	148	#define CARL9170_PSM_SLEEP 0x1000
	149	#define CARL9170_PSM_SOFTWARE 0
	150	#define CARL9170_PSM_WAKE 0 /* internally used. */
	151	#define CARL9170_PSM_COUNTER 0xfff
	152	#define CARL9170_PSM_COUNTER_S 0
	153
	154	struct carl9170_psm {
	155	__le32 state;
	156	} __packed;
	157	#define CARL9170_PSM_SIZE 4
	158
5ae994d0 CL	159	/*
	160	* Note: If a bit in rx_filter is set, then it
	161	* means that the particular frames which matches
	162	* the condition are FILTERED/REMOVED/DISCARDED!
	163	* (This is can be a bit confusing, especially
	164	* because someone people think it's the exact
	165	* opposite way, so watch out!)
	166	*/
5c895691 CL	167	struct carl9170_rx_filter_cmd {
	168	__le32 rx_filter;
	169	} __packed;
	170	#define CARL9170_RX_FILTER_CMD_SIZE 4
	171
	172	#define CARL9170_RX_FILTER_BAD 0x01
	173	#define CARL9170_RX_FILTER_OTHER_RA 0x02
	174	#define CARL9170_RX_FILTER_DECRY_FAIL 0x04
	175	#define CARL9170_RX_FILTER_CTL_OTHER 0x08
	176	#define CARL9170_RX_FILTER_CTL_PSPOLL 0x10
	177	#define CARL9170_RX_FILTER_CTL_BACKR 0x20
	178	#define CARL9170_RX_FILTER_MGMT 0x40
	179	#define CARL9170_RX_FILTER_DATA 0x80
9e09b5c9	180	#define CARL9170_RX_FILTER_EVERYTHING (~0)
5c895691	181
aae9af60 CL	182	struct carl9170_bcn_ctrl_cmd {
	183	__le32 vif_id;
	184	__le32 mode;
	185	__le32 bcn_addr;
	186	__le32 bcn_len;
	187	} __packed;
	188	#define CARL9170_BCN_CTRL_CMD_SIZE 16
	189
	190	#define CARL9170_BCN_CTRL_DRAIN 0
	191	#define CARL9170_BCN_CTRL_CAB_TRIGGER 1
	192
85ee5122 CL	193	struct carl9170_wol_cmd {
	194	__le32 flags;
	195	u8 mac[6];
	196	u8 bssid[6];
	197	__le32 null_interval;
	198	__le32 free_for_use2;
	199	__le32 mask;
	200	u8 pattern[32];
	201	} __packed;
	202
	203	#define CARL9170_WOL_CMD_SIZE 60
	204
	205	#define CARL9170_WOL_DISCONNECT 1
	206	#define CARL9170_WOL_MAGIC_PKT 2
	207
aae9af60 CL	208	struct carl9170_cmd_head {
	209	union {
	210	struct {
	211	u8 len;
	212	u8 cmd;
	213	u8 seq;
	214	u8 ext;
	215	} __packed;
	216
	217	u32 hdr_data;
	218	} __packed;
	219	} __packed;
	220
	221	struct carl9170_cmd {
	222	struct carl9170_cmd_head hdr;
	223	union {
	224	struct carl9170_set_key_cmd setkey;
	225	struct carl9170_disable_key_cmd disablekey;
	226	struct carl9170_u32_list echo;
	227	struct carl9170_reg_list rreg;
	228	struct carl9170_write_reg wreg;
	229	struct carl9170_rf_init rf_init;
	230	struct carl9170_psm psm;
85ee5122	231	struct carl9170_wol_cmd wol;
aae9af60	232	struct carl9170_bcn_ctrl_cmd bcn_ctrl;
5c895691	233	struct carl9170_rx_filter_cmd rx_filter;
aae9af60 CL	234	u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
aae9af60 CL	235	} __packed;
3f1240e4	236	} __packed __aligned(4);
aae9af60 CL	237
	238	#define CARL9170_TX_STATUS_QUEUE 3
	239	#define CARL9170_TX_STATUS_QUEUE_S 0
	240	#define CARL9170_TX_STATUS_RIX_S 2
	241	#define CARL9170_TX_STATUS_RIX (3 << CARL9170_TX_STATUS_RIX_S)
	242	#define CARL9170_TX_STATUS_TRIES_S 4
	243	#define CARL9170_TX_STATUS_TRIES (7 << CARL9170_TX_STATUS_TRIES_S)
	244	#define CARL9170_TX_STATUS_SUCCESS 0x80
	245
3f1240e4	246	#ifdef __CARL9170FW__
aae9af60 CL	247	/*
	248	* NOTE:
	249	* Both structs [carl9170_tx_status and _carl9170_tx_status]
	250	* need to be "bit for bit" in sync.
	251	*/
	252	struct carl9170_tx_status {
	253	/*
	254	* Beware of compiler bugs in all gcc pre 4.4!
	255	*/
	256
	257	u8 cookie;
	258	u8 queue:2;
	259	u8 rix:2;
	260	u8 tries:3;
	261	u8 success:1;
	262	} __packed;
3f1240e4 CL	263	#endif /* __CARL9170FW__ */
3f1240e4 CL	264
aae9af60 CL	265	struct _carl9170_tx_status {
	266	/*
	267	* This version should be immune to all alignment bugs.
	268	*/
	269
	270	u8 cookie;
	271	u8 info;
	272	} __packed;
	273	#define CARL9170_TX_STATUS_SIZE 2
	274
	275	#define CARL9170_RSP_TX_STATUS_NUM (CARL9170_MAX_CMD_PAYLOAD_LEN / \
	276	sizeof(struct _carl9170_tx_status))
	277
	278	#define CARL9170_TX_MAX_RATE_TRIES 7
	279
	280	#define CARL9170_TX_MAX_RATES 4
	281	#define CARL9170_TX_MAX_RETRY_RATES (CARL9170_TX_MAX_RATES - 1)
	282	#define CARL9170_ERR_MAGIC "ERR:"
	283	#define CARL9170_BUG_MAGIC "BUG:"
	284
	285	struct carl9170_gpio {
	286	__le32 gpio;
	287	} __packed;
	288	#define CARL9170_GPIO_SIZE 4
	289
	290	struct carl9170_tsf_rsp {
	291	union {
	292	__le32 tsf[2];
	293	__le64 tsf_64;
	294	} __packed;
	295	} __packed;
	296	#define CARL9170_TSF_RSP_SIZE 8
	297
f5e2289a CL	298	struct carl9170_tally_rsp {
	299	__le32 active;
	300	__le32 cca;
	301	__le32 tx_time;
	302	__le32 rx_total;
	303	__le32 rx_overrun;
	304	__le32 tick;
	305	} __packed;
	306
aae9af60 CL	307	struct carl9170_rsp {
	308	struct carl9170_cmd_head hdr;
	309
	310	union {
	311	struct carl9170_rf_init_result rf_init_res;
	312	struct carl9170_u32_list rreg_res;
	313	struct carl9170_u32_list echo;
3f1240e4	314	#ifdef __CARL9170FW__
aae9af60	315	struct carl9170_tx_status tx_status[0];
3f1240e4	316	#endif /* __CARL9170FW__ */
aae9af60 CL	317	struct _carl9170_tx_status _tx_status[0];
	318	struct carl9170_gpio gpio;
	319	struct carl9170_tsf_rsp tsf;
	320	struct carl9170_psm psm;
f5e2289a	321	struct carl9170_tally_rsp tally;
aae9af60 CL	322	u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
aae9af60 CL	323	} __packed;
3f1240e4	324	} __packed __aligned(4);
aae9af60 CL	325
aae9af60 CL	326	#endif /* __CARL9170_SHARED_FWCMD_H */