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Commit | Line | Data |
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2be7d22f | 1 | /* |
230d8442 | 2 | * Copyright (c) 2012-2015 Qualcomm Atheros, Inc. |
2be7d22f VK |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
2be7d22f | 17 | #include <linux/etherdevice.h> |
2be7d22f VK |
18 | #include <net/ieee80211_radiotap.h> |
19 | #include <linux/if_arp.h> | |
20 | #include <linux/moduleparam.h> | |
504937d4 KE |
21 | #include <linux/ip.h> |
22 | #include <linux/ipv6.h> | |
23 | #include <net/ipv6.h> | |
0786dc4e | 24 | #include <linux/prefetch.h> |
2be7d22f VK |
25 | |
26 | #include "wil6210.h" | |
27 | #include "wmi.h" | |
28 | #include "txrx.h" | |
98658095 | 29 | #include "trace.h" |
2be7d22f VK |
30 | |
31 | static bool rtap_include_phy_info; | |
32 | module_param(rtap_include_phy_info, bool, S_IRUGO); | |
33 | MODULE_PARM_DESC(rtap_include_phy_info, | |
34 | " Include PHY info in the radiotap header, default - no"); | |
35 | ||
c406ea7c VK |
36 | bool rx_align_2; |
37 | module_param(rx_align_2, bool, S_IRUGO); | |
38 | MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no"); | |
39 | ||
40 | static inline uint wil_rx_snaplen(void) | |
41 | { | |
42 | return rx_align_2 ? 6 : 0; | |
43 | } | |
44 | ||
2be7d22f VK |
45 | static inline int wil_vring_is_empty(struct vring *vring) |
46 | { | |
47 | return vring->swhead == vring->swtail; | |
48 | } | |
49 | ||
50 | static inline u32 wil_vring_next_tail(struct vring *vring) | |
51 | { | |
52 | return (vring->swtail + 1) % vring->size; | |
53 | } | |
54 | ||
55 | static inline void wil_vring_advance_head(struct vring *vring, int n) | |
56 | { | |
57 | vring->swhead = (vring->swhead + n) % vring->size; | |
58 | } | |
59 | ||
60 | static inline int wil_vring_is_full(struct vring *vring) | |
61 | { | |
62 | return wil_vring_next_tail(vring) == vring->swhead; | |
63 | } | |
8fe59627 | 64 | |
0436fd9a VS |
65 | /* Used space in Tx Vring */ |
66 | static inline int wil_vring_used_tx(struct vring *vring) | |
2be7d22f VK |
67 | { |
68 | u32 swhead = vring->swhead; | |
69 | u32 swtail = vring->swtail; | |
0436fd9a VS |
70 | return (vring->size + swhead - swtail) % vring->size; |
71 | } | |
2be7d22f | 72 | |
0436fd9a VS |
73 | /* Available space in Tx Vring */ |
74 | static inline int wil_vring_avail_tx(struct vring *vring) | |
75 | { | |
76 | return vring->size - wil_vring_used_tx(vring) - 1; | |
2be7d22f VK |
77 | } |
78 | ||
0436fd9a | 79 | /* wil_vring_wmark_low - low watermark for available descriptor space */ |
5bb6423e VK |
80 | static inline int wil_vring_wmark_low(struct vring *vring) |
81 | { | |
82 | return vring->size/8; | |
83 | } | |
84 | ||
0436fd9a | 85 | /* wil_vring_wmark_high - high watermark for available descriptor space */ |
5bb6423e VK |
86 | static inline int wil_vring_wmark_high(struct vring *vring) |
87 | { | |
88 | return vring->size/4; | |
89 | } | |
90 | ||
0436fd9a VS |
91 | /* wil_val_in_range - check if value in [min,max) */ |
92 | static inline bool wil_val_in_range(int val, int min, int max) | |
93 | { | |
94 | return val >= min && val < max; | |
95 | } | |
96 | ||
2be7d22f VK |
97 | static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring) |
98 | { | |
99 | struct device *dev = wil_to_dev(wil); | |
100 | size_t sz = vring->size * sizeof(vring->va[0]); | |
101 | uint i; | |
102 | ||
9cf10d62 VK |
103 | wil_dbg_misc(wil, "%s()\n", __func__); |
104 | ||
2be7d22f VK |
105 | BUILD_BUG_ON(sizeof(vring->va[0]) != 32); |
106 | ||
107 | vring->swhead = 0; | |
108 | vring->swtail = 0; | |
f88f113a | 109 | vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL); |
2be7d22f | 110 | if (!vring->ctx) { |
2be7d22f VK |
111 | vring->va = NULL; |
112 | return -ENOMEM; | |
113 | } | |
0436fd9a | 114 | /* vring->va should be aligned on its size rounded up to power of 2 |
2be7d22f VK |
115 | * This is granted by the dma_alloc_coherent |
116 | */ | |
117 | vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL); | |
118 | if (!vring->va) { | |
2be7d22f VK |
119 | kfree(vring->ctx); |
120 | vring->ctx = NULL; | |
121 | return -ENOMEM; | |
122 | } | |
123 | /* initially, all descriptors are SW owned | |
124 | * For Tx and Rx, ownership bit is at the same location, thus | |
125 | * we can use any | |
126 | */ | |
127 | for (i = 0; i < vring->size; i++) { | |
8fe59627 VK |
128 | volatile struct vring_tx_desc *_d = &vring->va[i].tx; |
129 | ||
68ada71e | 130 | _d->dma.status = TX_DMA_STATUS_DU; |
2be7d22f VK |
131 | } |
132 | ||
39c52ee8 VK |
133 | wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size, |
134 | vring->va, &vring->pa, vring->ctx); | |
2be7d22f VK |
135 | |
136 | return 0; | |
137 | } | |
138 | ||
2232abd5 VK |
139 | static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d, |
140 | struct wil_ctx *ctx) | |
141 | { | |
142 | dma_addr_t pa = wil_desc_addr(&d->dma.addr); | |
143 | u16 dmalen = le16_to_cpu(d->dma.length); | |
8fe59627 | 144 | |
2232abd5 VK |
145 | switch (ctx->mapped_as) { |
146 | case wil_mapped_as_single: | |
147 | dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE); | |
148 | break; | |
149 | case wil_mapped_as_page: | |
150 | dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE); | |
151 | break; | |
152 | default: | |
153 | break; | |
154 | } | |
155 | } | |
156 | ||
2be7d22f VK |
157 | static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring, |
158 | int tx) | |
159 | { | |
160 | struct device *dev = wil_to_dev(wil); | |
161 | size_t sz = vring->size * sizeof(vring->va[0]); | |
162 | ||
ef77285f VK |
163 | if (tx) { |
164 | int vring_index = vring - wil->vring_tx; | |
165 | ||
166 | wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n", | |
167 | vring_index, vring->size, vring->va, | |
168 | &vring->pa, vring->ctx); | |
169 | } else { | |
170 | wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n", | |
171 | vring->size, vring->va, | |
172 | &vring->pa, vring->ctx); | |
173 | } | |
174 | ||
2be7d22f | 175 | while (!wil_vring_is_empty(vring)) { |
68ada71e | 176 | dma_addr_t pa; |
7e594444 | 177 | u16 dmalen; |
f88f113a | 178 | struct wil_ctx *ctx; |
68ada71e | 179 | |
2be7d22f | 180 | if (tx) { |
68ada71e VK |
181 | struct vring_tx_desc dd, *d = ⅆ |
182 | volatile struct vring_tx_desc *_d = | |
2be7d22f | 183 | &vring->va[vring->swtail].tx; |
68ada71e | 184 | |
f88f113a | 185 | ctx = &vring->ctx[vring->swtail]; |
68ada71e | 186 | *d = *_d; |
2232abd5 | 187 | wil_txdesc_unmap(dev, d, ctx); |
f88f113a VK |
188 | if (ctx->skb) |
189 | dev_kfree_skb_any(ctx->skb); | |
2be7d22f VK |
190 | vring->swtail = wil_vring_next_tail(vring); |
191 | } else { /* rx */ | |
68ada71e VK |
192 | struct vring_rx_desc dd, *d = ⅆ |
193 | volatile struct vring_rx_desc *_d = | |
4d1ac072 | 194 | &vring->va[vring->swhead].rx; |
68ada71e | 195 | |
f88f113a | 196 | ctx = &vring->ctx[vring->swhead]; |
68ada71e VK |
197 | *d = *_d; |
198 | pa = wil_desc_addr(&d->dma.addr); | |
7e594444 VK |
199 | dmalen = le16_to_cpu(d->dma.length); |
200 | dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE); | |
f88f113a | 201 | kfree_skb(ctx->skb); |
2be7d22f VK |
202 | wil_vring_advance_head(vring, 1); |
203 | } | |
204 | } | |
205 | dma_free_coherent(dev, sz, (void *)vring->va, vring->pa); | |
206 | kfree(vring->ctx); | |
207 | vring->pa = 0; | |
208 | vring->va = NULL; | |
209 | vring->ctx = NULL; | |
210 | } | |
211 | ||
212 | /** | |
213 | * Allocate one skb for Rx VRING | |
214 | * | |
215 | * Safe to call from IRQ | |
216 | */ | |
217 | static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring, | |
218 | u32 i, int headroom) | |
219 | { | |
220 | struct device *dev = wil_to_dev(wil); | |
c406ea7c | 221 | unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen(); |
68ada71e | 222 | struct vring_rx_desc dd, *d = ⅆ |
8fe59627 | 223 | volatile struct vring_rx_desc *_d = &vring->va[i].rx; |
2be7d22f | 224 | dma_addr_t pa; |
2be7d22f | 225 | struct sk_buff *skb = dev_alloc_skb(sz + headroom); |
8fe59627 | 226 | |
2be7d22f VK |
227 | if (unlikely(!skb)) |
228 | return -ENOMEM; | |
229 | ||
230 | skb_reserve(skb, headroom); | |
231 | skb_put(skb, sz); | |
232 | ||
233 | pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE); | |
234 | if (unlikely(dma_mapping_error(dev, pa))) { | |
235 | kfree_skb(skb); | |
236 | return -ENOMEM; | |
237 | } | |
238 | ||
48c963af | 239 | d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT; |
68ada71e | 240 | wil_desc_addr_set(&d->dma.addr, pa); |
2be7d22f VK |
241 | /* ip_length don't care */ |
242 | /* b11 don't care */ | |
243 | /* error don't care */ | |
244 | d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ | |
7e594444 | 245 | d->dma.length = cpu_to_le16(sz); |
68ada71e | 246 | *_d = *d; |
f88f113a | 247 | vring->ctx[i].skb = skb; |
2be7d22f VK |
248 | |
249 | return 0; | |
250 | } | |
251 | ||
252 | /** | |
253 | * Adds radiotap header | |
254 | * | |
255 | * Any error indicated as "Bad FCS" | |
256 | * | |
257 | * Vendor data for 04:ce:14-1 (Wilocity-1) consists of: | |
258 | * - Rx descriptor: 32 bytes | |
259 | * - Phy info | |
260 | */ | |
261 | static void wil_rx_add_radiotap_header(struct wil6210_priv *wil, | |
33e61169 | 262 | struct sk_buff *skb) |
2be7d22f VK |
263 | { |
264 | struct wireless_dev *wdev = wil->wdev; | |
265 | struct wil6210_rtap { | |
266 | struct ieee80211_radiotap_header rthdr; | |
267 | /* fields should be in the order of bits in rthdr.it_present */ | |
268 | /* flags */ | |
269 | u8 flags; | |
270 | /* channel */ | |
271 | __le16 chnl_freq __aligned(2); | |
272 | __le16 chnl_flags; | |
273 | /* MCS */ | |
274 | u8 mcs_present; | |
275 | u8 mcs_flags; | |
276 | u8 mcs_index; | |
277 | } __packed; | |
278 | struct wil6210_rtap_vendor { | |
279 | struct wil6210_rtap rtap; | |
280 | /* vendor */ | |
281 | u8 vendor_oui[3] __aligned(2); | |
282 | u8 vendor_ns; | |
283 | __le16 vendor_skip; | |
284 | u8 vendor_data[0]; | |
285 | } __packed; | |
33e61169 | 286 | struct vring_rx_desc *d = wil_skb_rxdesc(skb); |
2be7d22f VK |
287 | struct wil6210_rtap_vendor *rtap_vendor; |
288 | int rtap_len = sizeof(struct wil6210_rtap); | |
289 | int phy_length = 0; /* phy info header size, bytes */ | |
290 | static char phy_data[128]; | |
291 | struct ieee80211_channel *ch = wdev->preset_chandef.chan; | |
292 | ||
293 | if (rtap_include_phy_info) { | |
294 | rtap_len = sizeof(*rtap_vendor) + sizeof(*d); | |
295 | /* calculate additional length */ | |
296 | if (d->dma.status & RX_DMA_STATUS_PHY_INFO) { | |
297 | /** | |
298 | * PHY info starts from 8-byte boundary | |
299 | * there are 8-byte lines, last line may be partially | |
300 | * written (HW bug), thus FW configures for last line | |
301 | * to be excessive. Driver skips this last line. | |
302 | */ | |
303 | int len = min_t(int, 8 + sizeof(phy_data), | |
304 | wil_rxdesc_phy_length(d)); | |
8fe59627 | 305 | |
2be7d22f VK |
306 | if (len > 8) { |
307 | void *p = skb_tail_pointer(skb); | |
308 | void *pa = PTR_ALIGN(p, 8); | |
8fe59627 | 309 | |
2be7d22f VK |
310 | if (skb_tailroom(skb) >= len + (pa - p)) { |
311 | phy_length = len - 8; | |
312 | memcpy(phy_data, pa, phy_length); | |
313 | } | |
314 | } | |
315 | } | |
316 | rtap_len += phy_length; | |
317 | } | |
318 | ||
319 | if (skb_headroom(skb) < rtap_len && | |
320 | pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) { | |
321 | wil_err(wil, "Unable to expand headrom to %d\n", rtap_len); | |
322 | return; | |
323 | } | |
324 | ||
325 | rtap_vendor = (void *)skb_push(skb, rtap_len); | |
326 | memset(rtap_vendor, 0, rtap_len); | |
327 | ||
328 | rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION; | |
329 | rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len); | |
330 | rtap_vendor->rtap.rthdr.it_present = cpu_to_le32( | |
331 | (1 << IEEE80211_RADIOTAP_FLAGS) | | |
332 | (1 << IEEE80211_RADIOTAP_CHANNEL) | | |
333 | (1 << IEEE80211_RADIOTAP_MCS)); | |
334 | if (d->dma.status & RX_DMA_STATUS_ERROR) | |
335 | rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS; | |
336 | ||
337 | rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320); | |
338 | rtap_vendor->rtap.chnl_flags = cpu_to_le16(0); | |
339 | ||
340 | rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS; | |
341 | rtap_vendor->rtap.mcs_flags = 0; | |
342 | rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d); | |
343 | ||
344 | if (rtap_include_phy_info) { | |
345 | rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 << | |
346 | IEEE80211_RADIOTAP_VENDOR_NAMESPACE); | |
347 | /* OUI for Wilocity 04:ce:14 */ | |
348 | rtap_vendor->vendor_oui[0] = 0x04; | |
349 | rtap_vendor->vendor_oui[1] = 0xce; | |
350 | rtap_vendor->vendor_oui[2] = 0x14; | |
351 | rtap_vendor->vendor_ns = 1; | |
352 | /* Rx descriptor + PHY data */ | |
353 | rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) + | |
354 | phy_length); | |
355 | memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d)); | |
356 | memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data, | |
357 | phy_length); | |
358 | } | |
359 | } | |
360 | ||
a8313341 VK |
361 | /* similar to ieee80211_ version, but FC contain only 1-st byte */ |
362 | static inline int wil_is_back_req(u8 fc) | |
363 | { | |
364 | return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) == | |
365 | (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ); | |
366 | } | |
367 | ||
2be7d22f VK |
368 | /** |
369 | * reap 1 frame from @swhead | |
370 | * | |
33e61169 VK |
371 | * Rx descriptor copied to skb->cb |
372 | * | |
2be7d22f VK |
373 | * Safe to call from IRQ |
374 | */ | |
375 | static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil, | |
376 | struct vring *vring) | |
377 | { | |
378 | struct device *dev = wil_to_dev(wil); | |
379 | struct net_device *ndev = wil_to_ndev(wil); | |
68ada71e VK |
380 | volatile struct vring_rx_desc *_d; |
381 | struct vring_rx_desc *d; | |
2be7d22f VK |
382 | struct sk_buff *skb; |
383 | dma_addr_t pa; | |
c406ea7c VK |
384 | unsigned int snaplen = wil_rx_snaplen(); |
385 | unsigned int sz = mtu_max + ETH_HLEN + snaplen; | |
7e594444 | 386 | u16 dmalen; |
2be7d22f | 387 | u8 ftype; |
c8b78b5f | 388 | int cid; |
3b282bc6 | 389 | int i; |
c8b78b5f VK |
390 | struct wil_net_stats *stats; |
391 | ||
33e61169 VK |
392 | BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb)); |
393 | ||
3b282bc6 | 394 | again: |
33c477fd | 395 | if (unlikely(wil_vring_is_empty(vring))) |
2be7d22f VK |
396 | return NULL; |
397 | ||
3b282bc6 | 398 | i = (int)vring->swhead; |
148416a9 | 399 | _d = &vring->va[i].rx; |
33c477fd | 400 | if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) { |
2be7d22f VK |
401 | /* it is not error, we just reached end of Rx done area */ |
402 | return NULL; | |
403 | } | |
404 | ||
148416a9 VK |
405 | skb = vring->ctx[i].skb; |
406 | vring->ctx[i].skb = NULL; | |
407 | wil_vring_advance_head(vring, 1); | |
408 | if (!skb) { | |
409 | wil_err(wil, "No Rx skb at [%d]\n", i); | |
3b282bc6 | 410 | goto again; |
148416a9 | 411 | } |
68ada71e VK |
412 | d = wil_skb_rxdesc(skb); |
413 | *d = *_d; | |
414 | pa = wil_desc_addr(&d->dma.addr); | |
68ada71e | 415 | |
2be7d22f | 416 | dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE); |
68ada71e VK |
417 | dmalen = le16_to_cpu(d->dma.length); |
418 | ||
148416a9 VK |
419 | trace_wil6210_rx(i, d); |
420 | wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen); | |
a8313341 | 421 | wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, |
68ada71e | 422 | (const void *)d, sizeof(*d), false); |
2be7d22f | 423 | |
3b282bc6 VK |
424 | cid = wil_rxdesc_cid(d); |
425 | stats = &wil->sta[cid].stats; | |
426 | ||
33c477fd | 427 | if (unlikely(dmalen > sz)) { |
e270045b | 428 | wil_err(wil, "Rx size too large: %d bytes!\n", dmalen); |
3b282bc6 | 429 | stats->rx_large_frame++; |
110dea00 | 430 | kfree_skb(skb); |
3b282bc6 | 431 | goto again; |
e270045b | 432 | } |
7e594444 | 433 | skb_trim(skb, dmalen); |
33e61169 | 434 | |
1cbbcb08 VK |
435 | prefetch(skb->data); |
436 | ||
c0d37713 VK |
437 | wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, |
438 | skb->data, skb_headlen(skb), false); | |
439 | ||
c8b78b5f | 440 | stats->last_mcs_rx = wil_rxdesc_mcs(d); |
c4a110d8 VK |
441 | if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs)) |
442 | stats->rx_per_mcs[stats->last_mcs_rx]++; | |
2be7d22f VK |
443 | |
444 | /* use radiotap header only if required */ | |
445 | if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) | |
33e61169 | 446 | wil_rx_add_radiotap_header(wil, skb); |
2be7d22f | 447 | |
2be7d22f VK |
448 | /* no extra checks if in sniffer mode */ |
449 | if (ndev->type != ARPHRD_ETHER) | |
450 | return skb; | |
a8313341 | 451 | /* Non-data frames may be delivered through Rx DMA channel (ex: BAR) |
2be7d22f VK |
452 | * Driver should recognize it by frame type, that is found |
453 | * in Rx descriptor. If type is not data, it is 802.11 frame as is | |
454 | */ | |
68ada71e | 455 | ftype = wil_rxdesc_ftype(d) << 2; |
33c477fd | 456 | if (unlikely(ftype != IEEE80211_FTYPE_DATA)) { |
a8313341 VK |
457 | u8 fc1 = wil_rxdesc_fc1(d); |
458 | int mid = wil_rxdesc_mid(d); | |
459 | int tid = wil_rxdesc_tid(d); | |
460 | u16 seq = wil_rxdesc_seq(d); | |
461 | ||
462 | wil_dbg_txrx(wil, | |
463 | "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", | |
464 | fc1, mid, cid, tid, seq); | |
3b282bc6 | 465 | stats->rx_non_data_frame++; |
a8313341 VK |
466 | if (wil_is_back_req(fc1)) { |
467 | wil_dbg_txrx(wil, | |
468 | "BAR: MID %d CID %d TID %d Seq 0x%03x\n", | |
469 | mid, cid, tid, seq); | |
470 | wil_rx_bar(wil, cid, tid, seq); | |
471 | } else { | |
472 | /* print again all info. One can enable only this | |
473 | * without overhead for printing every Rx frame | |
474 | */ | |
475 | wil_dbg_txrx(wil, | |
476 | "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", | |
477 | fc1, mid, cid, tid, seq); | |
478 | wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, | |
479 | (const void *)d, sizeof(*d), false); | |
480 | wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, | |
481 | skb->data, skb_headlen(skb), false); | |
482 | } | |
2be7d22f | 483 | kfree_skb(skb); |
3b282bc6 | 484 | goto again; |
2be7d22f VK |
485 | } |
486 | ||
c406ea7c | 487 | if (unlikely(skb->len < ETH_HLEN + snaplen)) { |
2be7d22f | 488 | wil_err(wil, "Short frame, len = %d\n", skb->len); |
3b282bc6 | 489 | stats->rx_short_frame++; |
2be7d22f | 490 | kfree_skb(skb); |
3b282bc6 | 491 | goto again; |
2be7d22f VK |
492 | } |
493 | ||
504937d4 KE |
494 | /* L4 IDENT is on when HW calculated checksum, check status |
495 | * and in case of error drop the packet | |
496 | * higher stack layers will handle retransmission (if required) | |
497 | */ | |
33c477fd | 498 | if (likely(d->dma.status & RX_DMA_STATUS_L4I)) { |
504937d4 | 499 | /* L4 protocol identified, csum calculated */ |
33c477fd | 500 | if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)) |
504937d4 | 501 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
4a68ab10 VK |
502 | /* If HW reports bad checksum, let IP stack re-check it |
503 | * For example, HW don't understand Microsoft IP stack that | |
504 | * mis-calculates TCP checksum - if it should be 0x0, | |
505 | * it writes 0xffff in violation of RFC 1624 | |
506 | */ | |
504937d4 KE |
507 | } |
508 | ||
c406ea7c VK |
509 | if (snaplen) { |
510 | /* Packet layout | |
511 | * +-------+-------+---------+------------+------+ | |
512 | * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA | | |
513 | * +-------+-------+---------+------------+------+ | |
514 | * Need to remove SNAP, shifting SA and DA forward | |
515 | */ | |
516 | memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN); | |
517 | skb_pull(skb, snaplen); | |
518 | } | |
519 | ||
2be7d22f VK |
520 | return skb; |
521 | } | |
522 | ||
523 | /** | |
524 | * allocate and fill up to @count buffers in rx ring | |
525 | * buffers posted at @swtail | |
526 | */ | |
527 | static int wil_rx_refill(struct wil6210_priv *wil, int count) | |
528 | { | |
529 | struct net_device *ndev = wil_to_ndev(wil); | |
530 | struct vring *v = &wil->vring_rx; | |
531 | u32 next_tail; | |
532 | int rc = 0; | |
533 | int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ? | |
534 | WIL6210_RTAP_SIZE : 0; | |
535 | ||
536 | for (; next_tail = wil_vring_next_tail(v), | |
537 | (next_tail != v->swhead) && (count-- > 0); | |
538 | v->swtail = next_tail) { | |
539 | rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); | |
33c477fd | 540 | if (unlikely(rc)) { |
2be7d22f VK |
541 | wil_err(wil, "Error %d in wil_rx_refill[%d]\n", |
542 | rc, v->swtail); | |
543 | break; | |
544 | } | |
545 | } | |
b9eeb512 | 546 | wil_w(wil, v->hwtail, v->swtail); |
2be7d22f VK |
547 | |
548 | return rc; | |
549 | } | |
550 | ||
551 | /* | |
552 | * Pass Rx packet to the netif. Update statistics. | |
e0287c4a | 553 | * Called in softirq context (NAPI poll). |
2be7d22f | 554 | */ |
b4490f42 | 555 | void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev) |
2be7d22f | 556 | { |
c42da999 | 557 | gro_result_t rc = GRO_NORMAL; |
c8b78b5f | 558 | struct wil6210_priv *wil = ndev_to_wil(ndev); |
c42da999 | 559 | struct wireless_dev *wdev = wil_to_wdev(wil); |
2be7d22f | 560 | unsigned int len = skb->len; |
c8b78b5f | 561 | struct vring_rx_desc *d = wil_skb_rxdesc(skb); |
41d6b093 | 562 | int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */ |
c42da999 VK |
563 | struct ethhdr *eth = (void *)skb->data; |
564 | /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication | |
565 | * is not suitable, need to look at data | |
566 | */ | |
567 | int mcast = is_multicast_ether_addr(eth->h_dest); | |
c8b78b5f | 568 | struct wil_net_stats *stats = &wil->sta[cid].stats; |
c42da999 VK |
569 | struct sk_buff *xmit_skb = NULL; |
570 | static const char * const gro_res_str[] = { | |
571 | [GRO_MERGED] = "GRO_MERGED", | |
572 | [GRO_MERGED_FREE] = "GRO_MERGED_FREE", | |
573 | [GRO_HELD] = "GRO_HELD", | |
574 | [GRO_NORMAL] = "GRO_NORMAL", | |
575 | [GRO_DROP] = "GRO_DROP", | |
576 | }; | |
2be7d22f | 577 | |
0553640d VS |
578 | if (ndev->features & NETIF_F_RXHASH) |
579 | /* fake L4 to ensure it won't be re-calculated later | |
580 | * set hash to any non-zero value to activate rps | |
581 | * mechanism, core will be chosen according | |
582 | * to user-level rps configuration. | |
583 | */ | |
584 | skb_set_hash(skb, 1, PKT_HASH_TYPE_L4); | |
585 | ||
241804cb VK |
586 | skb_orphan(skb); |
587 | ||
02beaf1a | 588 | if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) { |
c42da999 VK |
589 | if (mcast) { |
590 | /* send multicast frames both to higher layers in | |
591 | * local net stack and back to the wireless medium | |
592 | */ | |
593 | xmit_skb = skb_copy(skb, GFP_ATOMIC); | |
594 | } else { | |
595 | int xmit_cid = wil_find_cid(wil, eth->h_dest); | |
596 | ||
597 | if (xmit_cid >= 0) { | |
598 | /* The destination station is associated to | |
599 | * this AP (in this VLAN), so send the frame | |
600 | * directly to it and do not pass it to local | |
601 | * net stack. | |
602 | */ | |
603 | xmit_skb = skb; | |
604 | skb = NULL; | |
605 | } | |
606 | } | |
607 | } | |
608 | if (xmit_skb) { | |
609 | /* Send to wireless media and increase priority by 256 to | |
610 | * keep the received priority instead of reclassifying | |
611 | * the frame (see cfg80211_classify8021d). | |
612 | */ | |
613 | xmit_skb->dev = ndev; | |
614 | xmit_skb->priority += 256; | |
615 | xmit_skb->protocol = htons(ETH_P_802_3); | |
616 | skb_reset_network_header(xmit_skb); | |
617 | skb_reset_mac_header(xmit_skb); | |
618 | wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len); | |
619 | dev_queue_xmit(xmit_skb); | |
620 | } | |
2be7d22f | 621 | |
c42da999 VK |
622 | if (skb) { /* deliver to local stack */ |
623 | ||
624 | skb->protocol = eth_type_trans(skb, ndev); | |
625 | rc = napi_gro_receive(&wil->napi_rx, skb); | |
626 | wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n", | |
627 | len, gro_res_str[rc]); | |
628 | } | |
629 | /* statistics. rc set to GRO_NORMAL for AP bridging */ | |
b5998e6a VK |
630 | if (unlikely(rc == GRO_DROP)) { |
631 | ndev->stats.rx_dropped++; | |
632 | stats->rx_dropped++; | |
633 | wil_dbg_txrx(wil, "Rx drop %d bytes\n", len); | |
634 | } else { | |
2be7d22f | 635 | ndev->stats.rx_packets++; |
c8b78b5f | 636 | stats->rx_packets++; |
2be7d22f | 637 | ndev->stats.rx_bytes += len; |
c8b78b5f | 638 | stats->rx_bytes += len; |
c42da999 VK |
639 | if (mcast) |
640 | ndev->stats.multicast++; | |
194b482b | 641 | } |
2be7d22f VK |
642 | } |
643 | ||
644 | /** | |
645 | * Proceed all completed skb's from Rx VRING | |
646 | * | |
e0287c4a | 647 | * Safe to call from NAPI poll, i.e. softirq with interrupts enabled |
2be7d22f | 648 | */ |
e0287c4a | 649 | void wil_rx_handle(struct wil6210_priv *wil, int *quota) |
2be7d22f VK |
650 | { |
651 | struct net_device *ndev = wil_to_ndev(wil); | |
652 | struct vring *v = &wil->vring_rx; | |
653 | struct sk_buff *skb; | |
654 | ||
33c477fd | 655 | if (unlikely(!v->va)) { |
2be7d22f VK |
656 | wil_err(wil, "Rx IRQ while Rx not yet initialized\n"); |
657 | return; | |
658 | } | |
7743882d | 659 | wil_dbg_txrx(wil, "%s()\n", __func__); |
e0287c4a VK |
660 | while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { |
661 | (*quota)--; | |
2be7d22f | 662 | |
2be7d22f VK |
663 | if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) { |
664 | skb->dev = ndev; | |
665 | skb_reset_mac_header(skb); | |
666 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
667 | skb->pkt_type = PACKET_OTHERHOST; | |
668 | skb->protocol = htons(ETH_P_802_2); | |
b4490f42 | 669 | wil_netif_rx_any(skb, ndev); |
2be7d22f | 670 | } else { |
e4373d8e | 671 | wil_rx_reorder(wil, skb); |
2be7d22f | 672 | } |
2be7d22f VK |
673 | } |
674 | wil_rx_refill(wil, v->size); | |
675 | } | |
676 | ||
d3762b40 | 677 | int wil_rx_init(struct wil6210_priv *wil, u16 size) |
2be7d22f | 678 | { |
2be7d22f VK |
679 | struct vring *vring = &wil->vring_rx; |
680 | int rc; | |
2be7d22f | 681 | |
9cf10d62 VK |
682 | wil_dbg_misc(wil, "%s()\n", __func__); |
683 | ||
8bf6adb9 VK |
684 | if (vring->va) { |
685 | wil_err(wil, "Rx ring already allocated\n"); | |
686 | return -EINVAL; | |
687 | } | |
688 | ||
d3762b40 | 689 | vring->size = size; |
2be7d22f VK |
690 | rc = wil_vring_alloc(wil, vring); |
691 | if (rc) | |
692 | return rc; | |
693 | ||
47e19af9 | 694 | rc = wmi_rx_chain_add(wil, vring); |
2be7d22f VK |
695 | if (rc) |
696 | goto err_free; | |
697 | ||
2be7d22f VK |
698 | rc = wil_rx_refill(wil, vring->size); |
699 | if (rc) | |
700 | goto err_free; | |
701 | ||
702 | return 0; | |
703 | err_free: | |
704 | wil_vring_free(wil, vring, 0); | |
705 | ||
706 | return rc; | |
707 | } | |
708 | ||
709 | void wil_rx_fini(struct wil6210_priv *wil) | |
710 | { | |
711 | struct vring *vring = &wil->vring_rx; | |
712 | ||
9cf10d62 VK |
713 | wil_dbg_misc(wil, "%s()\n", __func__); |
714 | ||
2acb4220 | 715 | if (vring->va) |
2be7d22f | 716 | wil_vring_free(wil, vring, 0); |
2be7d22f VK |
717 | } |
718 | ||
719 | int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, | |
720 | int cid, int tid) | |
721 | { | |
722 | int rc; | |
723 | struct wmi_vring_cfg_cmd cmd = { | |
724 | .action = cpu_to_le32(WMI_VRING_CMD_ADD), | |
725 | .vring_cfg = { | |
726 | .tx_sw_ring = { | |
9a06bec9 | 727 | .max_mpdu_size = |
c44690a1 | 728 | cpu_to_le16(wil_mtu2macbuf(mtu_max)), |
b5d98e9d | 729 | .ring_size = cpu_to_le16(size), |
2be7d22f VK |
730 | }, |
731 | .ringid = id, | |
a70abea5 | 732 | .cidxtid = mk_cidxtid(cid, tid), |
2be7d22f VK |
733 | .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, |
734 | .mac_ctrl = 0, | |
735 | .to_resolution = 0, | |
3277213f | 736 | .agg_max_wsize = 0, |
2be7d22f VK |
737 | .schd_params = { |
738 | .priority = cpu_to_le16(0), | |
739 | .timeslot_us = cpu_to_le16(0xfff), | |
740 | }, | |
741 | }, | |
742 | }; | |
743 | struct { | |
744 | struct wil6210_mbox_hdr_wmi wmi; | |
745 | struct wmi_vring_cfg_done_event cmd; | |
746 | } __packed reply; | |
747 | struct vring *vring = &wil->vring_tx[id]; | |
097638a0 | 748 | struct vring_tx_data *txdata = &wil->vring_tx_data[id]; |
2be7d22f | 749 | |
e0106ada VK |
750 | wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, |
751 | cmd.vring_cfg.tx_sw_ring.max_mpdu_size); | |
9cf10d62 | 752 | |
2be7d22f VK |
753 | if (vring->va) { |
754 | wil_err(wil, "Tx ring [%d] already allocated\n", id); | |
755 | rc = -EINVAL; | |
756 | goto out; | |
757 | } | |
758 | ||
097638a0 | 759 | memset(txdata, 0, sizeof(*txdata)); |
5933a06d | 760 | spin_lock_init(&txdata->lock); |
2be7d22f VK |
761 | vring->size = size; |
762 | rc = wil_vring_alloc(wil, vring); | |
763 | if (rc) | |
764 | goto out; | |
765 | ||
93ae6d49 VK |
766 | wil->vring2cid_tid[id][0] = cid; |
767 | wil->vring2cid_tid[id][1] = tid; | |
768 | ||
2be7d22f | 769 | cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); |
2be7d22f | 770 | |
230d8442 VK |
771 | if (!wil->privacy) |
772 | txdata->dot1x_open = true; | |
2be7d22f VK |
773 | rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd), |
774 | WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); | |
775 | if (rc) | |
776 | goto out_free; | |
777 | ||
b8023177 | 778 | if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { |
2be7d22f VK |
779 | wil_err(wil, "Tx config failed, status 0x%02x\n", |
780 | reply.cmd.status); | |
c331997b | 781 | rc = -EINVAL; |
2be7d22f VK |
782 | goto out_free; |
783 | } | |
784 | vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); | |
785 | ||
097638a0 | 786 | txdata->enabled = 1; |
230d8442 | 787 | if (txdata->dot1x_open && (agg_wsize >= 0)) |
3a3def8d | 788 | wil_addba_tx_request(wil, id, agg_wsize); |
097638a0 | 789 | |
2be7d22f VK |
790 | return 0; |
791 | out_free: | |
230d8442 VK |
792 | txdata->dot1x_open = false; |
793 | txdata->enabled = 0; | |
2be7d22f VK |
794 | wil_vring_free(wil, vring, 1); |
795 | out: | |
796 | ||
797 | return rc; | |
798 | } | |
799 | ||
41d6b093 VK |
800 | int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size) |
801 | { | |
802 | int rc; | |
803 | struct wmi_bcast_vring_cfg_cmd cmd = { | |
804 | .action = cpu_to_le32(WMI_VRING_CMD_ADD), | |
805 | .vring_cfg = { | |
806 | .tx_sw_ring = { | |
807 | .max_mpdu_size = | |
808 | cpu_to_le16(wil_mtu2macbuf(mtu_max)), | |
809 | .ring_size = cpu_to_le16(size), | |
810 | }, | |
811 | .ringid = id, | |
812 | .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, | |
813 | }, | |
814 | }; | |
815 | struct { | |
816 | struct wil6210_mbox_hdr_wmi wmi; | |
817 | struct wmi_vring_cfg_done_event cmd; | |
818 | } __packed reply; | |
819 | struct vring *vring = &wil->vring_tx[id]; | |
820 | struct vring_tx_data *txdata = &wil->vring_tx_data[id]; | |
821 | ||
822 | wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, | |
823 | cmd.vring_cfg.tx_sw_ring.max_mpdu_size); | |
824 | ||
825 | if (vring->va) { | |
826 | wil_err(wil, "Tx ring [%d] already allocated\n", id); | |
827 | rc = -EINVAL; | |
828 | goto out; | |
829 | } | |
830 | ||
831 | memset(txdata, 0, sizeof(*txdata)); | |
832 | spin_lock_init(&txdata->lock); | |
833 | vring->size = size; | |
834 | rc = wil_vring_alloc(wil, vring); | |
835 | if (rc) | |
836 | goto out; | |
837 | ||
838 | wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */ | |
839 | wil->vring2cid_tid[id][1] = 0; /* TID */ | |
840 | ||
841 | cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); | |
842 | ||
230d8442 VK |
843 | if (!wil->privacy) |
844 | txdata->dot1x_open = true; | |
41d6b093 VK |
845 | rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd), |
846 | WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); | |
847 | if (rc) | |
848 | goto out_free; | |
849 | ||
850 | if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { | |
851 | wil_err(wil, "Tx config failed, status 0x%02x\n", | |
852 | reply.cmd.status); | |
853 | rc = -EINVAL; | |
854 | goto out_free; | |
855 | } | |
856 | vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); | |
857 | ||
858 | txdata->enabled = 1; | |
859 | ||
860 | return 0; | |
861 | out_free: | |
230d8442 VK |
862 | txdata->enabled = 0; |
863 | txdata->dot1x_open = false; | |
41d6b093 VK |
864 | wil_vring_free(wil, vring, 1); |
865 | out: | |
866 | ||
867 | return rc; | |
868 | } | |
869 | ||
2be7d22f VK |
870 | void wil_vring_fini_tx(struct wil6210_priv *wil, int id) |
871 | { | |
872 | struct vring *vring = &wil->vring_tx[id]; | |
3a124ed6 | 873 | struct vring_tx_data *txdata = &wil->vring_tx_data[id]; |
2be7d22f | 874 | |
097638a0 VK |
875 | WARN_ON(!mutex_is_locked(&wil->mutex)); |
876 | ||
2be7d22f VK |
877 | if (!vring->va) |
878 | return; | |
879 | ||
9cf10d62 VK |
880 | wil_dbg_misc(wil, "%s() id=%d\n", __func__, id); |
881 | ||
5933a06d | 882 | spin_lock_bh(&txdata->lock); |
230d8442 | 883 | txdata->dot1x_open = false; |
5933a06d VK |
884 | txdata->enabled = 0; /* no Tx can be in progress or start anew */ |
885 | spin_unlock_bh(&txdata->lock); | |
097638a0 | 886 | /* make sure NAPI won't touch this vring */ |
9419b6a2 | 887 | if (test_bit(wil_status_napi_en, wil->status)) |
097638a0 VK |
888 | napi_synchronize(&wil->napi_tx); |
889 | ||
2be7d22f | 890 | wil_vring_free(wil, vring, 1); |
3a124ed6 | 891 | memset(txdata, 0, sizeof(*txdata)); |
2be7d22f VK |
892 | } |
893 | ||
41d6b093 | 894 | static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil, |
2be7d22f VK |
895 | struct sk_buff *skb) |
896 | { | |
3df2cd36 VK |
897 | int i; |
898 | struct ethhdr *eth = (void *)skb->data; | |
899 | int cid = wil_find_cid(wil, eth->h_dest); | |
900 | ||
901 | if (cid < 0) | |
902 | return NULL; | |
2be7d22f | 903 | |
3df2cd36 VK |
904 | /* TODO: fix for multiple TID */ |
905 | for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) { | |
230d8442 VK |
906 | if (!wil->vring_tx_data[i].dot1x_open && |
907 | (skb->protocol != cpu_to_be16(ETH_P_PAE))) | |
908 | continue; | |
3df2cd36 VK |
909 | if (wil->vring2cid_tid[i][0] == cid) { |
910 | struct vring *v = &wil->vring_tx[i]; | |
8fe59627 | 911 | |
3df2cd36 VK |
912 | wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n", |
913 | __func__, eth->h_dest, i); | |
914 | if (v->va) { | |
915 | return v; | |
916 | } else { | |
917 | wil_dbg_txrx(wil, "vring[%d] not valid\n", i); | |
918 | return NULL; | |
919 | } | |
920 | } | |
921 | } | |
2be7d22f VK |
922 | |
923 | return NULL; | |
924 | } | |
925 | ||
fb3cac57 VK |
926 | static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, |
927 | struct sk_buff *skb); | |
54ed90a8 VK |
928 | |
929 | static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil, | |
930 | struct sk_buff *skb) | |
931 | { | |
932 | struct vring *v; | |
933 | int i; | |
934 | u8 cid; | |
935 | ||
936 | /* In the STA mode, it is expected to have only 1 VRING | |
937 | * for the AP we connected to. | |
230d8442 | 938 | * find 1-st vring eligible for this skb and use it. |
54ed90a8 VK |
939 | */ |
940 | for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { | |
941 | v = &wil->vring_tx[i]; | |
942 | if (!v->va) | |
943 | continue; | |
944 | ||
945 | cid = wil->vring2cid_tid[i][0]; | |
41d6b093 VK |
946 | if (cid >= WIL6210_MAX_CID) /* skip BCAST */ |
947 | continue; | |
948 | ||
230d8442 | 949 | if (!wil->vring_tx_data[i].dot1x_open && |
54ed90a8 | 950 | (skb->protocol != cpu_to_be16(ETH_P_PAE))) |
230d8442 | 951 | continue; |
54ed90a8 VK |
952 | |
953 | wil_dbg_txrx(wil, "Tx -> ring %d\n", i); | |
954 | ||
955 | return v; | |
956 | } | |
957 | ||
958 | wil_dbg_txrx(wil, "Tx while no vrings active?\n"); | |
959 | ||
960 | return NULL; | |
961 | } | |
962 | ||
70812421 VK |
963 | /* Use one of 2 strategies: |
964 | * | |
965 | * 1. New (real broadcast): | |
966 | * use dedicated broadcast vring | |
967 | * 2. Old (pseudo-DMS): | |
968 | * Find 1-st vring and return it; | |
969 | * duplicate skb and send it to other active vrings; | |
970 | * in all cases override dest address to unicast peer's address | |
971 | * Use old strategy when new is not supported yet: | |
972 | * - for PBSS | |
70812421 VK |
973 | */ |
974 | static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil, | |
975 | struct sk_buff *skb) | |
fb3cac57 | 976 | { |
41d6b093 VK |
977 | struct vring *v; |
978 | int i = wil->bcast_vring; | |
e58c9f70 | 979 | |
41d6b093 VK |
980 | if (i < 0) |
981 | return NULL; | |
982 | v = &wil->vring_tx[i]; | |
983 | if (!v->va) | |
984 | return NULL; | |
230d8442 VK |
985 | if (!wil->vring_tx_data[i].dot1x_open && |
986 | (skb->protocol != cpu_to_be16(ETH_P_PAE))) | |
987 | return NULL; | |
fb3cac57 VK |
988 | |
989 | return v; | |
990 | } | |
991 | ||
70812421 VK |
992 | static void wil_set_da_for_vring(struct wil6210_priv *wil, |
993 | struct sk_buff *skb, int vring_index) | |
994 | { | |
995 | struct ethhdr *eth = (void *)skb->data; | |
996 | int cid = wil->vring2cid_tid[vring_index][0]; | |
997 | ||
998 | ether_addr_copy(eth->h_dest, wil->sta[cid].addr); | |
999 | } | |
1000 | ||
1001 | static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil, | |
1002 | struct sk_buff *skb) | |
1003 | { | |
1004 | struct vring *v, *v2; | |
1005 | struct sk_buff *skb2; | |
1006 | int i; | |
1007 | u8 cid; | |
1008 | struct ethhdr *eth = (void *)skb->data; | |
1009 | char *src = eth->h_source; | |
1010 | ||
1011 | /* find 1-st vring eligible for data */ | |
1012 | for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { | |
1013 | v = &wil->vring_tx[i]; | |
1014 | if (!v->va) | |
1015 | continue; | |
1016 | ||
1017 | cid = wil->vring2cid_tid[i][0]; | |
1018 | if (cid >= WIL6210_MAX_CID) /* skip BCAST */ | |
1019 | continue; | |
230d8442 VK |
1020 | if (!wil->vring_tx_data[i].dot1x_open && |
1021 | (skb->protocol != cpu_to_be16(ETH_P_PAE))) | |
70812421 VK |
1022 | continue; |
1023 | ||
1024 | /* don't Tx back to source when re-routing Rx->Tx at the AP */ | |
1025 | if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) | |
1026 | continue; | |
1027 | ||
1028 | goto found; | |
1029 | } | |
1030 | ||
1031 | wil_dbg_txrx(wil, "Tx while no vrings active?\n"); | |
1032 | ||
1033 | return NULL; | |
1034 | ||
1035 | found: | |
1036 | wil_dbg_txrx(wil, "BCAST -> ring %d\n", i); | |
1037 | wil_set_da_for_vring(wil, skb, i); | |
1038 | ||
1039 | /* find other active vrings and duplicate skb for each */ | |
1040 | for (i++; i < WIL6210_MAX_TX_RINGS; i++) { | |
1041 | v2 = &wil->vring_tx[i]; | |
1042 | if (!v2->va) | |
1043 | continue; | |
1044 | cid = wil->vring2cid_tid[i][0]; | |
1045 | if (cid >= WIL6210_MAX_CID) /* skip BCAST */ | |
1046 | continue; | |
230d8442 VK |
1047 | if (!wil->vring_tx_data[i].dot1x_open && |
1048 | (skb->protocol != cpu_to_be16(ETH_P_PAE))) | |
70812421 VK |
1049 | continue; |
1050 | ||
1051 | if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) | |
1052 | continue; | |
1053 | ||
1054 | skb2 = skb_copy(skb, GFP_ATOMIC); | |
1055 | if (skb2) { | |
1056 | wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i); | |
1057 | wil_set_da_for_vring(wil, skb2, i); | |
1058 | wil_tx_vring(wil, v2, skb2); | |
1059 | } else { | |
1060 | wil_err(wil, "skb_copy failed\n"); | |
1061 | } | |
1062 | } | |
1063 | ||
1064 | return v; | |
1065 | } | |
1066 | ||
1067 | static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil, | |
1068 | struct sk_buff *skb) | |
1069 | { | |
1070 | struct wireless_dev *wdev = wil->wdev; | |
1071 | ||
1072 | if (wdev->iftype != NL80211_IFTYPE_AP) | |
1073 | return wil_find_tx_bcast_2(wil, skb); | |
1074 | ||
70812421 VK |
1075 | return wil_find_tx_bcast_1(wil, skb); |
1076 | } | |
1077 | ||
99b55bd2 KE |
1078 | static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len, |
1079 | int vring_index) | |
2be7d22f | 1080 | { |
68ada71e | 1081 | wil_desc_addr_set(&d->dma.addr, pa); |
2be7d22f VK |
1082 | d->dma.ip_length = 0; |
1083 | /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/ | |
1084 | d->dma.b11 = 0/*14 | BIT(7)*/; | |
1085 | d->dma.error = 0; | |
1086 | d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ | |
7e594444 | 1087 | d->dma.length = cpu_to_le16((u16)len); |
99b55bd2 | 1088 | d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS); |
2be7d22f VK |
1089 | d->mac.d[0] = 0; |
1090 | d->mac.d[1] = 0; | |
1091 | d->mac.d[2] = 0; | |
1092 | d->mac.ucode_cmd = 0; | |
2be7d22f VK |
1093 | /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */ |
1094 | d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) | | |
1095 | (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS); | |
1096 | ||
1097 | return 0; | |
1098 | } | |
1099 | ||
c236658f VK |
1100 | static inline |
1101 | void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags) | |
1102 | { | |
3d4bde15 | 1103 | d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS); |
c236658f VK |
1104 | } |
1105 | ||
3d4bde15 VK |
1106 | /** |
1107 | * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding | |
1108 | * @skb is used to obtain the protocol and headers length. | |
1109 | * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data, | |
1110 | * 2 - middle, 3 - last descriptor. | |
1111 | */ | |
1112 | ||
1113 | static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d, | |
1114 | struct sk_buff *skb, | |
1115 | int tso_desc_type, bool is_ipv4, | |
1116 | int tcp_hdr_len, int skb_net_hdr_len) | |
504937d4 | 1117 | { |
3d4bde15 VK |
1118 | d->dma.b11 = ETH_HLEN; /* MAC header length */ |
1119 | d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; | |
1120 | ||
1121 | d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); | |
1122 | /* L4 header len: TCP header length */ | |
1123 | d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); | |
1124 | ||
1125 | /* Setup TSO: bit and desc type */ | |
1126 | d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) | | |
1127 | (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS); | |
1128 | d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS); | |
1129 | ||
1130 | d->dma.ip_length = skb_net_hdr_len; | |
1131 | /* Enable TCP/UDP checksum */ | |
1132 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); | |
1133 | /* Calculate pseudo-header */ | |
1134 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); | |
1135 | } | |
1136 | ||
1137 | /** | |
1138 | * Sets the descriptor @d up for csum. The corresponding | |
1139 | * @skb is used to obtain the protocol and headers length. | |
1140 | * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6. | |
1141 | * Note, if d==NULL, the function only returns the protocol result. | |
1142 | * | |
1143 | * It is very similar to previous wil_tx_desc_offload_setup_tso. This | |
1144 | * is "if unrolling" to optimize the critical path. | |
1145 | */ | |
1146 | ||
1147 | static int wil_tx_desc_offload_setup(struct vring_tx_desc *d, | |
1148 | struct sk_buff *skb){ | |
504937d4 KE |
1149 | int protocol; |
1150 | ||
1151 | if (skb->ip_summed != CHECKSUM_PARTIAL) | |
1152 | return 0; | |
1153 | ||
df2d08ee VK |
1154 | d->dma.b11 = ETH_HLEN; /* MAC header length */ |
1155 | ||
504937d4 KE |
1156 | switch (skb->protocol) { |
1157 | case cpu_to_be16(ETH_P_IP): | |
1158 | protocol = ip_hdr(skb)->protocol; | |
df2d08ee | 1159 | d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); |
504937d4 KE |
1160 | break; |
1161 | case cpu_to_be16(ETH_P_IPV6): | |
1162 | protocol = ipv6_hdr(skb)->nexthdr; | |
1163 | break; | |
1164 | default: | |
1165 | return -EINVAL; | |
1166 | } | |
1167 | ||
1168 | switch (protocol) { | |
1169 | case IPPROTO_TCP: | |
1170 | d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); | |
1171 | /* L4 header len: TCP header length */ | |
1172 | d->dma.d0 |= | |
1173 | (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); | |
1174 | break; | |
1175 | case IPPROTO_UDP: | |
1176 | /* L4 header len: UDP header length */ | |
1177 | d->dma.d0 |= | |
1178 | (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); | |
1179 | break; | |
1180 | default: | |
1181 | return -EINVAL; | |
1182 | } | |
1183 | ||
1184 | d->dma.ip_length = skb_network_header_len(skb); | |
504937d4 KE |
1185 | /* Enable TCP/UDP checksum */ |
1186 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); | |
1187 | /* Calculate pseudo-header */ | |
1188 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); | |
1189 | ||
1190 | return 0; | |
1191 | } | |
1192 | ||
3d4bde15 VK |
1193 | static inline void wil_tx_last_desc(struct vring_tx_desc *d) |
1194 | { | |
1195 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) | | |
1196 | BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) | | |
1197 | BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); | |
1198 | } | |
1199 | ||
1200 | static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d) | |
1201 | { | |
1202 | d->dma.d0 |= wil_tso_type_lst << | |
1203 | DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS; | |
1204 | } | |
1205 | ||
1206 | static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring, | |
1207 | struct sk_buff *skb) | |
1208 | { | |
1209 | struct device *dev = wil_to_dev(wil); | |
1210 | ||
1211 | /* point to descriptors in shared memory */ | |
1212 | volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc, | |
1213 | *_first_desc = NULL; | |
1214 | ||
1215 | /* pointers to shadow descriptors */ | |
1216 | struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem, | |
1217 | *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem, | |
1218 | *first_desc = &first_desc_mem; | |
1219 | ||
1220 | /* pointer to shadow descriptors' context */ | |
1221 | struct wil_ctx *hdr_ctx, *first_ctx = NULL; | |
1222 | ||
1223 | int descs_used = 0; /* total number of used descriptors */ | |
1224 | int sg_desc_cnt = 0; /* number of descriptors for current mss*/ | |
1225 | ||
1226 | u32 swhead = vring->swhead; | |
1227 | int used, avail = wil_vring_avail_tx(vring); | |
1228 | int nr_frags = skb_shinfo(skb)->nr_frags; | |
1229 | int min_desc_required = nr_frags + 1; | |
1230 | int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */ | |
1231 | int f, len, hdrlen, headlen; | |
1232 | int vring_index = vring - wil->vring_tx; | |
1233 | struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; | |
1234 | uint i = swhead; | |
1235 | dma_addr_t pa; | |
1236 | const skb_frag_t *frag = NULL; | |
1237 | int rem_data = mss; | |
1238 | int lenmss; | |
1239 | int hdr_compensation_need = true; | |
1240 | int desc_tso_type = wil_tso_type_first; | |
1241 | bool is_ipv4; | |
1242 | int tcp_hdr_len; | |
1243 | int skb_net_hdr_len; | |
1244 | int gso_type; | |
e3d2ed94 | 1245 | int rc = -EINVAL; |
3d4bde15 VK |
1246 | |
1247 | wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", | |
1248 | __func__, skb->len, vring_index); | |
1249 | ||
1250 | if (unlikely(!txdata->enabled)) | |
1251 | return -EINVAL; | |
1252 | ||
1253 | /* A typical page 4K is 3-4 payloads, we assume each fragment | |
1254 | * is a full payload, that's how min_desc_required has been | |
1255 | * calculated. In real we might need more or less descriptors, | |
1256 | * this is the initial check only. | |
1257 | */ | |
1258 | if (unlikely(avail < min_desc_required)) { | |
1259 | wil_err_ratelimited(wil, | |
1260 | "TSO: Tx ring[%2d] full. No space for %d fragments\n", | |
1261 | vring_index, min_desc_required); | |
1262 | return -ENOMEM; | |
1263 | } | |
1264 | ||
1265 | /* Header Length = MAC header len + IP header len + TCP header len*/ | |
1266 | hdrlen = ETH_HLEN + | |
1267 | (int)skb_network_header_len(skb) + | |
1268 | tcp_hdrlen(skb); | |
1269 | ||
1270 | gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4); | |
1271 | switch (gso_type) { | |
1272 | case SKB_GSO_TCPV4: | |
1273 | /* TCP v4, zero out the IP length and IPv4 checksum fields | |
1274 | * as required by the offloading doc | |
1275 | */ | |
1276 | ip_hdr(skb)->tot_len = 0; | |
1277 | ip_hdr(skb)->check = 0; | |
1278 | is_ipv4 = true; | |
1279 | break; | |
1280 | case SKB_GSO_TCPV6: | |
1281 | /* TCP v6, zero out the payload length */ | |
1282 | ipv6_hdr(skb)->payload_len = 0; | |
1283 | is_ipv4 = false; | |
1284 | break; | |
1285 | default: | |
1286 | /* other than TCPv4 or TCPv6 types are not supported for TSO. | |
1287 | * It is also illegal for both to be set simultaneously | |
1288 | */ | |
1289 | return -EINVAL; | |
1290 | } | |
1291 | ||
1292 | if (skb->ip_summed != CHECKSUM_PARTIAL) | |
1293 | return -EINVAL; | |
1294 | ||
1295 | /* tcp header length and skb network header length are fixed for all | |
1296 | * packet's descriptors - read then once here | |
1297 | */ | |
1298 | tcp_hdr_len = tcp_hdrlen(skb); | |
1299 | skb_net_hdr_len = skb_network_header_len(skb); | |
1300 | ||
1301 | _hdr_desc = &vring->va[i].tx; | |
1302 | ||
1303 | pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE); | |
1304 | if (unlikely(dma_mapping_error(dev, pa))) { | |
1305 | wil_err(wil, "TSO: Skb head DMA map error\n"); | |
1306 | goto err_exit; | |
1307 | } | |
1308 | ||
1309 | wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index); | |
1310 | wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4, | |
1311 | tcp_hdr_len, skb_net_hdr_len); | |
1312 | wil_tx_last_desc(hdr_desc); | |
1313 | ||
1314 | vring->ctx[i].mapped_as = wil_mapped_as_single; | |
1315 | hdr_ctx = &vring->ctx[i]; | |
1316 | ||
1317 | descs_used++; | |
1318 | headlen = skb_headlen(skb) - hdrlen; | |
1319 | ||
1320 | for (f = headlen ? -1 : 0; f < nr_frags; f++) { | |
1321 | if (headlen) { | |
1322 | len = headlen; | |
1323 | wil_dbg_txrx(wil, "TSO: process skb head, len %u\n", | |
1324 | len); | |
1325 | } else { | |
1326 | frag = &skb_shinfo(skb)->frags[f]; | |
1327 | len = frag->size; | |
1328 | wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len); | |
1329 | } | |
1330 | ||
1331 | while (len) { | |
1332 | wil_dbg_txrx(wil, | |
1333 | "TSO: len %d, rem_data %d, descs_used %d\n", | |
1334 | len, rem_data, descs_used); | |
1335 | ||
1336 | if (descs_used == avail) { | |
e3d2ed94 HK |
1337 | wil_err_ratelimited(wil, "TSO: ring overflow\n"); |
1338 | rc = -ENOMEM; | |
1339 | goto mem_error; | |
3d4bde15 VK |
1340 | } |
1341 | ||
1342 | lenmss = min_t(int, rem_data, len); | |
1343 | i = (swhead + descs_used) % vring->size; | |
1344 | wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i); | |
1345 | ||
1346 | if (!headlen) { | |
1347 | pa = skb_frag_dma_map(dev, frag, | |
1348 | frag->size - len, lenmss, | |
1349 | DMA_TO_DEVICE); | |
1350 | vring->ctx[i].mapped_as = wil_mapped_as_page; | |
1351 | } else { | |
1352 | pa = dma_map_single(dev, | |
1353 | skb->data + | |
1354 | skb_headlen(skb) - headlen, | |
1355 | lenmss, | |
1356 | DMA_TO_DEVICE); | |
1357 | vring->ctx[i].mapped_as = wil_mapped_as_single; | |
1358 | headlen -= lenmss; | |
1359 | } | |
1360 | ||
e3d2ed94 HK |
1361 | if (unlikely(dma_mapping_error(dev, pa))) { |
1362 | wil_err(wil, "TSO: DMA map page error\n"); | |
1363 | goto mem_error; | |
1364 | } | |
3d4bde15 VK |
1365 | |
1366 | _desc = &vring->va[i].tx; | |
1367 | ||
1368 | if (!_first_desc) { | |
1369 | _first_desc = _desc; | |
1370 | first_ctx = &vring->ctx[i]; | |
1371 | d = first_desc; | |
1372 | } else { | |
1373 | d = &desc_mem; | |
1374 | } | |
1375 | ||
1376 | wil_tx_desc_map(d, pa, lenmss, vring_index); | |
1377 | wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type, | |
1378 | is_ipv4, tcp_hdr_len, | |
1379 | skb_net_hdr_len); | |
1380 | ||
1381 | /* use tso_type_first only once */ | |
1382 | desc_tso_type = wil_tso_type_mid; | |
1383 | ||
1384 | descs_used++; /* desc used so far */ | |
1385 | sg_desc_cnt++; /* desc used for this segment */ | |
1386 | len -= lenmss; | |
1387 | rem_data -= lenmss; | |
1388 | ||
1389 | wil_dbg_txrx(wil, | |
1390 | "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n", | |
1391 | len, rem_data, descs_used, sg_desc_cnt); | |
1392 | ||
1393 | /* Close the segment if reached mss size or last frag*/ | |
1394 | if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) { | |
1395 | if (hdr_compensation_need) { | |
1396 | /* first segment include hdr desc for | |
1397 | * release | |
1398 | */ | |
1399 | hdr_ctx->nr_frags = sg_desc_cnt; | |
1400 | wil_tx_desc_set_nr_frags(first_desc, | |
1401 | sg_desc_cnt + | |
1402 | 1); | |
1403 | hdr_compensation_need = false; | |
1404 | } else { | |
1405 | wil_tx_desc_set_nr_frags(first_desc, | |
1406 | sg_desc_cnt); | |
1407 | } | |
1408 | first_ctx->nr_frags = sg_desc_cnt - 1; | |
1409 | ||
1410 | wil_tx_last_desc(d); | |
1411 | ||
1412 | /* first descriptor may also be the last | |
1413 | * for this mss - make sure not to copy | |
1414 | * it twice | |
1415 | */ | |
1416 | if (first_desc != d) | |
1417 | *_first_desc = *first_desc; | |
1418 | ||
1419 | /*last descriptor will be copied at the end | |
1420 | * of this TS processing | |
1421 | */ | |
1422 | if (f < nr_frags - 1 || len > 0) | |
1423 | *_desc = *d; | |
1424 | ||
1425 | rem_data = mss; | |
1426 | _first_desc = NULL; | |
1427 | sg_desc_cnt = 0; | |
1428 | } else if (first_desc != d) /* update mid descriptor */ | |
1429 | *_desc = *d; | |
1430 | } | |
1431 | } | |
1432 | ||
1433 | /* first descriptor may also be the last. | |
1434 | * in this case d pointer is invalid | |
1435 | */ | |
1436 | if (_first_desc == _desc) | |
1437 | d = first_desc; | |
1438 | ||
1439 | /* Last data descriptor */ | |
1440 | wil_set_tx_desc_last_tso(d); | |
1441 | *_desc = *d; | |
1442 | ||
1443 | /* Fill the total number of descriptors in first desc (hdr)*/ | |
1444 | wil_tx_desc_set_nr_frags(hdr_desc, descs_used); | |
1445 | *_hdr_desc = *hdr_desc; | |
1446 | ||
1447 | /* hold reference to skb | |
1448 | * to prevent skb release before accounting | |
1449 | * in case of immediate "tx done" | |
1450 | */ | |
1451 | vring->ctx[i].skb = skb_get(skb); | |
1452 | ||
1453 | /* performance monitoring */ | |
1454 | used = wil_vring_used_tx(vring); | |
1455 | if (wil_val_in_range(vring_idle_trsh, | |
1456 | used, used + descs_used)) { | |
1457 | txdata->idle += get_cycles() - txdata->last_idle; | |
1458 | wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", | |
1459 | vring_index, used, used + descs_used); | |
1460 | } | |
1461 | ||
1462 | /* advance swhead */ | |
3d4bde15 | 1463 | wil_vring_advance_head(vring, descs_used); |
e3d2ed94 | 1464 | wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); |
3d4bde15 VK |
1465 | |
1466 | /* make sure all writes to descriptors (shared memory) are done before | |
1467 | * committing them to HW | |
1468 | */ | |
1469 | wmb(); | |
1470 | ||
b9eeb512 | 1471 | wil_w(wil, vring->hwtail, vring->swhead); |
3d4bde15 VK |
1472 | return 0; |
1473 | ||
e3d2ed94 | 1474 | mem_error: |
3d4bde15 VK |
1475 | while (descs_used > 0) { |
1476 | struct wil_ctx *ctx; | |
1477 | ||
1478 | i = (swhead + descs_used) % vring->size; | |
1479 | d = (struct vring_tx_desc *)&vring->va[i].tx; | |
1480 | _desc = &vring->va[i].tx; | |
1481 | *d = *_desc; | |
1482 | _desc->dma.status = TX_DMA_STATUS_DU; | |
1483 | ctx = &vring->ctx[i]; | |
1484 | wil_txdesc_unmap(dev, d, ctx); | |
3d4bde15 VK |
1485 | memset(ctx, 0, sizeof(*ctx)); |
1486 | descs_used--; | |
1487 | } | |
3d4bde15 | 1488 | err_exit: |
e3d2ed94 | 1489 | return rc; |
3d4bde15 VK |
1490 | } |
1491 | ||
5933a06d VK |
1492 | static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, |
1493 | struct sk_buff *skb) | |
2be7d22f VK |
1494 | { |
1495 | struct device *dev = wil_to_dev(wil); | |
68ada71e VK |
1496 | struct vring_tx_desc dd, *d = ⅆ |
1497 | volatile struct vring_tx_desc *_d; | |
2be7d22f VK |
1498 | u32 swhead = vring->swhead; |
1499 | int avail = wil_vring_avail_tx(vring); | |
1500 | int nr_frags = skb_shinfo(skb)->nr_frags; | |
504937d4 | 1501 | uint f = 0; |
2be7d22f | 1502 | int vring_index = vring - wil->vring_tx; |
7c0acf86 | 1503 | struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; |
2be7d22f VK |
1504 | uint i = swhead; |
1505 | dma_addr_t pa; | |
0436fd9a | 1506 | int used; |
41d6b093 VK |
1507 | bool mcast = (vring_index == wil->bcast_vring); |
1508 | uint len = skb_headlen(skb); | |
2be7d22f | 1509 | |
3d4bde15 VK |
1510 | wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", |
1511 | __func__, skb->len, vring_index); | |
2be7d22f | 1512 | |
5933a06d VK |
1513 | if (unlikely(!txdata->enabled)) |
1514 | return -EINVAL; | |
1515 | ||
33c477fd | 1516 | if (unlikely(avail < 1 + nr_frags)) { |
70801e1b | 1517 | wil_err_ratelimited(wil, |
5b29c573 VK |
1518 | "Tx ring[%2d] full. No space for %d fragments\n", |
1519 | vring_index, 1 + nr_frags); | |
2be7d22f VK |
1520 | return -ENOMEM; |
1521 | } | |
8fe59627 | 1522 | _d = &vring->va[i].tx; |
2be7d22f | 1523 | |
8fe59627 | 1524 | pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); |
2be7d22f | 1525 | |
5b29c573 VK |
1526 | wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index, |
1527 | skb_headlen(skb), skb->data, &pa); | |
7743882d | 1528 | wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1, |
2be7d22f VK |
1529 | skb->data, skb_headlen(skb), false); |
1530 | ||
1531 | if (unlikely(dma_mapping_error(dev, pa))) | |
1532 | return -EINVAL; | |
2232abd5 | 1533 | vring->ctx[i].mapped_as = wil_mapped_as_single; |
2be7d22f | 1534 | /* 1-st segment */ |
41d6b093 VK |
1535 | wil_tx_desc_map(d, pa, len, vring_index); |
1536 | if (unlikely(mcast)) { | |
1537 | d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */ | |
230d8442 | 1538 | if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */ |
41d6b093 | 1539 | d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS); |
41d6b093 | 1540 | } |
504937d4 | 1541 | /* Process TCP/UDP checksum offloading */ |
3d4bde15 | 1542 | if (unlikely(wil_tx_desc_offload_setup(d, skb))) { |
5b29c573 | 1543 | wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n", |
504937d4 KE |
1544 | vring_index); |
1545 | goto dma_error; | |
1546 | } | |
1547 | ||
c236658f | 1548 | vring->ctx[i].nr_frags = nr_frags; |
3d4bde15 | 1549 | wil_tx_desc_set_nr_frags(d, nr_frags + 1); |
68ada71e | 1550 | |
2be7d22f | 1551 | /* middle segments */ |
504937d4 | 1552 | for (; f < nr_frags; f++) { |
2be7d22f VK |
1553 | const struct skb_frag_struct *frag = |
1554 | &skb_shinfo(skb)->frags[f]; | |
1555 | int len = skb_frag_size(frag); | |
8fe59627 | 1556 | |
e59d16c0 | 1557 | *_d = *d; |
5b29c573 VK |
1558 | wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); |
1559 | wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, | |
1560 | (const void *)d, sizeof(*d), false); | |
2be7d22f | 1561 | i = (swhead + f + 1) % vring->size; |
8fe59627 | 1562 | _d = &vring->va[i].tx; |
2be7d22f | 1563 | pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), |
8fe59627 | 1564 | DMA_TO_DEVICE); |
e3d2ed94 HK |
1565 | if (unlikely(dma_mapping_error(dev, pa))) { |
1566 | wil_err(wil, "Tx[%2d] failed to map fragment\n", | |
1567 | vring_index); | |
2be7d22f | 1568 | goto dma_error; |
e3d2ed94 | 1569 | } |
2232abd5 | 1570 | vring->ctx[i].mapped_as = wil_mapped_as_page; |
99b55bd2 | 1571 | wil_tx_desc_map(d, pa, len, vring_index); |
c236658f VK |
1572 | /* no need to check return code - |
1573 | * if it succeeded for 1-st descriptor, | |
1574 | * it will succeed here too | |
1575 | */ | |
3d4bde15 | 1576 | wil_tx_desc_offload_setup(d, skb); |
2be7d22f VK |
1577 | } |
1578 | /* for the last seg only */ | |
1579 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS); | |
668b2bbd | 1580 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS); |
2be7d22f | 1581 | d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); |
68ada71e | 1582 | *_d = *d; |
5b29c573 VK |
1583 | wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); |
1584 | wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, | |
1585 | (const void *)d, sizeof(*d), false); | |
2be7d22f | 1586 | |
6cdadd4d VK |
1587 | /* hold reference to skb |
1588 | * to prevent skb release before accounting | |
1589 | * in case of immediate "tx done" | |
1590 | */ | |
1591 | vring->ctx[i].skb = skb_get(skb); | |
1592 | ||
0436fd9a VS |
1593 | /* performance monitoring */ |
1594 | used = wil_vring_used_tx(vring); | |
1595 | if (wil_val_in_range(vring_idle_trsh, | |
1596 | used, used + nr_frags + 1)) { | |
7c0acf86 | 1597 | txdata->idle += get_cycles() - txdata->last_idle; |
0436fd9a VS |
1598 | wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", |
1599 | vring_index, used, used + nr_frags + 1); | |
1600 | } | |
7c0acf86 | 1601 | |
2be7d22f VK |
1602 | /* advance swhead */ |
1603 | wil_vring_advance_head(vring, nr_frags + 1); | |
5b29c573 VK |
1604 | wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead, |
1605 | vring->swhead); | |
98658095 | 1606 | trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags); |
3d4bde15 VK |
1607 | |
1608 | /* make sure all writes to descriptors (shared memory) are done before | |
1609 | * committing them to HW | |
1610 | */ | |
1611 | wmb(); | |
1612 | ||
b9eeb512 | 1613 | wil_w(wil, vring->hwtail, vring->swhead); |
2be7d22f VK |
1614 | |
1615 | return 0; | |
1616 | dma_error: | |
1617 | /* unmap what we have mapped */ | |
c2a146f6 VK |
1618 | nr_frags = f + 1; /* frags mapped + one for skb head */ |
1619 | for (f = 0; f < nr_frags; f++) { | |
c2a146f6 | 1620 | struct wil_ctx *ctx; |
7e594444 | 1621 | |
2be7d22f | 1622 | i = (swhead + f) % vring->size; |
c2a146f6 | 1623 | ctx = &vring->ctx[i]; |
8fe59627 | 1624 | _d = &vring->va[i].tx; |
68ada71e VK |
1625 | *d = *_d; |
1626 | _d->dma.status = TX_DMA_STATUS_DU; | |
2232abd5 | 1627 | wil_txdesc_unmap(dev, d, ctx); |
f88f113a | 1628 | |
f88f113a | 1629 | memset(ctx, 0, sizeof(*ctx)); |
2be7d22f VK |
1630 | } |
1631 | ||
1632 | return -EINVAL; | |
1633 | } | |
1634 | ||
5933a06d VK |
1635 | static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, |
1636 | struct sk_buff *skb) | |
1637 | { | |
1638 | int vring_index = vring - wil->vring_tx; | |
1639 | struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; | |
1640 | int rc; | |
1641 | ||
1642 | spin_lock(&txdata->lock); | |
3d4bde15 VK |
1643 | |
1644 | rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring) | |
1645 | (wil, vring, skb); | |
1646 | ||
5933a06d | 1647 | spin_unlock(&txdata->lock); |
3d4bde15 | 1648 | |
5933a06d VK |
1649 | return rc; |
1650 | } | |
1651 | ||
2be7d22f VK |
1652 | netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev) |
1653 | { | |
1654 | struct wil6210_priv *wil = ndev_to_wil(ndev); | |
3df2cd36 | 1655 | struct ethhdr *eth = (void *)skb->data; |
41d6b093 | 1656 | bool bcast = is_multicast_ether_addr(eth->h_dest); |
2be7d22f | 1657 | struct vring *vring; |
aa27deaa | 1658 | static bool pr_once_fw; |
2be7d22f VK |
1659 | int rc; |
1660 | ||
7743882d | 1661 | wil_dbg_txrx(wil, "%s()\n", __func__); |
33c477fd | 1662 | if (unlikely(!test_bit(wil_status_fwready, wil->status))) { |
aa27deaa VK |
1663 | if (!pr_once_fw) { |
1664 | wil_err(wil, "FW not ready\n"); | |
1665 | pr_once_fw = true; | |
1666 | } | |
2be7d22f VK |
1667 | goto drop; |
1668 | } | |
33c477fd | 1669 | if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) { |
a3dcbae2 | 1670 | wil_err_ratelimited(wil, "FW not connected\n"); |
2be7d22f VK |
1671 | goto drop; |
1672 | } | |
33c477fd | 1673 | if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) { |
2be7d22f VK |
1674 | wil_err(wil, "Xmit in monitor mode not supported\n"); |
1675 | goto drop; | |
1676 | } | |
aa27deaa | 1677 | pr_once_fw = false; |
d58db4e4 VK |
1678 | |
1679 | /* find vring */ | |
54ed90a8 VK |
1680 | if (wil->wdev->iftype == NL80211_IFTYPE_STATION) { |
1681 | /* in STA mode (ESS), all to same VRING */ | |
1682 | vring = wil_find_tx_vring_sta(wil, skb); | |
1683 | } else { /* direct communication, find matching VRING */ | |
41d6b093 VK |
1684 | vring = bcast ? wil_find_tx_bcast(wil, skb) : |
1685 | wil_find_tx_ucast(wil, skb); | |
54ed90a8 | 1686 | } |
33c477fd | 1687 | if (unlikely(!vring)) { |
5aed1393 | 1688 | wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest); |
d58db4e4 | 1689 | goto drop; |
2be7d22f | 1690 | } |
d58db4e4 VK |
1691 | /* set up vring entry */ |
1692 | rc = wil_tx_vring(wil, vring, skb); | |
1693 | ||
2232abd5 | 1694 | /* do we still have enough room in the vring? */ |
33c477fd | 1695 | if (unlikely(wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring))) { |
2232abd5 | 1696 | netif_tx_stop_all_queues(wil_to_ndev(wil)); |
55f8f680 VK |
1697 | wil_dbg_txrx(wil, "netif_tx_stop : ring full\n"); |
1698 | } | |
2232abd5 | 1699 | |
2be7d22f VK |
1700 | switch (rc) { |
1701 | case 0: | |
795ce734 | 1702 | /* statistics will be updated on the tx_complete */ |
2be7d22f VK |
1703 | dev_kfree_skb_any(skb); |
1704 | return NETDEV_TX_OK; | |
1705 | case -ENOMEM: | |
1706 | return NETDEV_TX_BUSY; | |
1707 | default: | |
afda8bb5 | 1708 | break; /* goto drop; */ |
2be7d22f VK |
1709 | } |
1710 | drop: | |
2be7d22f VK |
1711 | ndev->stats.tx_dropped++; |
1712 | dev_kfree_skb_any(skb); | |
1713 | ||
1714 | return NET_XMIT_DROP; | |
1715 | } | |
1716 | ||
713c8a29 VK |
1717 | static inline bool wil_need_txstat(struct sk_buff *skb) |
1718 | { | |
1719 | struct ethhdr *eth = (void *)skb->data; | |
1720 | ||
1721 | return is_unicast_ether_addr(eth->h_dest) && skb->sk && | |
1722 | (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); | |
1723 | } | |
1724 | ||
1725 | static inline void wil_consume_skb(struct sk_buff *skb, bool acked) | |
1726 | { | |
1727 | if (unlikely(wil_need_txstat(skb))) | |
1728 | skb_complete_wifi_ack(skb, acked); | |
1729 | else | |
1730 | acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb); | |
1731 | } | |
1732 | ||
2be7d22f VK |
1733 | /** |
1734 | * Clean up transmitted skb's from the Tx VRING | |
1735 | * | |
e0287c4a VK |
1736 | * Return number of descriptors cleared |
1737 | * | |
2be7d22f VK |
1738 | * Safe to call from IRQ |
1739 | */ | |
e0287c4a | 1740 | int wil_tx_complete(struct wil6210_priv *wil, int ringid) |
2be7d22f | 1741 | { |
795ce734 | 1742 | struct net_device *ndev = wil_to_ndev(wil); |
2be7d22f VK |
1743 | struct device *dev = wil_to_dev(wil); |
1744 | struct vring *vring = &wil->vring_tx[ringid]; | |
097638a0 | 1745 | struct vring_tx_data *txdata = &wil->vring_tx_data[ringid]; |
e0287c4a | 1746 | int done = 0; |
c8b78b5f | 1747 | int cid = wil->vring2cid_tid[ringid][0]; |
41d6b093 | 1748 | struct wil_net_stats *stats = NULL; |
c236658f | 1749 | volatile struct vring_tx_desc *_d; |
0436fd9a VS |
1750 | int used_before_complete; |
1751 | int used_new; | |
2be7d22f | 1752 | |
33c477fd | 1753 | if (unlikely(!vring->va)) { |
2be7d22f | 1754 | wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid); |
e0287c4a | 1755 | return 0; |
2be7d22f VK |
1756 | } |
1757 | ||
33c477fd | 1758 | if (unlikely(!txdata->enabled)) { |
097638a0 VK |
1759 | wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid); |
1760 | return 0; | |
1761 | } | |
1762 | ||
7743882d | 1763 | wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid); |
2be7d22f | 1764 | |
0436fd9a VS |
1765 | used_before_complete = wil_vring_used_tx(vring); |
1766 | ||
41d6b093 VK |
1767 | if (cid < WIL6210_MAX_CID) |
1768 | stats = &wil->sta[cid].stats; | |
1769 | ||
2be7d22f | 1770 | while (!wil_vring_is_empty(vring)) { |
c236658f | 1771 | int new_swtail; |
f88f113a | 1772 | struct wil_ctx *ctx = &vring->ctx[vring->swtail]; |
c236658f VK |
1773 | /** |
1774 | * For the fragmented skb, HW will set DU bit only for the | |
3d4bde15 VK |
1775 | * last fragment. look for it. |
1776 | * In TSO the first DU will include hdr desc | |
c236658f VK |
1777 | */ |
1778 | int lf = (vring->swtail + ctx->nr_frags) % vring->size; | |
1779 | /* TODO: check we are not past head */ | |
4de41bef | 1780 | |
c236658f | 1781 | _d = &vring->va[lf].tx; |
33c477fd | 1782 | if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU))) |
2be7d22f VK |
1783 | break; |
1784 | ||
c236658f VK |
1785 | new_swtail = (lf + 1) % vring->size; |
1786 | while (vring->swtail != new_swtail) { | |
1787 | struct vring_tx_desc dd, *d = ⅆ | |
c236658f | 1788 | u16 dmalen; |
76dfa4b7 VK |
1789 | struct sk_buff *skb; |
1790 | ||
1791 | ctx = &vring->ctx[vring->swtail]; | |
1792 | skb = ctx->skb; | |
c236658f | 1793 | _d = &vring->va[vring->swtail].tx; |
2be7d22f | 1794 | |
c236658f | 1795 | *d = *_d; |
f88f113a | 1796 | |
c236658f VK |
1797 | dmalen = le16_to_cpu(d->dma.length); |
1798 | trace_wil6210_tx_done(ringid, vring->swtail, dmalen, | |
1799 | d->dma.error); | |
1800 | wil_dbg_txrx(wil, | |
5b29c573 VK |
1801 | "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n", |
1802 | ringid, vring->swtail, dmalen, | |
1803 | d->dma.status, d->dma.error); | |
1804 | wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4, | |
c236658f | 1805 | (const void *)d, sizeof(*d), false); |
795ce734 | 1806 | |
2232abd5 | 1807 | wil_txdesc_unmap(dev, d, ctx); |
c236658f VK |
1808 | |
1809 | if (skb) { | |
33c477fd | 1810 | if (likely(d->dma.error == 0)) { |
c236658f | 1811 | ndev->stats.tx_packets++; |
c236658f | 1812 | ndev->stats.tx_bytes += skb->len; |
41d6b093 VK |
1813 | if (stats) { |
1814 | stats->tx_packets++; | |
1815 | stats->tx_bytes += skb->len; | |
1816 | } | |
c236658f VK |
1817 | } else { |
1818 | ndev->stats.tx_errors++; | |
41d6b093 VK |
1819 | if (stats) |
1820 | stats->tx_errors++; | |
c236658f | 1821 | } |
713c8a29 | 1822 | wil_consume_skb(skb, d->dma.error == 0); |
c236658f VK |
1823 | } |
1824 | memset(ctx, 0, sizeof(*ctx)); | |
1825 | /* There is no need to touch HW descriptor: | |
1826 | * - ststus bit TX_DMA_STATUS_DU is set by design, | |
1827 | * so hardware will not try to process this desc., | |
1828 | * - rest of descriptor will be initialized on Tx. | |
1829 | */ | |
1830 | vring->swtail = wil_vring_next_tail(vring); | |
1831 | done++; | |
2be7d22f | 1832 | } |
2be7d22f | 1833 | } |
67c3e1b4 | 1834 | |
0436fd9a VS |
1835 | /* performance monitoring */ |
1836 | used_new = wil_vring_used_tx(vring); | |
1837 | if (wil_val_in_range(vring_idle_trsh, | |
1838 | used_new, used_before_complete)) { | |
1839 | wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n", | |
1840 | ringid, used_before_complete, used_new); | |
7c0acf86 VK |
1841 | txdata->last_idle = get_cycles(); |
1842 | } | |
67c3e1b4 | 1843 | |
55f8f680 VK |
1844 | if (wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring)) { |
1845 | wil_dbg_txrx(wil, "netif_tx_wake : ring not full\n"); | |
2be7d22f | 1846 | netif_tx_wake_all_queues(wil_to_ndev(wil)); |
55f8f680 | 1847 | } |
e0287c4a VK |
1848 | |
1849 | return done; | |
2be7d22f | 1850 | } |