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Commit | Line | Data |
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f078f209 LR |
1 | /* |
2 | * Copyright (c) 2008 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
394cf0a1 | 17 | #include "ath9k.h" |
f078f209 | 18 | |
5379c8a2 S |
19 | #define FUDGE 2 |
20 | ||
f078f209 | 21 | /* |
f078f209 LR |
22 | * This function will modify certain transmit queue properties depending on |
23 | * the operating mode of the station (AP or AdHoc). Parameters are AIFS | |
24 | * settings and channel width min/max | |
25 | */ | |
f078f209 LR |
26 | static int ath_beaconq_config(struct ath_softc *sc) |
27 | { | |
cbe61d8a | 28 | struct ath_hw *ah = sc->sc_ah; |
ea9880fb | 29 | struct ath9k_tx_queue_info qi; |
f078f209 | 30 | |
b77f483f | 31 | ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi); |
2660b81a | 32 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) { |
f078f209 LR |
33 | /* Always burst out beacon and CAB traffic. */ |
34 | qi.tqi_aifs = 1; | |
35 | qi.tqi_cwmin = 0; | |
36 | qi.tqi_cwmax = 0; | |
37 | } else { | |
38 | /* Adhoc mode; important thing is to use 2x cwmin. */ | |
b77f483f S |
39 | qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs; |
40 | qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin; | |
41 | qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax; | |
f078f209 LR |
42 | } |
43 | ||
b77f483f | 44 | if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { |
f078f209 | 45 | DPRINTF(sc, ATH_DBG_FATAL, |
04bd4638 | 46 | "unable to update h/w beacon queue parameters\n"); |
f078f209 LR |
47 | return 0; |
48 | } else { | |
9fc9ab0a | 49 | ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); |
f078f209 LR |
50 | return 1; |
51 | } | |
52 | } | |
53 | ||
54 | /* | |
f078f209 LR |
55 | * Associates the beacon frame buffer with a transmit descriptor. Will set |
56 | * up all required antenna switch parameters, rate codes, and channel flags. | |
57 | * Beacons are always sent out at the lowest rate, and are not retried. | |
58 | */ | |
9fc9ab0a S |
59 | static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, |
60 | struct ath_buf *bf) | |
f078f209 LR |
61 | { |
62 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | |
cbe61d8a | 63 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 64 | struct ath_desc *ds; |
980b24da | 65 | struct ath9k_11n_rate_series series[4]; |
e63835b0 | 66 | struct ath_rate_table *rt; |
9fc9ab0a S |
67 | int flags, antenna, ctsrate = 0, ctsduration = 0; |
68 | u8 rate; | |
f078f209 | 69 | |
f078f209 | 70 | ds = bf->bf_desc; |
f078f209 LR |
71 | flags = ATH9K_TXDESC_NOACK; |
72 | ||
2660b81a S |
73 | if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC && |
74 | (ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { | |
f078f209 LR |
75 | ds->ds_link = bf->bf_daddr; /* self-linked */ |
76 | flags |= ATH9K_TXDESC_VEOL; | |
77 | /* Let hardware handle antenna switching. */ | |
78 | antenna = 0; | |
79 | } else { | |
80 | ds->ds_link = 0; | |
81 | /* | |
82 | * Switch antenna every beacon. | |
9fc9ab0a S |
83 | * Should only switch every beacon period, not for every SWBA |
84 | * XXX assumes two antennae | |
f078f209 | 85 | */ |
17d7904d | 86 | antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); |
f078f209 LR |
87 | } |
88 | ||
89 | ds->ds_data = bf->bf_buf_addr; | |
90 | ||
3706de6f | 91 | rt = sc->cur_rate_table; |
9fc9ab0a | 92 | rate = rt->info[0].ratecode; |
672840ac | 93 | if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) |
9fc9ab0a S |
94 | rate |= rt->info[0].short_preamble; |
95 | ||
96 | ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN, | |
97 | ATH9K_PKT_TYPE_BEACON, | |
98 | MAX_RATE_POWER, | |
99 | ATH9K_TXKEYIX_INVALID, | |
100 | ATH9K_KEY_TYPE_CLEAR, | |
101 | flags); | |
f078f209 LR |
102 | |
103 | /* NB: beacon's BufLen must be a multiple of 4 bytes */ | |
9fc9ab0a S |
104 | ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4), |
105 | true, true, ds); | |
f078f209 | 106 | |
0345f37b | 107 | memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); |
f078f209 LR |
108 | series[0].Tries = 1; |
109 | series[0].Rate = rate; | |
17d7904d | 110 | series[0].ChSel = sc->tx_chainmask; |
f078f209 | 111 | series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; |
9fc9ab0a S |
112 | ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration, |
113 | series, 4, 0); | |
f078f209 LR |
114 | } |
115 | ||
c52f33d0 | 116 | static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, |
2c3db3d5 | 117 | struct ieee80211_vif *vif) |
f078f209 | 118 | { |
c52f33d0 JM |
119 | struct ath_wiphy *aphy = hw->priv; |
120 | struct ath_softc *sc = aphy->sc; | |
f078f209 | 121 | struct ath_buf *bf; |
17d7904d | 122 | struct ath_vif *avp; |
f078f209 | 123 | struct sk_buff *skb; |
f078f209 | 124 | struct ath_txq *cabq; |
147583c0 | 125 | struct ieee80211_tx_info *info; |
980b24da S |
126 | int cabq_depth; |
127 | ||
f0ed85c6 JM |
128 | if (aphy->state != ATH_WIPHY_ACTIVE) |
129 | return NULL; | |
130 | ||
5640b08e | 131 | avp = (void *)vif->drv_priv; |
b77f483f | 132 | cabq = sc->beacon.cabq; |
f078f209 | 133 | |
f078f209 | 134 | if (avp->av_bcbuf == NULL) { |
04bd4638 S |
135 | DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n", |
136 | avp, avp->av_bcbuf); | |
f078f209 LR |
137 | return NULL; |
138 | } | |
980b24da | 139 | |
9fc9ab0a S |
140 | /* Release the old beacon first */ |
141 | ||
f078f209 | 142 | bf = avp->av_bcbuf; |
980b24da | 143 | skb = (struct sk_buff *)bf->bf_mpdu; |
a8fff50e | 144 | if (skb) { |
7da3c55c | 145 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 146 | skb->len, DMA_TO_DEVICE); |
3fbb9d95 | 147 | dev_kfree_skb_any(skb); |
a8fff50e | 148 | } |
f078f209 | 149 | |
9fc9ab0a S |
150 | /* Get a new beacon from mac80211 */ |
151 | ||
c52f33d0 | 152 | skb = ieee80211_beacon_get(hw, vif); |
a8fff50e JM |
153 | bf->bf_mpdu = skb; |
154 | if (skb == NULL) | |
155 | return NULL; | |
4ed96f04 JM |
156 | ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = |
157 | avp->tsf_adjust; | |
980b24da | 158 | |
147583c0 JM |
159 | info = IEEE80211_SKB_CB(skb); |
160 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
161 | /* | |
162 | * TODO: make sure the seq# gets assigned properly (vs. other | |
163 | * TX frames) | |
164 | */ | |
980b24da | 165 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
b77f483f | 166 | sc->tx.seq_no += 0x10; |
147583c0 | 167 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
b77f483f | 168 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); |
147583c0 | 169 | } |
980b24da | 170 | |
a8fff50e | 171 | bf->bf_buf_addr = bf->bf_dmacontext = |
7da3c55c | 172 | dma_map_single(sc->dev, skb->data, |
9fc9ab0a | 173 | skb->len, DMA_TO_DEVICE); |
7da3c55c | 174 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
175 | dev_kfree_skb_any(skb); |
176 | bf->bf_mpdu = NULL; | |
9fc9ab0a | 177 | DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n"); |
f8316df1 LR |
178 | return NULL; |
179 | } | |
f078f209 | 180 | |
c52f33d0 | 181 | skb = ieee80211_get_buffered_bc(hw, vif); |
f078f209 | 182 | |
f078f209 LR |
183 | /* |
184 | * if the CABQ traffic from previous DTIM is pending and the current | |
185 | * beacon is also a DTIM. | |
17d7904d S |
186 | * 1) if there is only one vif let the cab traffic continue. |
187 | * 2) if there are more than one vif and we are using staggered | |
f078f209 | 188 | * beacons, then drain the cabq by dropping all the frames in |
17d7904d | 189 | * the cabq so that the current vifs cab traffic can be scheduled. |
f078f209 LR |
190 | */ |
191 | spin_lock_bh(&cabq->axq_lock); | |
192 | cabq_depth = cabq->axq_depth; | |
193 | spin_unlock_bh(&cabq->axq_lock); | |
194 | ||
e022edbd | 195 | if (skb && cabq_depth) { |
17d7904d | 196 | if (sc->nvifs > 1) { |
f078f209 | 197 | DPRINTF(sc, ATH_DBG_BEACON, |
9fc9ab0a S |
198 | "Flushing previous cabq traffic\n"); |
199 | ath_draintxq(sc, cabq, false); | |
f078f209 LR |
200 | } |
201 | } | |
202 | ||
f078f209 LR |
203 | ath_beacon_setup(sc, avp, bf); |
204 | ||
e022edbd | 205 | while (skb) { |
c52f33d0 JM |
206 | ath_tx_cabq(hw, skb); |
207 | skb = ieee80211_get_buffered_bc(hw, vif); | |
e022edbd | 208 | } |
f078f209 | 209 | |
f078f209 LR |
210 | return bf; |
211 | } | |
212 | ||
213 | /* | |
214 | * Startup beacon transmission for adhoc mode when they are sent entirely | |
215 | * by the hardware using the self-linked descriptor + veol trick. | |
216 | */ | |
2c3db3d5 JM |
217 | static void ath_beacon_start_adhoc(struct ath_softc *sc, |
218 | struct ieee80211_vif *vif) | |
f078f209 | 219 | { |
cbe61d8a | 220 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 221 | struct ath_buf *bf; |
17d7904d | 222 | struct ath_vif *avp; |
f078f209 LR |
223 | struct sk_buff *skb; |
224 | ||
5640b08e | 225 | avp = (void *)vif->drv_priv; |
f078f209 | 226 | |
9fc9ab0a | 227 | if (avp->av_bcbuf == NULL) |
f078f209 | 228 | return; |
9fc9ab0a | 229 | |
f078f209 LR |
230 | bf = avp->av_bcbuf; |
231 | skb = (struct sk_buff *) bf->bf_mpdu; | |
232 | ||
f078f209 LR |
233 | ath_beacon_setup(sc, avp, bf); |
234 | ||
235 | /* NB: caller is known to have already stopped tx dma */ | |
b77f483f S |
236 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr); |
237 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
04bd4638 | 238 | DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n", |
b77f483f | 239 | sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc); |
f078f209 LR |
240 | } |
241 | ||
cbe61d8a | 242 | int ath_beaconq_setup(struct ath_hw *ah) |
f078f209 | 243 | { |
ea9880fb | 244 | struct ath9k_tx_queue_info qi; |
f078f209 | 245 | |
0345f37b | 246 | memset(&qi, 0, sizeof(qi)); |
f078f209 LR |
247 | qi.tqi_aifs = 1; |
248 | qi.tqi_cwmin = 0; | |
249 | qi.tqi_cwmax = 0; | |
250 | /* NB: don't enable any interrupts */ | |
251 | return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi); | |
252 | } | |
253 | ||
c52f33d0 | 254 | int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) |
f078f209 | 255 | { |
c52f33d0 | 256 | struct ath_softc *sc = aphy->sc; |
17d7904d | 257 | struct ath_vif *avp; |
f078f209 LR |
258 | struct ath_buf *bf; |
259 | struct sk_buff *skb; | |
459f5f90 | 260 | __le64 tstamp; |
f078f209 | 261 | |
5640b08e | 262 | avp = (void *)vif->drv_priv; |
f078f209 LR |
263 | |
264 | /* Allocate a beacon descriptor if we haven't done so. */ | |
265 | if (!avp->av_bcbuf) { | |
980b24da S |
266 | /* Allocate beacon state for hostap/ibss. We know |
267 | * a buffer is available. */ | |
b77f483f | 268 | avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, |
980b24da | 269 | struct ath_buf, list); |
f078f209 LR |
270 | list_del(&avp->av_bcbuf->list); |
271 | ||
2660b81a S |
272 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP || |
273 | !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { | |
f078f209 LR |
274 | int slot; |
275 | /* | |
17d7904d | 276 | * Assign the vif to a beacon xmit slot. As |
f078f209 LR |
277 | * above, this cannot fail to find one. |
278 | */ | |
279 | avp->av_bslot = 0; | |
280 | for (slot = 0; slot < ATH_BCBUF; slot++) | |
2c3db3d5 | 281 | if (sc->beacon.bslot[slot] == NULL) { |
f078f209 LR |
282 | /* |
283 | * XXX hack, space out slots to better | |
284 | * deal with misses | |
285 | */ | |
286 | if (slot+1 < ATH_BCBUF && | |
2c3db3d5 | 287 | sc->beacon.bslot[slot+1] == NULL) { |
f078f209 LR |
288 | avp->av_bslot = slot+1; |
289 | break; | |
290 | } | |
291 | avp->av_bslot = slot; | |
292 | /* NB: keep looking for a double slot */ | |
293 | } | |
2c3db3d5 JM |
294 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL); |
295 | sc->beacon.bslot[avp->av_bslot] = vif; | |
c52f33d0 | 296 | sc->beacon.bslot_aphy[avp->av_bslot] = aphy; |
17d7904d | 297 | sc->nbcnvifs++; |
f078f209 LR |
298 | } |
299 | } | |
300 | ||
9fc9ab0a | 301 | /* release the previous beacon frame, if it already exists. */ |
f078f209 LR |
302 | bf = avp->av_bcbuf; |
303 | if (bf->bf_mpdu != NULL) { | |
304 | skb = (struct sk_buff *)bf->bf_mpdu; | |
7da3c55c | 305 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 306 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
307 | dev_kfree_skb_any(skb); |
308 | bf->bf_mpdu = NULL; | |
309 | } | |
310 | ||
9fc9ab0a | 311 | /* NB: the beacon data buffer must be 32-bit aligned. */ |
5640b08e | 312 | skb = ieee80211_beacon_get(sc->hw, vif); |
f078f209 | 313 | if (skb == NULL) { |
04bd4638 | 314 | DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n"); |
f078f209 LR |
315 | return -ENOMEM; |
316 | } | |
317 | ||
459f5f90 | 318 | tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b77f483f | 319 | sc->beacon.bc_tstamp = le64_to_cpu(tstamp); |
4ed96f04 | 320 | /* Calculate a TSF adjustment factor required for staggered beacons. */ |
f078f209 LR |
321 | if (avp->av_bslot > 0) { |
322 | u64 tsfadjust; | |
f078f209 LR |
323 | int intval; |
324 | ||
a8fff50e JM |
325 | intval = sc->hw->conf.beacon_int ? |
326 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
f078f209 LR |
327 | |
328 | /* | |
4ed96f04 JM |
329 | * Calculate the TSF offset for this beacon slot, i.e., the |
330 | * number of usecs that need to be added to the timestamp field | |
331 | * in Beacon and Probe Response frames. Beacon slot 0 is | |
332 | * processed at the correct offset, so it does not require TSF | |
333 | * adjustment. Other slots are adjusted to get the timestamp | |
334 | * close to the TBTT for the BSS. | |
f078f209 | 335 | */ |
4ed96f04 JM |
336 | tsfadjust = intval * avp->av_bslot / ATH_BCBUF; |
337 | avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust)); | |
f078f209 LR |
338 | |
339 | DPRINTF(sc, ATH_DBG_BEACON, | |
04bd4638 | 340 | "stagger beacons, bslot %d intval %u tsfadjust %llu\n", |
f078f209 LR |
341 | avp->av_bslot, intval, (unsigned long long)tsfadjust); |
342 | ||
4ed96f04 JM |
343 | ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = |
344 | avp->tsf_adjust; | |
345 | } else | |
346 | avp->tsf_adjust = cpu_to_le64(0); | |
f078f209 | 347 | |
f8316df1 | 348 | bf->bf_mpdu = skb; |
a8fff50e | 349 | bf->bf_buf_addr = bf->bf_dmacontext = |
7da3c55c | 350 | dma_map_single(sc->dev, skb->data, |
9fc9ab0a | 351 | skb->len, DMA_TO_DEVICE); |
7da3c55c | 352 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
353 | dev_kfree_skb_any(skb); |
354 | bf->bf_mpdu = NULL; | |
9fc9ab0a S |
355 | DPRINTF(sc, ATH_DBG_FATAL, |
356 | "dma_mapping_error on beacon alloc\n"); | |
f8316df1 LR |
357 | return -ENOMEM; |
358 | } | |
f078f209 LR |
359 | |
360 | return 0; | |
361 | } | |
362 | ||
17d7904d | 363 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp) |
f078f209 LR |
364 | { |
365 | if (avp->av_bcbuf != NULL) { | |
366 | struct ath_buf *bf; | |
367 | ||
368 | if (avp->av_bslot != -1) { | |
2c3db3d5 | 369 | sc->beacon.bslot[avp->av_bslot] = NULL; |
c52f33d0 | 370 | sc->beacon.bslot_aphy[avp->av_bslot] = NULL; |
17d7904d | 371 | sc->nbcnvifs--; |
f078f209 LR |
372 | } |
373 | ||
374 | bf = avp->av_bcbuf; | |
375 | if (bf->bf_mpdu != NULL) { | |
376 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | |
7da3c55c | 377 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 378 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
379 | dev_kfree_skb_any(skb); |
380 | bf->bf_mpdu = NULL; | |
381 | } | |
b77f483f | 382 | list_add_tail(&bf->list, &sc->beacon.bbuf); |
f078f209 LR |
383 | |
384 | avp->av_bcbuf = NULL; | |
385 | } | |
386 | } | |
387 | ||
9fc9ab0a | 388 | void ath_beacon_tasklet(unsigned long data) |
f078f209 | 389 | { |
f078f209 | 390 | struct ath_softc *sc = (struct ath_softc *)data; |
cbe61d8a | 391 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 392 | struct ath_buf *bf = NULL; |
2c3db3d5 | 393 | struct ieee80211_vif *vif; |
c52f33d0 | 394 | struct ath_wiphy *aphy; |
2c3db3d5 | 395 | int slot; |
9546aae0 | 396 | u32 bfaddr, bc = 0, tsftu; |
f078f209 | 397 | u64 tsf; |
f078f209 LR |
398 | u16 intval; |
399 | ||
f078f209 LR |
400 | /* |
401 | * Check if the previous beacon has gone out. If | |
402 | * not don't try to post another, skip this period | |
403 | * and wait for the next. Missed beacons indicate | |
404 | * a problem and should not occur. If we miss too | |
405 | * many consecutive beacons reset the device. | |
406 | */ | |
b77f483f S |
407 | if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) { |
408 | sc->beacon.bmisscnt++; | |
9546aae0 | 409 | |
b77f483f | 410 | if (sc->beacon.bmisscnt < BSTUCK_THRESH) { |
9546aae0 S |
411 | DPRINTF(sc, ATH_DBG_BEACON, |
412 | "missed %u consecutive beacons\n", | |
413 | sc->beacon.bmisscnt); | |
b77f483f | 414 | } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) { |
9546aae0 S |
415 | DPRINTF(sc, ATH_DBG_BEACON, |
416 | "beacon is officially stuck\n"); | |
417 | ath_reset(sc, false); | |
f078f209 | 418 | } |
9546aae0 | 419 | |
f078f209 LR |
420 | return; |
421 | } | |
980b24da | 422 | |
b77f483f | 423 | if (sc->beacon.bmisscnt != 0) { |
9546aae0 S |
424 | DPRINTF(sc, ATH_DBG_BEACON, |
425 | "resume beacon xmit after %u misses\n", | |
426 | sc->beacon.bmisscnt); | |
b77f483f | 427 | sc->beacon.bmisscnt = 0; |
f078f209 LR |
428 | } |
429 | ||
430 | /* | |
431 | * Generate beacon frames. we are sending frames | |
432 | * staggered so calculate the slot for this frame based | |
433 | * on the tsf to safeguard against missing an swba. | |
434 | */ | |
435 | ||
a8fff50e JM |
436 | intval = sc->hw->conf.beacon_int ? |
437 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
f078f209 LR |
438 | |
439 | tsf = ath9k_hw_gettsf64(ah); | |
440 | tsftu = TSF_TO_TU(tsf>>32, tsf); | |
441 | slot = ((tsftu % intval) * ATH_BCBUF) / intval; | |
4ed96f04 JM |
442 | /* |
443 | * Reverse the slot order to get slot 0 on the TBTT offset that does | |
444 | * not require TSF adjustment and other slots adding | |
445 | * slot/ATH_BCBUF * beacon_int to timestamp. For example, with | |
446 | * ATH_BCBUF = 4, we process beacon slots as follows: 3 2 1 0 3 2 1 .. | |
447 | * and slot 0 is at correct offset to TBTT. | |
448 | */ | |
449 | slot = ATH_BCBUF - slot - 1; | |
450 | vif = sc->beacon.bslot[slot]; | |
451 | aphy = sc->beacon.bslot_aphy[slot]; | |
980b24da | 452 | |
f078f209 | 453 | DPRINTF(sc, ATH_DBG_BEACON, |
2c3db3d5 JM |
454 | "slot %d [tsf %llu tsftu %u intval %u] vif %p\n", |
455 | slot, tsf, tsftu, intval, vif); | |
980b24da | 456 | |
f078f209 | 457 | bfaddr = 0; |
2c3db3d5 | 458 | if (vif) { |
c52f33d0 | 459 | bf = ath_beacon_generate(aphy->hw, vif); |
f078f209 LR |
460 | if (bf != NULL) { |
461 | bfaddr = bf->bf_daddr; | |
462 | bc = 1; | |
463 | } | |
464 | } | |
9546aae0 | 465 | |
f078f209 LR |
466 | /* |
467 | * Handle slot time change when a non-ERP station joins/leaves | |
468 | * an 11g network. The 802.11 layer notifies us via callback, | |
469 | * we mark updateslot, then wait one beacon before effecting | |
470 | * the change. This gives associated stations at least one | |
471 | * beacon interval to note the state change. | |
472 | * | |
473 | * NB: The slot time change state machine is clocked according | |
474 | * to whether we are bursting or staggering beacons. We | |
475 | * recognize the request to update and record the current | |
476 | * slot then don't transition until that slot is reached | |
477 | * again. If we miss a beacon for that slot then we'll be | |
478 | * slow to transition but we'll be sure at least one beacon | |
479 | * interval has passed. When bursting slot is always left | |
480 | * set to ATH_BCBUF so this check is a noop. | |
481 | */ | |
b77f483f S |
482 | if (sc->beacon.updateslot == UPDATE) { |
483 | sc->beacon.updateslot = COMMIT; /* commit next beacon */ | |
484 | sc->beacon.slotupdate = slot; | |
485 | } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) { | |
486 | ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime); | |
487 | sc->beacon.updateslot = OK; | |
ff37e337 | 488 | } |
f078f209 LR |
489 | if (bfaddr != 0) { |
490 | /* | |
491 | * Stop any current dma and put the new frame(s) on the queue. | |
492 | * This should never fail since we check above that no frames | |
493 | * are still pending on the queue. | |
494 | */ | |
b77f483f | 495 | if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) { |
f078f209 | 496 | DPRINTF(sc, ATH_DBG_FATAL, |
b77f483f | 497 | "beacon queue %u did not stop?\n", sc->beacon.beaconq); |
f078f209 LR |
498 | } |
499 | ||
500 | /* NB: cabq traffic should already be queued and primed */ | |
b77f483f S |
501 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr); |
502 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
f078f209 | 503 | |
17d7904d | 504 | sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */ |
f078f209 | 505 | } |
f078f209 LR |
506 | } |
507 | ||
f078f209 | 508 | /* |
5379c8a2 S |
509 | * For multi-bss ap support beacons are either staggered evenly over N slots or |
510 | * burst together. For the former arrange for the SWBA to be delivered for each | |
511 | * slot. Slots that are not occupied will generate nothing. | |
f078f209 | 512 | */ |
5379c8a2 S |
513 | static void ath_beacon_config_ap(struct ath_softc *sc, |
514 | struct ath_beacon_config *conf, | |
515 | struct ath_vif *avp) | |
f078f209 | 516 | { |
980b24da | 517 | u32 nexttbtt, intval; |
f078f209 | 518 | |
b238e90e S |
519 | /* Configure the timers only when the TSF has to be reset */ |
520 | ||
521 | if (!(sc->sc_flags & SC_OP_TSF_RESET)) | |
522 | return; | |
523 | ||
5379c8a2 S |
524 | /* NB: the beacon interval is kept internally in TU's */ |
525 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
526 | intval /= ATH_BCBUF; /* for staggered beacons */ | |
527 | nexttbtt = intval; | |
528 | intval |= ATH9K_BEACON_RESET_TSF; | |
f078f209 | 529 | |
5379c8a2 S |
530 | /* |
531 | * In AP mode we enable the beacon timers and SWBA interrupts to | |
532 | * prepare beacon frames. | |
533 | */ | |
534 | intval |= ATH9K_BEACON_ENA; | |
535 | sc->imask |= ATH9K_INT_SWBA; | |
536 | ath_beaconq_config(sc); | |
f078f209 | 537 | |
5379c8a2 | 538 | /* Set the computed AP beacon timers */ |
f078f209 | 539 | |
5379c8a2 S |
540 | ath9k_hw_set_interrupts(sc->sc_ah, 0); |
541 | ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); | |
542 | sc->beacon.bmisscnt = 0; | |
543 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
b238e90e S |
544 | |
545 | /* Clear the reset TSF flag, so that subsequent beacon updation | |
546 | will not reset the HW TSF. */ | |
547 | ||
548 | sc->sc_flags &= ~SC_OP_TSF_RESET; | |
5379c8a2 | 549 | } |
459f5f90 | 550 | |
5379c8a2 S |
551 | /* |
552 | * This sets up the beacon timers according to the timestamp of the last | |
553 | * received beacon and the current TSF, configures PCF and DTIM | |
554 | * handling, programs the sleep registers so the hardware will wakeup in | |
555 | * time to receive beacons, and configures the beacon miss handling so | |
556 | * we'll receive a BMISS interrupt when we stop seeing beacons from the AP | |
557 | * we've associated with. | |
558 | */ | |
559 | static void ath_beacon_config_sta(struct ath_softc *sc, | |
560 | struct ath_beacon_config *conf, | |
561 | struct ath_vif *avp) | |
562 | { | |
563 | struct ath9k_beacon_state bs; | |
564 | int dtimperiod, dtimcount, sleepduration; | |
565 | int cfpperiod, cfpcount; | |
566 | u32 nexttbtt = 0, intval, tsftu; | |
567 | u64 tsf; | |
568 | ||
569 | memset(&bs, 0, sizeof(bs)); | |
570 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
571 | ||
572 | /* | |
573 | * Setup dtim and cfp parameters according to | |
574 | * last beacon we received (which may be none). | |
575 | */ | |
576 | dtimperiod = conf->dtim_period; | |
577 | if (dtimperiod <= 0) /* NB: 0 if not known */ | |
578 | dtimperiod = 1; | |
579 | dtimcount = conf->dtim_count; | |
580 | if (dtimcount >= dtimperiod) /* NB: sanity check */ | |
581 | dtimcount = 0; | |
582 | cfpperiod = 1; /* NB: no PCF support yet */ | |
583 | cfpcount = 0; | |
584 | ||
585 | sleepduration = conf->listen_interval * intval; | |
586 | if (sleepduration <= 0) | |
587 | sleepduration = intval; | |
588 | ||
589 | /* | |
590 | * Pull nexttbtt forward to reflect the current | |
591 | * TSF and calculate dtim+cfp state for the result. | |
592 | */ | |
593 | tsf = ath9k_hw_gettsf64(sc->sc_ah); | |
594 | tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; | |
595 | do { | |
596 | nexttbtt += intval; | |
597 | if (--dtimcount < 0) { | |
598 | dtimcount = dtimperiod - 1; | |
599 | if (--cfpcount < 0) | |
600 | cfpcount = cfpperiod - 1; | |
601 | } | |
602 | } while (nexttbtt < tsftu); | |
603 | ||
604 | bs.bs_intval = intval; | |
605 | bs.bs_nexttbtt = nexttbtt; | |
606 | bs.bs_dtimperiod = dtimperiod*intval; | |
607 | bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval; | |
608 | bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod; | |
609 | bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod; | |
610 | bs.bs_cfpmaxduration = 0; | |
611 | ||
612 | /* | |
613 | * Calculate the number of consecutive beacons to miss* before taking | |
614 | * a BMISS interrupt. The configuration is specified in TU so we only | |
615 | * need calculate based on the beacon interval. Note that we clamp the | |
616 | * result to at most 15 beacons. | |
617 | */ | |
618 | if (sleepduration > intval) { | |
619 | bs.bs_bmissthreshold = conf->listen_interval * | |
620 | ATH_DEFAULT_BMISS_LIMIT / 2; | |
f078f209 | 621 | } else { |
5379c8a2 S |
622 | bs.bs_bmissthreshold = DIV_ROUND_UP(conf->bmiss_timeout, intval); |
623 | if (bs.bs_bmissthreshold > 15) | |
624 | bs.bs_bmissthreshold = 15; | |
625 | else if (bs.bs_bmissthreshold <= 0) | |
626 | bs.bs_bmissthreshold = 1; | |
f078f209 LR |
627 | } |
628 | ||
5379c8a2 S |
629 | /* |
630 | * Calculate sleep duration. The configuration is given in ms. | |
631 | * We ensure a multiple of the beacon period is used. Also, if the sleep | |
632 | * duration is greater than the DTIM period then it makes senses | |
633 | * to make it a multiple of that. | |
634 | * | |
635 | * XXX fixed at 100ms | |
636 | */ | |
980b24da | 637 | |
5379c8a2 S |
638 | bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration); |
639 | if (bs.bs_sleepduration > bs.bs_dtimperiod) | |
640 | bs.bs_sleepduration = bs.bs_dtimperiod; | |
980b24da | 641 | |
5379c8a2 S |
642 | /* TSF out of range threshold fixed at 1 second */ |
643 | bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; | |
f078f209 | 644 | |
5379c8a2 S |
645 | DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); |
646 | DPRINTF(sc, ATH_DBG_BEACON, | |
647 | "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", | |
648 | bs.bs_bmissthreshold, bs.bs_sleepduration, | |
649 | bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); | |
f078f209 | 650 | |
5379c8a2 | 651 | /* Set the computed STA beacon timers */ |
980b24da | 652 | |
5379c8a2 S |
653 | ath9k_hw_set_interrupts(sc->sc_ah, 0); |
654 | ath9k_hw_set_sta_beacon_timers(sc->sc_ah, &bs); | |
655 | sc->imask |= ATH9K_INT_BMISS; | |
656 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
657 | } | |
f078f209 | 658 | |
5379c8a2 S |
659 | static void ath_beacon_config_adhoc(struct ath_softc *sc, |
660 | struct ath_beacon_config *conf, | |
2c3db3d5 JM |
661 | struct ath_vif *avp, |
662 | struct ieee80211_vif *vif) | |
5379c8a2 S |
663 | { |
664 | u64 tsf; | |
665 | u32 tsftu, intval, nexttbtt; | |
f078f209 | 666 | |
5379c8a2 | 667 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; |
f078f209 | 668 | |
5379c8a2 | 669 | /* Pull nexttbtt forward to reflect the current TSF */ |
4af9cf4f | 670 | |
5379c8a2 S |
671 | nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp); |
672 | if (nexttbtt == 0) | |
673 | nexttbtt = intval; | |
674 | else if (intval) | |
675 | nexttbtt = roundup(nexttbtt, intval); | |
9fc9ab0a | 676 | |
5379c8a2 S |
677 | tsf = ath9k_hw_gettsf64(sc->sc_ah); |
678 | tsftu = TSF_TO_TU((u32)(tsf>>32), (u32)tsf) + FUDGE; | |
679 | do { | |
680 | nexttbtt += intval; | |
681 | } while (nexttbtt < tsftu); | |
f078f209 | 682 | |
5379c8a2 S |
683 | DPRINTF(sc, ATH_DBG_BEACON, |
684 | "IBSS nexttbtt %u intval %u (%u)\n", | |
685 | nexttbtt, intval, conf->beacon_interval); | |
9fc9ab0a | 686 | |
5379c8a2 S |
687 | /* |
688 | * In IBSS mode enable the beacon timers but only enable SWBA interrupts | |
689 | * if we need to manually prepare beacon frames. Otherwise we use a | |
690 | * self-linked tx descriptor and let the hardware deal with things. | |
691 | */ | |
692 | intval |= ATH9K_BEACON_ENA; | |
693 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) | |
694 | sc->imask |= ATH9K_INT_SWBA; | |
9fc9ab0a | 695 | |
5379c8a2 S |
696 | ath_beaconq_config(sc); |
697 | ||
698 | /* Set the computed ADHOC beacon timers */ | |
699 | ||
700 | ath9k_hw_set_interrupts(sc->sc_ah, 0); | |
701 | ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); | |
702 | sc->beacon.bmisscnt = 0; | |
703 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
704 | ||
705 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL) | |
2c3db3d5 | 706 | ath_beacon_start_adhoc(sc, vif); |
f078f209 LR |
707 | } |
708 | ||
2c3db3d5 | 709 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) |
f078f209 | 710 | { |
5379c8a2 | 711 | struct ath_beacon_config conf; |
5379c8a2 S |
712 | |
713 | /* Setup the beacon configuration parameters */ | |
714 | ||
715 | memset(&conf, 0, sizeof(struct ath_beacon_config)); | |
716 | conf.beacon_interval = sc->hw->conf.beacon_int ? | |
717 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
718 | conf.listen_interval = 1; | |
719 | conf.dtim_period = conf.beacon_interval; | |
720 | conf.dtim_count = 1; | |
721 | conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval; | |
722 | ||
2c3db3d5 JM |
723 | if (vif) { |
724 | struct ath_vif *avp = (struct ath_vif *)vif->drv_priv; | |
5379c8a2 S |
725 | |
726 | switch(avp->av_opmode) { | |
727 | case NL80211_IFTYPE_AP: | |
728 | ath_beacon_config_ap(sc, &conf, avp); | |
729 | break; | |
730 | case NL80211_IFTYPE_ADHOC: | |
2c3db3d5 | 731 | ath_beacon_config_adhoc(sc, &conf, avp, vif); |
5379c8a2 S |
732 | break; |
733 | case NL80211_IFTYPE_STATION: | |
734 | ath_beacon_config_sta(sc, &conf, avp); | |
735 | break; | |
736 | default: | |
737 | DPRINTF(sc, ATH_DBG_CONFIG, | |
738 | "Unsupported beaconing mode\n"); | |
739 | return; | |
740 | } | |
741 | ||
742 | sc->sc_flags |= SC_OP_BEACONS; | |
743 | } | |
f078f209 | 744 | } |