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Commit | Line | Data |
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5100d5ac MB |
1 | /* |
2 | ||
3 | Broadcom B43 wireless driver | |
4 | ||
5 | PIO data transfer | |
6 | ||
7 | Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de> | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; see the file COPYING. If not, write to | |
21 | the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, | |
22 | Boston, MA 02110-1301, USA. | |
23 | ||
24 | */ | |
25 | ||
26 | #include "b43.h" | |
27 | #include "pio.h" | |
28 | #include "dma.h" | |
29 | #include "main.h" | |
30 | #include "xmit.h" | |
31 | ||
32 | #include <linux/delay.h> | |
d43c36dc | 33 | #include <linux/sched.h> |
5100d5ac MB |
34 | |
35 | ||
5100d5ac MB |
36 | static u16 generate_cookie(struct b43_pio_txqueue *q, |
37 | struct b43_pio_txpacket *pack) | |
38 | { | |
39 | u16 cookie; | |
40 | ||
41 | /* Use the upper 4 bits of the cookie as | |
42 | * PIO controller ID and store the packet index number | |
43 | * in the lower 12 bits. | |
44 | * Note that the cookie must never be 0, as this | |
45 | * is a special value used in RX path. | |
46 | * It can also not be 0xFFFF because that is special | |
47 | * for multicast frames. | |
48 | */ | |
49 | cookie = (((u16)q->index + 1) << 12); | |
50 | cookie |= pack->index; | |
51 | ||
52 | return cookie; | |
53 | } | |
54 | ||
55 | static | |
99da185a JD |
56 | struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev, |
57 | u16 cookie, | |
5100d5ac MB |
58 | struct b43_pio_txpacket **pack) |
59 | { | |
60 | struct b43_pio *pio = &dev->pio; | |
61 | struct b43_pio_txqueue *q = NULL; | |
62 | unsigned int pack_index; | |
63 | ||
64 | switch (cookie & 0xF000) { | |
65 | case 0x1000: | |
66 | q = pio->tx_queue_AC_BK; | |
67 | break; | |
68 | case 0x2000: | |
69 | q = pio->tx_queue_AC_BE; | |
70 | break; | |
71 | case 0x3000: | |
72 | q = pio->tx_queue_AC_VI; | |
73 | break; | |
74 | case 0x4000: | |
75 | q = pio->tx_queue_AC_VO; | |
76 | break; | |
77 | case 0x5000: | |
78 | q = pio->tx_queue_mcast; | |
79 | break; | |
80 | } | |
81 | if (B43_WARN_ON(!q)) | |
82 | return NULL; | |
83 | pack_index = (cookie & 0x0FFF); | |
84 | if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets))) | |
85 | return NULL; | |
86 | *pack = &q->packets[pack_index]; | |
87 | ||
88 | return q; | |
89 | } | |
90 | ||
91 | static u16 index_to_pioqueue_base(struct b43_wldev *dev, | |
92 | unsigned int index) | |
93 | { | |
94 | static const u16 bases[] = { | |
95 | B43_MMIO_PIO_BASE0, | |
96 | B43_MMIO_PIO_BASE1, | |
97 | B43_MMIO_PIO_BASE2, | |
98 | B43_MMIO_PIO_BASE3, | |
99 | B43_MMIO_PIO_BASE4, | |
100 | B43_MMIO_PIO_BASE5, | |
101 | B43_MMIO_PIO_BASE6, | |
102 | B43_MMIO_PIO_BASE7, | |
103 | }; | |
104 | static const u16 bases_rev11[] = { | |
105 | B43_MMIO_PIO11_BASE0, | |
106 | B43_MMIO_PIO11_BASE1, | |
107 | B43_MMIO_PIO11_BASE2, | |
108 | B43_MMIO_PIO11_BASE3, | |
109 | B43_MMIO_PIO11_BASE4, | |
110 | B43_MMIO_PIO11_BASE5, | |
111 | }; | |
112 | ||
113 | if (dev->dev->id.revision >= 11) { | |
114 | B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11)); | |
115 | return bases_rev11[index]; | |
116 | } | |
117 | B43_WARN_ON(index >= ARRAY_SIZE(bases)); | |
118 | return bases[index]; | |
119 | } | |
120 | ||
121 | static u16 pio_txqueue_offset(struct b43_wldev *dev) | |
122 | { | |
123 | if (dev->dev->id.revision >= 11) | |
124 | return 0x18; | |
125 | return 0; | |
126 | } | |
127 | ||
128 | static u16 pio_rxqueue_offset(struct b43_wldev *dev) | |
129 | { | |
130 | if (dev->dev->id.revision >= 11) | |
131 | return 0x38; | |
132 | return 8; | |
133 | } | |
134 | ||
99da185a JD |
135 | static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev, |
136 | unsigned int index) | |
5100d5ac MB |
137 | { |
138 | struct b43_pio_txqueue *q; | |
139 | struct b43_pio_txpacket *p; | |
140 | unsigned int i; | |
141 | ||
142 | q = kzalloc(sizeof(*q), GFP_KERNEL); | |
143 | if (!q) | |
144 | return NULL; | |
5100d5ac MB |
145 | q->dev = dev; |
146 | q->rev = dev->dev->id.revision; | |
147 | q->mmio_base = index_to_pioqueue_base(dev, index) + | |
148 | pio_txqueue_offset(dev); | |
149 | q->index = index; | |
150 | ||
151 | q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS; | |
152 | if (q->rev >= 8) { | |
153 | q->buffer_size = 1920; //FIXME this constant is wrong. | |
154 | } else { | |
155 | q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE); | |
156 | q->buffer_size -= 80; | |
157 | } | |
158 | ||
159 | INIT_LIST_HEAD(&q->packets_list); | |
160 | for (i = 0; i < ARRAY_SIZE(q->packets); i++) { | |
161 | p = &(q->packets[i]); | |
162 | INIT_LIST_HEAD(&p->list); | |
163 | p->index = i; | |
164 | p->queue = q; | |
165 | list_add(&p->list, &q->packets_list); | |
166 | } | |
167 | ||
168 | return q; | |
169 | } | |
170 | ||
99da185a JD |
171 | static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev, |
172 | unsigned int index) | |
5100d5ac MB |
173 | { |
174 | struct b43_pio_rxqueue *q; | |
175 | ||
176 | q = kzalloc(sizeof(*q), GFP_KERNEL); | |
177 | if (!q) | |
178 | return NULL; | |
5100d5ac MB |
179 | q->dev = dev; |
180 | q->rev = dev->dev->id.revision; | |
181 | q->mmio_base = index_to_pioqueue_base(dev, index) + | |
182 | pio_rxqueue_offset(dev); | |
5100d5ac MB |
183 | |
184 | /* Enable Direct FIFO RX (PIO) on the engine. */ | |
185 | b43_dma_direct_fifo_rx(dev, index, 1); | |
186 | ||
187 | return q; | |
188 | } | |
189 | ||
190 | static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q) | |
191 | { | |
192 | struct b43_pio_txpacket *pack; | |
193 | unsigned int i; | |
194 | ||
195 | for (i = 0; i < ARRAY_SIZE(q->packets); i++) { | |
196 | pack = &(q->packets[i]); | |
197 | if (pack->skb) { | |
198 | dev_kfree_skb_any(pack->skb); | |
199 | pack->skb = NULL; | |
200 | } | |
201 | } | |
202 | } | |
203 | ||
204 | static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q, | |
205 | const char *name) | |
206 | { | |
207 | if (!q) | |
208 | return; | |
209 | b43_pio_cancel_tx_packets(q); | |
210 | kfree(q); | |
211 | } | |
212 | ||
213 | static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q, | |
214 | const char *name) | |
215 | { | |
216 | if (!q) | |
217 | return; | |
218 | kfree(q); | |
219 | } | |
220 | ||
221 | #define destroy_queue_tx(pio, queue) do { \ | |
222 | b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \ | |
223 | (pio)->queue = NULL; \ | |
224 | } while (0) | |
225 | ||
226 | #define destroy_queue_rx(pio, queue) do { \ | |
227 | b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \ | |
228 | (pio)->queue = NULL; \ | |
229 | } while (0) | |
230 | ||
231 | void b43_pio_free(struct b43_wldev *dev) | |
232 | { | |
233 | struct b43_pio *pio; | |
234 | ||
235 | if (!b43_using_pio_transfers(dev)) | |
236 | return; | |
237 | pio = &dev->pio; | |
238 | ||
239 | destroy_queue_rx(pio, rx_queue); | |
240 | destroy_queue_tx(pio, tx_queue_mcast); | |
241 | destroy_queue_tx(pio, tx_queue_AC_VO); | |
242 | destroy_queue_tx(pio, tx_queue_AC_VI); | |
243 | destroy_queue_tx(pio, tx_queue_AC_BE); | |
244 | destroy_queue_tx(pio, tx_queue_AC_BK); | |
245 | } | |
246 | ||
5100d5ac MB |
247 | int b43_pio_init(struct b43_wldev *dev) |
248 | { | |
249 | struct b43_pio *pio = &dev->pio; | |
250 | int err = -ENOMEM; | |
251 | ||
252 | b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL) | |
253 | & ~B43_MACCTL_BE); | |
254 | b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0); | |
255 | ||
256 | pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0); | |
257 | if (!pio->tx_queue_AC_BK) | |
258 | goto out; | |
259 | ||
260 | pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1); | |
261 | if (!pio->tx_queue_AC_BE) | |
262 | goto err_destroy_bk; | |
263 | ||
264 | pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2); | |
265 | if (!pio->tx_queue_AC_VI) | |
266 | goto err_destroy_be; | |
267 | ||
268 | pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3); | |
269 | if (!pio->tx_queue_AC_VO) | |
270 | goto err_destroy_vi; | |
271 | ||
272 | pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4); | |
273 | if (!pio->tx_queue_mcast) | |
274 | goto err_destroy_vo; | |
275 | ||
276 | pio->rx_queue = b43_setup_pioqueue_rx(dev, 0); | |
277 | if (!pio->rx_queue) | |
278 | goto err_destroy_mcast; | |
279 | ||
280 | b43dbg(dev->wl, "PIO initialized\n"); | |
281 | err = 0; | |
282 | out: | |
283 | return err; | |
284 | ||
285 | err_destroy_mcast: | |
286 | destroy_queue_tx(pio, tx_queue_mcast); | |
287 | err_destroy_vo: | |
288 | destroy_queue_tx(pio, tx_queue_AC_VO); | |
289 | err_destroy_vi: | |
290 | destroy_queue_tx(pio, tx_queue_AC_VI); | |
291 | err_destroy_be: | |
292 | destroy_queue_tx(pio, tx_queue_AC_BE); | |
293 | err_destroy_bk: | |
294 | destroy_queue_tx(pio, tx_queue_AC_BK); | |
295 | return err; | |
296 | } | |
297 | ||
298 | /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */ | |
99da185a JD |
299 | static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev, |
300 | u8 queue_prio) | |
5100d5ac MB |
301 | { |
302 | struct b43_pio_txqueue *q; | |
303 | ||
403a3a13 | 304 | if (dev->qos_enabled) { |
5100d5ac MB |
305 | /* 0 = highest priority */ |
306 | switch (queue_prio) { | |
307 | default: | |
308 | B43_WARN_ON(1); | |
309 | /* fallthrough */ | |
310 | case 0: | |
311 | q = dev->pio.tx_queue_AC_VO; | |
312 | break; | |
313 | case 1: | |
314 | q = dev->pio.tx_queue_AC_VI; | |
315 | break; | |
316 | case 2: | |
317 | q = dev->pio.tx_queue_AC_BE; | |
318 | break; | |
319 | case 3: | |
320 | q = dev->pio.tx_queue_AC_BK; | |
321 | break; | |
322 | } | |
323 | } else | |
324 | q = dev->pio.tx_queue_AC_BE; | |
325 | ||
326 | return q; | |
327 | } | |
328 | ||
d8c17e15 MB |
329 | static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q, |
330 | u16 ctl, | |
331 | const void *_data, | |
332 | unsigned int data_len) | |
5100d5ac | 333 | { |
d8c17e15 | 334 | struct b43_wldev *dev = q->dev; |
5100d5ac | 335 | const u8 *data = _data; |
d8c17e15 MB |
336 | |
337 | ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI; | |
338 | b43_piotx_write16(q, B43_PIO_TXCTL, ctl); | |
339 | ||
340 | ssb_block_write(dev->dev, data, (data_len & ~1), | |
341 | q->mmio_base + B43_PIO_TXDATA, | |
342 | sizeof(u16)); | |
343 | if (data_len & 1) { | |
b96ab540 MB |
344 | u8 tail[2] = { 0, }; |
345 | ||
d8c17e15 MB |
346 | /* Write the last byte. */ |
347 | ctl &= ~B43_PIO_TXCTL_WRITEHI; | |
348 | b43_piotx_write16(q, B43_PIO_TXCTL, ctl); | |
b96ab540 MB |
349 | tail[0] = data[data_len - 1]; |
350 | ssb_block_write(dev->dev, tail, 2, | |
351 | q->mmio_base + B43_PIO_TXDATA, | |
352 | sizeof(u16)); | |
5100d5ac | 353 | } |
d8c17e15 MB |
354 | |
355 | return ctl; | |
5100d5ac MB |
356 | } |
357 | ||
358 | static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack, | |
359 | const u8 *hdr, unsigned int hdrlen) | |
360 | { | |
361 | struct b43_pio_txqueue *q = pack->queue; | |
362 | const char *frame = pack->skb->data; | |
363 | unsigned int frame_len = pack->skb->len; | |
364 | u16 ctl; | |
365 | ||
366 | ctl = b43_piotx_read16(q, B43_PIO_TXCTL); | |
367 | ctl |= B43_PIO_TXCTL_FREADY; | |
368 | ctl &= ~B43_PIO_TXCTL_EOF; | |
369 | ||
370 | /* Transfer the header data. */ | |
d8c17e15 | 371 | ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen); |
5100d5ac | 372 | /* Transfer the frame data. */ |
d8c17e15 | 373 | ctl = tx_write_2byte_queue(q, ctl, frame, frame_len); |
5100d5ac MB |
374 | |
375 | ctl |= B43_PIO_TXCTL_EOF; | |
376 | b43_piotx_write16(q, B43_PIO_TXCTL, ctl); | |
377 | } | |
378 | ||
d8c17e15 MB |
379 | static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q, |
380 | u32 ctl, | |
381 | const void *_data, | |
382 | unsigned int data_len) | |
5100d5ac | 383 | { |
d8c17e15 | 384 | struct b43_wldev *dev = q->dev; |
5100d5ac | 385 | const u8 *data = _data; |
d8c17e15 MB |
386 | |
387 | ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 | | |
388 | B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31; | |
389 | b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); | |
390 | ||
391 | ssb_block_write(dev->dev, data, (data_len & ~3), | |
392 | q->mmio_base + B43_PIO8_TXDATA, | |
393 | sizeof(u32)); | |
394 | if (data_len & 3) { | |
b96ab540 | 395 | u8 tail[4] = { 0, }; |
d8c17e15 MB |
396 | |
397 | /* Write the last few bytes. */ | |
398 | ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 | | |
399 | B43_PIO8_TXCTL_24_31); | |
d8c17e15 MB |
400 | switch (data_len & 3) { |
401 | case 3: | |
b96ab540 MB |
402 | ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15; |
403 | tail[0] = data[data_len - 3]; | |
404 | tail[1] = data[data_len - 2]; | |
405 | tail[2] = data[data_len - 1]; | |
406 | break; | |
d8c17e15 MB |
407 | case 2: |
408 | ctl |= B43_PIO8_TXCTL_8_15; | |
b96ab540 MB |
409 | tail[0] = data[data_len - 2]; |
410 | tail[1] = data[data_len - 1]; | |
411 | break; | |
d8c17e15 | 412 | case 1: |
b96ab540 MB |
413 | tail[0] = data[data_len - 1]; |
414 | break; | |
5100d5ac | 415 | } |
d8c17e15 | 416 | b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); |
b96ab540 MB |
417 | ssb_block_write(dev->dev, tail, 4, |
418 | q->mmio_base + B43_PIO8_TXDATA, | |
419 | sizeof(u32)); | |
5100d5ac | 420 | } |
d8c17e15 MB |
421 | |
422 | return ctl; | |
5100d5ac MB |
423 | } |
424 | ||
425 | static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack, | |
426 | const u8 *hdr, unsigned int hdrlen) | |
427 | { | |
428 | struct b43_pio_txqueue *q = pack->queue; | |
429 | const char *frame = pack->skb->data; | |
430 | unsigned int frame_len = pack->skb->len; | |
431 | u32 ctl; | |
432 | ||
433 | ctl = b43_piotx_read32(q, B43_PIO8_TXCTL); | |
434 | ctl |= B43_PIO8_TXCTL_FREADY; | |
435 | ctl &= ~B43_PIO8_TXCTL_EOF; | |
436 | ||
437 | /* Transfer the header data. */ | |
d8c17e15 | 438 | ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen); |
5100d5ac | 439 | /* Transfer the frame data. */ |
d8c17e15 | 440 | ctl = tx_write_4byte_queue(q, ctl, frame, frame_len); |
5100d5ac MB |
441 | |
442 | ctl |= B43_PIO8_TXCTL_EOF; | |
443 | b43_piotx_write32(q, B43_PIO_TXCTL, ctl); | |
444 | } | |
445 | ||
446 | static int pio_tx_frame(struct b43_pio_txqueue *q, | |
e039fa4a | 447 | struct sk_buff *skb) |
5100d5ac MB |
448 | { |
449 | struct b43_pio_txpacket *pack; | |
450 | struct b43_txhdr txhdr; | |
451 | u16 cookie; | |
452 | int err; | |
453 | unsigned int hdrlen; | |
e039fa4a | 454 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
5100d5ac MB |
455 | |
456 | B43_WARN_ON(list_empty(&q->packets_list)); | |
457 | pack = list_entry(q->packets_list.next, | |
458 | struct b43_pio_txpacket, list); | |
5100d5ac MB |
459 | |
460 | cookie = generate_cookie(q, pack); | |
461 | hdrlen = b43_txhdr_size(q->dev); | |
035d0243 | 462 | err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb, |
463 | info, cookie); | |
5100d5ac MB |
464 | if (err) |
465 | return err; | |
466 | ||
e039fa4a | 467 | if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) { |
5100d5ac MB |
468 | /* Tell the firmware about the cookie of the last |
469 | * mcast frame, so it can clear the more-data bit in it. */ | |
470 | b43_shm_write16(q->dev, B43_SHM_SHARED, | |
471 | B43_SHM_SH_MCASTCOOKIE, cookie); | |
472 | } | |
473 | ||
474 | pack->skb = skb; | |
475 | if (q->rev >= 8) | |
476 | pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen); | |
477 | else | |
478 | pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen); | |
479 | ||
480 | /* Remove it from the list of available packet slots. | |
481 | * It will be put back when we receive the status report. */ | |
482 | list_del(&pack->list); | |
483 | ||
484 | /* Update the queue statistics. */ | |
485 | q->buffer_used += roundup(skb->len + hdrlen, 4); | |
486 | q->free_packet_slots -= 1; | |
487 | ||
488 | return 0; | |
489 | } | |
490 | ||
e039fa4a | 491 | int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb) |
5100d5ac MB |
492 | { |
493 | struct b43_pio_txqueue *q; | |
494 | struct ieee80211_hdr *hdr; | |
5100d5ac MB |
495 | unsigned int hdrlen, total_len; |
496 | int err = 0; | |
e039fa4a | 497 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
5100d5ac MB |
498 | |
499 | hdr = (struct ieee80211_hdr *)skb->data; | |
e039fa4a JB |
500 | |
501 | if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) { | |
5100d5ac MB |
502 | /* The multicast queue will be sent after the DTIM. */ |
503 | q = dev->pio.tx_queue_mcast; | |
504 | /* Set the frame More-Data bit. Ucode will clear it | |
505 | * for us on the last frame. */ | |
506 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); | |
507 | } else { | |
508 | /* Decide by priority where to put this frame. */ | |
e2530083 | 509 | q = select_queue_by_priority(dev, skb_get_queue_mapping(skb)); |
5100d5ac MB |
510 | } |
511 | ||
5100d5ac MB |
512 | hdrlen = b43_txhdr_size(dev); |
513 | total_len = roundup(skb->len + hdrlen, 4); | |
514 | ||
515 | if (unlikely(total_len > q->buffer_size)) { | |
516 | err = -ENOBUFS; | |
517 | b43dbg(dev->wl, "PIO: TX packet longer than queue.\n"); | |
637dae3f | 518 | goto out; |
5100d5ac MB |
519 | } |
520 | if (unlikely(q->free_packet_slots == 0)) { | |
521 | err = -ENOBUFS; | |
522 | b43warn(dev->wl, "PIO: TX packet overflow.\n"); | |
637dae3f | 523 | goto out; |
5100d5ac MB |
524 | } |
525 | B43_WARN_ON(q->buffer_used > q->buffer_size); | |
526 | ||
527 | if (total_len > (q->buffer_size - q->buffer_used)) { | |
528 | /* Not enough memory on the queue. */ | |
529 | err = -EBUSY; | |
e2530083 | 530 | ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb)); |
5100d5ac | 531 | q->stopped = 1; |
637dae3f | 532 | goto out; |
5100d5ac MB |
533 | } |
534 | ||
535 | /* Assign the queue number to the ring (if not already done before) | |
536 | * so TX status handling can use it. The mac80211-queue to b43-queue | |
537 | * mapping is static, so we don't need to store it per frame. */ | |
e2530083 | 538 | q->queue_prio = skb_get_queue_mapping(skb); |
5100d5ac | 539 | |
e039fa4a | 540 | err = pio_tx_frame(q, skb); |
5100d5ac MB |
541 | if (unlikely(err == -ENOKEY)) { |
542 | /* Drop this packet, as we don't have the encryption key | |
543 | * anymore and must not transmit it unencrypted. */ | |
544 | dev_kfree_skb_any(skb); | |
545 | err = 0; | |
637dae3f | 546 | goto out; |
5100d5ac MB |
547 | } |
548 | if (unlikely(err)) { | |
549 | b43err(dev->wl, "PIO transmission failure\n"); | |
637dae3f | 550 | goto out; |
5100d5ac MB |
551 | } |
552 | q->nr_tx_packets++; | |
553 | ||
554 | B43_WARN_ON(q->buffer_used > q->buffer_size); | |
555 | if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) || | |
556 | (q->free_packet_slots == 0)) { | |
557 | /* The queue is full. */ | |
e2530083 | 558 | ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb)); |
5100d5ac MB |
559 | q->stopped = 1; |
560 | } | |
561 | ||
637dae3f | 562 | out: |
5100d5ac MB |
563 | return err; |
564 | } | |
565 | ||
5100d5ac MB |
566 | void b43_pio_handle_txstatus(struct b43_wldev *dev, |
567 | const struct b43_txstatus *status) | |
568 | { | |
569 | struct b43_pio_txqueue *q; | |
570 | struct b43_pio_txpacket *pack = NULL; | |
571 | unsigned int total_len; | |
e039fa4a | 572 | struct ieee80211_tx_info *info; |
5100d5ac MB |
573 | |
574 | q = parse_cookie(dev, status->cookie, &pack); | |
575 | if (unlikely(!q)) | |
576 | return; | |
577 | B43_WARN_ON(!pack); | |
578 | ||
14a7dd6f | 579 | info = IEEE80211_SKB_CB(pack->skb); |
e039fa4a | 580 | |
e6a9854b | 581 | b43_fill_txstatus_report(dev, info, status); |
5100d5ac MB |
582 | |
583 | total_len = pack->skb->len + b43_txhdr_size(dev); | |
584 | total_len = roundup(total_len, 4); | |
585 | q->buffer_used -= total_len; | |
586 | q->free_packet_slots += 1; | |
587 | ||
ce6c4a13 | 588 | ieee80211_tx_status(dev->wl->hw, pack->skb); |
5100d5ac MB |
589 | pack->skb = NULL; |
590 | list_add(&pack->list, &q->packets_list); | |
591 | ||
592 | if (q->stopped) { | |
593 | ieee80211_wake_queue(dev->wl->hw, q->queue_prio); | |
594 | q->stopped = 0; | |
595 | } | |
5100d5ac MB |
596 | } |
597 | ||
598 | void b43_pio_get_tx_stats(struct b43_wldev *dev, | |
599 | struct ieee80211_tx_queue_stats *stats) | |
600 | { | |
601 | const int nr_queues = dev->wl->hw->queues; | |
602 | struct b43_pio_txqueue *q; | |
5100d5ac MB |
603 | int i; |
604 | ||
605 | for (i = 0; i < nr_queues; i++) { | |
5100d5ac MB |
606 | q = select_queue_by_priority(dev, i); |
607 | ||
57ffc589 JB |
608 | stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots; |
609 | stats[i].limit = B43_PIO_MAX_NR_TXPACKETS; | |
610 | stats[i].count = q->nr_tx_packets; | |
5100d5ac MB |
611 | } |
612 | } | |
613 | ||
614 | /* Returns whether we should fetch another frame. */ | |
615 | static bool pio_rx_frame(struct b43_pio_rxqueue *q) | |
616 | { | |
d8c17e15 | 617 | struct b43_wldev *dev = q->dev; |
5100d5ac MB |
618 | struct b43_rxhdr_fw4 rxhdr; |
619 | u16 len; | |
620 | u32 macstat; | |
621 | unsigned int i, padding; | |
622 | struct sk_buff *skb; | |
623 | const char *err_msg = NULL; | |
624 | ||
625 | memset(&rxhdr, 0, sizeof(rxhdr)); | |
626 | ||
627 | /* Check if we have data and wait for it to get ready. */ | |
628 | if (q->rev >= 8) { | |
629 | u32 ctl; | |
630 | ||
631 | ctl = b43_piorx_read32(q, B43_PIO8_RXCTL); | |
632 | if (!(ctl & B43_PIO8_RXCTL_FRAMERDY)) | |
633 | return 0; | |
634 | b43_piorx_write32(q, B43_PIO8_RXCTL, | |
635 | B43_PIO8_RXCTL_FRAMERDY); | |
636 | for (i = 0; i < 10; i++) { | |
637 | ctl = b43_piorx_read32(q, B43_PIO8_RXCTL); | |
638 | if (ctl & B43_PIO8_RXCTL_DATARDY) | |
639 | goto data_ready; | |
640 | udelay(10); | |
641 | } | |
642 | } else { | |
643 | u16 ctl; | |
644 | ||
645 | ctl = b43_piorx_read16(q, B43_PIO_RXCTL); | |
646 | if (!(ctl & B43_PIO_RXCTL_FRAMERDY)) | |
647 | return 0; | |
648 | b43_piorx_write16(q, B43_PIO_RXCTL, | |
649 | B43_PIO_RXCTL_FRAMERDY); | |
650 | for (i = 0; i < 10; i++) { | |
651 | ctl = b43_piorx_read16(q, B43_PIO_RXCTL); | |
652 | if (ctl & B43_PIO_RXCTL_DATARDY) | |
653 | goto data_ready; | |
654 | udelay(10); | |
655 | } | |
656 | } | |
657 | b43dbg(q->dev->wl, "PIO RX timed out\n"); | |
658 | return 1; | |
659 | data_ready: | |
660 | ||
661 | /* Get the preamble (RX header) */ | |
662 | if (q->rev >= 8) { | |
d8c17e15 MB |
663 | ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr), |
664 | q->mmio_base + B43_PIO8_RXDATA, | |
665 | sizeof(u32)); | |
5100d5ac | 666 | } else { |
d8c17e15 MB |
667 | ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr), |
668 | q->mmio_base + B43_PIO_RXDATA, | |
669 | sizeof(u16)); | |
5100d5ac MB |
670 | } |
671 | /* Sanity checks. */ | |
672 | len = le16_to_cpu(rxhdr.frame_len); | |
673 | if (unlikely(len > 0x700)) { | |
674 | err_msg = "len > 0x700"; | |
675 | goto rx_error; | |
676 | } | |
677 | if (unlikely(len == 0)) { | |
678 | err_msg = "len == 0"; | |
679 | goto rx_error; | |
680 | } | |
681 | ||
682 | macstat = le32_to_cpu(rxhdr.mac_status); | |
683 | if (macstat & B43_RX_MAC_FCSERR) { | |
684 | if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) { | |
685 | /* Drop frames with failed FCS. */ | |
686 | err_msg = "Frame FCS error"; | |
687 | goto rx_error; | |
688 | } | |
689 | } | |
690 | ||
691 | /* We always pad 2 bytes, as that's what upstream code expects | |
692 | * due to the RX-header being 30 bytes. In case the frame is | |
693 | * unaligned, we pad another 2 bytes. */ | |
694 | padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0; | |
695 | skb = dev_alloc_skb(len + padding + 2); | |
696 | if (unlikely(!skb)) { | |
697 | err_msg = "Out of memory"; | |
698 | goto rx_error; | |
699 | } | |
700 | skb_reserve(skb, 2); | |
701 | skb_put(skb, len + padding); | |
702 | if (q->rev >= 8) { | |
d8c17e15 MB |
703 | ssb_block_read(dev->dev, skb->data + padding, (len & ~3), |
704 | q->mmio_base + B43_PIO8_RXDATA, | |
705 | sizeof(u32)); | |
706 | if (len & 3) { | |
b96ab540 | 707 | u8 tail[4] = { 0, }; |
d8c17e15 MB |
708 | |
709 | /* Read the last few bytes. */ | |
b96ab540 MB |
710 | ssb_block_read(dev->dev, tail, 4, |
711 | q->mmio_base + B43_PIO8_RXDATA, | |
712 | sizeof(u32)); | |
d8c17e15 MB |
713 | switch (len & 3) { |
714 | case 3: | |
b96ab540 MB |
715 | skb->data[len + padding - 3] = tail[0]; |
716 | skb->data[len + padding - 2] = tail[1]; | |
717 | skb->data[len + padding - 1] = tail[2]; | |
718 | break; | |
d8c17e15 | 719 | case 2: |
b96ab540 MB |
720 | skb->data[len + padding - 2] = tail[0]; |
721 | skb->data[len + padding - 1] = tail[1]; | |
722 | break; | |
d8c17e15 | 723 | case 1: |
b96ab540 MB |
724 | skb->data[len + padding - 1] = tail[0]; |
725 | break; | |
d8c17e15 | 726 | } |
5100d5ac MB |
727 | } |
728 | } else { | |
d8c17e15 MB |
729 | ssb_block_read(dev->dev, skb->data + padding, (len & ~1), |
730 | q->mmio_base + B43_PIO_RXDATA, | |
731 | sizeof(u16)); | |
732 | if (len & 1) { | |
b96ab540 | 733 | u8 tail[2] = { 0, }; |
5100d5ac | 734 | |
d8c17e15 | 735 | /* Read the last byte. */ |
b96ab540 MB |
736 | ssb_block_read(dev->dev, tail, 2, |
737 | q->mmio_base + B43_PIO_RXDATA, | |
738 | sizeof(u16)); | |
739 | skb->data[len + padding - 1] = tail[0]; | |
5100d5ac MB |
740 | } |
741 | } | |
742 | ||
743 | b43_rx(q->dev, skb, &rxhdr); | |
744 | ||
745 | return 1; | |
746 | ||
747 | rx_error: | |
748 | if (err_msg) | |
749 | b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg); | |
750 | b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY); | |
751 | return 1; | |
752 | } | |
753 | ||
77ca07ff | 754 | void b43_pio_rx(struct b43_pio_rxqueue *q) |
5100d5ac | 755 | { |
77ca07ff | 756 | unsigned int count = 0; |
5100d5ac MB |
757 | bool stop; |
758 | ||
77ca07ff | 759 | while (1) { |
5100d5ac | 760 | stop = (pio_rx_frame(q) == 0); |
5100d5ac MB |
761 | if (stop) |
762 | break; | |
77ca07ff MB |
763 | cond_resched(); |
764 | if (WARN_ON_ONCE(++count > 10000)) | |
765 | break; | |
766 | } | |
5100d5ac MB |
767 | } |
768 | ||
769 | static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q) | |
770 | { | |
5100d5ac MB |
771 | if (q->rev >= 8) { |
772 | b43_piotx_write32(q, B43_PIO8_TXCTL, | |
773 | b43_piotx_read32(q, B43_PIO8_TXCTL) | |
774 | | B43_PIO8_TXCTL_SUSPREQ); | |
775 | } else { | |
776 | b43_piotx_write16(q, B43_PIO_TXCTL, | |
777 | b43_piotx_read16(q, B43_PIO_TXCTL) | |
778 | | B43_PIO_TXCTL_SUSPREQ); | |
779 | } | |
5100d5ac MB |
780 | } |
781 | ||
782 | static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q) | |
783 | { | |
5100d5ac MB |
784 | if (q->rev >= 8) { |
785 | b43_piotx_write32(q, B43_PIO8_TXCTL, | |
786 | b43_piotx_read32(q, B43_PIO8_TXCTL) | |
787 | & ~B43_PIO8_TXCTL_SUSPREQ); | |
788 | } else { | |
789 | b43_piotx_write16(q, B43_PIO_TXCTL, | |
790 | b43_piotx_read16(q, B43_PIO_TXCTL) | |
791 | & ~B43_PIO_TXCTL_SUSPREQ); | |
792 | } | |
5100d5ac MB |
793 | } |
794 | ||
795 | void b43_pio_tx_suspend(struct b43_wldev *dev) | |
796 | { | |
797 | b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); | |
798 | b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK); | |
799 | b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE); | |
800 | b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI); | |
801 | b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO); | |
802 | b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast); | |
803 | } | |
804 | ||
805 | void b43_pio_tx_resume(struct b43_wldev *dev) | |
806 | { | |
807 | b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast); | |
808 | b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO); | |
809 | b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI); | |
810 | b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE); | |
811 | b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK); | |
812 | b43_power_saving_ctl_bits(dev, 0); | |
813 | } |