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e4d6b795 MB |
1 | /* |
2 | ||
3 | Broadcom B43 wireless driver | |
4 | ||
5 | Transmission (TX/RX) related functions. | |
6 | ||
7 | Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> | |
1f21ad2a | 8 | Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it> |
eb032b98 | 9 | Copyright (C) 2005, 2006 Michael Buesch <m@bues.ch> |
e4d6b795 MB |
10 | Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> |
11 | Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> | |
12 | ||
13 | This program is free software; you can redistribute it and/or modify | |
14 | it under the terms of the GNU General Public License as published by | |
15 | the Free Software Foundation; either version 2 of the License, or | |
16 | (at your option) any later version. | |
17 | ||
18 | This program is distributed in the hope that it will be useful, | |
19 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | GNU General Public License for more details. | |
22 | ||
23 | You should have received a copy of the GNU General Public License | |
24 | along with this program; see the file COPYING. If not, write to | |
25 | the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, | |
26 | Boston, MA 02110-1301, USA. | |
27 | ||
28 | */ | |
29 | ||
88499ab3 | 30 | #include "xmit.h" |
ef1a628d | 31 | #include "phy_common.h" |
e4d6b795 | 32 | #include "dma.h" |
5100d5ac | 33 | #include "pio.h" |
03b29773 | 34 | |
3311abbb RM |
35 | static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = { |
36 | { B43_CCK_RATE_1MB, 0x0, 0x0 }, | |
37 | { B43_CCK_RATE_2MB, 0x0, 0x1 }, | |
38 | { B43_CCK_RATE_5MB, 0x0, 0x2 }, | |
39 | { B43_CCK_RATE_11MB, 0x0, 0x3 }, | |
40 | { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK }, | |
41 | { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK }, | |
42 | { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK }, | |
43 | { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK }, | |
44 | { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 }, | |
45 | { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 }, | |
46 | { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 }, | |
47 | { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 }, | |
48 | }; | |
49 | ||
50 | static const struct b43_tx_legacy_rate_phy_ctl_entry * | |
51 | b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate) | |
52 | { | |
53 | const struct b43_tx_legacy_rate_phy_ctl_entry *e; | |
54 | unsigned int i; | |
55 | ||
56 | for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) { | |
57 | e = &(b43_tx_legacy_rate_phy_ctl[i]); | |
58 | if (e->bitrate == bitrate) | |
59 | return e; | |
60 | } | |
61 | ||
62 | B43_WARN_ON(1); | |
63 | return NULL; | |
64 | } | |
e4d6b795 | 65 | |
8318d78a JB |
66 | /* Extract the bitrate index out of a CCK PLCP header. */ |
67 | static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp) | |
e4d6b795 MB |
68 | { |
69 | switch (plcp->raw[0]) { | |
70 | case 0x0A: | |
8318d78a | 71 | return 0; |
e4d6b795 | 72 | case 0x14: |
8318d78a | 73 | return 1; |
e4d6b795 | 74 | case 0x37: |
8318d78a | 75 | return 2; |
e4d6b795 | 76 | case 0x6E: |
8318d78a | 77 | return 3; |
e4d6b795 | 78 | } |
8318d78a | 79 | return -1; |
e4d6b795 MB |
80 | } |
81 | ||
8318d78a | 82 | /* Extract the bitrate index out of an OFDM PLCP header. */ |
a3c0b87c | 83 | static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool aphy) |
e4d6b795 | 84 | { |
8318d78a JB |
85 | int base = aphy ? 0 : 4; |
86 | ||
e4d6b795 MB |
87 | switch (plcp->raw[0] & 0xF) { |
88 | case 0xB: | |
8318d78a | 89 | return base + 0; |
e4d6b795 | 90 | case 0xF: |
8318d78a | 91 | return base + 1; |
e4d6b795 | 92 | case 0xA: |
8318d78a | 93 | return base + 2; |
e4d6b795 | 94 | case 0xE: |
8318d78a | 95 | return base + 3; |
e4d6b795 | 96 | case 0x9: |
8318d78a | 97 | return base + 4; |
e4d6b795 | 98 | case 0xD: |
8318d78a | 99 | return base + 5; |
e4d6b795 | 100 | case 0x8: |
8318d78a | 101 | return base + 6; |
e4d6b795 | 102 | case 0xC: |
8318d78a | 103 | return base + 7; |
e4d6b795 | 104 | } |
8318d78a | 105 | return -1; |
e4d6b795 MB |
106 | } |
107 | ||
108 | u8 b43_plcp_get_ratecode_cck(const u8 bitrate) | |
109 | { | |
110 | switch (bitrate) { | |
111 | case B43_CCK_RATE_1MB: | |
112 | return 0x0A; | |
113 | case B43_CCK_RATE_2MB: | |
114 | return 0x14; | |
115 | case B43_CCK_RATE_5MB: | |
116 | return 0x37; | |
117 | case B43_CCK_RATE_11MB: | |
118 | return 0x6E; | |
119 | } | |
120 | B43_WARN_ON(1); | |
121 | return 0; | |
122 | } | |
123 | ||
124 | u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate) | |
125 | { | |
126 | switch (bitrate) { | |
127 | case B43_OFDM_RATE_6MB: | |
128 | return 0xB; | |
129 | case B43_OFDM_RATE_9MB: | |
130 | return 0xF; | |
131 | case B43_OFDM_RATE_12MB: | |
132 | return 0xA; | |
133 | case B43_OFDM_RATE_18MB: | |
134 | return 0xE; | |
135 | case B43_OFDM_RATE_24MB: | |
136 | return 0x9; | |
137 | case B43_OFDM_RATE_36MB: | |
138 | return 0xD; | |
139 | case B43_OFDM_RATE_48MB: | |
140 | return 0x8; | |
141 | case B43_OFDM_RATE_54MB: | |
142 | return 0xC; | |
143 | } | |
144 | B43_WARN_ON(1); | |
145 | return 0; | |
146 | } | |
147 | ||
148 | void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp, | |
149 | const u16 octets, const u8 bitrate) | |
150 | { | |
e4d6b795 MB |
151 | __u8 *raw = plcp->raw; |
152 | ||
153 | if (b43_is_ofdm_rate(bitrate)) { | |
1a09404a MB |
154 | u32 d; |
155 | ||
156 | d = b43_plcp_get_ratecode_ofdm(bitrate); | |
e4d6b795 | 157 | B43_WARN_ON(octets & 0xF000); |
1a09404a | 158 | d |= (octets << 5); |
b52a033c | 159 | plcp->data = cpu_to_le32(d); |
e4d6b795 MB |
160 | } else { |
161 | u32 plen; | |
162 | ||
163 | plen = octets * 16 / bitrate; | |
164 | if ((octets * 16 % bitrate) > 0) { | |
165 | plen++; | |
166 | if ((bitrate == B43_CCK_RATE_11MB) | |
167 | && ((octets * 8 % 11) < 4)) { | |
168 | raw[1] = 0x84; | |
169 | } else | |
170 | raw[1] = 0x04; | |
171 | } else | |
172 | raw[1] = 0x04; | |
b52a033c | 173 | plcp->data |= cpu_to_le32(plen << 16); |
e4d6b795 MB |
174 | raw[0] = b43_plcp_get_ratecode_cck(bitrate); |
175 | } | |
176 | } | |
177 | ||
694718d8 | 178 | /* TODO: verify if needed for SSLPN or LCN */ |
3311abbb RM |
179 | static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate) |
180 | { | |
181 | const struct b43_phy *phy = &dev->phy; | |
182 | const struct b43_tx_legacy_rate_phy_ctl_entry *e; | |
183 | u16 control = 0; | |
184 | u16 bw; | |
185 | ||
186 | if (phy->type == B43_PHYTYPE_LP) | |
187 | bw = B43_TXH_PHY1_BW_20; | |
188 | else /* FIXME */ | |
189 | bw = B43_TXH_PHY1_BW_20; | |
190 | ||
191 | if (0) { /* FIXME: MIMO */ | |
192 | } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) { | |
193 | control = bw; | |
194 | } else { | |
195 | control = bw; | |
196 | e = b43_tx_legacy_rate_phy_ctl_ent(bitrate); | |
197 | if (e) { | |
198 | control |= e->coding_rate; | |
199 | control |= e->modulation; | |
200 | } | |
201 | control |= B43_TXH_PHY1_MODE_SISO; | |
202 | } | |
203 | ||
204 | return control; | |
205 | } | |
206 | ||
e4d6b795 MB |
207 | static u8 b43_calc_fallback_rate(u8 bitrate) |
208 | { | |
209 | switch (bitrate) { | |
210 | case B43_CCK_RATE_1MB: | |
211 | return B43_CCK_RATE_1MB; | |
212 | case B43_CCK_RATE_2MB: | |
213 | return B43_CCK_RATE_1MB; | |
214 | case B43_CCK_RATE_5MB: | |
215 | return B43_CCK_RATE_2MB; | |
216 | case B43_CCK_RATE_11MB: | |
217 | return B43_CCK_RATE_5MB; | |
218 | case B43_OFDM_RATE_6MB: | |
219 | return B43_CCK_RATE_5MB; | |
220 | case B43_OFDM_RATE_9MB: | |
221 | return B43_OFDM_RATE_6MB; | |
222 | case B43_OFDM_RATE_12MB: | |
223 | return B43_OFDM_RATE_9MB; | |
224 | case B43_OFDM_RATE_18MB: | |
225 | return B43_OFDM_RATE_12MB; | |
226 | case B43_OFDM_RATE_24MB: | |
227 | return B43_OFDM_RATE_18MB; | |
228 | case B43_OFDM_RATE_36MB: | |
229 | return B43_OFDM_RATE_24MB; | |
230 | case B43_OFDM_RATE_48MB: | |
231 | return B43_OFDM_RATE_36MB; | |
232 | case B43_OFDM_RATE_54MB: | |
233 | return B43_OFDM_RATE_48MB; | |
234 | } | |
235 | B43_WARN_ON(1); | |
236 | return 0; | |
237 | } | |
238 | ||
eb189d8b | 239 | /* Generate a TX data header. */ |
09552ccd MB |
240 | int b43_generate_txhdr(struct b43_wldev *dev, |
241 | u8 *_txhdr, | |
035d0243 | 242 | struct sk_buff *skb_frag, |
e6a9854b | 243 | struct ieee80211_tx_info *info, |
09552ccd | 244 | u16 cookie) |
e4d6b795 | 245 | { |
035d0243 | 246 | const unsigned char *fragment_data = skb_frag->data; |
247 | unsigned int fragment_len = skb_frag->len; | |
eb189d8b | 248 | struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr; |
e4d6b795 MB |
249 | const struct b43_phy *phy = &dev->phy; |
250 | const struct ieee80211_hdr *wlhdr = | |
251 | (const struct ieee80211_hdr *)fragment_data; | |
d0f09804 | 252 | int use_encryption = !!info->control.hw_key; |
f37d9234 | 253 | __le16 fctl = wlhdr->frame_control; |
8318d78a | 254 | struct ieee80211_rate *fbrate; |
e4d6b795 MB |
255 | u8 rate, rate_fb; |
256 | int rate_ofdm, rate_fb_ofdm; | |
257 | unsigned int plcp_fragment_len; | |
258 | u32 mac_ctl = 0; | |
259 | u16 phy_ctl = 0; | |
694718d8 RM |
260 | bool fill_phy_ctl1 = (phy->type == B43_PHYTYPE_LP || |
261 | phy->type == B43_PHYTYPE_N || | |
262 | phy->type == B43_PHYTYPE_HT); | |
e4d6b795 | 263 | u8 extra_ft = 0; |
2e92e6f2 | 264 | struct ieee80211_rate *txrate; |
e6a9854b | 265 | struct ieee80211_tx_rate *rates; |
e4d6b795 MB |
266 | |
267 | memset(txhdr, 0, sizeof(*txhdr)); | |
268 | ||
e039fa4a | 269 | txrate = ieee80211_get_tx_rate(dev->wl->hw, info); |
2e92e6f2 | 270 | rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB; |
e4d6b795 | 271 | rate_ofdm = b43_is_ofdm_rate(rate); |
870abdf6 | 272 | fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate; |
8318d78a | 273 | rate_fb = fbrate->hw_value; |
e4d6b795 MB |
274 | rate_fb_ofdm = b43_is_ofdm_rate(rate_fb); |
275 | ||
276 | if (rate_ofdm) | |
277 | txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate); | |
278 | else | |
279 | txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate); | |
280 | txhdr->mac_frame_ctl = wlhdr->frame_control; | |
281 | memcpy(txhdr->tx_receiver, wlhdr->addr1, 6); | |
282 | ||
283 | /* Calculate duration for fallback rate */ | |
284 | if ((rate_fb == rate) || | |
285 | (wlhdr->duration_id & cpu_to_le16(0x8000)) || | |
286 | (wlhdr->duration_id == cpu_to_le16(0))) { | |
287 | /* If the fallback rate equals the normal rate or the | |
288 | * dur_id field contains an AID, CFP magic or 0, | |
289 | * use the original dur_id field. */ | |
290 | txhdr->dur_fb = wlhdr->duration_id; | |
291 | } else { | |
e039fa4a | 292 | txhdr->dur_fb = ieee80211_generic_frame_duration( |
4ee73f33 MK |
293 | dev->wl->hw, info->control.vif, info->band, |
294 | fragment_len, fbrate); | |
e4d6b795 MB |
295 | } |
296 | ||
297 | plcp_fragment_len = fragment_len + FCS_LEN; | |
298 | if (use_encryption) { | |
e039fa4a | 299 | u8 key_idx = info->control.hw_key->hw_key_idx; |
e4d6b795 MB |
300 | struct b43_key *key; |
301 | int wlhdr_len; | |
302 | size_t iv_len; | |
303 | ||
66d2d089 | 304 | B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key)); |
e4d6b795 | 305 | key = &(dev->key[key_idx]); |
7be1bb6b | 306 | |
09552ccd MB |
307 | if (unlikely(!key->keyconf)) { |
308 | /* This key is invalid. This might only happen | |
309 | * in a short timeframe after machine resume before | |
310 | * we were able to reconfigure keys. | |
311 | * Drop this packet completely. Do not transmit it | |
312 | * unencrypted to avoid leaking information. */ | |
313 | return -ENOKEY; | |
7be1bb6b | 314 | } |
09552ccd MB |
315 | |
316 | /* Hardware appends ICV. */ | |
76708dee | 317 | plcp_fragment_len += info->control.hw_key->icv_len; |
09552ccd MB |
318 | |
319 | key_idx = b43_kidx_to_fw(dev, key_idx); | |
320 | mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) & | |
321 | B43_TXH_MAC_KEYIDX; | |
322 | mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) & | |
323 | B43_TXH_MAC_KEYALG; | |
f37d9234 | 324 | wlhdr_len = ieee80211_hdrlen(fctl); |
035d0243 | 325 | if (key->algorithm == B43_SEC_ALGO_TKIP) { |
326 | u16 phase1key[5]; | |
327 | int i; | |
328 | /* we give the phase1key and iv16 here, the key is stored in | |
329 | * shm. With that the hardware can do phase 2 and encryption. | |
330 | */ | |
523b02ea | 331 | ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key); |
cde1b55b MB |
332 | /* phase1key is in host endian. Copy to little-endian txhdr->iv. */ |
333 | for (i = 0; i < 5; i++) { | |
334 | txhdr->iv[i * 2 + 0] = phase1key[i]; | |
335 | txhdr->iv[i * 2 + 1] = phase1key[i] >> 8; | |
336 | } | |
035d0243 | 337 | /* iv16 */ |
338 | memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3); | |
339 | } else { | |
340 | iv_len = min((size_t) info->control.hw_key->iv_len, | |
341 | ARRAY_SIZE(txhdr->iv)); | |
342 | memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len); | |
343 | } | |
e4d6b795 | 344 | } |
efe0249b | 345 | switch (dev->fw.hdr_format) { |
5d852905 RM |
346 | case B43_FW_HDR_598: |
347 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp), | |
348 | plcp_fragment_len, rate); | |
349 | break; | |
efe0249b | 350 | case B43_FW_HDR_351: |
2391b7e8 | 351 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp), |
eb189d8b | 352 | plcp_fragment_len, rate); |
efe0249b RM |
353 | break; |
354 | case B43_FW_HDR_410: | |
2391b7e8 | 355 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp), |
eb189d8b | 356 | plcp_fragment_len, rate); |
efe0249b | 357 | break; |
eb189d8b | 358 | } |
e4d6b795 MB |
359 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb), |
360 | plcp_fragment_len, rate_fb); | |
361 | ||
362 | /* Extra Frame Types */ | |
363 | if (rate_fb_ofdm) | |
eb189d8b MB |
364 | extra_ft |= B43_TXH_EFT_FB_OFDM; |
365 | else | |
366 | extra_ft |= B43_TXH_EFT_FB_CCK; | |
e4d6b795 MB |
367 | |
368 | /* Set channel radio code. Note that the micrcode ORs 0x100 to | |
369 | * this value before comparing it to the value in SHM, if this | |
370 | * is a 5Ghz packet. | |
371 | */ | |
372 | txhdr->chan_radio_code = phy->channel; | |
373 | ||
374 | /* PHY TX Control word */ | |
375 | if (rate_ofdm) | |
eb189d8b MB |
376 | phy_ctl |= B43_TXH_PHY_ENC_OFDM; |
377 | else | |
378 | phy_ctl |= B43_TXH_PHY_ENC_CCK; | |
e6a9854b | 379 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) |
eb189d8b | 380 | phy_ctl |= B43_TXH_PHY_SHORTPRMBL; |
9db1f6d7 | 381 | |
d748b464 | 382 | switch (b43_ieee80211_antenna_sanitize(dev, 0)) { |
9db1f6d7 | 383 | case 0: /* Default */ |
eb189d8b | 384 | phy_ctl |= B43_TXH_PHY_ANT01AUTO; |
e4d6b795 | 385 | break; |
9db1f6d7 | 386 | case 1: /* Antenna 0 */ |
eb189d8b | 387 | phy_ctl |= B43_TXH_PHY_ANT0; |
e4d6b795 | 388 | break; |
9db1f6d7 | 389 | case 2: /* Antenna 1 */ |
eb189d8b MB |
390 | phy_ctl |= B43_TXH_PHY_ANT1; |
391 | break; | |
392 | case 3: /* Antenna 2 */ | |
393 | phy_ctl |= B43_TXH_PHY_ANT2; | |
394 | break; | |
395 | case 4: /* Antenna 3 */ | |
396 | phy_ctl |= B43_TXH_PHY_ANT3; | |
e4d6b795 MB |
397 | break; |
398 | default: | |
399 | B43_WARN_ON(1); | |
400 | } | |
401 | ||
e6a9854b | 402 | rates = info->control.rates; |
e4d6b795 | 403 | /* MAC control */ |
e039fa4a | 404 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) |
eb189d8b | 405 | mac_ctl |= B43_TXH_MAC_ACK; |
f591fa5d JB |
406 | /* use hardware sequence counter as the non-TID counter */ |
407 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) | |
eb189d8b | 408 | mac_ctl |= B43_TXH_MAC_HWSEQ; |
e039fa4a | 409 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) |
eb189d8b | 410 | mac_ctl |= B43_TXH_MAC_STMSDU; |
e4d6b795 | 411 | if (phy->type == B43_PHYTYPE_A) |
eb189d8b | 412 | mac_ctl |= B43_TXH_MAC_5GHZ; |
e6a9854b JB |
413 | |
414 | /* Overwrite rates[0].count to make the retry calculation | |
415 | * in the tx status easier. need the actual retry limit to | |
416 | * detect whether the fallback rate was used. | |
417 | */ | |
418 | if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) || | |
419 | (rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) { | |
420 | rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count; | |
eb189d8b | 421 | mac_ctl |= B43_TXH_MAC_LONGFRAME; |
e6a9854b JB |
422 | } else { |
423 | rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count; | |
424 | } | |
e4d6b795 MB |
425 | |
426 | /* Generate the RTS or CTS-to-self frame */ | |
e6a9854b JB |
427 | if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) || |
428 | (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) { | |
e4d6b795 | 429 | unsigned int len; |
efe0249b | 430 | struct ieee80211_hdr *uninitialized_var(hdr); |
e4d6b795 MB |
431 | int rts_rate, rts_rate_fb; |
432 | int rts_rate_ofdm, rts_rate_fb_ofdm; | |
efe0249b | 433 | struct b43_plcp_hdr6 *uninitialized_var(plcp); |
2e92e6f2 | 434 | struct ieee80211_rate *rts_cts_rate; |
e4d6b795 | 435 | |
e039fa4a | 436 | rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info); |
2e92e6f2 JB |
437 | |
438 | rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB; | |
e4d6b795 MB |
439 | rts_rate_ofdm = b43_is_ofdm_rate(rts_rate); |
440 | rts_rate_fb = b43_calc_fallback_rate(rts_rate); | |
441 | rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb); | |
442 | ||
e6a9854b | 443 | if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
efe0249b | 444 | struct ieee80211_cts *uninitialized_var(cts); |
eb189d8b | 445 | |
efe0249b | 446 | switch (dev->fw.hdr_format) { |
5d852905 RM |
447 | case B43_FW_HDR_598: |
448 | cts = (struct ieee80211_cts *) | |
449 | (txhdr->format_598.rts_frame); | |
450 | break; | |
efe0249b | 451 | case B43_FW_HDR_351: |
eb189d8b | 452 | cts = (struct ieee80211_cts *) |
2391b7e8 | 453 | (txhdr->format_351.rts_frame); |
efe0249b RM |
454 | break; |
455 | case B43_FW_HDR_410: | |
eb189d8b | 456 | cts = (struct ieee80211_cts *) |
2391b7e8 | 457 | (txhdr->format_410.rts_frame); |
efe0249b | 458 | break; |
eb189d8b | 459 | } |
e039fa4a | 460 | ieee80211_ctstoself_get(dev->wl->hw, info->control.vif, |
e4d6b795 | 461 | fragment_data, fragment_len, |
e039fa4a | 462 | info, cts); |
eb189d8b | 463 | mac_ctl |= B43_TXH_MAC_SENDCTS; |
e4d6b795 MB |
464 | len = sizeof(struct ieee80211_cts); |
465 | } else { | |
efe0249b | 466 | struct ieee80211_rts *uninitialized_var(rts); |
eb189d8b | 467 | |
efe0249b | 468 | switch (dev->fw.hdr_format) { |
5d852905 RM |
469 | case B43_FW_HDR_598: |
470 | rts = (struct ieee80211_rts *) | |
471 | (txhdr->format_598.rts_frame); | |
472 | break; | |
efe0249b | 473 | case B43_FW_HDR_351: |
eb189d8b | 474 | rts = (struct ieee80211_rts *) |
2391b7e8 | 475 | (txhdr->format_351.rts_frame); |
efe0249b RM |
476 | break; |
477 | case B43_FW_HDR_410: | |
eb189d8b | 478 | rts = (struct ieee80211_rts *) |
2391b7e8 | 479 | (txhdr->format_410.rts_frame); |
efe0249b | 480 | break; |
eb189d8b | 481 | } |
e039fa4a | 482 | ieee80211_rts_get(dev->wl->hw, info->control.vif, |
eb189d8b | 483 | fragment_data, fragment_len, |
e039fa4a | 484 | info, rts); |
eb189d8b | 485 | mac_ctl |= B43_TXH_MAC_SENDRTS; |
e4d6b795 MB |
486 | len = sizeof(struct ieee80211_rts); |
487 | } | |
488 | len += FCS_LEN; | |
eb189d8b MB |
489 | |
490 | /* Generate the PLCP headers for the RTS/CTS frame */ | |
efe0249b | 491 | switch (dev->fw.hdr_format) { |
5d852905 RM |
492 | case B43_FW_HDR_598: |
493 | plcp = &txhdr->format_598.rts_plcp; | |
494 | break; | |
efe0249b | 495 | case B43_FW_HDR_351: |
2391b7e8 | 496 | plcp = &txhdr->format_351.rts_plcp; |
efe0249b RM |
497 | break; |
498 | case B43_FW_HDR_410: | |
2391b7e8 | 499 | plcp = &txhdr->format_410.rts_plcp; |
efe0249b RM |
500 | break; |
501 | } | |
eb189d8b MB |
502 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp, |
503 | len, rts_rate); | |
504 | plcp = &txhdr->rts_plcp_fb; | |
505 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp, | |
e4d6b795 | 506 | len, rts_rate_fb); |
eb189d8b | 507 | |
efe0249b | 508 | switch (dev->fw.hdr_format) { |
5d852905 RM |
509 | case B43_FW_HDR_598: |
510 | hdr = (struct ieee80211_hdr *) | |
511 | (&txhdr->format_598.rts_frame); | |
512 | break; | |
efe0249b | 513 | case B43_FW_HDR_351: |
eb189d8b | 514 | hdr = (struct ieee80211_hdr *) |
2391b7e8 | 515 | (&txhdr->format_351.rts_frame); |
efe0249b RM |
516 | break; |
517 | case B43_FW_HDR_410: | |
eb189d8b | 518 | hdr = (struct ieee80211_hdr *) |
2391b7e8 | 519 | (&txhdr->format_410.rts_frame); |
efe0249b | 520 | break; |
eb189d8b | 521 | } |
e4d6b795 | 522 | txhdr->rts_dur_fb = hdr->duration_id; |
eb189d8b | 523 | |
e4d6b795 | 524 | if (rts_rate_ofdm) { |
eb189d8b | 525 | extra_ft |= B43_TXH_EFT_RTS_OFDM; |
e4d6b795 MB |
526 | txhdr->phy_rate_rts = |
527 | b43_plcp_get_ratecode_ofdm(rts_rate); | |
eb189d8b MB |
528 | } else { |
529 | extra_ft |= B43_TXH_EFT_RTS_CCK; | |
e4d6b795 MB |
530 | txhdr->phy_rate_rts = |
531 | b43_plcp_get_ratecode_cck(rts_rate); | |
eb189d8b | 532 | } |
e4d6b795 | 533 | if (rts_rate_fb_ofdm) |
eb189d8b MB |
534 | extra_ft |= B43_TXH_EFT_RTSFB_OFDM; |
535 | else | |
536 | extra_ft |= B43_TXH_EFT_RTSFB_CCK; | |
3311abbb RM |
537 | |
538 | if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS && | |
694718d8 | 539 | fill_phy_ctl1) { |
3311abbb RM |
540 | txhdr->phy_ctl1_rts = cpu_to_le16( |
541 | b43_generate_tx_phy_ctl1(dev, rts_rate)); | |
542 | txhdr->phy_ctl1_rts_fb = cpu_to_le16( | |
543 | b43_generate_tx_phy_ctl1(dev, rts_rate_fb)); | |
544 | } | |
e4d6b795 MB |
545 | } |
546 | ||
547 | /* Magic cookie */ | |
efe0249b | 548 | switch (dev->fw.hdr_format) { |
5d852905 RM |
549 | case B43_FW_HDR_598: |
550 | txhdr->format_598.cookie = cpu_to_le16(cookie); | |
551 | break; | |
efe0249b | 552 | case B43_FW_HDR_351: |
2391b7e8 | 553 | txhdr->format_351.cookie = cpu_to_le16(cookie); |
efe0249b RM |
554 | break; |
555 | case B43_FW_HDR_410: | |
2391b7e8 | 556 | txhdr->format_410.cookie = cpu_to_le16(cookie); |
efe0249b RM |
557 | break; |
558 | } | |
e4d6b795 | 559 | |
694718d8 | 560 | if (fill_phy_ctl1) { |
3311abbb RM |
561 | txhdr->phy_ctl1 = |
562 | cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate)); | |
563 | txhdr->phy_ctl1_fb = | |
564 | cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb)); | |
565 | } | |
566 | ||
e4d6b795 MB |
567 | /* Apply the bitfields */ |
568 | txhdr->mac_ctl = cpu_to_le32(mac_ctl); | |
569 | txhdr->phy_ctl = cpu_to_le16(phy_ctl); | |
570 | txhdr->extra_ft = extra_ft; | |
e4d6b795 | 571 | |
09552ccd | 572 | return 0; |
e4d6b795 MB |
573 | } |
574 | ||
575 | static s8 b43_rssi_postprocess(struct b43_wldev *dev, | |
576 | u8 in_rssi, int ofdm, | |
577 | int adjust_2053, int adjust_2050) | |
578 | { | |
579 | struct b43_phy *phy = &dev->phy; | |
ef1a628d | 580 | struct b43_phy_g *gphy = phy->g; |
e4d6b795 MB |
581 | s32 tmp; |
582 | ||
583 | switch (phy->radio_ver) { | |
584 | case 0x2050: | |
585 | if (ofdm) { | |
586 | tmp = in_rssi; | |
587 | if (tmp > 127) | |
588 | tmp -= 256; | |
589 | tmp *= 73; | |
590 | tmp /= 64; | |
591 | if (adjust_2050) | |
592 | tmp += 25; | |
593 | else | |
594 | tmp -= 3; | |
595 | } else { | |
0581483a | 596 | if (dev->dev->bus_sprom-> |
e4d6b795 MB |
597 | boardflags_lo & B43_BFL_RSSI) { |
598 | if (in_rssi > 63) | |
599 | in_rssi = 63; | |
ef1a628d MB |
600 | B43_WARN_ON(phy->type != B43_PHYTYPE_G); |
601 | tmp = gphy->nrssi_lt[in_rssi]; | |
e4d6b795 MB |
602 | tmp = 31 - tmp; |
603 | tmp *= -131; | |
604 | tmp /= 128; | |
605 | tmp -= 57; | |
606 | } else { | |
607 | tmp = in_rssi; | |
608 | tmp = 31 - tmp; | |
609 | tmp *= -149; | |
610 | tmp /= 128; | |
611 | tmp -= 68; | |
612 | } | |
613 | if (phy->type == B43_PHYTYPE_G && adjust_2050) | |
614 | tmp += 25; | |
615 | } | |
616 | break; | |
617 | case 0x2060: | |
618 | if (in_rssi > 127) | |
619 | tmp = in_rssi - 256; | |
620 | else | |
621 | tmp = in_rssi; | |
622 | break; | |
623 | default: | |
624 | tmp = in_rssi; | |
625 | tmp -= 11; | |
626 | tmp *= 103; | |
627 | tmp /= 64; | |
628 | if (adjust_2053) | |
629 | tmp -= 109; | |
630 | else | |
631 | tmp -= 83; | |
632 | } | |
633 | ||
634 | return (s8) tmp; | |
635 | } | |
636 | ||
637 | //TODO | |
638 | #if 0 | |
639 | static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi) | |
640 | { | |
641 | struct b43_phy *phy = &dev->phy; | |
642 | s8 ret; | |
643 | ||
644 | if (phy->type == B43_PHYTYPE_A) { | |
645 | //TODO: Incomplete specs. | |
646 | ret = 0; | |
647 | } else | |
648 | ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1); | |
649 | ||
650 | return ret; | |
651 | } | |
652 | #endif | |
653 | ||
654 | void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr) | |
655 | { | |
656 | struct ieee80211_rx_status status; | |
657 | struct b43_plcp_hdr6 *plcp; | |
658 | struct ieee80211_hdr *wlhdr; | |
659 | const struct b43_rxhdr_fw4 *rxhdr = _rxhdr; | |
f37d9234 | 660 | __le16 fctl; |
17030f48 RM |
661 | u16 phystat0, phystat3; |
662 | u16 uninitialized_var(chanstat), uninitialized_var(mactime); | |
663 | u32 uninitialized_var(macstat); | |
e4d6b795 | 664 | u16 chanid; |
8318d78a | 665 | u16 phytype; |
1924b4e2 | 666 | int padding, rate_idx; |
e4d6b795 MB |
667 | |
668 | memset(&status, 0, sizeof(status)); | |
669 | ||
670 | /* Get metadata about the frame from the header. */ | |
671 | phystat0 = le16_to_cpu(rxhdr->phy_status0); | |
672 | phystat3 = le16_to_cpu(rxhdr->phy_status3); | |
17030f48 RM |
673 | switch (dev->fw.hdr_format) { |
674 | case B43_FW_HDR_598: | |
675 | macstat = le32_to_cpu(rxhdr->format_598.mac_status); | |
676 | mactime = le16_to_cpu(rxhdr->format_598.mac_time); | |
677 | chanstat = le16_to_cpu(rxhdr->format_598.channel); | |
678 | break; | |
679 | case B43_FW_HDR_410: | |
680 | case B43_FW_HDR_351: | |
681 | macstat = le32_to_cpu(rxhdr->format_351.mac_status); | |
682 | mactime = le16_to_cpu(rxhdr->format_351.mac_time); | |
683 | chanstat = le16_to_cpu(rxhdr->format_351.channel); | |
684 | break; | |
685 | } | |
8318d78a | 686 | phytype = chanstat & B43_RX_CHAN_PHYTYPE; |
e4d6b795 | 687 | |
ce4fbdbf | 688 | if (unlikely(macstat & B43_RX_MAC_FCSERR)) { |
e4d6b795 | 689 | dev->wl->ieee_stats.dot11FCSErrorCount++; |
ce4fbdbf MB |
690 | status.flag |= RX_FLAG_FAILED_FCS_CRC; |
691 | } | |
692 | if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV))) | |
693 | status.flag |= RX_FLAG_FAILED_PLCP_CRC; | |
694 | if (phystat0 & B43_RX_PHYST0_SHORTPRMBL) | |
695 | status.flag |= RX_FLAG_SHORTPRE; | |
e4d6b795 MB |
696 | if (macstat & B43_RX_MAC_DECERR) { |
697 | /* Decryption with the given key failed. | |
698 | * Drop the packet. We also won't be able to decrypt it with | |
699 | * the key in software. */ | |
700 | goto drop; | |
701 | } | |
702 | ||
703 | /* Skip PLCP and padding */ | |
704 | padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0; | |
705 | if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) { | |
706 | b43dbg(dev->wl, "RX: Packet size underrun (1)\n"); | |
707 | goto drop; | |
708 | } | |
709 | plcp = (struct b43_plcp_hdr6 *)(skb->data + padding); | |
710 | skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding); | |
711 | /* The skb contains the Wireless Header + payload data now */ | |
712 | if (unlikely(skb->len < (2 + 2 + 6 /*minimum hdr */ + FCS_LEN))) { | |
713 | b43dbg(dev->wl, "RX: Packet size underrun (2)\n"); | |
714 | goto drop; | |
715 | } | |
716 | wlhdr = (struct ieee80211_hdr *)(skb->data); | |
f37d9234 | 717 | fctl = wlhdr->frame_control; |
e4d6b795 MB |
718 | |
719 | if (macstat & B43_RX_MAC_DEC) { | |
720 | unsigned int keyidx; | |
721 | int wlhdr_len; | |
722 | ||
723 | keyidx = ((macstat & B43_RX_MAC_KEYIDX) | |
724 | >> B43_RX_MAC_KEYIDX_SHIFT); | |
725 | /* We must adjust the key index here. We want the "physical" | |
726 | * key index, but the ucode passed it slightly different. | |
727 | */ | |
728 | keyidx = b43_kidx_to_raw(dev, keyidx); | |
66d2d089 | 729 | B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key)); |
e4d6b795 MB |
730 | |
731 | if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) { | |
f37d9234 | 732 | wlhdr_len = ieee80211_hdrlen(fctl); |
e4d6b795 MB |
733 | if (unlikely(skb->len < (wlhdr_len + 3))) { |
734 | b43dbg(dev->wl, | |
735 | "RX: Packet size underrun (3)\n"); | |
736 | goto drop; | |
737 | } | |
738 | status.flag |= RX_FLAG_DECRYPTED; | |
739 | } | |
740 | } | |
741 | ||
7b584163 | 742 | /* Link quality statistics */ |
207ae4a3 | 743 | switch (chanstat & B43_RX_CHAN_PHYTYPE) { |
73d51f38 RM |
744 | case B43_PHYTYPE_HT: |
745 | /* TODO: is max the right choice? */ | |
746 | status.signal = max_t(__s8, | |
747 | max(rxhdr->phy_ht_power0, rxhdr->phy_ht_power1), | |
748 | rxhdr->phy_ht_power2); | |
749 | break; | |
207ae4a3 | 750 | case B43_PHYTYPE_N: |
73d51f38 | 751 | /* Broadcom has code for min and avg, but always uses max */ |
207ae4a3 RM |
752 | if (rxhdr->power0 == 16 || rxhdr->power0 == 32) |
753 | status.signal = max(rxhdr->power1, rxhdr->power2); | |
754 | else | |
755 | status.signal = max(rxhdr->power0, rxhdr->power1); | |
756 | break; | |
757 | case B43_PHYTYPE_A: | |
758 | case B43_PHYTYPE_B: | |
759 | case B43_PHYTYPE_G: | |
760 | case B43_PHYTYPE_LP: | |
566bfe5a | 761 | status.signal = b43_rssi_postprocess(dev, rxhdr->jssi, |
7b584163 MB |
762 | (phystat0 & B43_RX_PHYST0_OFDM), |
763 | (phystat0 & B43_RX_PHYST0_GAINCTL), | |
764 | (phystat3 & B43_RX_PHYST3_TRSTATE)); | |
207ae4a3 | 765 | break; |
7b584163 MB |
766 | } |
767 | ||
e4d6b795 | 768 | if (phystat0 & B43_RX_PHYST0_OFDM) |
1924b4e2 | 769 | rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp, |
8318d78a | 770 | phytype == B43_PHYTYPE_A); |
e4d6b795 | 771 | else |
1924b4e2 JB |
772 | rate_idx = b43_plcp_get_bitrate_idx_cck(plcp); |
773 | if (unlikely(rate_idx == -1)) { | |
ce4fbdbf MB |
774 | /* PLCP seems to be corrupted. |
775 | * Drop the frame, if we are not interested in corrupted frames. */ | |
776 | if (!(dev->wl->filter_flags & FIF_PLCPFAIL)) | |
777 | goto drop; | |
778 | } | |
1924b4e2 | 779 | status.rate_idx = rate_idx; |
e4d6b795 | 780 | status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT); |
c0ddd04d JL |
781 | |
782 | /* | |
d007b7f4 JB |
783 | * All frames on monitor interfaces and beacons always need a full |
784 | * 64-bit timestamp. Monitor interfaces need it for diagnostic | |
785 | * purposes and beacons for IBSS merging. | |
786 | * This code assumes we get to process the packet within 16 bits | |
787 | * of timestamp, i.e. about 65 milliseconds after the PHY received | |
788 | * the first symbol. | |
c0ddd04d | 789 | */ |
f37d9234 | 790 | if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) { |
c0ddd04d JL |
791 | u16 low_mactime_now; |
792 | ||
793 | b43_tsf_read(dev, &status.mactime); | |
794 | low_mactime_now = status.mactime; | |
795 | status.mactime = status.mactime & ~0xFFFFULL; | |
796 | status.mactime += mactime; | |
797 | if (low_mactime_now <= mactime) | |
798 | status.mactime -= 0x10000; | |
f4bda337 | 799 | status.flag |= RX_FLAG_MACTIME_START; |
c0ddd04d | 800 | } |
e4d6b795 MB |
801 | |
802 | chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT; | |
803 | switch (chanstat & B43_RX_CHAN_PHYTYPE) { | |
804 | case B43_PHYTYPE_A: | |
8318d78a | 805 | status.band = IEEE80211_BAND_5GHZ; |
d987160b MB |
806 | B43_WARN_ON(1); |
807 | /* FIXME: We don't really know which value the "chanid" contains. | |
808 | * So the following assignment might be wrong. */ | |
8318d78a | 809 | status.freq = b43_channel_to_freq_5ghz(chanid); |
e4d6b795 MB |
810 | break; |
811 | case B43_PHYTYPE_G: | |
8318d78a | 812 | status.band = IEEE80211_BAND_2GHZ; |
d987160b MB |
813 | /* chanid is the radio channel cookie value as used |
814 | * to tune the radio. */ | |
e4d6b795 | 815 | status.freq = chanid + 2400; |
d987160b MB |
816 | break; |
817 | case B43_PHYTYPE_N: | |
826ee706 | 818 | case B43_PHYTYPE_LP: |
6a461c23 | 819 | case B43_PHYTYPE_HT: |
d987160b MB |
820 | /* chanid is the SHM channel cookie. Which is the plain |
821 | * channel number in b43. */ | |
8318d78a JB |
822 | if (chanstat & B43_RX_CHAN_5GHZ) { |
823 | status.band = IEEE80211_BAND_5GHZ; | |
824 | status.freq = b43_freq_to_channel_5ghz(chanid); | |
825 | } else { | |
826 | status.band = IEEE80211_BAND_2GHZ; | |
827 | status.freq = b43_freq_to_channel_2ghz(chanid); | |
828 | } | |
e4d6b795 MB |
829 | break; |
830 | default: | |
831 | B43_WARN_ON(1); | |
d987160b | 832 | goto drop; |
e4d6b795 MB |
833 | } |
834 | ||
f1d58c25 | 835 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
72f5f457 | 836 | ieee80211_rx_ni(dev->wl->hw, skb); |
e4d6b795 | 837 | |
990b86f4 MB |
838 | #if B43_DEBUG |
839 | dev->rx_count++; | |
840 | #endif | |
e4d6b795 MB |
841 | return; |
842 | drop: | |
e4d6b795 MB |
843 | dev_kfree_skb_any(skb); |
844 | } | |
845 | ||
846 | void b43_handle_txstatus(struct b43_wldev *dev, | |
847 | const struct b43_txstatus *status) | |
848 | { | |
849 | b43_debugfs_log_txstat(dev, status); | |
850 | ||
851 | if (status->intermediate) | |
852 | return; | |
853 | if (status->for_ampdu) | |
854 | return; | |
855 | if (!status->acked) | |
856 | dev->wl->ieee_stats.dot11ACKFailureCount++; | |
857 | if (status->rts_count) { | |
858 | if (status->rts_count == 0xF) //FIXME | |
859 | dev->wl->ieee_stats.dot11RTSFailureCount++; | |
860 | else | |
861 | dev->wl->ieee_stats.dot11RTSSuccessCount++; | |
862 | } | |
863 | ||
5100d5ac MB |
864 | if (b43_using_pio_transfers(dev)) |
865 | b43_pio_handle_txstatus(dev, status); | |
866 | else | |
867 | b43_dma_handle_txstatus(dev, status); | |
18c8adeb MB |
868 | |
869 | b43_phy_txpower_check(dev, 0); | |
e4d6b795 MB |
870 | } |
871 | ||
5100d5ac MB |
872 | /* Fill out the mac80211 TXstatus report based on the b43-specific |
873 | * txstatus report data. This returns a boolean whether the frame was | |
874 | * successfully transmitted. */ | |
e6a9854b JB |
875 | bool b43_fill_txstatus_report(struct b43_wldev *dev, |
876 | struct ieee80211_tx_info *report, | |
5100d5ac | 877 | const struct b43_txstatus *status) |
e4d6b795 | 878 | { |
3db1cd5c | 879 | bool frame_success = true; |
e6a9854b JB |
880 | int retry_limit; |
881 | ||
882 | /* preserve the confiured retry limit before clearing the status | |
883 | * The xmit function has overwritten the rc's value with the actual | |
884 | * retry limit done by the hardware */ | |
885 | retry_limit = report->status.rates[0].count; | |
886 | ieee80211_tx_info_clear_status(report); | |
5100d5ac MB |
887 | |
888 | if (status->acked) { | |
889 | /* The frame was ACKed. */ | |
e039fa4a | 890 | report->flags |= IEEE80211_TX_STAT_ACK; |
5100d5ac MB |
891 | } else { |
892 | /* The frame was not ACKed... */ | |
e039fa4a | 893 | if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) { |
5100d5ac | 894 | /* ...but we expected an ACK. */ |
3db1cd5c | 895 | frame_success = false; |
5100d5ac MB |
896 | } |
897 | } | |
898 | if (status->frame_count == 0) { | |
899 | /* The frame was not transmitted at all. */ | |
e6a9854b JB |
900 | report->status.rates[0].count = 0; |
901 | } else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) { | |
902 | /* | |
903 | * If the short retries (RTS, not data frame) have exceeded | |
904 | * the limit, the hw will not have tried the selected rate, | |
905 | * but will have used the fallback rate instead. | |
906 | * Don't let the rate control count attempts for the selected | |
907 | * rate in this case, otherwise the statistics will be off. | |
908 | */ | |
909 | report->status.rates[0].count = 0; | |
910 | report->status.rates[1].count = status->frame_count; | |
911 | } else { | |
912 | if (status->frame_count > retry_limit) { | |
913 | report->status.rates[0].count = retry_limit; | |
914 | report->status.rates[1].count = status->frame_count - | |
915 | retry_limit; | |
916 | ||
917 | } else { | |
918 | report->status.rates[0].count = status->frame_count; | |
919 | report->status.rates[1].idx = -1; | |
920 | } | |
921 | } | |
5100d5ac MB |
922 | |
923 | return frame_success; | |
e4d6b795 MB |
924 | } |
925 | ||
926 | /* Stop any TX operation on the device (suspend the hardware queues) */ | |
927 | void b43_tx_suspend(struct b43_wldev *dev) | |
928 | { | |
5100d5ac MB |
929 | if (b43_using_pio_transfers(dev)) |
930 | b43_pio_tx_suspend(dev); | |
931 | else | |
932 | b43_dma_tx_suspend(dev); | |
e4d6b795 MB |
933 | } |
934 | ||
935 | /* Resume any TX operation on the device (resume the hardware queues) */ | |
936 | void b43_tx_resume(struct b43_wldev *dev) | |
937 | { | |
5100d5ac MB |
938 | if (b43_using_pio_transfers(dev)) |
939 | b43_pio_tx_resume(dev); | |
940 | else | |
941 | b43_dma_tx_resume(dev); | |
e4d6b795 | 942 | } |