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75388acd LF |
1 | /* |
2 | * | |
3 | * Broadcom B43legacy wireless driver | |
4 | * | |
5 | * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de> | |
6fff1c64 | 6 | * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it> |
eb032b98 | 7 | * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch> |
75388acd LF |
8 | * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> |
9 | * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> | |
10 | * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> | |
11 | * | |
12 | * Some parts of the code in this file are derived from the ipw2200 | |
13 | * driver Copyright(c) 2003 - 2004 Intel Corporation. | |
14 | ||
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; see the file COPYING. If not, write to | |
27 | * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, | |
28 | * Boston, MA 02110-1301, USA. | |
29 | * | |
30 | */ | |
31 | ||
32 | #include <linux/delay.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <linux/if_arp.h> | |
36 | #include <linux/etherdevice.h> | |
75388acd | 37 | #include <linux/firmware.h> |
75388acd | 38 | #include <linux/workqueue.h> |
d43c36dc | 39 | #include <linux/sched.h> |
75388acd LF |
40 | #include <linux/skbuff.h> |
41 | #include <linux/dma-mapping.h> | |
5a0e3ad6 | 42 | #include <linux/slab.h> |
75388acd LF |
43 | #include <net/dst.h> |
44 | #include <asm/unaligned.h> | |
45 | ||
46 | #include "b43legacy.h" | |
47 | #include "main.h" | |
48 | #include "debugfs.h" | |
49 | #include "phy.h" | |
50 | #include "dma.h" | |
51 | #include "pio.h" | |
52 | #include "sysfs.h" | |
53 | #include "xmit.h" | |
54 | #include "radio.h" | |
55 | ||
56 | ||
57 | MODULE_DESCRIPTION("Broadcom B43legacy wireless driver"); | |
58 | MODULE_AUTHOR("Martin Langer"); | |
59 | MODULE_AUTHOR("Stefano Brivio"); | |
60 | MODULE_AUTHOR("Michael Buesch"); | |
61 | MODULE_LICENSE("GPL"); | |
62 | ||
1a1c360d | 63 | MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID); |
c2f4f527 TG |
64 | MODULE_FIRMWARE("b43legacy/ucode2.fw"); |
65 | MODULE_FIRMWARE("b43legacy/ucode4.fw"); | |
1a1c360d | 66 | |
75388acd LF |
67 | #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO) |
68 | static int modparam_pio; | |
69 | module_param_named(pio, modparam_pio, int, 0444); | |
70 | MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode"); | |
71 | #elif defined(CONFIG_B43LEGACY_DMA) | |
72 | # define modparam_pio 0 | |
73 | #elif defined(CONFIG_B43LEGACY_PIO) | |
74 | # define modparam_pio 1 | |
75 | #endif | |
76 | ||
77 | static int modparam_bad_frames_preempt; | |
78 | module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444); | |
79 | MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames" | |
80 | " Preemption"); | |
81 | ||
75388acd LF |
82 | static char modparam_fwpostfix[16]; |
83 | module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444); | |
84 | MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load."); | |
85 | ||
75388acd LF |
86 | /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */ |
87 | static const struct ssb_device_id b43legacy_ssb_tbl[] = { | |
88 | SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2), | |
89 | SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4), | |
90 | SSB_DEVTABLE_END | |
91 | }; | |
92 | MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl); | |
93 | ||
94 | ||
95 | /* Channel and ratetables are shared for all devices. | |
96 | * They can't be const, because ieee80211 puts some precalculated | |
97 | * data in there. This data is the same for all devices, so we don't | |
98 | * get concurrency issues */ | |
99 | #define RATETAB_ENT(_rateid, _flags) \ | |
8318d78a JB |
100 | { \ |
101 | .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \ | |
102 | .hw_value = (_rateid), \ | |
103 | .flags = (_flags), \ | |
75388acd | 104 | } |
8318d78a JB |
105 | /* |
106 | * NOTE: When changing this, sync with xmit.c's | |
107 | * b43legacy_plcp_get_bitrate_idx_* functions! | |
108 | */ | |
75388acd | 109 | static struct ieee80211_rate __b43legacy_ratetable[] = { |
8318d78a JB |
110 | RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0), |
111 | RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE), | |
112 | RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE), | |
113 | RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE), | |
114 | RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0), | |
115 | RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0), | |
116 | RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0), | |
117 | RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0), | |
118 | RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0), | |
119 | RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0), | |
120 | RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0), | |
121 | RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0), | |
75388acd | 122 | }; |
75388acd LF |
123 | #define b43legacy_b_ratetable (__b43legacy_ratetable + 0) |
124 | #define b43legacy_b_ratetable_size 4 | |
125 | #define b43legacy_g_ratetable (__b43legacy_ratetable + 0) | |
126 | #define b43legacy_g_ratetable_size 12 | |
127 | ||
128 | #define CHANTAB_ENT(_chanid, _freq) \ | |
129 | { \ | |
8318d78a JB |
130 | .center_freq = (_freq), \ |
131 | .hw_value = (_chanid), \ | |
75388acd LF |
132 | } |
133 | static struct ieee80211_channel b43legacy_bg_chantable[] = { | |
134 | CHANTAB_ENT(1, 2412), | |
135 | CHANTAB_ENT(2, 2417), | |
136 | CHANTAB_ENT(3, 2422), | |
137 | CHANTAB_ENT(4, 2427), | |
138 | CHANTAB_ENT(5, 2432), | |
139 | CHANTAB_ENT(6, 2437), | |
140 | CHANTAB_ENT(7, 2442), | |
141 | CHANTAB_ENT(8, 2447), | |
142 | CHANTAB_ENT(9, 2452), | |
143 | CHANTAB_ENT(10, 2457), | |
144 | CHANTAB_ENT(11, 2462), | |
145 | CHANTAB_ENT(12, 2467), | |
146 | CHANTAB_ENT(13, 2472), | |
147 | CHANTAB_ENT(14, 2484), | |
148 | }; | |
8318d78a JB |
149 | |
150 | static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = { | |
151 | .channels = b43legacy_bg_chantable, | |
152 | .n_channels = ARRAY_SIZE(b43legacy_bg_chantable), | |
153 | .bitrates = b43legacy_b_ratetable, | |
154 | .n_bitrates = b43legacy_b_ratetable_size, | |
155 | }; | |
156 | ||
157 | static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = { | |
158 | .channels = b43legacy_bg_chantable, | |
159 | .n_channels = ARRAY_SIZE(b43legacy_bg_chantable), | |
160 | .bitrates = b43legacy_g_ratetable, | |
161 | .n_bitrates = b43legacy_g_ratetable_size, | |
162 | }; | |
75388acd LF |
163 | |
164 | static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev); | |
165 | static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev); | |
166 | static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev); | |
167 | static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev); | |
168 | ||
169 | ||
170 | static int b43legacy_ratelimit(struct b43legacy_wl *wl) | |
171 | { | |
172 | if (!wl || !wl->current_dev) | |
173 | return 1; | |
174 | if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED) | |
175 | return 1; | |
176 | /* We are up and running. | |
177 | * Ratelimit the messages to avoid DoS over the net. */ | |
178 | return net_ratelimit(); | |
179 | } | |
180 | ||
181 | void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) | |
182 | { | |
0e67d6cb | 183 | struct va_format vaf; |
75388acd LF |
184 | va_list args; |
185 | ||
186 | if (!b43legacy_ratelimit(wl)) | |
187 | return; | |
0e67d6cb | 188 | |
75388acd | 189 | va_start(args, fmt); |
0e67d6cb JP |
190 | |
191 | vaf.fmt = fmt; | |
192 | vaf.va = &args; | |
193 | ||
194 | printk(KERN_INFO "b43legacy-%s: %pV", | |
195 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | |
196 | ||
75388acd LF |
197 | va_end(args); |
198 | } | |
199 | ||
200 | void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) | |
201 | { | |
0e67d6cb | 202 | struct va_format vaf; |
75388acd LF |
203 | va_list args; |
204 | ||
205 | if (!b43legacy_ratelimit(wl)) | |
206 | return; | |
0e67d6cb | 207 | |
75388acd | 208 | va_start(args, fmt); |
0e67d6cb JP |
209 | |
210 | vaf.fmt = fmt; | |
211 | vaf.va = &args; | |
212 | ||
213 | printk(KERN_ERR "b43legacy-%s ERROR: %pV", | |
214 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | |
215 | ||
75388acd LF |
216 | va_end(args); |
217 | } | |
218 | ||
219 | void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) | |
220 | { | |
0e67d6cb | 221 | struct va_format vaf; |
75388acd LF |
222 | va_list args; |
223 | ||
224 | if (!b43legacy_ratelimit(wl)) | |
225 | return; | |
0e67d6cb | 226 | |
75388acd | 227 | va_start(args, fmt); |
0e67d6cb JP |
228 | |
229 | vaf.fmt = fmt; | |
230 | vaf.va = &args; | |
231 | ||
232 | printk(KERN_WARNING "b43legacy-%s warning: %pV", | |
233 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | |
234 | ||
75388acd LF |
235 | va_end(args); |
236 | } | |
237 | ||
238 | #if B43legacy_DEBUG | |
239 | void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) | |
240 | { | |
0e67d6cb | 241 | struct va_format vaf; |
75388acd LF |
242 | va_list args; |
243 | ||
244 | va_start(args, fmt); | |
0e67d6cb JP |
245 | |
246 | vaf.fmt = fmt; | |
247 | vaf.va = &args; | |
248 | ||
249 | printk(KERN_DEBUG "b43legacy-%s debug: %pV", | |
250 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | |
251 | ||
75388acd LF |
252 | va_end(args); |
253 | } | |
254 | #endif /* DEBUG */ | |
255 | ||
256 | static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset, | |
257 | u32 val) | |
258 | { | |
259 | u32 status; | |
260 | ||
261 | B43legacy_WARN_ON(offset % 4 != 0); | |
262 | ||
e78c9d28 SB |
263 | status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); |
264 | if (status & B43legacy_MACCTL_BE) | |
75388acd LF |
265 | val = swab32(val); |
266 | ||
267 | b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset); | |
268 | mmiowb(); | |
269 | b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val); | |
270 | } | |
271 | ||
272 | static inline | |
273 | void b43legacy_shm_control_word(struct b43legacy_wldev *dev, | |
274 | u16 routing, u16 offset) | |
275 | { | |
276 | u32 control; | |
277 | ||
278 | /* "offset" is the WORD offset. */ | |
279 | ||
280 | control = routing; | |
281 | control <<= 16; | |
282 | control |= offset; | |
283 | b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control); | |
284 | } | |
285 | ||
286 | u32 b43legacy_shm_read32(struct b43legacy_wldev *dev, | |
287 | u16 routing, u16 offset) | |
288 | { | |
289 | u32 ret; | |
290 | ||
291 | if (routing == B43legacy_SHM_SHARED) { | |
292 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
293 | if (offset & 0x0003) { | |
294 | /* Unaligned access */ | |
295 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
296 | ret = b43legacy_read16(dev, | |
297 | B43legacy_MMIO_SHM_DATA_UNALIGNED); | |
298 | ret <<= 16; | |
299 | b43legacy_shm_control_word(dev, routing, | |
300 | (offset >> 2) + 1); | |
301 | ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); | |
302 | ||
303 | return ret; | |
304 | } | |
305 | offset >>= 2; | |
306 | } | |
307 | b43legacy_shm_control_word(dev, routing, offset); | |
308 | ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA); | |
309 | ||
310 | return ret; | |
311 | } | |
312 | ||
313 | u16 b43legacy_shm_read16(struct b43legacy_wldev *dev, | |
314 | u16 routing, u16 offset) | |
315 | { | |
316 | u16 ret; | |
317 | ||
318 | if (routing == B43legacy_SHM_SHARED) { | |
319 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
320 | if (offset & 0x0003) { | |
321 | /* Unaligned access */ | |
322 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
323 | ret = b43legacy_read16(dev, | |
324 | B43legacy_MMIO_SHM_DATA_UNALIGNED); | |
325 | ||
326 | return ret; | |
327 | } | |
328 | offset >>= 2; | |
329 | } | |
330 | b43legacy_shm_control_word(dev, routing, offset); | |
331 | ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); | |
332 | ||
333 | return ret; | |
334 | } | |
335 | ||
336 | void b43legacy_shm_write32(struct b43legacy_wldev *dev, | |
337 | u16 routing, u16 offset, | |
338 | u32 value) | |
339 | { | |
340 | if (routing == B43legacy_SHM_SHARED) { | |
341 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
342 | if (offset & 0x0003) { | |
343 | /* Unaligned access */ | |
344 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
345 | mmiowb(); | |
346 | b43legacy_write16(dev, | |
347 | B43legacy_MMIO_SHM_DATA_UNALIGNED, | |
348 | (value >> 16) & 0xffff); | |
349 | mmiowb(); | |
350 | b43legacy_shm_control_word(dev, routing, | |
351 | (offset >> 2) + 1); | |
352 | mmiowb(); | |
353 | b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, | |
354 | value & 0xffff); | |
355 | return; | |
356 | } | |
357 | offset >>= 2; | |
358 | } | |
359 | b43legacy_shm_control_word(dev, routing, offset); | |
360 | mmiowb(); | |
361 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value); | |
362 | } | |
363 | ||
364 | void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset, | |
365 | u16 value) | |
366 | { | |
367 | if (routing == B43legacy_SHM_SHARED) { | |
368 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
369 | if (offset & 0x0003) { | |
370 | /* Unaligned access */ | |
371 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
372 | mmiowb(); | |
373 | b43legacy_write16(dev, | |
374 | B43legacy_MMIO_SHM_DATA_UNALIGNED, | |
375 | value); | |
376 | return; | |
377 | } | |
378 | offset >>= 2; | |
379 | } | |
380 | b43legacy_shm_control_word(dev, routing, offset); | |
381 | mmiowb(); | |
382 | b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value); | |
383 | } | |
384 | ||
385 | /* Read HostFlags */ | |
386 | u32 b43legacy_hf_read(struct b43legacy_wldev *dev) | |
387 | { | |
388 | u32 ret; | |
389 | ||
390 | ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
391 | B43legacy_SHM_SH_HOSTFHI); | |
392 | ret <<= 16; | |
393 | ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
394 | B43legacy_SHM_SH_HOSTFLO); | |
395 | ||
396 | return ret; | |
397 | } | |
398 | ||
399 | /* Write HostFlags */ | |
400 | void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value) | |
401 | { | |
402 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
403 | B43legacy_SHM_SH_HOSTFLO, | |
404 | (value & 0x0000FFFF)); | |
405 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
406 | B43legacy_SHM_SH_HOSTFHI, | |
407 | ((value & 0xFFFF0000) >> 16)); | |
408 | } | |
409 | ||
410 | void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf) | |
411 | { | |
412 | /* We need to be careful. As we read the TSF from multiple | |
413 | * registers, we should take care of register overflows. | |
414 | * In theory, the whole tsf read process should be atomic. | |
415 | * We try to be atomic here, by restaring the read process, | |
416 | * if any of the high registers changed (overflew). | |
417 | */ | |
418 | if (dev->dev->id.revision >= 3) { | |
419 | u32 low; | |
420 | u32 high; | |
421 | u32 high2; | |
422 | ||
423 | do { | |
424 | high = b43legacy_read32(dev, | |
425 | B43legacy_MMIO_REV3PLUS_TSF_HIGH); | |
426 | low = b43legacy_read32(dev, | |
427 | B43legacy_MMIO_REV3PLUS_TSF_LOW); | |
428 | high2 = b43legacy_read32(dev, | |
429 | B43legacy_MMIO_REV3PLUS_TSF_HIGH); | |
430 | } while (unlikely(high != high2)); | |
431 | ||
432 | *tsf = high; | |
433 | *tsf <<= 32; | |
434 | *tsf |= low; | |
435 | } else { | |
436 | u64 tmp; | |
437 | u16 v0; | |
438 | u16 v1; | |
439 | u16 v2; | |
440 | u16 v3; | |
441 | u16 test1; | |
442 | u16 test2; | |
443 | u16 test3; | |
444 | ||
445 | do { | |
446 | v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); | |
447 | v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); | |
448 | v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); | |
449 | v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0); | |
450 | ||
451 | test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); | |
452 | test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); | |
453 | test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); | |
454 | } while (v3 != test3 || v2 != test2 || v1 != test1); | |
455 | ||
456 | *tsf = v3; | |
457 | *tsf <<= 48; | |
458 | tmp = v2; | |
459 | tmp <<= 32; | |
460 | *tsf |= tmp; | |
461 | tmp = v1; | |
462 | tmp <<= 16; | |
463 | *tsf |= tmp; | |
464 | *tsf |= v0; | |
465 | } | |
466 | } | |
467 | ||
468 | static void b43legacy_time_lock(struct b43legacy_wldev *dev) | |
469 | { | |
470 | u32 status; | |
471 | ||
e78c9d28 SB |
472 | status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); |
473 | status |= B43legacy_MACCTL_TBTTHOLD; | |
474 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); | |
75388acd LF |
475 | mmiowb(); |
476 | } | |
477 | ||
478 | static void b43legacy_time_unlock(struct b43legacy_wldev *dev) | |
479 | { | |
480 | u32 status; | |
481 | ||
e78c9d28 SB |
482 | status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); |
483 | status &= ~B43legacy_MACCTL_TBTTHOLD; | |
484 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); | |
75388acd LF |
485 | } |
486 | ||
487 | static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf) | |
488 | { | |
489 | /* Be careful with the in-progress timer. | |
490 | * First zero out the low register, so we have a full | |
491 | * register-overflow duration to complete the operation. | |
492 | */ | |
493 | if (dev->dev->id.revision >= 3) { | |
494 | u32 lo = (tsf & 0x00000000FFFFFFFFULL); | |
495 | u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32; | |
496 | ||
497 | b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0); | |
498 | mmiowb(); | |
499 | b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH, | |
500 | hi); | |
501 | mmiowb(); | |
502 | b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, | |
503 | lo); | |
504 | } else { | |
505 | u16 v0 = (tsf & 0x000000000000FFFFULL); | |
506 | u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16; | |
507 | u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32; | |
508 | u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; | |
509 | ||
510 | b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0); | |
511 | mmiowb(); | |
512 | b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); | |
513 | mmiowb(); | |
514 | b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2); | |
515 | mmiowb(); | |
516 | b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1); | |
517 | mmiowb(); | |
518 | b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0); | |
519 | } | |
520 | } | |
521 | ||
522 | void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf) | |
523 | { | |
524 | b43legacy_time_lock(dev); | |
525 | b43legacy_tsf_write_locked(dev, tsf); | |
526 | b43legacy_time_unlock(dev); | |
527 | } | |
528 | ||
529 | static | |
530 | void b43legacy_macfilter_set(struct b43legacy_wldev *dev, | |
531 | u16 offset, const u8 *mac) | |
532 | { | |
533 | static const u8 zero_addr[ETH_ALEN] = { 0 }; | |
534 | u16 data; | |
535 | ||
536 | if (!mac) | |
537 | mac = zero_addr; | |
538 | ||
539 | offset |= 0x0020; | |
540 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset); | |
541 | ||
542 | data = mac[0]; | |
543 | data |= mac[1] << 8; | |
544 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); | |
545 | data = mac[2]; | |
546 | data |= mac[3] << 8; | |
547 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); | |
548 | data = mac[4]; | |
549 | data |= mac[5] << 8; | |
550 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); | |
551 | } | |
552 | ||
553 | static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev) | |
554 | { | |
555 | static const u8 zero_addr[ETH_ALEN] = { 0 }; | |
556 | const u8 *mac = dev->wl->mac_addr; | |
557 | const u8 *bssid = dev->wl->bssid; | |
558 | u8 mac_bssid[ETH_ALEN * 2]; | |
559 | int i; | |
560 | u32 tmp; | |
561 | ||
562 | if (!bssid) | |
563 | bssid = zero_addr; | |
564 | if (!mac) | |
565 | mac = zero_addr; | |
566 | ||
567 | b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid); | |
568 | ||
569 | memcpy(mac_bssid, mac, ETH_ALEN); | |
570 | memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN); | |
571 | ||
572 | /* Write our MAC address and BSSID to template ram */ | |
573 | for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) { | |
574 | tmp = (u32)(mac_bssid[i + 0]); | |
575 | tmp |= (u32)(mac_bssid[i + 1]) << 8; | |
576 | tmp |= (u32)(mac_bssid[i + 2]) << 16; | |
577 | tmp |= (u32)(mac_bssid[i + 3]) << 24; | |
578 | b43legacy_ram_write(dev, 0x20 + i, tmp); | |
579 | b43legacy_ram_write(dev, 0x78 + i, tmp); | |
580 | b43legacy_ram_write(dev, 0x478 + i, tmp); | |
581 | } | |
582 | } | |
583 | ||
4150c572 | 584 | static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev) |
75388acd | 585 | { |
75388acd | 586 | b43legacy_write_mac_bssid_templates(dev); |
4150c572 JB |
587 | b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, |
588 | dev->wl->mac_addr); | |
75388acd LF |
589 | } |
590 | ||
591 | static void b43legacy_set_slot_time(struct b43legacy_wldev *dev, | |
592 | u16 slot_time) | |
593 | { | |
594 | /* slot_time is in usec. */ | |
595 | if (dev->phy.type != B43legacy_PHYTYPE_G) | |
596 | return; | |
597 | b43legacy_write16(dev, 0x684, 510 + slot_time); | |
598 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010, | |
599 | slot_time); | |
600 | } | |
601 | ||
602 | static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev) | |
603 | { | |
604 | b43legacy_set_slot_time(dev, 9); | |
75388acd LF |
605 | } |
606 | ||
607 | static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev) | |
608 | { | |
609 | b43legacy_set_slot_time(dev, 20); | |
75388acd LF |
610 | } |
611 | ||
75388acd LF |
612 | /* Synchronize IRQ top- and bottom-half. |
613 | * IRQs must be masked before calling this. | |
614 | * This must not be called with the irq_lock held. | |
615 | */ | |
616 | static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev) | |
617 | { | |
618 | synchronize_irq(dev->dev->irq); | |
619 | tasklet_kill(&dev->isr_tasklet); | |
620 | } | |
621 | ||
622 | /* DummyTransmission function, as documented on | |
623 | * http://bcm-specs.sipsolutions.net/DummyTransmission | |
624 | */ | |
625 | void b43legacy_dummy_transmission(struct b43legacy_wldev *dev) | |
626 | { | |
627 | struct b43legacy_phy *phy = &dev->phy; | |
628 | unsigned int i; | |
629 | unsigned int max_loop; | |
630 | u16 value; | |
631 | u32 buffer[5] = { | |
632 | 0x00000000, | |
633 | 0x00D40000, | |
634 | 0x00000000, | |
635 | 0x01000000, | |
636 | 0x00000000, | |
637 | }; | |
638 | ||
639 | switch (phy->type) { | |
640 | case B43legacy_PHYTYPE_B: | |
641 | case B43legacy_PHYTYPE_G: | |
642 | max_loop = 0xFA; | |
643 | buffer[0] = 0x000B846E; | |
644 | break; | |
645 | default: | |
646 | B43legacy_BUG_ON(1); | |
647 | return; | |
648 | } | |
649 | ||
650 | for (i = 0; i < 5; i++) | |
651 | b43legacy_ram_write(dev, i * 4, buffer[i]); | |
652 | ||
653 | /* dummy read follows */ | |
e78c9d28 | 654 | b43legacy_read32(dev, B43legacy_MMIO_MACCTL); |
75388acd LF |
655 | |
656 | b43legacy_write16(dev, 0x0568, 0x0000); | |
657 | b43legacy_write16(dev, 0x07C0, 0x0000); | |
658 | b43legacy_write16(dev, 0x050C, 0x0000); | |
659 | b43legacy_write16(dev, 0x0508, 0x0000); | |
660 | b43legacy_write16(dev, 0x050A, 0x0000); | |
661 | b43legacy_write16(dev, 0x054C, 0x0000); | |
662 | b43legacy_write16(dev, 0x056A, 0x0014); | |
663 | b43legacy_write16(dev, 0x0568, 0x0826); | |
664 | b43legacy_write16(dev, 0x0500, 0x0000); | |
665 | b43legacy_write16(dev, 0x0502, 0x0030); | |
666 | ||
667 | if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) | |
668 | b43legacy_radio_write16(dev, 0x0051, 0x0017); | |
669 | for (i = 0x00; i < max_loop; i++) { | |
670 | value = b43legacy_read16(dev, 0x050E); | |
671 | if (value & 0x0080) | |
672 | break; | |
673 | udelay(10); | |
674 | } | |
675 | for (i = 0x00; i < 0x0A; i++) { | |
676 | value = b43legacy_read16(dev, 0x050E); | |
677 | if (value & 0x0400) | |
678 | break; | |
679 | udelay(10); | |
680 | } | |
681 | for (i = 0x00; i < 0x0A; i++) { | |
682 | value = b43legacy_read16(dev, 0x0690); | |
683 | if (!(value & 0x0100)) | |
684 | break; | |
685 | udelay(10); | |
686 | } | |
687 | if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) | |
688 | b43legacy_radio_write16(dev, 0x0051, 0x0037); | |
689 | } | |
690 | ||
691 | /* Turn the Analog ON/OFF */ | |
692 | static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on) | |
693 | { | |
694 | b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4); | |
695 | } | |
696 | ||
697 | void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags) | |
698 | { | |
699 | u32 tmslow; | |
700 | u32 macctl; | |
701 | ||
702 | flags |= B43legacy_TMSLOW_PHYCLKEN; | |
703 | flags |= B43legacy_TMSLOW_PHYRESET; | |
704 | ssb_device_enable(dev->dev, flags); | |
705 | msleep(2); /* Wait for the PLL to turn on. */ | |
706 | ||
707 | /* Now take the PHY out of Reset again */ | |
708 | tmslow = ssb_read32(dev->dev, SSB_TMSLOW); | |
709 | tmslow |= SSB_TMSLOW_FGC; | |
710 | tmslow &= ~B43legacy_TMSLOW_PHYRESET; | |
711 | ssb_write32(dev->dev, SSB_TMSLOW, tmslow); | |
712 | ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ | |
713 | msleep(1); | |
714 | tmslow &= ~SSB_TMSLOW_FGC; | |
715 | ssb_write32(dev->dev, SSB_TMSLOW, tmslow); | |
716 | ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ | |
717 | msleep(1); | |
718 | ||
719 | /* Turn Analog ON */ | |
720 | b43legacy_switch_analog(dev, 1); | |
721 | ||
722 | macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
723 | macctl &= ~B43legacy_MACCTL_GMODE; | |
724 | if (flags & B43legacy_TMSLOW_GMODE) { | |
725 | macctl |= B43legacy_MACCTL_GMODE; | |
726 | dev->phy.gmode = 1; | |
727 | } else | |
728 | dev->phy.gmode = 0; | |
729 | macctl |= B43legacy_MACCTL_IHR_ENABLED; | |
730 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
731 | } | |
732 | ||
733 | static void handle_irq_transmit_status(struct b43legacy_wldev *dev) | |
734 | { | |
735 | u32 v0; | |
736 | u32 v1; | |
737 | u16 tmp; | |
738 | struct b43legacy_txstatus stat; | |
739 | ||
740 | while (1) { | |
741 | v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); | |
742 | if (!(v0 & 0x00000001)) | |
743 | break; | |
744 | v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); | |
745 | ||
746 | stat.cookie = (v0 >> 16); | |
747 | stat.seq = (v1 & 0x0000FFFF); | |
748 | stat.phy_stat = ((v1 & 0x00FF0000) >> 16); | |
749 | tmp = (v0 & 0x0000FFFF); | |
750 | stat.frame_count = ((tmp & 0xF000) >> 12); | |
751 | stat.rts_count = ((tmp & 0x0F00) >> 8); | |
752 | stat.supp_reason = ((tmp & 0x001C) >> 2); | |
753 | stat.pm_indicated = !!(tmp & 0x0080); | |
754 | stat.intermediate = !!(tmp & 0x0040); | |
755 | stat.for_ampdu = !!(tmp & 0x0020); | |
756 | stat.acked = !!(tmp & 0x0002); | |
757 | ||
758 | b43legacy_handle_txstatus(dev, &stat); | |
759 | } | |
760 | } | |
761 | ||
762 | static void drain_txstatus_queue(struct b43legacy_wldev *dev) | |
763 | { | |
764 | u32 dummy; | |
765 | ||
766 | if (dev->dev->id.revision < 5) | |
767 | return; | |
768 | /* Read all entries from the microcode TXstatus FIFO | |
769 | * and throw them away. | |
770 | */ | |
771 | while (1) { | |
772 | dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); | |
773 | if (!(dummy & 0x00000001)) | |
774 | break; | |
775 | dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); | |
776 | } | |
777 | } | |
778 | ||
779 | static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev) | |
780 | { | |
781 | u32 val = 0; | |
782 | ||
783 | val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A); | |
784 | val <<= 16; | |
785 | val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408); | |
786 | ||
787 | return val; | |
788 | } | |
789 | ||
790 | static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi) | |
791 | { | |
792 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408, | |
793 | (jssi & 0x0000FFFF)); | |
794 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A, | |
795 | (jssi & 0xFFFF0000) >> 16); | |
796 | } | |
797 | ||
798 | static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev) | |
799 | { | |
800 | b43legacy_jssi_write(dev, 0x7F7F7F7F); | |
e78c9d28 | 801 | b43legacy_write32(dev, B43legacy_MMIO_MACCMD, |
eed0fd21 SB |
802 | b43legacy_read32(dev, B43legacy_MMIO_MACCMD) |
803 | | B43legacy_MACCMD_BGNOISE); | |
75388acd LF |
804 | B43legacy_WARN_ON(dev->noisecalc.channel_at_start != |
805 | dev->phy.channel); | |
806 | } | |
807 | ||
808 | static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev) | |
809 | { | |
810 | /* Top half of Link Quality calculation. */ | |
811 | ||
812 | if (dev->noisecalc.calculation_running) | |
813 | return; | |
814 | dev->noisecalc.channel_at_start = dev->phy.channel; | |
815 | dev->noisecalc.calculation_running = 1; | |
816 | dev->noisecalc.nr_samples = 0; | |
817 | ||
818 | b43legacy_generate_noise_sample(dev); | |
819 | } | |
820 | ||
821 | static void handle_irq_noise(struct b43legacy_wldev *dev) | |
822 | { | |
823 | struct b43legacy_phy *phy = &dev->phy; | |
824 | u16 tmp; | |
825 | u8 noise[4]; | |
826 | u8 i; | |
827 | u8 j; | |
828 | s32 average; | |
829 | ||
830 | /* Bottom half of Link Quality calculation. */ | |
831 | ||
832 | B43legacy_WARN_ON(!dev->noisecalc.calculation_running); | |
833 | if (dev->noisecalc.channel_at_start != phy->channel) | |
834 | goto drop_calculation; | |
835 | *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev)); | |
836 | if (noise[0] == 0x7F || noise[1] == 0x7F || | |
837 | noise[2] == 0x7F || noise[3] == 0x7F) | |
838 | goto generate_new; | |
839 | ||
840 | /* Get the noise samples. */ | |
841 | B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8); | |
842 | i = dev->noisecalc.nr_samples; | |
ca21614d HH |
843 | noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); |
844 | noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
845 | noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
846 | noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
75388acd LF |
847 | dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; |
848 | dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; | |
849 | dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; | |
850 | dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; | |
851 | dev->noisecalc.nr_samples++; | |
852 | if (dev->noisecalc.nr_samples == 8) { | |
853 | /* Calculate the Link Quality by the noise samples. */ | |
854 | average = 0; | |
855 | for (i = 0; i < 8; i++) { | |
856 | for (j = 0; j < 4; j++) | |
857 | average += dev->noisecalc.samples[i][j]; | |
858 | } | |
859 | average /= (8 * 4); | |
860 | average *= 125; | |
861 | average += 64; | |
862 | average /= 128; | |
863 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
864 | 0x40C); | |
865 | tmp = (tmp / 128) & 0x1F; | |
866 | if (tmp >= 8) | |
867 | average += 2; | |
868 | else | |
869 | average -= 25; | |
870 | if (tmp == 8) | |
871 | average -= 72; | |
872 | else | |
873 | average -= 48; | |
874 | ||
875 | dev->stats.link_noise = average; | |
876 | drop_calculation: | |
877 | dev->noisecalc.calculation_running = 0; | |
878 | return; | |
879 | } | |
880 | generate_new: | |
881 | b43legacy_generate_noise_sample(dev); | |
882 | } | |
883 | ||
884 | static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev) | |
885 | { | |
05c914fe | 886 | if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) { |
75388acd LF |
887 | /* TODO: PS TBTT */ |
888 | } else { | |
889 | if (1/*FIXME: the last PSpoll frame was sent successfully */) | |
890 | b43legacy_power_saving_ctl_bits(dev, -1, -1); | |
891 | } | |
05c914fe | 892 | if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) |
eed0fd21 | 893 | dev->dfq_valid = 1; |
75388acd LF |
894 | } |
895 | ||
896 | static void handle_irq_atim_end(struct b43legacy_wldev *dev) | |
897 | { | |
eed0fd21 SB |
898 | if (dev->dfq_valid) { |
899 | b43legacy_write32(dev, B43legacy_MMIO_MACCMD, | |
900 | b43legacy_read32(dev, B43legacy_MMIO_MACCMD) | |
901 | | B43legacy_MACCMD_DFQ_VALID); | |
902 | dev->dfq_valid = 0; | |
903 | } | |
75388acd LF |
904 | } |
905 | ||
906 | static void handle_irq_pmq(struct b43legacy_wldev *dev) | |
907 | { | |
908 | u32 tmp; | |
909 | ||
910 | /* TODO: AP mode. */ | |
911 | ||
912 | while (1) { | |
913 | tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS); | |
914 | if (!(tmp & 0x00000008)) | |
915 | break; | |
916 | } | |
917 | /* 16bit write is odd, but correct. */ | |
918 | b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002); | |
919 | } | |
920 | ||
921 | static void b43legacy_write_template_common(struct b43legacy_wldev *dev, | |
922 | const u8 *data, u16 size, | |
923 | u16 ram_offset, | |
924 | u16 shm_size_offset, u8 rate) | |
925 | { | |
926 | u32 i; | |
927 | u32 tmp; | |
928 | struct b43legacy_plcp_hdr4 plcp; | |
929 | ||
930 | plcp.data = 0; | |
931 | b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate); | |
932 | b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); | |
933 | ram_offset += sizeof(u32); | |
934 | /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet. | |
935 | * So leave the first two bytes of the next write blank. | |
936 | */ | |
937 | tmp = (u32)(data[0]) << 16; | |
938 | tmp |= (u32)(data[1]) << 24; | |
939 | b43legacy_ram_write(dev, ram_offset, tmp); | |
940 | ram_offset += sizeof(u32); | |
941 | for (i = 2; i < size; i += sizeof(u32)) { | |
942 | tmp = (u32)(data[i + 0]); | |
943 | if (i + 1 < size) | |
944 | tmp |= (u32)(data[i + 1]) << 8; | |
945 | if (i + 2 < size) | |
946 | tmp |= (u32)(data[i + 2]) << 16; | |
947 | if (i + 3 < size) | |
948 | tmp |= (u32)(data[i + 3]) << 24; | |
949 | b43legacy_ram_write(dev, ram_offset + i - 2, tmp); | |
950 | } | |
951 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset, | |
952 | size + sizeof(struct b43legacy_plcp_hdr6)); | |
953 | } | |
954 | ||
2d1f96dd LF |
955 | /* Convert a b43legacy antenna number value to the PHY TX control value. */ |
956 | static u16 b43legacy_antenna_to_phyctl(int antenna) | |
957 | { | |
958 | switch (antenna) { | |
959 | case B43legacy_ANTENNA0: | |
960 | return B43legacy_TX4_PHY_ANT0; | |
961 | case B43legacy_ANTENNA1: | |
962 | return B43legacy_TX4_PHY_ANT1; | |
963 | } | |
964 | return B43legacy_TX4_PHY_ANTLAST; | |
965 | } | |
966 | ||
75388acd LF |
967 | static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev, |
968 | u16 ram_offset, | |
2d1f96dd | 969 | u16 shm_size_offset) |
75388acd | 970 | { |
75388acd | 971 | |
a297170d SB |
972 | unsigned int i, len, variable_len; |
973 | const struct ieee80211_mgmt *bcn; | |
974 | const u8 *ie; | |
975 | bool tim_found = 0; | |
2d1f96dd LF |
976 | unsigned int rate; |
977 | u16 ctl; | |
978 | int antenna; | |
979 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon); | |
a297170d SB |
980 | |
981 | bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data); | |
982 | len = min((size_t)dev->wl->current_beacon->len, | |
75388acd | 983 | 0x200 - sizeof(struct b43legacy_plcp_hdr6)); |
2d1f96dd | 984 | rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value; |
a297170d SB |
985 | |
986 | b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset, | |
75388acd | 987 | shm_size_offset, rate); |
a297170d | 988 | |
2d1f96dd LF |
989 | /* Write the PHY TX control parameters. */ |
990 | antenna = B43legacy_ANTENNA_DEFAULT; | |
991 | antenna = b43legacy_antenna_to_phyctl(antenna); | |
992 | ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
993 | B43legacy_SHM_SH_BEACPHYCTL); | |
994 | /* We can't send beacons with short preamble. Would get PHY errors. */ | |
995 | ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL; | |
996 | ctl &= ~B43legacy_TX4_PHY_ANT; | |
997 | ctl &= ~B43legacy_TX4_PHY_ENC; | |
998 | ctl |= antenna; | |
999 | ctl |= B43legacy_TX4_PHY_ENC_CCK; | |
1000 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1001 | B43legacy_SHM_SH_BEACPHYCTL, ctl); | |
1002 | ||
a297170d SB |
1003 | /* Find the position of the TIM and the DTIM_period value |
1004 | * and write them to SHM. */ | |
1005 | ie = bcn->u.beacon.variable; | |
1006 | variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
1007 | for (i = 0; i < variable_len - 2; ) { | |
1008 | uint8_t ie_id, ie_len; | |
1009 | ||
1010 | ie_id = ie[i]; | |
1011 | ie_len = ie[i + 1]; | |
1012 | if (ie_id == 5) { | |
1013 | u16 tim_position; | |
1014 | u16 dtim_period; | |
1015 | /* This is the TIM Information Element */ | |
1016 | ||
1017 | /* Check whether the ie_len is in the beacon data range. */ | |
1018 | if (variable_len < ie_len + 2 + i) | |
1019 | break; | |
1020 | /* A valid TIM is at least 4 bytes long. */ | |
1021 | if (ie_len < 4) | |
1022 | break; | |
1023 | tim_found = 1; | |
1024 | ||
1025 | tim_position = sizeof(struct b43legacy_plcp_hdr6); | |
1026 | tim_position += offsetof(struct ieee80211_mgmt, | |
1027 | u.beacon.variable); | |
1028 | tim_position += i; | |
1029 | ||
1030 | dtim_period = ie[i + 3]; | |
1031 | ||
1032 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1033 | B43legacy_SHM_SH_TIMPOS, tim_position); | |
1034 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1035 | B43legacy_SHM_SH_DTIMP, dtim_period); | |
1036 | break; | |
1037 | } | |
1038 | i += ie_len + 2; | |
1039 | } | |
1040 | if (!tim_found) { | |
1041 | b43legacywarn(dev->wl, "Did not find a valid TIM IE in the " | |
1042 | "beacon template packet. AP or IBSS operation " | |
1043 | "may be broken.\n"); | |
7858e07b LF |
1044 | } else |
1045 | b43legacydbg(dev->wl, "Updated beacon template\n"); | |
75388acd LF |
1046 | } |
1047 | ||
1048 | static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev, | |
1049 | u16 shm_offset, u16 size, | |
8318d78a | 1050 | struct ieee80211_rate *rate) |
75388acd LF |
1051 | { |
1052 | struct b43legacy_plcp_hdr4 plcp; | |
1053 | u32 tmp; | |
1054 | __le16 dur; | |
1055 | ||
1056 | plcp.data = 0; | |
2d1f96dd | 1057 | b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value); |
75388acd | 1058 | dur = ieee80211_generic_frame_duration(dev->wl->hw, |
32bfd35d | 1059 | dev->wl->vif, |
75388acd | 1060 | size, |
8318d78a | 1061 | rate); |
75388acd LF |
1062 | /* Write PLCP in two parts and timing for packet transfer */ |
1063 | tmp = le32_to_cpu(plcp.data); | |
1064 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset, | |
1065 | tmp & 0xFFFF); | |
1066 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2, | |
1067 | tmp >> 16); | |
1068 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6, | |
1069 | le16_to_cpu(dur)); | |
1070 | } | |
1071 | ||
1072 | /* Instead of using custom probe response template, this function | |
1073 | * just patches custom beacon template by: | |
1074 | * 1) Changing packet type | |
1075 | * 2) Patching duration field | |
1076 | * 3) Stripping TIM | |
1077 | */ | |
a297170d SB |
1078 | static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev, |
1079 | u16 *dest_size, | |
1080 | struct ieee80211_rate *rate) | |
75388acd LF |
1081 | { |
1082 | const u8 *src_data; | |
1083 | u8 *dest_data; | |
a297170d | 1084 | u16 src_size, elem_size, src_pos, dest_pos; |
75388acd LF |
1085 | __le16 dur; |
1086 | struct ieee80211_hdr *hdr; | |
a297170d SB |
1087 | size_t ie_start; |
1088 | ||
1089 | src_size = dev->wl->current_beacon->len; | |
1090 | src_data = (const u8 *)dev->wl->current_beacon->data; | |
75388acd | 1091 | |
a297170d SB |
1092 | /* Get the start offset of the variable IEs in the packet. */ |
1093 | ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable); | |
1094 | B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt, | |
1095 | u.beacon.variable)); | |
75388acd | 1096 | |
4688be30 | 1097 | if (B43legacy_WARN_ON(src_size < ie_start)) |
75388acd | 1098 | return NULL; |
75388acd LF |
1099 | |
1100 | dest_data = kmalloc(src_size, GFP_ATOMIC); | |
1101 | if (unlikely(!dest_data)) | |
1102 | return NULL; | |
1103 | ||
a297170d SB |
1104 | /* Copy the static data and all Information Elements, except the TIM. */ |
1105 | memcpy(dest_data, src_data, ie_start); | |
1106 | src_pos = ie_start; | |
1107 | dest_pos = ie_start; | |
1108 | for ( ; src_pos < src_size - 2; src_pos += elem_size) { | |
75388acd | 1109 | elem_size = src_data[src_pos + 1] + 2; |
a297170d SB |
1110 | if (src_data[src_pos] == 5) { |
1111 | /* This is the TIM. */ | |
1112 | continue; | |
75388acd | 1113 | } |
a297170d SB |
1114 | memcpy(dest_data + dest_pos, src_data + src_pos, elem_size); |
1115 | dest_pos += elem_size; | |
75388acd LF |
1116 | } |
1117 | *dest_size = dest_pos; | |
1118 | hdr = (struct ieee80211_hdr *)dest_data; | |
1119 | ||
1120 | /* Set the frame control. */ | |
1121 | hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | | |
1122 | IEEE80211_STYPE_PROBE_RESP); | |
1123 | dur = ieee80211_generic_frame_duration(dev->wl->hw, | |
32bfd35d | 1124 | dev->wl->vif, |
75388acd | 1125 | *dest_size, |
8318d78a | 1126 | rate); |
75388acd LF |
1127 | hdr->duration_id = dur; |
1128 | ||
1129 | return dest_data; | |
1130 | } | |
1131 | ||
1132 | static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev, | |
1133 | u16 ram_offset, | |
8318d78a JB |
1134 | u16 shm_size_offset, |
1135 | struct ieee80211_rate *rate) | |
75388acd | 1136 | { |
a297170d | 1137 | const u8 *probe_resp_data; |
75388acd LF |
1138 | u16 size; |
1139 | ||
a297170d | 1140 | size = dev->wl->current_beacon->len; |
75388acd LF |
1141 | probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate); |
1142 | if (unlikely(!probe_resp_data)) | |
1143 | return; | |
1144 | ||
1145 | /* Looks like PLCP headers plus packet timings are stored for | |
1146 | * all possible basic rates | |
1147 | */ | |
1148 | b43legacy_write_probe_resp_plcp(dev, 0x31A, size, | |
8318d78a | 1149 | &b43legacy_b_ratetable[0]); |
75388acd | 1150 | b43legacy_write_probe_resp_plcp(dev, 0x32C, size, |
8318d78a | 1151 | &b43legacy_b_ratetable[1]); |
75388acd | 1152 | b43legacy_write_probe_resp_plcp(dev, 0x33E, size, |
8318d78a | 1153 | &b43legacy_b_ratetable[2]); |
75388acd | 1154 | b43legacy_write_probe_resp_plcp(dev, 0x350, size, |
8318d78a | 1155 | &b43legacy_b_ratetable[3]); |
75388acd LF |
1156 | |
1157 | size = min((size_t)size, | |
1158 | 0x200 - sizeof(struct b43legacy_plcp_hdr6)); | |
1159 | b43legacy_write_template_common(dev, probe_resp_data, | |
1160 | size, ram_offset, | |
2d1f96dd | 1161 | shm_size_offset, rate->hw_value); |
75388acd LF |
1162 | kfree(probe_resp_data); |
1163 | } | |
1164 | ||
2d1f96dd LF |
1165 | static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev) |
1166 | { | |
1167 | struct b43legacy_wl *wl = dev->wl; | |
1168 | ||
1169 | if (wl->beacon0_uploaded) | |
1170 | return; | |
1171 | b43legacy_write_beacon_template(dev, 0x68, 0x18); | |
1172 | /* FIXME: Probe resp upload doesn't really belong here, | |
1173 | * but we don't use that feature anyway. */ | |
1174 | b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, | |
1175 | &__b43legacy_ratetable[3]); | |
1176 | wl->beacon0_uploaded = 1; | |
1177 | } | |
1178 | ||
1179 | static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev) | |
1180 | { | |
1181 | struct b43legacy_wl *wl = dev->wl; | |
1182 | ||
1183 | if (wl->beacon1_uploaded) | |
1184 | return; | |
1185 | b43legacy_write_beacon_template(dev, 0x468, 0x1A); | |
1186 | wl->beacon1_uploaded = 1; | |
1187 | } | |
1188 | ||
1189 | static void handle_irq_beacon(struct b43legacy_wldev *dev) | |
1190 | { | |
1191 | struct b43legacy_wl *wl = dev->wl; | |
1192 | u32 cmd, beacon0_valid, beacon1_valid; | |
1193 | ||
1194 | if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) | |
1195 | return; | |
1196 | ||
1197 | /* This is the bottom half of the asynchronous beacon update. */ | |
1198 | ||
1199 | /* Ignore interrupt in the future. */ | |
44710bbc | 1200 | dev->irq_mask &= ~B43legacy_IRQ_BEACON; |
2d1f96dd LF |
1201 | |
1202 | cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); | |
1203 | beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID); | |
1204 | beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID); | |
1205 | ||
1206 | /* Schedule interrupt manually, if busy. */ | |
1207 | if (beacon0_valid && beacon1_valid) { | |
1208 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON); | |
44710bbc | 1209 | dev->irq_mask |= B43legacy_IRQ_BEACON; |
2d1f96dd LF |
1210 | return; |
1211 | } | |
1212 | ||
1213 | if (unlikely(wl->beacon_templates_virgin)) { | |
1214 | /* We never uploaded a beacon before. | |
1215 | * Upload both templates now, but only mark one valid. */ | |
1216 | wl->beacon_templates_virgin = 0; | |
1217 | b43legacy_upload_beacon0(dev); | |
1218 | b43legacy_upload_beacon1(dev); | |
1219 | cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); | |
1220 | cmd |= B43legacy_MACCMD_BEACON0_VALID; | |
1221 | b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); | |
1222 | } else { | |
1223 | if (!beacon0_valid) { | |
1224 | b43legacy_upload_beacon0(dev); | |
1225 | cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); | |
1226 | cmd |= B43legacy_MACCMD_BEACON0_VALID; | |
1227 | b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); | |
1228 | } else if (!beacon1_valid) { | |
1229 | b43legacy_upload_beacon1(dev); | |
1230 | cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); | |
1231 | cmd |= B43legacy_MACCMD_BEACON1_VALID; | |
1232 | b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); | |
1233 | } | |
1234 | } | |
1235 | } | |
1236 | ||
7858e07b LF |
1237 | static void b43legacy_beacon_update_trigger_work(struct work_struct *work) |
1238 | { | |
1239 | struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl, | |
1240 | beacon_update_trigger); | |
1241 | struct b43legacy_wldev *dev; | |
1242 | ||
1243 | mutex_lock(&wl->mutex); | |
1244 | dev = wl->current_dev; | |
1245 | if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) { | |
7858e07b | 1246 | spin_lock_irq(&wl->irq_lock); |
44710bbc | 1247 | /* Update beacon right away or defer to IRQ. */ |
2d1f96dd LF |
1248 | handle_irq_beacon(dev); |
1249 | /* The handler might have updated the IRQ mask. */ | |
1250 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, | |
44710bbc | 1251 | dev->irq_mask); |
2d1f96dd | 1252 | mmiowb(); |
7858e07b LF |
1253 | spin_unlock_irq(&wl->irq_lock); |
1254 | } | |
1255 | mutex_unlock(&wl->mutex); | |
1256 | } | |
1257 | ||
a297170d SB |
1258 | /* Asynchronously update the packet templates in template RAM. |
1259 | * Locking: Requires wl->irq_lock to be locked. */ | |
9d139c81 | 1260 | static void b43legacy_update_templates(struct b43legacy_wl *wl) |
75388acd | 1261 | { |
9d139c81 | 1262 | struct sk_buff *beacon; |
a297170d SB |
1263 | /* This is the top half of the ansynchronous beacon update. The bottom |
1264 | * half is the beacon IRQ. Beacon update must be asynchronous to avoid | |
1265 | * sending an invalid beacon. This can happen for example, if the | |
1266 | * firmware transmits a beacon while we are updating it. */ | |
75388acd | 1267 | |
9d139c81 JB |
1268 | /* We could modify the existing beacon and set the aid bit in the TIM |
1269 | * field, but that would probably require resizing and moving of data | |
1270 | * within the beacon template. Simply request a new beacon and let | |
1271 | * mac80211 do the hard work. */ | |
1272 | beacon = ieee80211_beacon_get(wl->hw, wl->vif); | |
1273 | if (unlikely(!beacon)) | |
1274 | return; | |
1275 | ||
a297170d SB |
1276 | if (wl->current_beacon) |
1277 | dev_kfree_skb_any(wl->current_beacon); | |
1278 | wl->current_beacon = beacon; | |
1279 | wl->beacon0_uploaded = 0; | |
1280 | wl->beacon1_uploaded = 0; | |
42935eca | 1281 | ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger); |
75388acd LF |
1282 | } |
1283 | ||
75388acd LF |
1284 | static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev, |
1285 | u16 beacon_int) | |
1286 | { | |
1287 | b43legacy_time_lock(dev); | |
7858e07b LF |
1288 | if (dev->dev->id.revision >= 3) { |
1289 | b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP, | |
1290 | (beacon_int << 16)); | |
1291 | b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START, | |
1292 | (beacon_int << 10)); | |
1293 | } else { | |
75388acd LF |
1294 | b43legacy_write16(dev, 0x606, (beacon_int >> 6)); |
1295 | b43legacy_write16(dev, 0x610, beacon_int); | |
1296 | } | |
1297 | b43legacy_time_unlock(dev); | |
7858e07b | 1298 | b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int); |
75388acd LF |
1299 | } |
1300 | ||
75388acd LF |
1301 | static void handle_irq_ucode_debug(struct b43legacy_wldev *dev) |
1302 | { | |
1303 | } | |
1304 | ||
1305 | /* Interrupt handler bottom-half */ | |
1306 | static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev) | |
1307 | { | |
1308 | u32 reason; | |
1309 | u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; | |
1310 | u32 merged_dma_reason = 0; | |
1311 | int i; | |
75388acd LF |
1312 | unsigned long flags; |
1313 | ||
1314 | spin_lock_irqsave(&dev->wl->irq_lock, flags); | |
1315 | ||
1316 | B43legacy_WARN_ON(b43legacy_status(dev) < | |
1317 | B43legacy_STAT_INITIALIZED); | |
1318 | ||
1319 | reason = dev->irq_reason; | |
1320 | for (i = 0; i < ARRAY_SIZE(dma_reason); i++) { | |
1321 | dma_reason[i] = dev->dma_reason[i]; | |
1322 | merged_dma_reason |= dma_reason[i]; | |
1323 | } | |
1324 | ||
1325 | if (unlikely(reason & B43legacy_IRQ_MAC_TXERR)) | |
1326 | b43legacyerr(dev->wl, "MAC transmission error\n"); | |
1327 | ||
a293ee99 | 1328 | if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) { |
75388acd | 1329 | b43legacyerr(dev->wl, "PHY transmission error\n"); |
a293ee99 SB |
1330 | rmb(); |
1331 | if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { | |
1332 | b43legacyerr(dev->wl, "Too many PHY TX errors, " | |
1333 | "restarting the controller\n"); | |
1334 | b43legacy_controller_restart(dev, "PHY TX errors"); | |
1335 | } | |
1336 | } | |
75388acd LF |
1337 | |
1338 | if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK | | |
1339 | B43legacy_DMAIRQ_NONFATALMASK))) { | |
1340 | if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) { | |
1341 | b43legacyerr(dev->wl, "Fatal DMA error: " | |
1342 | "0x%08X, 0x%08X, 0x%08X, " | |
1343 | "0x%08X, 0x%08X, 0x%08X\n", | |
1344 | dma_reason[0], dma_reason[1], | |
1345 | dma_reason[2], dma_reason[3], | |
1346 | dma_reason[4], dma_reason[5]); | |
1347 | b43legacy_controller_restart(dev, "DMA error"); | |
1348 | mmiowb(); | |
1349 | spin_unlock_irqrestore(&dev->wl->irq_lock, flags); | |
1350 | return; | |
1351 | } | |
1352 | if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK) | |
1353 | b43legacyerr(dev->wl, "DMA error: " | |
1354 | "0x%08X, 0x%08X, 0x%08X, " | |
1355 | "0x%08X, 0x%08X, 0x%08X\n", | |
1356 | dma_reason[0], dma_reason[1], | |
1357 | dma_reason[2], dma_reason[3], | |
1358 | dma_reason[4], dma_reason[5]); | |
1359 | } | |
1360 | ||
1361 | if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG)) | |
1362 | handle_irq_ucode_debug(dev); | |
1363 | if (reason & B43legacy_IRQ_TBTT_INDI) | |
1364 | handle_irq_tbtt_indication(dev); | |
1365 | if (reason & B43legacy_IRQ_ATIM_END) | |
1366 | handle_irq_atim_end(dev); | |
1367 | if (reason & B43legacy_IRQ_BEACON) | |
1368 | handle_irq_beacon(dev); | |
1369 | if (reason & B43legacy_IRQ_PMQ) | |
1370 | handle_irq_pmq(dev); | |
1371 | if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) | |
1372 | ;/*TODO*/ | |
1373 | if (reason & B43legacy_IRQ_NOISESAMPLE_OK) | |
1374 | handle_irq_noise(dev); | |
1375 | ||
1376 | /* Check the DMA reason registers for received data. */ | |
1377 | if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) { | |
1378 | if (b43legacy_using_pio(dev)) | |
1379 | b43legacy_pio_rx(dev->pio.queue0); | |
1380 | else | |
1381 | b43legacy_dma_rx(dev->dma.rx_ring0); | |
75388acd LF |
1382 | } |
1383 | B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE); | |
1384 | B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE); | |
1385 | if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) { | |
1386 | if (b43legacy_using_pio(dev)) | |
1387 | b43legacy_pio_rx(dev->pio.queue3); | |
1388 | else | |
1389 | b43legacy_dma_rx(dev->dma.rx_ring3); | |
75388acd LF |
1390 | } |
1391 | B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE); | |
1392 | B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE); | |
1393 | ||
ba48f7bb | 1394 | if (reason & B43legacy_IRQ_TX_OK) |
75388acd | 1395 | handle_irq_transmit_status(dev); |
75388acd | 1396 | |
44710bbc | 1397 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); |
75388acd LF |
1398 | mmiowb(); |
1399 | spin_unlock_irqrestore(&dev->wl->irq_lock, flags); | |
1400 | } | |
1401 | ||
1402 | static void pio_irq_workaround(struct b43legacy_wldev *dev, | |
1403 | u16 base, int queueidx) | |
1404 | { | |
1405 | u16 rxctl; | |
1406 | ||
1407 | rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL); | |
1408 | if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE) | |
1409 | dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE; | |
1410 | else | |
1411 | dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE; | |
1412 | } | |
1413 | ||
1414 | static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason) | |
1415 | { | |
1416 | if (b43legacy_using_pio(dev) && | |
1417 | (dev->dev->id.revision < 3) && | |
1418 | (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) { | |
1419 | /* Apply a PIO specific workaround to the dma_reasons */ | |
1420 | pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0); | |
1421 | pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1); | |
1422 | pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2); | |
1423 | pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3); | |
1424 | } | |
1425 | ||
1426 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason); | |
1427 | ||
1428 | b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON, | |
1429 | dev->dma_reason[0]); | |
1430 | b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON, | |
1431 | dev->dma_reason[1]); | |
1432 | b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON, | |
1433 | dev->dma_reason[2]); | |
1434 | b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON, | |
1435 | dev->dma_reason[3]); | |
1436 | b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON, | |
1437 | dev->dma_reason[4]); | |
1438 | b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON, | |
1439 | dev->dma_reason[5]); | |
1440 | } | |
1441 | ||
1442 | /* Interrupt handler top-half */ | |
1443 | static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id) | |
1444 | { | |
1445 | irqreturn_t ret = IRQ_NONE; | |
1446 | struct b43legacy_wldev *dev = dev_id; | |
1447 | u32 reason; | |
1448 | ||
44710bbc | 1449 | B43legacy_WARN_ON(!dev); |
75388acd LF |
1450 | |
1451 | spin_lock(&dev->wl->irq_lock); | |
1452 | ||
44710bbc SB |
1453 | if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED)) |
1454 | /* This can only happen on shared IRQ lines. */ | |
75388acd LF |
1455 | goto out; |
1456 | reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1457 | if (reason == 0xffffffff) /* shared IRQ */ | |
1458 | goto out; | |
1459 | ret = IRQ_HANDLED; | |
44710bbc | 1460 | reason &= dev->irq_mask; |
75388acd LF |
1461 | if (!reason) |
1462 | goto out; | |
1463 | ||
1464 | dev->dma_reason[0] = b43legacy_read32(dev, | |
1465 | B43legacy_MMIO_DMA0_REASON) | |
1466 | & 0x0001DC00; | |
1467 | dev->dma_reason[1] = b43legacy_read32(dev, | |
1468 | B43legacy_MMIO_DMA1_REASON) | |
1469 | & 0x0000DC00; | |
1470 | dev->dma_reason[2] = b43legacy_read32(dev, | |
1471 | B43legacy_MMIO_DMA2_REASON) | |
1472 | & 0x0000DC00; | |
1473 | dev->dma_reason[3] = b43legacy_read32(dev, | |
1474 | B43legacy_MMIO_DMA3_REASON) | |
1475 | & 0x0001DC00; | |
1476 | dev->dma_reason[4] = b43legacy_read32(dev, | |
1477 | B43legacy_MMIO_DMA4_REASON) | |
1478 | & 0x0000DC00; | |
1479 | dev->dma_reason[5] = b43legacy_read32(dev, | |
1480 | B43legacy_MMIO_DMA5_REASON) | |
1481 | & 0x0000DC00; | |
1482 | ||
1483 | b43legacy_interrupt_ack(dev, reason); | |
44710bbc SB |
1484 | /* Disable all IRQs. They are enabled again in the bottom half. */ |
1485 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); | |
1486 | /* Save the reason code and call our bottom half. */ | |
75388acd LF |
1487 | dev->irq_reason = reason; |
1488 | tasklet_schedule(&dev->isr_tasklet); | |
1489 | out: | |
1490 | mmiowb(); | |
1491 | spin_unlock(&dev->wl->irq_lock); | |
1492 | ||
1493 | return ret; | |
1494 | } | |
1495 | ||
1496 | static void b43legacy_release_firmware(struct b43legacy_wldev *dev) | |
1497 | { | |
1498 | release_firmware(dev->fw.ucode); | |
1499 | dev->fw.ucode = NULL; | |
1500 | release_firmware(dev->fw.pcm); | |
1501 | dev->fw.pcm = NULL; | |
1502 | release_firmware(dev->fw.initvals); | |
1503 | dev->fw.initvals = NULL; | |
1504 | release_firmware(dev->fw.initvals_band); | |
1505 | dev->fw.initvals_band = NULL; | |
1506 | } | |
1507 | ||
1508 | static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl) | |
1509 | { | |
1510 | b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/" | |
354807e0 | 1511 | "Drivers/b43#devicefirmware " |
75388acd LF |
1512 | "and download the correct firmware (version 3).\n"); |
1513 | } | |
1514 | ||
1515 | static int do_request_fw(struct b43legacy_wldev *dev, | |
1516 | const char *name, | |
1517 | const struct firmware **fw) | |
1518 | { | |
1519 | char path[sizeof(modparam_fwpostfix) + 32]; | |
1520 | struct b43legacy_fw_header *hdr; | |
1521 | u32 size; | |
1522 | int err; | |
1523 | ||
1524 | if (!name) | |
1525 | return 0; | |
1526 | ||
1527 | snprintf(path, ARRAY_SIZE(path), | |
1528 | "b43legacy%s/%s.fw", | |
1529 | modparam_fwpostfix, name); | |
1530 | err = request_firmware(fw, path, dev->dev->dev); | |
1531 | if (err) { | |
1532 | b43legacyerr(dev->wl, "Firmware file \"%s\" not found " | |
1533 | "or load failed.\n", path); | |
1534 | return err; | |
1535 | } | |
1536 | if ((*fw)->size < sizeof(struct b43legacy_fw_header)) | |
1537 | goto err_format; | |
1538 | hdr = (struct b43legacy_fw_header *)((*fw)->data); | |
1539 | switch (hdr->type) { | |
1540 | case B43legacy_FW_TYPE_UCODE: | |
1541 | case B43legacy_FW_TYPE_PCM: | |
1542 | size = be32_to_cpu(hdr->size); | |
1543 | if (size != (*fw)->size - sizeof(struct b43legacy_fw_header)) | |
1544 | goto err_format; | |
1545 | /* fallthrough */ | |
1546 | case B43legacy_FW_TYPE_IV: | |
1547 | if (hdr->ver != 1) | |
1548 | goto err_format; | |
1549 | break; | |
1550 | default: | |
1551 | goto err_format; | |
1552 | } | |
1553 | ||
1554 | return err; | |
1555 | ||
1556 | err_format: | |
1557 | b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path); | |
1558 | return -EPROTO; | |
1559 | } | |
1560 | ||
1561 | static int b43legacy_request_firmware(struct b43legacy_wldev *dev) | |
1562 | { | |
1563 | struct b43legacy_firmware *fw = &dev->fw; | |
1564 | const u8 rev = dev->dev->id.revision; | |
1565 | const char *filename; | |
75388acd LF |
1566 | int err; |
1567 | ||
0541ac4c LF |
1568 | /* do dummy read */ |
1569 | ssb_read32(dev->dev, SSB_TMSHIGH); | |
75388acd LF |
1570 | if (!fw->ucode) { |
1571 | if (rev == 2) | |
1572 | filename = "ucode2"; | |
1573 | else if (rev == 4) | |
1574 | filename = "ucode4"; | |
1575 | else | |
1576 | filename = "ucode5"; | |
1577 | err = do_request_fw(dev, filename, &fw->ucode); | |
1578 | if (err) | |
1579 | goto err_load; | |
1580 | } | |
1581 | if (!fw->pcm) { | |
1582 | if (rev < 5) | |
1583 | filename = "pcm4"; | |
1584 | else | |
1585 | filename = "pcm5"; | |
1586 | err = do_request_fw(dev, filename, &fw->pcm); | |
1587 | if (err) | |
1588 | goto err_load; | |
1589 | } | |
1590 | if (!fw->initvals) { | |
1591 | switch (dev->phy.type) { | |
385f848a | 1592 | case B43legacy_PHYTYPE_B: |
75388acd LF |
1593 | case B43legacy_PHYTYPE_G: |
1594 | if ((rev >= 5) && (rev <= 10)) | |
1595 | filename = "b0g0initvals5"; | |
1596 | else if (rev == 2 || rev == 4) | |
1597 | filename = "b0g0initvals2"; | |
1598 | else | |
1599 | goto err_no_initvals; | |
1600 | break; | |
1601 | default: | |
1602 | goto err_no_initvals; | |
1603 | } | |
1604 | err = do_request_fw(dev, filename, &fw->initvals); | |
1605 | if (err) | |
1606 | goto err_load; | |
1607 | } | |
1608 | if (!fw->initvals_band) { | |
1609 | switch (dev->phy.type) { | |
385f848a | 1610 | case B43legacy_PHYTYPE_B: |
75388acd LF |
1611 | case B43legacy_PHYTYPE_G: |
1612 | if ((rev >= 5) && (rev <= 10)) | |
1613 | filename = "b0g0bsinitvals5"; | |
1614 | else if (rev >= 11) | |
1615 | filename = NULL; | |
1616 | else if (rev == 2 || rev == 4) | |
1617 | filename = NULL; | |
1618 | else | |
1619 | goto err_no_initvals; | |
1620 | break; | |
1621 | default: | |
1622 | goto err_no_initvals; | |
1623 | } | |
1624 | err = do_request_fw(dev, filename, &fw->initvals_band); | |
1625 | if (err) | |
1626 | goto err_load; | |
1627 | } | |
1628 | ||
1629 | return 0; | |
1630 | ||
1631 | err_load: | |
1632 | b43legacy_print_fw_helptext(dev->wl); | |
1633 | goto error; | |
1634 | ||
1635 | err_no_initvals: | |
1636 | err = -ENODEV; | |
1637 | b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, " | |
1638 | "core rev %u\n", dev->phy.type, rev); | |
1639 | goto error; | |
1640 | ||
1641 | error: | |
1642 | b43legacy_release_firmware(dev); | |
1643 | return err; | |
1644 | } | |
1645 | ||
1646 | static int b43legacy_upload_microcode(struct b43legacy_wldev *dev) | |
1647 | { | |
bcf3c7c5 | 1648 | struct wiphy *wiphy = dev->wl->hw->wiphy; |
75388acd LF |
1649 | const size_t hdr_len = sizeof(struct b43legacy_fw_header); |
1650 | const __be32 *data; | |
1651 | unsigned int i; | |
1652 | unsigned int len; | |
1653 | u16 fwrev; | |
1654 | u16 fwpatch; | |
1655 | u16 fwdate; | |
1656 | u16 fwtime; | |
e78c9d28 | 1657 | u32 tmp, macctl; |
75388acd LF |
1658 | int err = 0; |
1659 | ||
e78c9d28 SB |
1660 | /* Jump the microcode PSM to offset 0 */ |
1661 | macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
1662 | B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN); | |
1663 | macctl |= B43legacy_MACCTL_PSM_JMP0; | |
1664 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
1665 | /* Zero out all microcode PSM registers and shared memory. */ | |
1666 | for (i = 0; i < 64; i++) | |
1667 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0); | |
1668 | for (i = 0; i < 4096; i += 2) | |
1669 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0); | |
1670 | ||
75388acd LF |
1671 | /* Upload Microcode. */ |
1672 | data = (__be32 *) (dev->fw.ucode->data + hdr_len); | |
1673 | len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); | |
1674 | b43legacy_shm_control_word(dev, | |
1675 | B43legacy_SHM_UCODE | | |
1676 | B43legacy_SHM_AUTOINC_W, | |
1677 | 0x0000); | |
1678 | for (i = 0; i < len; i++) { | |
1679 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, | |
1680 | be32_to_cpu(data[i])); | |
1681 | udelay(10); | |
1682 | } | |
1683 | ||
1684 | if (dev->fw.pcm) { | |
1685 | /* Upload PCM data. */ | |
1686 | data = (__be32 *) (dev->fw.pcm->data + hdr_len); | |
1687 | len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32); | |
1688 | b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA); | |
1689 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000); | |
1690 | /* No need for autoinc bit in SHM_HW */ | |
1691 | b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB); | |
1692 | for (i = 0; i < len; i++) { | |
1693 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, | |
1694 | be32_to_cpu(data[i])); | |
1695 | udelay(10); | |
1696 | } | |
1697 | } | |
1698 | ||
1699 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, | |
1700 | B43legacy_IRQ_ALL); | |
e78c9d28 SB |
1701 | |
1702 | /* Start the microcode PSM */ | |
1703 | macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
1704 | macctl &= ~B43legacy_MACCTL_PSM_JMP0; | |
1705 | macctl |= B43legacy_MACCTL_PSM_RUN; | |
1706 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
75388acd LF |
1707 | |
1708 | /* Wait for the microcode to load and respond */ | |
1709 | i = 0; | |
1710 | while (1) { | |
1711 | tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1712 | if (tmp == B43legacy_IRQ_MAC_SUSPENDED) | |
1713 | break; | |
1714 | i++; | |
1715 | if (i >= B43legacy_IRQWAIT_MAX_RETRIES) { | |
1716 | b43legacyerr(dev->wl, "Microcode not responding\n"); | |
1717 | b43legacy_print_fw_helptext(dev->wl); | |
1718 | err = -ENODEV; | |
e78c9d28 SB |
1719 | goto error; |
1720 | } | |
1721 | msleep_interruptible(50); | |
1722 | if (signal_pending(current)) { | |
1723 | err = -EINTR; | |
1724 | goto error; | |
75388acd | 1725 | } |
75388acd LF |
1726 | } |
1727 | /* dummy read follows */ | |
1728 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1729 | ||
1730 | /* Get and check the revisions. */ | |
1731 | fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1732 | B43legacy_SHM_SH_UCODEREV); | |
1733 | fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1734 | B43legacy_SHM_SH_UCODEPATCH); | |
1735 | fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1736 | B43legacy_SHM_SH_UCODEDATE); | |
1737 | fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1738 | B43legacy_SHM_SH_UCODETIME); | |
1739 | ||
1740 | if (fwrev > 0x128) { | |
1741 | b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE." | |
1742 | " Only firmware from binary drivers version 3.x" | |
1743 | " is supported. You must change your firmware" | |
1744 | " files.\n"); | |
1745 | b43legacy_print_fw_helptext(dev->wl); | |
75388acd | 1746 | err = -EOPNOTSUPP; |
e78c9d28 | 1747 | goto error; |
75388acd | 1748 | } |
cfbc35b6 SB |
1749 | b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u " |
1750 | "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch, | |
1751 | (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF, | |
1752 | (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, | |
1753 | fwtime & 0x1F); | |
75388acd LF |
1754 | |
1755 | dev->fw.rev = fwrev; | |
1756 | dev->fw.patch = fwpatch; | |
1757 | ||
bcf3c7c5 JL |
1758 | snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u", |
1759 | dev->fw.rev, dev->fw.patch); | |
1760 | wiphy->hw_version = dev->dev->id.coreid; | |
1761 | ||
e78c9d28 SB |
1762 | return 0; |
1763 | ||
1764 | error: | |
1765 | macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
1766 | macctl &= ~B43legacy_MACCTL_PSM_RUN; | |
1767 | macctl |= B43legacy_MACCTL_PSM_JMP0; | |
1768 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
1769 | ||
75388acd LF |
1770 | return err; |
1771 | } | |
1772 | ||
1773 | static int b43legacy_write_initvals(struct b43legacy_wldev *dev, | |
1774 | const struct b43legacy_iv *ivals, | |
1775 | size_t count, | |
1776 | size_t array_size) | |
1777 | { | |
1778 | const struct b43legacy_iv *iv; | |
1779 | u16 offset; | |
1780 | size_t i; | |
1781 | bool bit32; | |
1782 | ||
1783 | BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6); | |
1784 | iv = ivals; | |
1785 | for (i = 0; i < count; i++) { | |
1786 | if (array_size < sizeof(iv->offset_size)) | |
1787 | goto err_format; | |
1788 | array_size -= sizeof(iv->offset_size); | |
1789 | offset = be16_to_cpu(iv->offset_size); | |
1790 | bit32 = !!(offset & B43legacy_IV_32BIT); | |
1791 | offset &= B43legacy_IV_OFFSET_MASK; | |
1792 | if (offset >= 0x1000) | |
1793 | goto err_format; | |
1794 | if (bit32) { | |
1795 | u32 value; | |
1796 | ||
1797 | if (array_size < sizeof(iv->data.d32)) | |
1798 | goto err_format; | |
1799 | array_size -= sizeof(iv->data.d32); | |
1800 | ||
533dd1b0 | 1801 | value = get_unaligned_be32(&iv->data.d32); |
75388acd LF |
1802 | b43legacy_write32(dev, offset, value); |
1803 | ||
1804 | iv = (const struct b43legacy_iv *)((const uint8_t *)iv + | |
1805 | sizeof(__be16) + | |
1806 | sizeof(__be32)); | |
1807 | } else { | |
1808 | u16 value; | |
1809 | ||
1810 | if (array_size < sizeof(iv->data.d16)) | |
1811 | goto err_format; | |
1812 | array_size -= sizeof(iv->data.d16); | |
1813 | ||
1814 | value = be16_to_cpu(iv->data.d16); | |
1815 | b43legacy_write16(dev, offset, value); | |
1816 | ||
1817 | iv = (const struct b43legacy_iv *)((const uint8_t *)iv + | |
1818 | sizeof(__be16) + | |
1819 | sizeof(__be16)); | |
1820 | } | |
1821 | } | |
1822 | if (array_size) | |
1823 | goto err_format; | |
1824 | ||
1825 | return 0; | |
1826 | ||
1827 | err_format: | |
1828 | b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n"); | |
1829 | b43legacy_print_fw_helptext(dev->wl); | |
1830 | ||
1831 | return -EPROTO; | |
1832 | } | |
1833 | ||
1834 | static int b43legacy_upload_initvals(struct b43legacy_wldev *dev) | |
1835 | { | |
1836 | const size_t hdr_len = sizeof(struct b43legacy_fw_header); | |
1837 | const struct b43legacy_fw_header *hdr; | |
1838 | struct b43legacy_firmware *fw = &dev->fw; | |
1839 | const struct b43legacy_iv *ivals; | |
1840 | size_t count; | |
1841 | int err; | |
1842 | ||
1843 | hdr = (const struct b43legacy_fw_header *)(fw->initvals->data); | |
1844 | ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len); | |
1845 | count = be32_to_cpu(hdr->size); | |
1846 | err = b43legacy_write_initvals(dev, ivals, count, | |
1847 | fw->initvals->size - hdr_len); | |
1848 | if (err) | |
1849 | goto out; | |
1850 | if (fw->initvals_band) { | |
1851 | hdr = (const struct b43legacy_fw_header *) | |
1852 | (fw->initvals_band->data); | |
1853 | ivals = (const struct b43legacy_iv *)(fw->initvals_band->data | |
1854 | + hdr_len); | |
1855 | count = be32_to_cpu(hdr->size); | |
1856 | err = b43legacy_write_initvals(dev, ivals, count, | |
1857 | fw->initvals_band->size - hdr_len); | |
1858 | if (err) | |
1859 | goto out; | |
1860 | } | |
1861 | out: | |
1862 | ||
1863 | return err; | |
1864 | } | |
1865 | ||
1866 | /* Initialize the GPIOs | |
1867 | * http://bcm-specs.sipsolutions.net/GPIO | |
1868 | */ | |
1869 | static int b43legacy_gpio_init(struct b43legacy_wldev *dev) | |
1870 | { | |
1871 | struct ssb_bus *bus = dev->dev->bus; | |
1872 | struct ssb_device *gpiodev, *pcidev = NULL; | |
1873 | u32 mask; | |
1874 | u32 set; | |
1875 | ||
e78c9d28 | 1876 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, |
75388acd | 1877 | b43legacy_read32(dev, |
e78c9d28 | 1878 | B43legacy_MMIO_MACCTL) |
75388acd LF |
1879 | & 0xFFFF3FFF); |
1880 | ||
75388acd LF |
1881 | b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, |
1882 | b43legacy_read16(dev, | |
1883 | B43legacy_MMIO_GPIO_MASK) | |
1884 | | 0x000F); | |
1885 | ||
1886 | mask = 0x0000001F; | |
1887 | set = 0x0000000F; | |
1888 | if (dev->dev->bus->chip_id == 0x4301) { | |
1889 | mask |= 0x0060; | |
1890 | set |= 0x0060; | |
1891 | } | |
7797aa38 | 1892 | if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) { |
75388acd LF |
1893 | b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, |
1894 | b43legacy_read16(dev, | |
1895 | B43legacy_MMIO_GPIO_MASK) | |
1896 | | 0x0200); | |
1897 | mask |= 0x0200; | |
1898 | set |= 0x0200; | |
1899 | } | |
1900 | if (dev->dev->id.revision >= 2) | |
1901 | mask |= 0x0010; /* FIXME: This is redundant. */ | |
1902 | ||
1903 | #ifdef CONFIG_SSB_DRIVER_PCICORE | |
1904 | pcidev = bus->pcicore.dev; | |
1905 | #endif | |
1906 | gpiodev = bus->chipco.dev ? : pcidev; | |
1907 | if (!gpiodev) | |
1908 | return 0; | |
1909 | ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, | |
1910 | (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL) | |
1911 | & mask) | set); | |
1912 | ||
1913 | return 0; | |
1914 | } | |
1915 | ||
1916 | /* Turn off all GPIO stuff. Call this on module unload, for example. */ | |
1917 | static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev) | |
1918 | { | |
1919 | struct ssb_bus *bus = dev->dev->bus; | |
1920 | struct ssb_device *gpiodev, *pcidev = NULL; | |
1921 | ||
1922 | #ifdef CONFIG_SSB_DRIVER_PCICORE | |
1923 | pcidev = bus->pcicore.dev; | |
1924 | #endif | |
1925 | gpiodev = bus->chipco.dev ? : pcidev; | |
1926 | if (!gpiodev) | |
1927 | return; | |
1928 | ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0); | |
1929 | } | |
1930 | ||
1931 | /* http://bcm-specs.sipsolutions.net/EnableMac */ | |
1932 | void b43legacy_mac_enable(struct b43legacy_wldev *dev) | |
1933 | { | |
1934 | dev->mac_suspended--; | |
1935 | B43legacy_WARN_ON(dev->mac_suspended < 0); | |
f34eb692 | 1936 | B43legacy_WARN_ON(irqs_disabled()); |
75388acd | 1937 | if (dev->mac_suspended == 0) { |
e78c9d28 | 1938 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, |
75388acd | 1939 | b43legacy_read32(dev, |
e78c9d28 SB |
1940 | B43legacy_MMIO_MACCTL) |
1941 | | B43legacy_MACCTL_ENABLED); | |
75388acd LF |
1942 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, |
1943 | B43legacy_IRQ_MAC_SUSPENDED); | |
1944 | /* the next two are dummy reads */ | |
e78c9d28 | 1945 | b43legacy_read32(dev, B43legacy_MMIO_MACCTL); |
75388acd LF |
1946 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); |
1947 | b43legacy_power_saving_ctl_bits(dev, -1, -1); | |
f34eb692 LF |
1948 | |
1949 | /* Re-enable IRQs. */ | |
1950 | spin_lock_irq(&dev->wl->irq_lock); | |
44710bbc SB |
1951 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, |
1952 | dev->irq_mask); | |
f34eb692 | 1953 | spin_unlock_irq(&dev->wl->irq_lock); |
75388acd LF |
1954 | } |
1955 | } | |
1956 | ||
1957 | /* http://bcm-specs.sipsolutions.net/SuspendMAC */ | |
1958 | void b43legacy_mac_suspend(struct b43legacy_wldev *dev) | |
1959 | { | |
1960 | int i; | |
1961 | u32 tmp; | |
1962 | ||
f34eb692 LF |
1963 | might_sleep(); |
1964 | B43legacy_WARN_ON(irqs_disabled()); | |
75388acd | 1965 | B43legacy_WARN_ON(dev->mac_suspended < 0); |
f34eb692 | 1966 | |
75388acd | 1967 | if (dev->mac_suspended == 0) { |
f34eb692 LF |
1968 | /* Mask IRQs before suspending MAC. Otherwise |
1969 | * the MAC stays busy and won't suspend. */ | |
1970 | spin_lock_irq(&dev->wl->irq_lock); | |
44710bbc | 1971 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); |
f34eb692 LF |
1972 | spin_unlock_irq(&dev->wl->irq_lock); |
1973 | b43legacy_synchronize_irq(dev); | |
f34eb692 | 1974 | |
75388acd | 1975 | b43legacy_power_saving_ctl_bits(dev, -1, 1); |
e78c9d28 | 1976 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, |
75388acd | 1977 | b43legacy_read32(dev, |
e78c9d28 SB |
1978 | B43legacy_MMIO_MACCTL) |
1979 | & ~B43legacy_MACCTL_ENABLED); | |
75388acd | 1980 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); |
f34eb692 | 1981 | for (i = 40; i; i--) { |
75388acd LF |
1982 | tmp = b43legacy_read32(dev, |
1983 | B43legacy_MMIO_GEN_IRQ_REASON); | |
1984 | if (tmp & B43legacy_IRQ_MAC_SUSPENDED) | |
1985 | goto out; | |
f34eb692 | 1986 | msleep(1); |
75388acd LF |
1987 | } |
1988 | b43legacyerr(dev->wl, "MAC suspend failed\n"); | |
1989 | } | |
1990 | out: | |
1991 | dev->mac_suspended++; | |
1992 | } | |
1993 | ||
1994 | static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev) | |
1995 | { | |
1996 | struct b43legacy_wl *wl = dev->wl; | |
1997 | u32 ctl; | |
1998 | u16 cfp_pretbtt; | |
1999 | ||
2000 | ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
2001 | /* Reset status to STA infrastructure mode. */ | |
2002 | ctl &= ~B43legacy_MACCTL_AP; | |
2003 | ctl &= ~B43legacy_MACCTL_KEEP_CTL; | |
2004 | ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP; | |
2005 | ctl &= ~B43legacy_MACCTL_KEEP_BAD; | |
2006 | ctl &= ~B43legacy_MACCTL_PROMISC; | |
4150c572 | 2007 | ctl &= ~B43legacy_MACCTL_BEACPROMISC; |
75388acd LF |
2008 | ctl |= B43legacy_MACCTL_INFRA; |
2009 | ||
05c914fe | 2010 | if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) |
4150c572 | 2011 | ctl |= B43legacy_MACCTL_AP; |
05c914fe | 2012 | else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)) |
4150c572 JB |
2013 | ctl &= ~B43legacy_MACCTL_INFRA; |
2014 | ||
2015 | if (wl->filter_flags & FIF_CONTROL) | |
75388acd | 2016 | ctl |= B43legacy_MACCTL_KEEP_CTL; |
4150c572 JB |
2017 | if (wl->filter_flags & FIF_FCSFAIL) |
2018 | ctl |= B43legacy_MACCTL_KEEP_BAD; | |
2019 | if (wl->filter_flags & FIF_PLCPFAIL) | |
2020 | ctl |= B43legacy_MACCTL_KEEP_BADPLCP; | |
2021 | if (wl->filter_flags & FIF_PROMISC_IN_BSS) | |
75388acd | 2022 | ctl |= B43legacy_MACCTL_PROMISC; |
4150c572 JB |
2023 | if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC) |
2024 | ctl |= B43legacy_MACCTL_BEACPROMISC; | |
2025 | ||
75388acd LF |
2026 | /* Workaround: On old hardware the HW-MAC-address-filter |
2027 | * doesn't work properly, so always run promisc in filter | |
2028 | * it in software. */ | |
2029 | if (dev->dev->id.revision <= 4) | |
2030 | ctl |= B43legacy_MACCTL_PROMISC; | |
2031 | ||
2032 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl); | |
2033 | ||
2034 | cfp_pretbtt = 2; | |
2035 | if ((ctl & B43legacy_MACCTL_INFRA) && | |
2036 | !(ctl & B43legacy_MACCTL_AP)) { | |
2037 | if (dev->dev->bus->chip_id == 0x4306 && | |
2038 | dev->dev->bus->chip_rev == 3) | |
2039 | cfp_pretbtt = 100; | |
2040 | else | |
2041 | cfp_pretbtt = 50; | |
2042 | } | |
2043 | b43legacy_write16(dev, 0x612, cfp_pretbtt); | |
2044 | } | |
2045 | ||
2046 | static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev, | |
2047 | u16 rate, | |
2048 | int is_ofdm) | |
2049 | { | |
2050 | u16 offset; | |
2051 | ||
2052 | if (is_ofdm) { | |
2053 | offset = 0x480; | |
2054 | offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2; | |
2055 | } else { | |
2056 | offset = 0x4C0; | |
2057 | offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2; | |
2058 | } | |
2059 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20, | |
2060 | b43legacy_shm_read16(dev, | |
2061 | B43legacy_SHM_SHARED, offset)); | |
2062 | } | |
2063 | ||
2064 | static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev) | |
2065 | { | |
2066 | switch (dev->phy.type) { | |
2067 | case B43legacy_PHYTYPE_G: | |
2068 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1); | |
2069 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1); | |
2070 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1); | |
2071 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1); | |
2072 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1); | |
2073 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1); | |
2074 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1); | |
2075 | /* fallthrough */ | |
2076 | case B43legacy_PHYTYPE_B: | |
2077 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0); | |
2078 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0); | |
2079 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0); | |
2080 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0); | |
2081 | break; | |
2082 | default: | |
2083 | B43legacy_BUG_ON(1); | |
2084 | } | |
2085 | } | |
2086 | ||
2087 | /* Set the TX-Antenna for management frames sent by firmware. */ | |
2088 | static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev, | |
2089 | int antenna) | |
2090 | { | |
2091 | u16 ant = 0; | |
2092 | u16 tmp; | |
2093 | ||
2094 | switch (antenna) { | |
2095 | case B43legacy_ANTENNA0: | |
2096 | ant |= B43legacy_TX4_PHY_ANT0; | |
2097 | break; | |
2098 | case B43legacy_ANTENNA1: | |
2099 | ant |= B43legacy_TX4_PHY_ANT1; | |
2100 | break; | |
2101 | case B43legacy_ANTENNA_AUTO: | |
2102 | ant |= B43legacy_TX4_PHY_ANTLAST; | |
2103 | break; | |
2104 | default: | |
2105 | B43legacy_BUG_ON(1); | |
2106 | } | |
2107 | ||
2108 | /* FIXME We also need to set the other flags of the PHY control | |
2109 | * field somewhere. */ | |
2110 | ||
2111 | /* For Beacons */ | |
2112 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
2113 | B43legacy_SHM_SH_BEACPHYCTL); | |
2114 | tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; | |
2115 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
2116 | B43legacy_SHM_SH_BEACPHYCTL, tmp); | |
2117 | /* For ACK/CTS */ | |
2118 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
2119 | B43legacy_SHM_SH_ACKCTSPHYCTL); | |
2120 | tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; | |
2121 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
2122 | B43legacy_SHM_SH_ACKCTSPHYCTL, tmp); | |
2123 | /* For Probe Resposes */ | |
2124 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
2125 | B43legacy_SHM_SH_PRPHYCTL); | |
2126 | tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; | |
2127 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
2128 | B43legacy_SHM_SH_PRPHYCTL, tmp); | |
2129 | } | |
2130 | ||
2131 | /* This is the opposite of b43legacy_chip_init() */ | |
2132 | static void b43legacy_chip_exit(struct b43legacy_wldev *dev) | |
2133 | { | |
93bb7f3a | 2134 | b43legacy_radio_turn_off(dev, 1); |
75388acd LF |
2135 | b43legacy_gpio_cleanup(dev); |
2136 | /* firmware is released later */ | |
2137 | } | |
2138 | ||
2139 | /* Initialize the chip | |
2140 | * http://bcm-specs.sipsolutions.net/ChipInit | |
2141 | */ | |
2142 | static int b43legacy_chip_init(struct b43legacy_wldev *dev) | |
2143 | { | |
2144 | struct b43legacy_phy *phy = &dev->phy; | |
2145 | int err; | |
2146 | int tmp; | |
e78c9d28 | 2147 | u32 value32, macctl; |
75388acd LF |
2148 | u16 value16; |
2149 | ||
e78c9d28 SB |
2150 | /* Initialize the MAC control */ |
2151 | macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED; | |
2152 | if (dev->phy.gmode) | |
2153 | macctl |= B43legacy_MACCTL_GMODE; | |
2154 | macctl |= B43legacy_MACCTL_INFRA; | |
2155 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
75388acd LF |
2156 | |
2157 | err = b43legacy_request_firmware(dev); | |
2158 | if (err) | |
2159 | goto out; | |
2160 | err = b43legacy_upload_microcode(dev); | |
2161 | if (err) | |
2162 | goto out; /* firmware is released later */ | |
2163 | ||
2164 | err = b43legacy_gpio_init(dev); | |
2165 | if (err) | |
2166 | goto out; /* firmware is released later */ | |
ba48f7bb | 2167 | |
75388acd LF |
2168 | err = b43legacy_upload_initvals(dev); |
2169 | if (err) | |
4ad36d78 | 2170 | goto err_gpio_clean; |
75388acd | 2171 | b43legacy_radio_turn_on(dev); |
75388acd LF |
2172 | |
2173 | b43legacy_write16(dev, 0x03E6, 0x0000); | |
2174 | err = b43legacy_phy_init(dev); | |
2175 | if (err) | |
2176 | goto err_radio_off; | |
2177 | ||
2178 | /* Select initial Interference Mitigation. */ | |
2179 | tmp = phy->interfmode; | |
2180 | phy->interfmode = B43legacy_INTERFMODE_NONE; | |
2181 | b43legacy_radio_set_interference_mitigation(dev, tmp); | |
2182 | ||
2183 | b43legacy_phy_set_antenna_diversity(dev); | |
2184 | b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT); | |
2185 | ||
2186 | if (phy->type == B43legacy_PHYTYPE_B) { | |
2187 | value16 = b43legacy_read16(dev, 0x005E); | |
2188 | value16 |= 0x0004; | |
2189 | b43legacy_write16(dev, 0x005E, value16); | |
2190 | } | |
2191 | b43legacy_write32(dev, 0x0100, 0x01000000); | |
2192 | if (dev->dev->id.revision < 5) | |
2193 | b43legacy_write32(dev, 0x010C, 0x01000000); | |
2194 | ||
e78c9d28 SB |
2195 | value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); |
2196 | value32 &= ~B43legacy_MACCTL_INFRA; | |
2197 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); | |
2198 | value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
2199 | value32 |= B43legacy_MACCTL_INFRA; | |
2200 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); | |
75388acd | 2201 | |
75388acd LF |
2202 | if (b43legacy_using_pio(dev)) { |
2203 | b43legacy_write32(dev, 0x0210, 0x00000100); | |
2204 | b43legacy_write32(dev, 0x0230, 0x00000100); | |
2205 | b43legacy_write32(dev, 0x0250, 0x00000100); | |
2206 | b43legacy_write32(dev, 0x0270, 0x00000100); | |
2207 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034, | |
2208 | 0x0000); | |
2209 | } | |
2210 | ||
2211 | /* Probe Response Timeout value */ | |
2212 | /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */ | |
2213 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000); | |
2214 | ||
2215 | /* Initially set the wireless operation mode. */ | |
2216 | b43legacy_adjust_opmode(dev); | |
2217 | ||
2218 | if (dev->dev->id.revision < 3) { | |
2219 | b43legacy_write16(dev, 0x060E, 0x0000); | |
2220 | b43legacy_write16(dev, 0x0610, 0x8000); | |
2221 | b43legacy_write16(dev, 0x0604, 0x0000); | |
2222 | b43legacy_write16(dev, 0x0606, 0x0200); | |
2223 | } else { | |
2224 | b43legacy_write32(dev, 0x0188, 0x80000000); | |
2225 | b43legacy_write32(dev, 0x018C, 0x02000000); | |
2226 | } | |
2227 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000); | |
2228 | b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00); | |
2229 | b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00); | |
2230 | b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00); | |
2231 | b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00); | |
2232 | b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00); | |
2233 | b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00); | |
2234 | ||
2235 | value32 = ssb_read32(dev->dev, SSB_TMSLOW); | |
a7ffab33 | 2236 | value32 |= B43legacy_TMSLOW_MACPHYCLKEN; |
75388acd LF |
2237 | ssb_write32(dev->dev, SSB_TMSLOW, value32); |
2238 | ||
2239 | b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY, | |
2240 | dev->dev->bus->chipco.fast_pwrup_delay); | |
2241 | ||
a293ee99 SB |
2242 | /* PHY TX errors counter. */ |
2243 | atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); | |
2244 | ||
75388acd LF |
2245 | B43legacy_WARN_ON(err != 0); |
2246 | b43legacydbg(dev->wl, "Chip initialized\n"); | |
2247 | out: | |
2248 | return err; | |
2249 | ||
2250 | err_radio_off: | |
93bb7f3a | 2251 | b43legacy_radio_turn_off(dev, 1); |
4ad36d78 | 2252 | err_gpio_clean: |
75388acd LF |
2253 | b43legacy_gpio_cleanup(dev); |
2254 | goto out; | |
2255 | } | |
2256 | ||
2257 | static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev) | |
2258 | { | |
2259 | struct b43legacy_phy *phy = &dev->phy; | |
2260 | ||
2261 | if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2) | |
2262 | return; | |
2263 | ||
2264 | b43legacy_mac_suspend(dev); | |
2265 | b43legacy_phy_lo_g_measure(dev); | |
2266 | b43legacy_mac_enable(dev); | |
2267 | } | |
2268 | ||
2269 | static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev) | |
2270 | { | |
2271 | b43legacy_phy_lo_mark_all_unused(dev); | |
7797aa38 | 2272 | if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) { |
75388acd LF |
2273 | b43legacy_mac_suspend(dev); |
2274 | b43legacy_calc_nrssi_slope(dev); | |
2275 | b43legacy_mac_enable(dev); | |
2276 | } | |
2277 | } | |
2278 | ||
2279 | static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev) | |
2280 | { | |
2281 | /* Update device statistics. */ | |
2282 | b43legacy_calculate_link_quality(dev); | |
2283 | } | |
2284 | ||
2285 | static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev) | |
2286 | { | |
2287 | b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */ | |
a293ee99 SB |
2288 | |
2289 | atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); | |
2290 | wmb(); | |
75388acd LF |
2291 | } |
2292 | ||
75388acd LF |
2293 | static void do_periodic_work(struct b43legacy_wldev *dev) |
2294 | { | |
2295 | unsigned int state; | |
2296 | ||
2297 | state = dev->periodic_state; | |
6be50837 | 2298 | if (state % 8 == 0) |
75388acd | 2299 | b43legacy_periodic_every120sec(dev); |
6be50837 | 2300 | if (state % 4 == 0) |
75388acd | 2301 | b43legacy_periodic_every60sec(dev); |
6be50837 | 2302 | if (state % 2 == 0) |
75388acd | 2303 | b43legacy_periodic_every30sec(dev); |
6be50837 | 2304 | b43legacy_periodic_every15sec(dev); |
75388acd LF |
2305 | } |
2306 | ||
f34eb692 LF |
2307 | /* Periodic work locking policy: |
2308 | * The whole periodic work handler is protected by | |
2309 | * wl->mutex. If another lock is needed somewhere in the | |
21ae2956 | 2310 | * pwork callchain, it's acquired in-place, where it's needed. |
75388acd | 2311 | */ |
75388acd LF |
2312 | static void b43legacy_periodic_work_handler(struct work_struct *work) |
2313 | { | |
f34eb692 LF |
2314 | struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev, |
2315 | periodic_work.work); | |
2316 | struct b43legacy_wl *wl = dev->wl; | |
75388acd | 2317 | unsigned long delay; |
75388acd | 2318 | |
f34eb692 | 2319 | mutex_lock(&wl->mutex); |
75388acd LF |
2320 | |
2321 | if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED)) | |
2322 | goto out; | |
2323 | if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP)) | |
2324 | goto out_requeue; | |
2325 | ||
f34eb692 | 2326 | do_periodic_work(dev); |
75388acd | 2327 | |
75388acd LF |
2328 | dev->periodic_state++; |
2329 | out_requeue: | |
2330 | if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST)) | |
2331 | delay = msecs_to_jiffies(50); | |
2332 | else | |
6be50837 | 2333 | delay = round_jiffies_relative(HZ * 15); |
42935eca | 2334 | ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay); |
75388acd | 2335 | out: |
f34eb692 | 2336 | mutex_unlock(&wl->mutex); |
75388acd LF |
2337 | } |
2338 | ||
2339 | static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev) | |
2340 | { | |
2341 | struct delayed_work *work = &dev->periodic_work; | |
2342 | ||
2343 | dev->periodic_state = 0; | |
2344 | INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler); | |
42935eca | 2345 | ieee80211_queue_delayed_work(dev->wl->hw, work, 0); |
75388acd LF |
2346 | } |
2347 | ||
2348 | /* Validate access to the chip (SHM) */ | |
2349 | static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev) | |
2350 | { | |
2351 | u32 value; | |
2352 | u32 shm_backup; | |
2353 | ||
2354 | shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0); | |
2355 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA); | |
2356 | if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != | |
2357 | 0xAA5555AA) | |
2358 | goto error; | |
2359 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55); | |
2360 | if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != | |
2361 | 0x55AAAA55) | |
2362 | goto error; | |
2363 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup); | |
2364 | ||
2365 | value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
2366 | if ((value | B43legacy_MACCTL_GMODE) != | |
2367 | (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED)) | |
2368 | goto error; | |
2369 | ||
2370 | value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
2371 | if (value) | |
2372 | goto error; | |
2373 | ||
2374 | return 0; | |
2375 | error: | |
2376 | b43legacyerr(dev->wl, "Failed to validate the chipaccess\n"); | |
2377 | return -ENODEV; | |
2378 | } | |
2379 | ||
2380 | static void b43legacy_security_init(struct b43legacy_wldev *dev) | |
2381 | { | |
2382 | dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20; | |
2383 | B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key)); | |
2384 | dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
2385 | 0x0056); | |
2386 | /* KTP is a word address, but we address SHM bytewise. | |
2387 | * So multiply by two. | |
2388 | */ | |
2389 | dev->ktp *= 2; | |
2390 | if (dev->dev->id.revision >= 5) | |
2391 | /* Number of RCMTA address slots */ | |
2392 | b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT, | |
2393 | dev->max_nr_keys - 8); | |
2394 | } | |
2395 | ||
910cfee3 | 2396 | #ifdef CONFIG_B43LEGACY_HWRNG |
75388acd LF |
2397 | static int b43legacy_rng_read(struct hwrng *rng, u32 *data) |
2398 | { | |
2399 | struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv; | |
2400 | unsigned long flags; | |
2401 | ||
2402 | /* Don't take wl->mutex here, as it could deadlock with | |
2403 | * hwrng internal locking. It's not needed to take | |
2404 | * wl->mutex here, anyway. */ | |
2405 | ||
2406 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2407 | *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG); | |
2408 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2409 | ||
2410 | return (sizeof(u16)); | |
2411 | } | |
910cfee3 | 2412 | #endif |
75388acd LF |
2413 | |
2414 | static void b43legacy_rng_exit(struct b43legacy_wl *wl) | |
2415 | { | |
910cfee3 | 2416 | #ifdef CONFIG_B43LEGACY_HWRNG |
75388acd LF |
2417 | if (wl->rng_initialized) |
2418 | hwrng_unregister(&wl->rng); | |
910cfee3 | 2419 | #endif |
75388acd LF |
2420 | } |
2421 | ||
2422 | static int b43legacy_rng_init(struct b43legacy_wl *wl) | |
2423 | { | |
910cfee3 | 2424 | int err = 0; |
75388acd | 2425 | |
910cfee3 | 2426 | #ifdef CONFIG_B43LEGACY_HWRNG |
75388acd LF |
2427 | snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name), |
2428 | "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy)); | |
2429 | wl->rng.name = wl->rng_name; | |
2430 | wl->rng.data_read = b43legacy_rng_read; | |
2431 | wl->rng.priv = (unsigned long)wl; | |
2432 | wl->rng_initialized = 1; | |
2433 | err = hwrng_register(&wl->rng); | |
2434 | if (err) { | |
2435 | wl->rng_initialized = 0; | |
2436 | b43legacyerr(wl, "Failed to register the random " | |
2437 | "number generator (%d)\n", err); | |
2438 | } | |
2439 | ||
910cfee3 | 2440 | #endif |
75388acd LF |
2441 | return err; |
2442 | } | |
2443 | ||
7bb45683 JB |
2444 | static void b43legacy_op_tx(struct ieee80211_hw *hw, |
2445 | struct sk_buff *skb) | |
75388acd LF |
2446 | { |
2447 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2448 | struct b43legacy_wldev *dev = wl->current_dev; | |
2449 | int err = -ENODEV; | |
2450 | unsigned long flags; | |
2451 | ||
2452 | if (unlikely(!dev)) | |
2453 | goto out; | |
2454 | if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED)) | |
2455 | goto out; | |
2456 | /* DMA-TX is done without a global lock. */ | |
2457 | if (b43legacy_using_pio(dev)) { | |
2458 | spin_lock_irqsave(&wl->irq_lock, flags); | |
e039fa4a | 2459 | err = b43legacy_pio_tx(dev, skb); |
75388acd LF |
2460 | spin_unlock_irqrestore(&wl->irq_lock, flags); |
2461 | } else | |
e039fa4a | 2462 | err = b43legacy_dma_tx(dev, skb); |
75388acd | 2463 | out: |
664f2006 MB |
2464 | if (unlikely(err)) { |
2465 | /* Drop the packet. */ | |
2466 | dev_kfree_skb_any(skb); | |
2467 | } | |
75388acd LF |
2468 | } |
2469 | ||
e100bb64 | 2470 | static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, u16 queue, |
33a3dc93 | 2471 | const struct ieee80211_tx_queue_params *params) |
75388acd LF |
2472 | { |
2473 | return 0; | |
2474 | } | |
2475 | ||
33a3dc93 SB |
2476 | static int b43legacy_op_get_stats(struct ieee80211_hw *hw, |
2477 | struct ieee80211_low_level_stats *stats) | |
75388acd LF |
2478 | { |
2479 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2480 | unsigned long flags; | |
2481 | ||
2482 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2483 | memcpy(stats, &wl->ieee_stats, sizeof(*stats)); | |
2484 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2485 | ||
2486 | return 0; | |
2487 | } | |
2488 | ||
2489 | static const char *phymode_to_string(unsigned int phymode) | |
2490 | { | |
2491 | switch (phymode) { | |
2492 | case B43legacy_PHYMODE_B: | |
2493 | return "B"; | |
2494 | case B43legacy_PHYMODE_G: | |
2495 | return "G"; | |
2496 | default: | |
2497 | B43legacy_BUG_ON(1); | |
2498 | } | |
2499 | return ""; | |
2500 | } | |
2501 | ||
2502 | static int find_wldev_for_phymode(struct b43legacy_wl *wl, | |
2503 | unsigned int phymode, | |
2504 | struct b43legacy_wldev **dev, | |
2505 | bool *gmode) | |
2506 | { | |
2507 | struct b43legacy_wldev *d; | |
2508 | ||
2509 | list_for_each_entry(d, &wl->devlist, list) { | |
2510 | if (d->phy.possible_phymodes & phymode) { | |
2511 | /* Ok, this device supports the PHY-mode. | |
2512 | * Set the gmode bit. */ | |
2513 | *gmode = 1; | |
2514 | *dev = d; | |
2515 | ||
2516 | return 0; | |
2517 | } | |
2518 | } | |
2519 | ||
2520 | return -ESRCH; | |
2521 | } | |
2522 | ||
2523 | static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev) | |
2524 | { | |
2525 | struct ssb_device *sdev = dev->dev; | |
2526 | u32 tmslow; | |
2527 | ||
2528 | tmslow = ssb_read32(sdev, SSB_TMSLOW); | |
2529 | tmslow &= ~B43legacy_TMSLOW_GMODE; | |
2530 | tmslow |= B43legacy_TMSLOW_PHYRESET; | |
2531 | tmslow |= SSB_TMSLOW_FGC; | |
2532 | ssb_write32(sdev, SSB_TMSLOW, tmslow); | |
2533 | msleep(1); | |
2534 | ||
2535 | tmslow = ssb_read32(sdev, SSB_TMSLOW); | |
2536 | tmslow &= ~SSB_TMSLOW_FGC; | |
2537 | tmslow |= B43legacy_TMSLOW_PHYRESET; | |
2538 | ssb_write32(sdev, SSB_TMSLOW, tmslow); | |
2539 | msleep(1); | |
2540 | } | |
2541 | ||
2542 | /* Expects wl->mutex locked */ | |
2543 | static int b43legacy_switch_phymode(struct b43legacy_wl *wl, | |
2544 | unsigned int new_mode) | |
2545 | { | |
08cb7e01 | 2546 | struct b43legacy_wldev *uninitialized_var(up_dev); |
75388acd LF |
2547 | struct b43legacy_wldev *down_dev; |
2548 | int err; | |
2549 | bool gmode = 0; | |
2550 | int prev_status; | |
2551 | ||
2552 | err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode); | |
2553 | if (err) { | |
2554 | b43legacyerr(wl, "Could not find a device for %s-PHY mode\n", | |
2555 | phymode_to_string(new_mode)); | |
2556 | return err; | |
2557 | } | |
2558 | if ((up_dev == wl->current_dev) && | |
2559 | (!!wl->current_dev->phy.gmode == !!gmode)) | |
2560 | /* This device is already running. */ | |
2561 | return 0; | |
2562 | b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n", | |
2563 | phymode_to_string(new_mode)); | |
2564 | down_dev = wl->current_dev; | |
2565 | ||
2566 | prev_status = b43legacy_status(down_dev); | |
2567 | /* Shutdown the currently running core. */ | |
2568 | if (prev_status >= B43legacy_STAT_STARTED) | |
2569 | b43legacy_wireless_core_stop(down_dev); | |
2570 | if (prev_status >= B43legacy_STAT_INITIALIZED) | |
2571 | b43legacy_wireless_core_exit(down_dev); | |
2572 | ||
2573 | if (down_dev != up_dev) | |
2574 | /* We switch to a different core, so we put PHY into | |
2575 | * RESET on the old core. */ | |
2576 | b43legacy_put_phy_into_reset(down_dev); | |
2577 | ||
2578 | /* Now start the new core. */ | |
2579 | up_dev->phy.gmode = gmode; | |
2580 | if (prev_status >= B43legacy_STAT_INITIALIZED) { | |
2581 | err = b43legacy_wireless_core_init(up_dev); | |
2582 | if (err) { | |
2583 | b43legacyerr(wl, "Fatal: Could not initialize device" | |
2584 | " for newly selected %s-PHY mode\n", | |
2585 | phymode_to_string(new_mode)); | |
2586 | goto init_failure; | |
2587 | } | |
2588 | } | |
2589 | if (prev_status >= B43legacy_STAT_STARTED) { | |
2590 | err = b43legacy_wireless_core_start(up_dev); | |
2591 | if (err) { | |
2592 | b43legacyerr(wl, "Fatal: Coult not start device for " | |
2593 | "newly selected %s-PHY mode\n", | |
2594 | phymode_to_string(new_mode)); | |
2595 | b43legacy_wireless_core_exit(up_dev); | |
2596 | goto init_failure; | |
2597 | } | |
2598 | } | |
2599 | B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status); | |
2600 | ||
2601 | b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0); | |
2602 | ||
2603 | wl->current_dev = up_dev; | |
2604 | ||
2605 | return 0; | |
2606 | init_failure: | |
2607 | /* Whoops, failed to init the new core. No core is operating now. */ | |
2608 | wl->current_dev = NULL; | |
2609 | return err; | |
2610 | } | |
2611 | ||
9124b077 JB |
2612 | /* Write the short and long frame retry limit values. */ |
2613 | static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev, | |
2614 | unsigned int short_retry, | |
2615 | unsigned int long_retry) | |
2616 | { | |
2617 | /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing | |
2618 | * the chip-internal counter. */ | |
2619 | short_retry = min(short_retry, (unsigned int)0xF); | |
2620 | long_retry = min(long_retry, (unsigned int)0xF); | |
2621 | ||
2622 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry); | |
2623 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry); | |
2624 | } | |
2625 | ||
33a3dc93 | 2626 | static int b43legacy_op_dev_config(struct ieee80211_hw *hw, |
e8975581 | 2627 | u32 changed) |
75388acd LF |
2628 | { |
2629 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2630 | struct b43legacy_wldev *dev; | |
2631 | struct b43legacy_phy *phy; | |
e8975581 | 2632 | struct ieee80211_conf *conf = &hw->conf; |
75388acd LF |
2633 | unsigned long flags; |
2634 | unsigned int new_phymode = 0xFFFF; | |
2635 | int antenna_tx; | |
75388acd | 2636 | int err = 0; |
75388acd | 2637 | |
0f4ac38b | 2638 | antenna_tx = B43legacy_ANTENNA_DEFAULT; |
75388acd LF |
2639 | |
2640 | mutex_lock(&wl->mutex); | |
8318d78a JB |
2641 | dev = wl->current_dev; |
2642 | phy = &dev->phy; | |
75388acd | 2643 | |
9124b077 JB |
2644 | if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) |
2645 | b43legacy_set_retry_limits(dev, | |
2646 | conf->short_frame_max_tx_count, | |
2647 | conf->long_frame_max_tx_count); | |
2648 | changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS; | |
2649 | if (!changed) | |
2650 | goto out_unlock_mutex; | |
2651 | ||
75388acd | 2652 | /* Switch the PHY mode (if necessary). */ |
8318d78a JB |
2653 | switch (conf->channel->band) { |
2654 | case IEEE80211_BAND_2GHZ: | |
2655 | if (phy->type == B43legacy_PHYTYPE_B) | |
2656 | new_phymode = B43legacy_PHYMODE_B; | |
2657 | else | |
2658 | new_phymode = B43legacy_PHYMODE_G; | |
75388acd LF |
2659 | break; |
2660 | default: | |
2661 | B43legacy_WARN_ON(1); | |
2662 | } | |
2663 | err = b43legacy_switch_phymode(wl, new_phymode); | |
2664 | if (err) | |
2665 | goto out_unlock_mutex; | |
75388acd LF |
2666 | |
2667 | /* Disable IRQs while reconfiguring the device. | |
2668 | * This makes it possible to drop the spinlock throughout | |
2669 | * the reconfiguration process. */ | |
2670 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2671 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { | |
2672 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2673 | goto out_unlock_mutex; | |
2674 | } | |
44710bbc | 2675 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); |
75388acd LF |
2676 | spin_unlock_irqrestore(&wl->irq_lock, flags); |
2677 | b43legacy_synchronize_irq(dev); | |
2678 | ||
2679 | /* Switch to the requested channel. | |
2680 | * The firmware takes care of races with the TX handler. */ | |
8318d78a JB |
2681 | if (conf->channel->hw_value != phy->channel) |
2682 | b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0); | |
75388acd | 2683 | |
0869aea0 | 2684 | dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR); |
5be3bda8 | 2685 | |
75388acd LF |
2686 | /* Adjust the desired TX power level. */ |
2687 | if (conf->power_level != 0) { | |
2688 | if (conf->power_level != phy->power_level) { | |
2689 | phy->power_level = conf->power_level; | |
2690 | b43legacy_phy_xmitpower(dev); | |
2691 | } | |
2692 | } | |
2693 | ||
2694 | /* Antennas for RX and management frame TX. */ | |
2695 | b43legacy_mgmtframe_txantenna(dev, antenna_tx); | |
2696 | ||
fd4973c5 LF |
2697 | if (wl->radio_enabled != phy->radio_on) { |
2698 | if (wl->radio_enabled) { | |
42a9174f LF |
2699 | b43legacy_radio_turn_on(dev); |
2700 | b43legacyinfo(dev->wl, "Radio turned on by software\n"); | |
2701 | if (!dev->radio_hw_enable) | |
2702 | b43legacyinfo(dev->wl, "The hardware RF-kill" | |
2703 | " button still turns the radio" | |
2704 | " physically off. Press the" | |
2705 | " button to turn it on.\n"); | |
2706 | } else { | |
93bb7f3a | 2707 | b43legacy_radio_turn_off(dev, 0); |
42a9174f LF |
2708 | b43legacyinfo(dev->wl, "Radio turned off by" |
2709 | " software\n"); | |
2710 | } | |
2711 | } | |
2712 | ||
75388acd | 2713 | spin_lock_irqsave(&wl->irq_lock, flags); |
44710bbc | 2714 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); |
75388acd LF |
2715 | mmiowb(); |
2716 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2717 | out_unlock_mutex: | |
2718 | mutex_unlock(&wl->mutex); | |
2719 | ||
2720 | return err; | |
2721 | } | |
2722 | ||
881d948c | 2723 | static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates) |
7f3704e9 JB |
2724 | { |
2725 | struct ieee80211_supported_band *sband = | |
2726 | dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ]; | |
2727 | struct ieee80211_rate *rate; | |
2728 | int i; | |
2729 | u16 basic, direct, offset, basic_offset, rateptr; | |
2730 | ||
2731 | for (i = 0; i < sband->n_bitrates; i++) { | |
2732 | rate = &sband->bitrates[i]; | |
2733 | ||
2734 | if (b43legacy_is_cck_rate(rate->hw_value)) { | |
2735 | direct = B43legacy_SHM_SH_CCKDIRECT; | |
2736 | basic = B43legacy_SHM_SH_CCKBASIC; | |
2737 | offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value); | |
2738 | offset &= 0xF; | |
2739 | } else { | |
2740 | direct = B43legacy_SHM_SH_OFDMDIRECT; | |
2741 | basic = B43legacy_SHM_SH_OFDMBASIC; | |
2742 | offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value); | |
2743 | offset &= 0xF; | |
2744 | } | |
2745 | ||
2746 | rate = ieee80211_get_response_rate(sband, brates, rate->bitrate); | |
2747 | ||
2748 | if (b43legacy_is_cck_rate(rate->hw_value)) { | |
2749 | basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value); | |
2750 | basic_offset &= 0xF; | |
2751 | } else { | |
2752 | basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value); | |
2753 | basic_offset &= 0xF; | |
2754 | } | |
2755 | ||
2756 | /* | |
2757 | * Get the pointer that we need to point to | |
2758 | * from the direct map | |
2759 | */ | |
2760 | rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
2761 | direct + 2 * basic_offset); | |
2762 | /* and write it to the basic map */ | |
2763 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
2764 | basic + 2 * offset, rateptr); | |
2765 | } | |
2766 | } | |
2767 | ||
2768 | static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw, | |
2769 | struct ieee80211_vif *vif, | |
2770 | struct ieee80211_bss_conf *conf, | |
2771 | u32 changed) | |
2772 | { | |
2773 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2774 | struct b43legacy_wldev *dev; | |
7f3704e9 | 2775 | unsigned long flags; |
7f3704e9 JB |
2776 | |
2777 | mutex_lock(&wl->mutex); | |
2d0ddec5 | 2778 | B43legacy_WARN_ON(wl->vif != vif); |
7f3704e9 JB |
2779 | |
2780 | dev = wl->current_dev; | |
7f3704e9 JB |
2781 | |
2782 | /* Disable IRQs while reconfiguring the device. | |
2783 | * This makes it possible to drop the spinlock throughout | |
2784 | * the reconfiguration process. */ | |
2785 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2786 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { | |
2787 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2788 | goto out_unlock_mutex; | |
2789 | } | |
44710bbc | 2790 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); |
2d0ddec5 JB |
2791 | |
2792 | if (changed & BSS_CHANGED_BSSID) { | |
2d0ddec5 JB |
2793 | b43legacy_synchronize_irq(dev); |
2794 | ||
2795 | if (conf->bssid) | |
2796 | memcpy(wl->bssid, conf->bssid, ETH_ALEN); | |
2797 | else | |
2798 | memset(wl->bssid, 0, ETH_ALEN); | |
3f0d843b JB |
2799 | } |
2800 | ||
2801 | if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) { | |
2802 | if (changed & BSS_CHANGED_BEACON && | |
2803 | (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) || | |
2804 | b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))) | |
2805 | b43legacy_update_templates(wl); | |
2d0ddec5 | 2806 | |
3f0d843b | 2807 | if (changed & BSS_CHANGED_BSSID) |
2d0ddec5 | 2808 | b43legacy_write_mac_bssid_templates(dev); |
2d0ddec5 | 2809 | } |
3f0d843b | 2810 | spin_unlock_irqrestore(&wl->irq_lock, flags); |
7f3704e9 JB |
2811 | |
2812 | b43legacy_mac_suspend(dev); | |
2813 | ||
57c4d7b4 JB |
2814 | if (changed & BSS_CHANGED_BEACON_INT && |
2815 | (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) || | |
2816 | b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))) | |
2817 | b43legacy_set_beacon_int(dev, conf->beacon_int); | |
2818 | ||
7f3704e9 JB |
2819 | if (changed & BSS_CHANGED_BASIC_RATES) |
2820 | b43legacy_update_basic_rates(dev, conf->basic_rates); | |
2821 | ||
2822 | if (changed & BSS_CHANGED_ERP_SLOT) { | |
2823 | if (conf->use_short_slot) | |
2824 | b43legacy_short_slot_timing_enable(dev); | |
2825 | else | |
2826 | b43legacy_short_slot_timing_disable(dev); | |
2827 | } | |
2828 | ||
2829 | b43legacy_mac_enable(dev); | |
2830 | ||
2831 | spin_lock_irqsave(&wl->irq_lock, flags); | |
44710bbc | 2832 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); |
7f3704e9 JB |
2833 | /* XXX: why? */ |
2834 | mmiowb(); | |
2835 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2836 | out_unlock_mutex: | |
2837 | mutex_unlock(&wl->mutex); | |
7f3704e9 JB |
2838 | } |
2839 | ||
33a3dc93 SB |
2840 | static void b43legacy_op_configure_filter(struct ieee80211_hw *hw, |
2841 | unsigned int changed, | |
3ac64bee | 2842 | unsigned int *fflags,u64 multicast) |
75388acd LF |
2843 | { |
2844 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2845 | struct b43legacy_wldev *dev = wl->current_dev; | |
2846 | unsigned long flags; | |
2847 | ||
4150c572 JB |
2848 | if (!dev) { |
2849 | *fflags = 0; | |
75388acd | 2850 | return; |
75388acd | 2851 | } |
4150c572 JB |
2852 | |
2853 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2854 | *fflags &= FIF_PROMISC_IN_BSS | | |
2855 | FIF_ALLMULTI | | |
2856 | FIF_FCSFAIL | | |
2857 | FIF_PLCPFAIL | | |
2858 | FIF_CONTROL | | |
2859 | FIF_OTHER_BSS | | |
2860 | FIF_BCN_PRBRESP_PROMISC; | |
2861 | ||
2862 | changed &= FIF_PROMISC_IN_BSS | | |
2863 | FIF_ALLMULTI | | |
2864 | FIF_FCSFAIL | | |
2865 | FIF_PLCPFAIL | | |
2866 | FIF_CONTROL | | |
2867 | FIF_OTHER_BSS | | |
2868 | FIF_BCN_PRBRESP_PROMISC; | |
2869 | ||
2870 | wl->filter_flags = *fflags; | |
2871 | ||
2872 | if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) | |
2873 | b43legacy_adjust_opmode(dev); | |
75388acd LF |
2874 | spin_unlock_irqrestore(&wl->irq_lock, flags); |
2875 | } | |
2876 | ||
75388acd LF |
2877 | /* Locking: wl->mutex */ |
2878 | static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev) | |
2879 | { | |
2880 | struct b43legacy_wl *wl = dev->wl; | |
2881 | unsigned long flags; | |
2882 | ||
2883 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) | |
2884 | return; | |
440cb58a SB |
2885 | |
2886 | /* Disable and sync interrupts. We must do this before than | |
2887 | * setting the status to INITIALIZED, as the interrupt handler | |
2888 | * won't care about IRQs then. */ | |
2889 | spin_lock_irqsave(&wl->irq_lock, flags); | |
44710bbc | 2890 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); |
440cb58a SB |
2891 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */ |
2892 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2893 | b43legacy_synchronize_irq(dev); | |
2894 | ||
75388acd LF |
2895 | b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); |
2896 | ||
2897 | mutex_unlock(&wl->mutex); | |
2898 | /* Must unlock as it would otherwise deadlock. No races here. | |
2899 | * Cancel the possibly running self-rearming periodic work. */ | |
2900 | cancel_delayed_work_sync(&dev->periodic_work); | |
2901 | mutex_lock(&wl->mutex); | |
2902 | ||
2903 | ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */ | |
2904 | ||
75388acd LF |
2905 | b43legacy_mac_suspend(dev); |
2906 | free_irq(dev->dev->irq, dev); | |
2907 | b43legacydbg(wl, "Wireless interface stopped\n"); | |
2908 | } | |
2909 | ||
2910 | /* Locking: wl->mutex */ | |
2911 | static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev) | |
2912 | { | |
2913 | int err; | |
2914 | ||
2915 | B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED); | |
2916 | ||
2917 | drain_txstatus_queue(dev); | |
2918 | err = request_irq(dev->dev->irq, b43legacy_interrupt_handler, | |
2919 | IRQF_SHARED, KBUILD_MODNAME, dev); | |
2920 | if (err) { | |
2921 | b43legacyerr(dev->wl, "Cannot request IRQ-%d\n", | |
2922 | dev->dev->irq); | |
2923 | goto out; | |
2924 | } | |
2925 | /* We are ready to run. */ | |
0866b03c | 2926 | ieee80211_wake_queues(dev->wl->hw); |
75388acd LF |
2927 | b43legacy_set_status(dev, B43legacy_STAT_STARTED); |
2928 | ||
2929 | /* Start data flow (TX/RX) */ | |
2930 | b43legacy_mac_enable(dev); | |
44710bbc | 2931 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); |
75388acd LF |
2932 | |
2933 | /* Start maintenance work */ | |
2934 | b43legacy_periodic_tasks_setup(dev); | |
2935 | ||
2936 | b43legacydbg(dev->wl, "Wireless interface started\n"); | |
2937 | out: | |
2938 | return err; | |
2939 | } | |
2940 | ||
2941 | /* Get PHY and RADIO versioning numbers */ | |
2942 | static int b43legacy_phy_versioning(struct b43legacy_wldev *dev) | |
2943 | { | |
2944 | struct b43legacy_phy *phy = &dev->phy; | |
2945 | u32 tmp; | |
2946 | u8 analog_type; | |
2947 | u8 phy_type; | |
2948 | u8 phy_rev; | |
2949 | u16 radio_manuf; | |
2950 | u16 radio_ver; | |
2951 | u16 radio_rev; | |
2952 | int unsupported = 0; | |
2953 | ||
2954 | /* Get PHY versioning */ | |
2955 | tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); | |
2956 | analog_type = (tmp & B43legacy_PHYVER_ANALOG) | |
2957 | >> B43legacy_PHYVER_ANALOG_SHIFT; | |
2958 | phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT; | |
2959 | phy_rev = (tmp & B43legacy_PHYVER_VERSION); | |
2960 | switch (phy_type) { | |
2961 | case B43legacy_PHYTYPE_B: | |
2962 | if (phy_rev != 2 && phy_rev != 4 | |
2963 | && phy_rev != 6 && phy_rev != 7) | |
2964 | unsupported = 1; | |
2965 | break; | |
2966 | case B43legacy_PHYTYPE_G: | |
2967 | if (phy_rev > 8) | |
2968 | unsupported = 1; | |
2969 | break; | |
2970 | default: | |
2971 | unsupported = 1; | |
6403eab1 | 2972 | } |
75388acd LF |
2973 | if (unsupported) { |
2974 | b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY " | |
2975 | "(Analog %u, Type %u, Revision %u)\n", | |
2976 | analog_type, phy_type, phy_rev); | |
2977 | return -EOPNOTSUPP; | |
2978 | } | |
2979 | b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n", | |
2980 | analog_type, phy_type, phy_rev); | |
2981 | ||
2982 | ||
2983 | /* Get RADIO versioning */ | |
2984 | if (dev->dev->bus->chip_id == 0x4317) { | |
2985 | if (dev->dev->bus->chip_rev == 0) | |
2986 | tmp = 0x3205017F; | |
2987 | else if (dev->dev->bus->chip_rev == 1) | |
2988 | tmp = 0x4205017F; | |
2989 | else | |
2990 | tmp = 0x5205017F; | |
2991 | } else { | |
2992 | b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, | |
2993 | B43legacy_RADIOCTL_ID); | |
2994 | tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH); | |
2995 | tmp <<= 16; | |
2996 | b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, | |
2997 | B43legacy_RADIOCTL_ID); | |
2998 | tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW); | |
2999 | } | |
3000 | radio_manuf = (tmp & 0x00000FFF); | |
3001 | radio_ver = (tmp & 0x0FFFF000) >> 12; | |
3002 | radio_rev = (tmp & 0xF0000000) >> 28; | |
3003 | switch (phy_type) { | |
3004 | case B43legacy_PHYTYPE_B: | |
3005 | if ((radio_ver & 0xFFF0) != 0x2050) | |
3006 | unsupported = 1; | |
3007 | break; | |
3008 | case B43legacy_PHYTYPE_G: | |
3009 | if (radio_ver != 0x2050) | |
3010 | unsupported = 1; | |
3011 | break; | |
3012 | default: | |
3013 | B43legacy_BUG_ON(1); | |
3014 | } | |
3015 | if (unsupported) { | |
3016 | b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO " | |
3017 | "(Manuf 0x%X, Version 0x%X, Revision %u)\n", | |
3018 | radio_manuf, radio_ver, radio_rev); | |
3019 | return -EOPNOTSUPP; | |
3020 | } | |
3021 | b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X," | |
3022 | " Revision %u\n", radio_manuf, radio_ver, radio_rev); | |
3023 | ||
3024 | ||
3025 | phy->radio_manuf = radio_manuf; | |
3026 | phy->radio_ver = radio_ver; | |
3027 | phy->radio_rev = radio_rev; | |
3028 | ||
3029 | phy->analog = analog_type; | |
3030 | phy->type = phy_type; | |
3031 | phy->rev = phy_rev; | |
3032 | ||
3033 | return 0; | |
3034 | } | |
3035 | ||
3036 | static void setup_struct_phy_for_init(struct b43legacy_wldev *dev, | |
3037 | struct b43legacy_phy *phy) | |
3038 | { | |
3039 | struct b43legacy_lopair *lo; | |
3040 | int i; | |
3041 | ||
3042 | memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); | |
3043 | memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); | |
3044 | ||
1065de15 LF |
3045 | /* Assume the radio is enabled. If it's not enabled, the state will |
3046 | * immediately get fixed on the first periodic work run. */ | |
3047 | dev->radio_hw_enable = 1; | |
75388acd LF |
3048 | |
3049 | phy->savedpctlreg = 0xFFFF; | |
3050 | phy->aci_enable = 0; | |
3051 | phy->aci_wlan_automatic = 0; | |
3052 | phy->aci_hw_rssi = 0; | |
3053 | ||
3054 | lo = phy->_lo_pairs; | |
3055 | if (lo) | |
3056 | memset(lo, 0, sizeof(struct b43legacy_lopair) * | |
3057 | B43legacy_LO_COUNT); | |
3058 | phy->max_lb_gain = 0; | |
3059 | phy->trsw_rx_gain = 0; | |
3060 | ||
3061 | /* Set default attenuation values. */ | |
3062 | phy->bbatt = b43legacy_default_baseband_attenuation(dev); | |
3063 | phy->rfatt = b43legacy_default_radio_attenuation(dev); | |
3064 | phy->txctl1 = b43legacy_default_txctl1(dev); | |
3065 | phy->txpwr_offset = 0; | |
3066 | ||
3067 | /* NRSSI */ | |
3068 | phy->nrssislope = 0; | |
3069 | for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) | |
3070 | phy->nrssi[i] = -1000; | |
3071 | for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) | |
3072 | phy->nrssi_lt[i] = i; | |
3073 | ||
3074 | phy->lofcal = 0xFFFF; | |
3075 | phy->initval = 0xFFFF; | |
3076 | ||
75388acd LF |
3077 | phy->interfmode = B43legacy_INTERFMODE_NONE; |
3078 | phy->channel = 0xFF; | |
3079 | } | |
3080 | ||
3081 | static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev) | |
3082 | { | |
3083 | /* Flags */ | |
eed0fd21 | 3084 | dev->dfq_valid = 0; |
75388acd LF |
3085 | |
3086 | /* Stats */ | |
3087 | memset(&dev->stats, 0, sizeof(dev->stats)); | |
3088 | ||
3089 | setup_struct_phy_for_init(dev, &dev->phy); | |
3090 | ||
3091 | /* IRQ related flags */ | |
3092 | dev->irq_reason = 0; | |
3093 | memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); | |
44710bbc | 3094 | dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE; |
75388acd LF |
3095 | |
3096 | dev->mac_suspended = 1; | |
3097 | ||
3098 | /* Noise calculation context */ | |
3099 | memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); | |
3100 | } | |
3101 | ||
3e2c40ef SB |
3102 | static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev, |
3103 | bool idle) { | |
3104 | u16 pu_delay = 1050; | |
3105 | ||
05c914fe | 3106 | if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle) |
3e2c40ef SB |
3107 | pu_delay = 500; |
3108 | if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8)) | |
3109 | pu_delay = max(pu_delay, (u16)2400); | |
3110 | ||
3111 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3112 | B43legacy_SHM_SH_SPUWKUP, pu_delay); | |
3113 | } | |
3114 | ||
3115 | /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */ | |
3116 | static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev) | |
3117 | { | |
3118 | u16 pretbtt; | |
3119 | ||
3120 | /* The time value is in microseconds. */ | |
05c914fe | 3121 | if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) |
3e2c40ef SB |
3122 | pretbtt = 2; |
3123 | else | |
3124 | pretbtt = 250; | |
3125 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3126 | B43legacy_SHM_SH_PRETBTT, pretbtt); | |
3127 | b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt); | |
3128 | } | |
3129 | ||
75388acd LF |
3130 | /* Shutdown a wireless core */ |
3131 | /* Locking: wl->mutex */ | |
3132 | static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev) | |
3133 | { | |
75388acd | 3134 | struct b43legacy_phy *phy = &dev->phy; |
e78c9d28 | 3135 | u32 macctl; |
75388acd LF |
3136 | |
3137 | B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED); | |
3138 | if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED) | |
3139 | return; | |
3140 | b43legacy_set_status(dev, B43legacy_STAT_UNINIT); | |
3141 | ||
e78c9d28 SB |
3142 | /* Stop the microcode PSM. */ |
3143 | macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
3144 | macctl &= ~B43legacy_MACCTL_PSM_RUN; | |
3145 | macctl |= B43legacy_MACCTL_PSM_JMP0; | |
3146 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
3147 | ||
4ad36d78 | 3148 | b43legacy_leds_exit(dev); |
75388acd LF |
3149 | b43legacy_rng_exit(dev->wl); |
3150 | b43legacy_pio_free(dev); | |
3151 | b43legacy_dma_free(dev); | |
3152 | b43legacy_chip_exit(dev); | |
93bb7f3a | 3153 | b43legacy_radio_turn_off(dev, 1); |
75388acd LF |
3154 | b43legacy_switch_analog(dev, 0); |
3155 | if (phy->dyn_tssi_tbl) | |
3156 | kfree(phy->tssi2dbm); | |
3157 | kfree(phy->lo_control); | |
3158 | phy->lo_control = NULL; | |
a297170d SB |
3159 | if (dev->wl->current_beacon) { |
3160 | dev_kfree_skb_any(dev->wl->current_beacon); | |
3161 | dev->wl->current_beacon = NULL; | |
3162 | } | |
3163 | ||
75388acd LF |
3164 | ssb_device_disable(dev->dev, 0); |
3165 | ssb_bus_may_powerdown(dev->dev->bus); | |
3166 | } | |
3167 | ||
3168 | static void prepare_phy_data_for_init(struct b43legacy_wldev *dev) | |
3169 | { | |
3170 | struct b43legacy_phy *phy = &dev->phy; | |
3171 | int i; | |
3172 | ||
3173 | /* Set default attenuation values. */ | |
3174 | phy->bbatt = b43legacy_default_baseband_attenuation(dev); | |
3175 | phy->rfatt = b43legacy_default_radio_attenuation(dev); | |
3176 | phy->txctl1 = b43legacy_default_txctl1(dev); | |
3177 | phy->txctl2 = 0xFFFF; | |
3178 | phy->txpwr_offset = 0; | |
3179 | ||
3180 | /* NRSSI */ | |
3181 | phy->nrssislope = 0; | |
3182 | for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) | |
3183 | phy->nrssi[i] = -1000; | |
3184 | for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) | |
3185 | phy->nrssi_lt[i] = i; | |
3186 | ||
3187 | phy->lofcal = 0xFFFF; | |
3188 | phy->initval = 0xFFFF; | |
3189 | ||
3190 | phy->aci_enable = 0; | |
3191 | phy->aci_wlan_automatic = 0; | |
3192 | phy->aci_hw_rssi = 0; | |
3193 | ||
3194 | phy->antenna_diversity = 0xFFFF; | |
3195 | memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); | |
3196 | memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); | |
3197 | ||
3198 | /* Flags */ | |
3199 | phy->calibrated = 0; | |
75388acd LF |
3200 | |
3201 | if (phy->_lo_pairs) | |
3202 | memset(phy->_lo_pairs, 0, | |
3203 | sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT); | |
3204 | memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain)); | |
3205 | } | |
3206 | ||
3207 | /* Initialize a wireless core */ | |
3208 | static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev) | |
3209 | { | |
3210 | struct b43legacy_wl *wl = dev->wl; | |
3211 | struct ssb_bus *bus = dev->dev->bus; | |
3212 | struct b43legacy_phy *phy = &dev->phy; | |
3213 | struct ssb_sprom *sprom = &dev->dev->bus->sprom; | |
3214 | int err; | |
3215 | u32 hf; | |
3216 | u32 tmp; | |
3217 | ||
3218 | B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); | |
3219 | ||
3220 | err = ssb_bus_powerup(bus, 0); | |
3221 | if (err) | |
3222 | goto out; | |
3223 | if (!ssb_device_is_enabled(dev->dev)) { | |
3224 | tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0; | |
3225 | b43legacy_wireless_core_reset(dev, tmp); | |
3226 | } | |
3227 | ||
3228 | if ((phy->type == B43legacy_PHYTYPE_B) || | |
3229 | (phy->type == B43legacy_PHYTYPE_G)) { | |
3230 | phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair) | |
3231 | * B43legacy_LO_COUNT, | |
3232 | GFP_KERNEL); | |
3233 | if (!phy->_lo_pairs) | |
3234 | return -ENOMEM; | |
3235 | } | |
3236 | setup_struct_wldev_for_init(dev); | |
3237 | ||
3238 | err = b43legacy_phy_init_tssi2dbm_table(dev); | |
3239 | if (err) | |
3240 | goto err_kfree_lo_control; | |
3241 | ||
3242 | /* Enable IRQ routing to this device. */ | |
3243 | ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev); | |
3244 | ||
75388acd LF |
3245 | prepare_phy_data_for_init(dev); |
3246 | b43legacy_phy_calibrate(dev); | |
3247 | err = b43legacy_chip_init(dev); | |
3248 | if (err) | |
3249 | goto err_kfree_tssitbl; | |
3250 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3251 | B43legacy_SHM_SH_WLCOREREV, | |
3252 | dev->dev->id.revision); | |
3253 | hf = b43legacy_hf_read(dev); | |
3254 | if (phy->type == B43legacy_PHYTYPE_G) { | |
3255 | hf |= B43legacy_HF_SYMW; | |
3256 | if (phy->rev == 1) | |
3257 | hf |= B43legacy_HF_GDCW; | |
7797aa38 | 3258 | if (sprom->boardflags_lo & B43legacy_BFL_PACTRL) |
75388acd LF |
3259 | hf |= B43legacy_HF_OFDMPABOOST; |
3260 | } else if (phy->type == B43legacy_PHYTYPE_B) { | |
3261 | hf |= B43legacy_HF_SYMW; | |
3262 | if (phy->rev >= 2 && phy->radio_ver == 0x2050) | |
3263 | hf &= ~B43legacy_HF_GDCW; | |
3264 | } | |
3265 | b43legacy_hf_write(dev, hf); | |
3266 | ||
0a6e1bee SB |
3267 | b43legacy_set_retry_limits(dev, |
3268 | B43legacy_DEFAULT_SHORT_RETRY_LIMIT, | |
3269 | B43legacy_DEFAULT_LONG_RETRY_LIMIT); | |
75388acd LF |
3270 | |
3271 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3272 | 0x0044, 3); | |
3273 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3274 | 0x0046, 2); | |
3275 | ||
3276 | /* Disable sending probe responses from firmware. | |
3277 | * Setting the MaxTime to one usec will always trigger | |
3278 | * a timeout, so we never send any probe resp. | |
3279 | * A timeout of zero is infinite. */ | |
3280 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3281 | B43legacy_SHM_SH_PRMAXTIME, 1); | |
3282 | ||
3283 | b43legacy_rate_memory_init(dev); | |
3284 | ||
3285 | /* Minimum Contention Window */ | |
3286 | if (phy->type == B43legacy_PHYTYPE_B) | |
3287 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, | |
3288 | 0x0003, 31); | |
3289 | else | |
3290 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, | |
3291 | 0x0003, 15); | |
3292 | /* Maximum Contention Window */ | |
3293 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, | |
3294 | 0x0004, 1023); | |
3295 | ||
3296 | do { | |
3297 | if (b43legacy_using_pio(dev)) | |
3298 | err = b43legacy_pio_init(dev); | |
3299 | else { | |
3300 | err = b43legacy_dma_init(dev); | |
3301 | if (!err) | |
3302 | b43legacy_qos_init(dev); | |
3303 | } | |
3304 | } while (err == -EAGAIN); | |
3305 | if (err) | |
3306 | goto err_chip_exit; | |
3307 | ||
3e2c40ef | 3308 | b43legacy_set_synth_pu_delay(dev, 1); |
75388acd LF |
3309 | |
3310 | ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */ | |
4150c572 | 3311 | b43legacy_upload_card_macaddress(dev); |
75388acd LF |
3312 | b43legacy_security_init(dev); |
3313 | b43legacy_rng_init(wl); | |
3314 | ||
0866b03c | 3315 | ieee80211_wake_queues(dev->wl->hw); |
75388acd LF |
3316 | b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); |
3317 | ||
4ad36d78 | 3318 | b43legacy_leds_init(dev); |
75388acd LF |
3319 | out: |
3320 | return err; | |
3321 | ||
3322 | err_chip_exit: | |
3323 | b43legacy_chip_exit(dev); | |
3324 | err_kfree_tssitbl: | |
3325 | if (phy->dyn_tssi_tbl) | |
3326 | kfree(phy->tssi2dbm); | |
3327 | err_kfree_lo_control: | |
3328 | kfree(phy->lo_control); | |
3329 | phy->lo_control = NULL; | |
3330 | ssb_bus_may_powerdown(bus); | |
3331 | B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); | |
3332 | return err; | |
3333 | } | |
3334 | ||
33a3dc93 | 3335 | static int b43legacy_op_add_interface(struct ieee80211_hw *hw, |
1ed32e4f | 3336 | struct ieee80211_vif *vif) |
75388acd LF |
3337 | { |
3338 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3339 | struct b43legacy_wldev *dev; | |
3340 | unsigned long flags; | |
3341 | int err = -EOPNOTSUPP; | |
4150c572 JB |
3342 | |
3343 | /* TODO: allow WDS/AP devices to coexist */ | |
3344 | ||
1ed32e4f JB |
3345 | if (vif->type != NL80211_IFTYPE_AP && |
3346 | vif->type != NL80211_IFTYPE_STATION && | |
3347 | vif->type != NL80211_IFTYPE_WDS && | |
3348 | vif->type != NL80211_IFTYPE_ADHOC) | |
4150c572 | 3349 | return -EOPNOTSUPP; |
75388acd LF |
3350 | |
3351 | mutex_lock(&wl->mutex); | |
4150c572 | 3352 | if (wl->operating) |
75388acd LF |
3353 | goto out_mutex_unlock; |
3354 | ||
1ed32e4f | 3355 | b43legacydbg(wl, "Adding Interface type %d\n", vif->type); |
75388acd LF |
3356 | |
3357 | dev = wl->current_dev; | |
4150c572 | 3358 | wl->operating = 1; |
1ed32e4f JB |
3359 | wl->vif = vif; |
3360 | wl->if_type = vif->type; | |
3361 | memcpy(wl->mac_addr, vif->addr, ETH_ALEN); | |
4150c572 JB |
3362 | |
3363 | spin_lock_irqsave(&wl->irq_lock, flags); | |
3364 | b43legacy_adjust_opmode(dev); | |
3e2c40ef SB |
3365 | b43legacy_set_pretbtt(dev); |
3366 | b43legacy_set_synth_pu_delay(dev, 0); | |
4150c572 JB |
3367 | b43legacy_upload_card_macaddress(dev); |
3368 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
3369 | ||
3370 | err = 0; | |
3371 | out_mutex_unlock: | |
3372 | mutex_unlock(&wl->mutex); | |
3373 | ||
3374 | return err; | |
3375 | } | |
3376 | ||
33a3dc93 | 3377 | static void b43legacy_op_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 3378 | struct ieee80211_vif *vif) |
4150c572 JB |
3379 | { |
3380 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3381 | struct b43legacy_wldev *dev = wl->current_dev; | |
3382 | unsigned long flags; | |
3383 | ||
1ed32e4f | 3384 | b43legacydbg(wl, "Removing Interface type %d\n", vif->type); |
4150c572 JB |
3385 | |
3386 | mutex_lock(&wl->mutex); | |
3387 | ||
3388 | B43legacy_WARN_ON(!wl->operating); | |
1ed32e4f | 3389 | B43legacy_WARN_ON(wl->vif != vif); |
32bfd35d | 3390 | wl->vif = NULL; |
4150c572 JB |
3391 | |
3392 | wl->operating = 0; | |
3393 | ||
3394 | spin_lock_irqsave(&wl->irq_lock, flags); | |
3395 | b43legacy_adjust_opmode(dev); | |
3396 | memset(wl->mac_addr, 0, ETH_ALEN); | |
3397 | b43legacy_upload_card_macaddress(dev); | |
3398 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
3399 | ||
3400 | mutex_unlock(&wl->mutex); | |
3401 | } | |
3402 | ||
33a3dc93 | 3403 | static int b43legacy_op_start(struct ieee80211_hw *hw) |
4150c572 JB |
3404 | { |
3405 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3406 | struct b43legacy_wldev *dev = wl->current_dev; | |
3407 | int did_init = 0; | |
208eec88 | 3408 | int err = 0; |
4ad36d78 | 3409 | |
ada50731 SB |
3410 | /* Kill all old instance specific information to make sure |
3411 | * the card won't use it in the short timeframe between start | |
3412 | * and mac80211 reconfiguring it. */ | |
3413 | memset(wl->bssid, 0, ETH_ALEN); | |
3414 | memset(wl->mac_addr, 0, ETH_ALEN); | |
3415 | wl->filter_flags = 0; | |
2d1f96dd LF |
3416 | wl->beacon0_uploaded = 0; |
3417 | wl->beacon1_uploaded = 0; | |
3418 | wl->beacon_templates_virgin = 1; | |
fd4973c5 | 3419 | wl->radio_enabled = 1; |
ada50731 | 3420 | |
4150c572 JB |
3421 | mutex_lock(&wl->mutex); |
3422 | ||
75388acd LF |
3423 | if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) { |
3424 | err = b43legacy_wireless_core_init(dev); | |
f41f3f37 | 3425 | if (err) |
75388acd LF |
3426 | goto out_mutex_unlock; |
3427 | did_init = 1; | |
3428 | } | |
4150c572 | 3429 | |
75388acd LF |
3430 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { |
3431 | err = b43legacy_wireless_core_start(dev); | |
3432 | if (err) { | |
3433 | if (did_init) | |
3434 | b43legacy_wireless_core_exit(dev); | |
3435 | goto out_mutex_unlock; | |
3436 | } | |
3437 | } | |
3438 | ||
f41f3f37 JB |
3439 | wiphy_rfkill_start_polling(hw->wiphy); |
3440 | ||
75388acd LF |
3441 | out_mutex_unlock: |
3442 | mutex_unlock(&wl->mutex); | |
3443 | ||
3444 | return err; | |
3445 | } | |
3446 | ||
33a3dc93 | 3447 | static void b43legacy_op_stop(struct ieee80211_hw *hw) |
75388acd LF |
3448 | { |
3449 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
4150c572 | 3450 | struct b43legacy_wldev *dev = wl->current_dev; |
75388acd | 3451 | |
7858e07b | 3452 | cancel_work_sync(&(wl->beacon_update_trigger)); |
4ad36d78 | 3453 | |
75388acd | 3454 | mutex_lock(&wl->mutex); |
4150c572 JB |
3455 | if (b43legacy_status(dev) >= B43legacy_STAT_STARTED) |
3456 | b43legacy_wireless_core_stop(dev); | |
3457 | b43legacy_wireless_core_exit(dev); | |
fd4973c5 | 3458 | wl->radio_enabled = 0; |
75388acd LF |
3459 | mutex_unlock(&wl->mutex); |
3460 | } | |
3461 | ||
a297170d | 3462 | static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw, |
17741cdc | 3463 | struct ieee80211_sta *sta, bool set) |
a297170d SB |
3464 | { |
3465 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3466 | unsigned long flags; | |
3467 | ||
3468 | spin_lock_irqsave(&wl->irq_lock, flags); | |
9d139c81 | 3469 | b43legacy_update_templates(wl); |
a297170d SB |
3470 | spin_unlock_irqrestore(&wl->irq_lock, flags); |
3471 | ||
3472 | return 0; | |
3473 | } | |
3474 | ||
c7ab1a4d JL |
3475 | static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx, |
3476 | struct survey_info *survey) | |
3477 | { | |
3478 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3479 | struct b43legacy_wldev *dev = wl->current_dev; | |
3480 | struct ieee80211_conf *conf = &hw->conf; | |
3481 | ||
3482 | if (idx != 0) | |
3483 | return -ENOENT; | |
3484 | ||
3485 | survey->channel = conf->channel; | |
3486 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
3487 | survey->noise = dev->stats.link_noise; | |
3488 | ||
3489 | return 0; | |
3490 | } | |
3491 | ||
75388acd | 3492 | static const struct ieee80211_ops b43legacy_hw_ops = { |
33a3dc93 SB |
3493 | .tx = b43legacy_op_tx, |
3494 | .conf_tx = b43legacy_op_conf_tx, | |
3495 | .add_interface = b43legacy_op_add_interface, | |
3496 | .remove_interface = b43legacy_op_remove_interface, | |
3497 | .config = b43legacy_op_dev_config, | |
7f3704e9 | 3498 | .bss_info_changed = b43legacy_op_bss_info_changed, |
33a3dc93 SB |
3499 | .configure_filter = b43legacy_op_configure_filter, |
3500 | .get_stats = b43legacy_op_get_stats, | |
33a3dc93 SB |
3501 | .start = b43legacy_op_start, |
3502 | .stop = b43legacy_op_stop, | |
a297170d | 3503 | .set_tim = b43legacy_op_beacon_set_tim, |
c7ab1a4d | 3504 | .get_survey = b43legacy_op_get_survey, |
f41f3f37 | 3505 | .rfkill_poll = b43legacy_rfkill_poll, |
75388acd LF |
3506 | }; |
3507 | ||
3508 | /* Hard-reset the chip. Do not call this directly. | |
3509 | * Use b43legacy_controller_restart() | |
3510 | */ | |
3511 | static void b43legacy_chip_reset(struct work_struct *work) | |
3512 | { | |
3513 | struct b43legacy_wldev *dev = | |
3514 | container_of(work, struct b43legacy_wldev, restart_work); | |
3515 | struct b43legacy_wl *wl = dev->wl; | |
3516 | int err = 0; | |
3517 | int prev_status; | |
3518 | ||
3519 | mutex_lock(&wl->mutex); | |
3520 | ||
3521 | prev_status = b43legacy_status(dev); | |
3522 | /* Bring the device down... */ | |
3523 | if (prev_status >= B43legacy_STAT_STARTED) | |
3524 | b43legacy_wireless_core_stop(dev); | |
3525 | if (prev_status >= B43legacy_STAT_INITIALIZED) | |
3526 | b43legacy_wireless_core_exit(dev); | |
3527 | ||
3528 | /* ...and up again. */ | |
3529 | if (prev_status >= B43legacy_STAT_INITIALIZED) { | |
3530 | err = b43legacy_wireless_core_init(dev); | |
3531 | if (err) | |
3532 | goto out; | |
3533 | } | |
3534 | if (prev_status >= B43legacy_STAT_STARTED) { | |
3535 | err = b43legacy_wireless_core_start(dev); | |
3536 | if (err) { | |
3537 | b43legacy_wireless_core_exit(dev); | |
3538 | goto out; | |
3539 | } | |
3540 | } | |
3541 | out: | |
48e6c51b MB |
3542 | if (err) |
3543 | wl->current_dev = NULL; /* Failed to init the dev. */ | |
75388acd LF |
3544 | mutex_unlock(&wl->mutex); |
3545 | if (err) | |
3546 | b43legacyerr(wl, "Controller restart FAILED\n"); | |
3547 | else | |
3548 | b43legacyinfo(wl, "Controller restarted\n"); | |
3549 | } | |
3550 | ||
3551 | static int b43legacy_setup_modes(struct b43legacy_wldev *dev, | |
3552 | int have_bphy, | |
3553 | int have_gphy) | |
3554 | { | |
3555 | struct ieee80211_hw *hw = dev->wl->hw; | |
75388acd | 3556 | struct b43legacy_phy *phy = &dev->phy; |
75388acd LF |
3557 | |
3558 | phy->possible_phymodes = 0; | |
8318d78a JB |
3559 | if (have_bphy) { |
3560 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | |
3561 | &b43legacy_band_2GHz_BPHY; | |
3562 | phy->possible_phymodes |= B43legacy_PHYMODE_B; | |
3563 | } | |
3564 | ||
3565 | if (have_gphy) { | |
3566 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | |
3567 | &b43legacy_band_2GHz_GPHY; | |
3568 | phy->possible_phymodes |= B43legacy_PHYMODE_G; | |
75388acd LF |
3569 | } |
3570 | ||
3571 | return 0; | |
3572 | } | |
3573 | ||
3574 | static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev) | |
3575 | { | |
3576 | /* We release firmware that late to not be required to re-request | |
3577 | * is all the time when we reinit the core. */ | |
3578 | b43legacy_release_firmware(dev); | |
3579 | } | |
3580 | ||
3581 | static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev) | |
3582 | { | |
3583 | struct b43legacy_wl *wl = dev->wl; | |
3584 | struct ssb_bus *bus = dev->dev->bus; | |
899110fe | 3585 | struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL; |
75388acd LF |
3586 | int err; |
3587 | int have_bphy = 0; | |
3588 | int have_gphy = 0; | |
3589 | u32 tmp; | |
3590 | ||
3591 | /* Do NOT do any device initialization here. | |
3592 | * Do it in wireless_core_init() instead. | |
3593 | * This function is for gathering basic information about the HW, only. | |
3594 | * Also some structs may be set up here. But most likely you want to | |
3595 | * have that in core_init(), too. | |
3596 | */ | |
3597 | ||
3598 | err = ssb_bus_powerup(bus, 0); | |
3599 | if (err) { | |
3600 | b43legacyerr(wl, "Bus powerup failed\n"); | |
3601 | goto out; | |
3602 | } | |
3603 | /* Get the PHY type. */ | |
3604 | if (dev->dev->id.revision >= 5) { | |
3605 | u32 tmshigh; | |
3606 | ||
3607 | tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); | |
3608 | have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY); | |
3609 | if (!have_gphy) | |
3610 | have_bphy = 1; | |
3611 | } else if (dev->dev->id.revision == 4) | |
3612 | have_gphy = 1; | |
3613 | else | |
3614 | have_bphy = 1; | |
3615 | ||
75388acd | 3616 | dev->phy.gmode = (have_gphy || have_bphy); |
fd4973c5 | 3617 | dev->phy.radio_on = 1; |
75388acd LF |
3618 | tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; |
3619 | b43legacy_wireless_core_reset(dev, tmp); | |
3620 | ||
3621 | err = b43legacy_phy_versioning(dev); | |
3622 | if (err) | |
ba48f7bb | 3623 | goto err_powerdown; |
75388acd LF |
3624 | /* Check if this device supports multiband. */ |
3625 | if (!pdev || | |
3626 | (pdev->device != 0x4312 && | |
3627 | pdev->device != 0x4319 && | |
3628 | pdev->device != 0x4324)) { | |
3629 | /* No multiband support. */ | |
3630 | have_bphy = 0; | |
3631 | have_gphy = 0; | |
3632 | switch (dev->phy.type) { | |
3633 | case B43legacy_PHYTYPE_B: | |
3634 | have_bphy = 1; | |
3635 | break; | |
3636 | case B43legacy_PHYTYPE_G: | |
3637 | have_gphy = 1; | |
3638 | break; | |
3639 | default: | |
3640 | B43legacy_BUG_ON(1); | |
3641 | } | |
3642 | } | |
3643 | dev->phy.gmode = (have_gphy || have_bphy); | |
3644 | tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; | |
3645 | b43legacy_wireless_core_reset(dev, tmp); | |
3646 | ||
3647 | err = b43legacy_validate_chipaccess(dev); | |
3648 | if (err) | |
ba48f7bb | 3649 | goto err_powerdown; |
75388acd LF |
3650 | err = b43legacy_setup_modes(dev, have_bphy, have_gphy); |
3651 | if (err) | |
ba48f7bb | 3652 | goto err_powerdown; |
75388acd LF |
3653 | |
3654 | /* Now set some default "current_dev" */ | |
3655 | if (!wl->current_dev) | |
3656 | wl->current_dev = dev; | |
3657 | INIT_WORK(&dev->restart_work, b43legacy_chip_reset); | |
3658 | ||
93bb7f3a | 3659 | b43legacy_radio_turn_off(dev, 1); |
75388acd LF |
3660 | b43legacy_switch_analog(dev, 0); |
3661 | ssb_device_disable(dev->dev, 0); | |
3662 | ssb_bus_may_powerdown(bus); | |
3663 | ||
3664 | out: | |
3665 | return err; | |
3666 | ||
75388acd LF |
3667 | err_powerdown: |
3668 | ssb_bus_may_powerdown(bus); | |
3669 | return err; | |
3670 | } | |
3671 | ||
3672 | static void b43legacy_one_core_detach(struct ssb_device *dev) | |
3673 | { | |
3674 | struct b43legacy_wldev *wldev; | |
3675 | struct b43legacy_wl *wl; | |
3676 | ||
48e6c51b MB |
3677 | /* Do not cancel ieee80211-workqueue based work here. |
3678 | * See comment in b43legacy_remove(). */ | |
3679 | ||
75388acd LF |
3680 | wldev = ssb_get_drvdata(dev); |
3681 | wl = wldev->wl; | |
75388acd LF |
3682 | b43legacy_debugfs_remove_device(wldev); |
3683 | b43legacy_wireless_core_detach(wldev); | |
3684 | list_del(&wldev->list); | |
3685 | wl->nr_devs--; | |
3686 | ssb_set_drvdata(dev, NULL); | |
3687 | kfree(wldev); | |
3688 | } | |
3689 | ||
3690 | static int b43legacy_one_core_attach(struct ssb_device *dev, | |
3691 | struct b43legacy_wl *wl) | |
3692 | { | |
3693 | struct b43legacy_wldev *wldev; | |
75388acd LF |
3694 | int err = -ENOMEM; |
3695 | ||
75388acd LF |
3696 | wldev = kzalloc(sizeof(*wldev), GFP_KERNEL); |
3697 | if (!wldev) | |
3698 | goto out; | |
3699 | ||
3700 | wldev->dev = dev; | |
3701 | wldev->wl = wl; | |
3702 | b43legacy_set_status(wldev, B43legacy_STAT_UNINIT); | |
3703 | wldev->bad_frames_preempt = modparam_bad_frames_preempt; | |
3704 | tasklet_init(&wldev->isr_tasklet, | |
3705 | (void (*)(unsigned long))b43legacy_interrupt_tasklet, | |
3706 | (unsigned long)wldev); | |
3707 | if (modparam_pio) | |
3708 | wldev->__using_pio = 1; | |
3709 | INIT_LIST_HEAD(&wldev->list); | |
3710 | ||
3711 | err = b43legacy_wireless_core_attach(wldev); | |
3712 | if (err) | |
3713 | goto err_kfree_wldev; | |
3714 | ||
3715 | list_add(&wldev->list, &wl->devlist); | |
3716 | wl->nr_devs++; | |
3717 | ssb_set_drvdata(dev, wldev); | |
3718 | b43legacy_debugfs_add_device(wldev); | |
3719 | out: | |
3720 | return err; | |
3721 | ||
3722 | err_kfree_wldev: | |
3723 | kfree(wldev); | |
3724 | return err; | |
3725 | } | |
3726 | ||
3727 | static void b43legacy_sprom_fixup(struct ssb_bus *bus) | |
3728 | { | |
3729 | /* boardflags workarounds */ | |
3730 | if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && | |
3731 | bus->boardinfo.type == 0x4E && | |
3732 | bus->boardinfo.rev > 0x40) | |
7797aa38 | 3733 | bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL; |
75388acd LF |
3734 | } |
3735 | ||
3736 | static void b43legacy_wireless_exit(struct ssb_device *dev, | |
3737 | struct b43legacy_wl *wl) | |
3738 | { | |
3739 | struct ieee80211_hw *hw = wl->hw; | |
3740 | ||
3741 | ssb_set_devtypedata(dev, NULL); | |
3742 | ieee80211_free_hw(hw); | |
3743 | } | |
3744 | ||
3745 | static int b43legacy_wireless_init(struct ssb_device *dev) | |
3746 | { | |
3747 | struct ssb_sprom *sprom = &dev->bus->sprom; | |
3748 | struct ieee80211_hw *hw; | |
3749 | struct b43legacy_wl *wl; | |
3750 | int err = -ENOMEM; | |
3751 | ||
3752 | b43legacy_sprom_fixup(dev->bus); | |
3753 | ||
3754 | hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops); | |
3755 | if (!hw) { | |
3756 | b43legacyerr(NULL, "Could not allocate ieee80211 device\n"); | |
3757 | goto out; | |
3758 | } | |
3759 | ||
3760 | /* fill hw info */ | |
605a0bd6 | 3761 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
f5c044e5 | 3762 | IEEE80211_HW_SIGNAL_DBM; |
f59ac048 LR |
3763 | hw->wiphy->interface_modes = |
3764 | BIT(NL80211_IFTYPE_AP) | | |
3765 | BIT(NL80211_IFTYPE_STATION) | | |
3766 | BIT(NL80211_IFTYPE_WDS) | | |
3767 | BIT(NL80211_IFTYPE_ADHOC); | |
75388acd | 3768 | hw->queues = 1; /* FIXME: hardware has more queues */ |
e6a9854b | 3769 | hw->max_rates = 2; |
75388acd | 3770 | SET_IEEE80211_DEV(hw, dev->dev); |
7797aa38 LF |
3771 | if (is_valid_ether_addr(sprom->et1mac)) |
3772 | SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac); | |
75388acd | 3773 | else |
7797aa38 | 3774 | SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac); |
75388acd LF |
3775 | |
3776 | /* Get and initialize struct b43legacy_wl */ | |
3777 | wl = hw_to_b43legacy_wl(hw); | |
3778 | memset(wl, 0, sizeof(*wl)); | |
3779 | wl->hw = hw; | |
3780 | spin_lock_init(&wl->irq_lock); | |
3781 | spin_lock_init(&wl->leds_lock); | |
3782 | mutex_init(&wl->mutex); | |
3783 | INIT_LIST_HEAD(&wl->devlist); | |
7858e07b | 3784 | INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work); |
75388acd LF |
3785 | |
3786 | ssb_set_devtypedata(dev, wl); | |
3787 | b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id); | |
3788 | err = 0; | |
3789 | out: | |
3790 | return err; | |
3791 | } | |
3792 | ||
3793 | static int b43legacy_probe(struct ssb_device *dev, | |
3794 | const struct ssb_device_id *id) | |
3795 | { | |
3796 | struct b43legacy_wl *wl; | |
3797 | int err; | |
3798 | int first = 0; | |
3799 | ||
3800 | wl = ssb_get_devtypedata(dev); | |
3801 | if (!wl) { | |
3802 | /* Probing the first core - setup common struct b43legacy_wl */ | |
3803 | first = 1; | |
3804 | err = b43legacy_wireless_init(dev); | |
3805 | if (err) | |
3806 | goto out; | |
3807 | wl = ssb_get_devtypedata(dev); | |
3808 | B43legacy_WARN_ON(!wl); | |
3809 | } | |
3810 | err = b43legacy_one_core_attach(dev, wl); | |
3811 | if (err) | |
3812 | goto err_wireless_exit; | |
3813 | ||
3814 | if (first) { | |
3815 | err = ieee80211_register_hw(wl->hw); | |
3816 | if (err) | |
3817 | goto err_one_core_detach; | |
3818 | } | |
3819 | ||
3820 | out: | |
3821 | return err; | |
3822 | ||
3823 | err_one_core_detach: | |
3824 | b43legacy_one_core_detach(dev); | |
3825 | err_wireless_exit: | |
3826 | if (first) | |
3827 | b43legacy_wireless_exit(dev, wl); | |
3828 | return err; | |
3829 | } | |
3830 | ||
3831 | static void b43legacy_remove(struct ssb_device *dev) | |
3832 | { | |
3833 | struct b43legacy_wl *wl = ssb_get_devtypedata(dev); | |
3834 | struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); | |
3835 | ||
48e6c51b MB |
3836 | /* We must cancel any work here before unregistering from ieee80211, |
3837 | * as the ieee80211 unreg will destroy the workqueue. */ | |
3838 | cancel_work_sync(&wldev->restart_work); | |
3839 | ||
75388acd LF |
3840 | B43legacy_WARN_ON(!wl); |
3841 | if (wl->current_dev == wldev) | |
3842 | ieee80211_unregister_hw(wl->hw); | |
3843 | ||
3844 | b43legacy_one_core_detach(dev); | |
3845 | ||
3846 | if (list_empty(&wl->devlist)) | |
3847 | /* Last core on the chip unregistered. | |
3848 | * We can destroy common struct b43legacy_wl. | |
3849 | */ | |
3850 | b43legacy_wireless_exit(dev, wl); | |
3851 | } | |
3852 | ||
3853 | /* Perform a hardware reset. This can be called from any context. */ | |
3854 | void b43legacy_controller_restart(struct b43legacy_wldev *dev, | |
3855 | const char *reason) | |
3856 | { | |
3857 | /* Must avoid requeueing, if we are in shutdown. */ | |
3858 | if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) | |
3859 | return; | |
3860 | b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason); | |
42935eca | 3861 | ieee80211_queue_work(dev->wl->hw, &dev->restart_work); |
75388acd LF |
3862 | } |
3863 | ||
3864 | #ifdef CONFIG_PM | |
3865 | ||
3866 | static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state) | |
3867 | { | |
3868 | struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); | |
3869 | struct b43legacy_wl *wl = wldev->wl; | |
3870 | ||
3871 | b43legacydbg(wl, "Suspending...\n"); | |
3872 | ||
3873 | mutex_lock(&wl->mutex); | |
3874 | wldev->suspend_init_status = b43legacy_status(wldev); | |
3875 | if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) | |
3876 | b43legacy_wireless_core_stop(wldev); | |
3877 | if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) | |
3878 | b43legacy_wireless_core_exit(wldev); | |
3879 | mutex_unlock(&wl->mutex); | |
3880 | ||
3881 | b43legacydbg(wl, "Device suspended.\n"); | |
3882 | ||
3883 | return 0; | |
3884 | } | |
3885 | ||
3886 | static int b43legacy_resume(struct ssb_device *dev) | |
3887 | { | |
3888 | struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); | |
3889 | struct b43legacy_wl *wl = wldev->wl; | |
3890 | int err = 0; | |
3891 | ||
3892 | b43legacydbg(wl, "Resuming...\n"); | |
3893 | ||
3894 | mutex_lock(&wl->mutex); | |
3895 | if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) { | |
3896 | err = b43legacy_wireless_core_init(wldev); | |
3897 | if (err) { | |
3898 | b43legacyerr(wl, "Resume failed at core init\n"); | |
3899 | goto out; | |
3900 | } | |
3901 | } | |
3902 | if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) { | |
3903 | err = b43legacy_wireless_core_start(wldev); | |
3904 | if (err) { | |
3905 | b43legacy_wireless_core_exit(wldev); | |
3906 | b43legacyerr(wl, "Resume failed at core start\n"); | |
3907 | goto out; | |
3908 | } | |
3909 | } | |
75388acd LF |
3910 | |
3911 | b43legacydbg(wl, "Device resumed.\n"); | |
3912 | out: | |
4104863f | 3913 | mutex_unlock(&wl->mutex); |
75388acd LF |
3914 | return err; |
3915 | } | |
3916 | ||
3917 | #else /* CONFIG_PM */ | |
3918 | # define b43legacy_suspend NULL | |
3919 | # define b43legacy_resume NULL | |
3920 | #endif /* CONFIG_PM */ | |
3921 | ||
3922 | static struct ssb_driver b43legacy_ssb_driver = { | |
3923 | .name = KBUILD_MODNAME, | |
3924 | .id_table = b43legacy_ssb_tbl, | |
3925 | .probe = b43legacy_probe, | |
3926 | .remove = b43legacy_remove, | |
3927 | .suspend = b43legacy_suspend, | |
3928 | .resume = b43legacy_resume, | |
3929 | }; | |
3930 | ||
6fff1c64 SB |
3931 | static void b43legacy_print_driverinfo(void) |
3932 | { | |
2f1f00fc | 3933 | const char *feat_pci = "", *feat_leds = "", |
6fff1c64 SB |
3934 | *feat_pio = "", *feat_dma = ""; |
3935 | ||
3936 | #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT | |
3937 | feat_pci = "P"; | |
3938 | #endif | |
3939 | #ifdef CONFIG_B43LEGACY_LEDS | |
3940 | feat_leds = "L"; | |
3941 | #endif | |
6fff1c64 SB |
3942 | #ifdef CONFIG_B43LEGACY_PIO |
3943 | feat_pio = "I"; | |
3944 | #endif | |
3945 | #ifdef CONFIG_B43LEGACY_DMA | |
3946 | feat_dma = "D"; | |
3947 | #endif | |
c256e05b | 3948 | printk(KERN_INFO "Broadcom 43xx-legacy driver loaded " |
2f1f00fc | 3949 | "[ Features: %s%s%s%s, Firmware-ID: " |
6fff1c64 | 3950 | B43legacy_SUPPORTED_FIRMWARE_ID " ]\n", |
2f1f00fc | 3951 | feat_pci, feat_leds, feat_pio, feat_dma); |
6fff1c64 SB |
3952 | } |
3953 | ||
75388acd LF |
3954 | static int __init b43legacy_init(void) |
3955 | { | |
3956 | int err; | |
3957 | ||
3958 | b43legacy_debugfs_init(); | |
3959 | ||
3960 | err = ssb_driver_register(&b43legacy_ssb_driver); | |
3961 | if (err) | |
3962 | goto err_dfs_exit; | |
3963 | ||
6fff1c64 SB |
3964 | b43legacy_print_driverinfo(); |
3965 | ||
75388acd LF |
3966 | return err; |
3967 | ||
3968 | err_dfs_exit: | |
3969 | b43legacy_debugfs_exit(); | |
3970 | return err; | |
3971 | } | |
3972 | ||
3973 | static void __exit b43legacy_exit(void) | |
3974 | { | |
3975 | ssb_driver_unregister(&b43legacy_ssb_driver); | |
3976 | b43legacy_debugfs_exit(); | |
3977 | } | |
3978 | ||
3979 | module_init(b43legacy_init) | |
3980 | module_exit(b43legacy_exit) |