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5b435de0 AS |
1 | /* |
2 | * Copyright (c) 2010 Broadcom Corporation | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
11 | * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION | |
13 | * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN | |
14 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include <linux/types.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/kthread.h> | |
20 | #include <linux/printk.h> | |
21 | #include <linux/pci_ids.h> | |
22 | #include <linux/netdevice.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/mmc/sdio.h> | |
26 | #include <linux/mmc/sdio_func.h> | |
27 | #include <linux/mmc/card.h> | |
28 | #include <linux/semaphore.h> | |
29 | #include <linux/firmware.h> | |
b7a57e76 | 30 | #include <linux/module.h> |
99ba15cd | 31 | #include <linux/bcma/bcma.h> |
5b435de0 AS |
32 | #include <asm/unaligned.h> |
33 | #include <defs.h> | |
34 | #include <brcmu_wifi.h> | |
35 | #include <brcmu_utils.h> | |
36 | #include <brcm_hw_ids.h> | |
37 | #include <soc.h> | |
38 | #include "sdio_host.h" | |
a83369b6 | 39 | #include "sdio_chip.h" |
5b435de0 AS |
40 | |
41 | #define DCMD_RESP_TIMEOUT 2000 /* In milli second */ | |
42 | ||
8ae74654 | 43 | #ifdef DEBUG |
5b435de0 AS |
44 | |
45 | #define BRCMF_TRAP_INFO_SIZE 80 | |
46 | ||
47 | #define CBUF_LEN (128) | |
48 | ||
49 | struct rte_log_le { | |
50 | __le32 buf; /* Can't be pointer on (64-bit) hosts */ | |
51 | __le32 buf_size; | |
52 | __le32 idx; | |
53 | char *_buf_compat; /* Redundant pointer for backward compat. */ | |
54 | }; | |
55 | ||
56 | struct rte_console { | |
57 | /* Virtual UART | |
58 | * When there is no UART (e.g. Quickturn), | |
59 | * the host should write a complete | |
60 | * input line directly into cbuf and then write | |
61 | * the length into vcons_in. | |
62 | * This may also be used when there is a real UART | |
63 | * (at risk of conflicting with | |
64 | * the real UART). vcons_out is currently unused. | |
65 | */ | |
66 | uint vcons_in; | |
67 | uint vcons_out; | |
68 | ||
69 | /* Output (logging) buffer | |
70 | * Console output is written to a ring buffer log_buf at index log_idx. | |
71 | * The host may read the output when it sees log_idx advance. | |
72 | * Output will be lost if the output wraps around faster than the host | |
73 | * polls. | |
74 | */ | |
75 | struct rte_log_le log_le; | |
76 | ||
77 | /* Console input line buffer | |
78 | * Characters are read one at a time into cbuf | |
79 | * until <CR> is received, then | |
80 | * the buffer is processed as a command line. | |
81 | * Also used for virtual UART. | |
82 | */ | |
83 | uint cbuf_idx; | |
84 | char cbuf[CBUF_LEN]; | |
85 | }; | |
86 | ||
8ae74654 | 87 | #endif /* DEBUG */ |
5b435de0 AS |
88 | #include <chipcommon.h> |
89 | ||
5b435de0 | 90 | #include "dhd_bus.h" |
5b435de0 | 91 | #include "dhd_dbg.h" |
5b435de0 AS |
92 | |
93 | #define TXQLEN 2048 /* bulk tx queue length */ | |
94 | #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */ | |
95 | #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */ | |
96 | #define PRIOMASK 7 | |
97 | ||
98 | #define TXRETRIES 2 /* # of retries for tx frames */ | |
99 | ||
100 | #define BRCMF_RXBOUND 50 /* Default for max rx frames in | |
101 | one scheduling */ | |
102 | ||
103 | #define BRCMF_TXBOUND 20 /* Default for max tx frames in | |
104 | one scheduling */ | |
105 | ||
106 | #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */ | |
107 | ||
108 | #define MEMBLOCK 2048 /* Block size used for downloading | |
109 | of dongle image */ | |
110 | #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold | |
111 | biggest possible glom */ | |
112 | ||
113 | #define BRCMF_FIRSTREAD (1 << 6) | |
114 | ||
115 | ||
116 | /* SBSDIO_DEVICE_CTL */ | |
117 | ||
118 | /* 1: device will assert busy signal when receiving CMD53 */ | |
119 | #define SBSDIO_DEVCTL_SETBUSY 0x01 | |
120 | /* 1: assertion of sdio interrupt is synchronous to the sdio clock */ | |
121 | #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 | |
122 | /* 1: mask all interrupts to host except the chipActive (rev 8) */ | |
123 | #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 | |
124 | /* 1: isolate internal sdio signals, put external pads in tri-state; requires | |
125 | * sdio bus power cycle to clear (rev 9) */ | |
126 | #define SBSDIO_DEVCTL_PADS_ISO 0x08 | |
127 | /* Force SD->SB reset mapping (rev 11) */ | |
128 | #define SBSDIO_DEVCTL_SB_RST_CTL 0x30 | |
129 | /* Determined by CoreControl bit */ | |
130 | #define SBSDIO_DEVCTL_RST_CORECTL 0x00 | |
131 | /* Force backplane reset */ | |
132 | #define SBSDIO_DEVCTL_RST_BPRESET 0x10 | |
133 | /* Force no backplane reset */ | |
134 | #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 | |
135 | ||
5b435de0 AS |
136 | /* direct(mapped) cis space */ |
137 | ||
138 | /* MAPPED common CIS address */ | |
139 | #define SBSDIO_CIS_BASE_COMMON 0x1000 | |
140 | /* maximum bytes in one CIS */ | |
141 | #define SBSDIO_CIS_SIZE_LIMIT 0x200 | |
142 | /* cis offset addr is < 17 bits */ | |
143 | #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF | |
144 | ||
145 | /* manfid tuple length, include tuple, link bytes */ | |
146 | #define SBSDIO_CIS_MANFID_TUPLE_LEN 6 | |
147 | ||
148 | /* intstatus */ | |
149 | #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ | |
150 | #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ | |
151 | #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ | |
152 | #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ | |
153 | #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ | |
154 | #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ | |
155 | #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ | |
156 | #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ | |
157 | #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ | |
158 | #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ | |
159 | #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ | |
160 | #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ | |
161 | #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ | |
162 | #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ | |
163 | #define I_PC (1 << 10) /* descriptor error */ | |
164 | #define I_PD (1 << 11) /* data error */ | |
165 | #define I_DE (1 << 12) /* Descriptor protocol Error */ | |
166 | #define I_RU (1 << 13) /* Receive descriptor Underflow */ | |
167 | #define I_RO (1 << 14) /* Receive fifo Overflow */ | |
168 | #define I_XU (1 << 15) /* Transmit fifo Underflow */ | |
169 | #define I_RI (1 << 16) /* Receive Interrupt */ | |
170 | #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ | |
171 | #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ | |
172 | #define I_XI (1 << 24) /* Transmit Interrupt */ | |
173 | #define I_RF_TERM (1 << 25) /* Read Frame Terminate */ | |
174 | #define I_WF_TERM (1 << 26) /* Write Frame Terminate */ | |
175 | #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ | |
176 | #define I_SBINT (1 << 28) /* sbintstatus Interrupt */ | |
177 | #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */ | |
178 | #define I_SRESET (1 << 30) /* CCCR RES interrupt */ | |
179 | #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ | |
180 | #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) | |
181 | #define I_DMA (I_RI | I_XI | I_ERRORS) | |
182 | ||
183 | /* corecontrol */ | |
184 | #define CC_CISRDY (1 << 0) /* CIS Ready */ | |
185 | #define CC_BPRESEN (1 << 1) /* CCCR RES signal */ | |
186 | #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ | |
187 | #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */ | |
188 | #define CC_XMTDATAAVAIL_MODE (1 << 4) | |
189 | #define CC_XMTDATAAVAIL_CTRL (1 << 5) | |
190 | ||
191 | /* SDA_FRAMECTRL */ | |
192 | #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ | |
193 | #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ | |
194 | #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */ | |
195 | #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */ | |
196 | ||
197 | /* HW frame tag */ | |
198 | #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */ | |
199 | ||
200 | /* Total length of frame header for dongle protocol */ | |
201 | #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN) | |
202 | #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN) | |
203 | ||
204 | /* | |
205 | * Software allocation of To SB Mailbox resources | |
206 | */ | |
207 | ||
208 | /* tosbmailbox bits corresponding to intstatus bits */ | |
209 | #define SMB_NAK (1 << 0) /* Frame NAK */ | |
210 | #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */ | |
211 | #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */ | |
212 | #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */ | |
213 | ||
214 | /* tosbmailboxdata */ | |
215 | #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */ | |
216 | ||
217 | /* | |
218 | * Software allocation of To Host Mailbox resources | |
219 | */ | |
220 | ||
221 | /* intstatus bits */ | |
222 | #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */ | |
223 | #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */ | |
224 | #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */ | |
225 | #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */ | |
226 | ||
227 | /* tohostmailboxdata */ | |
228 | #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */ | |
229 | #define HMB_DATA_DEVREADY 2 /* talk to host after enable */ | |
230 | #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */ | |
231 | #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */ | |
232 | ||
233 | #define HMB_DATA_FCDATA_MASK 0xff000000 | |
234 | #define HMB_DATA_FCDATA_SHIFT 24 | |
235 | ||
236 | #define HMB_DATA_VERSION_MASK 0x00ff0000 | |
237 | #define HMB_DATA_VERSION_SHIFT 16 | |
238 | ||
239 | /* | |
240 | * Software-defined protocol header | |
241 | */ | |
242 | ||
243 | /* Current protocol version */ | |
244 | #define SDPCM_PROT_VERSION 4 | |
245 | ||
246 | /* SW frame header */ | |
247 | #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) | |
248 | ||
249 | #define SDPCM_CHANNEL_MASK 0x00000f00 | |
250 | #define SDPCM_CHANNEL_SHIFT 8 | |
251 | #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) | |
252 | ||
253 | #define SDPCM_NEXTLEN_OFFSET 2 | |
254 | ||
255 | /* Data Offset from SOF (HW Tag, SW Tag, Pad) */ | |
256 | #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ | |
257 | #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) | |
258 | #define SDPCM_DOFFSET_MASK 0xff000000 | |
259 | #define SDPCM_DOFFSET_SHIFT 24 | |
260 | #define SDPCM_FCMASK_OFFSET 4 /* Flow control */ | |
261 | #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) | |
262 | #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ | |
263 | #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) | |
264 | ||
265 | #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ | |
266 | ||
267 | /* logical channel numbers */ | |
268 | #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */ | |
269 | #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ | |
270 | #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ | |
271 | #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */ | |
272 | #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ | |
273 | ||
274 | #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */ | |
275 | ||
276 | #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) | |
277 | ||
278 | /* | |
279 | * Shared structure between dongle and the host. | |
280 | * The structure contains pointers to trap or assert information. | |
281 | */ | |
282 | #define SDPCM_SHARED_VERSION 0x0002 | |
283 | #define SDPCM_SHARED_VERSION_MASK 0x00FF | |
284 | #define SDPCM_SHARED_ASSERT_BUILT 0x0100 | |
285 | #define SDPCM_SHARED_ASSERT 0x0200 | |
286 | #define SDPCM_SHARED_TRAP 0x0400 | |
287 | ||
288 | /* Space for header read, limit for data packets */ | |
289 | #define MAX_HDR_READ (1 << 6) | |
290 | #define MAX_RX_DATASZ 2048 | |
291 | ||
292 | /* Maximum milliseconds to wait for F2 to come up */ | |
293 | #define BRCMF_WAIT_F2RDY 3000 | |
294 | ||
295 | /* Bump up limit on waiting for HT to account for first startup; | |
296 | * if the image is doing a CRC calculation before programming the PMU | |
297 | * for HT availability, it could take a couple hundred ms more, so | |
298 | * max out at a 1 second (1000000us). | |
299 | */ | |
300 | #undef PMU_MAX_TRANSITION_DLY | |
301 | #define PMU_MAX_TRANSITION_DLY 1000000 | |
302 | ||
303 | /* Value for ChipClockCSR during initial setup */ | |
304 | #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \ | |
305 | SBSDIO_ALP_AVAIL_REQ) | |
306 | ||
307 | /* Flags for SDH calls */ | |
308 | #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED) | |
309 | ||
8dd939ca FL |
310 | #define BRCMFMAC_FW_NAME "brcm/brcmfmac.bin" |
311 | #define BRCMFMAC_NV_NAME "brcm/brcmfmac.txt" | |
312 | MODULE_FIRMWARE(BRCMFMAC_FW_NAME); | |
313 | MODULE_FIRMWARE(BRCMFMAC_NV_NAME); | |
314 | ||
382a9e0f FL |
315 | #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */ |
316 | #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change | |
317 | * when idle | |
318 | */ | |
319 | #define BRCMF_IDLE_INTERVAL 1 | |
320 | ||
5b435de0 AS |
321 | /* |
322 | * Conversion of 802.1D priority to precedence level | |
323 | */ | |
324 | static uint prio2prec(u32 prio) | |
325 | { | |
326 | return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ? | |
327 | (prio^2) : prio; | |
328 | } | |
329 | ||
5b435de0 AS |
330 | /* core registers */ |
331 | struct sdpcmd_regs { | |
332 | u32 corecontrol; /* 0x00, rev8 */ | |
333 | u32 corestatus; /* rev8 */ | |
334 | u32 PAD[1]; | |
335 | u32 biststatus; /* rev8 */ | |
336 | ||
337 | /* PCMCIA access */ | |
338 | u16 pcmciamesportaladdr; /* 0x010, rev8 */ | |
339 | u16 PAD[1]; | |
340 | u16 pcmciamesportalmask; /* rev8 */ | |
341 | u16 PAD[1]; | |
342 | u16 pcmciawrframebc; /* rev8 */ | |
343 | u16 PAD[1]; | |
344 | u16 pcmciaunderflowtimer; /* rev8 */ | |
345 | u16 PAD[1]; | |
346 | ||
347 | /* interrupt */ | |
348 | u32 intstatus; /* 0x020, rev8 */ | |
349 | u32 hostintmask; /* rev8 */ | |
350 | u32 intmask; /* rev8 */ | |
351 | u32 sbintstatus; /* rev8 */ | |
352 | u32 sbintmask; /* rev8 */ | |
353 | u32 funcintmask; /* rev4 */ | |
354 | u32 PAD[2]; | |
355 | u32 tosbmailbox; /* 0x040, rev8 */ | |
356 | u32 tohostmailbox; /* rev8 */ | |
357 | u32 tosbmailboxdata; /* rev8 */ | |
358 | u32 tohostmailboxdata; /* rev8 */ | |
359 | ||
360 | /* synchronized access to registers in SDIO clock domain */ | |
361 | u32 sdioaccess; /* 0x050, rev8 */ | |
362 | u32 PAD[3]; | |
363 | ||
364 | /* PCMCIA frame control */ | |
365 | u8 pcmciaframectrl; /* 0x060, rev8 */ | |
366 | u8 PAD[3]; | |
367 | u8 pcmciawatermark; /* rev8 */ | |
368 | u8 PAD[155]; | |
369 | ||
370 | /* interrupt batching control */ | |
371 | u32 intrcvlazy; /* 0x100, rev8 */ | |
372 | u32 PAD[3]; | |
373 | ||
374 | /* counters */ | |
375 | u32 cmd52rd; /* 0x110, rev8 */ | |
376 | u32 cmd52wr; /* rev8 */ | |
377 | u32 cmd53rd; /* rev8 */ | |
378 | u32 cmd53wr; /* rev8 */ | |
379 | u32 abort; /* rev8 */ | |
380 | u32 datacrcerror; /* rev8 */ | |
381 | u32 rdoutofsync; /* rev8 */ | |
382 | u32 wroutofsync; /* rev8 */ | |
383 | u32 writebusy; /* rev8 */ | |
384 | u32 readwait; /* rev8 */ | |
385 | u32 readterm; /* rev8 */ | |
386 | u32 writeterm; /* rev8 */ | |
387 | u32 PAD[40]; | |
388 | u32 clockctlstatus; /* rev8 */ | |
389 | u32 PAD[7]; | |
390 | ||
391 | u32 PAD[128]; /* DMA engines */ | |
392 | ||
393 | /* SDIO/PCMCIA CIS region */ | |
394 | char cis[512]; /* 0x400-0x5ff, rev6 */ | |
395 | ||
396 | /* PCMCIA function control registers */ | |
397 | char pcmciafcr[256]; /* 0x600-6ff, rev6 */ | |
398 | u16 PAD[55]; | |
399 | ||
400 | /* PCMCIA backplane access */ | |
401 | u16 backplanecsr; /* 0x76E, rev6 */ | |
402 | u16 backplaneaddr0; /* rev6 */ | |
403 | u16 backplaneaddr1; /* rev6 */ | |
404 | u16 backplaneaddr2; /* rev6 */ | |
405 | u16 backplaneaddr3; /* rev6 */ | |
406 | u16 backplanedata0; /* rev6 */ | |
407 | u16 backplanedata1; /* rev6 */ | |
408 | u16 backplanedata2; /* rev6 */ | |
409 | u16 backplanedata3; /* rev6 */ | |
410 | u16 PAD[31]; | |
411 | ||
412 | /* sprom "size" & "blank" info */ | |
413 | u16 spromstatus; /* 0x7BE, rev2 */ | |
414 | u32 PAD[464]; | |
415 | ||
416 | u16 PAD[0x80]; | |
417 | }; | |
418 | ||
8ae74654 | 419 | #ifdef DEBUG |
5b435de0 AS |
420 | /* Device console log buffer state */ |
421 | struct brcmf_console { | |
422 | uint count; /* Poll interval msec counter */ | |
423 | uint log_addr; /* Log struct address (fixed) */ | |
424 | struct rte_log_le log_le; /* Log struct (host copy) */ | |
425 | uint bufsize; /* Size of log buffer */ | |
426 | u8 *buf; /* Log buffer (host copy) */ | |
427 | uint last; /* Last buffer read index */ | |
428 | }; | |
8ae74654 | 429 | #endif /* DEBUG */ |
5b435de0 AS |
430 | |
431 | struct sdpcm_shared { | |
432 | u32 flags; | |
433 | u32 trap_addr; | |
434 | u32 assert_exp_addr; | |
435 | u32 assert_file_addr; | |
436 | u32 assert_line; | |
437 | u32 console_addr; /* Address of struct rte_console */ | |
438 | u32 msgtrace_addr; | |
439 | u8 tag[32]; | |
440 | }; | |
441 | ||
442 | struct sdpcm_shared_le { | |
443 | __le32 flags; | |
444 | __le32 trap_addr; | |
445 | __le32 assert_exp_addr; | |
446 | __le32 assert_file_addr; | |
447 | __le32 assert_line; | |
448 | __le32 console_addr; /* Address of struct rte_console */ | |
449 | __le32 msgtrace_addr; | |
450 | u8 tag[32]; | |
451 | }; | |
452 | ||
453 | ||
454 | /* misc chip info needed by some of the routines */ | |
5b435de0 | 455 | /* Private data for SDIO bus interaction */ |
e92eedf4 | 456 | struct brcmf_sdio { |
5b435de0 AS |
457 | struct brcmf_sdio_dev *sdiodev; /* sdio device handler */ |
458 | struct chip_info *ci; /* Chip info struct */ | |
459 | char *vars; /* Variables (from CIS and/or other) */ | |
460 | uint varsz; /* Size of variables buffer */ | |
461 | ||
462 | u32 ramsize; /* Size of RAM in SOCRAM (bytes) */ | |
463 | ||
464 | u32 hostintmask; /* Copy of Host Interrupt Mask */ | |
465 | u32 intstatus; /* Intstatus bits (events) pending */ | |
466 | bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */ | |
467 | bool fcstate; /* State of dongle flow-control */ | |
468 | ||
469 | uint blocksize; /* Block size of SDIO transfers */ | |
470 | uint roundup; /* Max roundup limit */ | |
471 | ||
472 | struct pktq txq; /* Queue length used for flow-control */ | |
473 | u8 flowcontrol; /* per prio flow control bitmask */ | |
474 | u8 tx_seq; /* Transmit sequence number (next) */ | |
475 | u8 tx_max; /* Maximum transmit sequence allowed */ | |
476 | ||
477 | u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN]; | |
478 | u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */ | |
479 | u16 nextlen; /* Next Read Len from last header */ | |
480 | u8 rx_seq; /* Receive sequence number (expected) */ | |
481 | bool rxskip; /* Skip receive (awaiting NAK ACK) */ | |
482 | ||
483 | uint rxbound; /* Rx frames to read before resched */ | |
484 | uint txbound; /* Tx frames to send before resched */ | |
485 | uint txminmax; | |
486 | ||
487 | struct sk_buff *glomd; /* Packet containing glomming descriptor */ | |
b83db862 | 488 | struct sk_buff_head glom; /* Packet list for glommed superframe */ |
5b435de0 AS |
489 | uint glomerr; /* Glom packet read errors */ |
490 | ||
491 | u8 *rxbuf; /* Buffer for receiving control packets */ | |
492 | uint rxblen; /* Allocated length of rxbuf */ | |
493 | u8 *rxctl; /* Aligned pointer into rxbuf */ | |
494 | u8 *databuf; /* Buffer for receiving big glom packet */ | |
495 | u8 *dataptr; /* Aligned pointer into databuf */ | |
496 | uint rxlen; /* Length of valid data in buffer */ | |
497 | ||
498 | u8 sdpcm_ver; /* Bus protocol reported by dongle */ | |
499 | ||
500 | bool intr; /* Use interrupts */ | |
501 | bool poll; /* Use polling */ | |
502 | bool ipend; /* Device interrupt is pending */ | |
503 | uint intrcount; /* Count of device interrupt callbacks */ | |
504 | uint lastintrs; /* Count as of last watchdog timer */ | |
505 | uint spurious; /* Count of spurious interrupts */ | |
506 | uint pollrate; /* Ticks between device polls */ | |
507 | uint polltick; /* Tick counter */ | |
508 | uint pollcnt; /* Count of active polls */ | |
509 | ||
8ae74654 | 510 | #ifdef DEBUG |
5b435de0 AS |
511 | uint console_interval; |
512 | struct brcmf_console console; /* Console output polling support */ | |
513 | uint console_addr; /* Console address from shared struct */ | |
8ae74654 | 514 | #endif /* DEBUG */ |
5b435de0 AS |
515 | |
516 | uint regfails; /* Count of R_REG failures */ | |
517 | ||
518 | uint clkstate; /* State of sd and backplane clock(s) */ | |
519 | bool activity; /* Activity flag for clock down */ | |
520 | s32 idletime; /* Control for activity timeout */ | |
521 | s32 idlecount; /* Activity timeout counter */ | |
522 | s32 idleclock; /* How to set bus driver when idle */ | |
523 | s32 sd_rxchain; | |
524 | bool use_rxchain; /* If brcmf should use PKT chains */ | |
525 | bool sleeping; /* Is SDIO bus sleeping? */ | |
526 | bool rxflow_mode; /* Rx flow control mode */ | |
527 | bool rxflow; /* Is rx flow control on */ | |
528 | bool alp_only; /* Don't use HT clock (ALP only) */ | |
529 | /* Field to decide if rx of control frames happen in rxbuf or lb-pool */ | |
530 | bool usebufpool; | |
531 | ||
532 | /* Some additional counters */ | |
533 | uint tx_sderrs; /* Count of tx attempts with sd errors */ | |
534 | uint fcqueued; /* Tx packets that got queued */ | |
535 | uint rxrtx; /* Count of rtx requests (NAK to dongle) */ | |
536 | uint rx_toolong; /* Receive frames too long to receive */ | |
537 | uint rxc_errors; /* SDIO errors when reading control frames */ | |
538 | uint rx_hdrfail; /* SDIO errors on header reads */ | |
539 | uint rx_badhdr; /* Bad received headers (roosync?) */ | |
540 | uint rx_badseq; /* Mismatched rx sequence number */ | |
541 | uint fc_rcvd; /* Number of flow-control events received */ | |
542 | uint fc_xoff; /* Number which turned on flow-control */ | |
543 | uint fc_xon; /* Number which turned off flow-control */ | |
544 | uint rxglomfail; /* Failed deglom attempts */ | |
545 | uint rxglomframes; /* Number of glom frames (superframes) */ | |
546 | uint rxglompkts; /* Number of packets from glom frames */ | |
547 | uint f2rxhdrs; /* Number of header reads */ | |
548 | uint f2rxdata; /* Number of frame data reads */ | |
549 | uint f2txdata; /* Number of f2 frame writes */ | |
550 | uint f1regdata; /* Number of f1 register accesses */ | |
28a1a3bd FL |
551 | uint tickcnt; /* Number of watchdog been schedule */ |
552 | unsigned long tx_ctlerrs; /* Err of sending ctrl frames */ | |
553 | unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */ | |
554 | unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */ | |
555 | unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */ | |
556 | unsigned long rx_readahead_cnt; /* Number of packets where header | |
557 | * read-ahead was used. */ | |
5b435de0 AS |
558 | |
559 | u8 *ctrl_frame_buf; | |
560 | u32 ctrl_frame_len; | |
561 | bool ctrl_frame_stat; | |
562 | ||
563 | spinlock_t txqlock; | |
564 | wait_queue_head_t ctrl_wait; | |
565 | wait_queue_head_t dcmd_resp_wait; | |
566 | ||
567 | struct timer_list timer; | |
568 | struct completion watchdog_wait; | |
569 | struct task_struct *watchdog_tsk; | |
570 | bool wd_timer_valid; | |
571 | uint save_ms; | |
572 | ||
573 | struct task_struct *dpc_tsk; | |
574 | struct completion dpc_wait; | |
575 | ||
576 | struct semaphore sdsem; | |
577 | ||
5b435de0 | 578 | const struct firmware *firmware; |
5b435de0 | 579 | u32 fw_ptr; |
c8bf3484 FL |
580 | |
581 | bool txoff; /* Transmit flow-controlled */ | |
5b435de0 AS |
582 | }; |
583 | ||
5b435de0 AS |
584 | /* clkstate */ |
585 | #define CLK_NONE 0 | |
586 | #define CLK_SDONLY 1 | |
587 | #define CLK_PENDING 2 /* Not used yet */ | |
588 | #define CLK_AVAIL 3 | |
589 | ||
8ae74654 | 590 | #ifdef DEBUG |
5b435de0 AS |
591 | static int qcount[NUMPRIO]; |
592 | static int tx_packets[NUMPRIO]; | |
8ae74654 | 593 | #endif /* DEBUG */ |
5b435de0 AS |
594 | |
595 | #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */ | |
596 | ||
597 | #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL) | |
598 | ||
599 | /* Retry count for register access failures */ | |
600 | static const uint retry_limit = 2; | |
601 | ||
602 | /* Limit on rounding up frames */ | |
603 | static const uint max_roundup = 512; | |
604 | ||
605 | #define ALIGNMENT 4 | |
606 | ||
607 | static void pkt_align(struct sk_buff *p, int len, int align) | |
608 | { | |
609 | uint datalign; | |
610 | datalign = (unsigned long)(p->data); | |
611 | datalign = roundup(datalign, (align)) - datalign; | |
612 | if (datalign) | |
613 | skb_pull(p, datalign); | |
614 | __skb_trim(p, len); | |
615 | } | |
616 | ||
617 | /* To check if there's window offered */ | |
e92eedf4 | 618 | static bool data_ok(struct brcmf_sdio *bus) |
5b435de0 AS |
619 | { |
620 | return (u8)(bus->tx_max - bus->tx_seq) != 0 && | |
621 | ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0; | |
622 | } | |
623 | ||
624 | /* | |
625 | * Reads a register in the SDIO hardware block. This block occupies a series of | |
626 | * adresses on the 32 bit backplane bus. | |
627 | */ | |
628 | static void | |
e92eedf4 | 629 | r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar) |
5b435de0 | 630 | { |
99ba15cd | 631 | u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); |
5b435de0 AS |
632 | *retryvar = 0; |
633 | do { | |
634 | *regvar = brcmf_sdcard_reg_read(bus->sdiodev, | |
99ba15cd FL |
635 | bus->ci->c_inf[idx].base + reg_offset, |
636 | sizeof(u32)); | |
5b435de0 AS |
637 | } while (brcmf_sdcard_regfail(bus->sdiodev) && |
638 | (++(*retryvar) <= retry_limit)); | |
639 | if (*retryvar) { | |
640 | bus->regfails += (*retryvar-1); | |
641 | if (*retryvar > retry_limit) { | |
642 | brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset); | |
643 | *regvar = 0; | |
644 | } | |
645 | } | |
646 | } | |
647 | ||
648 | static void | |
e92eedf4 | 649 | w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar) |
5b435de0 | 650 | { |
99ba15cd | 651 | u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); |
5b435de0 AS |
652 | *retryvar = 0; |
653 | do { | |
654 | brcmf_sdcard_reg_write(bus->sdiodev, | |
99ba15cd | 655 | bus->ci->c_inf[idx].base + reg_offset, |
5b435de0 AS |
656 | sizeof(u32), regval); |
657 | } while (brcmf_sdcard_regfail(bus->sdiodev) && | |
658 | (++(*retryvar) <= retry_limit)); | |
659 | if (*retryvar) { | |
660 | bus->regfails += (*retryvar-1); | |
661 | if (*retryvar > retry_limit) | |
662 | brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n", | |
663 | reg_offset); | |
664 | } | |
665 | } | |
666 | ||
667 | #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND) | |
668 | ||
669 | #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE) | |
670 | ||
671 | /* Packet free applicable unconditionally for sdio and sdspi. | |
672 | * Conditional if bufpool was present for gspi bus. | |
673 | */ | |
e92eedf4 | 674 | static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt) |
5b435de0 AS |
675 | { |
676 | if (bus->usebufpool) | |
677 | brcmu_pkt_buf_free_skb(pkt); | |
678 | } | |
679 | ||
680 | /* Turn backplane clock on or off */ | |
e92eedf4 | 681 | static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok) |
5b435de0 AS |
682 | { |
683 | int err; | |
684 | u8 clkctl, clkreq, devctl; | |
685 | unsigned long timeout; | |
686 | ||
687 | brcmf_dbg(TRACE, "Enter\n"); | |
688 | ||
689 | clkctl = 0; | |
690 | ||
691 | if (on) { | |
692 | /* Request HT Avail */ | |
693 | clkreq = | |
694 | bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ; | |
695 | ||
5b435de0 AS |
696 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, |
697 | SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err); | |
698 | if (err) { | |
699 | brcmf_dbg(ERROR, "HT Avail request error: %d\n", err); | |
700 | return -EBADE; | |
701 | } | |
702 | ||
5b435de0 AS |
703 | /* Check current status */ |
704 | clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
705 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
706 | if (err) { | |
707 | brcmf_dbg(ERROR, "HT Avail read error: %d\n", err); | |
708 | return -EBADE; | |
709 | } | |
710 | ||
711 | /* Go to pending and await interrupt if appropriate */ | |
712 | if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) { | |
713 | /* Allow only clock-available interrupt */ | |
714 | devctl = brcmf_sdcard_cfg_read(bus->sdiodev, | |
715 | SDIO_FUNC_1, | |
716 | SBSDIO_DEVICE_CTL, &err); | |
717 | if (err) { | |
718 | brcmf_dbg(ERROR, "Devctl error setting CA: %d\n", | |
719 | err); | |
720 | return -EBADE; | |
721 | } | |
722 | ||
723 | devctl |= SBSDIO_DEVCTL_CA_INT_ONLY; | |
724 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
725 | SBSDIO_DEVICE_CTL, devctl, &err); | |
726 | brcmf_dbg(INFO, "CLKCTL: set PENDING\n"); | |
727 | bus->clkstate = CLK_PENDING; | |
728 | ||
729 | return 0; | |
730 | } else if (bus->clkstate == CLK_PENDING) { | |
731 | /* Cancel CA-only interrupt filter */ | |
732 | devctl = | |
733 | brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
734 | SBSDIO_DEVICE_CTL, &err); | |
735 | devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; | |
736 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
737 | SBSDIO_DEVICE_CTL, devctl, &err); | |
738 | } | |
739 | ||
740 | /* Otherwise, wait here (polling) for HT Avail */ | |
741 | timeout = jiffies + | |
742 | msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000); | |
743 | while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { | |
744 | clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, | |
745 | SDIO_FUNC_1, | |
746 | SBSDIO_FUNC1_CHIPCLKCSR, | |
747 | &err); | |
748 | if (time_after(jiffies, timeout)) | |
749 | break; | |
750 | else | |
751 | usleep_range(5000, 10000); | |
752 | } | |
753 | if (err) { | |
754 | brcmf_dbg(ERROR, "HT Avail request error: %d\n", err); | |
755 | return -EBADE; | |
756 | } | |
757 | if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { | |
758 | brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n", | |
759 | PMU_MAX_TRANSITION_DLY, clkctl); | |
760 | return -EBADE; | |
761 | } | |
762 | ||
763 | /* Mark clock available */ | |
764 | bus->clkstate = CLK_AVAIL; | |
765 | brcmf_dbg(INFO, "CLKCTL: turned ON\n"); | |
766 | ||
8ae74654 | 767 | #if defined(DEBUG) |
5b435de0 AS |
768 | if (bus->alp_only != true) { |
769 | if (SBSDIO_ALPONLY(clkctl)) | |
770 | brcmf_dbg(ERROR, "HT Clock should be on\n"); | |
771 | } | |
8ae74654 | 772 | #endif /* defined (DEBUG) */ |
5b435de0 AS |
773 | |
774 | bus->activity = true; | |
775 | } else { | |
776 | clkreq = 0; | |
777 | ||
778 | if (bus->clkstate == CLK_PENDING) { | |
779 | /* Cancel CA-only interrupt filter */ | |
780 | devctl = brcmf_sdcard_cfg_read(bus->sdiodev, | |
781 | SDIO_FUNC_1, | |
782 | SBSDIO_DEVICE_CTL, &err); | |
783 | devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; | |
784 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
785 | SBSDIO_DEVICE_CTL, devctl, &err); | |
786 | } | |
787 | ||
788 | bus->clkstate = CLK_SDONLY; | |
789 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
790 | SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err); | |
791 | brcmf_dbg(INFO, "CLKCTL: turned OFF\n"); | |
792 | if (err) { | |
793 | brcmf_dbg(ERROR, "Failed access turning clock off: %d\n", | |
794 | err); | |
795 | return -EBADE; | |
796 | } | |
797 | } | |
798 | return 0; | |
799 | } | |
800 | ||
801 | /* Change idle/active SD state */ | |
e92eedf4 | 802 | static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on) |
5b435de0 AS |
803 | { |
804 | brcmf_dbg(TRACE, "Enter\n"); | |
805 | ||
806 | if (on) | |
807 | bus->clkstate = CLK_SDONLY; | |
808 | else | |
809 | bus->clkstate = CLK_NONE; | |
810 | ||
811 | return 0; | |
812 | } | |
813 | ||
814 | /* Transition SD and backplane clock readiness */ | |
e92eedf4 | 815 | static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok) |
5b435de0 | 816 | { |
8ae74654 | 817 | #ifdef DEBUG |
5b435de0 | 818 | uint oldstate = bus->clkstate; |
8ae74654 | 819 | #endif /* DEBUG */ |
5b435de0 AS |
820 | |
821 | brcmf_dbg(TRACE, "Enter\n"); | |
822 | ||
823 | /* Early exit if we're already there */ | |
824 | if (bus->clkstate == target) { | |
825 | if (target == CLK_AVAIL) { | |
826 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
827 | bus->activity = true; | |
828 | } | |
829 | return 0; | |
830 | } | |
831 | ||
832 | switch (target) { | |
833 | case CLK_AVAIL: | |
834 | /* Make sure SD clock is available */ | |
835 | if (bus->clkstate == CLK_NONE) | |
836 | brcmf_sdbrcm_sdclk(bus, true); | |
837 | /* Now request HT Avail on the backplane */ | |
838 | brcmf_sdbrcm_htclk(bus, true, pendok); | |
839 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
840 | bus->activity = true; | |
841 | break; | |
842 | ||
843 | case CLK_SDONLY: | |
844 | /* Remove HT request, or bring up SD clock */ | |
845 | if (bus->clkstate == CLK_NONE) | |
846 | brcmf_sdbrcm_sdclk(bus, true); | |
847 | else if (bus->clkstate == CLK_AVAIL) | |
848 | brcmf_sdbrcm_htclk(bus, false, false); | |
849 | else | |
850 | brcmf_dbg(ERROR, "request for %d -> %d\n", | |
851 | bus->clkstate, target); | |
852 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
853 | break; | |
854 | ||
855 | case CLK_NONE: | |
856 | /* Make sure to remove HT request */ | |
857 | if (bus->clkstate == CLK_AVAIL) | |
858 | brcmf_sdbrcm_htclk(bus, false, false); | |
859 | /* Now remove the SD clock */ | |
860 | brcmf_sdbrcm_sdclk(bus, false); | |
861 | brcmf_sdbrcm_wd_timer(bus, 0); | |
862 | break; | |
863 | } | |
8ae74654 | 864 | #ifdef DEBUG |
5b435de0 | 865 | brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate); |
8ae74654 | 866 | #endif /* DEBUG */ |
5b435de0 AS |
867 | |
868 | return 0; | |
869 | } | |
870 | ||
e92eedf4 | 871 | static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep) |
5b435de0 AS |
872 | { |
873 | uint retries = 0; | |
874 | ||
875 | brcmf_dbg(INFO, "request %s (currently %s)\n", | |
876 | sleep ? "SLEEP" : "WAKE", | |
877 | bus->sleeping ? "SLEEP" : "WAKE"); | |
878 | ||
879 | /* Done if we're already in the requested state */ | |
880 | if (sleep == bus->sleeping) | |
881 | return 0; | |
882 | ||
883 | /* Going to sleep: set the alarm and turn off the lights... */ | |
884 | if (sleep) { | |
885 | /* Don't sleep if something is pending */ | |
886 | if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq)) | |
887 | return -EBUSY; | |
888 | ||
889 | /* Make sure the controller has the bus up */ | |
890 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
891 | ||
892 | /* Tell device to start using OOB wakeup */ | |
893 | w_sdreg32(bus, SMB_USE_OOB, | |
894 | offsetof(struct sdpcmd_regs, tosbmailbox), &retries); | |
895 | if (retries > retry_limit) | |
896 | brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"); | |
897 | ||
898 | /* Turn off our contribution to the HT clock request */ | |
899 | brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); | |
900 | ||
901 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
902 | SBSDIO_FUNC1_CHIPCLKCSR, | |
903 | SBSDIO_FORCE_HW_CLKREQ_OFF, NULL); | |
904 | ||
905 | /* Isolate the bus */ | |
718897eb FL |
906 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, |
907 | SBSDIO_DEVICE_CTL, | |
908 | SBSDIO_DEVCTL_PADS_ISO, NULL); | |
5b435de0 AS |
909 | |
910 | /* Change state */ | |
911 | bus->sleeping = true; | |
912 | ||
913 | } else { | |
914 | /* Waking up: bus power up is ok, set local state */ | |
915 | ||
916 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
917 | SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); | |
918 | ||
5b435de0 AS |
919 | /* Make sure the controller has the bus up */ |
920 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
921 | ||
922 | /* Send misc interrupt to indicate OOB not needed */ | |
923 | w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata), | |
924 | &retries); | |
925 | if (retries <= retry_limit) | |
926 | w_sdreg32(bus, SMB_DEV_INT, | |
927 | offsetof(struct sdpcmd_regs, tosbmailbox), | |
928 | &retries); | |
929 | ||
930 | if (retries > retry_limit) | |
931 | brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"); | |
932 | ||
933 | /* Make sure we have SD bus access */ | |
934 | brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); | |
935 | ||
936 | /* Change state */ | |
937 | bus->sleeping = false; | |
938 | } | |
939 | ||
940 | return 0; | |
941 | } | |
942 | ||
e92eedf4 | 943 | static void bus_wake(struct brcmf_sdio *bus) |
5b435de0 AS |
944 | { |
945 | if (bus->sleeping) | |
946 | brcmf_sdbrcm_bussleep(bus, false); | |
947 | } | |
948 | ||
e92eedf4 | 949 | static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus) |
5b435de0 AS |
950 | { |
951 | u32 intstatus = 0; | |
952 | u32 hmb_data; | |
953 | u8 fcbits; | |
954 | uint retries = 0; | |
955 | ||
956 | brcmf_dbg(TRACE, "Enter\n"); | |
957 | ||
958 | /* Read mailbox data and ack that we did so */ | |
959 | r_sdreg32(bus, &hmb_data, | |
960 | offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries); | |
961 | ||
962 | if (retries <= retry_limit) | |
963 | w_sdreg32(bus, SMB_INT_ACK, | |
964 | offsetof(struct sdpcmd_regs, tosbmailbox), &retries); | |
965 | bus->f1regdata += 2; | |
966 | ||
967 | /* Dongle recomposed rx frames, accept them again */ | |
968 | if (hmb_data & HMB_DATA_NAKHANDLED) { | |
969 | brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n", | |
970 | bus->rx_seq); | |
971 | if (!bus->rxskip) | |
972 | brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n"); | |
973 | ||
974 | bus->rxskip = false; | |
975 | intstatus |= I_HMB_FRAME_IND; | |
976 | } | |
977 | ||
978 | /* | |
979 | * DEVREADY does not occur with gSPI. | |
980 | */ | |
981 | if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) { | |
982 | bus->sdpcm_ver = | |
983 | (hmb_data & HMB_DATA_VERSION_MASK) >> | |
984 | HMB_DATA_VERSION_SHIFT; | |
985 | if (bus->sdpcm_ver != SDPCM_PROT_VERSION) | |
986 | brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, " | |
987 | "expecting %d\n", | |
988 | bus->sdpcm_ver, SDPCM_PROT_VERSION); | |
989 | else | |
990 | brcmf_dbg(INFO, "Dongle ready, protocol version %d\n", | |
991 | bus->sdpcm_ver); | |
992 | } | |
993 | ||
994 | /* | |
995 | * Flow Control has been moved into the RX headers and this out of band | |
996 | * method isn't used any more. | |
997 | * remaining backward compatible with older dongles. | |
998 | */ | |
999 | if (hmb_data & HMB_DATA_FC) { | |
1000 | fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >> | |
1001 | HMB_DATA_FCDATA_SHIFT; | |
1002 | ||
1003 | if (fcbits & ~bus->flowcontrol) | |
1004 | bus->fc_xoff++; | |
1005 | ||
1006 | if (bus->flowcontrol & ~fcbits) | |
1007 | bus->fc_xon++; | |
1008 | ||
1009 | bus->fc_rcvd++; | |
1010 | bus->flowcontrol = fcbits; | |
1011 | } | |
1012 | ||
1013 | /* Shouldn't be any others */ | |
1014 | if (hmb_data & ~(HMB_DATA_DEVREADY | | |
1015 | HMB_DATA_NAKHANDLED | | |
1016 | HMB_DATA_FC | | |
1017 | HMB_DATA_FWREADY | | |
1018 | HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK)) | |
1019 | brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n", | |
1020 | hmb_data); | |
1021 | ||
1022 | return intstatus; | |
1023 | } | |
1024 | ||
e92eedf4 | 1025 | static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx) |
5b435de0 AS |
1026 | { |
1027 | uint retries = 0; | |
1028 | u16 lastrbc; | |
1029 | u8 hi, lo; | |
1030 | int err; | |
1031 | ||
1032 | brcmf_dbg(ERROR, "%sterminate frame%s\n", | |
1033 | abort ? "abort command, " : "", | |
1034 | rtx ? ", send NAK" : ""); | |
1035 | ||
1036 | if (abort) | |
1037 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
1038 | ||
1039 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
1040 | SBSDIO_FUNC1_FRAMECTRL, | |
1041 | SFC_RF_TERM, &err); | |
1042 | bus->f1regdata++; | |
1043 | ||
1044 | /* Wait until the packet has been flushed (device/FIFO stable) */ | |
1045 | for (lastrbc = retries = 0xffff; retries > 0; retries--) { | |
1046 | hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
1047 | SBSDIO_FUNC1_RFRAMEBCHI, NULL); | |
1048 | lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
1049 | SBSDIO_FUNC1_RFRAMEBCLO, NULL); | |
1050 | bus->f1regdata += 2; | |
1051 | ||
1052 | if ((hi == 0) && (lo == 0)) | |
1053 | break; | |
1054 | ||
1055 | if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) { | |
1056 | brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n", | |
1057 | lastrbc, (hi << 8) + lo); | |
1058 | } | |
1059 | lastrbc = (hi << 8) + lo; | |
1060 | } | |
1061 | ||
1062 | if (!retries) | |
1063 | brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc); | |
1064 | else | |
1065 | brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries); | |
1066 | ||
1067 | if (rtx) { | |
1068 | bus->rxrtx++; | |
1069 | w_sdreg32(bus, SMB_NAK, | |
1070 | offsetof(struct sdpcmd_regs, tosbmailbox), &retries); | |
1071 | ||
1072 | bus->f1regdata++; | |
1073 | if (retries <= retry_limit) | |
1074 | bus->rxskip = true; | |
1075 | } | |
1076 | ||
1077 | /* Clear partial in any case */ | |
1078 | bus->nextlen = 0; | |
1079 | ||
1080 | /* If we can't reach the device, signal failure */ | |
1081 | if (err || brcmf_sdcard_regfail(bus->sdiodev)) | |
712ac5b3 | 1082 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
1083 | } |
1084 | ||
20e5ca16 | 1085 | /* copy a buffer into a pkt buffer chain */ |
e92eedf4 | 1086 | static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len) |
20e5ca16 AS |
1087 | { |
1088 | uint n, ret = 0; | |
1089 | struct sk_buff *p; | |
1090 | u8 *buf; | |
1091 | ||
20e5ca16 AS |
1092 | buf = bus->dataptr; |
1093 | ||
1094 | /* copy the data */ | |
b83db862 | 1095 | skb_queue_walk(&bus->glom, p) { |
20e5ca16 AS |
1096 | n = min_t(uint, p->len, len); |
1097 | memcpy(p->data, buf, n); | |
1098 | buf += n; | |
1099 | len -= n; | |
1100 | ret += n; | |
b83db862 AS |
1101 | if (!len) |
1102 | break; | |
20e5ca16 AS |
1103 | } |
1104 | ||
1105 | return ret; | |
1106 | } | |
1107 | ||
9a95e60e | 1108 | /* return total length of buffer chain */ |
e92eedf4 | 1109 | static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus) |
9a95e60e AS |
1110 | { |
1111 | struct sk_buff *p; | |
1112 | uint total; | |
1113 | ||
1114 | total = 0; | |
1115 | skb_queue_walk(&bus->glom, p) | |
1116 | total += p->len; | |
1117 | return total; | |
1118 | } | |
1119 | ||
e92eedf4 | 1120 | static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus) |
046808da AS |
1121 | { |
1122 | struct sk_buff *cur, *next; | |
1123 | ||
1124 | skb_queue_walk_safe(&bus->glom, cur, next) { | |
1125 | skb_unlink(cur, &bus->glom); | |
1126 | brcmu_pkt_buf_free_skb(cur); | |
1127 | } | |
1128 | } | |
1129 | ||
e92eedf4 | 1130 | static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq) |
5b435de0 AS |
1131 | { |
1132 | u16 dlen, totlen; | |
1133 | u8 *dptr, num = 0; | |
1134 | ||
1135 | u16 sublen, check; | |
0b45bf74 | 1136 | struct sk_buff *pfirst, *pnext; |
5b435de0 AS |
1137 | |
1138 | int errcode; | |
1139 | u8 chan, seq, doff, sfdoff; | |
1140 | u8 txmax; | |
1141 | ||
1142 | int ifidx = 0; | |
1143 | bool usechain = bus->use_rxchain; | |
1144 | ||
1145 | /* If packets, issue read(s) and send up packet chain */ | |
1146 | /* Return sequence numbers consumed? */ | |
1147 | ||
b83db862 AS |
1148 | brcmf_dbg(TRACE, "start: glomd %p glom %p\n", |
1149 | bus->glomd, skb_peek(&bus->glom)); | |
5b435de0 AS |
1150 | |
1151 | /* If there's a descriptor, generate the packet chain */ | |
1152 | if (bus->glomd) { | |
0b45bf74 | 1153 | pfirst = pnext = NULL; |
5b435de0 AS |
1154 | dlen = (u16) (bus->glomd->len); |
1155 | dptr = bus->glomd->data; | |
1156 | if (!dlen || (dlen & 1)) { | |
1157 | brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n", | |
1158 | dlen); | |
1159 | dlen = 0; | |
1160 | } | |
1161 | ||
1162 | for (totlen = num = 0; dlen; num++) { | |
1163 | /* Get (and move past) next length */ | |
1164 | sublen = get_unaligned_le16(dptr); | |
1165 | dlen -= sizeof(u16); | |
1166 | dptr += sizeof(u16); | |
1167 | if ((sublen < SDPCM_HDRLEN) || | |
1168 | ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) { | |
1169 | brcmf_dbg(ERROR, "descriptor len %d bad: %d\n", | |
1170 | num, sublen); | |
1171 | pnext = NULL; | |
1172 | break; | |
1173 | } | |
1174 | if (sublen % BRCMF_SDALIGN) { | |
1175 | brcmf_dbg(ERROR, "sublen %d not multiple of %d\n", | |
1176 | sublen, BRCMF_SDALIGN); | |
1177 | usechain = false; | |
1178 | } | |
1179 | totlen += sublen; | |
1180 | ||
1181 | /* For last frame, adjust read len so total | |
1182 | is a block multiple */ | |
1183 | if (!dlen) { | |
1184 | sublen += | |
1185 | (roundup(totlen, bus->blocksize) - totlen); | |
1186 | totlen = roundup(totlen, bus->blocksize); | |
1187 | } | |
1188 | ||
1189 | /* Allocate/chain packet for next subframe */ | |
1190 | pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN); | |
1191 | if (pnext == NULL) { | |
1192 | brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n", | |
1193 | num, sublen); | |
1194 | break; | |
1195 | } | |
b83db862 | 1196 | skb_queue_tail(&bus->glom, pnext); |
5b435de0 AS |
1197 | |
1198 | /* Adhere to start alignment requirements */ | |
1199 | pkt_align(pnext, sublen, BRCMF_SDALIGN); | |
1200 | } | |
1201 | ||
1202 | /* If all allocations succeeded, save packet chain | |
1203 | in bus structure */ | |
1204 | if (pnext) { | |
1205 | brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n", | |
1206 | totlen, num); | |
1207 | if (BRCMF_GLOM_ON() && bus->nextlen && | |
1208 | totlen != bus->nextlen) { | |
1209 | brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n", | |
1210 | bus->nextlen, totlen, rxseq); | |
1211 | } | |
5b435de0 AS |
1212 | pfirst = pnext = NULL; |
1213 | } else { | |
046808da | 1214 | brcmf_sdbrcm_free_glom(bus); |
5b435de0 AS |
1215 | num = 0; |
1216 | } | |
1217 | ||
1218 | /* Done with descriptor packet */ | |
1219 | brcmu_pkt_buf_free_skb(bus->glomd); | |
1220 | bus->glomd = NULL; | |
1221 | bus->nextlen = 0; | |
1222 | } | |
1223 | ||
1224 | /* Ok -- either we just generated a packet chain, | |
1225 | or had one from before */ | |
b83db862 | 1226 | if (!skb_queue_empty(&bus->glom)) { |
5b435de0 AS |
1227 | if (BRCMF_GLOM_ON()) { |
1228 | brcmf_dbg(GLOM, "try superframe read, packet chain:\n"); | |
b83db862 | 1229 | skb_queue_walk(&bus->glom, pnext) { |
5b435de0 AS |
1230 | brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n", |
1231 | pnext, (u8 *) (pnext->data), | |
1232 | pnext->len, pnext->len); | |
1233 | } | |
1234 | } | |
1235 | ||
b83db862 | 1236 | pfirst = skb_peek(&bus->glom); |
9a95e60e | 1237 | dlen = (u16) brcmf_sdbrcm_glom_len(bus); |
5b435de0 AS |
1238 | |
1239 | /* Do an SDIO read for the superframe. Configurable iovar to | |
1240 | * read directly into the chained packet, or allocate a large | |
1241 | * packet and and copy into the chain. | |
1242 | */ | |
1243 | if (usechain) { | |
5adfeb63 | 1244 | errcode = brcmf_sdcard_recv_chain(bus->sdiodev, |
5b435de0 | 1245 | bus->sdiodev->sbwad, |
5adfeb63 | 1246 | SDIO_FUNC_2, F2SYNC, &bus->glom); |
5b435de0 AS |
1247 | } else if (bus->dataptr) { |
1248 | errcode = brcmf_sdcard_recv_buf(bus->sdiodev, | |
1249 | bus->sdiodev->sbwad, | |
5adfeb63 AS |
1250 | SDIO_FUNC_2, F2SYNC, |
1251 | bus->dataptr, dlen); | |
20e5ca16 | 1252 | sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen); |
5b435de0 AS |
1253 | if (sublen != dlen) { |
1254 | brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n", | |
1255 | dlen, sublen); | |
1256 | errcode = -1; | |
1257 | } | |
1258 | pnext = NULL; | |
1259 | } else { | |
1260 | brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n", | |
1261 | dlen); | |
1262 | errcode = -1; | |
1263 | } | |
1264 | bus->f2rxdata++; | |
1265 | ||
1266 | /* On failure, kill the superframe, allow a couple retries */ | |
1267 | if (errcode < 0) { | |
1268 | brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n", | |
1269 | dlen, errcode); | |
719f2733 | 1270 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1271 | |
1272 | if (bus->glomerr++ < 3) { | |
1273 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1274 | } else { | |
1275 | bus->glomerr = 0; | |
1276 | brcmf_sdbrcm_rxfail(bus, true, false); | |
5b435de0 | 1277 | bus->rxglomfail++; |
046808da | 1278 | brcmf_sdbrcm_free_glom(bus); |
5b435de0 AS |
1279 | } |
1280 | return 0; | |
1281 | } | |
1e023829 JP |
1282 | |
1283 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), | |
1284 | pfirst->data, min_t(int, pfirst->len, 48), | |
1285 | "SUPERFRAME:\n"); | |
5b435de0 AS |
1286 | |
1287 | /* Validate the superframe header */ | |
1288 | dptr = (u8 *) (pfirst->data); | |
1289 | sublen = get_unaligned_le16(dptr); | |
1290 | check = get_unaligned_le16(dptr + sizeof(u16)); | |
1291 | ||
1292 | chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); | |
1293 | seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1294 | bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; | |
1295 | if ((bus->nextlen << 4) > MAX_RX_DATASZ) { | |
1296 | brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n", | |
1297 | bus->nextlen, seq); | |
1298 | bus->nextlen = 0; | |
1299 | } | |
1300 | doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1301 | txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1302 | ||
1303 | errcode = 0; | |
1304 | if ((u16)~(sublen ^ check)) { | |
1305 | brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n", | |
1306 | sublen, check); | |
1307 | errcode = -1; | |
1308 | } else if (roundup(sublen, bus->blocksize) != dlen) { | |
1309 | brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n", | |
1310 | sublen, roundup(sublen, bus->blocksize), | |
1311 | dlen); | |
1312 | errcode = -1; | |
1313 | } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) != | |
1314 | SDPCM_GLOM_CHANNEL) { | |
1315 | brcmf_dbg(ERROR, "(superframe): bad channel %d\n", | |
1316 | SDPCM_PACKET_CHANNEL( | |
1317 | &dptr[SDPCM_FRAMETAG_LEN])); | |
1318 | errcode = -1; | |
1319 | } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) { | |
1320 | brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n"); | |
1321 | errcode = -1; | |
1322 | } else if ((doff < SDPCM_HDRLEN) || | |
1323 | (doff > (pfirst->len - SDPCM_HDRLEN))) { | |
1324 | brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n", | |
1325 | doff, sublen, pfirst->len, SDPCM_HDRLEN); | |
1326 | errcode = -1; | |
1327 | } | |
1328 | ||
1329 | /* Check sequence number of superframe SW header */ | |
1330 | if (rxseq != seq) { | |
1331 | brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n", | |
1332 | seq, rxseq); | |
1333 | bus->rx_badseq++; | |
1334 | rxseq = seq; | |
1335 | } | |
1336 | ||
1337 | /* Check window for sanity */ | |
1338 | if ((u8) (txmax - bus->tx_seq) > 0x40) { | |
1339 | brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n", | |
1340 | txmax, bus->tx_seq); | |
1341 | txmax = bus->tx_seq + 2; | |
1342 | } | |
1343 | bus->tx_max = txmax; | |
1344 | ||
1345 | /* Remove superframe header, remember offset */ | |
1346 | skb_pull(pfirst, doff); | |
1347 | sfdoff = doff; | |
0b45bf74 | 1348 | num = 0; |
5b435de0 AS |
1349 | |
1350 | /* Validate all the subframe headers */ | |
0b45bf74 AS |
1351 | skb_queue_walk(&bus->glom, pnext) { |
1352 | /* leave when invalid subframe is found */ | |
1353 | if (errcode) | |
1354 | break; | |
1355 | ||
5b435de0 AS |
1356 | dptr = (u8 *) (pnext->data); |
1357 | dlen = (u16) (pnext->len); | |
1358 | sublen = get_unaligned_le16(dptr); | |
1359 | check = get_unaligned_le16(dptr + sizeof(u16)); | |
1360 | chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); | |
1361 | doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1e023829 JP |
1362 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), |
1363 | dptr, 32, "subframe:\n"); | |
5b435de0 AS |
1364 | |
1365 | if ((u16)~(sublen ^ check)) { | |
1366 | brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n", | |
1367 | num, sublen, check); | |
1368 | errcode = -1; | |
1369 | } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) { | |
1370 | brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n", | |
1371 | num, sublen, dlen); | |
1372 | errcode = -1; | |
1373 | } else if ((chan != SDPCM_DATA_CHANNEL) && | |
1374 | (chan != SDPCM_EVENT_CHANNEL)) { | |
1375 | brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n", | |
1376 | num, chan); | |
1377 | errcode = -1; | |
1378 | } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) { | |
1379 | brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n", | |
1380 | num, doff, sublen, SDPCM_HDRLEN); | |
1381 | errcode = -1; | |
1382 | } | |
0b45bf74 AS |
1383 | /* increase the subframe count */ |
1384 | num++; | |
5b435de0 AS |
1385 | } |
1386 | ||
1387 | if (errcode) { | |
1388 | /* Terminate frame on error, request | |
1389 | a couple retries */ | |
1390 | if (bus->glomerr++ < 3) { | |
1391 | /* Restore superframe header space */ | |
1392 | skb_push(pfirst, sfdoff); | |
1393 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1394 | } else { | |
1395 | bus->glomerr = 0; | |
1396 | brcmf_sdbrcm_rxfail(bus, true, false); | |
5b435de0 | 1397 | bus->rxglomfail++; |
046808da | 1398 | brcmf_sdbrcm_free_glom(bus); |
5b435de0 AS |
1399 | } |
1400 | bus->nextlen = 0; | |
1401 | return 0; | |
1402 | } | |
1403 | ||
1404 | /* Basic SD framing looks ok - process each packet (header) */ | |
5b435de0 | 1405 | |
0b45bf74 | 1406 | skb_queue_walk_safe(&bus->glom, pfirst, pnext) { |
5b435de0 AS |
1407 | dptr = (u8 *) (pfirst->data); |
1408 | sublen = get_unaligned_le16(dptr); | |
1409 | chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); | |
1410 | seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1411 | doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1412 | ||
1413 | brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n", | |
1414 | num, pfirst, pfirst->data, | |
1415 | pfirst->len, sublen, chan, seq); | |
1416 | ||
1417 | /* precondition: chan == SDPCM_DATA_CHANNEL || | |
1418 | chan == SDPCM_EVENT_CHANNEL */ | |
1419 | ||
1420 | if (rxseq != seq) { | |
1421 | brcmf_dbg(GLOM, "rx_seq %d, expected %d\n", | |
1422 | seq, rxseq); | |
1423 | bus->rx_badseq++; | |
1424 | rxseq = seq; | |
1425 | } | |
0b45bf74 AS |
1426 | rxseq++; |
1427 | ||
1e023829 JP |
1428 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(), |
1429 | dptr, dlen, "Rx Subframe Data:\n"); | |
5b435de0 AS |
1430 | |
1431 | __skb_trim(pfirst, sublen); | |
1432 | skb_pull(pfirst, doff); | |
1433 | ||
1434 | if (pfirst->len == 0) { | |
0b45bf74 | 1435 | skb_unlink(pfirst, &bus->glom); |
5b435de0 | 1436 | brcmu_pkt_buf_free_skb(pfirst); |
5b435de0 | 1437 | continue; |
d5625ee6 FL |
1438 | } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, |
1439 | &ifidx, pfirst) != 0) { | |
5b435de0 | 1440 | brcmf_dbg(ERROR, "rx protocol error\n"); |
719f2733 | 1441 | bus->sdiodev->bus_if->dstats.rx_errors++; |
0b45bf74 | 1442 | skb_unlink(pfirst, &bus->glom); |
5b435de0 | 1443 | brcmu_pkt_buf_free_skb(pfirst); |
5b435de0 AS |
1444 | continue; |
1445 | } | |
1446 | ||
1e023829 JP |
1447 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), |
1448 | pfirst->data, | |
1449 | min_t(int, pfirst->len, 32), | |
1450 | "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n", | |
1451 | bus->glom.qlen, pfirst, pfirst->data, | |
1452 | pfirst->len, pfirst->next, | |
1453 | pfirst->prev); | |
5b435de0 | 1454 | } |
0b45bf74 AS |
1455 | /* sent any remaining packets up */ |
1456 | if (bus->glom.qlen) { | |
5b435de0 | 1457 | up(&bus->sdsem); |
228bb43d | 1458 | brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom); |
5b435de0 AS |
1459 | down(&bus->sdsem); |
1460 | } | |
1461 | ||
1462 | bus->rxglomframes++; | |
0b45bf74 | 1463 | bus->rxglompkts += bus->glom.qlen; |
5b435de0 AS |
1464 | } |
1465 | return num; | |
1466 | } | |
1467 | ||
e92eedf4 | 1468 | static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition, |
5b435de0 AS |
1469 | bool *pending) |
1470 | { | |
1471 | DECLARE_WAITQUEUE(wait, current); | |
1472 | int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT); | |
1473 | ||
1474 | /* Wait until control frame is available */ | |
1475 | add_wait_queue(&bus->dcmd_resp_wait, &wait); | |
1476 | set_current_state(TASK_INTERRUPTIBLE); | |
1477 | ||
1478 | while (!(*condition) && (!signal_pending(current) && timeout)) | |
1479 | timeout = schedule_timeout(timeout); | |
1480 | ||
1481 | if (signal_pending(current)) | |
1482 | *pending = true; | |
1483 | ||
1484 | set_current_state(TASK_RUNNING); | |
1485 | remove_wait_queue(&bus->dcmd_resp_wait, &wait); | |
1486 | ||
1487 | return timeout; | |
1488 | } | |
1489 | ||
e92eedf4 | 1490 | static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus) |
5b435de0 AS |
1491 | { |
1492 | if (waitqueue_active(&bus->dcmd_resp_wait)) | |
1493 | wake_up_interruptible(&bus->dcmd_resp_wait); | |
1494 | ||
1495 | return 0; | |
1496 | } | |
1497 | static void | |
e92eedf4 | 1498 | brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff) |
5b435de0 AS |
1499 | { |
1500 | uint rdlen, pad; | |
1501 | ||
1502 | int sdret; | |
1503 | ||
1504 | brcmf_dbg(TRACE, "Enter\n"); | |
1505 | ||
1506 | /* Set rxctl for frame (w/optional alignment) */ | |
1507 | bus->rxctl = bus->rxbuf; | |
1508 | bus->rxctl += BRCMF_FIRSTREAD; | |
1509 | pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN); | |
1510 | if (pad) | |
1511 | bus->rxctl += (BRCMF_SDALIGN - pad); | |
1512 | bus->rxctl -= BRCMF_FIRSTREAD; | |
1513 | ||
1514 | /* Copy the already-read portion over */ | |
1515 | memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD); | |
1516 | if (len <= BRCMF_FIRSTREAD) | |
1517 | goto gotpkt; | |
1518 | ||
1519 | /* Raise rdlen to next SDIO block to avoid tail command */ | |
1520 | rdlen = len - BRCMF_FIRSTREAD; | |
1521 | if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) { | |
1522 | pad = bus->blocksize - (rdlen % bus->blocksize); | |
1523 | if ((pad <= bus->roundup) && (pad < bus->blocksize) && | |
b01a6b3c | 1524 | ((len + pad) < bus->sdiodev->bus_if->maxctl)) |
5b435de0 AS |
1525 | rdlen += pad; |
1526 | } else if (rdlen % BRCMF_SDALIGN) { | |
1527 | rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); | |
1528 | } | |
1529 | ||
1530 | /* Satisfy length-alignment requirements */ | |
1531 | if (rdlen & (ALIGNMENT - 1)) | |
1532 | rdlen = roundup(rdlen, ALIGNMENT); | |
1533 | ||
1534 | /* Drop if the read is too big or it exceeds our maximum */ | |
b01a6b3c | 1535 | if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) { |
5b435de0 | 1536 | brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n", |
b01a6b3c | 1537 | rdlen, bus->sdiodev->bus_if->maxctl); |
719f2733 | 1538 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1539 | brcmf_sdbrcm_rxfail(bus, false, false); |
1540 | goto done; | |
1541 | } | |
1542 | ||
b01a6b3c | 1543 | if ((len - doff) > bus->sdiodev->bus_if->maxctl) { |
5b435de0 | 1544 | brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n", |
b01a6b3c | 1545 | len, len - doff, bus->sdiodev->bus_if->maxctl); |
719f2733 | 1546 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1547 | bus->rx_toolong++; |
1548 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1549 | goto done; | |
1550 | } | |
1551 | ||
1552 | /* Read remainder of frame body into the rxctl buffer */ | |
1553 | sdret = brcmf_sdcard_recv_buf(bus->sdiodev, | |
1554 | bus->sdiodev->sbwad, | |
1555 | SDIO_FUNC_2, | |
5adfeb63 | 1556 | F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen); |
5b435de0 AS |
1557 | bus->f2rxdata++; |
1558 | ||
1559 | /* Control frame failures need retransmission */ | |
1560 | if (sdret < 0) { | |
1561 | brcmf_dbg(ERROR, "read %d control bytes failed: %d\n", | |
1562 | rdlen, sdret); | |
1563 | bus->rxc_errors++; | |
1564 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1565 | goto done; | |
1566 | } | |
1567 | ||
1568 | gotpkt: | |
1569 | ||
1e023829 JP |
1570 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(), |
1571 | bus->rxctl, len, "RxCtrl:\n"); | |
5b435de0 AS |
1572 | |
1573 | /* Point to valid data and indicate its length */ | |
1574 | bus->rxctl += doff; | |
1575 | bus->rxlen = len - doff; | |
1576 | ||
1577 | done: | |
1578 | /* Awake any waiters */ | |
1579 | brcmf_sdbrcm_dcmd_resp_wake(bus); | |
1580 | } | |
1581 | ||
1582 | /* Pad read to blocksize for efficiency */ | |
e92eedf4 | 1583 | static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen) |
5b435de0 AS |
1584 | { |
1585 | if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) { | |
1586 | *pad = bus->blocksize - (*rdlen % bus->blocksize); | |
1587 | if (*pad <= bus->roundup && *pad < bus->blocksize && | |
1588 | *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ) | |
1589 | *rdlen += *pad; | |
1590 | } else if (*rdlen % BRCMF_SDALIGN) { | |
1591 | *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN); | |
1592 | } | |
1593 | } | |
1594 | ||
1595 | static void | |
e92eedf4 | 1596 | brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen, |
5b435de0 AS |
1597 | struct sk_buff **pkt, u8 **rxbuf) |
1598 | { | |
1599 | int sdret; /* Return code from calls */ | |
1600 | ||
1601 | *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN); | |
1602 | if (*pkt == NULL) | |
1603 | return; | |
1604 | ||
1605 | pkt_align(*pkt, rdlen, BRCMF_SDALIGN); | |
1606 | *rxbuf = (u8 *) ((*pkt)->data); | |
1607 | /* Read the entire frame */ | |
5adfeb63 AS |
1608 | sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad, |
1609 | SDIO_FUNC_2, F2SYNC, *pkt); | |
5b435de0 AS |
1610 | bus->f2rxdata++; |
1611 | ||
1612 | if (sdret < 0) { | |
1613 | brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n", | |
1614 | rdlen, sdret); | |
1615 | brcmu_pkt_buf_free_skb(*pkt); | |
719f2733 | 1616 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1617 | /* Force retry w/normal header read. |
1618 | * Don't attempt NAK for | |
1619 | * gSPI | |
1620 | */ | |
1621 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1622 | *pkt = NULL; | |
1623 | } | |
1624 | } | |
1625 | ||
1626 | /* Checks the header */ | |
1627 | static int | |
e92eedf4 | 1628 | brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf, |
5b435de0 AS |
1629 | u8 rxseq, u16 nextlen, u16 *len) |
1630 | { | |
1631 | u16 check; | |
1632 | bool len_consistent; /* Result of comparing readahead len and | |
1633 | len from hw-hdr */ | |
1634 | ||
1635 | memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN); | |
1636 | ||
1637 | /* Extract hardware header fields */ | |
1638 | *len = get_unaligned_le16(bus->rxhdr); | |
1639 | check = get_unaligned_le16(bus->rxhdr + sizeof(u16)); | |
1640 | ||
1641 | /* All zeros means readahead info was bad */ | |
1642 | if (!(*len | check)) { | |
1643 | brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n"); | |
1644 | goto fail; | |
1645 | } | |
1646 | ||
1647 | /* Validate check bytes */ | |
1648 | if ((u16)~(*len ^ check)) { | |
1649 | brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n", | |
1650 | nextlen, *len, check); | |
1651 | bus->rx_badhdr++; | |
1652 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1653 | goto fail; | |
1654 | } | |
1655 | ||
1656 | /* Validate frame length */ | |
1657 | if (*len < SDPCM_HDRLEN) { | |
1658 | brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n", | |
1659 | *len); | |
1660 | goto fail; | |
1661 | } | |
1662 | ||
1663 | /* Check for consistency with readahead info */ | |
1664 | len_consistent = (nextlen != (roundup(*len, 16) >> 4)); | |
1665 | if (len_consistent) { | |
1666 | /* Mismatch, force retry w/normal | |
1667 | header (may be >4K) */ | |
1668 | brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n", | |
1669 | nextlen, *len, roundup(*len, 16), | |
1670 | rxseq); | |
1671 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1672 | goto fail; | |
1673 | } | |
1674 | ||
1675 | return 0; | |
1676 | ||
1677 | fail: | |
1678 | brcmf_sdbrcm_pktfree2(bus, pkt); | |
1679 | return -EINVAL; | |
1680 | } | |
1681 | ||
1682 | /* Return true if there may be more frames to read */ | |
1683 | static uint | |
e92eedf4 | 1684 | brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished) |
5b435de0 AS |
1685 | { |
1686 | u16 len, check; /* Extracted hardware header fields */ | |
1687 | u8 chan, seq, doff; /* Extracted software header fields */ | |
1688 | u8 fcbits; /* Extracted fcbits from software header */ | |
1689 | ||
1690 | struct sk_buff *pkt; /* Packet for event or data frames */ | |
1691 | u16 pad; /* Number of pad bytes to read */ | |
1692 | u16 rdlen; /* Total number of bytes to read */ | |
1693 | u8 rxseq; /* Next sequence number to expect */ | |
1694 | uint rxleft = 0; /* Remaining number of frames allowed */ | |
1695 | int sdret; /* Return code from calls */ | |
1696 | u8 txmax; /* Maximum tx sequence offered */ | |
1697 | u8 *rxbuf; | |
1698 | int ifidx = 0; | |
1699 | uint rxcount = 0; /* Total frames read */ | |
1700 | ||
1701 | brcmf_dbg(TRACE, "Enter\n"); | |
1702 | ||
1703 | /* Not finished unless we encounter no more frames indication */ | |
1704 | *finished = false; | |
1705 | ||
1706 | for (rxseq = bus->rx_seq, rxleft = maxframes; | |
8d169aa0 | 1707 | !bus->rxskip && rxleft && |
712ac5b3 | 1708 | bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN; |
5b435de0 AS |
1709 | rxseq++, rxleft--) { |
1710 | ||
1711 | /* Handle glomming separately */ | |
b83db862 | 1712 | if (bus->glomd || !skb_queue_empty(&bus->glom)) { |
5b435de0 AS |
1713 | u8 cnt; |
1714 | brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n", | |
b83db862 | 1715 | bus->glomd, skb_peek(&bus->glom)); |
5b435de0 AS |
1716 | cnt = brcmf_sdbrcm_rxglom(bus, rxseq); |
1717 | brcmf_dbg(GLOM, "rxglom returned %d\n", cnt); | |
1718 | rxseq += cnt - 1; | |
1719 | rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1; | |
1720 | continue; | |
1721 | } | |
1722 | ||
1723 | /* Try doing single read if we can */ | |
1724 | if (bus->nextlen) { | |
1725 | u16 nextlen = bus->nextlen; | |
1726 | bus->nextlen = 0; | |
1727 | ||
1728 | rdlen = len = nextlen << 4; | |
1729 | brcmf_pad(bus, &pad, &rdlen); | |
1730 | ||
1731 | /* | |
1732 | * After the frame is received we have to | |
1733 | * distinguish whether it is data | |
1734 | * or non-data frame. | |
1735 | */ | |
1736 | brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf); | |
1737 | if (pkt == NULL) { | |
1738 | /* Give up on data, request rtx of events */ | |
1739 | brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n", | |
1740 | len, rdlen, rxseq); | |
1741 | continue; | |
1742 | } | |
1743 | ||
1744 | if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen, | |
1745 | &len) < 0) | |
1746 | continue; | |
1747 | ||
1748 | /* Extract software header fields */ | |
1749 | chan = SDPCM_PACKET_CHANNEL( | |
1750 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1751 | seq = SDPCM_PACKET_SEQUENCE( | |
1752 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1753 | doff = SDPCM_DOFFSET_VALUE( | |
1754 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1755 | txmax = SDPCM_WINDOW_VALUE( | |
1756 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1757 | ||
1758 | bus->nextlen = | |
1759 | bus->rxhdr[SDPCM_FRAMETAG_LEN + | |
1760 | SDPCM_NEXTLEN_OFFSET]; | |
1761 | if ((bus->nextlen << 4) > MAX_RX_DATASZ) { | |
1762 | brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n", | |
1763 | bus->nextlen, seq); | |
1764 | bus->nextlen = 0; | |
1765 | } | |
1766 | ||
28a1a3bd | 1767 | bus->rx_readahead_cnt++; |
5b435de0 AS |
1768 | |
1769 | /* Handle Flow Control */ | |
1770 | fcbits = SDPCM_FCMASK_VALUE( | |
1771 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1772 | ||
1773 | if (bus->flowcontrol != fcbits) { | |
1774 | if (~bus->flowcontrol & fcbits) | |
1775 | bus->fc_xoff++; | |
1776 | ||
1777 | if (bus->flowcontrol & ~fcbits) | |
1778 | bus->fc_xon++; | |
1779 | ||
1780 | bus->fc_rcvd++; | |
1781 | bus->flowcontrol = fcbits; | |
1782 | } | |
1783 | ||
1784 | /* Check and update sequence number */ | |
1785 | if (rxseq != seq) { | |
1786 | brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n", | |
1787 | seq, rxseq); | |
1788 | bus->rx_badseq++; | |
1789 | rxseq = seq; | |
1790 | } | |
1791 | ||
1792 | /* Check window for sanity */ | |
1793 | if ((u8) (txmax - bus->tx_seq) > 0x40) { | |
1794 | brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n", | |
1795 | txmax, bus->tx_seq); | |
1796 | txmax = bus->tx_seq + 2; | |
1797 | } | |
1798 | bus->tx_max = txmax; | |
1799 | ||
1e023829 JP |
1800 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(), |
1801 | rxbuf, len, "Rx Data:\n"); | |
1802 | brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && | |
1803 | BRCMF_DATA_ON()) && | |
1804 | BRCMF_HDRS_ON(), | |
1805 | bus->rxhdr, SDPCM_HDRLEN, | |
1806 | "RxHdr:\n"); | |
5b435de0 AS |
1807 | |
1808 | if (chan == SDPCM_CONTROL_CHANNEL) { | |
1809 | brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n", | |
1810 | seq); | |
1811 | /* Force retry w/normal header read */ | |
1812 | bus->nextlen = 0; | |
1813 | brcmf_sdbrcm_rxfail(bus, false, true); | |
1814 | brcmf_sdbrcm_pktfree2(bus, pkt); | |
1815 | continue; | |
1816 | } | |
1817 | ||
1818 | /* Validate data offset */ | |
1819 | if ((doff < SDPCM_HDRLEN) || (doff > len)) { | |
1820 | brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n", | |
1821 | doff, len, SDPCM_HDRLEN); | |
1822 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1823 | brcmf_sdbrcm_pktfree2(bus, pkt); | |
1824 | continue; | |
1825 | } | |
1826 | ||
1827 | /* All done with this one -- now deliver the packet */ | |
1828 | goto deliver; | |
1829 | } | |
1830 | ||
1831 | /* Read frame header (hardware and software) */ | |
1832 | sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad, | |
1833 | SDIO_FUNC_2, F2SYNC, bus->rxhdr, | |
5adfeb63 | 1834 | BRCMF_FIRSTREAD); |
5b435de0 AS |
1835 | bus->f2rxhdrs++; |
1836 | ||
1837 | if (sdret < 0) { | |
1838 | brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret); | |
1839 | bus->rx_hdrfail++; | |
1840 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1841 | continue; | |
1842 | } | |
1e023829 JP |
1843 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(), |
1844 | bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n"); | |
1845 | ||
5b435de0 AS |
1846 | |
1847 | /* Extract hardware header fields */ | |
1848 | len = get_unaligned_le16(bus->rxhdr); | |
1849 | check = get_unaligned_le16(bus->rxhdr + sizeof(u16)); | |
1850 | ||
1851 | /* All zeros means no more frames */ | |
1852 | if (!(len | check)) { | |
1853 | *finished = true; | |
1854 | break; | |
1855 | } | |
1856 | ||
1857 | /* Validate check bytes */ | |
1858 | if ((u16) ~(len ^ check)) { | |
1859 | brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n", | |
1860 | len, check); | |
1861 | bus->rx_badhdr++; | |
1862 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1863 | continue; | |
1864 | } | |
1865 | ||
1866 | /* Validate frame length */ | |
1867 | if (len < SDPCM_HDRLEN) { | |
1868 | brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len); | |
1869 | continue; | |
1870 | } | |
1871 | ||
1872 | /* Extract software header fields */ | |
1873 | chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1874 | seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1875 | doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1876 | txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1877 | ||
1878 | /* Validate data offset */ | |
1879 | if ((doff < SDPCM_HDRLEN) || (doff > len)) { | |
1880 | brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n", | |
1881 | doff, len, SDPCM_HDRLEN, seq); | |
1882 | bus->rx_badhdr++; | |
1883 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1884 | continue; | |
1885 | } | |
1886 | ||
1887 | /* Save the readahead length if there is one */ | |
1888 | bus->nextlen = | |
1889 | bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; | |
1890 | if ((bus->nextlen << 4) > MAX_RX_DATASZ) { | |
1891 | brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n", | |
1892 | bus->nextlen, seq); | |
1893 | bus->nextlen = 0; | |
1894 | } | |
1895 | ||
1896 | /* Handle Flow Control */ | |
1897 | fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1898 | ||
1899 | if (bus->flowcontrol != fcbits) { | |
1900 | if (~bus->flowcontrol & fcbits) | |
1901 | bus->fc_xoff++; | |
1902 | ||
1903 | if (bus->flowcontrol & ~fcbits) | |
1904 | bus->fc_xon++; | |
1905 | ||
1906 | bus->fc_rcvd++; | |
1907 | bus->flowcontrol = fcbits; | |
1908 | } | |
1909 | ||
1910 | /* Check and update sequence number */ | |
1911 | if (rxseq != seq) { | |
1912 | brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq); | |
1913 | bus->rx_badseq++; | |
1914 | rxseq = seq; | |
1915 | } | |
1916 | ||
1917 | /* Check window for sanity */ | |
1918 | if ((u8) (txmax - bus->tx_seq) > 0x40) { | |
1919 | brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n", | |
1920 | txmax, bus->tx_seq); | |
1921 | txmax = bus->tx_seq + 2; | |
1922 | } | |
1923 | bus->tx_max = txmax; | |
1924 | ||
1925 | /* Call a separate function for control frames */ | |
1926 | if (chan == SDPCM_CONTROL_CHANNEL) { | |
1927 | brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff); | |
1928 | continue; | |
1929 | } | |
1930 | ||
1931 | /* precondition: chan is either SDPCM_DATA_CHANNEL, | |
1932 | SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or | |
1933 | SDPCM_GLOM_CHANNEL */ | |
1934 | ||
1935 | /* Length to read */ | |
1936 | rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0; | |
1937 | ||
1938 | /* May pad read to blocksize for efficiency */ | |
1939 | if (bus->roundup && bus->blocksize && | |
1940 | (rdlen > bus->blocksize)) { | |
1941 | pad = bus->blocksize - (rdlen % bus->blocksize); | |
1942 | if ((pad <= bus->roundup) && (pad < bus->blocksize) && | |
1943 | ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ)) | |
1944 | rdlen += pad; | |
1945 | } else if (rdlen % BRCMF_SDALIGN) { | |
1946 | rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); | |
1947 | } | |
1948 | ||
1949 | /* Satisfy length-alignment requirements */ | |
1950 | if (rdlen & (ALIGNMENT - 1)) | |
1951 | rdlen = roundup(rdlen, ALIGNMENT); | |
1952 | ||
1953 | if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) { | |
1954 | /* Too long -- skip this frame */ | |
1955 | brcmf_dbg(ERROR, "too long: len %d rdlen %d\n", | |
1956 | len, rdlen); | |
719f2733 | 1957 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1958 | bus->rx_toolong++; |
1959 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1960 | continue; | |
1961 | } | |
1962 | ||
1963 | pkt = brcmu_pkt_buf_get_skb(rdlen + | |
1964 | BRCMF_FIRSTREAD + BRCMF_SDALIGN); | |
1965 | if (!pkt) { | |
1966 | /* Give up on data, request rtx of events */ | |
1967 | brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n", | |
1968 | rdlen, chan); | |
719f2733 | 1969 | bus->sdiodev->bus_if->dstats.rx_dropped++; |
5b435de0 AS |
1970 | brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan)); |
1971 | continue; | |
1972 | } | |
1973 | ||
1974 | /* Leave room for what we already read, and align remainder */ | |
1975 | skb_pull(pkt, BRCMF_FIRSTREAD); | |
1976 | pkt_align(pkt, rdlen, BRCMF_SDALIGN); | |
1977 | ||
1978 | /* Read the remaining frame data */ | |
5adfeb63 AS |
1979 | sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad, |
1980 | SDIO_FUNC_2, F2SYNC, pkt); | |
5b435de0 AS |
1981 | bus->f2rxdata++; |
1982 | ||
1983 | if (sdret < 0) { | |
1984 | brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen, | |
1985 | ((chan == SDPCM_EVENT_CHANNEL) ? "event" | |
1986 | : ((chan == SDPCM_DATA_CHANNEL) ? "data" | |
1987 | : "test")), sdret); | |
1988 | brcmu_pkt_buf_free_skb(pkt); | |
719f2733 | 1989 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1990 | brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan)); |
1991 | continue; | |
1992 | } | |
1993 | ||
1994 | /* Copy the already-read portion */ | |
1995 | skb_push(pkt, BRCMF_FIRSTREAD); | |
1996 | memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD); | |
1997 | ||
1e023829 JP |
1998 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(), |
1999 | pkt->data, len, "Rx Data:\n"); | |
5b435de0 AS |
2000 | |
2001 | deliver: | |
2002 | /* Save superframe descriptor and allocate packet frame */ | |
2003 | if (chan == SDPCM_GLOM_CHANNEL) { | |
2004 | if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) { | |
2005 | brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n", | |
2006 | len); | |
1e023829 JP |
2007 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), |
2008 | pkt->data, len, | |
2009 | "Glom Data:\n"); | |
5b435de0 AS |
2010 | __skb_trim(pkt, len); |
2011 | skb_pull(pkt, SDPCM_HDRLEN); | |
2012 | bus->glomd = pkt; | |
2013 | } else { | |
2014 | brcmf_dbg(ERROR, "%s: glom superframe w/o " | |
2015 | "descriptor!\n", __func__); | |
2016 | brcmf_sdbrcm_rxfail(bus, false, false); | |
2017 | } | |
2018 | continue; | |
2019 | } | |
2020 | ||
2021 | /* Fill in packet len and prio, deliver upward */ | |
2022 | __skb_trim(pkt, len); | |
2023 | skb_pull(pkt, doff); | |
2024 | ||
2025 | if (pkt->len == 0) { | |
2026 | brcmu_pkt_buf_free_skb(pkt); | |
2027 | continue; | |
d5625ee6 FL |
2028 | } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx, |
2029 | pkt) != 0) { | |
5b435de0 AS |
2030 | brcmf_dbg(ERROR, "rx protocol error\n"); |
2031 | brcmu_pkt_buf_free_skb(pkt); | |
719f2733 | 2032 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
2033 | continue; |
2034 | } | |
2035 | ||
2036 | /* Unlock during rx call */ | |
2037 | up(&bus->sdsem); | |
228bb43d | 2038 | brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt); |
5b435de0 AS |
2039 | down(&bus->sdsem); |
2040 | } | |
2041 | rxcount = maxframes - rxleft; | |
5b435de0 AS |
2042 | /* Message if we hit the limit */ |
2043 | if (!rxleft) | |
2044 | brcmf_dbg(DATA, "hit rx limit of %d frames\n", | |
2045 | maxframes); | |
2046 | else | |
5b435de0 AS |
2047 | brcmf_dbg(DATA, "processed %d frames\n", rxcount); |
2048 | /* Back off rxseq if awaiting rtx, update rx_seq */ | |
2049 | if (bus->rxskip) | |
2050 | rxseq--; | |
2051 | bus->rx_seq = rxseq; | |
2052 | ||
2053 | return rxcount; | |
2054 | } | |
2055 | ||
5b435de0 | 2056 | static void |
e92eedf4 | 2057 | brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar) |
5b435de0 AS |
2058 | { |
2059 | up(&bus->sdsem); | |
2060 | wait_event_interruptible_timeout(bus->ctrl_wait, | |
2061 | (*lockvar == false), HZ * 2); | |
2062 | down(&bus->sdsem); | |
2063 | return; | |
2064 | } | |
2065 | ||
2066 | static void | |
e92eedf4 | 2067 | brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus) |
5b435de0 AS |
2068 | { |
2069 | if (waitqueue_active(&bus->ctrl_wait)) | |
2070 | wake_up_interruptible(&bus->ctrl_wait); | |
2071 | return; | |
2072 | } | |
2073 | ||
2074 | /* Writes a HW/SW header into the packet and sends it. */ | |
2075 | /* Assumes: (a) header space already there, (b) caller holds lock */ | |
e92eedf4 | 2076 | static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt, |
5b435de0 AS |
2077 | uint chan, bool free_pkt) |
2078 | { | |
2079 | int ret; | |
2080 | u8 *frame; | |
2081 | u16 len, pad = 0; | |
2082 | u32 swheader; | |
2083 | struct sk_buff *new; | |
2084 | int i; | |
2085 | ||
2086 | brcmf_dbg(TRACE, "Enter\n"); | |
2087 | ||
2088 | frame = (u8 *) (pkt->data); | |
2089 | ||
2090 | /* Add alignment padding, allocate new packet if needed */ | |
2091 | pad = ((unsigned long)frame % BRCMF_SDALIGN); | |
2092 | if (pad) { | |
2093 | if (skb_headroom(pkt) < pad) { | |
2094 | brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n", | |
2095 | skb_headroom(pkt), pad); | |
9c1a043a | 2096 | bus->sdiodev->bus_if->tx_realloc++; |
5b435de0 AS |
2097 | new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN); |
2098 | if (!new) { | |
2099 | brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n", | |
2100 | pkt->len + BRCMF_SDALIGN); | |
2101 | ret = -ENOMEM; | |
2102 | goto done; | |
2103 | } | |
2104 | ||
2105 | pkt_align(new, pkt->len, BRCMF_SDALIGN); | |
2106 | memcpy(new->data, pkt->data, pkt->len); | |
2107 | if (free_pkt) | |
2108 | brcmu_pkt_buf_free_skb(pkt); | |
2109 | /* free the pkt if canned one is not used */ | |
2110 | free_pkt = true; | |
2111 | pkt = new; | |
2112 | frame = (u8 *) (pkt->data); | |
2113 | /* precondition: (frame % BRCMF_SDALIGN) == 0) */ | |
2114 | pad = 0; | |
2115 | } else { | |
2116 | skb_push(pkt, pad); | |
2117 | frame = (u8 *) (pkt->data); | |
2118 | /* precondition: pad + SDPCM_HDRLEN <= pkt->len */ | |
2119 | memset(frame, 0, pad + SDPCM_HDRLEN); | |
2120 | } | |
2121 | } | |
2122 | /* precondition: pad < BRCMF_SDALIGN */ | |
2123 | ||
2124 | /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */ | |
2125 | len = (u16) (pkt->len); | |
2126 | *(__le16 *) frame = cpu_to_le16(len); | |
2127 | *(((__le16 *) frame) + 1) = cpu_to_le16(~len); | |
2128 | ||
2129 | /* Software tag: channel, sequence number, data offset */ | |
2130 | swheader = | |
2131 | ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq | | |
2132 | (((pad + | |
2133 | SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK); | |
2134 | ||
2135 | put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN); | |
2136 | put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader)); | |
2137 | ||
8ae74654 | 2138 | #ifdef DEBUG |
5b435de0 | 2139 | tx_packets[pkt->priority]++; |
1e023829 JP |
2140 | |
2141 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && | |
2142 | ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) || | |
2143 | (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)), | |
2144 | frame, len, "Tx Frame:\n"); | |
2145 | brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && | |
2146 | ((BRCMF_CTL_ON() && | |
2147 | chan == SDPCM_CONTROL_CHANNEL) || | |
2148 | (BRCMF_DATA_ON() && | |
2149 | chan != SDPCM_CONTROL_CHANNEL))) && | |
2150 | BRCMF_HDRS_ON(), | |
2151 | frame, min_t(u16, len, 16), "TxHdr:\n"); | |
5b435de0 AS |
2152 | #endif |
2153 | ||
2154 | /* Raise len to next SDIO block to eliminate tail command */ | |
2155 | if (bus->roundup && bus->blocksize && (len > bus->blocksize)) { | |
2156 | u16 pad = bus->blocksize - (len % bus->blocksize); | |
2157 | if ((pad <= bus->roundup) && (pad < bus->blocksize)) | |
2158 | len += pad; | |
2159 | } else if (len % BRCMF_SDALIGN) { | |
2160 | len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN); | |
2161 | } | |
2162 | ||
2163 | /* Some controllers have trouble with odd bytes -- round to even */ | |
2164 | if (len & (ALIGNMENT - 1)) | |
2165 | len = roundup(len, ALIGNMENT); | |
2166 | ||
5adfeb63 AS |
2167 | ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad, |
2168 | SDIO_FUNC_2, F2SYNC, pkt); | |
5b435de0 AS |
2169 | bus->f2txdata++; |
2170 | ||
2171 | if (ret < 0) { | |
2172 | /* On failure, abort the command and terminate the frame */ | |
2173 | brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n", | |
2174 | ret); | |
2175 | bus->tx_sderrs++; | |
2176 | ||
2177 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
2178 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
2179 | SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, | |
2180 | NULL); | |
2181 | bus->f1regdata++; | |
2182 | ||
2183 | for (i = 0; i < 3; i++) { | |
2184 | u8 hi, lo; | |
2185 | hi = brcmf_sdcard_cfg_read(bus->sdiodev, | |
2186 | SDIO_FUNC_1, | |
2187 | SBSDIO_FUNC1_WFRAMEBCHI, | |
2188 | NULL); | |
2189 | lo = brcmf_sdcard_cfg_read(bus->sdiodev, | |
2190 | SDIO_FUNC_1, | |
2191 | SBSDIO_FUNC1_WFRAMEBCLO, | |
2192 | NULL); | |
2193 | bus->f1regdata += 2; | |
2194 | if ((hi == 0) && (lo == 0)) | |
2195 | break; | |
2196 | } | |
2197 | ||
2198 | } | |
2199 | if (ret == 0) | |
2200 | bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; | |
2201 | ||
2202 | done: | |
2203 | /* restore pkt buffer pointer before calling tx complete routine */ | |
2204 | skb_pull(pkt, SDPCM_HDRLEN + pad); | |
2205 | up(&bus->sdsem); | |
c995788f | 2206 | brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0); |
5b435de0 AS |
2207 | down(&bus->sdsem); |
2208 | ||
2209 | if (free_pkt) | |
2210 | brcmu_pkt_buf_free_skb(pkt); | |
2211 | ||
2212 | return ret; | |
2213 | } | |
2214 | ||
e92eedf4 | 2215 | static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes) |
5b435de0 AS |
2216 | { |
2217 | struct sk_buff *pkt; | |
2218 | u32 intstatus = 0; | |
2219 | uint retries = 0; | |
2220 | int ret = 0, prec_out; | |
2221 | uint cnt = 0; | |
2222 | uint datalen; | |
2223 | u8 tx_prec_map; | |
2224 | ||
5b435de0 AS |
2225 | brcmf_dbg(TRACE, "Enter\n"); |
2226 | ||
2227 | tx_prec_map = ~bus->flowcontrol; | |
2228 | ||
2229 | /* Send frames until the limit or some other event */ | |
2230 | for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) { | |
2231 | spin_lock_bh(&bus->txqlock); | |
2232 | pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); | |
2233 | if (pkt == NULL) { | |
2234 | spin_unlock_bh(&bus->txqlock); | |
2235 | break; | |
2236 | } | |
2237 | spin_unlock_bh(&bus->txqlock); | |
2238 | datalen = pkt->len - SDPCM_HDRLEN; | |
2239 | ||
2240 | ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true); | |
2241 | if (ret) | |
719f2733 | 2242 | bus->sdiodev->bus_if->dstats.tx_errors++; |
5b435de0 | 2243 | else |
719f2733 | 2244 | bus->sdiodev->bus_if->dstats.tx_bytes += datalen; |
5b435de0 AS |
2245 | |
2246 | /* In poll mode, need to check for other events */ | |
2247 | if (!bus->intr && cnt) { | |
2248 | /* Check device status, signal pending interrupt */ | |
2249 | r_sdreg32(bus, &intstatus, | |
2250 | offsetof(struct sdpcmd_regs, intstatus), | |
2251 | &retries); | |
2252 | bus->f2txdata++; | |
2253 | if (brcmf_sdcard_regfail(bus->sdiodev)) | |
2254 | break; | |
2255 | if (intstatus & bus->hostintmask) | |
2256 | bus->ipend = true; | |
2257 | } | |
2258 | } | |
2259 | ||
2260 | /* Deflow-control stack if needed */ | |
712ac5b3 FL |
2261 | if (bus->sdiodev->bus_if->drvr_up && |
2262 | (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) && | |
c8bf3484 FL |
2263 | bus->txoff && (pktq_len(&bus->txq) < TXLOW)) { |
2264 | bus->txoff = OFF; | |
2b459056 | 2265 | brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF); |
c8bf3484 | 2266 | } |
5b435de0 AS |
2267 | |
2268 | return cnt; | |
2269 | } | |
2270 | ||
a9ffda88 FL |
2271 | static void brcmf_sdbrcm_bus_stop(struct device *dev) |
2272 | { | |
2273 | u32 local_hostintmask; | |
2274 | u8 saveclk; | |
2275 | uint retries; | |
2276 | int err; | |
2277 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); | |
2278 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv; | |
2279 | struct brcmf_sdio *bus = sdiodev->bus; | |
2280 | ||
2281 | brcmf_dbg(TRACE, "Enter\n"); | |
2282 | ||
2283 | if (bus->watchdog_tsk) { | |
2284 | send_sig(SIGTERM, bus->watchdog_tsk, 1); | |
2285 | kthread_stop(bus->watchdog_tsk); | |
2286 | bus->watchdog_tsk = NULL; | |
2287 | } | |
2288 | ||
2289 | if (bus->dpc_tsk && bus->dpc_tsk != current) { | |
2290 | send_sig(SIGTERM, bus->dpc_tsk, 1); | |
2291 | kthread_stop(bus->dpc_tsk); | |
2292 | bus->dpc_tsk = NULL; | |
2293 | } | |
2294 | ||
2295 | down(&bus->sdsem); | |
2296 | ||
2297 | bus_wake(bus); | |
2298 | ||
2299 | /* Enable clock for device interrupts */ | |
2300 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
2301 | ||
2302 | /* Disable and clear interrupts at the chip level also */ | |
2303 | w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries); | |
2304 | local_hostintmask = bus->hostintmask; | |
2305 | bus->hostintmask = 0; | |
2306 | ||
2307 | /* Change our idea of bus state */ | |
2308 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; | |
2309 | ||
2310 | /* Force clocks on backplane to be sure F2 interrupt propagates */ | |
2311 | saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
2312 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
2313 | if (!err) { | |
2314 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
2315 | SBSDIO_FUNC1_CHIPCLKCSR, | |
2316 | (saveclk | SBSDIO_FORCE_HT), &err); | |
2317 | } | |
2318 | if (err) | |
2319 | brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err); | |
2320 | ||
2321 | /* Turn off the bus (F2), free any pending packets */ | |
2322 | brcmf_dbg(INTR, "disable SDIO interrupts\n"); | |
2323 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx, | |
2324 | SDIO_FUNC_ENABLE_1, NULL); | |
2325 | ||
2326 | /* Clear any pending interrupts now that F2 is disabled */ | |
2327 | w_sdreg32(bus, local_hostintmask, | |
2328 | offsetof(struct sdpcmd_regs, intstatus), &retries); | |
2329 | ||
2330 | /* Turn off the backplane clock (only) */ | |
2331 | brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); | |
2332 | ||
2333 | /* Clear the data packet queues */ | |
2334 | brcmu_pktq_flush(&bus->txq, true, NULL, NULL); | |
2335 | ||
2336 | /* Clear any held glomming stuff */ | |
2337 | if (bus->glomd) | |
2338 | brcmu_pkt_buf_free_skb(bus->glomd); | |
2339 | brcmf_sdbrcm_free_glom(bus); | |
2340 | ||
2341 | /* Clear rx control and wake any waiters */ | |
2342 | bus->rxlen = 0; | |
2343 | brcmf_sdbrcm_dcmd_resp_wake(bus); | |
2344 | ||
2345 | /* Reset some F2 state stuff */ | |
2346 | bus->rxskip = false; | |
2347 | bus->tx_seq = bus->rx_seq = 0; | |
2348 | ||
2349 | up(&bus->sdsem); | |
2350 | } | |
2351 | ||
e92eedf4 | 2352 | static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus) |
5b435de0 AS |
2353 | { |
2354 | u32 intstatus, newstatus = 0; | |
2355 | uint retries = 0; | |
2356 | uint rxlimit = bus->rxbound; /* Rx frames to read before resched */ | |
2357 | uint txlimit = bus->txbound; /* Tx frames to send before resched */ | |
2358 | uint framecnt = 0; /* Temporary counter of tx/rx frames */ | |
2359 | bool rxdone = true; /* Flag for no more read data */ | |
2360 | bool resched = false; /* Flag indicating resched wanted */ | |
2361 | ||
2362 | brcmf_dbg(TRACE, "Enter\n"); | |
2363 | ||
2364 | /* Start with leftover status bits */ | |
2365 | intstatus = bus->intstatus; | |
2366 | ||
2367 | down(&bus->sdsem); | |
2368 | ||
2369 | /* If waiting for HTAVAIL, check status */ | |
2370 | if (bus->clkstate == CLK_PENDING) { | |
2371 | int err; | |
2372 | u8 clkctl, devctl = 0; | |
2373 | ||
8ae74654 | 2374 | #ifdef DEBUG |
5b435de0 AS |
2375 | /* Check for inconsistent device control */ |
2376 | devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
2377 | SBSDIO_DEVICE_CTL, &err); | |
2378 | if (err) { | |
2379 | brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err); | |
712ac5b3 | 2380 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 | 2381 | } |
8ae74654 | 2382 | #endif /* DEBUG */ |
5b435de0 AS |
2383 | |
2384 | /* Read CSR, if clock on switch to AVAIL, else ignore */ | |
2385 | clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
2386 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
2387 | if (err) { | |
2388 | brcmf_dbg(ERROR, "error reading CSR: %d\n", | |
2389 | err); | |
712ac5b3 | 2390 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2391 | } |
2392 | ||
2393 | brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", | |
2394 | devctl, clkctl); | |
2395 | ||
2396 | if (SBSDIO_HTAV(clkctl)) { | |
2397 | devctl = brcmf_sdcard_cfg_read(bus->sdiodev, | |
2398 | SDIO_FUNC_1, | |
2399 | SBSDIO_DEVICE_CTL, &err); | |
2400 | if (err) { | |
2401 | brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", | |
2402 | err); | |
712ac5b3 | 2403 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2404 | } |
2405 | devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; | |
2406 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
2407 | SBSDIO_DEVICE_CTL, devctl, &err); | |
2408 | if (err) { | |
2409 | brcmf_dbg(ERROR, "error writing DEVCTL: %d\n", | |
2410 | err); | |
712ac5b3 | 2411 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2412 | } |
2413 | bus->clkstate = CLK_AVAIL; | |
2414 | } else { | |
2415 | goto clkwait; | |
2416 | } | |
2417 | } | |
2418 | ||
2419 | bus_wake(bus); | |
2420 | ||
2421 | /* Make sure backplane clock is on */ | |
2422 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true); | |
2423 | if (bus->clkstate == CLK_PENDING) | |
2424 | goto clkwait; | |
2425 | ||
2426 | /* Pending interrupt indicates new device status */ | |
2427 | if (bus->ipend) { | |
2428 | bus->ipend = false; | |
2429 | r_sdreg32(bus, &newstatus, | |
2430 | offsetof(struct sdpcmd_regs, intstatus), &retries); | |
2431 | bus->f1regdata++; | |
2432 | if (brcmf_sdcard_regfail(bus->sdiodev)) | |
2433 | newstatus = 0; | |
2434 | newstatus &= bus->hostintmask; | |
2435 | bus->fcstate = !!(newstatus & I_HMB_FC_STATE); | |
2436 | if (newstatus) { | |
2437 | w_sdreg32(bus, newstatus, | |
2438 | offsetof(struct sdpcmd_regs, intstatus), | |
2439 | &retries); | |
2440 | bus->f1regdata++; | |
2441 | } | |
2442 | } | |
2443 | ||
2444 | /* Merge new bits with previous */ | |
2445 | intstatus |= newstatus; | |
2446 | bus->intstatus = 0; | |
2447 | ||
2448 | /* Handle flow-control change: read new state in case our ack | |
2449 | * crossed another change interrupt. If change still set, assume | |
2450 | * FC ON for safety, let next loop through do the debounce. | |
2451 | */ | |
2452 | if (intstatus & I_HMB_FC_CHANGE) { | |
2453 | intstatus &= ~I_HMB_FC_CHANGE; | |
2454 | w_sdreg32(bus, I_HMB_FC_CHANGE, | |
2455 | offsetof(struct sdpcmd_regs, intstatus), &retries); | |
2456 | ||
2457 | r_sdreg32(bus, &newstatus, | |
2458 | offsetof(struct sdpcmd_regs, intstatus), &retries); | |
2459 | bus->f1regdata += 2; | |
2460 | bus->fcstate = | |
2461 | !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)); | |
2462 | intstatus |= (newstatus & bus->hostintmask); | |
2463 | } | |
2464 | ||
2465 | /* Handle host mailbox indication */ | |
2466 | if (intstatus & I_HMB_HOST_INT) { | |
2467 | intstatus &= ~I_HMB_HOST_INT; | |
2468 | intstatus |= brcmf_sdbrcm_hostmail(bus); | |
2469 | } | |
2470 | ||
2471 | /* Generally don't ask for these, can get CRC errors... */ | |
2472 | if (intstatus & I_WR_OOSYNC) { | |
2473 | brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n"); | |
2474 | intstatus &= ~I_WR_OOSYNC; | |
2475 | } | |
2476 | ||
2477 | if (intstatus & I_RD_OOSYNC) { | |
2478 | brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n"); | |
2479 | intstatus &= ~I_RD_OOSYNC; | |
2480 | } | |
2481 | ||
2482 | if (intstatus & I_SBINT) { | |
2483 | brcmf_dbg(ERROR, "Dongle reports SBINT\n"); | |
2484 | intstatus &= ~I_SBINT; | |
2485 | } | |
2486 | ||
2487 | /* Would be active due to wake-wlan in gSPI */ | |
2488 | if (intstatus & I_CHIPACTIVE) { | |
2489 | brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n"); | |
2490 | intstatus &= ~I_CHIPACTIVE; | |
2491 | } | |
2492 | ||
2493 | /* Ignore frame indications if rxskip is set */ | |
2494 | if (bus->rxskip) | |
2495 | intstatus &= ~I_HMB_FRAME_IND; | |
2496 | ||
2497 | /* On frame indication, read available frames */ | |
2498 | if (PKT_AVAILABLE()) { | |
2499 | framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone); | |
2500 | if (rxdone || bus->rxskip) | |
2501 | intstatus &= ~I_HMB_FRAME_IND; | |
2502 | rxlimit -= min(framecnt, rxlimit); | |
2503 | } | |
2504 | ||
2505 | /* Keep still-pending events for next scheduling */ | |
2506 | bus->intstatus = intstatus; | |
2507 | ||
2508 | clkwait: | |
2509 | if (data_ok(bus) && bus->ctrl_frame_stat && | |
2510 | (bus->clkstate == CLK_AVAIL)) { | |
2511 | int ret, i; | |
2512 | ||
5adfeb63 | 2513 | ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad, |
5b435de0 | 2514 | SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf, |
5adfeb63 | 2515 | (u32) bus->ctrl_frame_len); |
5b435de0 AS |
2516 | |
2517 | if (ret < 0) { | |
2518 | /* On failure, abort the command and | |
2519 | terminate the frame */ | |
2520 | brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n", | |
2521 | ret); | |
2522 | bus->tx_sderrs++; | |
2523 | ||
2524 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
2525 | ||
2526 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
2527 | SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, | |
2528 | NULL); | |
2529 | bus->f1regdata++; | |
2530 | ||
2531 | for (i = 0; i < 3; i++) { | |
2532 | u8 hi, lo; | |
2533 | hi = brcmf_sdcard_cfg_read(bus->sdiodev, | |
2534 | SDIO_FUNC_1, | |
2535 | SBSDIO_FUNC1_WFRAMEBCHI, | |
2536 | NULL); | |
2537 | lo = brcmf_sdcard_cfg_read(bus->sdiodev, | |
2538 | SDIO_FUNC_1, | |
2539 | SBSDIO_FUNC1_WFRAMEBCLO, | |
2540 | NULL); | |
2541 | bus->f1regdata += 2; | |
2542 | if ((hi == 0) && (lo == 0)) | |
2543 | break; | |
2544 | } | |
2545 | ||
2546 | } | |
2547 | if (ret == 0) | |
2548 | bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; | |
2549 | ||
2550 | brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret); | |
2551 | bus->ctrl_frame_stat = false; | |
2552 | brcmf_sdbrcm_wait_event_wakeup(bus); | |
2553 | } | |
2554 | /* Send queued frames (limit 1 if rx may still be pending) */ | |
2555 | else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate && | |
2556 | brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit | |
2557 | && data_ok(bus)) { | |
2558 | framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax); | |
2559 | framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt); | |
2560 | txlimit -= framecnt; | |
2561 | } | |
2562 | ||
2563 | /* Resched if events or tx frames are pending, | |
2564 | else await next interrupt */ | |
2565 | /* On failed register access, all bets are off: | |
2566 | no resched or interrupts */ | |
712ac5b3 | 2567 | if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || |
5b435de0 AS |
2568 | brcmf_sdcard_regfail(bus->sdiodev)) { |
2569 | brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n", | |
2570 | brcmf_sdcard_regfail(bus->sdiodev)); | |
712ac5b3 | 2571 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2572 | bus->intstatus = 0; |
2573 | } else if (bus->clkstate == CLK_PENDING) { | |
2574 | brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n"); | |
2575 | resched = true; | |
2576 | } else if (bus->intstatus || bus->ipend || | |
2577 | (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) | |
2578 | && data_ok(bus)) || PKT_AVAILABLE()) { | |
2579 | resched = true; | |
2580 | } | |
2581 | ||
2582 | bus->dpc_sched = resched; | |
2583 | ||
2584 | /* If we're done for now, turn off clock request. */ | |
2585 | if ((bus->clkstate != CLK_PENDING) | |
2586 | && bus->idletime == BRCMF_IDLE_IMMEDIATE) { | |
2587 | bus->activity = false; | |
2588 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); | |
2589 | } | |
2590 | ||
2591 | up(&bus->sdsem); | |
2592 | ||
2593 | return resched; | |
2594 | } | |
2595 | ||
2596 | static int brcmf_sdbrcm_dpc_thread(void *data) | |
2597 | { | |
e92eedf4 | 2598 | struct brcmf_sdio *bus = (struct brcmf_sdio *) data; |
5b435de0 AS |
2599 | |
2600 | allow_signal(SIGTERM); | |
2601 | /* Run until signal received */ | |
2602 | while (1) { | |
2603 | if (kthread_should_stop()) | |
2604 | break; | |
2605 | if (!wait_for_completion_interruptible(&bus->dpc_wait)) { | |
2606 | /* Call bus dpc unless it indicated down | |
2607 | (then clean stop) */ | |
712ac5b3 | 2608 | if (bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN) { |
5b435de0 AS |
2609 | if (brcmf_sdbrcm_dpc(bus)) |
2610 | complete(&bus->dpc_wait); | |
2611 | } else { | |
2612 | /* after stopping the bus, exit thread */ | |
94c2fb82 | 2613 | brcmf_sdbrcm_bus_stop(bus->sdiodev->dev); |
5b435de0 AS |
2614 | bus->dpc_tsk = NULL; |
2615 | break; | |
2616 | } | |
2617 | } else | |
2618 | break; | |
2619 | } | |
2620 | return 0; | |
2621 | } | |
2622 | ||
b9692d17 | 2623 | static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt) |
5b435de0 AS |
2624 | { |
2625 | int ret = -EBADE; | |
2626 | uint datalen, prec; | |
bf347bb9 FL |
2627 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
2628 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv; | |
2629 | struct brcmf_sdio *bus = sdiodev->bus; | |
5b435de0 AS |
2630 | |
2631 | brcmf_dbg(TRACE, "Enter\n"); | |
2632 | ||
2633 | datalen = pkt->len; | |
2634 | ||
2635 | /* Add space for the header */ | |
2636 | skb_push(pkt, SDPCM_HDRLEN); | |
2637 | /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */ | |
2638 | ||
2639 | prec = prio2prec((pkt->priority & PRIOMASK)); | |
2640 | ||
2641 | /* Check for existing queue, current flow-control, | |
2642 | pending event, or pending clock */ | |
2643 | brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq)); | |
2644 | bus->fcqueued++; | |
2645 | ||
2646 | /* Priority based enq */ | |
2647 | spin_lock_bh(&bus->txqlock); | |
b63487ed FL |
2648 | if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) == |
2649 | false) { | |
5b435de0 | 2650 | skb_pull(pkt, SDPCM_HDRLEN); |
c995788f | 2651 | brcmf_txcomplete(bus->sdiodev->dev, pkt, false); |
5b435de0 AS |
2652 | brcmu_pkt_buf_free_skb(pkt); |
2653 | brcmf_dbg(ERROR, "out of bus->txq !!!\n"); | |
2654 | ret = -ENOSR; | |
2655 | } else { | |
2656 | ret = 0; | |
2657 | } | |
2658 | spin_unlock_bh(&bus->txqlock); | |
2659 | ||
c8bf3484 FL |
2660 | if (pktq_len(&bus->txq) >= TXHI) { |
2661 | bus->txoff = ON; | |
2b459056 | 2662 | brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON); |
c8bf3484 | 2663 | } |
5b435de0 | 2664 | |
8ae74654 | 2665 | #ifdef DEBUG |
5b435de0 AS |
2666 | if (pktq_plen(&bus->txq, prec) > qcount[prec]) |
2667 | qcount[prec] = pktq_plen(&bus->txq, prec); | |
2668 | #endif | |
2669 | /* Schedule DPC if needed to send queued packet(s) */ | |
2670 | if (!bus->dpc_sched) { | |
2671 | bus->dpc_sched = true; | |
2672 | if (bus->dpc_tsk) | |
2673 | complete(&bus->dpc_wait); | |
2674 | } | |
2675 | ||
2676 | return ret; | |
2677 | } | |
2678 | ||
2679 | static int | |
e92eedf4 | 2680 | brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data, |
5b435de0 AS |
2681 | uint size) |
2682 | { | |
2683 | int bcmerror = 0; | |
2684 | u32 sdaddr; | |
2685 | uint dsize; | |
2686 | ||
2687 | /* Determine initial transfer parameters */ | |
2688 | sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK; | |
2689 | if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK) | |
2690 | dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr); | |
2691 | else | |
2692 | dsize = size; | |
2693 | ||
2694 | /* Set the backplane window to include the start address */ | |
2695 | bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address); | |
2696 | if (bcmerror) { | |
2697 | brcmf_dbg(ERROR, "window change failed\n"); | |
2698 | goto xfer_done; | |
2699 | } | |
2700 | ||
2701 | /* Do the transfer(s) */ | |
2702 | while (size) { | |
2703 | brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n", | |
2704 | write ? "write" : "read", dsize, | |
2705 | sdaddr, address & SBSDIO_SBWINDOW_MASK); | |
2706 | bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write, | |
2707 | sdaddr, data, dsize); | |
2708 | if (bcmerror) { | |
2709 | brcmf_dbg(ERROR, "membytes transfer failed\n"); | |
2710 | break; | |
2711 | } | |
2712 | ||
2713 | /* Adjust for next transfer (if any) */ | |
2714 | size -= dsize; | |
2715 | if (size) { | |
2716 | data += dsize; | |
2717 | address += dsize; | |
2718 | bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, | |
2719 | address); | |
2720 | if (bcmerror) { | |
2721 | brcmf_dbg(ERROR, "window change failed\n"); | |
2722 | break; | |
2723 | } | |
2724 | sdaddr = 0; | |
2725 | dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size); | |
2726 | } | |
2727 | } | |
2728 | ||
2729 | xfer_done: | |
2730 | /* Return the window to backplane enumeration space for core access */ | |
2731 | if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad)) | |
2732 | brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n", | |
2733 | bus->sdiodev->sbwad); | |
2734 | ||
2735 | return bcmerror; | |
2736 | } | |
2737 | ||
8ae74654 | 2738 | #ifdef DEBUG |
5b435de0 AS |
2739 | #define CONSOLE_LINE_MAX 192 |
2740 | ||
e92eedf4 | 2741 | static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus) |
5b435de0 AS |
2742 | { |
2743 | struct brcmf_console *c = &bus->console; | |
2744 | u8 line[CONSOLE_LINE_MAX], ch; | |
2745 | u32 n, idx, addr; | |
2746 | int rv; | |
2747 | ||
2748 | /* Don't do anything until FWREADY updates console address */ | |
2749 | if (bus->console_addr == 0) | |
2750 | return 0; | |
2751 | ||
2752 | /* Read console log struct */ | |
2753 | addr = bus->console_addr + offsetof(struct rte_console, log_le); | |
2754 | rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le, | |
2755 | sizeof(c->log_le)); | |
2756 | if (rv < 0) | |
2757 | return rv; | |
2758 | ||
2759 | /* Allocate console buffer (one time only) */ | |
2760 | if (c->buf == NULL) { | |
2761 | c->bufsize = le32_to_cpu(c->log_le.buf_size); | |
2762 | c->buf = kmalloc(c->bufsize, GFP_ATOMIC); | |
2763 | if (c->buf == NULL) | |
2764 | return -ENOMEM; | |
2765 | } | |
2766 | ||
2767 | idx = le32_to_cpu(c->log_le.idx); | |
2768 | ||
2769 | /* Protect against corrupt value */ | |
2770 | if (idx > c->bufsize) | |
2771 | return -EBADE; | |
2772 | ||
2773 | /* Skip reading the console buffer if the index pointer | |
2774 | has not moved */ | |
2775 | if (idx == c->last) | |
2776 | return 0; | |
2777 | ||
2778 | /* Read the console buffer */ | |
2779 | addr = le32_to_cpu(c->log_le.buf); | |
2780 | rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize); | |
2781 | if (rv < 0) | |
2782 | return rv; | |
2783 | ||
2784 | while (c->last != idx) { | |
2785 | for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) { | |
2786 | if (c->last == idx) { | |
2787 | /* This would output a partial line. | |
2788 | * Instead, back up | |
2789 | * the buffer pointer and output this | |
2790 | * line next time around. | |
2791 | */ | |
2792 | if (c->last >= n) | |
2793 | c->last -= n; | |
2794 | else | |
2795 | c->last = c->bufsize - n; | |
2796 | goto break2; | |
2797 | } | |
2798 | ch = c->buf[c->last]; | |
2799 | c->last = (c->last + 1) % c->bufsize; | |
2800 | if (ch == '\n') | |
2801 | break; | |
2802 | line[n] = ch; | |
2803 | } | |
2804 | ||
2805 | if (n > 0) { | |
2806 | if (line[n - 1] == '\r') | |
2807 | n--; | |
2808 | line[n] = 0; | |
2809 | printk(KERN_DEBUG "CONSOLE: %s\n", line); | |
2810 | } | |
2811 | } | |
2812 | break2: | |
2813 | ||
2814 | return 0; | |
2815 | } | |
8ae74654 | 2816 | #endif /* DEBUG */ |
5b435de0 | 2817 | |
e92eedf4 | 2818 | static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len) |
5b435de0 AS |
2819 | { |
2820 | int i; | |
2821 | int ret; | |
2822 | ||
2823 | bus->ctrl_frame_stat = false; | |
5adfeb63 AS |
2824 | ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad, |
2825 | SDIO_FUNC_2, F2SYNC, frame, len); | |
5b435de0 AS |
2826 | |
2827 | if (ret < 0) { | |
2828 | /* On failure, abort the command and terminate the frame */ | |
2829 | brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n", | |
2830 | ret); | |
2831 | bus->tx_sderrs++; | |
2832 | ||
2833 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
2834 | ||
2835 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
2836 | SBSDIO_FUNC1_FRAMECTRL, | |
2837 | SFC_WF_TERM, NULL); | |
2838 | bus->f1regdata++; | |
2839 | ||
2840 | for (i = 0; i < 3; i++) { | |
2841 | u8 hi, lo; | |
2842 | hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
2843 | SBSDIO_FUNC1_WFRAMEBCHI, | |
2844 | NULL); | |
2845 | lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
2846 | SBSDIO_FUNC1_WFRAMEBCLO, | |
2847 | NULL); | |
2848 | bus->f1regdata += 2; | |
2849 | if (hi == 0 && lo == 0) | |
2850 | break; | |
2851 | } | |
2852 | return ret; | |
2853 | } | |
2854 | ||
2855 | bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; | |
2856 | ||
2857 | return ret; | |
2858 | } | |
2859 | ||
fcf094f4 | 2860 | static int |
47a1ce78 | 2861 | brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen) |
5b435de0 AS |
2862 | { |
2863 | u8 *frame; | |
2864 | u16 len; | |
2865 | u32 swheader; | |
2866 | uint retries = 0; | |
2867 | u8 doff = 0; | |
2868 | int ret = -1; | |
47a1ce78 FL |
2869 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
2870 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv; | |
2871 | struct brcmf_sdio *bus = sdiodev->bus; | |
5b435de0 AS |
2872 | |
2873 | brcmf_dbg(TRACE, "Enter\n"); | |
2874 | ||
2875 | /* Back the pointer to make a room for bus header */ | |
2876 | frame = msg - SDPCM_HDRLEN; | |
2877 | len = (msglen += SDPCM_HDRLEN); | |
2878 | ||
2879 | /* Add alignment padding (optional for ctl frames) */ | |
2880 | doff = ((unsigned long)frame % BRCMF_SDALIGN); | |
2881 | if (doff) { | |
2882 | frame -= doff; | |
2883 | len += doff; | |
2884 | msglen += doff; | |
2885 | memset(frame, 0, doff + SDPCM_HDRLEN); | |
2886 | } | |
2887 | /* precondition: doff < BRCMF_SDALIGN */ | |
2888 | doff += SDPCM_HDRLEN; | |
2889 | ||
2890 | /* Round send length to next SDIO block */ | |
2891 | if (bus->roundup && bus->blocksize && (len > bus->blocksize)) { | |
2892 | u16 pad = bus->blocksize - (len % bus->blocksize); | |
2893 | if ((pad <= bus->roundup) && (pad < bus->blocksize)) | |
2894 | len += pad; | |
2895 | } else if (len % BRCMF_SDALIGN) { | |
2896 | len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN); | |
2897 | } | |
2898 | ||
2899 | /* Satisfy length-alignment requirements */ | |
2900 | if (len & (ALIGNMENT - 1)) | |
2901 | len = roundup(len, ALIGNMENT); | |
2902 | ||
2903 | /* precondition: IS_ALIGNED((unsigned long)frame, 2) */ | |
2904 | ||
2905 | /* Need to lock here to protect txseq and SDIO tx calls */ | |
2906 | down(&bus->sdsem); | |
2907 | ||
2908 | bus_wake(bus); | |
2909 | ||
2910 | /* Make sure backplane clock is on */ | |
2911 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
2912 | ||
2913 | /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */ | |
2914 | *(__le16 *) frame = cpu_to_le16((u16) msglen); | |
2915 | *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen); | |
2916 | ||
2917 | /* Software tag: channel, sequence number, data offset */ | |
2918 | swheader = | |
2919 | ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) & | |
2920 | SDPCM_CHANNEL_MASK) | |
2921 | | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) & | |
2922 | SDPCM_DOFFSET_MASK); | |
2923 | put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN); | |
2924 | put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader)); | |
2925 | ||
2926 | if (!data_ok(bus)) { | |
2927 | brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n", | |
2928 | bus->tx_max, bus->tx_seq); | |
2929 | bus->ctrl_frame_stat = true; | |
2930 | /* Send from dpc */ | |
2931 | bus->ctrl_frame_buf = frame; | |
2932 | bus->ctrl_frame_len = len; | |
2933 | ||
2934 | brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat); | |
2935 | ||
2936 | if (bus->ctrl_frame_stat == false) { | |
2937 | brcmf_dbg(INFO, "ctrl_frame_stat == false\n"); | |
2938 | ret = 0; | |
2939 | } else { | |
2940 | brcmf_dbg(INFO, "ctrl_frame_stat == true\n"); | |
2941 | ret = -1; | |
2942 | } | |
2943 | } | |
2944 | ||
2945 | if (ret == -1) { | |
1e023829 JP |
2946 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(), |
2947 | frame, len, "Tx Frame:\n"); | |
2948 | brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) && | |
2949 | BRCMF_HDRS_ON(), | |
2950 | frame, min_t(u16, len, 16), "TxHdr:\n"); | |
5b435de0 AS |
2951 | |
2952 | do { | |
2953 | ret = brcmf_tx_frame(bus, frame, len); | |
2954 | } while (ret < 0 && retries++ < TXRETRIES); | |
2955 | } | |
2956 | ||
2957 | if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) { | |
2958 | bus->activity = false; | |
2959 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); | |
2960 | } | |
2961 | ||
2962 | up(&bus->sdsem); | |
2963 | ||
2964 | if (ret) | |
28a1a3bd | 2965 | bus->tx_ctlerrs++; |
5b435de0 | 2966 | else |
28a1a3bd | 2967 | bus->tx_ctlpkts++; |
5b435de0 AS |
2968 | |
2969 | return ret ? -EIO : 0; | |
2970 | } | |
2971 | ||
fcf094f4 | 2972 | static int |
532cdd3b | 2973 | brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen) |
5b435de0 AS |
2974 | { |
2975 | int timeleft; | |
2976 | uint rxlen = 0; | |
2977 | bool pending; | |
532cdd3b FL |
2978 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
2979 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv; | |
2980 | struct brcmf_sdio *bus = sdiodev->bus; | |
5b435de0 AS |
2981 | |
2982 | brcmf_dbg(TRACE, "Enter\n"); | |
2983 | ||
2984 | /* Wait until control frame is available */ | |
2985 | timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending); | |
2986 | ||
2987 | down(&bus->sdsem); | |
2988 | rxlen = bus->rxlen; | |
2989 | memcpy(msg, bus->rxctl, min(msglen, rxlen)); | |
2990 | bus->rxlen = 0; | |
2991 | up(&bus->sdsem); | |
2992 | ||
2993 | if (rxlen) { | |
2994 | brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n", | |
2995 | rxlen, msglen); | |
2996 | } else if (timeleft == 0) { | |
2997 | brcmf_dbg(ERROR, "resumed on timeout\n"); | |
2998 | } else if (pending == true) { | |
2999 | brcmf_dbg(CTL, "cancelled\n"); | |
3000 | return -ERESTARTSYS; | |
3001 | } else { | |
3002 | brcmf_dbg(CTL, "resumed for unknown reason?\n"); | |
3003 | } | |
3004 | ||
3005 | if (rxlen) | |
28a1a3bd | 3006 | bus->rx_ctlpkts++; |
5b435de0 | 3007 | else |
28a1a3bd | 3008 | bus->rx_ctlerrs++; |
5b435de0 AS |
3009 | |
3010 | return rxlen ? (int)rxlen : -ETIMEDOUT; | |
3011 | } | |
3012 | ||
e92eedf4 | 3013 | static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len) |
5b435de0 AS |
3014 | { |
3015 | int bcmerror = 0; | |
3016 | ||
3017 | brcmf_dbg(TRACE, "Enter\n"); | |
3018 | ||
3019 | /* Basic sanity checks */ | |
3fb1d8d2 | 3020 | if (bus->sdiodev->bus_if->drvr_up) { |
5b435de0 AS |
3021 | bcmerror = -EISCONN; |
3022 | goto err; | |
3023 | } | |
3024 | if (!len) { | |
3025 | bcmerror = -EOVERFLOW; | |
3026 | goto err; | |
3027 | } | |
3028 | ||
3029 | /* Free the old ones and replace with passed variables */ | |
3030 | kfree(bus->vars); | |
3031 | ||
3032 | bus->vars = kmalloc(len, GFP_ATOMIC); | |
3033 | bus->varsz = bus->vars ? len : 0; | |
3034 | if (bus->vars == NULL) { | |
3035 | bcmerror = -ENOMEM; | |
3036 | goto err; | |
3037 | } | |
3038 | ||
3039 | /* Copy the passed variables, which should include the | |
3040 | terminating double-null */ | |
3041 | memcpy(bus->vars, arg, bus->varsz); | |
3042 | err: | |
3043 | return bcmerror; | |
3044 | } | |
3045 | ||
e92eedf4 | 3046 | static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus) |
5b435de0 AS |
3047 | { |
3048 | int bcmerror = 0; | |
3049 | u32 varsize; | |
3050 | u32 varaddr; | |
3051 | u8 *vbuffer; | |
3052 | u32 varsizew; | |
3053 | __le32 varsizew_le; | |
8ae74654 | 3054 | #ifdef DEBUG |
5b435de0 | 3055 | char *nvram_ularray; |
8ae74654 | 3056 | #endif /* DEBUG */ |
5b435de0 AS |
3057 | |
3058 | /* Even if there are no vars are to be written, we still | |
3059 | need to set the ramsize. */ | |
3060 | varsize = bus->varsz ? roundup(bus->varsz, 4) : 0; | |
3061 | varaddr = (bus->ramsize - 4) - varsize; | |
3062 | ||
3063 | if (bus->vars) { | |
3064 | vbuffer = kzalloc(varsize, GFP_ATOMIC); | |
3065 | if (!vbuffer) | |
3066 | return -ENOMEM; | |
3067 | ||
3068 | memcpy(vbuffer, bus->vars, bus->varsz); | |
3069 | ||
3070 | /* Write the vars list */ | |
3071 | bcmerror = | |
3072 | brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize); | |
8ae74654 | 3073 | #ifdef DEBUG |
5b435de0 AS |
3074 | /* Verify NVRAM bytes */ |
3075 | brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize); | |
3076 | nvram_ularray = kmalloc(varsize, GFP_ATOMIC); | |
c40701ea JJ |
3077 | if (!nvram_ularray) { |
3078 | kfree(vbuffer); | |
5b435de0 | 3079 | return -ENOMEM; |
c40701ea | 3080 | } |
5b435de0 AS |
3081 | |
3082 | /* Upload image to verify downloaded contents. */ | |
3083 | memset(nvram_ularray, 0xaa, varsize); | |
3084 | ||
3085 | /* Read the vars list to temp buffer for comparison */ | |
3086 | bcmerror = | |
3087 | brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray, | |
3088 | varsize); | |
3089 | if (bcmerror) { | |
3090 | brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n", | |
3091 | bcmerror, varsize, varaddr); | |
3092 | } | |
3093 | /* Compare the org NVRAM with the one read from RAM */ | |
3094 | if (memcmp(vbuffer, nvram_ularray, varsize)) | |
3095 | brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n"); | |
3096 | else | |
3097 | brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n"); | |
3098 | ||
3099 | kfree(nvram_ularray); | |
8ae74654 | 3100 | #endif /* DEBUG */ |
5b435de0 AS |
3101 | |
3102 | kfree(vbuffer); | |
3103 | } | |
3104 | ||
3105 | /* adjust to the user specified RAM */ | |
3106 | brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize); | |
3107 | brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n", | |
3108 | varaddr, varsize); | |
3109 | varsize = ((bus->ramsize - 4) - varaddr); | |
3110 | ||
3111 | /* | |
3112 | * Determine the length token: | |
3113 | * Varsize, converted to words, in lower 16-bits, checksum | |
3114 | * in upper 16-bits. | |
3115 | */ | |
3116 | if (bcmerror) { | |
3117 | varsizew = 0; | |
3118 | varsizew_le = cpu_to_le32(0); | |
3119 | } else { | |
3120 | varsizew = varsize / 4; | |
3121 | varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF); | |
3122 | varsizew_le = cpu_to_le32(varsizew); | |
3123 | } | |
3124 | ||
3125 | brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n", | |
3126 | varsize, varsizew); | |
3127 | ||
3128 | /* Write the length token to the last word */ | |
3129 | bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4), | |
3130 | (u8 *)&varsizew_le, 4); | |
3131 | ||
3132 | return bcmerror; | |
3133 | } | |
3134 | ||
e92eedf4 | 3135 | static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter) |
5b435de0 AS |
3136 | { |
3137 | uint retries; | |
5b435de0 | 3138 | int bcmerror = 0; |
99ba15cd | 3139 | struct chip_info *ci = bus->ci; |
5b435de0 AS |
3140 | |
3141 | /* To enter download state, disable ARM and reset SOCRAM. | |
3142 | * To exit download state, simply reset ARM (default is RAM boot). | |
3143 | */ | |
3144 | if (enter) { | |
3145 | bus->alp_only = true; | |
3146 | ||
086a2e0a | 3147 | ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3); |
5b435de0 | 3148 | |
d77e70ff | 3149 | ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM); |
5b435de0 AS |
3150 | |
3151 | /* Clear the top bit of memory */ | |
3152 | if (bus->ramsize) { | |
3153 | u32 zeros = 0; | |
3154 | brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4, | |
3155 | (u8 *)&zeros, 4); | |
3156 | } | |
3157 | } else { | |
6ca687d9 | 3158 | if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) { |
5b435de0 AS |
3159 | brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n"); |
3160 | bcmerror = -EBADE; | |
3161 | goto fail; | |
3162 | } | |
3163 | ||
3164 | bcmerror = brcmf_sdbrcm_write_vars(bus); | |
3165 | if (bcmerror) { | |
3166 | brcmf_dbg(ERROR, "no vars written to RAM\n"); | |
3167 | bcmerror = 0; | |
3168 | } | |
3169 | ||
3170 | w_sdreg32(bus, 0xFFFFFFFF, | |
3171 | offsetof(struct sdpcmd_regs, intstatus), &retries); | |
3172 | ||
d77e70ff | 3173 | ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3); |
5b435de0 AS |
3174 | |
3175 | /* Allow HT Clock now that the ARM is running. */ | |
3176 | bus->alp_only = false; | |
3177 | ||
712ac5b3 | 3178 | bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD; |
5b435de0 AS |
3179 | } |
3180 | fail: | |
3181 | return bcmerror; | |
3182 | } | |
3183 | ||
e92eedf4 | 3184 | static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus) |
5b435de0 AS |
3185 | { |
3186 | if (bus->firmware->size < bus->fw_ptr + len) | |
3187 | len = bus->firmware->size - bus->fw_ptr; | |
3188 | ||
3189 | memcpy(buf, &bus->firmware->data[bus->fw_ptr], len); | |
3190 | bus->fw_ptr += len; | |
3191 | return len; | |
3192 | } | |
3193 | ||
e92eedf4 | 3194 | static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus) |
5b435de0 AS |
3195 | { |
3196 | int offset = 0; | |
3197 | uint len; | |
3198 | u8 *memblock = NULL, *memptr; | |
3199 | int ret; | |
3200 | ||
3201 | brcmf_dbg(INFO, "Enter\n"); | |
3202 | ||
8dd939ca | 3203 | ret = request_firmware(&bus->firmware, BRCMFMAC_FW_NAME, |
5b435de0 AS |
3204 | &bus->sdiodev->func[2]->dev); |
3205 | if (ret) { | |
3206 | brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret); | |
3207 | return ret; | |
3208 | } | |
3209 | bus->fw_ptr = 0; | |
3210 | ||
3211 | memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC); | |
3212 | if (memblock == NULL) { | |
3213 | ret = -ENOMEM; | |
3214 | goto err; | |
3215 | } | |
3216 | if ((u32)(unsigned long)memblock % BRCMF_SDALIGN) | |
3217 | memptr += (BRCMF_SDALIGN - | |
3218 | ((u32)(unsigned long)memblock % BRCMF_SDALIGN)); | |
3219 | ||
3220 | /* Download image */ | |
3221 | while ((len = | |
3222 | brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) { | |
3223 | ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len); | |
3224 | if (ret) { | |
3225 | brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n", | |
3226 | ret, MEMBLOCK, offset); | |
3227 | goto err; | |
3228 | } | |
3229 | ||
3230 | offset += MEMBLOCK; | |
3231 | } | |
3232 | ||
3233 | err: | |
3234 | kfree(memblock); | |
3235 | ||
3236 | release_firmware(bus->firmware); | |
3237 | bus->fw_ptr = 0; | |
3238 | ||
3239 | return ret; | |
3240 | } | |
3241 | ||
3242 | /* | |
3243 | * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file | |
3244 | * and ending in a NUL. | |
3245 | * Removes carriage returns, empty lines, comment lines, and converts | |
3246 | * newlines to NULs. | |
3247 | * Shortens buffer as needed and pads with NULs. End of buffer is marked | |
3248 | * by two NULs. | |
3249 | */ | |
3250 | ||
3251 | static uint brcmf_process_nvram_vars(char *varbuf, uint len) | |
3252 | { | |
3253 | char *dp; | |
3254 | bool findNewline; | |
3255 | int column; | |
3256 | uint buf_len, n; | |
3257 | ||
3258 | dp = varbuf; | |
3259 | ||
3260 | findNewline = false; | |
3261 | column = 0; | |
3262 | ||
3263 | for (n = 0; n < len; n++) { | |
3264 | if (varbuf[n] == 0) | |
3265 | break; | |
3266 | if (varbuf[n] == '\r') | |
3267 | continue; | |
3268 | if (findNewline && varbuf[n] != '\n') | |
3269 | continue; | |
3270 | findNewline = false; | |
3271 | if (varbuf[n] == '#') { | |
3272 | findNewline = true; | |
3273 | continue; | |
3274 | } | |
3275 | if (varbuf[n] == '\n') { | |
3276 | if (column == 0) | |
3277 | continue; | |
3278 | *dp++ = 0; | |
3279 | column = 0; | |
3280 | continue; | |
3281 | } | |
3282 | *dp++ = varbuf[n]; | |
3283 | column++; | |
3284 | } | |
3285 | buf_len = dp - varbuf; | |
3286 | ||
3287 | while (dp < varbuf + n) | |
3288 | *dp++ = 0; | |
3289 | ||
3290 | return buf_len; | |
3291 | } | |
3292 | ||
e92eedf4 | 3293 | static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus) |
5b435de0 AS |
3294 | { |
3295 | uint len; | |
3296 | char *memblock = NULL; | |
3297 | char *bufp; | |
3298 | int ret; | |
3299 | ||
8dd939ca | 3300 | ret = request_firmware(&bus->firmware, BRCMFMAC_NV_NAME, |
5b435de0 AS |
3301 | &bus->sdiodev->func[2]->dev); |
3302 | if (ret) { | |
3303 | brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret); | |
3304 | return ret; | |
3305 | } | |
3306 | bus->fw_ptr = 0; | |
3307 | ||
3308 | memblock = kmalloc(MEMBLOCK, GFP_ATOMIC); | |
3309 | if (memblock == NULL) { | |
3310 | ret = -ENOMEM; | |
3311 | goto err; | |
3312 | } | |
3313 | ||
3314 | len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus); | |
3315 | ||
3316 | if (len > 0 && len < MEMBLOCK) { | |
3317 | bufp = (char *)memblock; | |
3318 | bufp[len] = 0; | |
3319 | len = brcmf_process_nvram_vars(bufp, len); | |
3320 | bufp += len; | |
3321 | *bufp++ = 0; | |
3322 | if (len) | |
3323 | ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1); | |
3324 | if (ret) | |
3325 | brcmf_dbg(ERROR, "error downloading vars: %d\n", ret); | |
3326 | } else { | |
3327 | brcmf_dbg(ERROR, "error reading nvram file: %d\n", len); | |
3328 | ret = -EIO; | |
3329 | } | |
3330 | ||
3331 | err: | |
3332 | kfree(memblock); | |
3333 | ||
3334 | release_firmware(bus->firmware); | |
3335 | bus->fw_ptr = 0; | |
3336 | ||
3337 | return ret; | |
3338 | } | |
3339 | ||
e92eedf4 | 3340 | static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus) |
5b435de0 AS |
3341 | { |
3342 | int bcmerror = -1; | |
3343 | ||
3344 | /* Keep arm in reset */ | |
3345 | if (brcmf_sdbrcm_download_state(bus, true)) { | |
3346 | brcmf_dbg(ERROR, "error placing ARM core in reset\n"); | |
3347 | goto err; | |
3348 | } | |
3349 | ||
3350 | /* External image takes precedence if specified */ | |
3351 | if (brcmf_sdbrcm_download_code_file(bus)) { | |
3352 | brcmf_dbg(ERROR, "dongle image file download failed\n"); | |
3353 | goto err; | |
3354 | } | |
3355 | ||
3356 | /* External nvram takes precedence if specified */ | |
3357 | if (brcmf_sdbrcm_download_nvram(bus)) | |
3358 | brcmf_dbg(ERROR, "dongle nvram file download failed\n"); | |
3359 | ||
3360 | /* Take arm out of reset */ | |
3361 | if (brcmf_sdbrcm_download_state(bus, false)) { | |
3362 | brcmf_dbg(ERROR, "error getting out of ARM core reset\n"); | |
3363 | goto err; | |
3364 | } | |
3365 | ||
3366 | bcmerror = 0; | |
3367 | ||
3368 | err: | |
3369 | return bcmerror; | |
3370 | } | |
3371 | ||
3372 | static bool | |
e92eedf4 | 3373 | brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus) |
5b435de0 AS |
3374 | { |
3375 | bool ret; | |
3376 | ||
3377 | /* Download the firmware */ | |
3378 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3379 | ||
3380 | ret = _brcmf_sdbrcm_download_firmware(bus) == 0; | |
3381 | ||
3382 | brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); | |
3383 | ||
3384 | return ret; | |
3385 | } | |
3386 | ||
99a0b8ff | 3387 | static int brcmf_sdbrcm_bus_init(struct device *dev) |
5b435de0 | 3388 | { |
fa20b911 FL |
3389 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
3390 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv; | |
3391 | struct brcmf_sdio *bus = sdiodev->bus; | |
5b435de0 AS |
3392 | unsigned long timeout; |
3393 | uint retries = 0; | |
3394 | u8 ready, enable; | |
3395 | int err, ret = 0; | |
3396 | u8 saveclk; | |
3397 | ||
3398 | brcmf_dbg(TRACE, "Enter\n"); | |
3399 | ||
3400 | /* try to download image and nvram to the dongle */ | |
fa20b911 | 3401 | if (bus_if->state == BRCMF_BUS_DOWN) { |
5b435de0 AS |
3402 | if (!(brcmf_sdbrcm_download_firmware(bus))) |
3403 | return -1; | |
3404 | } | |
3405 | ||
712ac5b3 | 3406 | if (!bus->sdiodev->bus_if->drvr) |
5b435de0 AS |
3407 | return 0; |
3408 | ||
3409 | /* Start the watchdog timer */ | |
28a1a3bd | 3410 | bus->tickcnt = 0; |
5b435de0 AS |
3411 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); |
3412 | ||
3413 | down(&bus->sdsem); | |
3414 | ||
3415 | /* Make sure backplane clock is on, needed to generate F2 interrupt */ | |
3416 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3417 | if (bus->clkstate != CLK_AVAIL) | |
3418 | goto exit; | |
3419 | ||
3420 | /* Force clocks on backplane to be sure F2 interrupt propagates */ | |
3421 | saveclk = | |
3422 | brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
3423 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
3424 | if (!err) { | |
3425 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
3426 | SBSDIO_FUNC1_CHIPCLKCSR, | |
3427 | (saveclk | SBSDIO_FORCE_HT), &err); | |
3428 | } | |
3429 | if (err) { | |
3430 | brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err); | |
3431 | goto exit; | |
3432 | } | |
3433 | ||
3434 | /* Enable function 2 (frame transfers) */ | |
3435 | w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, | |
3436 | offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries); | |
3437 | enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2); | |
3438 | ||
3439 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx, | |
3440 | enable, NULL); | |
3441 | ||
3442 | timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY); | |
3443 | ready = 0; | |
3444 | while (enable != ready) { | |
3445 | ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0, | |
3446 | SDIO_CCCR_IORx, NULL); | |
3447 | if (time_after(jiffies, timeout)) | |
3448 | break; | |
3449 | else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50)) | |
3450 | /* prevent busy waiting if it takes too long */ | |
3451 | msleep_interruptible(20); | |
3452 | } | |
3453 | ||
3454 | brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready); | |
3455 | ||
3456 | /* If F2 successfully enabled, set core and enable interrupts */ | |
3457 | if (ready == enable) { | |
3458 | /* Set up the interrupt mask and enable interrupts */ | |
3459 | bus->hostintmask = HOSTINTMASK; | |
3460 | w_sdreg32(bus, bus->hostintmask, | |
3461 | offsetof(struct sdpcmd_regs, hostintmask), &retries); | |
3462 | ||
3463 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
3464 | SBSDIO_WATERMARK, 8, &err); | |
3465 | ||
3466 | /* Set bus state according to enable result */ | |
fa20b911 | 3467 | bus_if->state = BRCMF_BUS_DATA; |
5b435de0 AS |
3468 | } |
3469 | ||
3470 | else { | |
3471 | /* Disable F2 again */ | |
3472 | enable = SDIO_FUNC_ENABLE_1; | |
3473 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, | |
3474 | SDIO_CCCR_IOEx, enable, NULL); | |
3475 | } | |
3476 | ||
3477 | /* Restore previous clock setting */ | |
3478 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
3479 | SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err); | |
3480 | ||
3481 | /* If we didn't come up, turn off backplane clock */ | |
fa20b911 | 3482 | if (bus_if->state != BRCMF_BUS_DATA) |
5b435de0 AS |
3483 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); |
3484 | ||
3485 | exit: | |
3486 | up(&bus->sdsem); | |
3487 | ||
3488 | return ret; | |
3489 | } | |
3490 | ||
3491 | void brcmf_sdbrcm_isr(void *arg) | |
3492 | { | |
e92eedf4 | 3493 | struct brcmf_sdio *bus = (struct brcmf_sdio *) arg; |
5b435de0 AS |
3494 | |
3495 | brcmf_dbg(TRACE, "Enter\n"); | |
3496 | ||
3497 | if (!bus) { | |
3498 | brcmf_dbg(ERROR, "bus is null pointer, exiting\n"); | |
3499 | return; | |
3500 | } | |
3501 | ||
712ac5b3 | 3502 | if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) { |
5b435de0 AS |
3503 | brcmf_dbg(ERROR, "bus is down. we have nothing to do\n"); |
3504 | return; | |
3505 | } | |
3506 | /* Count the interrupt call */ | |
3507 | bus->intrcount++; | |
3508 | bus->ipend = true; | |
3509 | ||
3510 | /* Shouldn't get this interrupt if we're sleeping? */ | |
3511 | if (bus->sleeping) { | |
3512 | brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n"); | |
3513 | return; | |
3514 | } | |
3515 | ||
3516 | /* Disable additional interrupts (is this needed now)? */ | |
3517 | if (!bus->intr) | |
3518 | brcmf_dbg(ERROR, "isr w/o interrupt configured!\n"); | |
3519 | ||
3520 | bus->dpc_sched = true; | |
3521 | if (bus->dpc_tsk) | |
3522 | complete(&bus->dpc_wait); | |
3523 | } | |
3524 | ||
cad2b26b | 3525 | static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus) |
5b435de0 | 3526 | { |
8ae74654 | 3527 | #ifdef DEBUG |
cad2b26b | 3528 | struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev); |
8ae74654 | 3529 | #endif /* DEBUG */ |
5b435de0 AS |
3530 | |
3531 | brcmf_dbg(TIMER, "Enter\n"); | |
3532 | ||
5b435de0 AS |
3533 | /* Ignore the timer if simulating bus down */ |
3534 | if (bus->sleeping) | |
3535 | return false; | |
3536 | ||
3537 | down(&bus->sdsem); | |
3538 | ||
3539 | /* Poll period: check device if appropriate. */ | |
3540 | if (bus->poll && (++bus->polltick >= bus->pollrate)) { | |
3541 | u32 intstatus = 0; | |
3542 | ||
3543 | /* Reset poll tick */ | |
3544 | bus->polltick = 0; | |
3545 | ||
3546 | /* Check device if no interrupts */ | |
3547 | if (!bus->intr || (bus->intrcount == bus->lastintrs)) { | |
3548 | ||
3549 | if (!bus->dpc_sched) { | |
3550 | u8 devpend; | |
3551 | devpend = brcmf_sdcard_cfg_read(bus->sdiodev, | |
3552 | SDIO_FUNC_0, SDIO_CCCR_INTx, | |
3553 | NULL); | |
3554 | intstatus = | |
3555 | devpend & (INTR_STATUS_FUNC1 | | |
3556 | INTR_STATUS_FUNC2); | |
3557 | } | |
3558 | ||
3559 | /* If there is something, make like the ISR and | |
3560 | schedule the DPC */ | |
3561 | if (intstatus) { | |
3562 | bus->pollcnt++; | |
3563 | bus->ipend = true; | |
3564 | ||
3565 | bus->dpc_sched = true; | |
3566 | if (bus->dpc_tsk) | |
3567 | complete(&bus->dpc_wait); | |
3568 | } | |
3569 | } | |
3570 | ||
3571 | /* Update interrupt tracking */ | |
3572 | bus->lastintrs = bus->intrcount; | |
3573 | } | |
8ae74654 | 3574 | #ifdef DEBUG |
5b435de0 | 3575 | /* Poll for console output periodically */ |
cad2b26b | 3576 | if (bus_if->state == BRCMF_BUS_DATA && |
8d169aa0 | 3577 | bus->console_interval != 0) { |
5b435de0 AS |
3578 | bus->console.count += BRCMF_WD_POLL_MS; |
3579 | if (bus->console.count >= bus->console_interval) { | |
3580 | bus->console.count -= bus->console_interval; | |
3581 | /* Make sure backplane clock is on */ | |
3582 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3583 | if (brcmf_sdbrcm_readconsole(bus) < 0) | |
3584 | /* stop on error */ | |
3585 | bus->console_interval = 0; | |
3586 | } | |
3587 | } | |
8ae74654 | 3588 | #endif /* DEBUG */ |
5b435de0 AS |
3589 | |
3590 | /* On idle timeout clear activity flag and/or turn off clock */ | |
3591 | if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) { | |
3592 | if (++bus->idlecount >= bus->idletime) { | |
3593 | bus->idlecount = 0; | |
3594 | if (bus->activity) { | |
3595 | bus->activity = false; | |
3596 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
3597 | } else { | |
3598 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); | |
3599 | } | |
3600 | } | |
3601 | } | |
3602 | ||
3603 | up(&bus->sdsem); | |
3604 | ||
3605 | return bus->ipend; | |
3606 | } | |
3607 | ||
3608 | static bool brcmf_sdbrcm_chipmatch(u16 chipid) | |
3609 | { | |
3610 | if (chipid == BCM4329_CHIP_ID) | |
3611 | return true; | |
ce2d7d7e FL |
3612 | if (chipid == BCM4330_CHIP_ID) |
3613 | return true; | |
5b435de0 AS |
3614 | return false; |
3615 | } | |
3616 | ||
e92eedf4 | 3617 | static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus) |
5b435de0 AS |
3618 | { |
3619 | brcmf_dbg(TRACE, "Enter\n"); | |
3620 | ||
3621 | kfree(bus->rxbuf); | |
3622 | bus->rxctl = bus->rxbuf = NULL; | |
3623 | bus->rxlen = 0; | |
3624 | ||
3625 | kfree(bus->databuf); | |
3626 | bus->databuf = NULL; | |
3627 | } | |
3628 | ||
e92eedf4 | 3629 | static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus) |
5b435de0 AS |
3630 | { |
3631 | brcmf_dbg(TRACE, "Enter\n"); | |
3632 | ||
b01a6b3c | 3633 | if (bus->sdiodev->bus_if->maxctl) { |
5b435de0 | 3634 | bus->rxblen = |
b01a6b3c | 3635 | roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN), |
5b435de0 AS |
3636 | ALIGNMENT) + BRCMF_SDALIGN; |
3637 | bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC); | |
3638 | if (!(bus->rxbuf)) | |
3639 | goto fail; | |
3640 | } | |
3641 | ||
3642 | /* Allocate buffer to receive glomed packet */ | |
3643 | bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC); | |
3644 | if (!(bus->databuf)) { | |
3645 | /* release rxbuf which was already located as above */ | |
3646 | if (!bus->rxblen) | |
3647 | kfree(bus->rxbuf); | |
3648 | goto fail; | |
3649 | } | |
3650 | ||
3651 | /* Align the buffer */ | |
3652 | if ((unsigned long)bus->databuf % BRCMF_SDALIGN) | |
3653 | bus->dataptr = bus->databuf + (BRCMF_SDALIGN - | |
3654 | ((unsigned long)bus->databuf % BRCMF_SDALIGN)); | |
3655 | else | |
3656 | bus->dataptr = bus->databuf; | |
3657 | ||
3658 | return true; | |
3659 | ||
3660 | fail: | |
3661 | return false; | |
3662 | } | |
3663 | ||
5b435de0 | 3664 | static bool |
e92eedf4 | 3665 | brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva) |
5b435de0 AS |
3666 | { |
3667 | u8 clkctl = 0; | |
3668 | int err = 0; | |
3669 | int reg_addr; | |
3670 | u32 reg_val; | |
99ba15cd | 3671 | u8 idx; |
5b435de0 AS |
3672 | |
3673 | bus->alp_only = true; | |
3674 | ||
3675 | /* Return the window to backplane enumeration space for core access */ | |
3676 | if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE)) | |
3677 | brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n"); | |
3678 | ||
8ae74654 | 3679 | #ifdef DEBUG |
5b435de0 AS |
3680 | printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n", |
3681 | brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4)); | |
3682 | ||
8ae74654 | 3683 | #endif /* DEBUG */ |
5b435de0 AS |
3684 | |
3685 | /* | |
a97e4fc5 | 3686 | * Force PLL off until brcmf_sdio_chip_attach() |
5b435de0 AS |
3687 | * programs PLL control regs |
3688 | */ | |
3689 | ||
3690 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
3691 | SBSDIO_FUNC1_CHIPCLKCSR, | |
3692 | BRCMF_INIT_CLKCTL1, &err); | |
3693 | if (!err) | |
3694 | clkctl = | |
3695 | brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, | |
3696 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
3697 | ||
3698 | if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) { | |
3699 | brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n", | |
3700 | err, BRCMF_INIT_CLKCTL1, clkctl); | |
3701 | goto fail; | |
3702 | } | |
3703 | ||
a97e4fc5 FL |
3704 | if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) { |
3705 | brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n"); | |
5b435de0 AS |
3706 | goto fail; |
3707 | } | |
3708 | ||
3709 | if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) { | |
3710 | brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip); | |
3711 | goto fail; | |
3712 | } | |
3713 | ||
e12afb6c FL |
3714 | brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, |
3715 | SDIO_DRIVE_STRENGTH); | |
5b435de0 | 3716 | |
454d2a88 | 3717 | /* Get info on the SOCRAM cores... */ |
5b435de0 AS |
3718 | bus->ramsize = bus->ci->ramsize; |
3719 | if (!(bus->ramsize)) { | |
3720 | brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n"); | |
3721 | goto fail; | |
3722 | } | |
3723 | ||
3724 | /* Set core control so an SDIO reset does a backplane reset */ | |
99ba15cd FL |
3725 | idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); |
3726 | reg_addr = bus->ci->c_inf[idx].base + | |
5b435de0 AS |
3727 | offsetof(struct sdpcmd_regs, corecontrol); |
3728 | reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32)); | |
3729 | brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32), | |
3730 | reg_val | CC_BPRESEN); | |
3731 | ||
3732 | brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); | |
3733 | ||
3734 | /* Locate an appropriately-aligned portion of hdrbuf */ | |
3735 | bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], | |
3736 | BRCMF_SDALIGN); | |
3737 | ||
3738 | /* Set the poll and/or interrupt flags */ | |
3739 | bus->intr = true; | |
3740 | bus->poll = false; | |
3741 | if (bus->poll) | |
3742 | bus->pollrate = 1; | |
3743 | ||
3744 | return true; | |
3745 | ||
3746 | fail: | |
3747 | return false; | |
3748 | } | |
3749 | ||
e92eedf4 | 3750 | static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus) |
5b435de0 AS |
3751 | { |
3752 | brcmf_dbg(TRACE, "Enter\n"); | |
3753 | ||
3754 | /* Disable F2 to clear any intermediate frame state on the dongle */ | |
3755 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx, | |
3756 | SDIO_FUNC_ENABLE_1, NULL); | |
3757 | ||
712ac5b3 | 3758 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
3759 | bus->sleeping = false; |
3760 | bus->rxflow = false; | |
3761 | ||
3762 | /* Done with backplane-dependent accesses, can drop clock... */ | |
3763 | brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, | |
3764 | SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); | |
3765 | ||
3766 | /* ...and initialize clock/power states */ | |
3767 | bus->clkstate = CLK_SDONLY; | |
3768 | bus->idletime = BRCMF_IDLE_INTERVAL; | |
3769 | bus->idleclock = BRCMF_IDLE_ACTIVE; | |
3770 | ||
3771 | /* Query the F2 block size, set roundup accordingly */ | |
3772 | bus->blocksize = bus->sdiodev->func[2]->cur_blksize; | |
3773 | bus->roundup = min(max_roundup, bus->blocksize); | |
3774 | ||
3775 | /* bus module does not support packet chaining */ | |
3776 | bus->use_rxchain = false; | |
3777 | bus->sd_rxchain = false; | |
3778 | ||
3779 | return true; | |
3780 | } | |
3781 | ||
3782 | static int | |
3783 | brcmf_sdbrcm_watchdog_thread(void *data) | |
3784 | { | |
e92eedf4 | 3785 | struct brcmf_sdio *bus = (struct brcmf_sdio *)data; |
5b435de0 AS |
3786 | |
3787 | allow_signal(SIGTERM); | |
3788 | /* Run until signal received */ | |
3789 | while (1) { | |
3790 | if (kthread_should_stop()) | |
3791 | break; | |
3792 | if (!wait_for_completion_interruptible(&bus->watchdog_wait)) { | |
cad2b26b | 3793 | brcmf_sdbrcm_bus_watchdog(bus); |
5b435de0 | 3794 | /* Count the tick for reference */ |
28a1a3bd | 3795 | bus->tickcnt++; |
5b435de0 AS |
3796 | } else |
3797 | break; | |
3798 | } | |
3799 | return 0; | |
3800 | } | |
3801 | ||
3802 | static void | |
3803 | brcmf_sdbrcm_watchdog(unsigned long data) | |
3804 | { | |
e92eedf4 | 3805 | struct brcmf_sdio *bus = (struct brcmf_sdio *)data; |
5b435de0 AS |
3806 | |
3807 | if (bus->watchdog_tsk) { | |
3808 | complete(&bus->watchdog_wait); | |
3809 | /* Reschedule the watchdog */ | |
3810 | if (bus->wd_timer_valid) | |
3811 | mod_timer(&bus->timer, | |
3812 | jiffies + BRCMF_WD_POLL_MS * HZ / 1000); | |
3813 | } | |
3814 | } | |
3815 | ||
e92eedf4 | 3816 | static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus) |
5b435de0 AS |
3817 | { |
3818 | brcmf_dbg(TRACE, "Enter\n"); | |
3819 | ||
3820 | if (bus->ci) { | |
3821 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3822 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); | |
a8a6c045 | 3823 | brcmf_sdio_chip_detach(&bus->ci); |
5b435de0 AS |
3824 | if (bus->vars && bus->varsz) |
3825 | kfree(bus->vars); | |
3826 | bus->vars = NULL; | |
3827 | } | |
3828 | ||
3829 | brcmf_dbg(TRACE, "Disconnected\n"); | |
3830 | } | |
3831 | ||
3832 | /* Detach and free everything */ | |
e92eedf4 | 3833 | static void brcmf_sdbrcm_release(struct brcmf_sdio *bus) |
5b435de0 AS |
3834 | { |
3835 | brcmf_dbg(TRACE, "Enter\n"); | |
3836 | ||
3837 | if (bus) { | |
3838 | /* De-register interrupt handler */ | |
3839 | brcmf_sdcard_intr_dereg(bus->sdiodev); | |
3840 | ||
5f947ad9 FL |
3841 | if (bus->sdiodev->bus_if->drvr) { |
3842 | brcmf_detach(bus->sdiodev->dev); | |
5b435de0 | 3843 | brcmf_sdbrcm_release_dongle(bus); |
5b435de0 AS |
3844 | } |
3845 | ||
3846 | brcmf_sdbrcm_release_malloc(bus); | |
3847 | ||
3848 | kfree(bus); | |
3849 | } | |
3850 | ||
3851 | brcmf_dbg(TRACE, "Disconnected\n"); | |
3852 | } | |
3853 | ||
4175b88b | 3854 | void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev) |
5b435de0 AS |
3855 | { |
3856 | int ret; | |
e92eedf4 | 3857 | struct brcmf_sdio *bus; |
5b435de0 | 3858 | |
5b435de0 AS |
3859 | brcmf_dbg(TRACE, "Enter\n"); |
3860 | ||
3861 | /* We make an assumption about address window mappings: | |
3862 | * regsva == SI_ENUM_BASE*/ | |
3863 | ||
3864 | /* Allocate private bus interface state */ | |
e92eedf4 | 3865 | bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC); |
5b435de0 AS |
3866 | if (!bus) |
3867 | goto fail; | |
3868 | ||
3869 | bus->sdiodev = sdiodev; | |
3870 | sdiodev->bus = bus; | |
b83db862 | 3871 | skb_queue_head_init(&bus->glom); |
5b435de0 AS |
3872 | bus->txbound = BRCMF_TXBOUND; |
3873 | bus->rxbound = BRCMF_RXBOUND; | |
3874 | bus->txminmax = BRCMF_TXMINMAX; | |
3875 | bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1; | |
3876 | bus->usebufpool = false; /* Use bufpool if allocated, | |
3877 | else use locally malloced rxbuf */ | |
3878 | ||
3879 | /* attempt to attach to the dongle */ | |
3880 | if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) { | |
3881 | brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n"); | |
3882 | goto fail; | |
3883 | } | |
3884 | ||
3885 | spin_lock_init(&bus->txqlock); | |
3886 | init_waitqueue_head(&bus->ctrl_wait); | |
3887 | init_waitqueue_head(&bus->dcmd_resp_wait); | |
3888 | ||
3889 | /* Set up the watchdog timer */ | |
3890 | init_timer(&bus->timer); | |
3891 | bus->timer.data = (unsigned long)bus; | |
3892 | bus->timer.function = brcmf_sdbrcm_watchdog; | |
3893 | ||
3894 | /* Initialize thread based operation and lock */ | |
3895 | sema_init(&bus->sdsem, 1); | |
3896 | ||
3897 | /* Initialize watchdog thread */ | |
3898 | init_completion(&bus->watchdog_wait); | |
3899 | bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread, | |
3900 | bus, "brcmf_watchdog"); | |
3901 | if (IS_ERR(bus->watchdog_tsk)) { | |
3902 | printk(KERN_WARNING | |
3903 | "brcmf_watchdog thread failed to start\n"); | |
3904 | bus->watchdog_tsk = NULL; | |
3905 | } | |
3906 | /* Initialize DPC thread */ | |
3907 | init_completion(&bus->dpc_wait); | |
3908 | bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread, | |
3909 | bus, "brcmf_dpc"); | |
3910 | if (IS_ERR(bus->dpc_tsk)) { | |
3911 | printk(KERN_WARNING | |
3912 | "brcmf_dpc thread failed to start\n"); | |
3913 | bus->dpc_tsk = NULL; | |
3914 | } | |
3915 | ||
a9ffda88 FL |
3916 | /* Assign bus interface call back */ |
3917 | bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop; | |
99a0b8ff | 3918 | bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init; |
b9692d17 | 3919 | bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata; |
fcf094f4 FL |
3920 | bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl; |
3921 | bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl; | |
5b435de0 | 3922 | /* Attach to the brcmf/OS/network interface */ |
2447ffb0 | 3923 | ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev); |
712ac5b3 | 3924 | if (ret != 0) { |
5b435de0 AS |
3925 | brcmf_dbg(ERROR, "brcmf_attach failed\n"); |
3926 | goto fail; | |
3927 | } | |
3928 | ||
3929 | /* Allocate buffers */ | |
3930 | if (!(brcmf_sdbrcm_probe_malloc(bus))) { | |
3931 | brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n"); | |
3932 | goto fail; | |
3933 | } | |
3934 | ||
3935 | if (!(brcmf_sdbrcm_probe_init(bus))) { | |
3936 | brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n"); | |
3937 | goto fail; | |
3938 | } | |
3939 | ||
3940 | /* Register interrupt callback, but mask it (not operational yet). */ | |
3941 | brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n"); | |
3942 | ret = brcmf_sdcard_intr_reg(bus->sdiodev); | |
3943 | if (ret != 0) { | |
3944 | brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret); | |
3945 | goto fail; | |
3946 | } | |
3947 | brcmf_dbg(INTR, "registered SDIO interrupt function ok\n"); | |
3948 | ||
3949 | brcmf_dbg(INFO, "completed!!\n"); | |
3950 | ||
3951 | /* if firmware path present try to download and bring up bus */ | |
ed683c98 | 3952 | ret = brcmf_bus_start(bus->sdiodev->dev); |
5b435de0 AS |
3953 | if (ret != 0) { |
3954 | if (ret == -ENOLINK) { | |
3955 | brcmf_dbg(ERROR, "dongle is not responding\n"); | |
3956 | goto fail; | |
3957 | } | |
3958 | } | |
15d45b6f FL |
3959 | |
3960 | /* add interface and open for business */ | |
55a63bcc | 3961 | if (brcmf_add_if(bus->sdiodev->dev, 0, "wlan%d", NULL)) { |
15d45b6f | 3962 | brcmf_dbg(ERROR, "Add primary net device interface failed!!\n"); |
5b435de0 AS |
3963 | goto fail; |
3964 | } | |
3965 | ||
3966 | return bus; | |
3967 | ||
3968 | fail: | |
3969 | brcmf_sdbrcm_release(bus); | |
3970 | return NULL; | |
3971 | } | |
3972 | ||
3973 | void brcmf_sdbrcm_disconnect(void *ptr) | |
3974 | { | |
e92eedf4 | 3975 | struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr; |
5b435de0 AS |
3976 | |
3977 | brcmf_dbg(TRACE, "Enter\n"); | |
3978 | ||
3979 | if (bus) | |
3980 | brcmf_sdbrcm_release(bus); | |
3981 | ||
3982 | brcmf_dbg(TRACE, "Disconnected\n"); | |
3983 | } | |
3984 | ||
5b435de0 | 3985 | void |
e92eedf4 | 3986 | brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick) |
5b435de0 | 3987 | { |
5b435de0 AS |
3988 | /* Totally stop the timer */ |
3989 | if (!wdtick && bus->wd_timer_valid == true) { | |
3990 | del_timer_sync(&bus->timer); | |
3991 | bus->wd_timer_valid = false; | |
3992 | bus->save_ms = wdtick; | |
3993 | return; | |
3994 | } | |
3995 | ||
ece960ea | 3996 | /* don't start the wd until fw is loaded */ |
712ac5b3 | 3997 | if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) |
ece960ea FL |
3998 | return; |
3999 | ||
5b435de0 AS |
4000 | if (wdtick) { |
4001 | if (bus->save_ms != BRCMF_WD_POLL_MS) { | |
4002 | if (bus->wd_timer_valid == true) | |
4003 | /* Stop timer and restart at new value */ | |
4004 | del_timer_sync(&bus->timer); | |
4005 | ||
4006 | /* Create timer again when watchdog period is | |
4007 | dynamically changed or in the first instance | |
4008 | */ | |
4009 | bus->timer.expires = | |
4010 | jiffies + BRCMF_WD_POLL_MS * HZ / 1000; | |
4011 | add_timer(&bus->timer); | |
4012 | ||
4013 | } else { | |
4014 | /* Re arm the timer, at last watchdog period */ | |
4015 | mod_timer(&bus->timer, | |
4016 | jiffies + BRCMF_WD_POLL_MS * HZ / 1000); | |
4017 | } | |
4018 | ||
4019 | bus->wd_timer_valid = true; | |
4020 | bus->save_ms = wdtick; | |
4021 | } | |
4022 | } |