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5b435de0 AS |
1 | /* |
2 | * Copyright (c) 2010 Broadcom Corporation | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
11 | * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION | |
13 | * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN | |
14 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef _BRCM_MAIN_H_ | |
18 | #define _BRCM_MAIN_H_ | |
19 | ||
20 | #include <linux/etherdevice.h> | |
21 | ||
22 | #include <brcmu_utils.h> | |
23 | #include "types.h" | |
24 | #include "d11.h" | |
25 | #include "scb.h" | |
26 | ||
27 | #define INVCHANNEL 255 /* invalid channel */ | |
28 | ||
29 | /* max # brcms_c_module_register() calls */ | |
30 | #define BRCMS_MAXMODULES 22 | |
31 | ||
32 | #define SEQNUM_SHIFT 4 | |
33 | #define SEQNUM_MAX 0x1000 | |
34 | ||
35 | #define NTXRATE 64 /* # tx MPDUs rate is reported for */ | |
36 | ||
37 | /* Maximum wait time for a MAC suspend */ | |
38 | /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */ | |
39 | #define BRCMS_MAX_MAC_SUSPEND 83000 | |
40 | ||
41 | /* responses for probe requests older that this are tossed, zero to disable */ | |
42 | #define BRCMS_PRB_RESP_TIMEOUT 0 /* Disable probe response timeout */ | |
43 | ||
44 | /* transmit buffer max headroom for protocol headers */ | |
45 | #define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN) | |
46 | ||
5b435de0 AS |
47 | /* Macros for doing definition and get/set of bitfields |
48 | * Usage example, e.g. a three-bit field (bits 4-6): | |
49 | * #define <NAME>_M BITFIELD_MASK(3) | |
50 | * #define <NAME>_S 4 | |
51 | * ... | |
52 | * regval = R_REG(osh, ®s->regfoo); | |
53 | * field = GFIELD(regval, <NAME>); | |
54 | * regval = SFIELD(regval, <NAME>, 1); | |
55 | * W_REG(osh, ®s->regfoo, regval); | |
56 | */ | |
57 | #define BITFIELD_MASK(width) \ | |
58 | (((unsigned)1 << (width)) - 1) | |
59 | #define GFIELD(val, field) \ | |
60 | (((val) >> field ## _S) & field ## _M) | |
61 | #define SFIELD(val, field, bits) \ | |
62 | (((val) & (~(field ## _M << field ## _S))) | \ | |
63 | ((unsigned)(bits) << field ## _S)) | |
64 | ||
65 | #define SW_TIMER_MAC_STAT_UPD 30 /* periodic MAC stats update */ | |
66 | ||
67 | /* max # supported core revisions (0 .. MAXCOREREV - 1) */ | |
68 | #define MAXCOREREV 28 | |
69 | ||
70 | /* Double check that unsupported cores are not enabled */ | |
71 | #if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV) | |
72 | #error "Configuration for D11CONF includes unsupported versions." | |
73 | #endif /* Bad versions */ | |
74 | ||
75 | /* values for shortslot_override */ | |
76 | #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ | |
77 | #define BRCMS_SHORTSLOT_OFF 0 /* Turn off short slot */ | |
78 | #define BRCMS_SHORTSLOT_ON 1 /* Turn on short slot */ | |
79 | ||
80 | /* value for short/long and mixmode/greenfield preamble */ | |
81 | #define BRCMS_LONG_PREAMBLE (0) | |
82 | #define BRCMS_SHORT_PREAMBLE (1 << 0) | |
83 | #define BRCMS_GF_PREAMBLE (1 << 1) | |
84 | #define BRCMS_MM_PREAMBLE (1 << 2) | |
85 | #define BRCMS_IS_MIMO_PREAMBLE(_pre) (((_pre) == BRCMS_GF_PREAMBLE) || \ | |
86 | ((_pre) == BRCMS_MM_PREAMBLE)) | |
87 | ||
88 | /* TxFrameID */ | |
89 | /* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */ | |
90 | /* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */ | |
91 | #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */ | |
92 | #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */ | |
93 | #define TXFID_SEQ_SHIFT 5 /* Number of bit shifts */ | |
94 | #define TXFID_RATE_PROBE_MASK 0x8000 /* Bit 15 for rate probe */ | |
95 | #define TXFID_RATE_MASK 0x0018 /* Mask for bits 3 and 4 */ | |
96 | #define TXFID_RATE_SHIFT 3 /* Shift 3 bits for rate mask */ | |
97 | ||
98 | /* promote boardrev */ | |
99 | #define BOARDREV_PROMOTABLE 0xFF /* from */ | |
100 | #define BOARDREV_PROMOTED 1 /* to */ | |
101 | ||
102 | #define DATA_BLOCK_TX_SUPR (1 << 4) | |
103 | ||
104 | /* 802.1D Priority to TX FIFO number for wme */ | |
105 | extern const u8 prio2fifo[]; | |
106 | ||
107 | /* Ucode MCTL_WAKE override bits */ | |
108 | #define BRCMS_WAKE_OVERRIDE_CLKCTL 0x01 | |
109 | #define BRCMS_WAKE_OVERRIDE_PHYREG 0x02 | |
110 | #define BRCMS_WAKE_OVERRIDE_MACSUSPEND 0x04 | |
111 | #define BRCMS_WAKE_OVERRIDE_TXFIFO 0x08 | |
112 | #define BRCMS_WAKE_OVERRIDE_FORCEFAST 0x10 | |
113 | ||
114 | /* stuff pulled in from wlc.c */ | |
115 | ||
116 | /* Interrupt bit error summary. Don't include I_RU: we refill DMA at other | |
117 | * times; and if we run out, constant I_RU interrupts may cause lockup. We | |
118 | * will still get error counts from rx0ovfl. | |
119 | */ | |
120 | #define I_ERRORS (I_PC | I_PD | I_DE | I_RO | I_XU) | |
121 | /* default software intmasks */ | |
122 | #define DEF_RXINTMASK (I_RI) /* enable rx int on rxfifo only */ | |
123 | #define DEF_MACINTMASK (MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \ | |
124 | MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \ | |
125 | MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP) | |
126 | ||
127 | #define MAXTXPKTS 6 /* max # pkts pending */ | |
128 | ||
129 | /* frameburst */ | |
130 | #define MAXTXFRAMEBURST 8 /* vanilla xpress mode: max frames/burst */ | |
131 | #define MAXFRAMEBURST_TXOP 10000 /* Frameburst TXOP in usec */ | |
132 | ||
133 | #define NFIFO 6 /* # tx/rx fifopairs */ | |
134 | ||
135 | /* PLL requests */ | |
136 | ||
137 | /* pll is shared on old chips */ | |
138 | #define BRCMS_PLLREQ_SHARED 0x1 | |
139 | /* hold pll for radio monitor register checking */ | |
140 | #define BRCMS_PLLREQ_RADIO_MON 0x2 | |
141 | /* hold/release pll for some short operation */ | |
142 | #define BRCMS_PLLREQ_FLIP 0x4 | |
143 | ||
144 | #define CHANNEL_BANDUNIT(wlc, ch) \ | |
145 | (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX) | |
146 | ||
147 | #define OTHERBANDUNIT(wlc) \ | |
148 | ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX)) | |
149 | ||
150 | /* | |
151 | * 802.11 protection information | |
152 | * | |
153 | * _g: use g spec protection, driver internal. | |
154 | * g_override: override for use of g spec protection. | |
155 | * gmode_user: user config gmode, operating band->gmode is different. | |
156 | * overlap: Overlap BSS/IBSS protection for both 11g and 11n. | |
157 | * nmode_user: user config nmode, operating pub->nmode is different. | |
158 | * n_cfg: use OFDM protection on MIMO frames. | |
159 | * n_cfg_override: override for use of N protection. | |
160 | * nongf: non-GF present protection. | |
161 | * nongf_override: override for use of GF protection. | |
162 | * n_pam_override: override for preamble: MM or GF. | |
163 | * n_obss: indicated OBSS Non-HT STA present. | |
164 | */ | |
165 | struct brcms_protection { | |
166 | bool _g; | |
167 | s8 g_override; | |
168 | u8 gmode_user; | |
169 | s8 overlap; | |
170 | s8 nmode_user; | |
171 | s8 n_cfg; | |
172 | s8 n_cfg_override; | |
173 | bool nongf; | |
174 | s8 nongf_override; | |
175 | s8 n_pam_override; | |
176 | bool n_obss; | |
177 | }; | |
178 | ||
179 | /* | |
180 | * anything affecting the single/dual streams/antenna operation | |
181 | * | |
182 | * hw_txchain: HW txchain bitmap cfg. | |
183 | * txchain: txchain bitmap being used. | |
184 | * txstreams: number of txchains being used. | |
185 | * hw_rxchain: HW rxchain bitmap cfg. | |
186 | * rxchain: rxchain bitmap being used. | |
187 | * rxstreams: number of rxchains being used. | |
188 | * ant_rx_ovr: rx antenna override. | |
189 | * txant: userTx antenna setting. | |
190 | * phytxant: phyTx antenna setting in txheader. | |
191 | * ss_opmode: singlestream Operational mode, 0:siso; 1:cdd. | |
192 | * ss_algosel_auto: if true, use wlc->stf->ss_algo_channel; | |
193 | * else use wlc->band->stf->ss_mode_band. | |
194 | * ss_algo_channel: ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC. | |
195 | * rxchain_restore_delay: delay time to restore default rxchain. | |
196 | * ldpc: AUTO/ON/OFF ldpc cap supported. | |
197 | * txcore[MAX_STREAMS_SUPPORTED + 1]: bitmap of selected core for each Nsts. | |
198 | * spatial_policy: | |
199 | */ | |
200 | struct brcms_stf { | |
201 | u8 hw_txchain; | |
202 | u8 txchain; | |
203 | u8 txstreams; | |
204 | u8 hw_rxchain; | |
205 | u8 rxchain; | |
206 | u8 rxstreams; | |
207 | u8 ant_rx_ovr; | |
208 | s8 txant; | |
209 | u16 phytxant; | |
210 | u8 ss_opmode; | |
211 | bool ss_algosel_auto; | |
212 | u16 ss_algo_channel; | |
213 | u8 rxchain_restore_delay; | |
214 | s8 ldpc; | |
215 | u8 txcore[MAX_STREAMS_SUPPORTED + 1]; | |
216 | s8 spatial_policy; | |
217 | }; | |
218 | ||
219 | #define BRCMS_STF_SS_STBC_TX(wlc, scb) \ | |
220 | (((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) \ | |
221 | || (((scb)->flags & SCB_STBCCAP) && \ | |
222 | (wlc)->band->band_stf_stbc_tx == AUTO && \ | |
223 | isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC)))) | |
224 | ||
225 | #define BRCMS_STBC_CAP_PHY(wlc) (BRCMS_ISNPHY(wlc->band) && \ | |
226 | NREV_GE(wlc->band->phyrev, 3)) | |
227 | ||
228 | #define BRCMS_SGI_CAP_PHY(wlc) ((BRCMS_ISNPHY(wlc->band) && \ | |
229 | NREV_GE(wlc->band->phyrev, 3)) || \ | |
230 | BRCMS_ISLCNPHY(wlc->band)) | |
231 | ||
232 | #define BRCMS_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) \ | |
233 | >> RXS_CHAN_PHYTYPE_SHIFT) | |
234 | #define BRCMS_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) \ | |
235 | >> RXS_CHAN_ID_SHIFT) | |
236 | ||
237 | /* | |
238 | * core state (mac) | |
239 | */ | |
240 | struct brcms_core { | |
241 | uint coreidx; /* # sb enumerated core */ | |
242 | ||
243 | /* fifo */ | |
244 | uint *txavail[NFIFO]; /* # tx descriptors available */ | |
245 | s16 txpktpend[NFIFO]; /* tx admission control */ | |
246 | ||
247 | struct macstat *macstat_snapshot; /* mac hw prev read values */ | |
248 | }; | |
249 | ||
250 | /* | |
251 | * band state (phy+ana+radio) | |
252 | */ | |
253 | struct brcms_band { | |
254 | int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */ | |
255 | uint bandunit; /* bandstate[] index */ | |
256 | ||
257 | u16 phytype; /* phytype */ | |
258 | u16 phyrev; | |
259 | u16 radioid; | |
260 | u16 radiorev; | |
261 | struct brcms_phy_pub *pi; /* pointer to phy specific information */ | |
262 | bool abgphy_encore; | |
263 | ||
264 | u8 gmode; /* currently active gmode */ | |
265 | ||
266 | struct scb *hwrs_scb; /* permanent scb for hw rateset */ | |
267 | ||
268 | /* band-specific copy of default_bss.rateset */ | |
269 | struct brcms_c_rateset defrateset; | |
270 | ||
271 | u8 band_stf_ss_mode; /* Configured STF type, 0:siso; 1:cdd */ | |
272 | s8 band_stf_stbc_tx; /* STBC TX 0:off; 1:force on; -1:auto */ | |
273 | /* rates supported by chip (phy-specific) */ | |
274 | struct brcms_c_rateset hw_rateset; | |
275 | u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */ | |
276 | bool mimo_cap_40; /* 40 MHz cap enabled on this band */ | |
277 | s8 antgain; /* antenna gain from srom */ | |
278 | ||
279 | u16 CWmin; /* minimum size of contention window, in unit of aSlotTime */ | |
280 | u16 CWmax; /* maximum size of contention window, in unit of aSlotTime */ | |
281 | struct ieee80211_supported_band band; | |
282 | }; | |
283 | ||
284 | /* module control blocks */ | |
285 | struct modulecb { | |
286 | /* module name : NULL indicates empty array member */ | |
287 | char name[32]; | |
288 | /* handle passed when handler 'doiovar' is called */ | |
289 | struct brcms_info *hdl; | |
290 | ||
291 | int (*down_fn)(void *handle); /* down handler. Note: the int returned | |
292 | * by the down function is a count of the | |
293 | * number of timers that could not be | |
294 | * freed. | |
295 | */ | |
296 | ||
297 | }; | |
298 | ||
299 | struct brcms_hw_band { | |
300 | int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */ | |
301 | uint bandunit; /* bandstate[] index */ | |
302 | u16 mhfs[MHFMAX]; /* MHF array shadow */ | |
303 | u8 bandhw_stf_ss_mode; /* HW configured STF type, 0:siso; 1:cdd */ | |
304 | u16 CWmin; | |
305 | u16 CWmax; | |
306 | u32 core_flags; | |
307 | ||
308 | u16 phytype; /* phytype */ | |
309 | u16 phyrev; | |
310 | u16 radioid; | |
311 | u16 radiorev; | |
312 | struct brcms_phy_pub *pi; /* pointer to phy specific information */ | |
313 | bool abgphy_encore; | |
314 | }; | |
315 | ||
316 | struct brcms_hardware { | |
317 | bool _piomode; /* true if pio mode */ | |
318 | struct brcms_c_info *wlc; | |
319 | ||
320 | /* fifo */ | |
321 | struct dma_pub *di[NFIFO]; /* dma handles, per fifo */ | |
322 | ||
323 | uint unit; /* device instance number */ | |
324 | ||
325 | /* version info */ | |
326 | u16 vendorid; /* PCI vendor id */ | |
327 | u16 deviceid; /* PCI device id */ | |
328 | uint corerev; /* core revision */ | |
329 | u8 sromrev; /* version # of the srom */ | |
330 | u16 boardrev; /* version # of particular board */ | |
331 | u32 boardflags; /* Board specific flags from srom */ | |
332 | u32 boardflags2; /* More board flags if sromrev >= 4 */ | |
333 | u32 machwcap; /* MAC capabilities */ | |
334 | u32 machwcap_backup; /* backup of machwcap */ | |
335 | ||
336 | struct si_pub *sih; /* SI handle (cookie for siutils calls) */ | |
16d2812e | 337 | struct bcma_device *d11core; /* pointer to 802.11 core */ |
5b435de0 AS |
338 | struct phy_shim_info *physhim; /* phy shim layer handler */ |
339 | struct shared_phy *phy_sh; /* pointer to shared phy state */ | |
340 | struct brcms_hw_band *band;/* pointer to active per-band state */ | |
341 | /* band state per phy/radio */ | |
342 | struct brcms_hw_band *bandstate[MAXBANDS]; | |
343 | u16 bmac_phytxant; /* cache of high phytxant state */ | |
344 | bool shortslot; /* currently using 11g ShortSlot timing */ | |
345 | u16 SRL; /* 802.11 dot11ShortRetryLimit */ | |
346 | u16 LRL; /* 802.11 dot11LongRetryLimit */ | |
347 | u16 SFBL; /* Short Frame Rate Fallback Limit */ | |
348 | u16 LFBL; /* Long Frame Rate Fallback Limit */ | |
349 | ||
350 | bool up; /* d11 hardware up and running */ | |
351 | uint now; /* # elapsed seconds */ | |
352 | uint _nbands; /* # bands supported */ | |
353 | u16 chanspec; /* bmac chanspec shadow */ | |
354 | ||
355 | uint *txavail[NFIFO]; /* # tx descriptors available */ | |
356 | const u16 *xmtfifo_sz; /* fifo size in 256B for each xmt fifo */ | |
357 | ||
358 | u32 pllreq; /* pll requests to keep PLL on */ | |
359 | ||
360 | u8 suspended_fifos; /* Which TX fifo to remain awake for */ | |
361 | u32 maccontrol; /* Cached value of maccontrol */ | |
362 | uint mac_suspend_depth; /* current depth of mac_suspend levels */ | |
363 | u32 wake_override; /* bit flags to force MAC to WAKE mode */ | |
364 | u32 mute_override; /* Prevent ucode from sending beacons */ | |
365 | u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */ | |
366 | bool noreset; /* true= do not reset hw, used by WLC_OUT */ | |
367 | bool forcefastclk; /* true if h/w is forcing to use fast clk */ | |
368 | bool clk; /* core is out of reset and has clock */ | |
369 | bool sbclk; /* sb has clock */ | |
370 | bool phyclk; /* phy is out of reset and has clock */ | |
371 | ||
372 | bool ucode_loaded; /* true after ucode downloaded */ | |
373 | ||
374 | ||
375 | u8 hw_stf_ss_opmode; /* STF single stream operation mode */ | |
376 | u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic | |
377 | * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board | |
378 | */ | |
379 | u32 antsel_avail; /* | |
380 | * put struct antsel_info here if more info is | |
381 | * needed | |
382 | */ | |
383 | }; | |
384 | ||
385 | /* TX Queue information | |
386 | * | |
387 | * Each flow of traffic out of the device has a TX Queue with independent | |
388 | * flow control. Several interfaces may be associated with a single TX Queue | |
389 | * if they belong to the same flow of traffic from the device. For multi-channel | |
390 | * operation there are independent TX Queues for each channel. | |
391 | */ | |
392 | struct brcms_txq_info { | |
393 | struct brcms_txq_info *next; | |
394 | struct pktq q; | |
395 | uint stopped; /* tx flow control bits */ | |
396 | }; | |
397 | ||
398 | /* | |
399 | * Principal common driver data structure. | |
400 | * | |
401 | * pub: pointer to driver public state. | |
402 | * wl: pointer to specific private state. | |
5b435de0 AS |
403 | * hw: HW related state. |
404 | * clkreq_override: setting for clkreq for PCIE : Auto, 0, 1. | |
405 | * fastpwrup_dly: time in us needed to bring up d11 fast clock. | |
406 | * macintstatus: bit channel between isr and dpc. | |
407 | * macintmask: sw runtime master macintmask value. | |
408 | * defmacintmask: default "on" macintmask value. | |
409 | * clk: core is out of reset and has clock. | |
410 | * core: pointer to active io core. | |
411 | * band: pointer to active per-band state. | |
412 | * corestate: per-core state (one per hw core). | |
413 | * bandstate: per-band state (one per phy/radio). | |
414 | * qvalid: DirFrmQValid and BcMcFrmQValid. | |
415 | * ampdu: ampdu module handler. | |
416 | * asi: antsel module handler. | |
417 | * cmi: channel manager module handler. | |
418 | * vendorid: PCI vendor id. | |
419 | * deviceid: PCI device id. | |
420 | * ucode_rev: microcode revision. | |
421 | * machwcap: MAC capabilities, BMAC shadow. | |
422 | * perm_etheraddr: original sprom local ethernet address. | |
423 | * bandlocked: disable auto multi-band switching. | |
424 | * bandinit_pending: track band init in auto band. | |
425 | * radio_monitor: radio timer is running. | |
426 | * going_down: down path intermediate variable. | |
5b435de0 AS |
427 | * wdtimer: timer for watchdog routine. |
428 | * radio_timer: timer for hw radio button monitor routine. | |
429 | * monitor: monitor (MPDU sniffing) mode. | |
430 | * bcnmisc_monitor: bcns promisc mode override for monitor. | |
431 | * _rifs: enable per-packet rifs. | |
432 | * bcn_li_bcn: beacon listen interval in # beacons. | |
433 | * bcn_li_dtim: beacon listen interval in # dtims. | |
434 | * WDarmed: watchdog timer is armed. | |
435 | * WDlast: last time wlc_watchdog() was called. | |
b7eec423 | 436 | * edcf_txop[IEEE80211_NUM_ACS]: current txop for each ac. |
5b435de0 AS |
437 | * wme_retries: per-AC retry limits. |
438 | * tx_prec_map: Precedence map based on HW FIFO space. | |
439 | * fifo2prec_map[NFIFO]: pointer to fifo2_prec map based on WME. | |
440 | * bsscfg: set of BSS configurations, idx 0 is default and always valid. | |
441 | * cfg: the primary bsscfg (can be AP or STA). | |
442 | * tx_queues: common TX Queue list. | |
443 | * modulecb: | |
444 | * mimoft: SIGN or 11N. | |
445 | * cck_40txbw: 11N, cck tx b/w override when in 40MHZ mode. | |
446 | * ofdm_40txbw: 11N, ofdm tx b/w override when in 40MHZ mode. | |
447 | * mimo_40txbw: 11N, mimo tx b/w override when in 40MHZ mode. | |
448 | * default_bss: configured BSS parameters. | |
449 | * mc_fid_counter: BC/MC FIFO frame ID counter. | |
450 | * country_default: saved country for leaving 802.11d auto-country mode. | |
451 | * autocountry_default: initial country for 802.11d auto-country mode. | |
452 | * prb_resp_timeout: do not send prb resp if request older | |
453 | * than this, 0 = disable. | |
454 | * home_chanspec: shared home chanspec. | |
455 | * chanspec: target operational channel. | |
456 | * usr_fragthresh: user configured fragmentation threshold. | |
457 | * fragthresh[NFIFO]: per-fifo fragmentation thresholds. | |
458 | * RTSThresh: 802.11 dot11RTSThreshold. | |
459 | * SRL: 802.11 dot11ShortRetryLimit. | |
460 | * LRL: 802.11 dot11LongRetryLimit. | |
461 | * SFBL: Short Frame Rate Fallback Limit. | |
462 | * LFBL: Long Frame Rate Fallback Limit. | |
463 | * shortslot: currently using 11g ShortSlot timing. | |
464 | * shortslot_override: 11g ShortSlot override. | |
465 | * include_legacy_erp: include Legacy ERP info elt ID 47 as well as g ID 42. | |
466 | * PLCPHdr_override: 802.11b Preamble Type override. | |
467 | * stf: | |
468 | * bcn_rspec: save bcn ratespec purpose. | |
469 | * tempsense_lasttime; | |
470 | * tx_duty_cycle_ofdm: maximum allowed duty cycle for OFDM. | |
471 | * tx_duty_cycle_cck: maximum allowed duty cycle for CCK. | |
472 | * pkt_queue: txq for transmit packets. | |
473 | * wiphy: | |
474 | * pri_scb: primary Station Control Block | |
475 | */ | |
476 | struct brcms_c_info { | |
477 | struct brcms_pub *pub; | |
478 | struct brcms_info *wl; | |
5b435de0 AS |
479 | struct brcms_hardware *hw; |
480 | ||
481 | /* clock */ | |
482 | u16 fastpwrup_dly; | |
483 | ||
484 | /* interrupt */ | |
485 | u32 macintstatus; | |
486 | u32 macintmask; | |
487 | u32 defmacintmask; | |
488 | ||
489 | bool clk; | |
490 | ||
491 | /* multiband */ | |
492 | struct brcms_core *core; | |
493 | struct brcms_band *band; | |
494 | struct brcms_core *corestate; | |
495 | struct brcms_band *bandstate[MAXBANDS]; | |
496 | ||
497 | /* packet queue */ | |
498 | uint qvalid; | |
499 | ||
500 | struct ampdu_info *ampdu; | |
501 | struct antsel_info *asi; | |
502 | struct brcms_cm_info *cmi; | |
503 | ||
504 | u16 vendorid; | |
505 | u16 deviceid; | |
506 | uint ucode_rev; | |
507 | ||
508 | u8 perm_etheraddr[ETH_ALEN]; | |
509 | ||
510 | bool bandlocked; | |
511 | bool bandinit_pending; | |
512 | ||
513 | bool radio_monitor; | |
514 | bool going_down; | |
515 | ||
5b435de0 AS |
516 | struct brcms_timer *wdtimer; |
517 | struct brcms_timer *radio_timer; | |
518 | ||
519 | /* promiscuous */ | |
be667669 | 520 | uint filter_flags; |
5b435de0 AS |
521 | |
522 | /* driver feature */ | |
523 | bool _rifs; | |
524 | ||
525 | /* AP-STA synchronization, power save */ | |
526 | u8 bcn_li_bcn; | |
527 | u8 bcn_li_dtim; | |
528 | ||
529 | bool WDarmed; | |
530 | u32 WDlast; | |
531 | ||
532 | /* WME */ | |
b7eec423 | 533 | u16 edcf_txop[IEEE80211_NUM_ACS]; |
5b435de0 | 534 | |
b7eec423 | 535 | u16 wme_retries[IEEE80211_NUM_ACS]; |
5b435de0 AS |
536 | u16 tx_prec_map; |
537 | u16 fifo2prec_map[NFIFO]; | |
538 | ||
539 | struct brcms_bss_cfg *bsscfg; | |
540 | ||
541 | /* tx queue */ | |
542 | struct brcms_txq_info *tx_queues; | |
543 | ||
544 | struct modulecb *modulecb; | |
545 | ||
546 | u8 mimoft; | |
547 | s8 cck_40txbw; | |
548 | s8 ofdm_40txbw; | |
549 | s8 mimo_40txbw; | |
550 | ||
551 | struct brcms_bss_info *default_bss; | |
552 | ||
553 | u16 mc_fid_counter; | |
554 | ||
555 | char country_default[BRCM_CNTRY_BUF_SZ]; | |
556 | char autocountry_default[BRCM_CNTRY_BUF_SZ]; | |
557 | u16 prb_resp_timeout; | |
558 | ||
559 | u16 home_chanspec; | |
560 | ||
561 | /* PHY parameters */ | |
562 | u16 chanspec; | |
563 | u16 usr_fragthresh; | |
564 | u16 fragthresh[NFIFO]; | |
565 | u16 RTSThresh; | |
566 | u16 SRL; | |
567 | u16 LRL; | |
568 | u16 SFBL; | |
569 | u16 LFBL; | |
570 | ||
571 | /* network config */ | |
572 | bool shortslot; | |
573 | s8 shortslot_override; | |
574 | bool include_legacy_erp; | |
575 | ||
576 | struct brcms_protection *protection; | |
577 | s8 PLCPHdr_override; | |
578 | ||
579 | struct brcms_stf *stf; | |
580 | ||
581 | u32 bcn_rspec; | |
582 | ||
583 | uint tempsense_lasttime; | |
584 | ||
585 | u16 tx_duty_cycle_ofdm; | |
586 | u16 tx_duty_cycle_cck; | |
587 | ||
588 | struct brcms_txq_info *pkt_queue; | |
589 | struct wiphy *wiphy; | |
590 | struct scb pri_scb; | |
591 | }; | |
592 | ||
593 | /* antsel module specific state */ | |
594 | struct antsel_info { | |
595 | struct brcms_c_info *wlc; /* pointer to main wlc structure */ | |
596 | struct brcms_pub *pub; /* pointer to public fn */ | |
597 | u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic | |
598 | * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board | |
599 | */ | |
600 | u8 antsel_antswitch; /* board level antenna switch type */ | |
601 | bool antsel_avail; /* Ant selection availability (SROM based) */ | |
602 | struct brcms_antselcfg antcfg_11n; /* antenna configuration */ | |
603 | struct brcms_antselcfg antcfg_cur; /* current antenna config (auto) */ | |
604 | }; | |
605 | ||
606 | /* | |
607 | * BSS configuration state | |
608 | * | |
609 | * wlc: wlc to which this bsscfg belongs to. | |
610 | * up: is this configuration up operational | |
611 | * enable: is this configuration enabled | |
612 | * associated: is BSS in ASSOCIATED state | |
613 | * BSS: infraustructure or adhoc | |
614 | * SSID_len: the length of SSID | |
615 | * SSID: SSID string | |
616 | * | |
617 | * | |
618 | * BSSID: BSSID (associated) | |
619 | * cur_etheraddr: h/w address | |
620 | * flags: BSSCFG flags; see below | |
621 | * | |
622 | * current_bss: BSS parms in ASSOCIATED state | |
623 | * | |
624 | * | |
625 | * ID: 'unique' ID of this bsscfg, assigned at bsscfg allocation | |
626 | */ | |
627 | struct brcms_bss_cfg { | |
628 | struct brcms_c_info *wlc; | |
629 | bool up; | |
630 | bool enable; | |
631 | bool associated; | |
632 | bool BSS; | |
633 | u8 SSID_len; | |
634 | u8 SSID[IEEE80211_MAX_SSID_LEN]; | |
635 | u8 BSSID[ETH_ALEN]; | |
636 | u8 cur_etheraddr[ETH_ALEN]; | |
637 | struct brcms_bss_info *current_bss; | |
638 | }; | |
639 | ||
5b435de0 AS |
640 | extern void brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, |
641 | struct sk_buff *p, | |
642 | bool commit, s8 txpktpend); | |
643 | extern void brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, | |
644 | s8 txpktpend); | |
645 | extern void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb, | |
646 | struct sk_buff *sdu, uint prec); | |
5b435de0 AS |
647 | extern void brcms_c_print_txstatus(struct tx_status *txs); |
648 | extern int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo, | |
649 | uint *blocks); | |
650 | ||
8ae74654 | 651 | #if defined(DEBUG) |
5b435de0 AS |
652 | extern void brcms_c_print_txdesc(struct d11txh *txh); |
653 | #else | |
18aad4f8 JP |
654 | static inline void brcms_c_print_txdesc(struct d11txh *txh) |
655 | { | |
656 | } | |
5b435de0 AS |
657 | #endif |
658 | ||
5b435de0 | 659 | extern int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config); |
be667669 | 660 | extern void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags); |
5b435de0 AS |
661 | extern void brcms_c_send_q(struct brcms_c_info *wlc); |
662 | extern int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, | |
663 | uint *fifo); | |
5b435de0 AS |
664 | extern u16 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec, |
665 | uint mac_len); | |
666 | extern u32 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, | |
667 | u32 rspec, | |
668 | bool use_rspec, u16 mimo_ctlchbw); | |
669 | extern u16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only, | |
670 | u32 rts_rate, | |
671 | u32 frame_rate, | |
672 | u8 rts_preamble_type, | |
673 | u8 frame_preamble_type, uint frame_len, | |
674 | bool ba); | |
5b435de0 AS |
675 | extern void brcms_c_inval_dma_pkts(struct brcms_hardware *hw, |
676 | struct ieee80211_sta *sta, | |
677 | void (*dma_callback_fn)); | |
5b435de0 | 678 | extern void brcms_c_update_beacon(struct brcms_c_info *wlc); |
5b435de0 | 679 | extern void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend); |
5b435de0 | 680 | extern int brcms_c_set_nmode(struct brcms_c_info *wlc); |
5b435de0 AS |
681 | extern void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, |
682 | u32 bcn_rate); | |
5b435de0 AS |
683 | extern void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, |
684 | u8 antsel_type); | |
5b435de0 AS |
685 | extern void brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, |
686 | u16 chanspec, | |
687 | bool mute, struct txpwr_limits *txpwr); | |
5b435de0 AS |
688 | extern void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, |
689 | u16 v); | |
690 | extern u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset); | |
5b435de0 AS |
691 | extern void brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, |
692 | u16 val, int bands); | |
5b435de0 | 693 | extern void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags); |
5b435de0 | 694 | extern void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val); |
5b435de0 AS |
695 | extern void brcms_b_phy_reset(struct brcms_hardware *wlc_hw); |
696 | extern void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw); | |
697 | extern void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw); | |
698 | extern void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw, | |
699 | u32 override_bit); | |
700 | extern void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw, | |
701 | u32 override_bit); | |
702 | extern void brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, | |
703 | int offset, int len, void *buf); | |
704 | extern u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate); | |
705 | extern void brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, | |
706 | uint offset, const void *buf, int len, | |
707 | u32 sel); | |
708 | extern void brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, | |
709 | void *buf, int len, u32 sel); | |
710 | extern void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode); | |
711 | extern u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw); | |
712 | extern void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk); | |
713 | extern void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk); | |
714 | extern void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on); | |
715 | extern void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant); | |
716 | extern void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, | |
717 | u8 stf_mode); | |
718 | extern void brcms_c_init_scb(struct scb *scb); | |
719 | ||
720 | #endif /* _BRCM_MAIN_H_ */ |