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Commit | Line | Data |
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ff1d2767 JM |
1 | #define PRISM2_PCI |
2 | ||
3 | /* Host AP driver's support for Intersil Prism2.5 PCI cards is based on | |
4 | * driver patches from Reyk Floeter <reyk@vantronix.net> and | |
5 | * Andy Warner <andyw@pobox.com> */ | |
6 | ||
ff1d2767 JM |
7 | #include <linux/module.h> |
8 | #include <linux/init.h> | |
9 | #include <linux/if.h> | |
10 | #include <linux/skbuff.h> | |
11 | #include <linux/netdevice.h> | |
12 | #include <linux/workqueue.h> | |
13 | #include <linux/wireless.h> | |
14 | #include <net/iw_handler.h> | |
15 | ||
16 | #include <linux/ioport.h> | |
17 | #include <linux/pci.h> | |
18 | #include <asm/io.h> | |
19 | ||
20 | #include "hostap_wlan.h" | |
21 | ||
22 | ||
23 | static char *version = PRISM2_VERSION " (Jouni Malinen <jkmaline@cc.hut.fi>)"; | |
24 | static char *dev_info = "hostap_pci"; | |
25 | ||
26 | ||
27 | MODULE_AUTHOR("Jouni Malinen"); | |
28 | MODULE_DESCRIPTION("Support for Intersil Prism2.5-based 802.11 wireless LAN " | |
29 | "PCI cards."); | |
30 | MODULE_SUPPORTED_DEVICE("Intersil Prism2.5-based WLAN PCI cards"); | |
31 | MODULE_LICENSE("GPL"); | |
f06ac319 | 32 | MODULE_VERSION(PRISM2_VERSION); |
ff1d2767 JM |
33 | |
34 | ||
67e0e473 JM |
35 | /* struct local_info::hw_priv */ |
36 | struct hostap_pci_priv { | |
37 | void __iomem *mem_start; | |
38 | }; | |
39 | ||
40 | ||
ff1d2767 JM |
41 | /* FIX: do we need mb/wmb/rmb with memory operations? */ |
42 | ||
43 | ||
44 | static struct pci_device_id prism2_pci_id_table[] __devinitdata = { | |
45 | /* Intersil Prism3 ISL3872 11Mb/s WLAN Controller */ | |
46 | { 0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID }, | |
47 | /* Intersil Prism2.5 ISL3874 11Mb/s WLAN Controller */ | |
48 | { 0x1260, 0x3873, PCI_ANY_ID, PCI_ANY_ID }, | |
49 | /* Samsung MagicLAN SWL-2210P */ | |
50 | { 0x167d, 0xa000, PCI_ANY_ID, PCI_ANY_ID }, | |
51 | { 0 } | |
52 | }; | |
53 | ||
54 | ||
55 | #ifdef PRISM2_IO_DEBUG | |
56 | ||
57 | static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v) | |
58 | { | |
59 | struct hostap_interface *iface; | |
f7a74447 | 60 | struct hostap_pci_priv *hw_priv; |
ff1d2767 JM |
61 | local_info_t *local; |
62 | unsigned long flags; | |
63 | ||
64 | iface = netdev_priv(dev); | |
65 | local = iface->local; | |
f7a74447 | 66 | hw_priv = local->hw_priv; |
ff1d2767 JM |
67 | |
68 | spin_lock_irqsave(&local->lock, flags); | |
69 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v); | |
67e0e473 | 70 | writeb(v, hw_priv->mem_start + a); |
ff1d2767 JM |
71 | spin_unlock_irqrestore(&local->lock, flags); |
72 | } | |
73 | ||
74 | static inline u8 hfa384x_inb_debug(struct net_device *dev, int a) | |
75 | { | |
76 | struct hostap_interface *iface; | |
f7a74447 | 77 | struct hostap_pci_priv *hw_priv; |
ff1d2767 JM |
78 | local_info_t *local; |
79 | unsigned long flags; | |
80 | u8 v; | |
81 | ||
82 | iface = netdev_priv(dev); | |
83 | local = iface->local; | |
f7a74447 | 84 | hw_priv = local->hw_priv; |
ff1d2767 JM |
85 | |
86 | spin_lock_irqsave(&local->lock, flags); | |
67e0e473 | 87 | v = readb(hw_priv->mem_start + a); |
ff1d2767 JM |
88 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v); |
89 | spin_unlock_irqrestore(&local->lock, flags); | |
90 | return v; | |
91 | } | |
92 | ||
93 | static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v) | |
94 | { | |
95 | struct hostap_interface *iface; | |
f7a74447 | 96 | struct hostap_pci_priv *hw_priv; |
ff1d2767 JM |
97 | local_info_t *local; |
98 | unsigned long flags; | |
99 | ||
100 | iface = netdev_priv(dev); | |
101 | local = iface->local; | |
f7a74447 | 102 | hw_priv = local->hw_priv; |
ff1d2767 JM |
103 | |
104 | spin_lock_irqsave(&local->lock, flags); | |
105 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v); | |
67e0e473 | 106 | writew(v, hw_priv->mem_start + a); |
ff1d2767 JM |
107 | spin_unlock_irqrestore(&local->lock, flags); |
108 | } | |
109 | ||
110 | static inline u16 hfa384x_inw_debug(struct net_device *dev, int a) | |
111 | { | |
112 | struct hostap_interface *iface; | |
f7a74447 | 113 | struct hostap_pci_priv *hw_priv; |
ff1d2767 JM |
114 | local_info_t *local; |
115 | unsigned long flags; | |
116 | u16 v; | |
117 | ||
118 | iface = netdev_priv(dev); | |
119 | local = iface->local; | |
f7a74447 | 120 | hw_priv = local->hw_priv; |
ff1d2767 JM |
121 | |
122 | spin_lock_irqsave(&local->lock, flags); | |
67e0e473 | 123 | v = readw(hw_priv->mem_start + a); |
ff1d2767 JM |
124 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v); |
125 | spin_unlock_irqrestore(&local->lock, flags); | |
126 | return v; | |
127 | } | |
128 | ||
129 | #define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v)) | |
130 | #define HFA384X_INB(a) hfa384x_inb_debug(dev, (a)) | |
131 | #define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v)) | |
132 | #define HFA384X_INW(a) hfa384x_inw_debug(dev, (a)) | |
133 | #define HFA384X_OUTW_DATA(v,a) hfa384x_outw_debug(dev, (a), cpu_to_le16((v))) | |
134 | #define HFA384X_INW_DATA(a) (u16) le16_to_cpu(hfa384x_inw_debug(dev, (a))) | |
135 | ||
136 | #else /* PRISM2_IO_DEBUG */ | |
137 | ||
138 | static inline void hfa384x_outb(struct net_device *dev, int a, u8 v) | |
139 | { | |
140 | struct hostap_interface *iface; | |
67e0e473 | 141 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 142 | iface = netdev_priv(dev); |
67e0e473 JM |
143 | hw_priv = iface->local->hw_priv; |
144 | writeb(v, hw_priv->mem_start + a); | |
ff1d2767 JM |
145 | } |
146 | ||
147 | static inline u8 hfa384x_inb(struct net_device *dev, int a) | |
148 | { | |
149 | struct hostap_interface *iface; | |
67e0e473 | 150 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 151 | iface = netdev_priv(dev); |
67e0e473 JM |
152 | hw_priv = iface->local->hw_priv; |
153 | return readb(hw_priv->mem_start + a); | |
ff1d2767 JM |
154 | } |
155 | ||
156 | static inline void hfa384x_outw(struct net_device *dev, int a, u16 v) | |
157 | { | |
158 | struct hostap_interface *iface; | |
67e0e473 | 159 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 160 | iface = netdev_priv(dev); |
67e0e473 JM |
161 | hw_priv = iface->local->hw_priv; |
162 | writew(v, hw_priv->mem_start + a); | |
ff1d2767 JM |
163 | } |
164 | ||
165 | static inline u16 hfa384x_inw(struct net_device *dev, int a) | |
166 | { | |
167 | struct hostap_interface *iface; | |
67e0e473 | 168 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 169 | iface = netdev_priv(dev); |
67e0e473 JM |
170 | hw_priv = iface->local->hw_priv; |
171 | return readw(hw_priv->mem_start + a); | |
ff1d2767 JM |
172 | } |
173 | ||
174 | #define HFA384X_OUTB(v,a) hfa384x_outb(dev, (a), (v)) | |
175 | #define HFA384X_INB(a) hfa384x_inb(dev, (a)) | |
176 | #define HFA384X_OUTW(v,a) hfa384x_outw(dev, (a), (v)) | |
177 | #define HFA384X_INW(a) hfa384x_inw(dev, (a)) | |
178 | #define HFA384X_OUTW_DATA(v,a) hfa384x_outw(dev, (a), cpu_to_le16((v))) | |
179 | #define HFA384X_INW_DATA(a) (u16) le16_to_cpu(hfa384x_inw(dev, (a))) | |
180 | ||
181 | #endif /* PRISM2_IO_DEBUG */ | |
182 | ||
183 | ||
184 | static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf, | |
185 | int len) | |
186 | { | |
187 | u16 d_off; | |
188 | u16 *pos; | |
189 | ||
190 | d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF; | |
191 | pos = (u16 *) buf; | |
192 | ||
193 | for ( ; len > 1; len -= 2) | |
194 | *pos++ = HFA384X_INW_DATA(d_off); | |
195 | ||
196 | if (len & 1) | |
197 | *((char *) pos) = HFA384X_INB(d_off); | |
198 | ||
199 | return 0; | |
200 | } | |
201 | ||
202 | ||
203 | static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len) | |
204 | { | |
205 | u16 d_off; | |
206 | u16 *pos; | |
207 | ||
208 | d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF; | |
209 | pos = (u16 *) buf; | |
210 | ||
211 | for ( ; len > 1; len -= 2) | |
212 | HFA384X_OUTW_DATA(*pos++, d_off); | |
213 | ||
214 | if (len & 1) | |
215 | HFA384X_OUTB(*((char *) pos), d_off); | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
220 | ||
221 | /* FIX: This might change at some point.. */ | |
222 | #include "hostap_hw.c" | |
223 | ||
224 | static void prism2_pci_cor_sreset(local_info_t *local) | |
225 | { | |
226 | struct net_device *dev = local->dev; | |
227 | u16 reg; | |
228 | ||
229 | reg = HFA384X_INB(HFA384X_PCICOR_OFF); | |
230 | printk(KERN_DEBUG "%s: Original COR value: 0x%0x\n", dev->name, reg); | |
231 | ||
232 | /* linux-wlan-ng uses extremely long hold and settle times for | |
233 | * COR sreset. A comment in the driver code mentions that the long | |
234 | * delays appear to be necessary. However, at least IBM 22P6901 seems | |
235 | * to work fine with shorter delays. | |
236 | * | |
237 | * Longer delays can be configured by uncommenting following line: */ | |
238 | /* #define PRISM2_PCI_USE_LONG_DELAYS */ | |
239 | ||
240 | #ifdef PRISM2_PCI_USE_LONG_DELAYS | |
241 | int i; | |
242 | ||
243 | HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF); | |
244 | mdelay(250); | |
245 | ||
246 | HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF); | |
247 | mdelay(500); | |
248 | ||
249 | /* Wait for f/w to complete initialization (CMD:BUSY == 0) */ | |
250 | i = 2000000 / 10; | |
251 | while ((HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) && --i) | |
252 | udelay(10); | |
253 | ||
254 | #else /* PRISM2_PCI_USE_LONG_DELAYS */ | |
255 | ||
256 | HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF); | |
257 | mdelay(2); | |
258 | HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF); | |
259 | mdelay(2); | |
260 | ||
261 | #endif /* PRISM2_PCI_USE_LONG_DELAYS */ | |
262 | ||
263 | if (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) { | |
264 | printk(KERN_DEBUG "%s: COR sreset timeout\n", dev->name); | |
265 | } | |
266 | } | |
267 | ||
268 | ||
269 | static void prism2_pci_genesis_reset(local_info_t *local, int hcr) | |
270 | { | |
271 | struct net_device *dev = local->dev; | |
272 | ||
273 | HFA384X_OUTW(0x00C5, HFA384X_PCICOR_OFF); | |
274 | mdelay(10); | |
275 | HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF); | |
276 | mdelay(10); | |
277 | HFA384X_OUTW(0x0045, HFA384X_PCICOR_OFF); | |
278 | mdelay(10); | |
279 | } | |
280 | ||
281 | ||
282 | static struct prism2_helper_functions prism2_pci_funcs = | |
283 | { | |
284 | .card_present = NULL, | |
285 | .cor_sreset = prism2_pci_cor_sreset, | |
ff1d2767 JM |
286 | .genesis_reset = prism2_pci_genesis_reset, |
287 | .hw_type = HOSTAP_HW_PCI, | |
288 | }; | |
289 | ||
290 | ||
291 | static int prism2_pci_probe(struct pci_dev *pdev, | |
292 | const struct pci_device_id *id) | |
293 | { | |
294 | unsigned long phymem; | |
295 | void __iomem *mem = NULL; | |
296 | local_info_t *local = NULL; | |
297 | struct net_device *dev = NULL; | |
298 | static int cards_found /* = 0 */; | |
299 | int irq_registered = 0; | |
300 | struct hostap_interface *iface; | |
67e0e473 JM |
301 | struct hostap_pci_priv *hw_priv; |
302 | ||
303 | hw_priv = kmalloc(sizeof(*hw_priv), GFP_KERNEL); | |
304 | if (hw_priv == NULL) | |
305 | return -ENOMEM; | |
306 | memset(hw_priv, 0, sizeof(*hw_priv)); | |
ff1d2767 JM |
307 | |
308 | if (pci_enable_device(pdev)) | |
93201999 | 309 | goto err_out_free; |
ff1d2767 JM |
310 | |
311 | phymem = pci_resource_start(pdev, 0); | |
312 | ||
313 | if (!request_mem_region(phymem, pci_resource_len(pdev, 0), "Prism2")) { | |
314 | printk(KERN_ERR "prism2: Cannot reserve PCI memory region\n"); | |
315 | goto err_out_disable; | |
316 | } | |
317 | ||
318 | mem = ioremap(phymem, pci_resource_len(pdev, 0)); | |
319 | if (mem == NULL) { | |
320 | printk(KERN_ERR "prism2: Cannot remap PCI memory region\n") ; | |
321 | goto fail; | |
322 | } | |
323 | ||
0cd545d6 DH |
324 | dev = prism2_init_local_data(&prism2_pci_funcs, cards_found, |
325 | &pdev->dev); | |
ff1d2767 JM |
326 | if (dev == NULL) |
327 | goto fail; | |
328 | iface = netdev_priv(dev); | |
329 | local = iface->local; | |
67e0e473 | 330 | local->hw_priv = hw_priv; |
ff1d2767 JM |
331 | cards_found++; |
332 | ||
333 | dev->irq = pdev->irq; | |
67e0e473 | 334 | hw_priv->mem_start = mem; |
ff1d2767 JM |
335 | |
336 | prism2_pci_cor_sreset(local); | |
337 | ||
338 | pci_set_drvdata(pdev, dev); | |
339 | ||
340 | if (request_irq(dev->irq, prism2_interrupt, SA_SHIRQ, dev->name, | |
341 | dev)) { | |
342 | printk(KERN_WARNING "%s: request_irq failed\n", dev->name); | |
343 | goto fail; | |
344 | } else | |
345 | irq_registered = 1; | |
346 | ||
347 | if (!local->pri_only && prism2_hw_config(dev, 1)) { | |
348 | printk(KERN_DEBUG "%s: hardware initialization failed\n", | |
349 | dev_info); | |
350 | goto fail; | |
351 | } | |
352 | ||
353 | printk(KERN_INFO "%s: Intersil Prism2.5 PCI: " | |
354 | "mem=0x%lx, irq=%d\n", dev->name, phymem, dev->irq); | |
355 | ||
356 | return hostap_hw_ready(dev); | |
357 | ||
358 | fail: | |
359 | if (irq_registered && dev) | |
360 | free_irq(dev->irq, dev); | |
361 | ||
362 | if (mem) | |
363 | iounmap(mem); | |
364 | ||
365 | release_mem_region(phymem, pci_resource_len(pdev, 0)); | |
366 | ||
367 | err_out_disable: | |
368 | pci_disable_device(pdev); | |
369 | prism2_free_local_data(dev); | |
93201999 JM |
370 | |
371 | err_out_free: | |
c355184c | 372 | kfree(hw_priv); |
ff1d2767 JM |
373 | |
374 | return -ENODEV; | |
375 | } | |
376 | ||
377 | ||
378 | static void prism2_pci_remove(struct pci_dev *pdev) | |
379 | { | |
380 | struct net_device *dev; | |
381 | struct hostap_interface *iface; | |
382 | void __iomem *mem_start; | |
67e0e473 | 383 | struct hostap_pci_priv *hw_priv; |
ff1d2767 JM |
384 | |
385 | dev = pci_get_drvdata(pdev); | |
386 | iface = netdev_priv(dev); | |
67e0e473 | 387 | hw_priv = iface->local->hw_priv; |
ff1d2767 JM |
388 | |
389 | /* Reset the hardware, and ensure interrupts are disabled. */ | |
390 | prism2_pci_cor_sreset(iface->local); | |
391 | hfa384x_disable_interrupts(dev); | |
392 | ||
393 | if (dev->irq) | |
394 | free_irq(dev->irq, dev); | |
395 | ||
67e0e473 | 396 | mem_start = hw_priv->mem_start; |
ff1d2767 | 397 | prism2_free_local_data(dev); |
c355184c | 398 | kfree(hw_priv); |
ff1d2767 JM |
399 | |
400 | iounmap(mem_start); | |
401 | ||
402 | release_mem_region(pci_resource_start(pdev, 0), | |
403 | pci_resource_len(pdev, 0)); | |
404 | pci_disable_device(pdev); | |
405 | } | |
406 | ||
407 | ||
408 | #ifdef CONFIG_PM | |
b2dabd5a | 409 | static int prism2_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
ff1d2767 JM |
410 | { |
411 | struct net_device *dev = pci_get_drvdata(pdev); | |
412 | ||
413 | if (netif_running(dev)) { | |
414 | netif_stop_queue(dev); | |
415 | netif_device_detach(dev); | |
416 | } | |
417 | prism2_suspend(dev); | |
418 | pci_save_state(pdev); | |
419 | pci_disable_device(pdev); | |
583a4e88 | 420 | pci_set_power_state(pdev, PCI_D3hot); |
ff1d2767 JM |
421 | |
422 | return 0; | |
423 | } | |
424 | ||
425 | static int prism2_pci_resume(struct pci_dev *pdev) | |
426 | { | |
427 | struct net_device *dev = pci_get_drvdata(pdev); | |
428 | ||
429 | pci_enable_device(pdev); | |
430 | pci_restore_state(pdev); | |
431 | prism2_hw_config(dev, 0); | |
432 | if (netif_running(dev)) { | |
433 | netif_device_attach(dev); | |
434 | netif_start_queue(dev); | |
435 | } | |
436 | ||
437 | return 0; | |
438 | } | |
439 | #endif /* CONFIG_PM */ | |
440 | ||
441 | ||
442 | MODULE_DEVICE_TABLE(pci, prism2_pci_id_table); | |
443 | ||
444 | static struct pci_driver prism2_pci_drv_id = { | |
7a716536 | 445 | .name = "hostap_pci", |
ff1d2767 JM |
446 | .id_table = prism2_pci_id_table, |
447 | .probe = prism2_pci_probe, | |
448 | .remove = prism2_pci_remove, | |
449 | #ifdef CONFIG_PM | |
450 | .suspend = prism2_pci_suspend, | |
451 | .resume = prism2_pci_resume, | |
452 | #endif /* CONFIG_PM */ | |
453 | /* Linux 2.4.6 added save_state and enable_wake that are not used here | |
454 | */ | |
455 | }; | |
456 | ||
457 | ||
458 | static int __init init_prism2_pci(void) | |
459 | { | |
460 | printk(KERN_INFO "%s: %s\n", dev_info, version); | |
461 | ||
462 | return pci_register_driver(&prism2_pci_drv_id); | |
463 | } | |
464 | ||
465 | ||
466 | static void __exit exit_prism2_pci(void) | |
467 | { | |
468 | pci_unregister_driver(&prism2_pci_drv_id); | |
469 | printk(KERN_INFO "%s: Driver unloaded\n", dev_info); | |
470 | } | |
471 | ||
472 | ||
473 | module_init(init_prism2_pci); | |
474 | module_exit(exit_prism2_pci); |