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ff1d2767 JM |
1 | #ifndef HOSTAP_WLAN_H |
2 | #define HOSTAP_WLAN_H | |
3 | ||
5fad5a2e AB |
4 | #include <linux/wireless.h> |
5 | #include <linux/netdevice.h> | |
3623060a | 6 | #include <linux/mutex.h> |
5fad5a2e | 7 | #include <net/iw_handler.h> |
573b933f | 8 | #include <net/ieee80211_radiotap.h> |
274bfb8d | 9 | #include <net/lib80211.h> |
5fad5a2e | 10 | |
ff1d2767 | 11 | #include "hostap_config.h" |
ff1d2767 JM |
12 | #include "hostap_common.h" |
13 | ||
14 | #define MAX_PARM_DEVICES 8 | |
15 | #define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES) | |
16 | #define DEF_INTS -1, -1, -1, -1, -1, -1, -1 | |
17 | #define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx] | |
18 | ||
19 | ||
20 | /* Specific skb->protocol value that indicates that the packet already contains | |
21 | * txdesc header. | |
22 | * FIX: This might need own value that would be allocated especially for Prism2 | |
23 | * txdesc; ETH_P_CONTROL is commented as "Card specific control frames". | |
24 | * However, these skb's should have only minimal path in the kernel side since | |
25 | * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */ | |
26 | #define ETH_P_HOSTAP ETH_P_CONTROL | |
27 | ||
ff1d2767 JM |
28 | /* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header |
29 | * (from linux-wlan-ng) */ | |
30 | struct linux_wlan_ng_val { | |
31 | u32 did; | |
32 | u16 status, len; | |
33 | u32 data; | |
ba2d3587 | 34 | } __packed; |
ff1d2767 JM |
35 | |
36 | struct linux_wlan_ng_prism_hdr { | |
37 | u32 msgcode, msglen; | |
38 | char devname[16]; | |
39 | struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal, | |
40 | noise, rate, istx, frmlen; | |
ba2d3587 | 41 | } __packed; |
ff1d2767 JM |
42 | |
43 | struct linux_wlan_ng_cap_hdr { | |
8a9faf3c AV |
44 | __be32 version; |
45 | __be32 length; | |
46 | __be64 mactime; | |
47 | __be64 hosttime; | |
48 | __be32 phytype; | |
49 | __be32 channel; | |
50 | __be32 datarate; | |
51 | __be32 antenna; | |
52 | __be32 priority; | |
53 | __be32 ssi_type; | |
54 | __be32 ssi_signal; | |
55 | __be32 ssi_noise; | |
56 | __be32 preamble; | |
57 | __be32 encoding; | |
ba2d3587 | 58 | } __packed; |
ff1d2767 | 59 | |
573b933f PR |
60 | struct hostap_radiotap_rx { |
61 | struct ieee80211_radiotap_header hdr; | |
62 | __le64 tsft; | |
63 | u8 rate; | |
64 | u8 padding; | |
65 | __le16 chan_freq; | |
66 | __le16 chan_flags; | |
67 | s8 dbm_antsignal; | |
68 | s8 dbm_antnoise; | |
ba2d3587 | 69 | } __packed; |
573b933f | 70 | |
ff1d2767 JM |
71 | #define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */ |
72 | #define LWNG_CAPHDR_VERSION 0x80211001 | |
73 | ||
74 | struct hfa384x_rx_frame { | |
75 | /* HFA384X RX frame descriptor */ | |
8a9faf3c AV |
76 | __le16 status; /* HFA384X_RX_STATUS_ flags */ |
77 | __le32 time; /* timestamp, 1 microsecond resolution */ | |
ff1d2767 JM |
78 | u8 silence; /* 27 .. 154; seems to be 0 */ |
79 | u8 signal; /* 27 .. 154 */ | |
80 | u8 rate; /* 10, 20, 55, or 110 */ | |
81 | u8 rxflow; | |
8a9faf3c | 82 | __le32 reserved; |
ff1d2767 JM |
83 | |
84 | /* 802.11 */ | |
8a9faf3c AV |
85 | __le16 frame_control; |
86 | __le16 duration_id; | |
ff1d2767 JM |
87 | u8 addr1[6]; |
88 | u8 addr2[6]; | |
89 | u8 addr3[6]; | |
8a9faf3c | 90 | __le16 seq_ctrl; |
ff1d2767 | 91 | u8 addr4[6]; |
8a9faf3c | 92 | __le16 data_len; |
ff1d2767 JM |
93 | |
94 | /* 802.3 */ | |
95 | u8 dst_addr[6]; | |
96 | u8 src_addr[6]; | |
8a9faf3c | 97 | __be16 len; |
ff1d2767 JM |
98 | |
99 | /* followed by frame data; max 2304 bytes */ | |
ba2d3587 | 100 | } __packed; |
ff1d2767 JM |
101 | |
102 | ||
103 | struct hfa384x_tx_frame { | |
104 | /* HFA384X TX frame descriptor */ | |
8a9faf3c AV |
105 | __le16 status; /* HFA384X_TX_STATUS_ flags */ |
106 | __le16 reserved1; | |
107 | __le16 reserved2; | |
108 | __le32 sw_support; | |
ff1d2767 JM |
109 | u8 retry_count; /* not yet implemented */ |
110 | u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */ | |
8a9faf3c | 111 | __le16 tx_control; /* HFA384X_TX_CTRL_ flags */ |
ff1d2767 JM |
112 | |
113 | /* 802.11 */ | |
8a9faf3c AV |
114 | __le16 frame_control; /* parts not used */ |
115 | __le16 duration_id; | |
ff1d2767 JM |
116 | u8 addr1[6]; |
117 | u8 addr2[6]; /* filled by firmware */ | |
118 | u8 addr3[6]; | |
8a9faf3c | 119 | __le16 seq_ctrl; /* filled by firmware */ |
ff1d2767 | 120 | u8 addr4[6]; |
8a9faf3c | 121 | __le16 data_len; |
ff1d2767 JM |
122 | |
123 | /* 802.3 */ | |
124 | u8 dst_addr[6]; | |
125 | u8 src_addr[6]; | |
8a9faf3c | 126 | __be16 len; |
ff1d2767 JM |
127 | |
128 | /* followed by frame data; max 2304 bytes */ | |
ba2d3587 | 129 | } __packed; |
ff1d2767 JM |
130 | |
131 | ||
132 | struct hfa384x_rid_hdr | |
133 | { | |
8a9faf3c AV |
134 | __le16 len; |
135 | __le16 rid; | |
ba2d3587 | 136 | } __packed; |
ff1d2767 JM |
137 | |
138 | ||
139 | /* Macro for converting signal levels (range 27 .. 154) to wireless ext | |
140 | * dBm value with some accuracy */ | |
141 | #define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100 | |
142 | ||
143 | #define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100 | |
144 | ||
145 | struct hfa384x_scan_request { | |
8a9faf3c AV |
146 | __le16 channel_list; |
147 | __le16 txrate; /* HFA384X_RATES_* */ | |
ba2d3587 | 148 | } __packed; |
ff1d2767 JM |
149 | |
150 | struct hfa384x_hostscan_request { | |
8a9faf3c AV |
151 | __le16 channel_list; |
152 | __le16 txrate; | |
153 | __le16 target_ssid_len; | |
ff1d2767 | 154 | u8 target_ssid[32]; |
ba2d3587 | 155 | } __packed; |
ff1d2767 JM |
156 | |
157 | struct hfa384x_join_request { | |
158 | u8 bssid[6]; | |
8a9faf3c | 159 | __le16 channel; |
ba2d3587 | 160 | } __packed; |
ff1d2767 JM |
161 | |
162 | struct hfa384x_info_frame { | |
8a9faf3c AV |
163 | __le16 len; |
164 | __le16 type; | |
ba2d3587 | 165 | } __packed; |
ff1d2767 JM |
166 | |
167 | struct hfa384x_comm_tallies { | |
8a9faf3c AV |
168 | __le16 tx_unicast_frames; |
169 | __le16 tx_multicast_frames; | |
170 | __le16 tx_fragments; | |
171 | __le16 tx_unicast_octets; | |
172 | __le16 tx_multicast_octets; | |
173 | __le16 tx_deferred_transmissions; | |
174 | __le16 tx_single_retry_frames; | |
175 | __le16 tx_multiple_retry_frames; | |
176 | __le16 tx_retry_limit_exceeded; | |
177 | __le16 tx_discards; | |
178 | __le16 rx_unicast_frames; | |
179 | __le16 rx_multicast_frames; | |
180 | __le16 rx_fragments; | |
181 | __le16 rx_unicast_octets; | |
182 | __le16 rx_multicast_octets; | |
183 | __le16 rx_fcs_errors; | |
184 | __le16 rx_discards_no_buffer; | |
185 | __le16 tx_discards_wrong_sa; | |
186 | __le16 rx_discards_wep_undecryptable; | |
187 | __le16 rx_message_in_msg_fragments; | |
188 | __le16 rx_message_in_bad_msg_fragments; | |
ba2d3587 | 189 | } __packed; |
ff1d2767 JM |
190 | |
191 | struct hfa384x_comm_tallies32 { | |
8a9faf3c AV |
192 | __le32 tx_unicast_frames; |
193 | __le32 tx_multicast_frames; | |
194 | __le32 tx_fragments; | |
195 | __le32 tx_unicast_octets; | |
196 | __le32 tx_multicast_octets; | |
197 | __le32 tx_deferred_transmissions; | |
198 | __le32 tx_single_retry_frames; | |
199 | __le32 tx_multiple_retry_frames; | |
200 | __le32 tx_retry_limit_exceeded; | |
201 | __le32 tx_discards; | |
202 | __le32 rx_unicast_frames; | |
203 | __le32 rx_multicast_frames; | |
204 | __le32 rx_fragments; | |
205 | __le32 rx_unicast_octets; | |
206 | __le32 rx_multicast_octets; | |
207 | __le32 rx_fcs_errors; | |
208 | __le32 rx_discards_no_buffer; | |
209 | __le32 tx_discards_wrong_sa; | |
210 | __le32 rx_discards_wep_undecryptable; | |
211 | __le32 rx_message_in_msg_fragments; | |
212 | __le32 rx_message_in_bad_msg_fragments; | |
ba2d3587 | 213 | } __packed; |
ff1d2767 JM |
214 | |
215 | struct hfa384x_scan_result_hdr { | |
8a9faf3c AV |
216 | __le16 reserved; |
217 | __le16 scan_reason; | |
ff1d2767 JM |
218 | #define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */ |
219 | #define HFA384X_SCAN_HOST_INITIATED 1 | |
220 | #define HFA384X_SCAN_FIRMWARE_INITIATED 2 | |
221 | #define HFA384X_SCAN_INQUIRY_FROM_HOST 3 | |
ba2d3587 | 222 | } __packed; |
ff1d2767 JM |
223 | |
224 | #define HFA384X_SCAN_MAX_RESULTS 32 | |
225 | ||
226 | struct hfa384x_scan_result { | |
8a9faf3c AV |
227 | __le16 chid; |
228 | __le16 anl; | |
229 | __le16 sl; | |
ff1d2767 | 230 | u8 bssid[6]; |
8a9faf3c AV |
231 | __le16 beacon_interval; |
232 | __le16 capability; | |
233 | __le16 ssid_len; | |
ff1d2767 JM |
234 | u8 ssid[32]; |
235 | u8 sup_rates[10]; | |
8a9faf3c | 236 | __le16 rate; |
ba2d3587 | 237 | } __packed; |
ff1d2767 JM |
238 | |
239 | struct hfa384x_hostscan_result { | |
8a9faf3c AV |
240 | __le16 chid; |
241 | __le16 anl; | |
242 | __le16 sl; | |
ff1d2767 | 243 | u8 bssid[6]; |
8a9faf3c AV |
244 | __le16 beacon_interval; |
245 | __le16 capability; | |
246 | __le16 ssid_len; | |
ff1d2767 JM |
247 | u8 ssid[32]; |
248 | u8 sup_rates[10]; | |
8a9faf3c AV |
249 | __le16 rate; |
250 | __le16 atim; | |
ba2d3587 | 251 | } __packed; |
ff1d2767 JM |
252 | |
253 | struct comm_tallies_sums { | |
254 | unsigned int tx_unicast_frames; | |
255 | unsigned int tx_multicast_frames; | |
256 | unsigned int tx_fragments; | |
257 | unsigned int tx_unicast_octets; | |
258 | unsigned int tx_multicast_octets; | |
259 | unsigned int tx_deferred_transmissions; | |
260 | unsigned int tx_single_retry_frames; | |
261 | unsigned int tx_multiple_retry_frames; | |
262 | unsigned int tx_retry_limit_exceeded; | |
263 | unsigned int tx_discards; | |
264 | unsigned int rx_unicast_frames; | |
265 | unsigned int rx_multicast_frames; | |
266 | unsigned int rx_fragments; | |
267 | unsigned int rx_unicast_octets; | |
268 | unsigned int rx_multicast_octets; | |
269 | unsigned int rx_fcs_errors; | |
270 | unsigned int rx_discards_no_buffer; | |
271 | unsigned int tx_discards_wrong_sa; | |
272 | unsigned int rx_discards_wep_undecryptable; | |
273 | unsigned int rx_message_in_msg_fragments; | |
274 | unsigned int rx_message_in_bad_msg_fragments; | |
275 | }; | |
276 | ||
277 | ||
278 | struct hfa384x_regs { | |
279 | u16 cmd; | |
280 | u16 evstat; | |
281 | u16 offset0; | |
282 | u16 offset1; | |
283 | u16 swsupport0; | |
284 | }; | |
285 | ||
286 | ||
287 | #if defined(PRISM2_PCCARD) || defined(PRISM2_PLX) | |
288 | /* I/O ports for HFA384X Controller access */ | |
289 | #define HFA384X_CMD_OFF 0x00 | |
290 | #define HFA384X_PARAM0_OFF 0x02 | |
291 | #define HFA384X_PARAM1_OFF 0x04 | |
292 | #define HFA384X_PARAM2_OFF 0x06 | |
293 | #define HFA384X_STATUS_OFF 0x08 | |
294 | #define HFA384X_RESP0_OFF 0x0A | |
295 | #define HFA384X_RESP1_OFF 0x0C | |
296 | #define HFA384X_RESP2_OFF 0x0E | |
297 | #define HFA384X_INFOFID_OFF 0x10 | |
298 | #define HFA384X_CONTROL_OFF 0x14 | |
299 | #define HFA384X_SELECT0_OFF 0x18 | |
300 | #define HFA384X_SELECT1_OFF 0x1A | |
301 | #define HFA384X_OFFSET0_OFF 0x1C | |
302 | #define HFA384X_OFFSET1_OFF 0x1E | |
303 | #define HFA384X_RXFID_OFF 0x20 | |
304 | #define HFA384X_ALLOCFID_OFF 0x22 | |
305 | #define HFA384X_TXCOMPLFID_OFF 0x24 | |
306 | #define HFA384X_SWSUPPORT0_OFF 0x28 | |
307 | #define HFA384X_SWSUPPORT1_OFF 0x2A | |
308 | #define HFA384X_SWSUPPORT2_OFF 0x2C | |
309 | #define HFA384X_EVSTAT_OFF 0x30 | |
310 | #define HFA384X_INTEN_OFF 0x32 | |
311 | #define HFA384X_EVACK_OFF 0x34 | |
312 | #define HFA384X_DATA0_OFF 0x36 | |
313 | #define HFA384X_DATA1_OFF 0x38 | |
314 | #define HFA384X_AUXPAGE_OFF 0x3A | |
315 | #define HFA384X_AUXOFFSET_OFF 0x3C | |
316 | #define HFA384X_AUXDATA_OFF 0x3E | |
317 | #endif /* PRISM2_PCCARD || PRISM2_PLX */ | |
318 | ||
319 | #ifdef PRISM2_PCI | |
320 | /* Memory addresses for ISL3874 controller access */ | |
321 | #define HFA384X_CMD_OFF 0x00 | |
322 | #define HFA384X_PARAM0_OFF 0x04 | |
323 | #define HFA384X_PARAM1_OFF 0x08 | |
324 | #define HFA384X_PARAM2_OFF 0x0C | |
325 | #define HFA384X_STATUS_OFF 0x10 | |
326 | #define HFA384X_RESP0_OFF 0x14 | |
327 | #define HFA384X_RESP1_OFF 0x18 | |
328 | #define HFA384X_RESP2_OFF 0x1C | |
329 | #define HFA384X_INFOFID_OFF 0x20 | |
330 | #define HFA384X_CONTROL_OFF 0x28 | |
331 | #define HFA384X_SELECT0_OFF 0x30 | |
332 | #define HFA384X_SELECT1_OFF 0x34 | |
333 | #define HFA384X_OFFSET0_OFF 0x38 | |
334 | #define HFA384X_OFFSET1_OFF 0x3C | |
335 | #define HFA384X_RXFID_OFF 0x40 | |
336 | #define HFA384X_ALLOCFID_OFF 0x44 | |
337 | #define HFA384X_TXCOMPLFID_OFF 0x48 | |
338 | #define HFA384X_PCICOR_OFF 0x4C | |
339 | #define HFA384X_SWSUPPORT0_OFF 0x50 | |
340 | #define HFA384X_SWSUPPORT1_OFF 0x54 | |
341 | #define HFA384X_SWSUPPORT2_OFF 0x58 | |
342 | #define HFA384X_PCIHCR_OFF 0x5C | |
343 | #define HFA384X_EVSTAT_OFF 0x60 | |
344 | #define HFA384X_INTEN_OFF 0x64 | |
345 | #define HFA384X_EVACK_OFF 0x68 | |
346 | #define HFA384X_DATA0_OFF 0x6C | |
347 | #define HFA384X_DATA1_OFF 0x70 | |
348 | #define HFA384X_AUXPAGE_OFF 0x74 | |
349 | #define HFA384X_AUXOFFSET_OFF 0x78 | |
350 | #define HFA384X_AUXDATA_OFF 0x7C | |
351 | #define HFA384X_PCI_M0_ADDRH_OFF 0x80 | |
352 | #define HFA384X_PCI_M0_ADDRL_OFF 0x84 | |
353 | #define HFA384X_PCI_M0_LEN_OFF 0x88 | |
354 | #define HFA384X_PCI_M0_CTL_OFF 0x8C | |
355 | #define HFA384X_PCI_STATUS_OFF 0x98 | |
356 | #define HFA384X_PCI_M1_ADDRH_OFF 0xA0 | |
357 | #define HFA384X_PCI_M1_ADDRL_OFF 0xA4 | |
358 | #define HFA384X_PCI_M1_LEN_OFF 0xA8 | |
359 | #define HFA384X_PCI_M1_CTL_OFF 0xAC | |
360 | ||
361 | /* PCI bus master control bits (these are undocumented; based on guessing and | |
362 | * experimenting..) */ | |
363 | #define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0)) | |
364 | #define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0)) | |
365 | ||
366 | #endif /* PRISM2_PCI */ | |
367 | ||
368 | ||
369 | /* Command codes for CMD reg. */ | |
370 | #define HFA384X_CMDCODE_INIT 0x00 | |
371 | #define HFA384X_CMDCODE_ENABLE 0x01 | |
372 | #define HFA384X_CMDCODE_DISABLE 0x02 | |
373 | #define HFA384X_CMDCODE_ALLOC 0x0A | |
374 | #define HFA384X_CMDCODE_TRANSMIT 0x0B | |
375 | #define HFA384X_CMDCODE_INQUIRE 0x11 | |
376 | #define HFA384X_CMDCODE_ACCESS 0x21 | |
377 | #define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8)) | |
378 | #define HFA384X_CMDCODE_DOWNLOAD 0x22 | |
379 | #define HFA384X_CMDCODE_READMIF 0x30 | |
380 | #define HFA384X_CMDCODE_WRITEMIF 0x31 | |
381 | #define HFA384X_CMDCODE_TEST 0x38 | |
382 | ||
383 | #define HFA384X_CMDCODE_MASK 0x3F | |
384 | ||
385 | /* Test mode operations */ | |
386 | #define HFA384X_TEST_CHANGE_CHANNEL 0x08 | |
387 | #define HFA384X_TEST_MONITOR 0x0B | |
388 | #define HFA384X_TEST_STOP 0x0F | |
389 | #define HFA384X_TEST_CFG_BITS 0x15 | |
390 | #define HFA384X_TEST_CFG_BIT_ALC BIT(3) | |
391 | ||
392 | #define HFA384X_CMD_BUSY BIT(15) | |
393 | ||
394 | #define HFA384X_CMD_TX_RECLAIM BIT(8) | |
395 | ||
396 | #define HFA384X_OFFSET_ERR BIT(14) | |
397 | #define HFA384X_OFFSET_BUSY BIT(15) | |
398 | ||
399 | ||
400 | /* ProgMode for download command */ | |
401 | #define HFA384X_PROGMODE_DISABLE 0 | |
402 | #define HFA384X_PROGMODE_ENABLE_VOLATILE 1 | |
403 | #define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2 | |
404 | #define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3 | |
405 | ||
406 | #define HFA384X_AUX_MAGIC0 0xfe01 | |
407 | #define HFA384X_AUX_MAGIC1 0xdc23 | |
408 | #define HFA384X_AUX_MAGIC2 0xba45 | |
409 | ||
410 | #define HFA384X_AUX_PORT_DISABLED 0 | |
411 | #define HFA384X_AUX_PORT_DISABLE BIT(14) | |
412 | #define HFA384X_AUX_PORT_ENABLE BIT(15) | |
413 | #define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15)) | |
414 | #define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15)) | |
415 | ||
416 | #define PRISM2_PDA_SIZE 1024 | |
417 | ||
418 | ||
419 | /* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */ | |
420 | #define HFA384X_EV_TICK BIT(15) | |
421 | #define HFA384X_EV_WTERR BIT(14) | |
422 | #define HFA384X_EV_INFDROP BIT(13) | |
423 | #ifdef PRISM2_PCI | |
424 | #define HFA384X_EV_PCI_M1 BIT(9) | |
425 | #define HFA384X_EV_PCI_M0 BIT(8) | |
426 | #endif /* PRISM2_PCI */ | |
427 | #define HFA384X_EV_INFO BIT(7) | |
428 | #define HFA384X_EV_DTIM BIT(5) | |
429 | #define HFA384X_EV_CMD BIT(4) | |
430 | #define HFA384X_EV_ALLOC BIT(3) | |
431 | #define HFA384X_EV_TXEXC BIT(2) | |
432 | #define HFA384X_EV_TX BIT(1) | |
433 | #define HFA384X_EV_RX BIT(0) | |
434 | ||
435 | ||
436 | /* HFA384X Information frames */ | |
437 | #define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */ | |
438 | #define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */ | |
439 | #define HFA384X_INFO_COMMTALLIES 0xF100 | |
440 | #define HFA384X_INFO_SCANRESULTS 0xF101 | |
441 | #define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */ | |
442 | #define HFA384X_INFO_HOSTSCANRESULTS 0xF103 | |
443 | #define HFA384X_INFO_LINKSTATUS 0xF200 | |
444 | #define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */ | |
445 | #define HFA384X_INFO_AUTHREQ 0xF202 /* ? */ | |
446 | #define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */ | |
447 | #define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */ | |
448 | ||
449 | enum { HFA384X_LINKSTATUS_CONNECTED = 1, | |
450 | HFA384X_LINKSTATUS_DISCONNECTED = 2, | |
451 | HFA384X_LINKSTATUS_AP_CHANGE = 3, | |
452 | HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4, | |
453 | HFA384X_LINKSTATUS_AP_IN_RANGE = 5, | |
454 | HFA384X_LINKSTATUS_ASSOC_FAILED = 6 }; | |
455 | ||
456 | enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2, | |
457 | HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0, | |
458 | HFA384X_PORTTYPE_HOSTAP = 6 }; | |
459 | ||
460 | #define HFA384X_RATES_1MBPS BIT(0) | |
461 | #define HFA384X_RATES_2MBPS BIT(1) | |
462 | #define HFA384X_RATES_5MBPS BIT(2) | |
463 | #define HFA384X_RATES_11MBPS BIT(3) | |
464 | ||
465 | #define HFA384X_ROAMING_FIRMWARE 1 | |
466 | #define HFA384X_ROAMING_HOST 2 | |
467 | #define HFA384X_ROAMING_DISABLED 3 | |
468 | ||
469 | #define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0) | |
470 | #define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1) | |
471 | #define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4) | |
472 | #define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7) | |
473 | ||
474 | #define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13)) | |
475 | #define HFA384X_RX_STATUS_PCF BIT(12) | |
476 | #define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8)) | |
477 | #define HFA384X_RX_STATUS_UNDECR BIT(1) | |
478 | #define HFA384X_RX_STATUS_FCSERR BIT(0) | |
479 | ||
480 | #define HFA384X_RX_STATUS_GET_MSGTYPE(s) \ | |
481 | (((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13) | |
482 | #define HFA384X_RX_STATUS_GET_MACPORT(s) \ | |
483 | (((s) & HFA384X_RX_STATUS_MACPORT) >> 8) | |
484 | ||
485 | enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1, | |
486 | HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 }; | |
487 | ||
488 | ||
489 | #define HFA384X_TX_CTRL_ALT_RTRY BIT(5) | |
490 | #define HFA384X_TX_CTRL_802_11 BIT(3) | |
491 | #define HFA384X_TX_CTRL_802_3 0 | |
492 | #define HFA384X_TX_CTRL_TX_EX BIT(2) | |
493 | #define HFA384X_TX_CTRL_TX_OK BIT(1) | |
494 | ||
495 | #define HFA384X_TX_STATUS_RETRYERR BIT(0) | |
496 | #define HFA384X_TX_STATUS_AGEDERR BIT(1) | |
497 | #define HFA384X_TX_STATUS_DISCON BIT(2) | |
498 | #define HFA384X_TX_STATUS_FORMERR BIT(3) | |
499 | ||
500 | /* HFA3861/3863 (BBP) Control Registers */ | |
501 | #define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */ | |
502 | #define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */ | |
503 | #define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */ | |
504 | #define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */ | |
505 | #define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */ | |
506 | ||
507 | ||
508 | #ifdef __KERNEL__ | |
509 | ||
510 | #define PRISM2_TXFID_COUNT 8 | |
511 | #define PRISM2_DATA_MAXLEN 2304 | |
512 | #define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame)) | |
513 | #define PRISM2_TXFID_EMPTY 0xffff | |
514 | #define PRISM2_TXFID_RESERVED 0xfffe | |
515 | #define PRISM2_DUMMY_FID 0xffff | |
516 | #define MAX_SSID_LEN 32 | |
517 | #define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */ | |
518 | ||
519 | #define PRISM2_DUMP_RX_HDR BIT(0) | |
520 | #define PRISM2_DUMP_TX_HDR BIT(1) | |
521 | #define PRISM2_DUMP_TXEXC_HDR BIT(2) | |
522 | ||
523 | struct hostap_tx_callback_info { | |
524 | u16 idx; | |
525 | void (*func)(struct sk_buff *, int ok, void *); | |
526 | void *data; | |
527 | struct hostap_tx_callback_info *next; | |
528 | }; | |
529 | ||
530 | ||
531 | /* IEEE 802.11 requires that STA supports concurrent reception of at least | |
532 | * three fragmented frames. This define can be increased to support more | |
533 | * concurrent frames, but it should be noted that each entry can consume about | |
534 | * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ | |
535 | #define PRISM2_FRAG_CACHE_LEN 4 | |
536 | ||
537 | struct prism2_frag_entry { | |
538 | unsigned long first_frag_time; | |
539 | unsigned int seq; | |
540 | unsigned int last_frag; | |
541 | struct sk_buff *skb; | |
542 | u8 src_addr[ETH_ALEN]; | |
543 | u8 dst_addr[ETH_ALEN]; | |
544 | }; | |
545 | ||
546 | ||
ff1d2767 JM |
547 | struct hostap_cmd_queue { |
548 | struct list_head list; | |
549 | wait_queue_head_t compl; | |
550 | volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type; | |
b15eff26 | 551 | void (*callback)(struct net_device *dev, long context, u16 resp0, |
ff1d2767 | 552 | u16 res); |
b15eff26 | 553 | long context; |
ff1d2767 JM |
554 | u16 cmd, param0, param1; |
555 | u16 resp0, res; | |
556 | volatile int issued, issuing; | |
557 | ||
558 | atomic_t usecnt; | |
559 | int del_req; | |
560 | }; | |
561 | ||
562 | /* options for hw_shutdown */ | |
563 | #define HOSTAP_HW_NO_DISABLE BIT(0) | |
564 | #define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1) | |
565 | ||
566 | typedef struct local_info local_info_t; | |
567 | ||
568 | struct prism2_helper_functions { | |
569 | /* these functions are defined in hardware model specific files | |
570 | * (hostap_{cs,plx,pci}.c */ | |
571 | int (*card_present)(local_info_t *local); | |
572 | void (*cor_sreset)(local_info_t *local); | |
ff1d2767 JM |
573 | void (*genesis_reset)(local_info_t *local, int hcr); |
574 | ||
575 | /* the following functions are from hostap_hw.c, but they may have some | |
576 | * hardware model specific code */ | |
577 | ||
578 | /* FIX: low-level commands like cmd might disappear at some point to | |
579 | * make it easier to change them if needed (e.g., cmd would be replaced | |
580 | * with write_mif/read_mif/testcmd/inquire); at least get_rid and | |
581 | * set_rid might move to hostap_{cs,plx,pci}.c */ | |
582 | int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1, | |
583 | u16 *resp0); | |
584 | void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs); | |
585 | int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len, | |
586 | int exact_len); | |
587 | int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len); | |
588 | int (*hw_enable)(struct net_device *dev, int initial); | |
589 | int (*hw_config)(struct net_device *dev, int initial); | |
590 | void (*hw_reset)(struct net_device *dev); | |
591 | void (*hw_shutdown)(struct net_device *dev, int no_disable); | |
592 | int (*reset_port)(struct net_device *dev); | |
593 | void (*schedule_reset)(local_info_t *local); | |
594 | int (*download)(local_info_t *local, | |
595 | struct prism2_download_param *param); | |
596 | int (*tx)(struct sk_buff *skb, struct net_device *dev); | |
597 | int (*set_tim)(struct net_device *dev, int aid, int set); | |
598 | int (*read_aux)(struct net_device *dev, unsigned addr, int len, | |
599 | u8 *buf); | |
600 | ||
601 | int need_tx_headroom; /* number of bytes of headroom needed before | |
602 | * IEEE 802.11 header */ | |
603 | enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type; | |
604 | }; | |
605 | ||
606 | ||
607 | struct prism2_download_data { | |
608 | u32 dl_cmd; | |
609 | u32 start_addr; | |
610 | u32 num_areas; | |
611 | struct prism2_download_data_area { | |
612 | u32 addr; /* wlan card address */ | |
613 | u32 len; | |
614 | u8 *data; /* allocated data */ | |
615 | } data[0]; | |
616 | }; | |
617 | ||
618 | ||
619 | #define HOSTAP_MAX_BSS_COUNT 64 | |
620 | #define MAX_WPA_IE_LEN 64 | |
621 | ||
622 | struct hostap_bss_info { | |
623 | struct list_head list; | |
624 | unsigned long last_update; | |
625 | unsigned int count; | |
626 | u8 bssid[ETH_ALEN]; | |
627 | u16 capab_info; | |
628 | u8 ssid[32]; | |
629 | size_t ssid_len; | |
630 | u8 wpa_ie[MAX_WPA_IE_LEN]; | |
631 | size_t wpa_ie_len; | |
632 | u8 rsn_ie[MAX_WPA_IE_LEN]; | |
633 | size_t rsn_ie_len; | |
634 | int chan; | |
635 | int included; | |
636 | }; | |
637 | ||
638 | ||
639 | /* Per radio private Host AP data - shared by all net devices interfaces used | |
640 | * by each radio (wlan#, wlan#ap, wlan#sta, WDS). | |
641 | * ((struct hostap_interface *) netdev_priv(dev))->local points to this | |
642 | * structure. */ | |
643 | struct local_info { | |
644 | struct module *hw_module; | |
645 | int card_idx; | |
646 | int dev_enabled; | |
647 | int master_dev_auto_open; /* was master device opened automatically */ | |
648 | int num_dev_open; /* number of open devices */ | |
649 | struct net_device *dev; /* master radio device */ | |
650 | struct net_device *ddev; /* main data device */ | |
651 | struct list_head hostap_interfaces; /* Host AP interface list (contains | |
652 | * struct hostap_interface entries) | |
653 | */ | |
654 | rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock | |
655 | * when removing entries from the list. | |
656 | * TX and RX paths can use read lock. */ | |
657 | spinlock_t cmdlock, baplock, lock; | |
3623060a | 658 | struct mutex rid_bap_mtx; |
ff1d2767 JM |
659 | u16 infofid; /* MAC buffer id for info frame */ |
660 | /* txfid, intransmitfid, next_txtid, and next_alloc are protected by | |
661 | * txfidlock */ | |
662 | spinlock_t txfidlock; | |
663 | int txfid_len; /* length of allocated TX buffers */ | |
664 | u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */ | |
665 | /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if | |
666 | * corresponding txfid is free for next TX frame */ | |
667 | u16 intransmitfid[PRISM2_TXFID_COUNT]; | |
668 | int next_txfid; /* index to the next txfid to be checked for | |
669 | * availability */ | |
670 | int next_alloc; /* index to the next intransmitfid to be checked for | |
671 | * allocation events */ | |
672 | ||
673 | /* bitfield for atomic bitops */ | |
674 | #define HOSTAP_BITS_TRANSMIT 0 | |
675 | #define HOSTAP_BITS_BAP_TASKLET 1 | |
676 | #define HOSTAP_BITS_BAP_TASKLET2 2 | |
64b33619 | 677 | unsigned long bits; |
ff1d2767 JM |
678 | |
679 | struct ap_data *ap; | |
680 | ||
681 | char essid[MAX_SSID_LEN + 1]; | |
682 | char name[MAX_NAME_LEN + 1]; | |
683 | int name_set; | |
72ca9c61 JM |
684 | u16 channel_mask; /* mask of allowed channels */ |
685 | u16 scan_channel_mask; /* mask of channels to be scanned */ | |
ff1d2767 | 686 | struct comm_tallies_sums comm_tallies; |
ff1d2767 JM |
687 | struct proc_dir_entry *proc; |
688 | int iw_mode; /* operating mode (IW_MODE_*) */ | |
689 | int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS | |
690 | * 1: IW_MODE_ADHOC is "pseudo IBSS" */ | |
691 | char bssid[ETH_ALEN]; | |
692 | int channel; | |
693 | int beacon_int; | |
694 | int dtim_period; | |
695 | int mtu; | |
696 | int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */ | |
697 | int fw_tx_rate_control; | |
698 | u16 tx_rate_control; | |
699 | u16 basic_rates; | |
700 | int hw_resetting; | |
701 | int hw_ready; | |
702 | int hw_reset_tries; /* how many times reset has been tried */ | |
703 | int hw_downloading; | |
704 | int shutdown; | |
705 | int pri_only; | |
706 | int no_pri; /* no PRI f/w present */ | |
707 | int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */ | |
708 | ||
709 | enum { | |
710 | PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF, | |
711 | PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN | |
712 | } txpower_type; | |
713 | int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */ | |
714 | ||
715 | /* command queue for hfa384x_cmd(); protected with cmdlock */ | |
716 | struct list_head cmd_queue; | |
717 | /* max_len for cmd_queue; in addition, cmd_callback can use two | |
718 | * additional entries to prevent sleeping commands from stopping | |
719 | * transmits */ | |
720 | #define HOSTAP_CMD_QUEUE_MAX_LEN 16 | |
721 | int cmd_queue_len; /* number of entries in cmd_queue */ | |
722 | ||
723 | /* if card timeout is detected in interrupt context, reset_queue is | |
724 | * used to schedule card reseting to be done in user context */ | |
725 | struct work_struct reset_queue; | |
726 | ||
727 | /* For scheduling a change of the promiscuous mode RID */ | |
728 | int is_promisc; | |
729 | struct work_struct set_multicast_list_queue; | |
730 | ||
731 | struct work_struct set_tim_queue; | |
732 | struct list_head set_tim_list; | |
733 | spinlock_t set_tim_lock; | |
734 | ||
735 | int wds_max_connections; | |
736 | int wds_connections; | |
737 | #define HOSTAP_WDS_BROADCAST_RA BIT(0) | |
738 | #define HOSTAP_WDS_AP_CLIENT BIT(1) | |
739 | #define HOSTAP_WDS_STANDARD_FRAME BIT(2) | |
740 | u32 wds_type; | |
741 | u16 tx_control; /* flags to be used in TX description */ | |
742 | int manual_retry_count; /* -1 = use f/w default; otherwise retry count | |
743 | * to be used with all frames */ | |
744 | ||
745 | struct iw_statistics wstats; | |
746 | unsigned long scan_timestamp; /* Time started to scan */ | |
747 | enum { | |
748 | PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1, | |
573b933f | 749 | PRISM2_MONITOR_CAPHDR = 2, PRISM2_MONITOR_RADIOTAP = 3 |
ff1d2767 | 750 | } monitor_type; |
ff1d2767 JM |
751 | int monitor_allow_fcserr; |
752 | ||
753 | int hostapd; /* whether user space daemon, hostapd, is used for AP | |
754 | * management */ | |
755 | int hostapd_sta; /* whether hostapd is used with an extra STA interface | |
756 | */ | |
757 | struct net_device *apdev; | |
758 | struct net_device_stats apdevstats; | |
759 | ||
760 | char assoc_ap_addr[ETH_ALEN]; | |
761 | struct net_device *stadev; | |
762 | struct net_device_stats stadevstats; | |
763 | ||
764 | #define WEP_KEYS 4 | |
765 | #define WEP_KEY_LEN 13 | |
274bfb8d | 766 | struct lib80211_crypt_info crypt_info; |
ff1d2767 JM |
767 | |
768 | int open_wep; /* allow unencrypted frames */ | |
769 | int host_encrypt; | |
770 | int host_decrypt; | |
771 | int privacy_invoked; /* force privacy invoked flag even if no keys are | |
772 | * configured */ | |
773 | int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working | |
774 | * in Host AP mode (STA f/w 1.4.9 or newer) */ | |
775 | int bcrx_sta_key; /* use individual keys to override default keys even | |
776 | * with RX of broad/multicast frames */ | |
777 | ||
778 | struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN]; | |
779 | unsigned int frag_next_idx; | |
780 | ||
781 | int ieee_802_1x; /* is IEEE 802.1X used */ | |
782 | ||
783 | int antsel_tx, antsel_rx; | |
784 | int rts_threshold; /* dot11RTSThreshold */ | |
785 | int fragm_threshold; /* dot11FragmentationThreshold */ | |
786 | int auth_algs; /* PRISM2_AUTH_ flags */ | |
787 | ||
788 | int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */ | |
789 | int tallies32; /* 32-bit tallies in use */ | |
790 | ||
791 | struct prism2_helper_functions *func; | |
792 | ||
ff1d2767 JM |
793 | u8 *pda; |
794 | int fw_ap; | |
795 | #define PRISM2_FW_VER(major, minor, variant) \ | |
796 | (((major) << 16) | ((minor) << 8) | variant) | |
797 | u32 sta_fw_ver; | |
798 | ||
799 | /* Tasklets for handling hardware IRQ related operations outside hw IRQ | |
800 | * handler */ | |
801 | struct tasklet_struct bap_tasklet; | |
802 | ||
803 | struct tasklet_struct info_tasklet; | |
804 | struct sk_buff_head info_list; /* info frames as skb's for | |
805 | * info_tasklet */ | |
806 | ||
807 | struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks | |
808 | */ | |
809 | ||
810 | struct tasklet_struct rx_tasklet; | |
811 | struct sk_buff_head rx_list; | |
812 | ||
813 | struct tasklet_struct sta_tx_exc_tasklet; | |
814 | struct sk_buff_head sta_tx_exc_list; | |
815 | ||
816 | int host_roaming; | |
817 | unsigned long last_join_time; /* time of last JoinRequest */ | |
2e4fd068 | 818 | struct hfa384x_hostscan_result *last_scan_results; |
ff1d2767 | 819 | int last_scan_results_count; |
ff1d2767 JM |
820 | enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type; |
821 | struct work_struct info_queue; | |
8216bfe2 | 822 | unsigned long pending_info; /* bit field of pending info_queue items */ |
ff1d2767 JM |
823 | #define PRISM2_INFO_PENDING_LINKSTATUS 0 |
824 | #define PRISM2_INFO_PENDING_SCANRESULTS 1 | |
825 | int prev_link_status; /* previous received LinkStatus info */ | |
826 | int prev_linkstatus_connected; | |
827 | u8 preferred_ap[6]; /* use this AP if possible */ | |
828 | ||
829 | #ifdef PRISM2_CALLBACK | |
830 | void *callback_data; /* Can be used in callbacks; e.g., allocate | |
831 | * on enable event and free on disable event. | |
832 | * Host AP driver code does not touch this. */ | |
833 | #endif /* PRISM2_CALLBACK */ | |
834 | ||
835 | wait_queue_head_t hostscan_wq; | |
836 | ||
837 | /* Passive scan in Host AP mode */ | |
838 | struct timer_list passive_scan_timer; | |
839 | int passive_scan_interval; /* in seconds, 0 = disabled */ | |
840 | int passive_scan_channel; | |
841 | enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state; | |
842 | ||
843 | struct timer_list tick_timer; | |
844 | unsigned long last_tick_timer; | |
845 | unsigned int sw_tick_stuck; | |
846 | ||
847 | /* commsQuality / dBmCommsQuality data from periodic polling; only | |
848 | * valid for Managed and Ad-hoc modes */ | |
849 | unsigned long last_comms_qual_update; | |
850 | int comms_qual; /* in some odd unit.. */ | |
851 | int avg_signal; /* in dB (note: negative) */ | |
852 | int avg_noise; /* in dB (note: negative) */ | |
853 | struct work_struct comms_qual_update; | |
854 | ||
855 | /* RSSI to dBm adjustment (for RX descriptor fields) */ | |
856 | int rssi_to_dBm; /* substract from RSSI to get approximate dBm value */ | |
857 | ||
858 | /* BSS list / protected by local->lock */ | |
859 | struct list_head bss_list; | |
860 | int num_bss_info; | |
861 | int wpa; /* WPA support enabled */ | |
862 | int tkip_countermeasures; | |
863 | int drop_unencrypted; | |
864 | /* Generic IEEE 802.11 info element to be added to | |
865 | * ProbeResp/Beacon/(Re)AssocReq */ | |
866 | u8 *generic_elem; | |
867 | size_t generic_elem_len; | |
868 | ||
869 | #ifdef PRISM2_DOWNLOAD_SUPPORT | |
870 | /* Persistent volatile download data */ | |
871 | struct prism2_download_data *dl_pri; | |
872 | struct prism2_download_data *dl_sec; | |
873 | #endif /* PRISM2_DOWNLOAD_SUPPORT */ | |
874 | ||
875 | #ifdef PRISM2_IO_DEBUG | |
876 | #define PRISM2_IO_DEBUG_SIZE 10000 | |
877 | u32 io_debug[PRISM2_IO_DEBUG_SIZE]; | |
878 | int io_debug_head; | |
879 | int io_debug_enabled; | |
880 | #endif /* PRISM2_IO_DEBUG */ | |
881 | ||
67e0e473 JM |
882 | /* Pointer to hardware model specific (cs,pci,plx) private data. */ |
883 | void *hw_priv; | |
ff1d2767 JM |
884 | }; |
885 | ||
886 | ||
887 | /* Per interface private Host AP data | |
888 | * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta, | |
889 | * WDS) and netdev_priv(dev) points to this structure. */ | |
890 | struct hostap_interface { | |
891 | struct list_head list; /* list entry in Host AP interface list */ | |
892 | struct net_device *dev; /* pointer to this device */ | |
893 | struct local_info *local; /* pointer to shared private data */ | |
894 | struct net_device_stats stats; | |
895 | struct iw_spy_data spy_data; /* iwspy support */ | |
896 | struct iw_public_data wireless_data; | |
897 | ||
898 | enum { | |
899 | HOSTAP_INTERFACE_MASTER, | |
900 | HOSTAP_INTERFACE_MAIN, | |
901 | HOSTAP_INTERFACE_AP, | |
902 | HOSTAP_INTERFACE_STA, | |
903 | HOSTAP_INTERFACE_WDS, | |
904 | } type; | |
905 | ||
906 | union { | |
907 | struct hostap_interface_wds { | |
908 | u8 remote_addr[ETH_ALEN]; | |
909 | } wds; | |
910 | } u; | |
911 | }; | |
912 | ||
913 | ||
914 | #define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2 | |
915 | ||
5bee720f JM |
916 | /* |
917 | * TX meta data - stored in skb->cb buffer, so this must not be increased over | |
f7cd1686 JB |
918 | * the 48-byte limit. |
919 | * THE PADDING THIS STARTS WITH IS A HORRIBLE HACK THAT SHOULD NOT LIVE | |
920 | * TO SEE THE DAY. | |
5bee720f | 921 | */ |
ff1d2767 | 922 | struct hostap_skb_tx_data { |
f7cd1686 | 923 | unsigned int __padding_for_default_qdiscs; |
5bee720f JM |
924 | u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */ |
925 | u8 rate; /* transmit rate */ | |
926 | #define HOSTAP_TX_FLAGS_WDS BIT(0) | |
927 | #define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1) | |
928 | #define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2) | |
929 | u8 flags; /* HOSTAP_TX_FLAGS_* */ | |
930 | u16 tx_cb_idx; | |
ff1d2767 JM |
931 | struct hostap_interface *iface; |
932 | unsigned long jiffies; /* queueing timestamp */ | |
ff1d2767 | 933 | unsigned short ethertype; |
ff1d2767 JM |
934 | }; |
935 | ||
936 | ||
937 | #ifndef PRISM2_NO_DEBUG | |
938 | ||
939 | #define DEBUG_FID BIT(0) | |
940 | #define DEBUG_PS BIT(1) | |
941 | #define DEBUG_FLOW BIT(2) | |
942 | #define DEBUG_AP BIT(3) | |
943 | #define DEBUG_HW BIT(4) | |
944 | #define DEBUG_EXTRA BIT(5) | |
945 | #define DEBUG_EXTRA2 BIT(6) | |
946 | #define DEBUG_PS2 BIT(7) | |
947 | #define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA) | |
948 | #define PDEBUG(n, args...) \ | |
949 | do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0) | |
950 | #define PDEBUG2(n, args...) \ | |
951 | do { if ((n) & DEBUG_MASK) printk(args); } while (0) | |
952 | ||
953 | #else /* PRISM2_NO_DEBUG */ | |
954 | ||
955 | #define PDEBUG(n, args...) | |
956 | #define PDEBUG2(n, args...) | |
957 | ||
958 | #endif /* PRISM2_NO_DEBUG */ | |
959 | ||
960 | enum { BAP0 = 0, BAP1 = 1 }; | |
961 | ||
962 | #define PRISM2_IO_DEBUG_CMD_INB 0 | |
963 | #define PRISM2_IO_DEBUG_CMD_INW 1 | |
964 | #define PRISM2_IO_DEBUG_CMD_INSW 2 | |
965 | #define PRISM2_IO_DEBUG_CMD_OUTB 3 | |
966 | #define PRISM2_IO_DEBUG_CMD_OUTW 4 | |
967 | #define PRISM2_IO_DEBUG_CMD_OUTSW 5 | |
968 | #define PRISM2_IO_DEBUG_CMD_ERROR 6 | |
969 | #define PRISM2_IO_DEBUG_CMD_INTERRUPT 7 | |
970 | ||
971 | #ifdef PRISM2_IO_DEBUG | |
972 | ||
973 | #define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \ | |
974 | (((cmd) << 24) | ((reg) << 16) | value) | |
975 | ||
976 | static inline void prism2_io_debug_add(struct net_device *dev, int cmd, | |
977 | int reg, int value) | |
978 | { | |
979 | struct hostap_interface *iface = netdev_priv(dev); | |
980 | local_info_t *local = iface->local; | |
981 | ||
982 | if (!local->io_debug_enabled) | |
983 | return; | |
984 | ||
985 | local->io_debug[local->io_debug_head] = jiffies & 0xffffffff; | |
986 | if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) | |
987 | local->io_debug_head = 0; | |
988 | local->io_debug[local->io_debug_head] = | |
989 | PRISM2_IO_DEBUG_ENTRY(cmd, reg, value); | |
990 | if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) | |
991 | local->io_debug_head = 0; | |
992 | } | |
993 | ||
994 | ||
995 | static inline void prism2_io_debug_error(struct net_device *dev, int err) | |
996 | { | |
997 | struct hostap_interface *iface = netdev_priv(dev); | |
998 | local_info_t *local = iface->local; | |
999 | unsigned long flags; | |
1000 | ||
1001 | if (!local->io_debug_enabled) | |
1002 | return; | |
1003 | ||
1004 | spin_lock_irqsave(&local->lock, flags); | |
1005 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err); | |
1006 | if (local->io_debug_enabled == 1) { | |
1007 | local->io_debug_enabled = 0; | |
1008 | printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name); | |
1009 | } | |
1010 | spin_unlock_irqrestore(&local->lock, flags); | |
1011 | } | |
1012 | ||
1013 | #else /* PRISM2_IO_DEBUG */ | |
1014 | ||
1015 | static inline void prism2_io_debug_add(struct net_device *dev, int cmd, | |
1016 | int reg, int value) | |
1017 | { | |
1018 | } | |
1019 | ||
1020 | static inline void prism2_io_debug_error(struct net_device *dev, int err) | |
1021 | { | |
1022 | } | |
1023 | ||
1024 | #endif /* PRISM2_IO_DEBUG */ | |
1025 | ||
1026 | ||
1027 | #ifdef PRISM2_CALLBACK | |
1028 | enum { | |
1029 | /* Called when card is enabled */ | |
1030 | PRISM2_CALLBACK_ENABLE, | |
1031 | ||
1032 | /* Called when card is disabled */ | |
1033 | PRISM2_CALLBACK_DISABLE, | |
1034 | ||
1035 | /* Called when RX/TX starts/ends */ | |
1036 | PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END, | |
1037 | PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END | |
1038 | }; | |
1039 | void prism2_callback(local_info_t *local, int event); | |
1040 | #else /* PRISM2_CALLBACK */ | |
1041 | #define prism2_callback(d, e) do { } while (0) | |
1042 | #endif /* PRISM2_CALLBACK */ | |
1043 | ||
1044 | #endif /* __KERNEL__ */ | |
1045 | ||
1046 | #endif /* HOSTAP_WLAN_H */ |