[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw-api-rs.h

/******************************************************************************
 *
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * GPL LICENSE SUMMARY
 *
 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
 * Copyright(c) 2017 Intel Deutschland GmbH
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
 * USA
 *
 * The full GNU General Public License is included in this distribution
 * in the file called COPYING.
 *
 * Contact Information:
 *  Intel Linux Wireless <linuxwifi@intel.com>
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 * BSD LICENSE
 *
 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
 * Copyright(c) 2017 Intel Deutschland GmbH
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name Intel Corporation nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *****************************************************************************/

#ifndef __fw_api_rs_h__
#define __fw_api_rs_h__

#include "fw-api-mac.h"

/*
 * These serve as indexes into
 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
 * TODO: avoid overlap between legacy and HT rates
 */
enum {
	IWL_RATE_1M_INDEX = 0,
	IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
	IWL_RATE_2M_INDEX,
	IWL_RATE_5M_INDEX,
	IWL_RATE_11M_INDEX,
	IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
	IWL_RATE_6M_INDEX,
	IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
	IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
	IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
	IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
	IWL_RATE_9M_INDEX,
	IWL_RATE_12M_INDEX,
	IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
	IWL_RATE_18M_INDEX,
	IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
	IWL_RATE_24M_INDEX,
	IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
	IWL_RATE_36M_INDEX,
	IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
	IWL_RATE_48M_INDEX,
	IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
	IWL_RATE_54M_INDEX,
	IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
	IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
	IWL_RATE_60M_INDEX,
	IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
	IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
	IWL_RATE_MCS_8_INDEX,
	IWL_RATE_MCS_9_INDEX,
	IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
	IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
	IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1,
};

#define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)

/* fw API values for legacy bit rates, both OFDM and CCK */
enum {
	IWL_RATE_6M_PLCP  = 13,
	IWL_RATE_9M_PLCP  = 15,
	IWL_RATE_12M_PLCP = 5,
	IWL_RATE_18M_PLCP = 7,
	IWL_RATE_24M_PLCP = 9,
	IWL_RATE_36M_PLCP = 11,
	IWL_RATE_48M_PLCP = 1,
	IWL_RATE_54M_PLCP = 3,
	IWL_RATE_1M_PLCP  = 10,
	IWL_RATE_2M_PLCP  = 20,
	IWL_RATE_5M_PLCP  = 55,
	IWL_RATE_11M_PLCP = 110,
	IWL_RATE_INVM_PLCP = -1,
};

/*
 * rate_n_flags bit fields
 *
 * The 32-bit value has different layouts in the low 8 bites depending on the
 * format. There are three formats, HT, VHT and legacy (11abg, with subformats
 * for CCK and OFDM).
 *
 * High-throughput (HT) rate format
 *	bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
 * Very High-throughput (VHT) rate format
 *	bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
 * Legacy OFDM rate format for bits 7:0
 *	bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
 * Legacy CCK rate format for bits 7:0:
 *	bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
 */

/* Bit 8: (1) HT format, (0) legacy or VHT format */
#define RATE_MCS_HT_POS 8
#define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)

/* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
#define RATE_MCS_CCK_POS 9
#define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)

/* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
#define RATE_MCS_VHT_POS 26
#define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)


/*
 * High-throughput (HT) rate format for bits 7:0
 *
 *  2-0:  MCS rate base
 *        0)   6 Mbps
 *        1)  12 Mbps
 *        2)  18 Mbps
 *        3)  24 Mbps
 *        4)  36 Mbps
 *        5)  48 Mbps
 *        6)  54 Mbps
 *        7)  60 Mbps
 *  4-3:  0)  Single stream (SISO)
 *        1)  Dual stream (MIMO)
 *        2)  Triple stream (MIMO)
 *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
 *  (bits 7-6 are zero)
 *
 * Together the low 5 bits work out to the MCS index because we don't
 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
 * streams and 16-23 have three streams. We could also support MCS 32
 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
 */
#define RATE_HT_MCS_RATE_CODE_MSK	0x7
#define RATE_HT_MCS_NSS_POS             3
#define RATE_HT_MCS_NSS_MSK             (3 << RATE_HT_MCS_NSS_POS)

/* Bit 10: (1) Use Green Field preamble */
#define RATE_HT_MCS_GF_POS		10
#define RATE_HT_MCS_GF_MSK		(1 << RATE_HT_MCS_GF_POS)

#define RATE_HT_MCS_INDEX_MSK		0x3f

/*
 * Very High-throughput (VHT) rate format for bits 7:0
 *
 *  3-0:  VHT MCS (0-9)
 *  5-4:  number of streams - 1:
 *        0)  Single stream (SISO)
 *        1)  Dual stream (MIMO)
 *        2)  Triple stream (MIMO)
 */

/* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
#define RATE_VHT_MCS_RATE_CODE_MSK	0xf
#define RATE_VHT_MCS_NSS_POS		4
#define RATE_VHT_MCS_NSS_MSK		(3 << RATE_VHT_MCS_NSS_POS)

/*
 * Legacy OFDM rate format for bits 7:0
 *
 *  3-0:  0xD)   6 Mbps
 *        0xF)   9 Mbps
 *        0x5)  12 Mbps
 *        0x7)  18 Mbps
 *        0x9)  24 Mbps
 *        0xB)  36 Mbps
 *        0x1)  48 Mbps
 *        0x3)  54 Mbps
 * (bits 7-4 are 0)
 *
 * Legacy CCK rate format for bits 7:0:
 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
 *
 *  6-0:   10)  1 Mbps
 *         20)  2 Mbps
 *         55)  5.5 Mbps
 *        110)  11 Mbps
 * (bit 7 is 0)
 */
#define RATE_LEGACY_RATE_MSK 0xff

/* Bit 10 - OFDM HE */
#define RATE_MCS_OFDM_HE_POS		10
#define RATE_MCS_OFDM_HE_MSK		BIT(RATE_MCS_OFDM_HE_POS)

/*
 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
 */
#define RATE_MCS_CHAN_WIDTH_POS		11
#define RATE_MCS_CHAN_WIDTH_MSK		(3 << RATE_MCS_CHAN_WIDTH_POS)
#define RATE_MCS_CHAN_WIDTH_20		(0 << RATE_MCS_CHAN_WIDTH_POS)
#define RATE_MCS_CHAN_WIDTH_40		(1 << RATE_MCS_CHAN_WIDTH_POS)
#define RATE_MCS_CHAN_WIDTH_80		(2 << RATE_MCS_CHAN_WIDTH_POS)
#define RATE_MCS_CHAN_WIDTH_160		(3 << RATE_MCS_CHAN_WIDTH_POS)

/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
#define RATE_MCS_SGI_POS		13
#define RATE_MCS_SGI_MSK		(1 << RATE_MCS_SGI_POS)

/* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
#define RATE_MCS_ANT_POS		14
#define RATE_MCS_ANT_A_MSK		(1 << RATE_MCS_ANT_POS)
#define RATE_MCS_ANT_B_MSK		(2 << RATE_MCS_ANT_POS)
#define RATE_MCS_ANT_C_MSK		(4 << RATE_MCS_ANT_POS)
#define RATE_MCS_ANT_AB_MSK		(RATE_MCS_ANT_A_MSK | \
					 RATE_MCS_ANT_B_MSK)
#define RATE_MCS_ANT_ABC_MSK		(RATE_MCS_ANT_AB_MSK | \
					 RATE_MCS_ANT_C_MSK)
#define RATE_MCS_ANT_MSK		RATE_MCS_ANT_ABC_MSK
#define RATE_MCS_ANT_NUM 3

/* Bit 17: (0) SS, (1) SS*2 */
#define RATE_MCS_STBC_POS		17
#define RATE_MCS_STBC_MSK		BIT(RATE_MCS_STBC_POS)

/* Bit 18: OFDM-HE dual carrier mode */
#define RATE_HE_DUAL_CARRIER_MODE	18
#define RATE_HE_DUAL_CARRIER_MODE_MSK	BIT(RATE_HE_DUAL_CARRIER_MODE)

/* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
#define RATE_MCS_BF_POS			19
#define RATE_MCS_BF_MSK			(1 << RATE_MCS_BF_POS)

/*
 * Bit 20-21: HE guard interval and LTF type.
 * (0) 1xLTF+1.6us, (1) 2xLTF+0.8us,
 * (2) 2xLTF+1.6us, (3) 4xLTF+3.2us
 */
#define RATE_MCS_HE_GI_LTF_POS		20
#define RATE_MCS_HE_GI_LTF_MSK		(3 << RATE_MCS_HE_GI_LTF_POS)

/* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
#define RATE_MCS_HE_TYPE_POS		22
#define RATE_MCS_HE_TYPE_MSK		(3 << RATE_MCS_HE_TYPE_POS)

/* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
#define RATE_MCS_DUP_POS		24
#define RATE_MCS_DUP_MSK		(3 << RATE_MCS_DUP_POS)

/* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
#define RATE_MCS_LDPC_POS		27
#define RATE_MCS_LDPC_MSK		(1 << RATE_MCS_LDPC_POS)


/* Link Quality definitions */

/* # entries in rate scale table to support Tx retries */
#define  LQ_MAX_RETRY_NUM 16

/* Link quality command flags bit fields */

/* Bit 0: (0) Don't use RTS (1) Use RTS */
#define LQ_FLAG_USE_RTS_POS             0
#define LQ_FLAG_USE_RTS_MSK	        (1 << LQ_FLAG_USE_RTS_POS)

/* Bit 1-3: LQ command color. Used to match responses to LQ commands */
#define LQ_FLAG_COLOR_POS               1
#define LQ_FLAG_COLOR_MSK               (7 << LQ_FLAG_COLOR_POS)
#define LQ_FLAG_COLOR_GET(_f)		(((_f) & LQ_FLAG_COLOR_MSK) >>\
					 LQ_FLAG_COLOR_POS)
#define LQ_FLAGS_COLOR_INC(_c)		((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
					 LQ_FLAG_COLOR_MSK)
#define LQ_FLAG_COLOR_SET(_f, _c)	((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK))

/* Bit 4-5: Tx RTS BW Signalling
 * (0) No RTS BW signalling
 * (1) Static BW signalling
 * (2) Dynamic BW signalling
 */
#define LQ_FLAG_RTS_BW_SIG_POS          4
#define LQ_FLAG_RTS_BW_SIG_NONE         (0 << LQ_FLAG_RTS_BW_SIG_POS)
#define LQ_FLAG_RTS_BW_SIG_STATIC       (1 << LQ_FLAG_RTS_BW_SIG_POS)
#define LQ_FLAG_RTS_BW_SIG_DYNAMIC      (2 << LQ_FLAG_RTS_BW_SIG_POS)

/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
 * Dyanmic BW selection allows Tx with narrower BW then requested in rates
 */
#define LQ_FLAG_DYNAMIC_BW_POS          6
#define LQ_FLAG_DYNAMIC_BW_MSK          (1 << LQ_FLAG_DYNAMIC_BW_POS)

/* Single Stream Tx Parameters (lq_cmd->ss_params)
 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
 * used for single stream Tx.
 */

/* Bit 0-1: Max STBC streams allowed. Can be 0-3.
 * (0) - No STBC allowed
 * (1) - 2x1 STBC allowed (HT/VHT)
 * (2) - 4x2 STBC allowed (HT/VHT)
 * (3) - 3x2 STBC allowed (HT only)
 * All our chips are at most 2 antennas so only (1) is valid for now.
 */
#define LQ_SS_STBC_ALLOWED_POS          0
#define LQ_SS_STBC_ALLOWED_MSK		(3 << LQ_SS_STBC_ALLOWED_MSK)

/* 2x1 STBC is allowed */
#define LQ_SS_STBC_1SS_ALLOWED		(1 << LQ_SS_STBC_ALLOWED_POS)

/* Bit 2: Beamformer (VHT only) is allowed */
#define LQ_SS_BFER_ALLOWED_POS		2
#define LQ_SS_BFER_ALLOWED		(1 << LQ_SS_BFER_ALLOWED_POS)

/* Bit 3: Force BFER or STBC for testing
 * If this is set:
 * If BFER is allowed then force the ucode to choose BFER else
 * If STBC is allowed then force the ucode to choose STBC over SISO
 */
#define LQ_SS_FORCE_POS			3
#define LQ_SS_FORCE			(1 << LQ_SS_FORCE_POS)

/* Bit 31: ss_params field is valid. Used for FW backward compatibility
 * with other drivers which don't support the ss_params API yet
 */
#define LQ_SS_PARAMS_VALID_POS		31
#define LQ_SS_PARAMS_VALID		(1 << LQ_SS_PARAMS_VALID_POS)

/**
 * struct iwl_lq_cmd - link quality command
 * @sta_id: station to update
 * @control: not used
 * @flags: combination of LQ_FLAG_*
 * @mimo_delim: the first SISO index in rs_table, which separates MIMO
 *	and SISO rates
 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
 *	Should be ANT_[ABC]
 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
 * @initial_rate_index: first index from rs_table per AC category
 * @agg_time_limit: aggregation max time threshold in usec/100, meaning
 *	value of 100 is one usec. Range is 100 to 8000
 * @agg_disable_start_th: try-count threshold for starting aggregation.
 *	If a frame has higher try-count, it should not be selected for
 *	starting an aggregation sequence.
 * @agg_frame_cnt_limit: max frame count in an aggregation.
 *	0: no limit
 *	1: no aggregation (one frame per aggregation)
 *	2 - 0x3f: maximal number of frames (up to 3f == 63)
 * @rs_table: array of rates for each TX try, each is rate_n_flags,
 *	meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
 * @ss_params: single stream features. declare whether STBC or BFER are allowed.
 */
struct iwl_lq_cmd {
	u8 sta_id;
	u8 reduced_tpc;
	u16 control;
	/* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
	u8 flags;
	u8 mimo_delim;
	u8 single_stream_ant_msk;
	u8 dual_stream_ant_msk;
	u8 initial_rate_index[AC_NUM];
	/* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
	__le16 agg_time_limit;
	u8 agg_disable_start_th;
	u8 agg_frame_cnt_limit;
	__le32 reserved2;
	__le32 rs_table[LQ_MAX_RETRY_NUM];
	__le32 ss_params;
}; /* LINK_QUALITY_CMD_API_S_VER_1 */
#endif /* __fw_api_rs_h__ */
Commit	Line	Data
8ca151b5 JB	1	/******************************************************************************
	2	*
	3	* This file is provided under a dual BSD/GPLv2 license. When using or
	4	* redistributing this file, you may do so under either license.
	5	*
	6	* GPL LICENSE SUMMARY
	7	*
51368bf7	8	* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
77e40945	9	* Copyright(c) 2017 Intel Deutschland GmbH
8ca151b5 JB	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of version 2 of the GNU General Public License as
	13	* published by the Free Software Foundation.
	14	*
	15	* This program is distributed in the hope that it will be useful, but
	16	* WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	* General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
	23	* USA
	24	*
	25	* The full GNU General Public License is included in this distribution
410dc5aa	26	* in the file called COPYING.
8ca151b5 JB	27	*
8ca151b5 JB	28	* Contact Information:
d01c5366	29	* Intel Linux Wireless <linuxwifi@intel.com>
8ca151b5 JB	30	* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	31	*
	32	* BSD LICENSE
	33	*
51368bf7	34	* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
77e40945	35	* Copyright(c) 2017 Intel Deutschland GmbH
8ca151b5 JB	36	* All rights reserved.
	37	*
	38	* Redistribution and use in source and binary forms, with or without
	39	* modification, are permitted provided that the following conditions
	40	* are met:
	41	*
	42	* * Redistributions of source code must retain the above copyright
	43	* notice, this list of conditions and the following disclaimer.
	44	* * Redistributions in binary form must reproduce the above copyright
	45	* notice, this list of conditions and the following disclaimer in
	46	* the documentation and/or other materials provided with the
	47	* distribution.
	48	* * Neither the name Intel Corporation nor the names of its
	49	* contributors may be used to endorse or promote products derived
	50	* from this software without specific prior written permission.
	51	*
	52	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	53	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	54	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	55	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	56	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	57	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	58	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	59	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	60	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	61	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	62	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	63	*****************************************************************************/
	64
	65	#ifndef __fw_api_rs_h__
	66	#define __fw_api_rs_h__
	67
	68	#include "fw-api-mac.h"
	69
	70	/*
	71	* These serve as indexes into
	72	* struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
d310e405	73	* TODO: avoid overlap between legacy and HT rates
8ca151b5 JB	74	*/
	75	enum {
	76	IWL_RATE_1M_INDEX = 0,
	77	IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
	78	IWL_RATE_2M_INDEX,
	79	IWL_RATE_5M_INDEX,
	80	IWL_RATE_11M_INDEX,
	81	IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
	82	IWL_RATE_6M_INDEX,
	83	IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
4e82dd3a ES	84	IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
	85	IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
	86	IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
8ca151b5 JB	87	IWL_RATE_9M_INDEX,
8ca151b5 JB	88	IWL_RATE_12M_INDEX,
4e82dd3a	89	IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
8ca151b5	90	IWL_RATE_18M_INDEX,
4e82dd3a	91	IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
8ca151b5	92	IWL_RATE_24M_INDEX,
4e82dd3a	93	IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
8ca151b5	94	IWL_RATE_36M_INDEX,
4e82dd3a	95	IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
8ca151b5	96	IWL_RATE_48M_INDEX,
4e82dd3a	97	IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
8ca151b5	98	IWL_RATE_54M_INDEX,
4e82dd3a	99	IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
8ca151b5 JB	100	IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
8ca151b5 JB	101	IWL_RATE_60M_INDEX,
4e82dd3a ES	102	IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
	103	IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
	104	IWL_RATE_MCS_8_INDEX,
	105	IWL_RATE_MCS_9_INDEX,
	106	IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
8ca151b5	107	IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
4e82dd3a	108	IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1,
8ca151b5 JB	109	};
	110
	111	#define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
	112
	113	/* fw API values for legacy bit rates, both OFDM and CCK */
	114	enum {
	115	IWL_RATE_6M_PLCP = 13,
	116	IWL_RATE_9M_PLCP = 15,
	117	IWL_RATE_12M_PLCP = 5,
	118	IWL_RATE_18M_PLCP = 7,
	119	IWL_RATE_24M_PLCP = 9,
	120	IWL_RATE_36M_PLCP = 11,
	121	IWL_RATE_48M_PLCP = 1,
	122	IWL_RATE_54M_PLCP = 3,
	123	IWL_RATE_1M_PLCP = 10,
	124	IWL_RATE_2M_PLCP = 20,
	125	IWL_RATE_5M_PLCP = 55,
	126	IWL_RATE_11M_PLCP = 110,
d310e405	127	IWL_RATE_INVM_PLCP = -1,
8ca151b5 JB	128	};
	129
	130	/*
	131	* rate_n_flags bit fields
	132	*
	133	* The 32-bit value has different layouts in the low 8 bites depending on the
	134	* format. There are three formats, HT, VHT and legacy (11abg, with subformats
	135	* for CCK and OFDM).
	136	*
	137	* High-throughput (HT) rate format
	138	* bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
	139	* Very High-throughput (VHT) rate format
	140	* bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
	141	* Legacy OFDM rate format for bits 7:0
	142	* bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
	143	* Legacy CCK rate format for bits 7:0:
	144	* bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
	145	*/
	146
	147	/* Bit 8: (1) HT format, (0) legacy or VHT format */
	148	#define RATE_MCS_HT_POS 8
	149	#define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)
	150
	151	/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
	152	#define RATE_MCS_CCK_POS 9
	153	#define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)
	154
	155	/* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
	156	#define RATE_MCS_VHT_POS 26
	157	#define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)
	158
	159
	160	/*
	161	* High-throughput (HT) rate format for bits 7:0
	162	*
	163	* 2-0: MCS rate base
	164	* 0) 6 Mbps
	165	* 1) 12 Mbps
	166	* 2) 18 Mbps
	167	* 3) 24 Mbps
	168	* 4) 36 Mbps
	169	* 5) 48 Mbps
	170	* 6) 54 Mbps
	171	* 7) 60 Mbps
	172	* 4-3: 0) Single stream (SISO)
	173	* 1) Dual stream (MIMO)
	174	* 2) Triple stream (MIMO)
	175	* 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
	176	* (bits 7-6 are zero)
	177	*
	178	* Together the low 5 bits work out to the MCS index because we don't
	179	* support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
	180	* streams and 16-23 have three streams. We could also support MCS 32
	181	* which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
	182	*/
	183	#define RATE_HT_MCS_RATE_CODE_MSK 0x7
d310e405 ES	184	#define RATE_HT_MCS_NSS_POS 3
d310e405 ES	185	#define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS)
8ca151b5 JB	186
	187	/* Bit 10: (1) Use Green Field preamble */
	188	#define RATE_HT_MCS_GF_POS 10
	189	#define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS)
	190
	191	#define RATE_HT_MCS_INDEX_MSK 0x3f
	192
	193	/*
	194	* Very High-throughput (VHT) rate format for bits 7:0
	195	*
	196	* 3-0: VHT MCS (0-9)
	197	* 5-4: number of streams - 1:
	198	* 0) Single stream (SISO)
	199	* 1) Dual stream (MIMO)
	200	* 2) Triple stream (MIMO)
	201	*/
	202
	203	/* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
	204	#define RATE_VHT_MCS_RATE_CODE_MSK 0xf
	205	#define RATE_VHT_MCS_NSS_POS 4
	206	#define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS)
	207
	208	/*
	209	* Legacy OFDM rate format for bits 7:0
	210	*
	211	* 3-0: 0xD) 6 Mbps
	212	* 0xF) 9 Mbps
	213	* 0x5) 12 Mbps
	214	* 0x7) 18 Mbps
	215	* 0x9) 24 Mbps
	216	* 0xB) 36 Mbps
	217	* 0x1) 48 Mbps
	218	* 0x3) 54 Mbps
	219	* (bits 7-4 are 0)
	220	*
	221	* Legacy CCK rate format for bits 7:0:
	222	* bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
	223	*
	224	* 6-0: 10) 1 Mbps
	225	* 20) 2 Mbps
	226	* 55) 5.5 Mbps
	227	* 110) 11 Mbps
	228	* (bit 7 is 0)
	229	*/
	230	#define RATE_LEGACY_RATE_MSK 0xff
	231
77e40945 SS	232	/* Bit 10 - OFDM HE */
	233	#define RATE_MCS_OFDM_HE_POS 10
	234	#define RATE_MCS_OFDM_HE_MSK BIT(RATE_MCS_OFDM_HE_POS)
8ca151b5 JB	235
	236	/*
	237	* Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
	238	* 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
	239	*/
	240	#define RATE_MCS_CHAN_WIDTH_POS 11
	241	#define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS)
	242	#define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS)
	243	#define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS)
	244	#define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS)
	245	#define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS)
	246
	247	/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
	248	#define RATE_MCS_SGI_POS 13
	249	#define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
	250
	251	/* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
	252	#define RATE_MCS_ANT_POS 14
	253	#define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS)
	254	#define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
	255	#define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS)
	256	#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK \| \
	257	RATE_MCS_ANT_B_MSK)
	258	#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK \| \
	259	RATE_MCS_ANT_C_MSK)
	260	#define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK
	261	#define RATE_MCS_ANT_NUM 3
	262
77e40945	263	/* Bit 17: (0) SS, (1) SS2 /
8ca151b5	264	#define RATE_MCS_STBC_POS 17
77e40945 SS	265	#define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS)
	266
	267	/* Bit 18: OFDM-HE dual carrier mode */
	268	#define RATE_HE_DUAL_CARRIER_MODE 18
	269	#define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE)
8ca151b5 JB	270
	271	/* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
	272	#define RATE_MCS_BF_POS 19
	273	#define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS)
	274
77e40945 SS	275	/*
	276	* Bit 20-21: HE guard interval and LTF type.
	277	* (0) 1xLTF+1.6us, (1) 2xLTF+0.8us,
	278	* (2) 2xLTF+1.6us, (3) 4xLTF+3.2us
	279	*/
	280	#define RATE_MCS_HE_GI_LTF_POS 20
	281	#define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS)
	282
	283	/* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
	284	#define RATE_MCS_HE_TYPE_POS 22
	285	#define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS)
8ca151b5 JB	286
	287	/* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
	288	#define RATE_MCS_DUP_POS 24
	289	#define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS)
	290
	291	/* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
	292	#define RATE_MCS_LDPC_POS 27
	293	#define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
	294
	295
	296	/* Link Quality definitions */
	297
	298	/* # entries in rate scale table to support Tx retries */
	299	#define LQ_MAX_RETRY_NUM 16
	300
d307ec8d ES	301	/* Link quality command flags bit fields */
	302
	303	/* Bit 0: (0) Don't use RTS (1) Use RTS */
	304	#define LQ_FLAG_USE_RTS_POS 0
	305	#define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS)
	306
	307	/* Bit 1-3: LQ command color. Used to match responses to LQ commands */
	308	#define LQ_FLAG_COLOR_POS 1
	309	#define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS)
ea42d1cb GG	310	#define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\
	311	LQ_FLAG_COLOR_POS)
	312	#define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
	313	LQ_FLAG_COLOR_MSK)
	314	#define LQ_FLAG_COLOR_SET(_f, _c) ((_c) \| ((_f) & ~LQ_FLAG_COLOR_MSK))
d307ec8d ES	315
	316	/* Bit 4-5: Tx RTS BW Signalling
	317	* (0) No RTS BW signalling
	318	* (1) Static BW signalling
	319	* (2) Dynamic BW signalling
	320	*/
	321	#define LQ_FLAG_RTS_BW_SIG_POS 4
	322	#define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS)
	323	#define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS)
	324	#define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS)
	325
	326	/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
	327	* Dyanmic BW selection allows Tx with narrower BW then requested in rates
	328	*/
	329	#define LQ_FLAG_DYNAMIC_BW_POS 6
	330	#define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS)
8ca151b5	331
3d44eebf ES	332	/* Single Stream Tx Parameters (lq_cmd->ss_params)
	333	* Flags to control a smart FW decision about whether BFER/STBC/SISO will be
	334	* used for single stream Tx.
c5d679a5	335	*/
3d44eebf ES	336
	337	/* Bit 0-1: Max STBC streams allowed. Can be 0-3.
	338	* (0) - No STBC allowed
	339	* (1) - 2x1 STBC allowed (HT/VHT)
	340	* (2) - 4x2 STBC allowed (HT/VHT)
	341	* (3) - 3x2 STBC allowed (HT only)
	342	* All our chips are at most 2 antennas so only (1) is valid for now.
	343	*/
	344	#define LQ_SS_STBC_ALLOWED_POS 0
	345	#define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK)
	346
	347	/* 2x1 STBC is allowed */
	348	#define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS)
	349
	350	/* Bit 2: Beamformer (VHT only) is allowed */
	351	#define LQ_SS_BFER_ALLOWED_POS 2
	352	#define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS)
	353
1e9c62fa ES	354	/* Bit 3: Force BFER or STBC for testing
	355	* If this is set:
	356	* If BFER is allowed then force the ucode to choose BFER else
	357	* If STBC is allowed then force the ucode to choose STBC over SISO
	358	*/
	359	#define LQ_SS_FORCE_POS 3
	360	#define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS)
	361
3d44eebf ES	362	/* Bit 31: ss_params field is valid. Used for FW backward compatibility
	363	* with other drivers which don't support the ss_params API yet
	364	*/
	365	#define LQ_SS_PARAMS_VALID_POS 31
	366	#define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS)
c5d679a5	367
8ca151b5 JB	368	/**
	369	* struct iwl_lq_cmd - link quality command
	370	* @sta_id: station to update
	371	* @control: not used
	372	* @flags: combination of LQ_FLAG_*
	373	* @mimo_delim: the first SISO index in rs_table, which separates MIMO
	374	* and SISO rates
	375	* @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
	376	* Should be ANT_[ABC]
	377	* @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
	378	* @initial_rate_index: first index from rs_table per AC category
	379	* @agg_time_limit: aggregation max time threshold in usec/100, meaning
	380	* value of 100 is one usec. Range is 100 to 8000
	381	* @agg_disable_start_th: try-count threshold for starting aggregation.
	382	* If a frame has higher try-count, it should not be selected for
	383	* starting an aggregation sequence.
	384	* @agg_frame_cnt_limit: max frame count in an aggregation.
	385	* 0: no limit
	386	* 1: no aggregation (one frame per aggregation)
	387	* 2 - 0x3f: maximal number of frames (up to 3f == 63)
	388	* @rs_table: array of rates for each TX try, each is rate_n_flags,
	389	* meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
c5d679a5	390	* @ss_params: single stream features. declare whether STBC or BFER are allowed.
8ca151b5 JB	391	*/
	392	struct iwl_lq_cmd {
	393	u8 sta_id;
3a84b69e	394	u8 reduced_tpc;
8ca151b5 JB	395	u16 control;
	396	/* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
	397	u8 flags;
	398	u8 mimo_delim;
	399	u8 single_stream_ant_msk;
	400	u8 dual_stream_ant_msk;
	401	u8 initial_rate_index[AC_NUM];
	402	/* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
	403	__le16 agg_time_limit;
	404	u8 agg_disable_start_th;
	405	u8 agg_frame_cnt_limit;
	406	__le32 reserved2;
	407	__le32 rs_table[LQ_MAX_RETRY_NUM];
c5d679a5	408	__le32 ss_params;
8ca151b5 JB	409	}; /* LINK_QUALITY_CMD_API_S_VER_1 */
8ca151b5 JB	410	#endif /* __fw_api_rs_h__ */