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8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
8d193ca2 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
bdccdb85 | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of version 2 of the GNU General Public License as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
24 | * USA | |
25 | * | |
26 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 27 | * in the file called COPYING. |
8ca151b5 JB |
28 | * |
29 | * Contact Information: | |
cb2f8277 | 30 | * Intel Linux Wireless <linuxwifi@intel.com> |
8ca151b5 JB |
31 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
32 | * | |
33 | * BSD LICENSE | |
34 | * | |
51368bf7 | 35 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
8d193ca2 | 36 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
bdccdb85 | 37 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
38 | * All rights reserved. |
39 | * | |
40 | * Redistribution and use in source and binary forms, with or without | |
41 | * modification, are permitted provided that the following conditions | |
42 | * are met: | |
43 | * | |
44 | * * Redistributions of source code must retain the above copyright | |
45 | * notice, this list of conditions and the following disclaimer. | |
46 | * * Redistributions in binary form must reproduce the above copyright | |
47 | * notice, this list of conditions and the following disclaimer in | |
48 | * the documentation and/or other materials provided with the | |
49 | * distribution. | |
50 | * * Neither the name Intel Corporation nor the names of its | |
51 | * contributors may be used to endorse or promote products derived | |
52 | * from this software without specific prior written permission. | |
53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
55 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
56 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
57 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
58 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
59 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
60 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
61 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
62 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
63 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
64 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
65 | * | |
66 | *****************************************************************************/ | |
67 | #include <net/mac80211.h> | |
854d773e | 68 | #include <linux/netdevice.h> |
da2830ac | 69 | #include <linux/acpi.h> |
8ca151b5 JB |
70 | |
71 | #include "iwl-trans.h" | |
72 | #include "iwl-op-mode.h" | |
73 | #include "iwl-fw.h" | |
74 | #include "iwl-debug.h" | |
75 | #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ | |
76 | #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ | |
8c23f95c | 77 | #include "iwl-prph.h" |
8ca151b5 JB |
78 | #include "iwl-eeprom-parse.h" |
79 | ||
80 | #include "mvm.h" | |
2f89a5d7 | 81 | #include "fw-dbg.h" |
8ca151b5 JB |
82 | #include "iwl-phy-db.h" |
83 | ||
84 | #define MVM_UCODE_ALIVE_TIMEOUT HZ | |
85 | #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) | |
86 | ||
87 | #define UCODE_VALID_OK cpu_to_le32(0x1) | |
88 | ||
8ca151b5 JB |
89 | struct iwl_mvm_alive_data { |
90 | bool valid; | |
91 | u32 scd_base_addr; | |
92 | }; | |
93 | ||
8ca151b5 JB |
94 | static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) |
95 | { | |
96 | struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { | |
97 | .valid = cpu_to_le32(valid_tx_ant), | |
98 | }; | |
99 | ||
33223542 | 100 | IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); |
a1022927 | 101 | return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, |
8ca151b5 JB |
102 | sizeof(tx_ant_cmd), &tx_ant_cmd); |
103 | } | |
104 | ||
43413a97 SS |
105 | static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) |
106 | { | |
107 | int i; | |
108 | struct iwl_rss_config_cmd cmd = { | |
109 | .flags = cpu_to_le32(IWL_RSS_ENABLE), | |
110 | .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | | |
854d773e | 111 | IWL_RSS_HASH_TYPE_IPV4_UDP | |
43413a97 SS |
112 | IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | |
113 | IWL_RSS_HASH_TYPE_IPV6_TCP | | |
854d773e | 114 | IWL_RSS_HASH_TYPE_IPV6_UDP | |
43413a97 SS |
115 | IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, |
116 | }; | |
117 | ||
f43495fd SS |
118 | if (mvm->trans->num_rx_queues == 1) |
119 | return 0; | |
120 | ||
854d773e | 121 | /* Do not direct RSS traffic to Q 0 which is our fallback queue */ |
43413a97 | 122 | for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) |
854d773e SS |
123 | cmd.indirection_table[i] = |
124 | 1 + (i % (mvm->trans->num_rx_queues - 1)); | |
125 | netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); | |
43413a97 SS |
126 | |
127 | return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); | |
128 | } | |
129 | ||
97d5be7e LK |
130 | static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) |
131 | { | |
132 | struct iwl_dqa_enable_cmd dqa_cmd = { | |
133 | .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), | |
134 | }; | |
135 | u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); | |
136 | int ret; | |
137 | ||
138 | ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); | |
139 | if (ret) | |
140 | IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); | |
141 | else | |
142 | IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); | |
143 | ||
144 | return ret; | |
145 | } | |
146 | ||
905e36ae | 147 | void iwl_free_fw_paging(struct iwl_mvm *mvm) |
a6c4fb44 MG |
148 | { |
149 | int i; | |
150 | ||
151 | if (!mvm->fw_paging_db[0].fw_paging_block) | |
152 | return; | |
153 | ||
154 | for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) { | |
3edbc7da EG |
155 | struct iwl_fw_paging *paging = &mvm->fw_paging_db[i]; |
156 | ||
157 | if (!paging->fw_paging_block) { | |
a6c4fb44 MG |
158 | IWL_DEBUG_FW(mvm, |
159 | "Paging: block %d already freed, continue to next page\n", | |
160 | i); | |
161 | ||
162 | continue; | |
163 | } | |
3edbc7da EG |
164 | dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys, |
165 | paging->fw_paging_size, DMA_BIDIRECTIONAL); | |
a6c4fb44 | 166 | |
3edbc7da EG |
167 | __free_pages(paging->fw_paging_block, |
168 | get_order(paging->fw_paging_size)); | |
169 | paging->fw_paging_block = NULL; | |
a6c4fb44 | 170 | } |
e1120187 | 171 | kfree(mvm->trans->paging_download_buf); |
905e36ae | 172 | mvm->trans->paging_download_buf = NULL; |
f742aaf3 | 173 | mvm->trans->paging_db = NULL; |
905e36ae | 174 | |
a6c4fb44 MG |
175 | memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db)); |
176 | } | |
177 | ||
178 | static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image) | |
179 | { | |
180 | int sec_idx, idx; | |
181 | u32 offset = 0; | |
182 | ||
183 | /* | |
184 | * find where is the paging image start point: | |
185 | * if CPU2 exist and it's in paging format, then the image looks like: | |
186 | * CPU1 sections (2 or more) | |
187 | * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2 | |
188 | * CPU2 sections (not paged) | |
189 | * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2 | |
190 | * non paged to CPU2 paging sec | |
191 | * CPU2 paging CSS | |
192 | * CPU2 paging image (including instruction and data) | |
193 | */ | |
eef187a7 | 194 | for (sec_idx = 0; sec_idx < image->num_sec; sec_idx++) { |
a6c4fb44 MG |
195 | if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) { |
196 | sec_idx++; | |
197 | break; | |
198 | } | |
199 | } | |
200 | ||
cd47a3d3 MG |
201 | /* |
202 | * If paging is enabled there should be at least 2 more sections left | |
203 | * (one for CSS and one for Paging data) | |
204 | */ | |
eef187a7 | 205 | if (sec_idx >= image->num_sec - 1) { |
cd47a3d3 | 206 | IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n"); |
a6c4fb44 MG |
207 | iwl_free_fw_paging(mvm); |
208 | return -EINVAL; | |
209 | } | |
210 | ||
211 | /* copy the CSS block to the dram */ | |
212 | IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n", | |
213 | sec_idx); | |
214 | ||
215 | memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block), | |
216 | image->sec[sec_idx].data, | |
217 | mvm->fw_paging_db[0].fw_paging_size); | |
4b70f076 SS |
218 | dma_sync_single_for_device(mvm->trans->dev, |
219 | mvm->fw_paging_db[0].fw_paging_phys, | |
220 | mvm->fw_paging_db[0].fw_paging_size, | |
221 | DMA_BIDIRECTIONAL); | |
a6c4fb44 MG |
222 | |
223 | IWL_DEBUG_FW(mvm, | |
224 | "Paging: copied %d CSS bytes to first block\n", | |
225 | mvm->fw_paging_db[0].fw_paging_size); | |
226 | ||
227 | sec_idx++; | |
228 | ||
229 | /* | |
230 | * copy the paging blocks to the dram | |
231 | * loop index start from 1 since that CSS block already copied to dram | |
232 | * and CSS index is 0. | |
233 | * loop stop at num_of_paging_blk since that last block is not full. | |
234 | */ | |
235 | for (idx = 1; idx < mvm->num_of_paging_blk; idx++) { | |
4b70f076 SS |
236 | struct iwl_fw_paging *block = &mvm->fw_paging_db[idx]; |
237 | ||
238 | memcpy(page_address(block->fw_paging_block), | |
a6c4fb44 | 239 | image->sec[sec_idx].data + offset, |
4b70f076 SS |
240 | block->fw_paging_size); |
241 | dma_sync_single_for_device(mvm->trans->dev, | |
242 | block->fw_paging_phys, | |
243 | block->fw_paging_size, | |
244 | DMA_BIDIRECTIONAL); | |
245 | ||
a6c4fb44 MG |
246 | |
247 | IWL_DEBUG_FW(mvm, | |
248 | "Paging: copied %d paging bytes to block %d\n", | |
249 | mvm->fw_paging_db[idx].fw_paging_size, | |
250 | idx); | |
251 | ||
252 | offset += mvm->fw_paging_db[idx].fw_paging_size; | |
253 | } | |
254 | ||
255 | /* copy the last paging block */ | |
256 | if (mvm->num_of_pages_in_last_blk > 0) { | |
4b70f076 SS |
257 | struct iwl_fw_paging *block = &mvm->fw_paging_db[idx]; |
258 | ||
259 | memcpy(page_address(block->fw_paging_block), | |
a6c4fb44 MG |
260 | image->sec[sec_idx].data + offset, |
261 | FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk); | |
4b70f076 SS |
262 | dma_sync_single_for_device(mvm->trans->dev, |
263 | block->fw_paging_phys, | |
264 | block->fw_paging_size, | |
265 | DMA_BIDIRECTIONAL); | |
a6c4fb44 MG |
266 | |
267 | IWL_DEBUG_FW(mvm, | |
268 | "Paging: copied %d pages in the last block %d\n", | |
269 | mvm->num_of_pages_in_last_blk, idx); | |
270 | } | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
bdccdb85 GBA |
275 | void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, |
276 | struct iwl_rx_cmd_buffer *rxb) | |
277 | { | |
278 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
279 | struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; | |
280 | __le32 *dump_data = mfu_dump_notif->data; | |
281 | int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); | |
282 | int i; | |
283 | ||
284 | if (mfu_dump_notif->index_num == 0) | |
285 | IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", | |
286 | le32_to_cpu(mfu_dump_notif->assert_id)); | |
287 | ||
288 | for (i = 0; i < n_words; i++) | |
289 | IWL_DEBUG_INFO(mvm, | |
290 | "MFUART assert dump, dword %u: 0x%08x\n", | |
291 | le16_to_cpu(mfu_dump_notif->index_num) * | |
292 | n_words + i, | |
293 | le32_to_cpu(dump_data[i])); | |
294 | } | |
295 | ||
a6c4fb44 MG |
296 | static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm, |
297 | const struct fw_img *image) | |
298 | { | |
299 | struct page *block; | |
300 | dma_addr_t phys = 0; | |
08d785fd | 301 | int blk_idx, order, num_of_pages, size, dma_enabled; |
a6c4fb44 MG |
302 | |
303 | if (mvm->fw_paging_db[0].fw_paging_block) | |
304 | return 0; | |
305 | ||
306 | dma_enabled = is_device_dma_capable(mvm->trans->dev); | |
307 | ||
308 | /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */ | |
309 | BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE); | |
310 | ||
311 | num_of_pages = image->paging_mem_size / FW_PAGING_SIZE; | |
850fe9af SS |
312 | mvm->num_of_paging_blk = |
313 | DIV_ROUND_UP(num_of_pages, NUM_OF_PAGE_PER_GROUP); | |
a6c4fb44 MG |
314 | mvm->num_of_pages_in_last_blk = |
315 | num_of_pages - | |
316 | NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1); | |
317 | ||
318 | IWL_DEBUG_FW(mvm, | |
319 | "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n", | |
320 | mvm->num_of_paging_blk, | |
321 | mvm->num_of_pages_in_last_blk); | |
322 | ||
a6c4fb44 | 323 | /* |
08d785fd | 324 | * Allocate CSS and paging blocks in dram. |
a6c4fb44 | 325 | */ |
08d785fd SS |
326 | for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { |
327 | /* For CSS allocate 4KB, for others PAGING_BLOCK_SIZE (32K) */ | |
328 | size = blk_idx ? PAGING_BLOCK_SIZE : FW_PAGING_SIZE; | |
329 | order = get_order(size); | |
a6c4fb44 MG |
330 | block = alloc_pages(GFP_KERNEL, order); |
331 | if (!block) { | |
332 | /* free all the previous pages since we failed */ | |
333 | iwl_free_fw_paging(mvm); | |
334 | return -ENOMEM; | |
335 | } | |
336 | ||
337 | mvm->fw_paging_db[blk_idx].fw_paging_block = block; | |
08d785fd | 338 | mvm->fw_paging_db[blk_idx].fw_paging_size = size; |
a6c4fb44 MG |
339 | |
340 | if (dma_enabled) { | |
341 | phys = dma_map_page(mvm->trans->dev, block, 0, | |
342 | PAGE_SIZE << order, | |
343 | DMA_BIDIRECTIONAL); | |
344 | if (dma_mapping_error(mvm->trans->dev, phys)) { | |
345 | /* | |
346 | * free the previous pages and the current one | |
347 | * since we failed to map_page. | |
348 | */ | |
349 | iwl_free_fw_paging(mvm); | |
350 | return -ENOMEM; | |
351 | } | |
352 | mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; | |
e1120187 MG |
353 | } else { |
354 | mvm->fw_paging_db[blk_idx].fw_paging_phys = | |
355 | PAGING_ADDR_SIG | | |
356 | blk_idx << BLOCK_2_EXP_SIZE; | |
a6c4fb44 MG |
357 | } |
358 | ||
08d785fd SS |
359 | if (!blk_idx) |
360 | IWL_DEBUG_FW(mvm, | |
361 | "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n", | |
362 | order); | |
363 | else | |
364 | IWL_DEBUG_FW(mvm, | |
365 | "Paging: allocated 32K bytes (order %d) for firmware paging.\n", | |
366 | order); | |
a6c4fb44 MG |
367 | } |
368 | ||
369 | return 0; | |
370 | } | |
371 | ||
372 | static int iwl_save_fw_paging(struct iwl_mvm *mvm, | |
373 | const struct fw_img *fw) | |
374 | { | |
375 | int ret; | |
376 | ||
377 | ret = iwl_alloc_fw_paging_mem(mvm, fw); | |
378 | if (ret) | |
379 | return ret; | |
380 | ||
381 | return iwl_fill_paging_mem(mvm, fw); | |
382 | } | |
383 | ||
384 | /* send paging cmd to FW in case CPU2 has paging image */ | |
385 | static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw) | |
386 | { | |
d975d720 | 387 | struct iwl_fw_paging_cmd paging_cmd = { |
a6c4fb44 MG |
388 | .flags = |
389 | cpu_to_le32(PAGING_CMD_IS_SECURED | | |
390 | PAGING_CMD_IS_ENABLED | | |
391 | (mvm->num_of_pages_in_last_blk << | |
392 | PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)), | |
393 | .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE), | |
394 | .block_num = cpu_to_le32(mvm->num_of_paging_blk), | |
395 | }; | |
d975d720 SS |
396 | int blk_idx, size = sizeof(paging_cmd); |
397 | ||
398 | /* A bit hard coded - but this is the old API and will be deprecated */ | |
399 | if (!iwl_mvm_has_new_tx_api(mvm)) | |
400 | size -= NUM_OF_FW_PAGING_BLOCKS * 4; | |
a6c4fb44 MG |
401 | |
402 | /* loop for for all paging blocks + CSS block */ | |
403 | for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { | |
d975d720 SS |
404 | dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys; |
405 | ||
406 | addr = addr >> PAGE_2_EXP_SIZE; | |
407 | ||
408 | if (iwl_mvm_has_new_tx_api(mvm)) { | |
409 | __le64 phy_addr = cpu_to_le64(addr); | |
410 | ||
411 | paging_cmd.device_phy_addr.addr64[blk_idx] = phy_addr; | |
412 | } else { | |
413 | __le32 phy_addr = cpu_to_le32(addr); | |
414 | ||
415 | paging_cmd.device_phy_addr.addr32[blk_idx] = phy_addr; | |
416 | } | |
a6c4fb44 MG |
417 | } |
418 | ||
419 | return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD, | |
420 | IWL_ALWAYS_LONG_GROUP, 0), | |
d975d720 | 421 | 0, size, &paging_cmd); |
a6c4fb44 MG |
422 | } |
423 | ||
e1120187 MG |
424 | /* |
425 | * Send paging item cmd to FW in case CPU2 has paging image | |
426 | */ | |
427 | static int iwl_trans_get_paging_item(struct iwl_mvm *mvm) | |
428 | { | |
429 | int ret; | |
430 | struct iwl_fw_get_item_cmd fw_get_item_cmd = { | |
431 | .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING), | |
432 | }; | |
433 | ||
434 | struct iwl_fw_get_item_resp *item_resp; | |
435 | struct iwl_host_cmd cmd = { | |
436 | .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0), | |
437 | .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, | |
438 | .data = { &fw_get_item_cmd, }, | |
439 | }; | |
440 | ||
441 | cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd); | |
442 | ||
443 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
444 | if (ret) { | |
445 | IWL_ERR(mvm, | |
446 | "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n", | |
447 | ret); | |
448 | return ret; | |
449 | } | |
450 | ||
451 | item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data; | |
452 | if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) { | |
453 | IWL_ERR(mvm, | |
454 | "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n", | |
455 | le32_to_cpu(item_resp->item_id)); | |
456 | ret = -EIO; | |
457 | goto exit; | |
458 | } | |
459 | ||
c94d7996 MG |
460 | /* Add an extra page for headers */ |
461 | mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE + | |
462 | FW_PAGING_SIZE, | |
e1120187 MG |
463 | GFP_KERNEL); |
464 | if (!mvm->trans->paging_download_buf) { | |
465 | ret = -ENOMEM; | |
466 | goto exit; | |
467 | } | |
468 | mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val); | |
469 | mvm->trans->paging_db = mvm->fw_paging_db; | |
470 | IWL_DEBUG_FW(mvm, | |
471 | "Paging: got paging request address (paging_req_addr 0x%08x)\n", | |
472 | mvm->trans->paging_req_addr); | |
473 | ||
474 | exit: | |
475 | iwl_free_resp(&cmd); | |
476 | ||
477 | return ret; | |
478 | } | |
479 | ||
8ca151b5 JB |
480 | static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, |
481 | struct iwl_rx_packet *pkt, void *data) | |
482 | { | |
483 | struct iwl_mvm *mvm = | |
484 | container_of(notif_wait, struct iwl_mvm, notif_wait); | |
485 | struct iwl_mvm_alive_data *alive_data = data; | |
5c228d63 | 486 | struct mvm_alive_resp_v3 *palive3; |
7e1223b5 | 487 | struct mvm_alive_resp *palive; |
5c228d63 SS |
488 | struct iwl_umac_alive *umac; |
489 | struct iwl_lmac_alive *lmac1; | |
490 | struct iwl_lmac_alive *lmac2 = NULL; | |
491 | u16 status; | |
01a9ca51 | 492 | |
5c228d63 SS |
493 | if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { |
494 | palive = (void *)pkt->data; | |
495 | umac = &palive->umac_data; | |
496 | lmac1 = &palive->lmac_data[0]; | |
497 | lmac2 = &palive->lmac_data[1]; | |
498 | status = le16_to_cpu(palive->status); | |
499 | } else { | |
500 | palive3 = (void *)pkt->data; | |
501 | umac = &palive3->umac_data; | |
502 | lmac1 = &palive3->lmac_data; | |
503 | status = le16_to_cpu(palive3->status); | |
504 | } | |
01a9ca51 | 505 | |
5c228d63 SS |
506 | mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr); |
507 | if (lmac2) | |
508 | mvm->error_event_table[1] = | |
509 | le32_to_cpu(lmac2->error_event_table_ptr); | |
510 | mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr); | |
511 | mvm->sf_space.addr = le32_to_cpu(lmac1->st_fwrd_addr); | |
512 | mvm->sf_space.size = le32_to_cpu(lmac1->st_fwrd_size); | |
ffa70264 | 513 | |
5c228d63 | 514 | mvm->umac_error_event_table = le32_to_cpu(umac->error_info_addr); |
01a9ca51 | 515 | |
5c228d63 SS |
516 | alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr); |
517 | alive_data->valid = status == IWL_ALIVE_STATUS_OK; | |
518 | if (mvm->umac_error_event_table) | |
519 | mvm->support_umac_log = true; | |
7e1223b5 | 520 | |
5c228d63 SS |
521 | IWL_DEBUG_FW(mvm, |
522 | "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", | |
523 | status, lmac1->ver_type, lmac1->ver_subtype); | |
7e1223b5 | 524 | |
5c228d63 SS |
525 | if (lmac2) |
526 | IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); | |
7e1223b5 | 527 | |
5c228d63 SS |
528 | IWL_DEBUG_FW(mvm, |
529 | "UMAC version: Major - 0x%x, Minor - 0x%x\n", | |
530 | le32_to_cpu(umac->umac_major), | |
531 | le32_to_cpu(umac->umac_minor)); | |
8ca151b5 JB |
532 | |
533 | return true; | |
534 | } | |
535 | ||
1f370650 SS |
536 | static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, |
537 | struct iwl_rx_packet *pkt, void *data) | |
538 | { | |
539 | WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); | |
540 | ||
541 | return true; | |
542 | } | |
543 | ||
8ca151b5 JB |
544 | static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, |
545 | struct iwl_rx_packet *pkt, void *data) | |
546 | { | |
547 | struct iwl_phy_db *phy_db = data; | |
548 | ||
549 | if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { | |
550 | WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); | |
551 | return true; | |
552 | } | |
553 | ||
ce1f2778 | 554 | WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); |
8ca151b5 JB |
555 | |
556 | return false; | |
557 | } | |
558 | ||
1f370650 SS |
559 | static int iwl_mvm_init_paging(struct iwl_mvm *mvm) |
560 | { | |
561 | const struct fw_img *fw = &mvm->fw->img[mvm->cur_ucode]; | |
562 | int ret; | |
563 | ||
564 | /* | |
565 | * Configure and operate fw paging mechanism. | |
566 | * The driver configures the paging flow only once. | |
567 | * The CPU2 paging image is included in the IWL_UCODE_INIT image. | |
568 | */ | |
569 | if (!fw->paging_mem_size) | |
570 | return 0; | |
571 | ||
572 | /* | |
573 | * When dma is not enabled, the driver needs to copy / write | |
574 | * the downloaded / uploaded page to / from the smem. | |
575 | * This gets the location of the place were the pages are | |
576 | * stored. | |
577 | */ | |
578 | if (!is_device_dma_capable(mvm->trans->dev)) { | |
579 | ret = iwl_trans_get_paging_item(mvm); | |
580 | if (ret) { | |
581 | IWL_ERR(mvm, "failed to get FW paging item\n"); | |
582 | return ret; | |
583 | } | |
584 | } | |
585 | ||
586 | ret = iwl_save_fw_paging(mvm, fw); | |
587 | if (ret) { | |
588 | IWL_ERR(mvm, "failed to save the FW paging image\n"); | |
589 | return ret; | |
590 | } | |
591 | ||
592 | ret = iwl_send_paging_cmd(mvm, fw); | |
593 | if (ret) { | |
594 | IWL_ERR(mvm, "failed to send the paging cmd\n"); | |
595 | iwl_free_fw_paging(mvm); | |
596 | return ret; | |
597 | } | |
598 | ||
599 | return 0; | |
600 | } | |
8ca151b5 JB |
601 | static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, |
602 | enum iwl_ucode_type ucode_type) | |
603 | { | |
604 | struct iwl_notification_wait alive_wait; | |
605 | struct iwl_mvm_alive_data alive_data; | |
606 | const struct fw_img *fw; | |
607 | int ret, i; | |
608 | enum iwl_ucode_type old_type = mvm->cur_ucode; | |
6eb031d2 | 609 | static const u16 alive_cmd[] = { MVM_ALIVE }; |
91479b64 | 610 | struct iwl_sf_region st_fwrd_space; |
8ca151b5 | 611 | |
61df750c | 612 | if (ucode_type == IWL_UCODE_REGULAR && |
3d2d4422 GBA |
613 | iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && |
614 | !(fw_has_capa(&mvm->fw->ucode_capa, | |
615 | IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) | |
612da1ef | 616 | fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); |
61df750c | 617 | else |
612da1ef | 618 | fw = iwl_get_ucode_image(mvm->fw, ucode_type); |
befe9b6f | 619 | if (WARN_ON(!fw)) |
8ca151b5 | 620 | return -EINVAL; |
befe9b6f JB |
621 | mvm->cur_ucode = ucode_type; |
622 | mvm->ucode_loaded = false; | |
8ca151b5 JB |
623 | |
624 | iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, | |
625 | alive_cmd, ARRAY_SIZE(alive_cmd), | |
626 | iwl_alive_fn, &alive_data); | |
627 | ||
628 | ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); | |
629 | if (ret) { | |
630 | mvm->cur_ucode = old_type; | |
631 | iwl_remove_notification(&mvm->notif_wait, &alive_wait); | |
632 | return ret; | |
633 | } | |
634 | ||
635 | /* | |
636 | * Some things may run in the background now, but we | |
637 | * just wait for the ALIVE notification here. | |
638 | */ | |
639 | ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, | |
640 | MVM_UCODE_ALIVE_TIMEOUT); | |
641 | if (ret) { | |
d6be9c1d SS |
642 | struct iwl_trans *trans = mvm->trans; |
643 | ||
644 | if (trans->cfg->gen2) | |
645 | IWL_ERR(mvm, | |
646 | "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", | |
647 | iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS), | |
648 | iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS)); | |
649 | else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) | |
192de2b4 DS |
650 | IWL_ERR(mvm, |
651 | "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", | |
d6be9c1d SS |
652 | iwl_read_prph(trans, SB_CPU_1_STATUS), |
653 | iwl_read_prph(trans, SB_CPU_2_STATUS)); | |
8ca151b5 JB |
654 | mvm->cur_ucode = old_type; |
655 | return ret; | |
656 | } | |
657 | ||
658 | if (!alive_data.valid) { | |
659 | IWL_ERR(mvm, "Loaded ucode is not valid!\n"); | |
660 | mvm->cur_ucode = old_type; | |
661 | return -EIO; | |
662 | } | |
663 | ||
91479b64 EH |
664 | /* |
665 | * update the sdio allocation according to the pointer we get in the | |
666 | * alive notification. | |
667 | */ | |
668 | st_fwrd_space.addr = mvm->sf_space.addr; | |
669 | st_fwrd_space.size = mvm->sf_space.size; | |
670 | ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space); | |
82e8aea0 ES |
671 | if (ret) { |
672 | IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret); | |
673 | return ret; | |
674 | } | |
91479b64 | 675 | |
8ca151b5 JB |
676 | iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); |
677 | ||
678 | /* | |
679 | * Note: all the queues are enabled as part of the interface | |
680 | * initialization, but in firmware restart scenarios they | |
681 | * could be stopped, so wake them up. In firmware restart, | |
682 | * mac80211 will have the queues stopped as well until the | |
683 | * reconfiguration completes. During normal startup, they | |
684 | * will be empty. | |
685 | */ | |
686 | ||
4ecafae9 | 687 | memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); |
097129c9 LK |
688 | if (iwl_mvm_is_dqa_supported(mvm)) |
689 | mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1; | |
690 | else | |
691 | mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1; | |
8ca151b5 | 692 | |
df197c00 JB |
693 | for (i = 0; i < IEEE80211_MAX_QUEUES; i++) |
694 | atomic_set(&mvm->mac80211_queue_stop_count[i], 0); | |
8ca151b5 JB |
695 | |
696 | mvm->ucode_loaded = true; | |
697 | ||
698 | return 0; | |
699 | } | |
8ca151b5 JB |
700 | |
701 | static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) | |
702 | { | |
703 | struct iwl_phy_cfg_cmd phy_cfg_cmd; | |
704 | enum iwl_ucode_type ucode_type = mvm->cur_ucode; | |
705 | ||
706 | /* Set parameters */ | |
a0544272 | 707 | phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); |
8ca151b5 JB |
708 | phy_cfg_cmd.calib_control.event_trigger = |
709 | mvm->fw->default_calib[ucode_type].event_trigger; | |
710 | phy_cfg_cmd.calib_control.flow_trigger = | |
711 | mvm->fw->default_calib[ucode_type].flow_trigger; | |
712 | ||
713 | IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", | |
714 | phy_cfg_cmd.phy_cfg); | |
715 | ||
a1022927 | 716 | return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, |
8ca151b5 JB |
717 | sizeof(phy_cfg_cmd), &phy_cfg_cmd); |
718 | } | |
719 | ||
8ca151b5 JB |
720 | int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) |
721 | { | |
722 | struct iwl_notification_wait calib_wait; | |
6eb031d2 | 723 | static const u16 init_complete[] = { |
8ca151b5 JB |
724 | INIT_COMPLETE_NOTIF, |
725 | CALIB_RES_NOTIF_PHY_DB | |
726 | }; | |
727 | int ret; | |
728 | ||
729 | lockdep_assert_held(&mvm->mutex); | |
730 | ||
8d193ca2 | 731 | if (WARN_ON_ONCE(mvm->calibrating)) |
8ca151b5 JB |
732 | return 0; |
733 | ||
734 | iwl_init_notification_wait(&mvm->notif_wait, | |
735 | &calib_wait, | |
736 | init_complete, | |
737 | ARRAY_SIZE(init_complete), | |
738 | iwl_wait_phy_db_entry, | |
739 | mvm->phy_db); | |
740 | ||
741 | /* Will also start the device */ | |
742 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); | |
743 | if (ret) { | |
744 | IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); | |
745 | goto error; | |
746 | } | |
747 | ||
ae397472 | 748 | ret = iwl_send_bt_init_conf(mvm); |
931d4160 EG |
749 | if (ret) |
750 | goto error; | |
751 | ||
81a67e32 | 752 | /* Read the NVM only at driver load time, no need to do this twice */ |
8ca151b5 JB |
753 | if (read_nvm) { |
754 | /* Read nvm */ | |
14b485f0 | 755 | ret = iwl_nvm_init(mvm, true); |
8ca151b5 JB |
756 | if (ret) { |
757 | IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); | |
758 | goto error; | |
759 | } | |
760 | } | |
761 | ||
81a67e32 | 762 | /* In case we read the NVM from external file, load it to the NIC */ |
e02a9d60 | 763 | if (mvm->nvm_file_name) |
81a67e32 EL |
764 | iwl_mvm_load_nvm_to_nic(mvm); |
765 | ||
8ca151b5 JB |
766 | ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); |
767 | WARN_ON(ret); | |
768 | ||
4f59334b EH |
769 | /* |
770 | * abort after reading the nvm in case RF Kill is on, we will complete | |
771 | * the init seq later when RF kill will switch to off | |
772 | */ | |
1a3fe0b2 | 773 | if (iwl_mvm_is_radio_hw_killed(mvm)) { |
4f59334b EH |
774 | IWL_DEBUG_RF_KILL(mvm, |
775 | "jump over all phy activities due to RF kill\n"); | |
776 | iwl_remove_notification(&mvm->notif_wait, &calib_wait); | |
a4082843 AN |
777 | ret = 1; |
778 | goto out; | |
4f59334b EH |
779 | } |
780 | ||
31b8b343 EG |
781 | mvm->calibrating = true; |
782 | ||
e07cbb53 | 783 | /* Send TX valid antennas before triggering calibrations */ |
a0544272 | 784 | ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); |
e07cbb53 DS |
785 | if (ret) |
786 | goto error; | |
787 | ||
8ca151b5 JB |
788 | /* |
789 | * Send phy configurations command to init uCode | |
790 | * to start the 16.0 uCode init image internal calibrations. | |
791 | */ | |
792 | ret = iwl_send_phy_cfg_cmd(mvm); | |
793 | if (ret) { | |
794 | IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", | |
795 | ret); | |
796 | goto error; | |
797 | } | |
798 | ||
799 | /* | |
800 | * Some things may run in the background now, but we | |
801 | * just wait for the calibration complete notification. | |
802 | */ | |
803 | ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, | |
804 | MVM_UCODE_CALIB_TIMEOUT); | |
31b8b343 | 805 | |
1a3fe0b2 | 806 | if (ret && iwl_mvm_is_radio_hw_killed(mvm)) { |
31b8b343 EG |
807 | IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); |
808 | ret = 1; | |
809 | } | |
8ca151b5 JB |
810 | goto out; |
811 | ||
812 | error: | |
813 | iwl_remove_notification(&mvm->notif_wait, &calib_wait); | |
814 | out: | |
31b8b343 | 815 | mvm->calibrating = false; |
a4082843 | 816 | if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { |
8ca151b5 JB |
817 | /* we want to debug INIT and we have no NVM - fake */ |
818 | mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + | |
819 | sizeof(struct ieee80211_channel) + | |
820 | sizeof(struct ieee80211_rate), | |
821 | GFP_KERNEL); | |
822 | if (!mvm->nvm_data) | |
823 | return -ENOMEM; | |
8ca151b5 JB |
824 | mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; |
825 | mvm->nvm_data->bands[0].n_channels = 1; | |
826 | mvm->nvm_data->bands[0].n_bitrates = 1; | |
827 | mvm->nvm_data->bands[0].bitrates = | |
828 | (void *)mvm->nvm_data->channels + 1; | |
829 | mvm->nvm_data->bands[0].bitrates->hw_value = 10; | |
830 | } | |
831 | ||
832 | return ret; | |
833 | } | |
834 | ||
1f370650 SS |
835 | int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) |
836 | { | |
837 | struct iwl_notification_wait init_wait; | |
838 | struct iwl_nvm_access_complete_cmd nvm_complete = {}; | |
839 | static const u16 init_complete[] = { | |
840 | INIT_COMPLETE_NOTIF, | |
841 | }; | |
842 | int ret; | |
843 | ||
844 | lockdep_assert_held(&mvm->mutex); | |
845 | ||
846 | iwl_init_notification_wait(&mvm->notif_wait, | |
847 | &init_wait, | |
848 | init_complete, | |
849 | ARRAY_SIZE(init_complete), | |
850 | iwl_wait_init_complete, | |
851 | NULL); | |
852 | ||
853 | /* Will also start the device */ | |
854 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); | |
855 | if (ret) { | |
856 | IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); | |
857 | goto error; | |
858 | } | |
859 | ||
1f370650 SS |
860 | /* Read the NVM only at driver load time, no need to do this twice */ |
861 | if (read_nvm) { | |
862 | /* Read nvm */ | |
863 | ret = iwl_nvm_init(mvm, true); | |
864 | if (ret) { | |
865 | IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); | |
866 | goto error; | |
867 | } | |
868 | } | |
869 | ||
870 | /* In case we read the NVM from external file, load it to the NIC */ | |
871 | if (mvm->nvm_file_name) | |
872 | iwl_mvm_load_nvm_to_nic(mvm); | |
873 | ||
874 | ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); | |
875 | if (WARN_ON(ret)) | |
876 | goto error; | |
877 | ||
878 | ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, | |
879 | NVM_ACCESS_COMPLETE), 0, | |
880 | sizeof(nvm_complete), &nvm_complete); | |
881 | if (ret) { | |
882 | IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", | |
883 | ret); | |
884 | goto error; | |
885 | } | |
886 | ||
887 | /* We wait for the INIT complete notification */ | |
888 | return iwl_wait_notification(&mvm->notif_wait, &init_wait, | |
889 | MVM_UCODE_ALIVE_TIMEOUT); | |
890 | ||
891 | error: | |
892 | iwl_remove_notification(&mvm->notif_wait, &init_wait); | |
893 | return ret; | |
894 | } | |
895 | ||
db06f04d SS |
896 | static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm, |
897 | struct iwl_rx_packet *pkt) | |
04fd2c28 | 898 | { |
db06f04d SS |
899 | struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data; |
900 | int i; | |
04fd2c28 | 901 | |
db06f04d SS |
902 | mvm->shared_mem_cfg.num_txfifo_entries = |
903 | ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); | |
904 | for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) | |
905 | mvm->shared_mem_cfg.txfifo_size[i] = | |
906 | le32_to_cpu(mem_cfg->txfifo_size[i]); | |
907 | for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) | |
908 | mvm->shared_mem_cfg.rxfifo_size[i] = | |
909 | le32_to_cpu(mem_cfg->rxfifo_size[i]); | |
04fd2c28 | 910 | |
db06f04d SS |
911 | BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) != |
912 | sizeof(mem_cfg->internal_txfifo_size)); | |
5b086414 | 913 | |
db06f04d SS |
914 | for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size); |
915 | i++) | |
916 | mvm->shared_mem_cfg.internal_txfifo_size[i] = | |
917 | le32_to_cpu(mem_cfg->internal_txfifo_size[i]); | |
918 | } | |
04fd2c28 | 919 | |
db06f04d SS |
920 | static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm, |
921 | struct iwl_rx_packet *pkt) | |
922 | { | |
923 | struct iwl_shared_mem_cfg_v1 *mem_cfg = (void *)pkt->data; | |
924 | int i; | |
925 | ||
926 | mvm->shared_mem_cfg.num_txfifo_entries = | |
927 | ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); | |
928 | for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) | |
04fd2c28 LK |
929 | mvm->shared_mem_cfg.txfifo_size[i] = |
930 | le32_to_cpu(mem_cfg->txfifo_size[i]); | |
931 | for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) | |
932 | mvm->shared_mem_cfg.rxfifo_size[i] = | |
933 | le32_to_cpu(mem_cfg->rxfifo_size[i]); | |
5b086414 | 934 | |
db06f04d | 935 | /* new API has more data, from rxfifo_addr field and on */ |
5b086414 GBA |
936 | if (fw_has_capa(&mvm->fw->ucode_capa, |
937 | IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) { | |
5b086414 GBA |
938 | BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) != |
939 | sizeof(mem_cfg->internal_txfifo_size)); | |
940 | ||
941 | for (i = 0; | |
942 | i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size); | |
943 | i++) | |
944 | mvm->shared_mem_cfg.internal_txfifo_size[i] = | |
945 | le32_to_cpu(mem_cfg->internal_txfifo_size[i]); | |
946 | } | |
db06f04d SS |
947 | } |
948 | ||
949 | static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm) | |
950 | { | |
951 | struct iwl_host_cmd cmd = { | |
952 | .flags = CMD_WANT_SKB, | |
953 | .data = { NULL, }, | |
954 | .len = { 0, }, | |
955 | }; | |
956 | struct iwl_rx_packet *pkt; | |
957 | ||
958 | lockdep_assert_held(&mvm->mutex); | |
959 | ||
960 | if (fw_has_capa(&mvm->fw->ucode_capa, | |
961 | IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) | |
962 | cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0); | |
963 | else | |
964 | cmd.id = SHARED_MEM_CFG; | |
965 | ||
966 | if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd))) | |
967 | return; | |
968 | ||
969 | pkt = cmd.resp_pkt; | |
970 | if (iwl_mvm_has_new_tx_api(mvm)) | |
971 | iwl_mvm_parse_shared_mem_a000(mvm, pkt); | |
972 | else | |
973 | iwl_mvm_parse_shared_mem(mvm, pkt); | |
5b086414 | 974 | |
04fd2c28 LK |
975 | IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n"); |
976 | ||
04fd2c28 LK |
977 | iwl_free_resp(&cmd); |
978 | } | |
979 | ||
84bfffa9 EG |
980 | static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) |
981 | { | |
982 | struct iwl_ltr_config_cmd cmd = { | |
983 | .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), | |
984 | }; | |
985 | ||
986 | if (!mvm->trans->ltr_enabled) | |
987 | return 0; | |
988 | ||
84bfffa9 EG |
989 | return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, |
990 | sizeof(cmd), &cmd); | |
991 | } | |
992 | ||
c386dacb HD |
993 | #ifdef CONFIG_ACPI |
994 | #define ACPI_WRDS_METHOD "WRDS" | |
69964905 LC |
995 | #define ACPI_EWRD_METHOD "EWRD" |
996 | #define ACPI_WIFI_DOMAIN (0x07) | |
c386dacb | 997 | #define ACPI_WRDS_WIFI_DATA_SIZE (IWL_MVM_SAR_TABLE_SIZE + 2) |
69964905 LC |
998 | #define ACPI_EWRD_WIFI_DATA_SIZE ((IWL_MVM_SAR_PROFILE_NUM - 1) * \ |
999 | IWL_MVM_SAR_TABLE_SIZE + 3) | |
c386dacb HD |
1000 | |
1001 | static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm, | |
1002 | union acpi_object *table, | |
1003 | struct iwl_mvm_sar_profile *profile, | |
1004 | bool enabled) | |
1005 | { | |
1006 | int i; | |
da2830ac | 1007 | |
c386dacb | 1008 | profile->enabled = enabled; |
da2830ac | 1009 | |
c386dacb HD |
1010 | for (i = 0; i < IWL_MVM_SAR_TABLE_SIZE; i++) { |
1011 | if ((table[i].type != ACPI_TYPE_INTEGER) || | |
1012 | (table[i].integer.value > U8_MAX)) | |
1013 | return -EINVAL; | |
1014 | ||
1015 | profile->table[i] = table[i].integer.value; | |
1016 | } | |
1017 | ||
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | static union acpi_object *iwl_mvm_sar_find_wifi_pkg(struct iwl_mvm *mvm, | |
1022 | union acpi_object *data, | |
1023 | int data_size) | |
da2830ac | 1024 | { |
c386dacb HD |
1025 | int i; |
1026 | union acpi_object *wifi_pkg; | |
da2830ac | 1027 | |
c386dacb HD |
1028 | /* |
1029 | * We need at least two packages, one for the revision and one | |
da2830ac LC |
1030 | * for the data itself. Also check that the revision is valid |
1031 | * (i.e. it is an integer set to 0). | |
c386dacb HD |
1032 | */ |
1033 | if (data->type != ACPI_TYPE_PACKAGE || | |
1034 | data->package.count < 2 || | |
1035 | data->package.elements[0].type != ACPI_TYPE_INTEGER || | |
1036 | data->package.elements[0].integer.value != 0) { | |
1037 | IWL_DEBUG_RADIO(mvm, "Unsupported packages structure\n"); | |
1038 | return ERR_PTR(-EINVAL); | |
da2830ac LC |
1039 | } |
1040 | ||
1041 | /* loop through all the packages to find the one for WiFi */ | |
c386dacb | 1042 | for (i = 1; i < data->package.count; i++) { |
da2830ac LC |
1043 | union acpi_object *domain; |
1044 | ||
c386dacb | 1045 | wifi_pkg = &data->package.elements[i]; |
da2830ac LC |
1046 | |
1047 | /* Skip anything that is not a package with the right | |
1048 | * amount of elements (i.e. domain_type, | |
c386dacb | 1049 | * enabled/disabled plus the actual data size. |
da2830ac | 1050 | */ |
c386dacb HD |
1051 | if (wifi_pkg->type != ACPI_TYPE_PACKAGE || |
1052 | wifi_pkg->package.count != data_size) | |
da2830ac LC |
1053 | continue; |
1054 | ||
c386dacb | 1055 | domain = &wifi_pkg->package.elements[0]; |
da2830ac | 1056 | if (domain->type == ACPI_TYPE_INTEGER && |
69964905 | 1057 | domain->integer.value == ACPI_WIFI_DOMAIN) |
da2830ac LC |
1058 | break; |
1059 | ||
c386dacb | 1060 | wifi_pkg = NULL; |
da2830ac LC |
1061 | } |
1062 | ||
c386dacb HD |
1063 | if (!wifi_pkg) |
1064 | return ERR_PTR(-ENOENT); | |
da2830ac | 1065 | |
c386dacb | 1066 | return wifi_pkg; |
da2830ac LC |
1067 | } |
1068 | ||
c386dacb | 1069 | static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) |
da2830ac | 1070 | { |
c386dacb | 1071 | union acpi_object *wifi_pkg, *table; |
da2830ac LC |
1072 | acpi_handle root_handle; |
1073 | acpi_handle handle; | |
1074 | struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL}; | |
1075 | acpi_status status; | |
c386dacb | 1076 | bool enabled; |
da2830ac LC |
1077 | int ret; |
1078 | ||
1079 | root_handle = ACPI_HANDLE(mvm->dev); | |
1080 | if (!root_handle) { | |
1081 | IWL_DEBUG_RADIO(mvm, | |
1082 | "Could not retrieve root port ACPI handle\n"); | |
1083 | return -ENOENT; | |
1084 | } | |
1085 | ||
1086 | /* Get the method's handle */ | |
1087 | status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD, | |
1088 | &handle); | |
1089 | if (ACPI_FAILURE(status)) { | |
1090 | IWL_DEBUG_RADIO(mvm, "WRDS method not found\n"); | |
1091 | return -ENOENT; | |
1092 | } | |
1093 | ||
1094 | /* Call WRDS with no arguments */ | |
1095 | status = acpi_evaluate_object(handle, NULL, NULL, &wrds); | |
1096 | if (ACPI_FAILURE(status)) { | |
1097 | IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status); | |
1098 | return -ENOENT; | |
1099 | } | |
1100 | ||
c386dacb HD |
1101 | wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, wrds.pointer, |
1102 | ACPI_WRDS_WIFI_DATA_SIZE); | |
1103 | if (IS_ERR(wifi_pkg)) { | |
1104 | ret = PTR_ERR(wifi_pkg); | |
1105 | goto out_free; | |
1106 | } | |
1107 | ||
1108 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { | |
1109 | ret = -EINVAL; | |
1110 | goto out_free; | |
1111 | } | |
1112 | ||
1113 | enabled = !!(wifi_pkg->package.elements[1].integer.value); | |
da2830ac | 1114 | |
c386dacb HD |
1115 | /* position of the actual table */ |
1116 | table = &wifi_pkg->package.elements[2]; | |
1117 | ||
1118 | /* The profile from WRDS is officially profile 1, but goes | |
1119 | * into sar_profiles[0] (because we don't have a profile 0). | |
1120 | */ | |
1121 | ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0], | |
1122 | enabled); | |
1123 | ||
1124 | out_free: | |
1125 | kfree(wrds.pointer); | |
da2830ac LC |
1126 | return ret; |
1127 | } | |
da2830ac | 1128 | |
69964905 LC |
1129 | static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) |
1130 | { | |
1131 | union acpi_object *wifi_pkg; | |
1132 | acpi_handle root_handle; | |
1133 | acpi_handle handle; | |
1134 | struct acpi_buffer ewrd = {ACPI_ALLOCATE_BUFFER, NULL}; | |
1135 | acpi_status status; | |
1136 | bool enabled; | |
1137 | int i, n_profiles, ret; | |
1138 | ||
1139 | root_handle = ACPI_HANDLE(mvm->dev); | |
1140 | if (!root_handle) { | |
1141 | IWL_DEBUG_RADIO(mvm, | |
1142 | "Could not retrieve root port ACPI handle\n"); | |
1143 | return -ENOENT; | |
1144 | } | |
1145 | ||
1146 | /* Get the method's handle */ | |
1147 | status = acpi_get_handle(root_handle, (acpi_string)ACPI_EWRD_METHOD, | |
1148 | &handle); | |
1149 | if (ACPI_FAILURE(status)) { | |
1150 | IWL_DEBUG_RADIO(mvm, "EWRD method not found\n"); | |
1151 | return -ENOENT; | |
1152 | } | |
1153 | ||
1154 | /* Call EWRD with no arguments */ | |
1155 | status = acpi_evaluate_object(handle, NULL, NULL, &ewrd); | |
1156 | if (ACPI_FAILURE(status)) { | |
1157 | IWL_DEBUG_RADIO(mvm, "EWRD invocation failed (0x%x)\n", status); | |
1158 | return -ENOENT; | |
1159 | } | |
1160 | ||
1161 | wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, ewrd.pointer, | |
1162 | ACPI_EWRD_WIFI_DATA_SIZE); | |
1163 | if (IS_ERR(wifi_pkg)) { | |
1164 | ret = PTR_ERR(wifi_pkg); | |
1165 | goto out_free; | |
1166 | } | |
1167 | ||
1168 | if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || | |
1169 | (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) { | |
1170 | ret = -EINVAL; | |
1171 | goto out_free; | |
1172 | } | |
1173 | ||
1174 | enabled = !!(wifi_pkg->package.elements[1].integer.value); | |
1175 | n_profiles = wifi_pkg->package.elements[2].integer.value; | |
1176 | ||
1177 | for (i = 0; i < n_profiles; i++) { | |
1178 | /* the tables start at element 3 */ | |
1179 | static int pos = 3; | |
1180 | ||
1181 | /* The EWRD profiles officially go from 2 to 4, but we | |
1182 | * save them in sar_profiles[1-3] (because we don't | |
1183 | * have profile 0). So in the array we start from 1. | |
1184 | */ | |
1185 | ret = iwl_mvm_sar_set_profile(mvm, | |
1186 | &wifi_pkg->package.elements[pos], | |
1187 | &mvm->sar_profiles[i + 1], | |
1188 | enabled); | |
1189 | if (ret < 0) | |
1190 | break; | |
1191 | ||
1192 | /* go to the next table */ | |
1193 | pos += IWL_MVM_SAR_TABLE_SIZE; | |
1194 | } | |
1195 | ||
1196 | out_free: | |
1197 | kfree(ewrd.pointer); | |
1198 | return ret; | |
1199 | } | |
1200 | ||
42ce76d6 | 1201 | int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) |
da2830ac | 1202 | { |
da2830ac | 1203 | struct iwl_dev_tx_power_cmd cmd = { |
4b87e5af | 1204 | .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), |
da2830ac | 1205 | }; |
42ce76d6 LC |
1206 | int i, j, idx; |
1207 | int profs[IWL_NUM_CHAIN_LIMITS] = { prof_a, prof_b }; | |
55bfa4b9 | 1208 | int len = sizeof(cmd); |
da2830ac | 1209 | |
42ce76d6 LC |
1210 | BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS < 2); |
1211 | BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS != | |
1212 | IWL_MVM_SAR_TABLE_SIZE); | |
1213 | ||
55bfa4b9 LC |
1214 | if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) |
1215 | len = sizeof(cmd.v3); | |
1216 | ||
42ce76d6 LC |
1217 | for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { |
1218 | struct iwl_mvm_sar_profile *prof; | |
da2830ac | 1219 | |
42ce76d6 LC |
1220 | /* don't allow SAR to be disabled (profile 0 means disable) */ |
1221 | if (profs[i] == 0) | |
1222 | return -EPERM; | |
da2830ac | 1223 | |
42ce76d6 LC |
1224 | /* we are off by one, so allow up to IWL_MVM_SAR_PROFILE_NUM */ |
1225 | if (profs[i] > IWL_MVM_SAR_PROFILE_NUM) | |
1226 | return -EINVAL; | |
da2830ac | 1227 | |
42ce76d6 LC |
1228 | /* profiles go from 1 to 4, so decrement to access the array */ |
1229 | prof = &mvm->sar_profiles[profs[i] - 1]; | |
1230 | ||
1231 | /* if the profile is disabled, do nothing */ | |
1232 | if (!prof->enabled) { | |
1233 | IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n", | |
1234 | profs[i]); | |
1235 | /* if one of the profiles is disabled, we fail all */ | |
1236 | return -ENOENT; | |
1237 | } | |
da2830ac | 1238 | |
da2830ac LC |
1239 | IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); |
1240 | for (j = 0; j < IWL_NUM_SUB_BANDS; j++) { | |
1241 | idx = (i * IWL_NUM_SUB_BANDS) + j; | |
55bfa4b9 | 1242 | cmd.v3.per_chain_restriction[i][j] = |
42ce76d6 | 1243 | cpu_to_le16(prof->table[idx]); |
da2830ac | 1244 | IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", |
42ce76d6 | 1245 | j, prof->table[idx]); |
da2830ac LC |
1246 | } |
1247 | } | |
1248 | ||
42ce76d6 LC |
1249 | IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); |
1250 | ||
1251 | return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); | |
1252 | } | |
1253 | ||
69964905 LC |
1254 | #else /* CONFIG_ACPI */ |
1255 | static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) | |
1256 | { | |
1257 | return -ENOENT; | |
1258 | } | |
1259 | ||
1260 | static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) | |
1261 | { | |
1262 | return -ENOENT; | |
1263 | } | |
1264 | #endif /* CONFIG_ACPI */ | |
1265 | ||
42ce76d6 LC |
1266 | static int iwl_mvm_sar_init(struct iwl_mvm *mvm) |
1267 | { | |
1268 | int ret; | |
1269 | ||
1270 | ret = iwl_mvm_sar_get_wrds_table(mvm); | |
1271 | if (ret < 0) { | |
1272 | IWL_DEBUG_RADIO(mvm, | |
69964905 | 1273 | "WRDS SAR BIOS table invalid or unavailable. (%d)\n", |
42ce76d6 | 1274 | ret); |
69964905 | 1275 | /* if not available, don't fail and don't bother with EWRD */ |
42ce76d6 LC |
1276 | return 0; |
1277 | } | |
1278 | ||
69964905 LC |
1279 | ret = iwl_mvm_sar_get_ewrd_table(mvm); |
1280 | /* if EWRD is not available, we can still use WRDS, so don't fail */ | |
1281 | if (ret < 0) | |
1282 | IWL_DEBUG_RADIO(mvm, | |
1283 | "EWRD SAR BIOS table invalid or unavailable. (%d)\n", | |
1284 | ret); | |
1285 | ||
42ce76d6 LC |
1286 | /* choose profile 1 (WRDS) as default for both chains */ |
1287 | ret = iwl_mvm_sar_select_profile(mvm, 1, 1); | |
1288 | ||
1289 | /* if we don't have profile 0 from BIOS, just skip it */ | |
1290 | if (ret == -ENOENT) | |
1291 | return 0; | |
da2830ac LC |
1292 | |
1293 | return ret; | |
1294 | } | |
1295 | ||
1f370650 | 1296 | static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) |
8ca151b5 | 1297 | { |
1f370650 | 1298 | int ret; |
8ca151b5 | 1299 | |
1f370650 SS |
1300 | if (iwl_mvm_has_new_tx_api(mvm)) |
1301 | return iwl_run_unified_mvm_ucode(mvm, false); | |
8ca151b5 | 1302 | |
8d193ca2 | 1303 | ret = iwl_run_init_mvm_ucode(mvm, false); |
f2082a53 SS |
1304 | |
1305 | if (iwlmvm_mod_params.init_dbg) | |
1306 | return 0; | |
1307 | ||
1308 | if (ret) { | |
8d193ca2 EH |
1309 | IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); |
1310 | /* this can't happen */ | |
1311 | if (WARN_ON(ret > 0)) | |
1312 | ret = -ERFKILL; | |
1f370650 | 1313 | return ret; |
8d193ca2 | 1314 | } |
8ca151b5 | 1315 | |
f2082a53 SS |
1316 | /* |
1317 | * Stop and start the transport without entering low power | |
1318 | * mode. This will save the state of other components on the | |
1319 | * device that are triggered by the INIT firwmare (MFUART). | |
1320 | */ | |
1321 | _iwl_trans_stop_device(mvm->trans, false); | |
1322 | ret = _iwl_trans_start_hw(mvm->trans, false); | |
1323 | if (ret) | |
1f370650 | 1324 | return ret; |
8ca151b5 JB |
1325 | |
1326 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); | |
1f370650 SS |
1327 | if (ret) |
1328 | return ret; | |
1329 | ||
1330 | return iwl_mvm_init_paging(mvm); | |
1331 | } | |
1332 | ||
1333 | int iwl_mvm_up(struct iwl_mvm *mvm) | |
1334 | { | |
1335 | int ret, i; | |
1336 | struct ieee80211_channel *chan; | |
1337 | struct cfg80211_chan_def chandef; | |
1338 | ||
1339 | lockdep_assert_held(&mvm->mutex); | |
1340 | ||
1341 | ret = iwl_trans_start_hw(mvm->trans); | |
1342 | if (ret) | |
1343 | return ret; | |
1344 | ||
1345 | ret = iwl_mvm_load_rt_fw(mvm); | |
8ca151b5 JB |
1346 | if (ret) { |
1347 | IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); | |
1348 | goto error; | |
1349 | } | |
1350 | ||
6c7d32cf | 1351 | iwl_mvm_get_shared_mem_conf(mvm); |
04fd2c28 | 1352 | |
1f3b0ff8 LE |
1353 | ret = iwl_mvm_sf_update(mvm, NULL, false); |
1354 | if (ret) | |
1355 | IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); | |
1356 | ||
6a951267 | 1357 | mvm->fw_dbg_conf = FW_DBG_INVALID; |
945d4202 EG |
1358 | /* if we have a destination, assume EARLY START */ |
1359 | if (mvm->fw->dbg_dest_tlv) | |
1360 | mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE; | |
d2709ad7 | 1361 | iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE); |
6a951267 | 1362 | |
a0544272 | 1363 | ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); |
8ca151b5 JB |
1364 | if (ret) |
1365 | goto error; | |
1366 | ||
931d4160 EG |
1367 | ret = iwl_send_bt_init_conf(mvm); |
1368 | if (ret) | |
1369 | goto error; | |
1370 | ||
8ca151b5 | 1371 | /* Send phy db control command and then phy db calibration*/ |
1f370650 SS |
1372 | if (!iwl_mvm_has_new_tx_api(mvm)) { |
1373 | ret = iwl_send_phy_db_data(mvm->phy_db); | |
1374 | if (ret) | |
1375 | goto error; | |
8ca151b5 | 1376 | |
1f370650 SS |
1377 | ret = iwl_send_phy_cfg_cmd(mvm); |
1378 | if (ret) | |
1379 | goto error; | |
1380 | } | |
8ca151b5 | 1381 | |
43413a97 | 1382 | /* Init RSS configuration */ |
09a2e25d SS |
1383 | /* TODO - remove a000 disablement when we have RXQ config API */ |
1384 | if (iwl_mvm_has_new_rx_api(mvm) && !iwl_mvm_has_new_tx_api(mvm)) { | |
43413a97 SS |
1385 | ret = iwl_send_rss_cfg_cmd(mvm); |
1386 | if (ret) { | |
1387 | IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", | |
1388 | ret); | |
1389 | goto error; | |
1390 | } | |
1391 | } | |
1392 | ||
8ca151b5 | 1393 | /* init the fw <-> mac80211 STA mapping */ |
0ae98812 | 1394 | for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) |
8ca151b5 JB |
1395 | RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); |
1396 | ||
0ae98812 | 1397 | mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; |
1d3c3f63 | 1398 | |
b2b7875b JB |
1399 | /* reset quota debouncing buffer - 0xff will yield invalid data */ |
1400 | memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); | |
1401 | ||
97d5be7e LK |
1402 | /* Enable DQA-mode if required */ |
1403 | if (iwl_mvm_is_dqa_supported(mvm)) { | |
1404 | ret = iwl_mvm_send_dqa_cmd(mvm); | |
1405 | if (ret) | |
1406 | goto error; | |
1407 | } else { | |
1408 | IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n"); | |
1409 | } | |
1410 | ||
8ca151b5 JB |
1411 | /* Add auxiliary station for scanning */ |
1412 | ret = iwl_mvm_add_aux_sta(mvm); | |
1413 | if (ret) | |
1414 | goto error; | |
1415 | ||
53a9d61e | 1416 | /* Add all the PHY contexts */ |
57fbcce3 | 1417 | chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0]; |
53a9d61e IP |
1418 | cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); |
1419 | for (i = 0; i < NUM_PHY_CTX; i++) { | |
1420 | /* | |
1421 | * The channel used here isn't relevant as it's | |
1422 | * going to be overwritten in the other flows. | |
1423 | * For now use the first channel we have. | |
1424 | */ | |
1425 | ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], | |
1426 | &chandef, 1, 1); | |
1427 | if (ret) | |
1428 | goto error; | |
1429 | } | |
8ca151b5 | 1430 | |
c221daf2 CRI |
1431 | #ifdef CONFIG_THERMAL |
1432 | if (iwl_mvm_is_tt_in_fw(mvm)) { | |
1433 | /* in order to give the responsibility of ct-kill and | |
1434 | * TX backoff to FW we need to send empty temperature reporting | |
1435 | * cmd during init time | |
1436 | */ | |
1437 | iwl_mvm_send_temp_report_ths_cmd(mvm); | |
1438 | } else { | |
1439 | /* Initialize tx backoffs to the minimal possible */ | |
1440 | iwl_mvm_tt_tx_backoff(mvm, 0); | |
1441 | } | |
5c89e7bc CRI |
1442 | |
1443 | /* TODO: read the budget from BIOS / Platform NVM */ | |
75cfe338 | 1444 | if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) { |
5c89e7bc CRI |
1445 | ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, |
1446 | mvm->cooling_dev.cur_state); | |
75cfe338 LC |
1447 | if (ret) |
1448 | goto error; | |
1449 | } | |
c221daf2 | 1450 | #else |
0c0e2c71 IY |
1451 | /* Initialize tx backoffs to the minimal possible */ |
1452 | iwl_mvm_tt_tx_backoff(mvm, 0); | |
c221daf2 | 1453 | #endif |
0c0e2c71 | 1454 | |
84bfffa9 | 1455 | WARN_ON(iwl_mvm_config_ltr(mvm)); |
9180ac50 | 1456 | |
c1cb92fc | 1457 | ret = iwl_mvm_power_update_device(mvm); |
64b928c4 AB |
1458 | if (ret) |
1459 | goto error; | |
1460 | ||
35af15d1 AN |
1461 | /* |
1462 | * RTNL is not taken during Ct-kill, but we don't need to scan/Tx | |
1463 | * anyway, so don't init MCC. | |
1464 | */ | |
1465 | if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { | |
1466 | ret = iwl_mvm_init_mcc(mvm); | |
1467 | if (ret) | |
1468 | goto error; | |
1469 | } | |
90d4f7db | 1470 | |
859d914c | 1471 | if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { |
4ca87a5f | 1472 | mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; |
d2496221 DS |
1473 | ret = iwl_mvm_config_scan(mvm); |
1474 | if (ret) | |
1475 | goto error; | |
1476 | } | |
1477 | ||
7498cf4c EP |
1478 | /* allow FW/transport low power modes if not during restart */ |
1479 | if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) | |
1480 | iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); | |
1481 | ||
da2830ac LC |
1482 | ret = iwl_mvm_sar_init(mvm); |
1483 | if (ret) | |
1484 | goto error; | |
1485 | ||
53a9d61e | 1486 | IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); |
8ca151b5 JB |
1487 | return 0; |
1488 | error: | |
fcb6b92a | 1489 | iwl_mvm_stop_device(mvm); |
8ca151b5 JB |
1490 | return ret; |
1491 | } | |
1492 | ||
1493 | int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) | |
1494 | { | |
1495 | int ret, i; | |
1496 | ||
1497 | lockdep_assert_held(&mvm->mutex); | |
1498 | ||
1499 | ret = iwl_trans_start_hw(mvm->trans); | |
1500 | if (ret) | |
1501 | return ret; | |
1502 | ||
1503 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); | |
1504 | if (ret) { | |
1505 | IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); | |
1506 | goto error; | |
1507 | } | |
1508 | ||
a0544272 | 1509 | ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); |
8ca151b5 JB |
1510 | if (ret) |
1511 | goto error; | |
1512 | ||
1513 | /* Send phy db control command and then phy db calibration*/ | |
1514 | ret = iwl_send_phy_db_data(mvm->phy_db); | |
1515 | if (ret) | |
1516 | goto error; | |
1517 | ||
1518 | ret = iwl_send_phy_cfg_cmd(mvm); | |
1519 | if (ret) | |
1520 | goto error; | |
1521 | ||
1522 | /* init the fw <-> mac80211 STA mapping */ | |
0ae98812 | 1523 | for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) |
8ca151b5 JB |
1524 | RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); |
1525 | ||
1526 | /* Add auxiliary station for scanning */ | |
1527 | ret = iwl_mvm_add_aux_sta(mvm); | |
1528 | if (ret) | |
1529 | goto error; | |
1530 | ||
1531 | return 0; | |
1532 | error: | |
fcb6b92a | 1533 | iwl_mvm_stop_device(mvm); |
8ca151b5 JB |
1534 | return ret; |
1535 | } | |
1536 | ||
0416841d JB |
1537 | void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, |
1538 | struct iwl_rx_cmd_buffer *rxb) | |
8ca151b5 JB |
1539 | { |
1540 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1541 | struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; | |
1542 | u32 flags = le32_to_cpu(card_state_notif->flags); | |
1543 | ||
1544 | IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", | |
1545 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1546 | (flags & SW_CARD_DISABLED) ? "Kill" : "On", | |
1547 | (flags & CT_KILL_CARD_DISABLED) ? | |
1548 | "Reached" : "Not reached"); | |
8ca151b5 JB |
1549 | } |
1550 | ||
0416841d JB |
1551 | void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, |
1552 | struct iwl_rx_cmd_buffer *rxb) | |
30269c12 CRI |
1553 | { |
1554 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1555 | struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; | |
1556 | ||
0c8d0a47 GBA |
1557 | IWL_DEBUG_INFO(mvm, |
1558 | "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", | |
1559 | le32_to_cpu(mfuart_notif->installed_ver), | |
1560 | le32_to_cpu(mfuart_notif->external_ver), | |
1561 | le32_to_cpu(mfuart_notif->status), | |
1562 | le32_to_cpu(mfuart_notif->duration)); | |
1563 | ||
19f63c53 GBA |
1564 | if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) |
1565 | IWL_DEBUG_INFO(mvm, | |
0c8d0a47 | 1566 | "MFUART: image size: 0x%08x\n", |
19f63c53 | 1567 | le32_to_cpu(mfuart_notif->image_size)); |
30269c12 | 1568 | } |