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8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
4fb06283 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of version 2 of the GNU General Public License as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
24 | * USA | |
25 | * | |
26 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 27 | * in the file called COPYING. |
8ca151b5 JB |
28 | * |
29 | * Contact Information: | |
cb2f8277 | 30 | * Intel Linux Wireless <linuxwifi@intel.com> |
8ca151b5 JB |
31 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
32 | * | |
33 | * BSD LICENSE | |
34 | * | |
51368bf7 | 35 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
4fb06283 | 36 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 37 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
38 | * All rights reserved. |
39 | * | |
40 | * Redistribution and use in source and binary forms, with or without | |
41 | * modification, are permitted provided that the following conditions | |
42 | * are met: | |
43 | * | |
44 | * * Redistributions of source code must retain the above copyright | |
45 | * notice, this list of conditions and the following disclaimer. | |
46 | * * Redistributions in binary form must reproduce the above copyright | |
47 | * notice, this list of conditions and the following disclaimer in | |
48 | * the documentation and/or other materials provided with the | |
49 | * distribution. | |
50 | * * Neither the name Intel Corporation nor the names of its | |
51 | * contributors may be used to endorse or promote products derived | |
52 | * from this software without specific prior written permission. | |
53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
55 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
56 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
57 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
58 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
59 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
60 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
61 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
62 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
63 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
64 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
65 | * | |
66 | *****************************************************************************/ | |
67 | #include <linux/module.h> | |
1bd3cbc1 | 68 | #include <linux/vmalloc.h> |
8ca151b5 JB |
69 | #include <net/mac80211.h> |
70 | ||
9fca9d5c | 71 | #include "fw/notif-wait.h" |
8ca151b5 JB |
72 | #include "iwl-trans.h" |
73 | #include "iwl-op-mode.h" | |
d962f9b1 | 74 | #include "fw/img.h" |
8ca151b5 JB |
75 | #include "iwl-debug.h" |
76 | #include "iwl-drv.h" | |
77 | #include "iwl-modparams.h" | |
78 | #include "mvm.h" | |
79 | #include "iwl-phy-db.h" | |
80 | #include "iwl-eeprom-parse.h" | |
81 | #include "iwl-csr.h" | |
82 | #include "iwl-io.h" | |
83 | #include "iwl-prph.h" | |
84 | #include "rs.h" | |
d172a5ef | 85 | #include "fw/api/scan.h" |
8ca151b5 | 86 | #include "time-event.h" |
39bdb17e | 87 | #include "fw-api.h" |
d172a5ef | 88 | #include "fw/api/scan.h" |
8ca151b5 | 89 | |
8ca151b5 | 90 | #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" |
8ca151b5 | 91 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
8ca151b5 JB |
92 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
93 | MODULE_LICENSE("GPL"); | |
94 | ||
95 | static const struct iwl_op_mode_ops iwl_mvm_ops; | |
0316d30e | 96 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq; |
8ca151b5 JB |
97 | |
98 | struct iwl_mvm_mod_params iwlmvm_mod_params = { | |
99 | .power_scheme = IWL_POWER_SCHEME_BPS, | |
ce71c2f7 | 100 | .tfd_q_hang_detect = true |
8ca151b5 JB |
101 | /* rest of fields are 0 by default */ |
102 | }; | |
103 | ||
104 | module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO); | |
105 | MODULE_PARM_DESC(init_dbg, | |
106 | "set to true to debug an ASSERT in INIT fw (default: false"); | |
107 | module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO); | |
108 | MODULE_PARM_DESC(power_scheme, | |
109 | "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); | |
ce71c2f7 EG |
110 | module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect, |
111 | bool, S_IRUGO); | |
112 | MODULE_PARM_DESC(tfd_q_hang_detect, | |
113 | "TFD queues hang detection (default: true"); | |
8ca151b5 JB |
114 | |
115 | /* | |
116 | * module init and exit functions | |
117 | */ | |
118 | static int __init iwl_mvm_init(void) | |
119 | { | |
120 | int ret; | |
121 | ||
122 | ret = iwl_mvm_rate_control_register(); | |
123 | if (ret) { | |
124 | pr_err("Unable to register rate control algorithm: %d\n", ret); | |
125 | return ret; | |
126 | } | |
127 | ||
128 | ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); | |
129 | ||
130 | if (ret) { | |
131 | pr_err("Unable to register MVM op_mode: %d\n", ret); | |
132 | iwl_mvm_rate_control_unregister(); | |
133 | } | |
134 | ||
135 | return ret; | |
136 | } | |
137 | module_init(iwl_mvm_init); | |
138 | ||
139 | static void __exit iwl_mvm_exit(void) | |
140 | { | |
141 | iwl_opmode_deregister("iwlmvm"); | |
142 | iwl_mvm_rate_control_unregister(); | |
143 | } | |
144 | module_exit(iwl_mvm_exit); | |
145 | ||
146 | static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) | |
147 | { | |
148 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
149 | u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; | |
150 | u32 reg_val = 0; | |
a0544272 MH |
151 | u32 phy_config = iwl_mvm_get_phy_config(mvm); |
152 | ||
153 | radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> | |
154 | FW_PHY_CFG_RADIO_TYPE_POS; | |
155 | radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> | |
156 | FW_PHY_CFG_RADIO_STEP_POS; | |
157 | radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> | |
158 | FW_PHY_CFG_RADIO_DASH_POS; | |
8ca151b5 JB |
159 | |
160 | /* SKU control */ | |
161 | reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << | |
162 | CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; | |
163 | reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << | |
164 | CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; | |
165 | ||
166 | /* radio configuration */ | |
167 | reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; | |
168 | reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; | |
169 | reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; | |
170 | ||
171 | WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & | |
172 | ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); | |
173 | ||
9b1fcc11 | 174 | /* |
6e584873 SS |
175 | * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC |
176 | * sampling, and shouldn't be set to any non-zero value. | |
177 | * The same is supposed to be true of the other HW, but unsetting | |
178 | * them (such as the 7260) causes automatic tests to fail on seemingly | |
179 | * unrelated errors. Need to further investigate this, but for now | |
180 | * we'll separate cases. | |
9b1fcc11 | 181 | */ |
6e584873 | 182 | if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000) |
9b1fcc11 | 183 | reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; |
8ca151b5 | 184 | |
e139dc4a LE |
185 | iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, |
186 | CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | | |
187 | CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | | |
188 | CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | | |
189 | CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | | |
190 | CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | | |
191 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
192 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI, | |
193 | reg_val); | |
8ca151b5 JB |
194 | |
195 | IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, | |
196 | radio_cfg_step, radio_cfg_dash); | |
197 | ||
198 | /* | |
199 | * W/A : NIC is stuck in a reset state after Early PCIe power off | |
200 | * (PCIe power is lost before PERST# is asserted), causing ME FW | |
201 | * to lose ownership and not being able to obtain it back. | |
202 | */ | |
95411d04 | 203 | if (!mvm->trans->cfg->apmg_not_supported) |
3073d8c0 EH |
204 | iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, |
205 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | |
206 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | |
8ca151b5 JB |
207 | } |
208 | ||
c9cb14a6 CRI |
209 | /** |
210 | * enum iwl_rx_handler_context context for Rx handler | |
211 | * @RX_HANDLER_SYNC : this means that it will be called in the Rx path | |
212 | * which can't acquire mvm->mutex. | |
213 | * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex | |
214 | * (and only in this case!), it should be set as ASYNC. In that case, | |
215 | * it will be called from a worker with mvm->mutex held. | |
216 | * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the | |
217 | * mutex itself, it will be called from a worker without mvm->mutex held. | |
218 | */ | |
219 | enum iwl_rx_handler_context { | |
220 | RX_HANDLER_SYNC, | |
221 | RX_HANDLER_ASYNC_LOCKED, | |
222 | RX_HANDLER_ASYNC_UNLOCKED, | |
223 | }; | |
224 | ||
225 | /** | |
226 | * struct iwl_rx_handlers handler for FW notification | |
227 | * @cmd_id: command id | |
228 | * @context: see &iwl_rx_handler_context | |
229 | * @fn: the function is called when notification is received | |
230 | */ | |
8ca151b5 | 231 | struct iwl_rx_handlers { |
1230b16b | 232 | u16 cmd_id; |
c9cb14a6 | 233 | enum iwl_rx_handler_context context; |
0416841d | 234 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
235 | }; |
236 | ||
c9cb14a6 CRI |
237 | #define RX_HANDLER(_cmd_id, _fn, _context) \ |
238 | { .cmd_id = _cmd_id, .fn = _fn, .context = _context } | |
239 | #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ | |
240 | { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } | |
8ca151b5 JB |
241 | |
242 | /* | |
243 | * Handlers for fw notifications | |
244 | * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME | |
245 | * This list should be in order of frequency for performance purposes. | |
246 | * | |
c9cb14a6 | 247 | * The handler can be one from three contexts, see &iwl_rx_handler_context |
8ca151b5 JB |
248 | */ |
249 | static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { | |
c9cb14a6 CRI |
250 | RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), |
251 | RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), | |
252 | ||
253 | RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, | |
254 | RX_HANDLER_ASYNC_LOCKED), | |
255 | RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, | |
256 | RX_HANDLER_ASYNC_LOCKED), | |
257 | RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, | |
258 | RX_HANDLER_ASYNC_LOCKED), | |
f421f9c3 | 259 | |
3af512d6 | 260 | RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, |
c9cb14a6 | 261 | iwl_mvm_window_status_notif, RX_HANDLER_SYNC), |
3af512d6 | 262 | |
c9cb14a6 CRI |
263 | RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, |
264 | RX_HANDLER_SYNC), | |
265 | RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, | |
266 | RX_HANDLER_ASYNC_LOCKED), | |
497b49d2 | 267 | |
c9cb14a6 | 268 | RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), |
3e56eadf | 269 | |
e5d74646 | 270 | RX_HANDLER(SCAN_ITERATION_COMPLETE, |
c9cb14a6 | 271 | iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
35a000b7 | 272 | RX_HANDLER(SCAN_OFFLOAD_COMPLETE, |
c9cb14a6 CRI |
273 | iwl_mvm_rx_lmac_scan_complete_notif, |
274 | RX_HANDLER_ASYNC_LOCKED), | |
6e56f01d | 275 | RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, |
c9cb14a6 | 276 | RX_HANDLER_SYNC), |
d2496221 | 277 | RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, |
c9cb14a6 | 278 | RX_HANDLER_ASYNC_LOCKED), |
ee9219b2 | 279 | RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, |
c9cb14a6 | 280 | iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
497b49d2 | 281 | |
c9cb14a6 CRI |
282 | RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, |
283 | RX_HANDLER_SYNC), | |
8ca151b5 | 284 | |
d64048ed | 285 | RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, |
c9cb14a6 | 286 | RX_HANDLER_SYNC), |
d64048ed | 287 | |
c9cb14a6 | 288 | RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), |
175a70b7 | 289 | RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, |
c9cb14a6 CRI |
290 | iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), |
291 | RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, | |
292 | RX_HANDLER_ASYNC_LOCKED), | |
09eef330 | 293 | RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, |
ec77a33e | 294 | iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), |
0a3b7119 | 295 | RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, |
c9cb14a6 | 296 | iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), |
ea9af24d | 297 | |
1d3c3f63 | 298 | RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, |
c9cb14a6 CRI |
299 | RX_HANDLER_ASYNC_LOCKED), |
300 | RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, | |
301 | RX_HANDLER_SYNC), | |
302 | RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler, | |
303 | RX_HANDLER_ASYNC_LOCKED), | |
bdccdb85 GBA |
304 | RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF, |
305 | iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC), | |
0db056d3 | 306 | RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, |
c9cb14a6 | 307 | iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), |
f92659a1 | 308 | RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, |
c9cb14a6 | 309 | iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), |
65e25482 JB |
310 | RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF, |
311 | iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC), | |
8ca151b5 JB |
312 | }; |
313 | #undef RX_HANDLER | |
1230b16b | 314 | #undef RX_HANDLER_GRP |
39bdb17e SD |
315 | |
316 | /* Please keep this array *SORTED* by hex value. | |
317 | * Access is done through binary search | |
318 | */ | |
319 | static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { | |
320 | HCMD_NAME(MVM_ALIVE), | |
321 | HCMD_NAME(REPLY_ERROR), | |
322 | HCMD_NAME(ECHO_CMD), | |
323 | HCMD_NAME(INIT_COMPLETE_NOTIF), | |
324 | HCMD_NAME(PHY_CONTEXT_CMD), | |
325 | HCMD_NAME(DBG_CFG), | |
39bdb17e SD |
326 | HCMD_NAME(SCAN_CFG_CMD), |
327 | HCMD_NAME(SCAN_REQ_UMAC), | |
328 | HCMD_NAME(SCAN_ABORT_UMAC), | |
329 | HCMD_NAME(SCAN_COMPLETE_UMAC), | |
330 | HCMD_NAME(TOF_CMD), | |
331 | HCMD_NAME(TOF_NOTIFICATION), | |
3af512d6 | 332 | HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), |
39bdb17e SD |
333 | HCMD_NAME(ADD_STA_KEY), |
334 | HCMD_NAME(ADD_STA), | |
335 | HCMD_NAME(REMOVE_STA), | |
336 | HCMD_NAME(FW_GET_ITEM_CMD), | |
337 | HCMD_NAME(TX_CMD), | |
338 | HCMD_NAME(SCD_QUEUE_CFG), | |
339 | HCMD_NAME(TXPATH_FLUSH), | |
340 | HCMD_NAME(MGMT_MCAST_KEY), | |
341 | HCMD_NAME(WEP_KEY), | |
342 | HCMD_NAME(SHARED_MEM_CFG), | |
343 | HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), | |
344 | HCMD_NAME(MAC_CONTEXT_CMD), | |
345 | HCMD_NAME(TIME_EVENT_CMD), | |
346 | HCMD_NAME(TIME_EVENT_NOTIFICATION), | |
347 | HCMD_NAME(BINDING_CONTEXT_CMD), | |
348 | HCMD_NAME(TIME_QUOTA_CMD), | |
349 | HCMD_NAME(NON_QOS_TX_COUNTER_CMD), | |
7089ae63 | 350 | HCMD_NAME(LEDS_CMD), |
39bdb17e SD |
351 | HCMD_NAME(LQ_CMD), |
352 | HCMD_NAME(FW_PAGING_BLOCK_CMD), | |
353 | HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), | |
354 | HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), | |
355 | HCMD_NAME(HOT_SPOT_CMD), | |
356 | HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), | |
39bdb17e SD |
357 | HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), |
358 | HCMD_NAME(BT_COEX_CI), | |
359 | HCMD_NAME(PHY_CONFIGURATION_CMD), | |
360 | HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), | |
176aa60b | 361 | HCMD_NAME(PHY_DB_CMD), |
39bdb17e SD |
362 | HCMD_NAME(SCAN_OFFLOAD_COMPLETE), |
363 | HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), | |
39bdb17e SD |
364 | HCMD_NAME(POWER_TABLE_CMD), |
365 | HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), | |
366 | HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), | |
367 | HCMD_NAME(DC2DC_CONFIG_CMD), | |
368 | HCMD_NAME(NVM_ACCESS_CMD), | |
39bdb17e SD |
369 | HCMD_NAME(BEACON_NOTIFICATION), |
370 | HCMD_NAME(BEACON_TEMPLATE_CMD), | |
371 | HCMD_NAME(TX_ANT_CONFIGURATION_CMD), | |
372 | HCMD_NAME(BT_CONFIG), | |
373 | HCMD_NAME(STATISTICS_CMD), | |
374 | HCMD_NAME(STATISTICS_NOTIFICATION), | |
375 | HCMD_NAME(EOSP_NOTIFICATION), | |
376 | HCMD_NAME(REDUCE_TX_POWER_CMD), | |
39bdb17e SD |
377 | HCMD_NAME(CARD_STATE_NOTIFICATION), |
378 | HCMD_NAME(MISSED_BEACONS_NOTIFICATION), | |
379 | HCMD_NAME(TDLS_CONFIG_CMD), | |
380 | HCMD_NAME(MAC_PM_POWER_TABLE), | |
381 | HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), | |
382 | HCMD_NAME(MFUART_LOAD_NOTIFICATION), | |
43413a97 | 383 | HCMD_NAME(RSS_CONFIG_CMD), |
39bdb17e SD |
384 | HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), |
385 | HCMD_NAME(REPLY_RX_PHY_CMD), | |
386 | HCMD_NAME(REPLY_RX_MPDU_CMD), | |
3e73aa3b | 387 | HCMD_NAME(FRAME_RELEASE), |
39bdb17e SD |
388 | HCMD_NAME(BA_NOTIF), |
389 | HCMD_NAME(MCC_UPDATE_CMD), | |
390 | HCMD_NAME(MCC_CHUB_UPDATE_CMD), | |
391 | HCMD_NAME(MARKER_CMD), | |
39bdb17e SD |
392 | HCMD_NAME(BT_PROFILE_NOTIFICATION), |
393 | HCMD_NAME(BCAST_FILTER_CMD), | |
394 | HCMD_NAME(MCAST_FILTER_CMD), | |
395 | HCMD_NAME(REPLY_SF_CFG_CMD), | |
396 | HCMD_NAME(REPLY_BEACON_FILTERING_CMD), | |
397 | HCMD_NAME(D3_CONFIG_CMD), | |
398 | HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), | |
399 | HCMD_NAME(OFFLOADS_QUERY_CMD), | |
400 | HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), | |
401 | HCMD_NAME(MATCH_FOUND_NOTIFICATION), | |
39bdb17e SD |
402 | HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), |
403 | HCMD_NAME(WOWLAN_PATTERNS), | |
404 | HCMD_NAME(WOWLAN_CONFIGURATION), | |
405 | HCMD_NAME(WOWLAN_TSC_RSC_PARAM), | |
406 | HCMD_NAME(WOWLAN_TKIP_PARAM), | |
407 | HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), | |
408 | HCMD_NAME(WOWLAN_GET_STATUSES), | |
39bdb17e SD |
409 | HCMD_NAME(SCAN_ITERATION_COMPLETE), |
410 | HCMD_NAME(D0I3_END_CMD), | |
411 | HCMD_NAME(LTR_CONFIG), | |
8ca151b5 | 412 | }; |
39bdb17e | 413 | |
5b086414 GBA |
414 | /* Please keep this array *SORTED* by hex value. |
415 | * Access is done through binary search | |
416 | */ | |
417 | static const struct iwl_hcmd_names iwl_mvm_system_names[] = { | |
418 | HCMD_NAME(SHARED_MEM_CFG_CMD), | |
4399caaa | 419 | HCMD_NAME(INIT_EXTENDED_CFG_CMD), |
5b086414 GBA |
420 | }; |
421 | ||
03098268 AE |
422 | /* Please keep this array *SORTED* by hex value. |
423 | * Access is done through binary search | |
424 | */ | |
425 | static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { | |
426 | HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD), | |
427 | HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF), | |
d3a108a4 | 428 | HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF), |
03098268 AE |
429 | }; |
430 | ||
39bdb17e SD |
431 | /* Please keep this array *SORTED* by hex value. |
432 | * Access is done through binary search | |
433 | */ | |
434 | static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { | |
435 | HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), | |
5c89e7bc | 436 | HCMD_NAME(CTDP_CONFIG_CMD), |
c221daf2 | 437 | HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), |
a6bff3cb | 438 | HCMD_NAME(GEO_TX_POWER_LIMIT), |
0a3b7119 | 439 | HCMD_NAME(CT_KILL_NOTIFICATION), |
39bdb17e SD |
440 | HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), |
441 | }; | |
442 | ||
e0d8fdec SS |
443 | /* Please keep this array *SORTED* by hex value. |
444 | * Access is done through binary search | |
445 | */ | |
446 | static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { | |
ddef2f98 | 447 | HCMD_NAME(DQA_ENABLE_CMD), |
e0d8fdec | 448 | HCMD_NAME(UPDATE_MU_GROUPS_CMD), |
94bb4481 | 449 | HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), |
65e25482 | 450 | HCMD_NAME(STA_PM_NOTIF), |
f92659a1 | 451 | HCMD_NAME(MU_GROUP_MGMT_NOTIF), |
94bb4481 | 452 | HCMD_NAME(RX_QUEUES_NOTIFICATION), |
e0d8fdec SS |
453 | }; |
454 | ||
bdccdb85 GBA |
455 | /* Please keep this array *SORTED* by hex value. |
456 | * Access is done through binary search | |
457 | */ | |
458 | static const struct iwl_hcmd_names iwl_mvm_debug_names[] = { | |
459 | HCMD_NAME(MFU_ASSERT_DUMP_NTF), | |
460 | }; | |
461 | ||
0db056d3 SS |
462 | /* Please keep this array *SORTED* by hex value. |
463 | * Access is done through binary search | |
464 | */ | |
465 | static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { | |
466 | HCMD_NAME(STORED_BEACON_NTF), | |
467 | }; | |
468 | ||
1f370650 SS |
469 | /* Please keep this array *SORTED* by hex value. |
470 | * Access is done through binary search | |
471 | */ | |
472 | static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = { | |
473 | HCMD_NAME(NVM_ACCESS_COMPLETE), | |
e9e1ba3d | 474 | HCMD_NAME(NVM_GET_INFO), |
1f370650 SS |
475 | }; |
476 | ||
39bdb17e SD |
477 | static const struct iwl_hcmd_arr iwl_mvm_groups[] = { |
478 | [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
479 | [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
5b086414 | 480 | [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), |
03098268 | 481 | [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), |
39bdb17e | 482 | [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), |
e0d8fdec | 483 | [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), |
0db056d3 | 484 | [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), |
1f370650 SS |
485 | [REGULATORY_AND_NVM_GROUP] = |
486 | HCMD_ARR(iwl_mvm_regulatory_and_nvm_names), | |
39bdb17e SD |
487 | }; |
488 | ||
8ca151b5 JB |
489 | /* this forward declaration can avoid to export the function */ |
490 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk); | |
37577fe2 | 491 | static void iwl_mvm_d0i3_exit_work(struct work_struct *wk); |
8ca151b5 | 492 | |
0c0e2c71 IY |
493 | static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg) |
494 | { | |
495 | const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs; | |
496 | ||
497 | if (!pwr_tx_backoff) | |
498 | return 0; | |
499 | ||
500 | while (pwr_tx_backoff->pwr) { | |
501 | if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr) | |
502 | return pwr_tx_backoff->backoff; | |
503 | ||
504 | pwr_tx_backoff++; | |
505 | } | |
506 | ||
507 | return 0; | |
508 | } | |
509 | ||
d3a108a4 AO |
510 | static void iwl_mvm_tx_unblock_dwork(struct work_struct *work) |
511 | { | |
512 | struct iwl_mvm *mvm = | |
513 | container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work); | |
514 | struct ieee80211_vif *tx_blocked_vif; | |
515 | struct iwl_mvm_vif *mvmvif; | |
516 | ||
517 | mutex_lock(&mvm->mutex); | |
518 | ||
519 | tx_blocked_vif = | |
520 | rcu_dereference_protected(mvm->csa_tx_blocked_vif, | |
521 | lockdep_is_held(&mvm->mutex)); | |
522 | ||
523 | if (!tx_blocked_vif) | |
524 | goto unlock; | |
525 | ||
526 | mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif); | |
527 | iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false); | |
528 | RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL); | |
529 | unlock: | |
530 | mutex_unlock(&mvm->mutex); | |
531 | } | |
532 | ||
7174beb6 JB |
533 | static int iwl_mvm_fwrt_dump_start(void *ctx) |
534 | { | |
535 | struct iwl_mvm *mvm = ctx; | |
536 | int ret; | |
537 | ||
538 | ret = iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT); | |
539 | if (ret) | |
540 | return ret; | |
541 | ||
542 | mutex_lock(&mvm->mutex); | |
543 | ||
544 | return 0; | |
545 | } | |
546 | ||
547 | static void iwl_mvm_fwrt_dump_end(void *ctx) | |
548 | { | |
549 | struct iwl_mvm *mvm = ctx; | |
550 | ||
551 | mutex_unlock(&mvm->mutex); | |
552 | ||
553 | iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT); | |
554 | } | |
555 | ||
556 | static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = { | |
557 | .dump_start = iwl_mvm_fwrt_dump_start, | |
558 | .dump_end = iwl_mvm_fwrt_dump_end, | |
559 | }; | |
560 | ||
8ca151b5 JB |
561 | static struct iwl_op_mode * |
562 | iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, | |
563 | const struct iwl_fw *fw, struct dentry *dbgfs_dir) | |
564 | { | |
565 | struct ieee80211_hw *hw; | |
566 | struct iwl_op_mode *op_mode; | |
567 | struct iwl_mvm *mvm; | |
568 | struct iwl_trans_config trans_cfg = {}; | |
569 | static const u8 no_reclaim_cmds[] = { | |
570 | TX_CMD, | |
571 | }; | |
572 | int err, scan_size; | |
0c0e2c71 | 573 | u32 min_backoff; |
8ca151b5 | 574 | |
c4d83271 EG |
575 | /* |
576 | * We use IWL_MVM_STATION_COUNT to check the validity of the station | |
577 | * index all over the driver - check that its value corresponds to the | |
578 | * array size. | |
579 | */ | |
580 | BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); | |
581 | ||
8ca151b5 JB |
582 | /******************************** |
583 | * 1. Allocating and configuring HW data | |
584 | ********************************/ | |
585 | hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + | |
586 | sizeof(struct iwl_mvm), | |
587 | &iwl_mvm_hw_ops); | |
588 | if (!hw) | |
589 | return NULL; | |
590 | ||
745160ee OG |
591 | if (cfg->max_rx_agg_size) |
592 | hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size; | |
593 | ||
77d96730 GG |
594 | if (cfg->max_tx_agg_size) |
595 | hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; | |
596 | ||
8ca151b5 | 597 | op_mode = hw->priv; |
8ca151b5 JB |
598 | |
599 | mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
600 | mvm->dev = trans->dev; | |
601 | mvm->trans = trans; | |
602 | mvm->cfg = cfg; | |
603 | mvm->fw = fw; | |
604 | mvm->hw = hw; | |
605 | ||
7174beb6 | 606 | iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm); |
235acb18 | 607 | |
de8ba41b LK |
608 | mvm->init_status = 0; |
609 | ||
0316d30e JB |
610 | if (iwl_mvm_has_new_rx_api(mvm)) { |
611 | op_mode->ops = &iwl_mvm_ops_mq; | |
25c2b22c | 612 | trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc); |
0316d30e JB |
613 | } else { |
614 | op_mode->ops = &iwl_mvm_ops; | |
25c2b22c SS |
615 | trans->rx_mpdu_cmd_hdr_size = |
616 | sizeof(struct iwl_rx_mpdu_res_start); | |
0316d30e JB |
617 | |
618 | if (WARN_ON(trans->num_rx_queues > 1)) | |
619 | goto out_free; | |
620 | } | |
621 | ||
3b37f4c9 | 622 | mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0; |
291aa7c4 | 623 | |
c8f54701 JB |
624 | mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE; |
625 | mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; | |
626 | mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE; | |
627 | ||
1f3b0ff8 | 628 | mvm->sf_state = SF_UNINIT; |
7d6222e2 | 629 | if (iwl_mvm_has_unified_ucode(mvm)) |
702e975d | 630 | iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR); |
1f370650 | 631 | else |
702e975d | 632 | iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT); |
c89e333d | 633 | mvm->drop_bcn_ap_mode = true; |
19e737c9 | 634 | |
8ca151b5 | 635 | mutex_init(&mvm->mutex); |
d15a747f | 636 | mutex_init(&mvm->d0i3_suspend_mutex); |
8ca151b5 JB |
637 | spin_lock_init(&mvm->async_handlers_lock); |
638 | INIT_LIST_HEAD(&mvm->time_event_list); | |
b112889c | 639 | INIT_LIST_HEAD(&mvm->aux_roc_te_list); |
8ca151b5 JB |
640 | INIT_LIST_HEAD(&mvm->async_handlers_list); |
641 | spin_lock_init(&mvm->time_event_lock); | |
4ecafae9 | 642 | spin_lock_init(&mvm->queue_info_lock); |
8ca151b5 JB |
643 | |
644 | INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); | |
645 | INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); | |
37577fe2 | 646 | INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work); |
1d3c3f63 | 647 | INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); |
69e04642 | 648 | INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk); |
24afba76 | 649 | INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); |
8ca151b5 | 650 | |
b2492501 | 651 | spin_lock_init(&mvm->d0i3_tx_lock); |
576eeee9 | 652 | spin_lock_init(&mvm->refs_lock); |
b2492501 AN |
653 | skb_queue_head_init(&mvm->d0i3_tx); |
654 | init_waitqueue_head(&mvm->d0i3_exit_waitq); | |
3a732c65 | 655 | init_waitqueue_head(&mvm->rx_sync_waitq); |
b2492501 | 656 | |
0636b938 SS |
657 | atomic_set(&mvm->queue_sync_counter, 0); |
658 | ||
8ca151b5 JB |
659 | SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); |
660 | ||
d3a108a4 AO |
661 | INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork); |
662 | ||
8ca151b5 JB |
663 | /* |
664 | * Populate the state variables that the transport layer needs | |
665 | * to know about. | |
666 | */ | |
667 | trans_cfg.op_mode = op_mode; | |
668 | trans_cfg.no_reclaim_cmds = no_reclaim_cmds; | |
669 | trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); | |
6c4fbcbc | 670 | switch (iwlwifi_mod_params.amsdu_size) { |
4bdd4dfe | 671 | case IWL_AMSDU_DEF: |
6c4fbcbc EG |
672 | case IWL_AMSDU_4K: |
673 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
674 | break; | |
675 | case IWL_AMSDU_8K: | |
676 | trans_cfg.rx_buf_size = IWL_AMSDU_8K; | |
677 | break; | |
678 | case IWL_AMSDU_12K: | |
679 | trans_cfg.rx_buf_size = IWL_AMSDU_12K; | |
680 | break; | |
681 | default: | |
682 | pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, | |
683 | iwlwifi_mod_params.amsdu_size); | |
684 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
685 | } | |
4bdd4dfe EG |
686 | |
687 | /* the hardware splits the A-MSDU */ | |
688 | if (mvm->cfg->mq_rx_supported) | |
689 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
8ca151b5 | 690 | |
4b87e5af LC |
691 | trans->wide_cmd_header = true; |
692 | trans_cfg.bc_table_dword = true; | |
8ca151b5 | 693 | |
39bdb17e SD |
694 | trans_cfg.command_groups = iwl_mvm_groups; |
695 | trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); | |
8ca151b5 | 696 | |
c8f54701 | 697 | trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; |
b2d81db7 | 698 | trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; |
3a736bcb | 699 | trans_cfg.scd_set_active = true; |
8ca151b5 | 700 | |
21cb3222 JB |
701 | trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info, |
702 | driver_data[2]); | |
703 | ||
b4821767 | 704 | trans_cfg.sdio_adma_addr = fw->sdio_adma_addr; |
41837ca9 | 705 | trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; |
b4821767 | 706 | |
4cf677fd EG |
707 | /* Set a short watchdog for the command queue */ |
708 | trans_cfg.cmd_q_wdg_timeout = | |
5d42e7b2 | 709 | iwl_mvm_get_wd_timeout(mvm, NULL, false, true); |
4cf677fd | 710 | |
8ca151b5 JB |
711 | snprintf(mvm->hw->wiphy->fw_version, |
712 | sizeof(mvm->hw->wiphy->fw_version), | |
713 | "%s", fw->fw_version); | |
714 | ||
715 | /* Configure transport layer */ | |
716 | iwl_trans_configure(mvm->trans, &trans_cfg); | |
717 | ||
718 | trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; | |
09e350f7 LK |
719 | trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv; |
720 | trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num; | |
721 | memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv, | |
722 | sizeof(trans->dbg_conf_tlv)); | |
d2709ad7 | 723 | trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv; |
8ca151b5 JB |
724 | |
725 | /* set up notification wait support */ | |
726 | iwl_notification_wait_init(&mvm->notif_wait); | |
727 | ||
728 | /* Init phy db */ | |
729 | mvm->phy_db = iwl_phy_db_init(trans); | |
730 | if (!mvm->phy_db) { | |
731 | IWL_ERR(mvm, "Cannot init phy_db\n"); | |
732 | goto out_free; | |
733 | } | |
734 | ||
735 | IWL_INFO(mvm, "Detected %s, REV=0x%X\n", | |
736 | mvm->cfg->name, mvm->trans->hw_rev); | |
737 | ||
4fb06283 | 738 | if (iwlwifi_mod_params.nvm_file) |
e02a9d60 | 739 | mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; |
4fb06283 EH |
740 | else |
741 | IWL_DEBUG_EEPROM(mvm->trans->dev, | |
742 | "working without external nvm file\n"); | |
9ee718aa | 743 | |
56f2929b SS |
744 | err = iwl_trans_start_hw(mvm->trans); |
745 | if (err) | |
14b485f0 EH |
746 | goto out_free; |
747 | ||
56f2929b SS |
748 | mutex_lock(&mvm->mutex); |
749 | iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE); | |
8c5f47b1 | 750 | err = iwl_run_init_mvm_ucode(mvm, true); |
b092c9f2 | 751 | if (!iwlmvm_mod_params.init_dbg) |
56f2929b SS |
752 | iwl_mvm_stop_device(mvm); |
753 | iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE); | |
754 | mutex_unlock(&mvm->mutex); | |
de8ba41b | 755 | if (err < 0) { |
56f2929b SS |
756 | IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); |
757 | goto out_free; | |
8ca151b5 JB |
758 | } |
759 | ||
d2496221 | 760 | scan_size = iwl_mvm_scan_size(mvm); |
fb98be5e | 761 | |
8ca151b5 JB |
762 | mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); |
763 | if (!mvm->scan_cmd) | |
764 | goto out_free; | |
765 | ||
5a4b2afa HD |
766 | /* Set EBS as successful as long as not stated otherwise by the FW. */ |
767 | mvm->last_ebs_successful = true; | |
768 | ||
8ca151b5 JB |
769 | err = iwl_mvm_mac_setup_register(mvm); |
770 | if (err) | |
771 | goto out_free; | |
1f370650 | 772 | mvm->hw_registered = true; |
8ca151b5 | 773 | |
04ddc2aa CRI |
774 | min_backoff = calc_min_backoff(trans, cfg); |
775 | iwl_mvm_thermal_initialize(mvm, min_backoff); | |
776 | ||
8ca151b5 JB |
777 | err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir); |
778 | if (err) | |
779 | goto out_unregister; | |
780 | ||
678d9b6d LK |
781 | if (!iwl_mvm_has_new_rx_stats_api(mvm)) |
782 | memset(&mvm->rx_stats_v3, 0, | |
783 | sizeof(struct mvm_statistics_rx_v3)); | |
784 | else | |
785 | memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); | |
3848ab66 | 786 | |
33c85ead LC |
787 | /* The transport always starts with a taken reference, we can |
788 | * release it now if d0i3 is supported */ | |
789 | if (iwl_mvm_is_d0i3_supported(mvm)) | |
790 | iwl_trans_unref(mvm->trans); | |
7498cf4c | 791 | |
ce792918 GG |
792 | iwl_mvm_tof_init(mvm); |
793 | ||
8ca151b5 JB |
794 | return op_mode; |
795 | ||
796 | out_unregister: | |
de8ba41b LK |
797 | if (iwlmvm_mod_params.init_dbg) |
798 | return op_mode; | |
799 | ||
8ca151b5 | 800 | ieee80211_unregister_hw(mvm->hw); |
1f370650 | 801 | mvm->hw_registered = false; |
91b0d119 | 802 | iwl_mvm_leds_exit(mvm); |
c221daf2 | 803 | iwl_mvm_thermal_exit(mvm); |
8ca151b5 | 804 | out_free: |
7174beb6 | 805 | iwl_fw_flush_dump(&mvm->fwrt); |
de8ba41b LK |
806 | |
807 | if (iwlmvm_mod_params.init_dbg) | |
808 | return op_mode; | |
8ca151b5 JB |
809 | iwl_phy_db_free(mvm->phy_db); |
810 | kfree(mvm->scan_cmd); | |
56f2929b SS |
811 | iwl_trans_op_mode_leave(trans); |
812 | ||
8ca151b5 JB |
813 | ieee80211_free_hw(mvm->hw); |
814 | return NULL; | |
815 | } | |
816 | ||
817 | static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) | |
818 | { | |
819 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
820 | int i; | |
821 | ||
e27deb45 LC |
822 | /* If d0i3 is supported, we have released the reference that |
823 | * the transport started with, so we should take it back now | |
824 | * that we are leaving. | |
825 | */ | |
826 | if (iwl_mvm_is_d0i3_supported(mvm)) | |
827 | iwl_trans_ref(mvm->trans); | |
828 | ||
8ca151b5 JB |
829 | iwl_mvm_leds_exit(mvm); |
830 | ||
c221daf2 | 831 | iwl_mvm_thermal_exit(mvm); |
9ee718aa | 832 | |
de8ba41b LK |
833 | if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) { |
834 | ieee80211_unregister_hw(mvm->hw); | |
835 | mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE; | |
836 | } | |
8ca151b5 JB |
837 | |
838 | kfree(mvm->scan_cmd); | |
e59647ea EP |
839 | kfree(mvm->mcast_filter_cmd); |
840 | mvm->mcast_filter_cmd = NULL; | |
8ca151b5 | 841 | |
afc66bb7 JB |
842 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS) |
843 | kfree(mvm->d3_resume_sram); | |
844 | #endif | |
845 | ||
a4082843 | 846 | iwl_trans_op_mode_leave(mvm->trans); |
8ca151b5 JB |
847 | |
848 | iwl_phy_db_free(mvm->phy_db); | |
849 | mvm->phy_db = NULL; | |
850 | ||
1dad3e0a | 851 | kfree(mvm->nvm_data); |
ae2b21b0 | 852 | for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) |
8ca151b5 JB |
853 | kfree(mvm->nvm_sections[i].data); |
854 | ||
ce792918 GG |
855 | iwl_mvm_tof_clean(mvm); |
856 | ||
a2a57a35 EG |
857 | mutex_destroy(&mvm->mutex); |
858 | mutex_destroy(&mvm->d0i3_suspend_mutex); | |
859 | ||
8ca151b5 JB |
860 | ieee80211_free_hw(mvm->hw); |
861 | } | |
862 | ||
863 | struct iwl_async_handler_entry { | |
864 | struct list_head list; | |
865 | struct iwl_rx_cmd_buffer rxb; | |
c9cb14a6 | 866 | enum iwl_rx_handler_context context; |
0416841d | 867 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
868 | }; |
869 | ||
870 | void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) | |
871 | { | |
872 | struct iwl_async_handler_entry *entry, *tmp; | |
873 | ||
874 | spin_lock_bh(&mvm->async_handlers_lock); | |
875 | list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { | |
876 | iwl_free_rxb(&entry->rxb); | |
877 | list_del(&entry->list); | |
878 | kfree(entry); | |
879 | } | |
880 | spin_unlock_bh(&mvm->async_handlers_lock); | |
881 | } | |
882 | ||
883 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk) | |
884 | { | |
885 | struct iwl_mvm *mvm = | |
886 | container_of(wk, struct iwl_mvm, async_handlers_wk); | |
887 | struct iwl_async_handler_entry *entry, *tmp; | |
8098203f | 888 | LIST_HEAD(local_list); |
8ca151b5 JB |
889 | |
890 | /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ | |
8ca151b5 JB |
891 | |
892 | /* | |
893 | * Sync with Rx path with a lock. Remove all the entries from this list, | |
894 | * add them to a local one (lock free), and then handle them. | |
895 | */ | |
896 | spin_lock_bh(&mvm->async_handlers_lock); | |
897 | list_splice_init(&mvm->async_handlers_list, &local_list); | |
898 | spin_unlock_bh(&mvm->async_handlers_lock); | |
899 | ||
900 | list_for_each_entry_safe(entry, tmp, &local_list, list) { | |
c9cb14a6 CRI |
901 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
902 | mutex_lock(&mvm->mutex); | |
0416841d | 903 | entry->fn(mvm, &entry->rxb); |
8ca151b5 JB |
904 | iwl_free_rxb(&entry->rxb); |
905 | list_del(&entry->list); | |
c9cb14a6 CRI |
906 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
907 | mutex_unlock(&mvm->mutex); | |
8ca151b5 JB |
908 | kfree(entry); |
909 | } | |
8ca151b5 JB |
910 | } |
911 | ||
917f39bb EG |
912 | static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, |
913 | struct iwl_rx_packet *pkt) | |
914 | { | |
915 | struct iwl_fw_dbg_trigger_tlv *trig; | |
916 | struct iwl_fw_dbg_trigger_cmd *cmds_trig; | |
917f39bb EG |
917 | int i; |
918 | ||
919 | if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF)) | |
920 | return; | |
921 | ||
922 | trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF); | |
923 | cmds_trig = (void *)trig->data; | |
924 | ||
7174beb6 | 925 | if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, NULL, trig)) |
917f39bb EG |
926 | return; |
927 | ||
928 | for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { | |
929 | /* don't collect on CMD 0 */ | |
930 | if (!cmds_trig->cmds[i].cmd_id) | |
931 | break; | |
932 | ||
0ab66e6d SS |
933 | if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || |
934 | cmds_trig->cmds[i].group_id != pkt->hdr.group_id) | |
917f39bb EG |
935 | continue; |
936 | ||
7174beb6 JB |
937 | iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, |
938 | "CMD 0x%02x.%02x received", | |
939 | pkt->hdr.group_id, pkt->hdr.cmd); | |
917f39bb EG |
940 | break; |
941 | } | |
942 | } | |
943 | ||
0316d30e JB |
944 | static void iwl_mvm_rx_common(struct iwl_mvm *mvm, |
945 | struct iwl_rx_cmd_buffer *rxb, | |
946 | struct iwl_rx_packet *pkt) | |
8ca151b5 | 947 | { |
0316d30e | 948 | int i; |
1738d60b | 949 | |
917f39bb EG |
950 | iwl_mvm_rx_check_trigger(mvm, pkt); |
951 | ||
8ca151b5 JB |
952 | /* |
953 | * Do the notification wait before RX handlers so | |
954 | * even if the RX handler consumes the RXB we have | |
955 | * access to it in the notification wait entry. | |
956 | */ | |
957 | iwl_notification_wait_notify(&mvm->notif_wait, pkt); | |
958 | ||
959 | for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { | |
960 | const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; | |
36eed56a EG |
961 | struct iwl_async_handler_entry *entry; |
962 | ||
1230b16b | 963 | if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) |
36eed56a EG |
964 | continue; |
965 | ||
c9cb14a6 | 966 | if (rx_h->context == RX_HANDLER_SYNC) { |
0416841d | 967 | rx_h->fn(mvm, rxb); |
f7e6469f | 968 | return; |
0416841d | 969 | } |
36eed56a EG |
970 | |
971 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
972 | /* we can't do much... */ | |
973 | if (!entry) | |
f7e6469f | 974 | return; |
36eed56a EG |
975 | |
976 | entry->rxb._page = rxb_steal_page(rxb); | |
977 | entry->rxb._offset = rxb->_offset; | |
978 | entry->rxb._rx_page_order = rxb->_rx_page_order; | |
979 | entry->fn = rx_h->fn; | |
c9cb14a6 | 980 | entry->context = rx_h->context; |
36eed56a EG |
981 | spin_lock(&mvm->async_handlers_lock); |
982 | list_add_tail(&entry->list, &mvm->async_handlers_list); | |
983 | spin_unlock(&mvm->async_handlers_lock); | |
984 | schedule_work(&mvm->async_handlers_wk); | |
f2e66c8d | 985 | return; |
8ca151b5 | 986 | } |
f2e66c8d MG |
987 | |
988 | iwl_fwrt_handle_notification(&mvm->fwrt, rxb); | |
8ca151b5 JB |
989 | } |
990 | ||
0316d30e JB |
991 | static void iwl_mvm_rx(struct iwl_op_mode *op_mode, |
992 | struct napi_struct *napi, | |
993 | struct iwl_rx_cmd_buffer *rxb) | |
994 | { | |
995 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
996 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 997 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 998 | |
61b0f5d7 | 999 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
0316d30e | 1000 | iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); |
61b0f5d7 | 1001 | else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD)) |
0316d30e JB |
1002 | iwl_mvm_rx_rx_phy_cmd(mvm, rxb); |
1003 | else | |
1004 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1005 | } | |
1006 | ||
1007 | static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, | |
1008 | struct napi_struct *napi, | |
1009 | struct iwl_rx_cmd_buffer *rxb) | |
1010 | { | |
1011 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1012 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 1013 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1014 | |
61b0f5d7 | 1015 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
780e87c2 | 1016 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); |
61b0f5d7 JB |
1017 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1018 | RX_QUEUES_NOTIFICATION))) | |
94bb4481 | 1019 | iwl_mvm_rx_queue_notif(mvm, rxb, 0); |
61b0f5d7 | 1020 | else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)) |
58035432 | 1021 | iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); |
0316d30e JB |
1022 | else |
1023 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1024 | } | |
1025 | ||
b4f7a9d1 | 1026 | void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq) |
8ca151b5 | 1027 | { |
4ecafae9 | 1028 | int q; |
8ca151b5 | 1029 | |
4ecafae9 | 1030 | if (WARN_ON_ONCE(!mq)) |
8ca151b5 | 1031 | return; |
8ca151b5 | 1032 | |
4ecafae9 LK |
1033 | for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { |
1034 | if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) { | |
1035 | IWL_DEBUG_TX_QUEUES(mvm, | |
b4f7a9d1 | 1036 | "mac80211 %d already stopped\n", q); |
4ecafae9 LK |
1037 | continue; |
1038 | } | |
1039 | ||
1040 | ieee80211_stop_queue(mvm->hw, q); | |
1041 | } | |
8ca151b5 JB |
1042 | } |
1043 | ||
156f92f2 EG |
1044 | static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, |
1045 | const struct iwl_device_cmd *cmd) | |
1046 | { | |
1047 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1048 | ||
1049 | /* | |
1050 | * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA | |
1051 | * commands that need to block the Tx queues. | |
1052 | */ | |
1053 | iwl_trans_block_txq_ptrs(mvm->trans, false); | |
1054 | } | |
1055 | ||
b4f7a9d1 | 1056 | static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
8ca151b5 JB |
1057 | { |
1058 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
4ecafae9 | 1059 | unsigned long mq; |
8ca151b5 | 1060 | |
4ecafae9 | 1061 | spin_lock_bh(&mvm->queue_info_lock); |
34e10860 | 1062 | mq = mvm->hw_queue_to_mac80211[hw_queue]; |
4ecafae9 | 1063 | spin_unlock_bh(&mvm->queue_info_lock); |
8ca151b5 | 1064 | |
b4f7a9d1 LK |
1065 | iwl_mvm_stop_mac_queues(mvm, mq); |
1066 | } | |
1067 | ||
1068 | void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq) | |
1069 | { | |
1070 | int q; | |
1071 | ||
4ecafae9 | 1072 | if (WARN_ON_ONCE(!mq)) |
8ca151b5 | 1073 | return; |
8ca151b5 | 1074 | |
4ecafae9 LK |
1075 | for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { |
1076 | if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) { | |
1077 | IWL_DEBUG_TX_QUEUES(mvm, | |
b4f7a9d1 | 1078 | "mac80211 %d still stopped\n", q); |
4ecafae9 LK |
1079 | continue; |
1080 | } | |
1081 | ||
1082 | ieee80211_wake_queue(mvm->hw, q); | |
1083 | } | |
8ca151b5 JB |
1084 | } |
1085 | ||
b4f7a9d1 LK |
1086 | static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
1087 | { | |
1088 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1089 | unsigned long mq; | |
1090 | ||
1091 | spin_lock_bh(&mvm->queue_info_lock); | |
34e10860 | 1092 | mq = mvm->hw_queue_to_mac80211[hw_queue]; |
b4f7a9d1 LK |
1093 | spin_unlock_bh(&mvm->queue_info_lock); |
1094 | ||
1095 | iwl_mvm_start_mac_queues(mvm, mq); | |
1096 | } | |
1097 | ||
6ad04359 JB |
1098 | static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm) |
1099 | { | |
1100 | bool state = iwl_mvm_is_radio_killed(mvm); | |
1101 | ||
1102 | if (state) | |
1103 | wake_up(&mvm->rx_sync_waitq); | |
1104 | ||
1105 | wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state); | |
1106 | } | |
1107 | ||
9ee718aa EL |
1108 | void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) |
1109 | { | |
1110 | if (state) | |
1111 | set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1112 | else | |
1113 | clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1114 | ||
6ad04359 | 1115 | iwl_mvm_set_rfkill_state(mvm); |
9ee718aa EL |
1116 | } |
1117 | ||
14cfca71 | 1118 | static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) |
8ca151b5 JB |
1119 | { |
1120 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
6aa7de05 | 1121 | bool calibrating = READ_ONCE(mvm->calibrating); |
8ca151b5 JB |
1122 | |
1123 | if (state) | |
1124 | set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1125 | else | |
1126 | clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1127 | ||
6ad04359 | 1128 | iwl_mvm_set_rfkill_state(mvm); |
14cfca71 | 1129 | |
31b8b343 EG |
1130 | /* iwl_run_init_mvm_ucode is waiting for results, abort it */ |
1131 | if (calibrating) | |
1132 | iwl_abort_notification_waits(&mvm->notif_wait); | |
1133 | ||
1134 | /* | |
1135 | * Stop the device if we run OPERATIONAL firmware or if we are in the | |
1136 | * middle of the calibrations. | |
1137 | */ | |
702e975d | 1138 | return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating); |
8ca151b5 JB |
1139 | } |
1140 | ||
1141 | static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) | |
1142 | { | |
1143 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1144 | struct ieee80211_tx_info *info; | |
1145 | ||
1146 | info = IEEE80211_SKB_CB(skb); | |
1147 | iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); | |
1148 | ieee80211_free_txskb(mvm->hw, skb); | |
1149 | } | |
1150 | ||
ac1ed416 JB |
1151 | struct iwl_mvm_reprobe { |
1152 | struct device *dev; | |
1153 | struct work_struct work; | |
1154 | }; | |
1155 | ||
1156 | static void iwl_mvm_reprobe_wk(struct work_struct *wk) | |
1157 | { | |
1158 | struct iwl_mvm_reprobe *reprobe; | |
1159 | ||
1160 | reprobe = container_of(wk, struct iwl_mvm_reprobe, work); | |
1161 | if (device_reprobe(reprobe->dev)) | |
1162 | dev_err(reprobe->dev, "reprobe failed!\n"); | |
1163 | kfree(reprobe); | |
1164 | module_put(THIS_MODULE); | |
1165 | } | |
1166 | ||
b08c1d97 | 1167 | void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) |
8ca151b5 | 1168 | { |
8ca151b5 JB |
1169 | iwl_abort_notification_waits(&mvm->notif_wait); |
1170 | ||
992f81fc DS |
1171 | /* |
1172 | * This is a bit racy, but worst case we tell mac80211 about | |
1173 | * a stopped/aborted scan when that was already done which | |
1174 | * is not a problem. It is necessary to abort any os scan | |
1175 | * here because mac80211 requires having the scan cleared | |
1176 | * before restarting. | |
1177 | * We'll reset the scan_status to NONE in restart cleanup in | |
1178 | * the next start() call from mac80211. If restart isn't called | |
1179 | * (no fw restart) scan status will stay busy. | |
1180 | */ | |
4ffb3650 | 1181 | iwl_mvm_report_scan_aborted(mvm); |
992f81fc | 1182 | |
8ca151b5 JB |
1183 | /* |
1184 | * If we're restarting already, don't cycle restarts. | |
1185 | * If INIT fw asserted, it will likely fail again. | |
1186 | * If WoWLAN fw asserted, don't restart either, mac80211 | |
1187 | * can't recover this since we're already half suspended. | |
1188 | */ | |
3b37f4c9 | 1189 | if (!mvm->fw_restart && fw_error) { |
7174beb6 | 1190 | iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert, |
bf8b286f JB |
1191 | NULL); |
1192 | } else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { | |
ac1ed416 JB |
1193 | struct iwl_mvm_reprobe *reprobe; |
1194 | ||
1195 | IWL_ERR(mvm, | |
1196 | "Firmware error during reconfiguration - reprobe!\n"); | |
1197 | ||
1198 | /* | |
1199 | * get a module reference to avoid doing this while unloading | |
1200 | * anyway and to avoid scheduling a work with code that's | |
1201 | * being removed. | |
1202 | */ | |
1203 | if (!try_module_get(THIS_MODULE)) { | |
1204 | IWL_ERR(mvm, "Module is being unloaded - abort\n"); | |
1205 | return; | |
1206 | } | |
1207 | ||
1208 | reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); | |
1209 | if (!reprobe) { | |
1210 | module_put(THIS_MODULE); | |
1211 | return; | |
1212 | } | |
1213 | reprobe->dev = mvm->trans->dev; | |
1214 | INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); | |
1215 | schedule_work(&reprobe->work); | |
702e975d | 1216 | } else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR && |
1f370650 | 1217 | mvm->hw_registered) { |
7498cf4c EP |
1218 | /* don't let the transport/FW power down */ |
1219 | iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN); | |
1220 | ||
3b37f4c9 JB |
1221 | if (fw_error && mvm->fw_restart > 0) |
1222 | mvm->fw_restart--; | |
bf8b286f | 1223 | set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status); |
8ca151b5 JB |
1224 | ieee80211_restart_hw(mvm->hw); |
1225 | } | |
1226 | } | |
1227 | ||
715c998f EG |
1228 | static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) |
1229 | { | |
1230 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1231 | ||
1232 | iwl_mvm_dump_nic_error_log(mvm); | |
1bd3cbc1 | 1233 | |
b08c1d97 | 1234 | iwl_mvm_nic_restart(mvm, true); |
715c998f EG |
1235 | } |
1236 | ||
8ca151b5 JB |
1237 | static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) |
1238 | { | |
715c998f EG |
1239 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); |
1240 | ||
8ca151b5 | 1241 | WARN_ON(1); |
b08c1d97 | 1242 | iwl_mvm_nic_restart(mvm, true); |
8ca151b5 JB |
1243 | } |
1244 | ||
37577fe2 EP |
1245 | struct iwl_d0i3_iter_data { |
1246 | struct iwl_mvm *mvm; | |
a3f7ba5c | 1247 | struct ieee80211_vif *connected_vif; |
37577fe2 EP |
1248 | u8 ap_sta_id; |
1249 | u8 vif_count; | |
b2492501 AN |
1250 | u8 offloading_tid; |
1251 | bool disable_offloading; | |
37577fe2 EP |
1252 | }; |
1253 | ||
b2492501 AN |
1254 | static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm, |
1255 | struct ieee80211_vif *vif, | |
1256 | struct iwl_d0i3_iter_data *iter_data) | |
1257 | { | |
1258 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
b2492501 AN |
1259 | struct iwl_mvm_sta *mvmsta; |
1260 | u32 available_tids = 0; | |
1261 | u8 tid; | |
1262 | ||
1263 | if (WARN_ON(vif->type != NL80211_IFTYPE_STATION || | |
0ae98812 | 1264 | mvmvif->ap_sta_id == IWL_MVM_INVALID_STA)) |
b2492501 AN |
1265 | return false; |
1266 | ||
13303c0f SS |
1267 | mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); |
1268 | if (!mvmsta) | |
b2492501 AN |
1269 | return false; |
1270 | ||
b2492501 AN |
1271 | spin_lock_bh(&mvmsta->lock); |
1272 | for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { | |
1273 | struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; | |
1274 | ||
1275 | /* | |
1276 | * in case of pending tx packets, don't use this tid | |
1277 | * for offloading in order to prevent reuse of the same | |
1278 | * qos seq counters. | |
1279 | */ | |
dd32162d | 1280 | if (iwl_mvm_tid_queued(mvm, tid_data)) |
b2492501 AN |
1281 | continue; |
1282 | ||
1283 | if (tid_data->state != IWL_AGG_OFF) | |
1284 | continue; | |
1285 | ||
1286 | available_tids |= BIT(tid); | |
1287 | } | |
1288 | spin_unlock_bh(&mvmsta->lock); | |
1289 | ||
1290 | /* | |
1291 | * disallow protocol offloading if we have no available tid | |
1292 | * (with no pending frames and no active aggregation, | |
1293 | * as we don't handle "holes" properly - the scheduler needs the | |
1294 | * frame's seq number and TFD index to match) | |
1295 | */ | |
1296 | if (!available_tids) | |
1297 | return true; | |
1298 | ||
1299 | /* for simplicity, just use the first available tid */ | |
1300 | iter_data->offloading_tid = ffs(available_tids) - 1; | |
1301 | return false; | |
1302 | } | |
1303 | ||
d6230972 EP |
1304 | static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac, |
1305 | struct ieee80211_vif *vif) | |
1306 | { | |
37577fe2 EP |
1307 | struct iwl_d0i3_iter_data *data = _data; |
1308 | struct iwl_mvm *mvm = data->mvm; | |
1309 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
d6230972 EP |
1310 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; |
1311 | ||
1312 | IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr); | |
1313 | if (vif->type != NL80211_IFTYPE_STATION || | |
1314 | !vif->bss_conf.assoc) | |
1315 | return; | |
1316 | ||
b2492501 AN |
1317 | /* |
1318 | * in case of pending tx packets or active aggregations, | |
1319 | * avoid offloading features in order to prevent reuse of | |
1320 | * the same qos seq counters. | |
1321 | */ | |
1322 | if (iwl_mvm_disallow_offloading(mvm, vif, data)) | |
1323 | data->disable_offloading = true; | |
1324 | ||
d6230972 | 1325 | iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags); |
c97dab40 SS |
1326 | iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading, |
1327 | false, flags); | |
d6230972 EP |
1328 | |
1329 | /* | |
1330 | * on init/association, mvm already configures POWER_TABLE_CMD | |
1331 | * and REPLY_MCAST_FILTER_CMD, so currently don't | |
1332 | * reconfigure them (we might want to use different | |
1333 | * params later on, though). | |
1334 | */ | |
37577fe2 EP |
1335 | data->ap_sta_id = mvmvif->ap_sta_id; |
1336 | data->vif_count++; | |
a3f7ba5c EP |
1337 | |
1338 | /* | |
1339 | * no new commands can be sent at this stage, so it's safe | |
1340 | * to save the vif pointer during d0i3 entrance. | |
1341 | */ | |
1342 | data->connected_vif = vif; | |
d6230972 EP |
1343 | } |
1344 | ||
1a95c8df | 1345 | static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm, |
c8b06a99 | 1346 | struct iwl_wowlan_config_cmd *cmd, |
1a95c8df EP |
1347 | struct iwl_d0i3_iter_data *iter_data) |
1348 | { | |
1349 | struct ieee80211_sta *ap_sta; | |
1350 | struct iwl_mvm_sta *mvm_ap_sta; | |
1351 | ||
0ae98812 | 1352 | if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA) |
1a95c8df EP |
1353 | return; |
1354 | ||
1355 | rcu_read_lock(); | |
1356 | ||
1357 | ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]); | |
1358 | if (IS_ERR_OR_NULL(ap_sta)) | |
1359 | goto out; | |
1360 | ||
1361 | mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta); | |
c8b06a99 | 1362 | cmd->is_11n_connection = ap_sta->ht_cap.ht_supported; |
b2492501 | 1363 | cmd->offloading_tid = iter_data->offloading_tid; |
70b4c536 | 1364 | cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | |
0db056d3 | 1365 | ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON; |
1a95c8df EP |
1366 | /* |
1367 | * The d0i3 uCode takes care of the nonqos counters, | |
1368 | * so configure only the qos seq ones. | |
1369 | */ | |
c8b06a99 | 1370 | iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd); |
1a95c8df EP |
1371 | out: |
1372 | rcu_read_unlock(); | |
1373 | } | |
6735943f EP |
1374 | |
1375 | int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode) | |
b3370d47 EP |
1376 | { |
1377 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
98ee7783 | 1378 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; |
b77f06d9 | 1379 | int ret; |
37577fe2 EP |
1380 | struct iwl_d0i3_iter_data d0i3_iter_data = { |
1381 | .mvm = mvm, | |
1382 | }; | |
c8b06a99 EG |
1383 | struct iwl_wowlan_config_cmd wowlan_config_cmd = { |
1384 | .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME | | |
1385 | IWL_WOWLAN_WAKEUP_BEACON_MISS | | |
0db056d3 | 1386 | IWL_WOWLAN_WAKEUP_LINK_CHANGE), |
b77f06d9 | 1387 | }; |
98ee7783 AN |
1388 | struct iwl_d3_manager_config d3_cfg_cmd = { |
1389 | .min_sleep_time = cpu_to_le32(1000), | |
d9f1fc20 | 1390 | .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR), |
98ee7783 | 1391 | }; |
b3370d47 EP |
1392 | |
1393 | IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n"); | |
98ee7783 | 1394 | |
702e975d | 1395 | if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) |
08f0d23d EP |
1396 | return -EINVAL; |
1397 | ||
b2492501 | 1398 | set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); |
b2492501 | 1399 | |
f4cf8680 EP |
1400 | /* |
1401 | * iwl_mvm_ref_sync takes a reference before checking the flag. | |
1402 | * so by checking there is no held reference we prevent a state | |
1403 | * in which iwl_mvm_ref_sync continues successfully while we | |
1404 | * configure the firmware to enter d0i3 | |
1405 | */ | |
1406 | if (iwl_mvm_ref_taken(mvm)) { | |
1407 | IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n"); | |
1408 | clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); | |
caf1578a | 1409 | wake_up(&mvm->d0i3_exit_waitq); |
f4cf8680 EP |
1410 | return 1; |
1411 | } | |
1412 | ||
d6230972 EP |
1413 | ieee80211_iterate_active_interfaces_atomic(mvm->hw, |
1414 | IEEE80211_IFACE_ITER_NORMAL, | |
1415 | iwl_mvm_enter_d0i3_iterator, | |
37577fe2 EP |
1416 | &d0i3_iter_data); |
1417 | if (d0i3_iter_data.vif_count == 1) { | |
1418 | mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id; | |
b2492501 | 1419 | mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading; |
37577fe2 EP |
1420 | } else { |
1421 | WARN_ON_ONCE(d0i3_iter_data.vif_count > 1); | |
0ae98812 | 1422 | mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; |
b2492501 | 1423 | mvm->d0i3_offloading = false; |
37577fe2 | 1424 | } |
d6230972 | 1425 | |
ecc7c518 EG |
1426 | /* make sure we have no running tx while configuring the seqno */ |
1427 | synchronize_net(); | |
1428 | ||
eb3908d3 | 1429 | /* Flush the hw queues, in case something got queued during entry */ |
d167e81a MG |
1430 | /* TODO new tx api */ |
1431 | if (iwl_mvm_has_new_tx_api(mvm)) { | |
1432 | WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n"); | |
1433 | } else { | |
1434 | ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), | |
1435 | flags); | |
1436 | if (ret) | |
1437 | return ret; | |
1438 | } | |
eb3908d3 | 1439 | |
183edd84 | 1440 | /* configure wowlan configuration only if needed */ |
0ae98812 | 1441 | if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) { |
0db056d3 SS |
1442 | /* wake on beacons only if beacon storing isn't supported */ |
1443 | if (!fw_has_capa(&mvm->fw->ucode_capa, | |
1444 | IWL_UCODE_TLV_CAPA_BEACON_STORING)) | |
1445 | wowlan_config_cmd.wakeup_filter |= | |
1446 | cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING); | |
1447 | ||
a3f7ba5c EP |
1448 | iwl_mvm_wowlan_config_key_params(mvm, |
1449 | d0i3_iter_data.connected_vif, | |
1450 | true, flags); | |
1451 | ||
183edd84 EP |
1452 | iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd, |
1453 | &d0i3_iter_data); | |
1454 | ||
1455 | ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags, | |
1456 | sizeof(wowlan_config_cmd), | |
1457 | &wowlan_config_cmd); | |
1458 | if (ret) | |
1459 | return ret; | |
1460 | } | |
b77f06d9 | 1461 | |
98ee7783 AN |
1462 | return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD, |
1463 | flags | CMD_MAKE_TRANS_IDLE, | |
1464 | sizeof(d3_cfg_cmd), &d3_cfg_cmd); | |
b3370d47 EP |
1465 | } |
1466 | ||
d6230972 EP |
1467 | static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac, |
1468 | struct ieee80211_vif *vif) | |
1469 | { | |
1470 | struct iwl_mvm *mvm = _data; | |
1471 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO; | |
1472 | ||
1473 | IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr); | |
1474 | if (vif->type != NL80211_IFTYPE_STATION || | |
1475 | !vif->bss_conf.assoc) | |
1476 | return; | |
1477 | ||
1478 | iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags); | |
1479 | } | |
1480 | ||
a3f7ba5c | 1481 | struct iwl_mvm_d0i3_exit_work_iter_data { |
b3df2247 | 1482 | struct iwl_mvm *mvm; |
a3f7ba5c | 1483 | struct iwl_wowlan_status *status; |
b3df2247 DS |
1484 | u32 wakeup_reasons; |
1485 | }; | |
1486 | ||
a3f7ba5c EP |
1487 | static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac, |
1488 | struct ieee80211_vif *vif) | |
37577fe2 | 1489 | { |
a3f7ba5c | 1490 | struct iwl_mvm_d0i3_exit_work_iter_data *data = _data; |
37577fe2 | 1491 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
a3f7ba5c | 1492 | u32 reasons = data->wakeup_reasons; |
37577fe2 | 1493 | |
a3f7ba5c EP |
1494 | /* consider only the relevant station interface */ |
1495 | if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || | |
1496 | data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id) | |
1497 | return; | |
1498 | ||
1499 | if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH) | |
1500 | iwl_mvm_connection_loss(data->mvm, vif, "D0i3"); | |
1501 | else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON) | |
1502 | ieee80211_beacon_loss(vif); | |
1503 | else | |
1504 | iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status); | |
37577fe2 EP |
1505 | } |
1506 | ||
b2492501 AN |
1507 | void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq) |
1508 | { | |
1509 | struct ieee80211_sta *sta = NULL; | |
1510 | struct iwl_mvm_sta *mvm_ap_sta; | |
1511 | int i; | |
1512 | bool wake_queues = false; | |
1513 | ||
1514 | lockdep_assert_held(&mvm->mutex); | |
1515 | ||
1516 | spin_lock_bh(&mvm->d0i3_tx_lock); | |
1517 | ||
0ae98812 | 1518 | if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA) |
b2492501 AN |
1519 | goto out; |
1520 | ||
1521 | IWL_DEBUG_RPM(mvm, "re-enqueue packets\n"); | |
1522 | ||
1523 | /* get the sta in order to update seq numbers and re-enqueue skbs */ | |
1524 | sta = rcu_dereference_protected( | |
1525 | mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id], | |
1526 | lockdep_is_held(&mvm->mutex)); | |
1527 | ||
1528 | if (IS_ERR_OR_NULL(sta)) { | |
1529 | sta = NULL; | |
1530 | goto out; | |
1531 | } | |
1532 | ||
1533 | if (mvm->d0i3_offloading && qos_seq) { | |
1534 | /* update qos seq numbers if offloading was enabled */ | |
9d8ce6af | 1535 | mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta); |
b2492501 AN |
1536 | for (i = 0; i < IWL_MAX_TID_COUNT; i++) { |
1537 | u16 seq = le16_to_cpu(qos_seq[i]); | |
1538 | /* firmware stores last-used one, we store next one */ | |
1539 | seq += 0x10; | |
1540 | mvm_ap_sta->tid_data[i].seq_number = seq; | |
1541 | } | |
1542 | } | |
1543 | out: | |
1544 | /* re-enqueue (or drop) all packets */ | |
1545 | while (!skb_queue_empty(&mvm->d0i3_tx)) { | |
1546 | struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx); | |
1547 | ||
1548 | if (!sta || iwl_mvm_tx_skb(mvm, skb, sta)) | |
1549 | ieee80211_free_txskb(mvm->hw, skb); | |
1550 | ||
1551 | /* if the skb_queue is not empty, we need to wake queues */ | |
1552 | wake_queues = true; | |
1553 | } | |
1554 | clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); | |
1555 | wake_up(&mvm->d0i3_exit_waitq); | |
0ae98812 | 1556 | mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; |
b2492501 AN |
1557 | if (wake_queues) |
1558 | ieee80211_wake_queues(mvm->hw); | |
1559 | ||
1560 | spin_unlock_bh(&mvm->d0i3_tx_lock); | |
1561 | } | |
1562 | ||
37577fe2 EP |
1563 | static void iwl_mvm_d0i3_exit_work(struct work_struct *wk) |
1564 | { | |
1565 | struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work); | |
1566 | struct iwl_host_cmd get_status_cmd = { | |
1567 | .id = WOWLAN_GET_STATUSES, | |
a1022927 | 1568 | .flags = CMD_HIGH_PRIO | CMD_WANT_SKB, |
37577fe2 | 1569 | }; |
a3f7ba5c EP |
1570 | struct iwl_mvm_d0i3_exit_work_iter_data iter_data = { |
1571 | .mvm = mvm, | |
1572 | }; | |
1573 | ||
3afec639 | 1574 | struct iwl_wowlan_status *status; |
37577fe2 | 1575 | int ret; |
a3f7ba5c | 1576 | u32 wakeup_reasons = 0; |
b2492501 | 1577 | __le16 *qos_seq = NULL; |
37577fe2 EP |
1578 | |
1579 | mutex_lock(&mvm->mutex); | |
1580 | ret = iwl_mvm_send_cmd(mvm, &get_status_cmd); | |
1581 | if (ret) | |
1582 | goto out; | |
1583 | ||
37577fe2 EP |
1584 | status = (void *)get_status_cmd.resp_pkt->data; |
1585 | wakeup_reasons = le32_to_cpu(status->wakeup_reasons); | |
b2492501 | 1586 | qos_seq = status->qos_seq_ctr; |
37577fe2 EP |
1587 | |
1588 | IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons); | |
1589 | ||
a3f7ba5c EP |
1590 | iter_data.wakeup_reasons = wakeup_reasons; |
1591 | iter_data.status = status; | |
1592 | ieee80211_iterate_active_interfaces(mvm->hw, | |
1593 | IEEE80211_IFACE_ITER_NORMAL, | |
1594 | iwl_mvm_d0i3_exit_work_iter, | |
1595 | &iter_data); | |
37577fe2 | 1596 | out: |
b2492501 | 1597 | iwl_mvm_d0i3_enable_tx(mvm, qos_seq); |
47c8b154 | 1598 | |
7c014e35 EP |
1599 | IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n", |
1600 | wakeup_reasons); | |
1601 | ||
e5629be7 EP |
1602 | /* qos_seq might point inside resp_pkt, so free it only now */ |
1603 | if (get_status_cmd.resp_pkt) | |
1604 | iwl_free_resp(&get_status_cmd); | |
1605 | ||
47c8b154 JD |
1606 | /* the FW might have updated the regdomain */ |
1607 | iwl_mvm_update_changed_regdom(mvm); | |
1608 | ||
d15a747f | 1609 | iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK); |
37577fe2 EP |
1610 | mutex_unlock(&mvm->mutex); |
1611 | } | |
1612 | ||
d15a747f | 1613 | int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm) |
b3370d47 | 1614 | { |
98ee7783 AN |
1615 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE | |
1616 | CMD_WAKE_UP_TRANS; | |
d6230972 | 1617 | int ret; |
b3370d47 EP |
1618 | |
1619 | IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n"); | |
98ee7783 | 1620 | |
702e975d | 1621 | if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) |
08f0d23d EP |
1622 | return -EINVAL; |
1623 | ||
d15a747f EP |
1624 | mutex_lock(&mvm->d0i3_suspend_mutex); |
1625 | if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) { | |
1626 | IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n"); | |
1627 | __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags); | |
1628 | mutex_unlock(&mvm->d0i3_suspend_mutex); | |
1629 | return 0; | |
1630 | } | |
1631 | mutex_unlock(&mvm->d0i3_suspend_mutex); | |
1632 | ||
d6230972 EP |
1633 | ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL); |
1634 | if (ret) | |
37577fe2 | 1635 | goto out; |
d6230972 EP |
1636 | |
1637 | ieee80211_iterate_active_interfaces_atomic(mvm->hw, | |
1638 | IEEE80211_IFACE_ITER_NORMAL, | |
1639 | iwl_mvm_exit_d0i3_iterator, | |
1640 | mvm); | |
37577fe2 EP |
1641 | out: |
1642 | schedule_work(&mvm->d0i3_exit_work); | |
1643 | return ret; | |
b3370d47 EP |
1644 | } |
1645 | ||
6735943f | 1646 | int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode) |
d15a747f EP |
1647 | { |
1648 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1649 | ||
1650 | iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK); | |
1651 | return _iwl_mvm_exit_d0i3(mvm); | |
1652 | } | |
1653 | ||
0316d30e JB |
1654 | #define IWL_MVM_COMMON_OPS \ |
1655 | /* these could be differentiated */ \ | |
156f92f2 | 1656 | .async_cb = iwl_mvm_async_cb, \ |
0316d30e JB |
1657 | .queue_full = iwl_mvm_stop_sw_queue, \ |
1658 | .queue_not_full = iwl_mvm_wake_sw_queue, \ | |
1659 | .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ | |
1660 | .free_skb = iwl_mvm_free_skb, \ | |
1661 | .nic_error = iwl_mvm_nic_error, \ | |
1662 | .cmd_queue_full = iwl_mvm_cmd_queue_full, \ | |
1663 | .nic_config = iwl_mvm_nic_config, \ | |
1664 | .enter_d0i3 = iwl_mvm_enter_d0i3, \ | |
1665 | .exit_d0i3 = iwl_mvm_exit_d0i3, \ | |
1666 | /* as we only register one, these MUST be common! */ \ | |
1667 | .start = iwl_op_mode_mvm_start, \ | |
1668 | .stop = iwl_op_mode_mvm_stop | |
1669 | ||
8ca151b5 | 1670 | static const struct iwl_op_mode_ops iwl_mvm_ops = { |
0316d30e JB |
1671 | IWL_MVM_COMMON_OPS, |
1672 | .rx = iwl_mvm_rx, | |
1673 | }; | |
1674 | ||
1675 | static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, | |
1676 | struct napi_struct *napi, | |
1677 | struct iwl_rx_cmd_buffer *rxb, | |
1678 | unsigned int queue) | |
1679 | { | |
1680 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
585a6fcc | 1681 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
61b0f5d7 | 1682 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1683 | |
61b0f5d7 | 1684 | if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))) |
a338384b | 1685 | iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); |
61b0f5d7 JB |
1686 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1687 | RX_QUEUES_NOTIFICATION))) | |
94bb4481 | 1688 | iwl_mvm_rx_queue_notif(mvm, rxb, queue); |
61b0f5d7 | 1689 | else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
585a6fcc | 1690 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); |
0316d30e JB |
1691 | } |
1692 | ||
1693 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { | |
1694 | IWL_MVM_COMMON_OPS, | |
1695 | .rx = iwl_mvm_rx_mq, | |
1696 | .rx_rss = iwl_mvm_rx_mq_rss, | |
8ca151b5 | 1697 | }; |