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4bc85c13 WYG |
1 | /****************************************************************************** |
2 | * | |
be663ab6 | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4bc85c13 WYG |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * Intel Linux Wireless <ilw@linux.intel.com> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | *****************************************************************************/ | |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/dma-mapping.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/sched.h> | |
34 | #include <linux/skbuff.h> | |
35 | #include <linux/netdevice.h> | |
36 | #include <linux/wireless.h> | |
37 | #include <net/mac80211.h> | |
38 | #include <linux/etherdevice.h> | |
39 | #include <asm/unaligned.h> | |
40 | ||
41 | #include "iwl-eeprom.h" | |
42 | #include "iwl-dev.h" | |
43 | #include "iwl-core.h" | |
44 | #include "iwl-io.h" | |
45 | #include "iwl-helpers.h" | |
be663ab6 | 46 | #include "iwl-4965-calib.h" |
4bc85c13 | 47 | #include "iwl-sta.h" |
be663ab6 WYG |
48 | #include "iwl-4965-led.h" |
49 | #include "iwl-4965.h" | |
50 | #include "iwl-4965-debugfs.h" | |
4bc85c13 WYG |
51 | |
52 | static int iwl4965_send_tx_power(struct iwl_priv *priv); | |
53 | static int iwl4965_hw_get_temperature(struct iwl_priv *priv); | |
54 | ||
55 | /* Highest firmware API version supported */ | |
56 | #define IWL4965_UCODE_API_MAX 2 | |
57 | ||
58 | /* Lowest firmware API version supported */ | |
59 | #define IWL4965_UCODE_API_MIN 2 | |
60 | ||
61 | #define IWL4965_FW_PRE "iwlwifi-4965-" | |
62 | #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode" | |
63 | #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api) | |
64 | ||
65 | /* check contents of special bootstrap uCode SRAM */ | |
66 | static int iwl4965_verify_bsm(struct iwl_priv *priv) | |
67 | { | |
68 | __le32 *image = priv->ucode_boot.v_addr; | |
69 | u32 len = priv->ucode_boot.len; | |
70 | u32 reg; | |
71 | u32 val; | |
72 | ||
73 | IWL_DEBUG_INFO(priv, "Begin verify bsm\n"); | |
74 | ||
75 | /* verify BSM SRAM contents */ | |
be663ab6 | 76 | val = iwl_legacy_read_prph(priv, BSM_WR_DWCOUNT_REG); |
4bc85c13 WYG |
77 | for (reg = BSM_SRAM_LOWER_BOUND; |
78 | reg < BSM_SRAM_LOWER_BOUND + len; | |
79 | reg += sizeof(u32), image++) { | |
be663ab6 | 80 | val = iwl_legacy_read_prph(priv, reg); |
4bc85c13 WYG |
81 | if (val != le32_to_cpu(*image)) { |
82 | IWL_ERR(priv, "BSM uCode verification failed at " | |
83 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | |
84 | BSM_SRAM_LOWER_BOUND, | |
85 | reg - BSM_SRAM_LOWER_BOUND, len, | |
86 | val, le32_to_cpu(*image)); | |
87 | return -EIO; | |
88 | } | |
89 | } | |
90 | ||
91 | IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n"); | |
92 | ||
93 | return 0; | |
94 | } | |
95 | ||
96 | /** | |
97 | * iwl4965_load_bsm - Load bootstrap instructions | |
98 | * | |
99 | * BSM operation: | |
100 | * | |
101 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | |
102 | * in special SRAM that does not power down during RFKILL. When powering back | |
103 | * up after power-saving sleeps (or during initial uCode load), the BSM loads | |
104 | * the bootstrap program into the on-board processor, and starts it. | |
105 | * | |
106 | * The bootstrap program loads (via DMA) instructions and data for a new | |
107 | * program from host DRAM locations indicated by the host driver in the | |
108 | * BSM_DRAM_* registers. Once the new program is loaded, it starts | |
109 | * automatically. | |
110 | * | |
111 | * When initializing the NIC, the host driver points the BSM to the | |
112 | * "initialize" uCode image. This uCode sets up some internal data, then | |
113 | * notifies host via "initialize alive" that it is complete. | |
114 | * | |
115 | * The host then replaces the BSM_DRAM_* pointer values to point to the | |
116 | * normal runtime uCode instructions and a backup uCode data cache buffer | |
117 | * (filled initially with starting data values for the on-board processor), | |
118 | * then triggers the "initialize" uCode to load and launch the runtime uCode, | |
119 | * which begins normal operation. | |
120 | * | |
121 | * When doing a power-save shutdown, runtime uCode saves data SRAM into | |
122 | * the backup data cache in DRAM before SRAM is powered down. | |
123 | * | |
124 | * When powering back up, the BSM loads the bootstrap program. This reloads | |
125 | * the runtime uCode instructions and the backup data cache into SRAM, | |
126 | * and re-launches the runtime uCode from where it left off. | |
127 | */ | |
128 | static int iwl4965_load_bsm(struct iwl_priv *priv) | |
129 | { | |
130 | __le32 *image = priv->ucode_boot.v_addr; | |
131 | u32 len = priv->ucode_boot.len; | |
132 | dma_addr_t pinst; | |
133 | dma_addr_t pdata; | |
134 | u32 inst_len; | |
135 | u32 data_len; | |
136 | int i; | |
137 | u32 done; | |
138 | u32 reg_offset; | |
139 | int ret; | |
140 | ||
141 | IWL_DEBUG_INFO(priv, "Begin load bsm\n"); | |
142 | ||
143 | priv->ucode_type = UCODE_RT; | |
144 | ||
145 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | |
146 | if (len > IWL49_MAX_BSM_SIZE) | |
147 | return -EINVAL; | |
148 | ||
149 | /* Tell bootstrap uCode where to find the "Initialize" uCode | |
150 | * in host DRAM ... host DRAM physical address bits 35:4 for 4965. | |
151 | * NOTE: iwl_init_alive_start() will replace these values, | |
152 | * after the "initialize" uCode has run, to point to | |
153 | * runtime/protocol instructions and backup data cache. | |
154 | */ | |
155 | pinst = priv->ucode_init.p_addr >> 4; | |
156 | pdata = priv->ucode_init_data.p_addr >> 4; | |
157 | inst_len = priv->ucode_init.len; | |
158 | data_len = priv->ucode_init_data.len; | |
159 | ||
be663ab6 WYG |
160 | iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
161 | iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
162 | iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | |
163 | iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | |
4bc85c13 WYG |
164 | |
165 | /* Fill BSM memory with bootstrap instructions */ | |
166 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | |
167 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | |
168 | reg_offset += sizeof(u32), image++) | |
be663ab6 | 169 | _iwl_legacy_write_prph(priv, reg_offset, le32_to_cpu(*image)); |
4bc85c13 WYG |
170 | |
171 | ret = iwl4965_verify_bsm(priv); | |
172 | if (ret) | |
173 | return ret; | |
174 | ||
175 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | |
be663ab6 WYG |
176 | iwl_legacy_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
177 | iwl_legacy_write_prph(priv, | |
178 | BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND); | |
179 | iwl_legacy_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | |
4bc85c13 WYG |
180 | |
181 | /* Load bootstrap code into instruction SRAM now, | |
182 | * to prepare to load "initialize" uCode */ | |
be663ab6 | 183 | iwl_legacy_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); |
4bc85c13 WYG |
184 | |
185 | /* Wait for load of bootstrap uCode to finish */ | |
186 | for (i = 0; i < 100; i++) { | |
be663ab6 | 187 | done = iwl_legacy_read_prph(priv, BSM_WR_CTRL_REG); |
4bc85c13 WYG |
188 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) |
189 | break; | |
190 | udelay(10); | |
191 | } | |
192 | if (i < 100) | |
193 | IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i); | |
194 | else { | |
195 | IWL_ERR(priv, "BSM write did not complete!\n"); | |
196 | return -EIO; | |
197 | } | |
198 | ||
199 | /* Enable future boot loads whenever power management unit triggers it | |
200 | * (e.g. when powering back up after power-save shutdown) */ | |
be663ab6 WYG |
201 | iwl_legacy_write_prph(priv, |
202 | BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); | |
4bc85c13 WYG |
203 | |
204 | ||
205 | return 0; | |
206 | } | |
207 | ||
208 | /** | |
209 | * iwl4965_set_ucode_ptrs - Set uCode address location | |
210 | * | |
211 | * Tell initialization uCode where to find runtime uCode. | |
212 | * | |
213 | * BSM registers initially contain pointers to initialization uCode. | |
214 | * We need to replace them to load runtime uCode inst and data, | |
215 | * and to save runtime data when powering down. | |
216 | */ | |
217 | static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) | |
218 | { | |
219 | dma_addr_t pinst; | |
220 | dma_addr_t pdata; | |
221 | int ret = 0; | |
222 | ||
223 | /* bits 35:4 for 4965 */ | |
224 | pinst = priv->ucode_code.p_addr >> 4; | |
225 | pdata = priv->ucode_data_backup.p_addr >> 4; | |
226 | ||
227 | /* Tell bootstrap uCode where to find image to load */ | |
be663ab6 WYG |
228 | iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
229 | iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
230 | iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
4bc85c13 WYG |
231 | priv->ucode_data.len); |
232 | ||
233 | /* Inst byte count must be last to set up, bit 31 signals uCode | |
234 | * that all new ptr/size info is in place */ | |
be663ab6 | 235 | iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
4bc85c13 WYG |
236 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
237 | IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); | |
238 | ||
239 | return ret; | |
240 | } | |
241 | ||
242 | /** | |
243 | * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received | |
244 | * | |
245 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
246 | * | |
247 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
248 | * Voltage, temperature, and MIMO tx gain correction, now stored in priv | |
249 | * (3945 does not contain this data). | |
250 | * | |
251 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
252 | */ | |
253 | static void iwl4965_init_alive_start(struct iwl_priv *priv) | |
254 | { | |
255 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
256 | * This is a paranoid check, because we would not have gotten the | |
257 | * "initialize" alive if code weren't properly loaded. */ | |
be663ab6 | 258 | if (iwl4965_verify_ucode(priv)) { |
4bc85c13 WYG |
259 | /* Runtime instruction load was bad; |
260 | * take it all the way back down so we can try again */ | |
261 | IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n"); | |
262 | goto restart; | |
263 | } | |
264 | ||
265 | /* Calculate temperature */ | |
266 | priv->temperature = iwl4965_hw_get_temperature(priv); | |
267 | ||
268 | /* Send pointers to protocol/runtime uCode image ... init code will | |
269 | * load and launch runtime uCode, which will send us another "Alive" | |
270 | * notification. */ | |
271 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); | |
272 | if (iwl4965_set_ucode_ptrs(priv)) { | |
273 | /* Runtime instruction load won't happen; | |
274 | * take it all the way back down so we can try again */ | |
275 | IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n"); | |
276 | goto restart; | |
277 | } | |
278 | return; | |
279 | ||
280 | restart: | |
281 | queue_work(priv->workqueue, &priv->restart); | |
282 | } | |
283 | ||
be663ab6 | 284 | static bool iw4965_is_ht40_channel(__le32 rxon_flags) |
4bc85c13 WYG |
285 | { |
286 | int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) | |
287 | >> RXON_FLG_CHANNEL_MODE_POS; | |
288 | return ((chan_mod == CHANNEL_MODE_PURE_40) || | |
289 | (chan_mod == CHANNEL_MODE_MIXED)); | |
290 | } | |
291 | ||
4bc85c13 WYG |
292 | static void iwl4965_nic_config(struct iwl_priv *priv) |
293 | { | |
294 | unsigned long flags; | |
295 | u16 radio_cfg; | |
296 | ||
297 | spin_lock_irqsave(&priv->lock, flags); | |
298 | ||
be663ab6 | 299 | radio_cfg = iwl_legacy_eeprom_query16(priv, EEPROM_RADIO_CONFIG); |
4bc85c13 WYG |
300 | |
301 | /* write radio config values to register */ | |
302 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX) | |
be663ab6 | 303 | iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
4bc85c13 WYG |
304 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | |
305 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | | |
306 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); | |
307 | ||
308 | /* set CSR_HW_CONFIG_REG for uCode use */ | |
be663ab6 | 309 | iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
4bc85c13 WYG |
310 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
311 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | |
312 | ||
313 | priv->calib_info = (struct iwl_eeprom_calib_info *) | |
be663ab6 WYG |
314 | iwl_legacy_eeprom_query_addr(priv, |
315 | EEPROM_4965_CALIB_TXPOWER_OFFSET); | |
4bc85c13 WYG |
316 | |
317 | spin_unlock_irqrestore(&priv->lock, flags); | |
318 | } | |
319 | ||
320 | /* Reset differential Rx gains in NIC to prepare for chain noise calibration. | |
321 | * Called after every association, but this runs only once! | |
322 | * ... once chain noise is calibrated the first time, it's good forever. */ | |
323 | static void iwl4965_chain_noise_reset(struct iwl_priv *priv) | |
324 | { | |
325 | struct iwl_chain_noise_data *data = &(priv->chain_noise_data); | |
326 | ||
327 | if ((data->state == IWL_CHAIN_NOISE_ALIVE) && | |
be663ab6 | 328 | iwl_legacy_is_any_associated(priv)) { |
4bc85c13 WYG |
329 | struct iwl_calib_diff_gain_cmd cmd; |
330 | ||
331 | /* clear data for chain noise calibration algorithm */ | |
332 | data->chain_noise_a = 0; | |
333 | data->chain_noise_b = 0; | |
334 | data->chain_noise_c = 0; | |
335 | data->chain_signal_a = 0; | |
336 | data->chain_signal_b = 0; | |
337 | data->chain_signal_c = 0; | |
338 | data->beacon_count = 0; | |
339 | ||
340 | memset(&cmd, 0, sizeof(cmd)); | |
341 | cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD; | |
342 | cmd.diff_gain_a = 0; | |
343 | cmd.diff_gain_b = 0; | |
344 | cmd.diff_gain_c = 0; | |
be663ab6 | 345 | if (iwl_legacy_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, |
4bc85c13 WYG |
346 | sizeof(cmd), &cmd)) |
347 | IWL_ERR(priv, | |
348 | "Could not send REPLY_PHY_CALIBRATION_CMD\n"); | |
349 | data->state = IWL_CHAIN_NOISE_ACCUMULATE; | |
350 | IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n"); | |
351 | } | |
352 | } | |
353 | ||
4bc85c13 WYG |
354 | static struct iwl_sensitivity_ranges iwl4965_sensitivity = { |
355 | .min_nrg_cck = 97, | |
356 | .max_nrg_cck = 0, /* not used, set to 0 */ | |
357 | ||
358 | .auto_corr_min_ofdm = 85, | |
359 | .auto_corr_min_ofdm_mrc = 170, | |
360 | .auto_corr_min_ofdm_x1 = 105, | |
361 | .auto_corr_min_ofdm_mrc_x1 = 220, | |
362 | ||
363 | .auto_corr_max_ofdm = 120, | |
364 | .auto_corr_max_ofdm_mrc = 210, | |
365 | .auto_corr_max_ofdm_x1 = 140, | |
366 | .auto_corr_max_ofdm_mrc_x1 = 270, | |
367 | ||
368 | .auto_corr_min_cck = 125, | |
369 | .auto_corr_max_cck = 200, | |
370 | .auto_corr_min_cck_mrc = 200, | |
371 | .auto_corr_max_cck_mrc = 400, | |
372 | ||
373 | .nrg_th_cck = 100, | |
374 | .nrg_th_ofdm = 100, | |
375 | ||
376 | .barker_corr_th_min = 190, | |
377 | .barker_corr_th_min_mrc = 390, | |
378 | .nrg_th_cca = 62, | |
379 | }; | |
380 | ||
381 | static void iwl4965_set_ct_threshold(struct iwl_priv *priv) | |
382 | { | |
383 | /* want Kelvin */ | |
384 | priv->hw_params.ct_kill_threshold = | |
385 | CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY); | |
386 | } | |
387 | ||
388 | /** | |
389 | * iwl4965_hw_set_hw_params | |
390 | * | |
391 | * Called when initializing driver | |
392 | */ | |
393 | static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |
394 | { | |
395 | if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES && | |
396 | priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES) | |
397 | priv->cfg->base_params->num_of_queues = | |
398 | priv->cfg->mod_params->num_of_queues; | |
399 | ||
400 | priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues; | |
401 | priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; | |
402 | priv->hw_params.scd_bc_tbls_size = | |
403 | priv->cfg->base_params->num_of_queues * | |
404 | sizeof(struct iwl4965_scd_bc_tbl); | |
405 | priv->hw_params.tfd_size = sizeof(struct iwl_tfd); | |
406 | priv->hw_params.max_stations = IWL4965_STATION_COUNT; | |
407 | priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWL4965_BROADCAST_ID; | |
408 | priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE; | |
409 | priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE; | |
410 | priv->hw_params.max_bsm_size = BSM_SRAM_SIZE; | |
411 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ); | |
412 | ||
413 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | |
414 | ||
be663ab6 WYG |
415 | priv->hw_params.tx_chains_num = iwl4965_num_of_ant(priv->cfg->valid_tx_ant); |
416 | priv->hw_params.rx_chains_num = iwl4965_num_of_ant(priv->cfg->valid_rx_ant); | |
4bc85c13 WYG |
417 | priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant; |
418 | priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant; | |
419 | ||
420 | iwl4965_set_ct_threshold(priv); | |
421 | ||
422 | priv->hw_params.sens = &iwl4965_sensitivity; | |
be663ab6 | 423 | priv->hw_params.beacon_time_tsf_bits = IWL4965_EXT_BEACON_TIME_POS; |
4bc85c13 WYG |
424 | |
425 | return 0; | |
426 | } | |
427 | ||
428 | static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res) | |
429 | { | |
430 | s32 sign = 1; | |
431 | ||
432 | if (num < 0) { | |
433 | sign = -sign; | |
434 | num = -num; | |
435 | } | |
436 | if (denom < 0) { | |
437 | sign = -sign; | |
438 | denom = -denom; | |
439 | } | |
440 | *res = 1; | |
441 | *res = ((num * 2 + denom) / (denom * 2)) * sign; | |
442 | ||
443 | return 1; | |
444 | } | |
445 | ||
446 | /** | |
447 | * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower | |
448 | * | |
449 | * Determines power supply voltage compensation for txpower calculations. | |
450 | * Returns number of 1/2-dB steps to subtract from gain table index, | |
451 | * to compensate for difference between power supply voltage during | |
452 | * factory measurements, vs. current power supply voltage. | |
453 | * | |
454 | * Voltage indication is higher for lower voltage. | |
455 | * Lower voltage requires more gain (lower gain table index). | |
456 | */ | |
457 | static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage, | |
458 | s32 current_voltage) | |
459 | { | |
460 | s32 comp = 0; | |
461 | ||
462 | if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) || | |
463 | (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage)) | |
464 | return 0; | |
465 | ||
466 | iwl4965_math_div_round(current_voltage - eeprom_voltage, | |
467 | TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp); | |
468 | ||
469 | if (current_voltage > eeprom_voltage) | |
470 | comp *= 2; | |
471 | if ((comp < -2) || (comp > 2)) | |
472 | comp = 0; | |
473 | ||
474 | return comp; | |
475 | } | |
476 | ||
477 | static s32 iwl4965_get_tx_atten_grp(u16 channel) | |
478 | { | |
479 | if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH && | |
480 | channel <= CALIB_IWL_TX_ATTEN_GR5_LCH) | |
481 | return CALIB_CH_GROUP_5; | |
482 | ||
483 | if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH && | |
484 | channel <= CALIB_IWL_TX_ATTEN_GR1_LCH) | |
485 | return CALIB_CH_GROUP_1; | |
486 | ||
487 | if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH && | |
488 | channel <= CALIB_IWL_TX_ATTEN_GR2_LCH) | |
489 | return CALIB_CH_GROUP_2; | |
490 | ||
491 | if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH && | |
492 | channel <= CALIB_IWL_TX_ATTEN_GR3_LCH) | |
493 | return CALIB_CH_GROUP_3; | |
494 | ||
495 | if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH && | |
496 | channel <= CALIB_IWL_TX_ATTEN_GR4_LCH) | |
497 | return CALIB_CH_GROUP_4; | |
498 | ||
8e638188 | 499 | return -EINVAL; |
4bc85c13 WYG |
500 | } |
501 | ||
502 | static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel) | |
503 | { | |
504 | s32 b = -1; | |
505 | ||
506 | for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) { | |
507 | if (priv->calib_info->band_info[b].ch_from == 0) | |
508 | continue; | |
509 | ||
510 | if ((channel >= priv->calib_info->band_info[b].ch_from) | |
511 | && (channel <= priv->calib_info->band_info[b].ch_to)) | |
512 | break; | |
513 | } | |
514 | ||
515 | return b; | |
516 | } | |
517 | ||
518 | static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) | |
519 | { | |
520 | s32 val; | |
521 | ||
522 | if (x2 == x1) | |
523 | return y1; | |
524 | else { | |
525 | iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val); | |
526 | return val + y2; | |
527 | } | |
528 | } | |
529 | ||
530 | /** | |
531 | * iwl4965_interpolate_chan - Interpolate factory measurements for one channel | |
532 | * | |
533 | * Interpolates factory measurements from the two sample channels within a | |
534 | * sub-band, to apply to channel of interest. Interpolation is proportional to | |
535 | * differences in channel frequencies, which is proportional to differences | |
536 | * in channel number. | |
537 | */ | |
538 | static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel, | |
539 | struct iwl_eeprom_calib_ch_info *chan_info) | |
540 | { | |
541 | s32 s = -1; | |
542 | u32 c; | |
543 | u32 m; | |
544 | const struct iwl_eeprom_calib_measure *m1; | |
545 | const struct iwl_eeprom_calib_measure *m2; | |
546 | struct iwl_eeprom_calib_measure *omeas; | |
547 | u32 ch_i1; | |
548 | u32 ch_i2; | |
549 | ||
550 | s = iwl4965_get_sub_band(priv, channel); | |
551 | if (s >= EEPROM_TX_POWER_BANDS) { | |
552 | IWL_ERR(priv, "Tx Power can not find channel %d\n", channel); | |
553 | return -1; | |
554 | } | |
555 | ||
556 | ch_i1 = priv->calib_info->band_info[s].ch1.ch_num; | |
557 | ch_i2 = priv->calib_info->band_info[s].ch2.ch_num; | |
558 | chan_info->ch_num = (u8) channel; | |
559 | ||
560 | IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n", | |
561 | channel, s, ch_i1, ch_i2); | |
562 | ||
563 | for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) { | |
564 | for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) { | |
565 | m1 = &(priv->calib_info->band_info[s].ch1. | |
566 | measurements[c][m]); | |
567 | m2 = &(priv->calib_info->band_info[s].ch2. | |
568 | measurements[c][m]); | |
569 | omeas = &(chan_info->measurements[c][m]); | |
570 | ||
571 | omeas->actual_pow = | |
572 | (u8) iwl4965_interpolate_value(channel, ch_i1, | |
573 | m1->actual_pow, | |
574 | ch_i2, | |
575 | m2->actual_pow); | |
576 | omeas->gain_idx = | |
577 | (u8) iwl4965_interpolate_value(channel, ch_i1, | |
578 | m1->gain_idx, ch_i2, | |
579 | m2->gain_idx); | |
580 | omeas->temperature = | |
581 | (u8) iwl4965_interpolate_value(channel, ch_i1, | |
582 | m1->temperature, | |
583 | ch_i2, | |
584 | m2->temperature); | |
585 | omeas->pa_det = | |
586 | (s8) iwl4965_interpolate_value(channel, ch_i1, | |
587 | m1->pa_det, ch_i2, | |
588 | m2->pa_det); | |
589 | ||
590 | IWL_DEBUG_TXPOWER(priv, | |
591 | "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m, | |
592 | m1->actual_pow, m2->actual_pow, omeas->actual_pow); | |
593 | IWL_DEBUG_TXPOWER(priv, | |
594 | "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m, | |
595 | m1->gain_idx, m2->gain_idx, omeas->gain_idx); | |
596 | IWL_DEBUG_TXPOWER(priv, | |
597 | "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m, | |
598 | m1->pa_det, m2->pa_det, omeas->pa_det); | |
599 | IWL_DEBUG_TXPOWER(priv, | |
600 | "chain %d meas %d T1=%d T2=%d T=%d\n", c, m, | |
601 | m1->temperature, m2->temperature, | |
602 | omeas->temperature); | |
603 | } | |
604 | } | |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
609 | /* bit-rate-dependent table to prevent Tx distortion, in half-dB units, | |
610 | * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */ | |
611 | static s32 back_off_table[] = { | |
612 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */ | |
613 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */ | |
614 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */ | |
615 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */ | |
616 | 10 /* CCK */ | |
617 | }; | |
618 | ||
619 | /* Thermal compensation values for txpower for various frequency ranges ... | |
620 | * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */ | |
621 | static struct iwl4965_txpower_comp_entry { | |
622 | s32 degrees_per_05db_a; | |
623 | s32 degrees_per_05db_a_denom; | |
624 | } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { | |
625 | {9, 2}, /* group 0 5.2, ch 34-43 */ | |
626 | {4, 1}, /* group 1 5.2, ch 44-70 */ | |
627 | {4, 1}, /* group 2 5.2, ch 71-124 */ | |
628 | {4, 1}, /* group 3 5.2, ch 125-200 */ | |
629 | {3, 1} /* group 4 2.4, ch all */ | |
630 | }; | |
631 | ||
632 | static s32 get_min_power_index(s32 rate_power_index, u32 band) | |
633 | { | |
634 | if (!band) { | |
635 | if ((rate_power_index & 7) <= 4) | |
636 | return MIN_TX_GAIN_INDEX_52GHZ_EXT; | |
637 | } | |
638 | return MIN_TX_GAIN_INDEX; | |
639 | } | |
640 | ||
641 | struct gain_entry { | |
642 | u8 dsp; | |
643 | u8 radio; | |
644 | }; | |
645 | ||
646 | static const struct gain_entry gain_table[2][108] = { | |
647 | /* 5.2GHz power gain index table */ | |
648 | { | |
649 | {123, 0x3F}, /* highest txpower */ | |
650 | {117, 0x3F}, | |
651 | {110, 0x3F}, | |
652 | {104, 0x3F}, | |
653 | {98, 0x3F}, | |
654 | {110, 0x3E}, | |
655 | {104, 0x3E}, | |
656 | {98, 0x3E}, | |
657 | {110, 0x3D}, | |
658 | {104, 0x3D}, | |
659 | {98, 0x3D}, | |
660 | {110, 0x3C}, | |
661 | {104, 0x3C}, | |
662 | {98, 0x3C}, | |
663 | {110, 0x3B}, | |
664 | {104, 0x3B}, | |
665 | {98, 0x3B}, | |
666 | {110, 0x3A}, | |
667 | {104, 0x3A}, | |
668 | {98, 0x3A}, | |
669 | {110, 0x39}, | |
670 | {104, 0x39}, | |
671 | {98, 0x39}, | |
672 | {110, 0x38}, | |
673 | {104, 0x38}, | |
674 | {98, 0x38}, | |
675 | {110, 0x37}, | |
676 | {104, 0x37}, | |
677 | {98, 0x37}, | |
678 | {110, 0x36}, | |
679 | {104, 0x36}, | |
680 | {98, 0x36}, | |
681 | {110, 0x35}, | |
682 | {104, 0x35}, | |
683 | {98, 0x35}, | |
684 | {110, 0x34}, | |
685 | {104, 0x34}, | |
686 | {98, 0x34}, | |
687 | {110, 0x33}, | |
688 | {104, 0x33}, | |
689 | {98, 0x33}, | |
690 | {110, 0x32}, | |
691 | {104, 0x32}, | |
692 | {98, 0x32}, | |
693 | {110, 0x31}, | |
694 | {104, 0x31}, | |
695 | {98, 0x31}, | |
696 | {110, 0x30}, | |
697 | {104, 0x30}, | |
698 | {98, 0x30}, | |
699 | {110, 0x25}, | |
700 | {104, 0x25}, | |
701 | {98, 0x25}, | |
702 | {110, 0x24}, | |
703 | {104, 0x24}, | |
704 | {98, 0x24}, | |
705 | {110, 0x23}, | |
706 | {104, 0x23}, | |
707 | {98, 0x23}, | |
708 | {110, 0x22}, | |
709 | {104, 0x18}, | |
710 | {98, 0x18}, | |
711 | {110, 0x17}, | |
712 | {104, 0x17}, | |
713 | {98, 0x17}, | |
714 | {110, 0x16}, | |
715 | {104, 0x16}, | |
716 | {98, 0x16}, | |
717 | {110, 0x15}, | |
718 | {104, 0x15}, | |
719 | {98, 0x15}, | |
720 | {110, 0x14}, | |
721 | {104, 0x14}, | |
722 | {98, 0x14}, | |
723 | {110, 0x13}, | |
724 | {104, 0x13}, | |
725 | {98, 0x13}, | |
726 | {110, 0x12}, | |
727 | {104, 0x08}, | |
728 | {98, 0x08}, | |
729 | {110, 0x07}, | |
730 | {104, 0x07}, | |
731 | {98, 0x07}, | |
732 | {110, 0x06}, | |
733 | {104, 0x06}, | |
734 | {98, 0x06}, | |
735 | {110, 0x05}, | |
736 | {104, 0x05}, | |
737 | {98, 0x05}, | |
738 | {110, 0x04}, | |
739 | {104, 0x04}, | |
740 | {98, 0x04}, | |
741 | {110, 0x03}, | |
742 | {104, 0x03}, | |
743 | {98, 0x03}, | |
744 | {110, 0x02}, | |
745 | {104, 0x02}, | |
746 | {98, 0x02}, | |
747 | {110, 0x01}, | |
748 | {104, 0x01}, | |
749 | {98, 0x01}, | |
750 | {110, 0x00}, | |
751 | {104, 0x00}, | |
752 | {98, 0x00}, | |
753 | {93, 0x00}, | |
754 | {88, 0x00}, | |
755 | {83, 0x00}, | |
756 | {78, 0x00}, | |
757 | }, | |
758 | /* 2.4GHz power gain index table */ | |
759 | { | |
760 | {110, 0x3f}, /* highest txpower */ | |
761 | {104, 0x3f}, | |
762 | {98, 0x3f}, | |
763 | {110, 0x3e}, | |
764 | {104, 0x3e}, | |
765 | {98, 0x3e}, | |
766 | {110, 0x3d}, | |
767 | {104, 0x3d}, | |
768 | {98, 0x3d}, | |
769 | {110, 0x3c}, | |
770 | {104, 0x3c}, | |
771 | {98, 0x3c}, | |
772 | {110, 0x3b}, | |
773 | {104, 0x3b}, | |
774 | {98, 0x3b}, | |
775 | {110, 0x3a}, | |
776 | {104, 0x3a}, | |
777 | {98, 0x3a}, | |
778 | {110, 0x39}, | |
779 | {104, 0x39}, | |
780 | {98, 0x39}, | |
781 | {110, 0x38}, | |
782 | {104, 0x38}, | |
783 | {98, 0x38}, | |
784 | {110, 0x37}, | |
785 | {104, 0x37}, | |
786 | {98, 0x37}, | |
787 | {110, 0x36}, | |
788 | {104, 0x36}, | |
789 | {98, 0x36}, | |
790 | {110, 0x35}, | |
791 | {104, 0x35}, | |
792 | {98, 0x35}, | |
793 | {110, 0x34}, | |
794 | {104, 0x34}, | |
795 | {98, 0x34}, | |
796 | {110, 0x33}, | |
797 | {104, 0x33}, | |
798 | {98, 0x33}, | |
799 | {110, 0x32}, | |
800 | {104, 0x32}, | |
801 | {98, 0x32}, | |
802 | {110, 0x31}, | |
803 | {104, 0x31}, | |
804 | {98, 0x31}, | |
805 | {110, 0x30}, | |
806 | {104, 0x30}, | |
807 | {98, 0x30}, | |
808 | {110, 0x6}, | |
809 | {104, 0x6}, | |
810 | {98, 0x6}, | |
811 | {110, 0x5}, | |
812 | {104, 0x5}, | |
813 | {98, 0x5}, | |
814 | {110, 0x4}, | |
815 | {104, 0x4}, | |
816 | {98, 0x4}, | |
817 | {110, 0x3}, | |
818 | {104, 0x3}, | |
819 | {98, 0x3}, | |
820 | {110, 0x2}, | |
821 | {104, 0x2}, | |
822 | {98, 0x2}, | |
823 | {110, 0x1}, | |
824 | {104, 0x1}, | |
825 | {98, 0x1}, | |
826 | {110, 0x0}, | |
827 | {104, 0x0}, | |
828 | {98, 0x0}, | |
829 | {97, 0}, | |
830 | {96, 0}, | |
831 | {95, 0}, | |
832 | {94, 0}, | |
833 | {93, 0}, | |
834 | {92, 0}, | |
835 | {91, 0}, | |
836 | {90, 0}, | |
837 | {89, 0}, | |
838 | {88, 0}, | |
839 | {87, 0}, | |
840 | {86, 0}, | |
841 | {85, 0}, | |
842 | {84, 0}, | |
843 | {83, 0}, | |
844 | {82, 0}, | |
845 | {81, 0}, | |
846 | {80, 0}, | |
847 | {79, 0}, | |
848 | {78, 0}, | |
849 | {77, 0}, | |
850 | {76, 0}, | |
851 | {75, 0}, | |
852 | {74, 0}, | |
853 | {73, 0}, | |
854 | {72, 0}, | |
855 | {71, 0}, | |
856 | {70, 0}, | |
857 | {69, 0}, | |
858 | {68, 0}, | |
859 | {67, 0}, | |
860 | {66, 0}, | |
861 | {65, 0}, | |
862 | {64, 0}, | |
863 | {63, 0}, | |
864 | {62, 0}, | |
865 | {61, 0}, | |
866 | {60, 0}, | |
867 | {59, 0}, | |
868 | } | |
869 | }; | |
870 | ||
871 | static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, | |
872 | u8 is_ht40, u8 ctrl_chan_high, | |
873 | struct iwl4965_tx_power_db *tx_power_tbl) | |
874 | { | |
875 | u8 saturation_power; | |
876 | s32 target_power; | |
877 | s32 user_target_power; | |
878 | s32 power_limit; | |
879 | s32 current_temp; | |
880 | s32 reg_limit; | |
881 | s32 current_regulatory; | |
882 | s32 txatten_grp = CALIB_CH_GROUP_MAX; | |
883 | int i; | |
884 | int c; | |
885 | const struct iwl_channel_info *ch_info = NULL; | |
886 | struct iwl_eeprom_calib_ch_info ch_eeprom_info; | |
887 | const struct iwl_eeprom_calib_measure *measurement; | |
888 | s16 voltage; | |
889 | s32 init_voltage; | |
890 | s32 voltage_compensation; | |
891 | s32 degrees_per_05db_num; | |
892 | s32 degrees_per_05db_denom; | |
893 | s32 factory_temp; | |
894 | s32 temperature_comp[2]; | |
895 | s32 factory_gain_index[2]; | |
896 | s32 factory_actual_pwr[2]; | |
897 | s32 power_index; | |
898 | ||
899 | /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units | |
900 | * are used for indexing into txpower table) */ | |
901 | user_target_power = 2 * priv->tx_power_user_lmt; | |
902 | ||
903 | /* Get current (RXON) channel, band, width */ | |
904 | IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band, | |
905 | is_ht40); | |
906 | ||
be663ab6 | 907 | ch_info = iwl_legacy_get_channel_info(priv, priv->band, channel); |
4bc85c13 | 908 | |
be663ab6 | 909 | if (!iwl_legacy_is_channel_valid(ch_info)) |
4bc85c13 WYG |
910 | return -EINVAL; |
911 | ||
912 | /* get txatten group, used to select 1) thermal txpower adjustment | |
913 | * and 2) mimo txpower balance between Tx chains. */ | |
914 | txatten_grp = iwl4965_get_tx_atten_grp(channel); | |
915 | if (txatten_grp < 0) { | |
916 | IWL_ERR(priv, "Can't find txatten group for channel %d.\n", | |
917 | channel); | |
918 | return -EINVAL; | |
919 | } | |
920 | ||
921 | IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n", | |
922 | channel, txatten_grp); | |
923 | ||
924 | if (is_ht40) { | |
925 | if (ctrl_chan_high) | |
926 | channel -= 2; | |
927 | else | |
928 | channel += 2; | |
929 | } | |
930 | ||
931 | /* hardware txpower limits ... | |
932 | * saturation (clipping distortion) txpowers are in half-dBm */ | |
933 | if (band) | |
934 | saturation_power = priv->calib_info->saturation_power24; | |
935 | else | |
936 | saturation_power = priv->calib_info->saturation_power52; | |
937 | ||
938 | if (saturation_power < IWL_TX_POWER_SATURATION_MIN || | |
939 | saturation_power > IWL_TX_POWER_SATURATION_MAX) { | |
940 | if (band) | |
941 | saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24; | |
942 | else | |
943 | saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52; | |
944 | } | |
945 | ||
946 | /* regulatory txpower limits ... reg_limit values are in half-dBm, | |
947 | * max_power_avg values are in dBm, convert * 2 */ | |
948 | if (is_ht40) | |
949 | reg_limit = ch_info->ht40_max_power_avg * 2; | |
950 | else | |
951 | reg_limit = ch_info->max_power_avg * 2; | |
952 | ||
953 | if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) || | |
954 | (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) { | |
955 | if (band) | |
956 | reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24; | |
957 | else | |
958 | reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52; | |
959 | } | |
960 | ||
961 | /* Interpolate txpower calibration values for this channel, | |
962 | * based on factory calibration tests on spaced channels. */ | |
963 | iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info); | |
964 | ||
965 | /* calculate tx gain adjustment based on power supply voltage */ | |
966 | voltage = le16_to_cpu(priv->calib_info->voltage); | |
967 | init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage); | |
968 | voltage_compensation = | |
969 | iwl4965_get_voltage_compensation(voltage, init_voltage); | |
970 | ||
971 | IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n", | |
972 | init_voltage, | |
973 | voltage, voltage_compensation); | |
974 | ||
975 | /* get current temperature (Celsius) */ | |
976 | current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN); | |
977 | current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX); | |
978 | current_temp = KELVIN_TO_CELSIUS(current_temp); | |
979 | ||
980 | /* select thermal txpower adjustment params, based on channel group | |
981 | * (same frequency group used for mimo txatten adjustment) */ | |
982 | degrees_per_05db_num = | |
983 | tx_power_cmp_tble[txatten_grp].degrees_per_05db_a; | |
984 | degrees_per_05db_denom = | |
985 | tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom; | |
986 | ||
987 | /* get per-chain txpower values from factory measurements */ | |
988 | for (c = 0; c < 2; c++) { | |
989 | measurement = &ch_eeprom_info.measurements[c][1]; | |
990 | ||
991 | /* txgain adjustment (in half-dB steps) based on difference | |
992 | * between factory and current temperature */ | |
993 | factory_temp = measurement->temperature; | |
994 | iwl4965_math_div_round((current_temp - factory_temp) * | |
995 | degrees_per_05db_denom, | |
996 | degrees_per_05db_num, | |
997 | &temperature_comp[c]); | |
998 | ||
999 | factory_gain_index[c] = measurement->gain_idx; | |
1000 | factory_actual_pwr[c] = measurement->actual_pow; | |
1001 | ||
1002 | IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c); | |
1003 | IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, " | |
1004 | "curr tmp %d, comp %d steps\n", | |
1005 | factory_temp, current_temp, | |
1006 | temperature_comp[c]); | |
1007 | ||
1008 | IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n", | |
1009 | factory_gain_index[c], | |
1010 | factory_actual_pwr[c]); | |
1011 | } | |
1012 | ||
1013 | /* for each of 33 bit-rates (including 1 for CCK) */ | |
1014 | for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) { | |
1015 | u8 is_mimo_rate; | |
1016 | union iwl4965_tx_power_dual_stream tx_power; | |
1017 | ||
1018 | /* for mimo, reduce each chain's txpower by half | |
1019 | * (3dB, 6 steps), so total output power is regulatory | |
1020 | * compliant. */ | |
1021 | if (i & 0x8) { | |
1022 | current_regulatory = reg_limit - | |
1023 | IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION; | |
1024 | is_mimo_rate = 1; | |
1025 | } else { | |
1026 | current_regulatory = reg_limit; | |
1027 | is_mimo_rate = 0; | |
1028 | } | |
1029 | ||
1030 | /* find txpower limit, either hardware or regulatory */ | |
1031 | power_limit = saturation_power - back_off_table[i]; | |
1032 | if (power_limit > current_regulatory) | |
1033 | power_limit = current_regulatory; | |
1034 | ||
1035 | /* reduce user's txpower request if necessary | |
1036 | * for this rate on this channel */ | |
1037 | target_power = user_target_power; | |
1038 | if (target_power > power_limit) | |
1039 | target_power = power_limit; | |
1040 | ||
1041 | IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n", | |
1042 | i, saturation_power - back_off_table[i], | |
1043 | current_regulatory, user_target_power, | |
1044 | target_power); | |
1045 | ||
1046 | /* for each of 2 Tx chains (radio transmitters) */ | |
1047 | for (c = 0; c < 2; c++) { | |
1048 | s32 atten_value; | |
1049 | ||
1050 | if (is_mimo_rate) | |
1051 | atten_value = | |
1052 | (s32)le32_to_cpu(priv->card_alive_init. | |
1053 | tx_atten[txatten_grp][c]); | |
1054 | else | |
1055 | atten_value = 0; | |
1056 | ||
1057 | /* calculate index; higher index means lower txpower */ | |
1058 | power_index = (u8) (factory_gain_index[c] - | |
1059 | (target_power - | |
1060 | factory_actual_pwr[c]) - | |
1061 | temperature_comp[c] - | |
1062 | voltage_compensation + | |
1063 | atten_value); | |
1064 | ||
1065 | /* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n", | |
1066 | power_index); */ | |
1067 | ||
1068 | if (power_index < get_min_power_index(i, band)) | |
1069 | power_index = get_min_power_index(i, band); | |
1070 | ||
1071 | /* adjust 5 GHz index to support negative indexes */ | |
1072 | if (!band) | |
1073 | power_index += 9; | |
1074 | ||
1075 | /* CCK, rate 32, reduce txpower for CCK */ | |
1076 | if (i == POWER_TABLE_CCK_ENTRY) | |
1077 | power_index += | |
1078 | IWL_TX_POWER_CCK_COMPENSATION_C_STEP; | |
1079 | ||
1080 | /* stay within the table! */ | |
1081 | if (power_index > 107) { | |
1082 | IWL_WARN(priv, "txpower index %d > 107\n", | |
1083 | power_index); | |
1084 | power_index = 107; | |
1085 | } | |
1086 | if (power_index < 0) { | |
1087 | IWL_WARN(priv, "txpower index %d < 0\n", | |
1088 | power_index); | |
1089 | power_index = 0; | |
1090 | } | |
1091 | ||
1092 | /* fill txpower command for this rate/chain */ | |
1093 | tx_power.s.radio_tx_gain[c] = | |
1094 | gain_table[band][power_index].radio; | |
1095 | tx_power.s.dsp_predis_atten[c] = | |
1096 | gain_table[band][power_index].dsp; | |
1097 | ||
1098 | IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d " | |
1099 | "gain 0x%02x dsp %d\n", | |
1100 | c, atten_value, power_index, | |
1101 | tx_power.s.radio_tx_gain[c], | |
1102 | tx_power.s.dsp_predis_atten[c]); | |
1103 | } /* for each chain */ | |
1104 | ||
1105 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); | |
1106 | ||
1107 | } /* for each rate */ | |
1108 | ||
1109 | return 0; | |
1110 | } | |
1111 | ||
1112 | /** | |
1113 | * iwl4965_send_tx_power - Configure the TXPOWER level user limit | |
1114 | * | |
1115 | * Uses the active RXON for channel, band, and characteristics (ht40, high) | |
1116 | * The power limit is taken from priv->tx_power_user_lmt. | |
1117 | */ | |
1118 | static int iwl4965_send_tx_power(struct iwl_priv *priv) | |
1119 | { | |
1120 | struct iwl4965_txpowertable_cmd cmd = { 0 }; | |
1121 | int ret; | |
1122 | u8 band = 0; | |
1123 | bool is_ht40 = false; | |
1124 | u8 ctrl_chan_high = 0; | |
1125 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
1126 | ||
1127 | if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->status), | |
1128 | "TX Power requested while scanning!\n")) | |
1129 | return -EAGAIN; | |
1130 | ||
1131 | band = priv->band == IEEE80211_BAND_2GHZ; | |
1132 | ||
be663ab6 | 1133 | is_ht40 = iw4965_is_ht40_channel(ctx->active.flags); |
4bc85c13 WYG |
1134 | |
1135 | if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) | |
1136 | ctrl_chan_high = 1; | |
1137 | ||
1138 | cmd.band = band; | |
1139 | cmd.channel = ctx->active.channel; | |
1140 | ||
1141 | ret = iwl4965_fill_txpower_tbl(priv, band, | |
1142 | le16_to_cpu(ctx->active.channel), | |
1143 | is_ht40, ctrl_chan_high, &cmd.tx_power); | |
1144 | if (ret) | |
1145 | goto out; | |
1146 | ||
be663ab6 WYG |
1147 | ret = iwl_legacy_send_cmd_pdu(priv, |
1148 | REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd); | |
4bc85c13 WYG |
1149 | |
1150 | out: | |
1151 | return ret; | |
1152 | } | |
1153 | ||
1154 | static int iwl4965_send_rxon_assoc(struct iwl_priv *priv, | |
1155 | struct iwl_rxon_context *ctx) | |
1156 | { | |
1157 | int ret = 0; | |
1158 | struct iwl4965_rxon_assoc_cmd rxon_assoc; | |
be663ab6 WYG |
1159 | const struct iwl_legacy_rxon_cmd *rxon1 = &ctx->staging; |
1160 | const struct iwl_legacy_rxon_cmd *rxon2 = &ctx->active; | |
4bc85c13 WYG |
1161 | |
1162 | if ((rxon1->flags == rxon2->flags) && | |
1163 | (rxon1->filter_flags == rxon2->filter_flags) && | |
1164 | (rxon1->cck_basic_rates == rxon2->cck_basic_rates) && | |
1165 | (rxon1->ofdm_ht_single_stream_basic_rates == | |
1166 | rxon2->ofdm_ht_single_stream_basic_rates) && | |
1167 | (rxon1->ofdm_ht_dual_stream_basic_rates == | |
1168 | rxon2->ofdm_ht_dual_stream_basic_rates) && | |
1169 | (rxon1->rx_chain == rxon2->rx_chain) && | |
1170 | (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) { | |
1171 | IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n"); | |
1172 | return 0; | |
1173 | } | |
1174 | ||
1175 | rxon_assoc.flags = ctx->staging.flags; | |
1176 | rxon_assoc.filter_flags = ctx->staging.filter_flags; | |
1177 | rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates; | |
1178 | rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates; | |
1179 | rxon_assoc.reserved = 0; | |
1180 | rxon_assoc.ofdm_ht_single_stream_basic_rates = | |
1181 | ctx->staging.ofdm_ht_single_stream_basic_rates; | |
1182 | rxon_assoc.ofdm_ht_dual_stream_basic_rates = | |
1183 | ctx->staging.ofdm_ht_dual_stream_basic_rates; | |
1184 | rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain; | |
1185 | ||
be663ab6 | 1186 | ret = iwl_legacy_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC, |
4bc85c13 | 1187 | sizeof(rxon_assoc), &rxon_assoc, NULL); |
4bc85c13 WYG |
1188 | |
1189 | return ret; | |
1190 | } | |
1191 | ||
1192 | static int iwl4965_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |
1193 | { | |
1194 | /* cast away the const for active_rxon in this function */ | |
be663ab6 | 1195 | struct iwl_legacy_rxon_cmd *active_rxon = (void *)&ctx->active; |
4bc85c13 WYG |
1196 | int ret; |
1197 | bool new_assoc = | |
1198 | !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); | |
1199 | ||
be663ab6 | 1200 | if (!iwl_legacy_is_alive(priv)) |
4bc85c13 WYG |
1201 | return -EBUSY; |
1202 | ||
1203 | if (!ctx->is_active) | |
1204 | return 0; | |
1205 | ||
1206 | /* always get timestamp with Rx frame */ | |
1207 | ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK; | |
1208 | ||
be663ab6 | 1209 | ret = iwl_legacy_check_rxon_cmd(priv, ctx); |
4bc85c13 WYG |
1210 | if (ret) { |
1211 | IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n"); | |
1212 | return -EINVAL; | |
1213 | } | |
1214 | ||
1215 | /* | |
1216 | * receive commit_rxon request | |
1217 | * abort any previous channel switch if still in process | |
1218 | */ | |
1219 | if (priv->switch_rxon.switch_in_progress && | |
1220 | (priv->switch_rxon.channel != ctx->staging.channel)) { | |
1221 | IWL_DEBUG_11H(priv, "abort channel switch on %d\n", | |
1222 | le16_to_cpu(priv->switch_rxon.channel)); | |
be663ab6 | 1223 | iwl_legacy_chswitch_done(priv, false); |
4bc85c13 WYG |
1224 | } |
1225 | ||
1226 | /* If we don't need to send a full RXON, we can use | |
1227 | * iwl_rxon_assoc_cmd which is used to reconfigure filter | |
1228 | * and other flags for the current radio configuration. */ | |
be663ab6 WYG |
1229 | if (!iwl_legacy_full_rxon_required(priv, ctx)) { |
1230 | ret = iwl_legacy_send_rxon_assoc(priv, ctx); | |
4bc85c13 WYG |
1231 | if (ret) { |
1232 | IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret); | |
1233 | return ret; | |
1234 | } | |
1235 | ||
1236 | memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon)); | |
be663ab6 | 1237 | iwl_legacy_print_rx_config_cmd(priv, ctx); |
4bc85c13 WYG |
1238 | return 0; |
1239 | } | |
1240 | ||
1241 | /* If we are currently associated and the new config requires | |
1242 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
1243 | * we must clear the associated from the active configuration | |
1244 | * before we apply the new config */ | |
be663ab6 | 1245 | if (iwl_legacy_is_associated_ctx(ctx) && new_assoc) { |
4bc85c13 WYG |
1246 | IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n"); |
1247 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
1248 | ||
be663ab6 WYG |
1249 | ret = iwl_legacy_send_cmd_pdu(priv, ctx->rxon_cmd, |
1250 | sizeof(struct iwl_legacy_rxon_cmd), | |
4bc85c13 WYG |
1251 | active_rxon); |
1252 | ||
1253 | /* If the mask clearing failed then we set | |
1254 | * active_rxon back to what it was previously */ | |
1255 | if (ret) { | |
1256 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
1257 | IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret); | |
1258 | return ret; | |
1259 | } | |
be663ab6 WYG |
1260 | iwl_legacy_clear_ucode_stations(priv, ctx); |
1261 | iwl_legacy_restore_stations(priv, ctx); | |
1262 | ret = iwl4965_restore_default_wep_keys(priv, ctx); | |
4bc85c13 WYG |
1263 | if (ret) { |
1264 | IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret); | |
1265 | return ret; | |
1266 | } | |
1267 | } | |
1268 | ||
1269 | IWL_DEBUG_INFO(priv, "Sending RXON\n" | |
1270 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
1271 | "* channel = %d\n" | |
1272 | "* bssid = %pM\n", | |
1273 | (new_assoc ? "" : "out"), | |
1274 | le16_to_cpu(ctx->staging.channel), | |
1275 | ctx->staging.bssid_addr); | |
1276 | ||
be663ab6 WYG |
1277 | iwl_legacy_set_rxon_hwcrypto(priv, ctx, |
1278 | !priv->cfg->mod_params->sw_crypto); | |
4bc85c13 WYG |
1279 | |
1280 | /* Apply the new configuration | |
1281 | * RXON unassoc clears the station table in uCode so restoration of | |
1282 | * stations is needed after it (the RXON command) completes | |
1283 | */ | |
1284 | if (!new_assoc) { | |
be663ab6 WYG |
1285 | ret = iwl_legacy_send_cmd_pdu(priv, ctx->rxon_cmd, |
1286 | sizeof(struct iwl_legacy_rxon_cmd), &ctx->staging); | |
4bc85c13 WYG |
1287 | if (ret) { |
1288 | IWL_ERR(priv, "Error setting new RXON (%d)\n", ret); | |
1289 | return ret; | |
1290 | } | |
1291 | IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n"); | |
1292 | memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon)); | |
be663ab6 WYG |
1293 | iwl_legacy_clear_ucode_stations(priv, ctx); |
1294 | iwl_legacy_restore_stations(priv, ctx); | |
1295 | ret = iwl4965_restore_default_wep_keys(priv, ctx); | |
4bc85c13 WYG |
1296 | if (ret) { |
1297 | IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret); | |
1298 | return ret; | |
1299 | } | |
1300 | } | |
1301 | if (new_assoc) { | |
1302 | priv->start_calib = 0; | |
1303 | /* Apply the new configuration | |
1304 | * RXON assoc doesn't clear the station table in uCode, | |
1305 | */ | |
be663ab6 WYG |
1306 | ret = iwl_legacy_send_cmd_pdu(priv, ctx->rxon_cmd, |
1307 | sizeof(struct iwl_legacy_rxon_cmd), &ctx->staging); | |
4bc85c13 WYG |
1308 | if (ret) { |
1309 | IWL_ERR(priv, "Error setting new RXON (%d)\n", ret); | |
1310 | return ret; | |
1311 | } | |
1312 | memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon)); | |
1313 | } | |
be663ab6 | 1314 | iwl_legacy_print_rx_config_cmd(priv, ctx); |
4bc85c13 | 1315 | |
be663ab6 | 1316 | iwl4965_init_sensitivity(priv); |
4bc85c13 WYG |
1317 | |
1318 | /* If we issue a new RXON command which required a tune then we must | |
1319 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
43f12d47 | 1320 | ret = iwl_legacy_set_tx_power(priv, priv->tx_power_next, true); |
4bc85c13 WYG |
1321 | if (ret) { |
1322 | IWL_ERR(priv, "Error sending TX power (%d)\n", ret); | |
1323 | return ret; | |
1324 | } | |
1325 | ||
1326 | return 0; | |
1327 | } | |
1328 | ||
1329 | static int iwl4965_hw_channel_switch(struct iwl_priv *priv, | |
1330 | struct ieee80211_channel_switch *ch_switch) | |
1331 | { | |
1332 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
1333 | int rc; | |
1334 | u8 band = 0; | |
1335 | bool is_ht40 = false; | |
1336 | u8 ctrl_chan_high = 0; | |
1337 | struct iwl4965_channel_switch_cmd cmd; | |
1338 | const struct iwl_channel_info *ch_info; | |
1339 | u32 switch_time_in_usec, ucode_switch_time; | |
1340 | u16 ch; | |
1341 | u32 tsf_low; | |
1342 | u8 switch_count; | |
1343 | u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval); | |
1344 | struct ieee80211_vif *vif = ctx->vif; | |
1345 | band = priv->band == IEEE80211_BAND_2GHZ; | |
1346 | ||
be663ab6 | 1347 | is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags); |
4bc85c13 WYG |
1348 | |
1349 | if (is_ht40 && | |
1350 | (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) | |
1351 | ctrl_chan_high = 1; | |
1352 | ||
1353 | cmd.band = band; | |
1354 | cmd.expect_beacon = 0; | |
1355 | ch = ch_switch->channel->hw_value; | |
1356 | cmd.channel = cpu_to_le16(ch); | |
1357 | cmd.rxon_flags = ctx->staging.flags; | |
1358 | cmd.rxon_filter_flags = ctx->staging.filter_flags; | |
1359 | switch_count = ch_switch->count; | |
1360 | tsf_low = ch_switch->timestamp & 0x0ffffffff; | |
1361 | /* | |
1362 | * calculate the ucode channel switch time | |
1363 | * adding TSF as one of the factor for when to switch | |
1364 | */ | |
1365 | if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) { | |
1366 | if (switch_count > ((priv->ucode_beacon_time - tsf_low) / | |
1367 | beacon_interval)) { | |
1368 | switch_count -= (priv->ucode_beacon_time - | |
1369 | tsf_low) / beacon_interval; | |
1370 | } else | |
1371 | switch_count = 0; | |
1372 | } | |
1373 | if (switch_count <= 1) | |
1374 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | |
1375 | else { | |
1376 | switch_time_in_usec = | |
1377 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; | |
be663ab6 | 1378 | ucode_switch_time = iwl_legacy_usecs_to_beacons(priv, |
4bc85c13 WYG |
1379 | switch_time_in_usec, |
1380 | beacon_interval); | |
be663ab6 | 1381 | cmd.switch_time = iwl_legacy_add_beacon_time(priv, |
4bc85c13 WYG |
1382 | priv->ucode_beacon_time, |
1383 | ucode_switch_time, | |
1384 | beacon_interval); | |
1385 | } | |
1386 | IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n", | |
1387 | cmd.switch_time); | |
be663ab6 | 1388 | ch_info = iwl_legacy_get_channel_info(priv, priv->band, ch); |
4bc85c13 | 1389 | if (ch_info) |
be663ab6 | 1390 | cmd.expect_beacon = iwl_legacy_is_channel_radar(ch_info); |
4bc85c13 WYG |
1391 | else { |
1392 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", | |
1393 | ctx->active.channel, ch); | |
1394 | return -EFAULT; | |
1395 | } | |
1396 | ||
1397 | rc = iwl4965_fill_txpower_tbl(priv, band, ch, is_ht40, | |
1398 | ctrl_chan_high, &cmd.tx_power); | |
1399 | if (rc) { | |
1400 | IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc); | |
1401 | return rc; | |
1402 | } | |
1403 | ||
1404 | priv->switch_rxon.channel = cmd.channel; | |
1405 | priv->switch_rxon.switch_in_progress = true; | |
1406 | ||
be663ab6 WYG |
1407 | return iwl_legacy_send_cmd_pdu(priv, |
1408 | REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); | |
4bc85c13 WYG |
1409 | } |
1410 | ||
1411 | /** | |
1412 | * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array | |
1413 | */ | |
1414 | static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv, | |
1415 | struct iwl_tx_queue *txq, | |
1416 | u16 byte_cnt) | |
1417 | { | |
1418 | struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr; | |
1419 | int txq_id = txq->q.id; | |
1420 | int write_ptr = txq->q.write_ptr; | |
1421 | int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; | |
1422 | __le16 bc_ent; | |
1423 | ||
1424 | WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX); | |
1425 | ||
1426 | bc_ent = cpu_to_le16(len & 0xFFF); | |
1427 | /* Set up byte count within first 256 entries */ | |
1428 | scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent; | |
1429 | ||
1430 | /* If within first 64 entries, duplicate at end */ | |
1431 | if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) | |
1432 | scd_bc_tbl[txq_id]. | |
1433 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; | |
1434 | } | |
1435 | ||
1436 | /** | |
1437 | * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin) | |
1438 | * @statistics: Provides the temperature reading from the uCode | |
1439 | * | |
1440 | * A return of <0 indicates bogus data in the statistics | |
1441 | */ | |
1442 | static int iwl4965_hw_get_temperature(struct iwl_priv *priv) | |
1443 | { | |
1444 | s32 temperature; | |
1445 | s32 vt; | |
1446 | s32 R1, R2, R3; | |
1447 | u32 R4; | |
1448 | ||
1449 | if (test_bit(STATUS_TEMPERATURE, &priv->status) && | |
be663ab6 | 1450 | (priv->_4965.statistics.flag & |
4bc85c13 WYG |
1451 | STATISTICS_REPLY_FLG_HT40_MODE_MSK)) { |
1452 | IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n"); | |
1453 | R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]); | |
1454 | R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]); | |
1455 | R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]); | |
1456 | R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]); | |
1457 | } else { | |
1458 | IWL_DEBUG_TEMP(priv, "Running temperature calibration\n"); | |
1459 | R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]); | |
1460 | R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]); | |
1461 | R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]); | |
1462 | R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]); | |
1463 | } | |
1464 | ||
1465 | /* | |
1466 | * Temperature is only 23 bits, so sign extend out to 32. | |
1467 | * | |
1468 | * NOTE If we haven't received a statistics notification yet | |
1469 | * with an updated temperature, use R4 provided to us in the | |
1470 | * "initialize" ALIVE response. | |
1471 | */ | |
1472 | if (!test_bit(STATUS_TEMPERATURE, &priv->status)) | |
1473 | vt = sign_extend32(R4, 23); | |
1474 | else | |
be663ab6 | 1475 | vt = sign_extend32(le32_to_cpu(priv->_4965.statistics. |
4bc85c13 WYG |
1476 | general.common.temperature), 23); |
1477 | ||
1478 | IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); | |
1479 | ||
1480 | if (R3 == R1) { | |
1481 | IWL_ERR(priv, "Calibration conflict R1 == R3\n"); | |
1482 | return -1; | |
1483 | } | |
1484 | ||
1485 | /* Calculate temperature in degrees Kelvin, adjust by 97%. | |
1486 | * Add offset to center the adjustment around 0 degrees Centigrade. */ | |
1487 | temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); | |
1488 | temperature /= (R3 - R1); | |
1489 | temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET; | |
1490 | ||
1491 | IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n", | |
1492 | temperature, KELVIN_TO_CELSIUS(temperature)); | |
1493 | ||
1494 | return temperature; | |
1495 | } | |
1496 | ||
1497 | /* Adjust Txpower only if temperature variance is greater than threshold. */ | |
1498 | #define IWL_TEMPERATURE_THRESHOLD 3 | |
1499 | ||
1500 | /** | |
1501 | * iwl4965_is_temp_calib_needed - determines if new calibration is needed | |
1502 | * | |
1503 | * If the temperature changed has changed sufficiently, then a recalibration | |
1504 | * is needed. | |
1505 | * | |
1506 | * Assumes caller will replace priv->last_temperature once calibration | |
1507 | * executed. | |
1508 | */ | |
1509 | static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv) | |
1510 | { | |
1511 | int temp_diff; | |
1512 | ||
1513 | if (!test_bit(STATUS_STATISTICS, &priv->status)) { | |
1514 | IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n"); | |
1515 | return 0; | |
1516 | } | |
1517 | ||
1518 | temp_diff = priv->temperature - priv->last_temperature; | |
1519 | ||
1520 | /* get absolute value */ | |
1521 | if (temp_diff < 0) { | |
1522 | IWL_DEBUG_POWER(priv, "Getting cooler, delta %d\n", temp_diff); | |
1523 | temp_diff = -temp_diff; | |
1524 | } else if (temp_diff == 0) | |
1525 | IWL_DEBUG_POWER(priv, "Temperature unchanged\n"); | |
1526 | else | |
1527 | IWL_DEBUG_POWER(priv, "Getting warmer, delta %d\n", temp_diff); | |
1528 | ||
1529 | if (temp_diff < IWL_TEMPERATURE_THRESHOLD) { | |
1530 | IWL_DEBUG_POWER(priv, " => thermal txpower calib not needed\n"); | |
1531 | return 0; | |
1532 | } | |
1533 | ||
1534 | IWL_DEBUG_POWER(priv, " => thermal txpower calib needed\n"); | |
1535 | ||
1536 | return 1; | |
1537 | } | |
1538 | ||
1539 | static void iwl4965_temperature_calib(struct iwl_priv *priv) | |
1540 | { | |
1541 | s32 temp; | |
1542 | ||
1543 | temp = iwl4965_hw_get_temperature(priv); | |
1544 | if (temp < 0) | |
1545 | return; | |
1546 | ||
1547 | if (priv->temperature != temp) { | |
1548 | if (priv->temperature) | |
1549 | IWL_DEBUG_TEMP(priv, "Temperature changed " | |
1550 | "from %dC to %dC\n", | |
1551 | KELVIN_TO_CELSIUS(priv->temperature), | |
1552 | KELVIN_TO_CELSIUS(temp)); | |
1553 | else | |
1554 | IWL_DEBUG_TEMP(priv, "Temperature " | |
1555 | "initialized to %dC\n", | |
1556 | KELVIN_TO_CELSIUS(temp)); | |
1557 | } | |
1558 | ||
1559 | priv->temperature = temp; | |
4bc85c13 WYG |
1560 | set_bit(STATUS_TEMPERATURE, &priv->status); |
1561 | ||
1562 | if (!priv->disable_tx_power_cal && | |
1563 | unlikely(!test_bit(STATUS_SCANNING, &priv->status)) && | |
1564 | iwl4965_is_temp_calib_needed(priv)) | |
1565 | queue_work(priv->workqueue, &priv->txpower_work); | |
1566 | } | |
1567 | ||
4bc85c13 WYG |
1568 | static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len) |
1569 | { | |
1570 | switch (cmd_id) { | |
1571 | case REPLY_RXON: | |
1572 | return (u16) sizeof(struct iwl4965_rxon_cmd); | |
1573 | default: | |
1574 | return len; | |
1575 | } | |
1576 | } | |
1577 | ||
be663ab6 WYG |
1578 | static u16 iwl4965_build_addsta_hcmd(const struct iwl_legacy_addsta_cmd *cmd, |
1579 | u8 *data) | |
4bc85c13 WYG |
1580 | { |
1581 | struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data; | |
1582 | addsta->mode = cmd->mode; | |
1583 | memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify)); | |
1584 | memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo)); | |
1585 | addsta->station_flags = cmd->station_flags; | |
1586 | addsta->station_flags_msk = cmd->station_flags_msk; | |
1587 | addsta->tid_disable_tx = cmd->tid_disable_tx; | |
1588 | addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid; | |
1589 | addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid; | |
1590 | addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn; | |
1591 | addsta->sleep_tx_count = cmd->sleep_tx_count; | |
1592 | addsta->reserved1 = cpu_to_le16(0); | |
1593 | addsta->reserved2 = cpu_to_le16(0); | |
1594 | ||
1595 | return (u16)sizeof(struct iwl4965_addsta_cmd); | |
1596 | } | |
1597 | ||
1598 | static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp) | |
1599 | { | |
1600 | return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN; | |
1601 | } | |
1602 | ||
1603 | /** | |
1604 | * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue | |
1605 | */ | |
1606 | static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, | |
1607 | struct iwl_ht_agg *agg, | |
1608 | struct iwl4965_tx_resp *tx_resp, | |
1609 | int txq_id, u16 start_idx) | |
1610 | { | |
1611 | u16 status; | |
1612 | struct agg_tx_status *frame_status = tx_resp->u.agg_status; | |
1613 | struct ieee80211_tx_info *info = NULL; | |
1614 | struct ieee80211_hdr *hdr = NULL; | |
1615 | u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
1616 | int i, sh, idx; | |
1617 | u16 seq; | |
1618 | if (agg->wait_for_ba) | |
1619 | IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n"); | |
1620 | ||
1621 | agg->frame_count = tx_resp->frame_count; | |
1622 | agg->start_idx = start_idx; | |
1623 | agg->rate_n_flags = rate_n_flags; | |
1624 | agg->bitmap = 0; | |
1625 | ||
1626 | /* num frames attempted by Tx command */ | |
1627 | if (agg->frame_count == 1) { | |
1628 | /* Only one frame was attempted; no block-ack will arrive */ | |
1629 | status = le16_to_cpu(frame_status[0].status); | |
1630 | idx = start_idx; | |
1631 | ||
4bc85c13 WYG |
1632 | IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n", |
1633 | agg->frame_count, agg->start_idx, idx); | |
1634 | ||
1635 | info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb); | |
1636 | info->status.rates[0].count = tx_resp->failure_frame + 1; | |
1637 | info->flags &= ~IEEE80211_TX_CTL_AMPDU; | |
be663ab6 WYG |
1638 | info->flags |= iwl4965_tx_status_to_mac80211(status); |
1639 | iwl4965_hwrate_to_tx_control(priv, rate_n_flags, info); | |
4bc85c13 WYG |
1640 | |
1641 | IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n", | |
1642 | status & 0xff, tx_resp->failure_frame); | |
1643 | IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags); | |
1644 | ||
1645 | agg->wait_for_ba = 0; | |
1646 | } else { | |
1647 | /* Two or more frames were attempted; expect block-ack */ | |
1648 | u64 bitmap = 0; | |
1649 | int start = agg->start_idx; | |
1650 | ||
1651 | /* Construct bit-map of pending frames within Tx window */ | |
1652 | for (i = 0; i < agg->frame_count; i++) { | |
1653 | u16 sc; | |
1654 | status = le16_to_cpu(frame_status[i].status); | |
1655 | seq = le16_to_cpu(frame_status[i].sequence); | |
1656 | idx = SEQ_TO_INDEX(seq); | |
1657 | txq_id = SEQ_TO_QUEUE(seq); | |
1658 | ||
1659 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
1660 | AGG_TX_STATE_ABORT_MSK)) | |
1661 | continue; | |
1662 | ||
1663 | IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n", | |
1664 | agg->frame_count, txq_id, idx); | |
1665 | ||
be663ab6 | 1666 | hdr = iwl_legacy_tx_queue_get_hdr(priv, txq_id, idx); |
4bc85c13 WYG |
1667 | if (!hdr) { |
1668 | IWL_ERR(priv, | |
1669 | "BUG_ON idx doesn't point to valid skb" | |
1670 | " idx=%d, txq_id=%d\n", idx, txq_id); | |
1671 | return -1; | |
1672 | } | |
1673 | ||
1674 | sc = le16_to_cpu(hdr->seq_ctrl); | |
1675 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
1676 | IWL_ERR(priv, | |
1677 | "BUG_ON idx doesn't match seq control" | |
1678 | " idx=%d, seq_idx=%d, seq=%d\n", | |
1679 | idx, SEQ_TO_SN(sc), hdr->seq_ctrl); | |
1680 | return -1; | |
1681 | } | |
1682 | ||
1683 | IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n", | |
1684 | i, idx, SEQ_TO_SN(sc)); | |
1685 | ||
1686 | sh = idx - start; | |
1687 | if (sh > 64) { | |
1688 | sh = (start - idx) + 0xff; | |
1689 | bitmap = bitmap << sh; | |
1690 | sh = 0; | |
1691 | start = idx; | |
1692 | } else if (sh < -64) | |
1693 | sh = 0xff - (start - idx); | |
1694 | else if (sh < 0) { | |
1695 | sh = start - idx; | |
1696 | start = idx; | |
1697 | bitmap = bitmap << sh; | |
1698 | sh = 0; | |
1699 | } | |
1700 | bitmap |= 1ULL << sh; | |
1701 | IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n", | |
1702 | start, (unsigned long long)bitmap); | |
1703 | } | |
1704 | ||
1705 | agg->bitmap = bitmap; | |
1706 | agg->start_idx = start; | |
1707 | IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n", | |
1708 | agg->frame_count, agg->start_idx, | |
1709 | (unsigned long long)agg->bitmap); | |
1710 | ||
1711 | if (bitmap) | |
1712 | agg->wait_for_ba = 1; | |
1713 | } | |
1714 | return 0; | |
1715 | } | |
1716 | ||
be663ab6 | 1717 | static u8 iwl4965_find_station(struct iwl_priv *priv, const u8 *addr) |
4bc85c13 WYG |
1718 | { |
1719 | int i; | |
1720 | int start = 0; | |
1721 | int ret = IWL_INVALID_STATION; | |
1722 | unsigned long flags; | |
1723 | ||
be663ab6 | 1724 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC)) |
4bc85c13 WYG |
1725 | start = IWL_STA_ID; |
1726 | ||
1727 | if (is_broadcast_ether_addr(addr)) | |
1728 | return priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id; | |
1729 | ||
1730 | spin_lock_irqsave(&priv->sta_lock, flags); | |
1731 | for (i = start; i < priv->hw_params.max_stations; i++) | |
1732 | if (priv->stations[i].used && | |
1733 | (!compare_ether_addr(priv->stations[i].sta.sta.addr, | |
1734 | addr))) { | |
1735 | ret = i; | |
1736 | goto out; | |
1737 | } | |
1738 | ||
1739 | IWL_DEBUG_ASSOC_LIMIT(priv, "can not find STA %pM total %d\n", | |
1740 | addr, priv->num_stations); | |
1741 | ||
1742 | out: | |
1743 | /* | |
1744 | * It may be possible that more commands interacting with stations | |
1745 | * arrive before we completed processing the adding of | |
1746 | * station | |
1747 | */ | |
1748 | if (ret != IWL_INVALID_STATION && | |
1749 | (!(priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) || | |
1750 | ((priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) && | |
1751 | (priv->stations[ret].used & IWL_STA_UCODE_INPROGRESS)))) { | |
1752 | IWL_ERR(priv, "Requested station info for sta %d before ready.\n", | |
1753 | ret); | |
1754 | ret = IWL_INVALID_STATION; | |
1755 | } | |
1756 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1757 | return ret; | |
1758 | } | |
1759 | ||
be663ab6 | 1760 | static int iwl4965_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr) |
4bc85c13 WYG |
1761 | { |
1762 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { | |
1763 | return IWL_AP_ID; | |
1764 | } else { | |
1765 | u8 *da = ieee80211_get_DA(hdr); | |
be663ab6 | 1766 | return iwl4965_find_station(priv, da); |
4bc85c13 WYG |
1767 | } |
1768 | } | |
1769 | ||
1770 | /** | |
1771 | * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response | |
1772 | */ | |
1773 | static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |
1774 | struct iwl_rx_mem_buffer *rxb) | |
1775 | { | |
1776 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1777 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); | |
1778 | int txq_id = SEQ_TO_QUEUE(sequence); | |
1779 | int index = SEQ_TO_INDEX(sequence); | |
1780 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; | |
1781 | struct ieee80211_hdr *hdr; | |
1782 | struct ieee80211_tx_info *info; | |
1783 | struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; | |
1784 | u32 status = le32_to_cpu(tx_resp->u.status); | |
1785 | int uninitialized_var(tid); | |
1786 | int sta_id; | |
1787 | int freed; | |
1788 | u8 *qc = NULL; | |
1789 | unsigned long flags; | |
1790 | ||
be663ab6 | 1791 | if ((index >= txq->q.n_bd) || (iwl_legacy_queue_used(&txq->q, index) == 0)) { |
4bc85c13 WYG |
1792 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " |
1793 | "is out of range [0-%d] %d %d\n", txq_id, | |
1794 | index, txq->q.n_bd, txq->q.write_ptr, | |
1795 | txq->q.read_ptr); | |
1796 | return; | |
1797 | } | |
1798 | ||
1799 | txq->time_stamp = jiffies; | |
1800 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb); | |
1801 | memset(&info->status, 0, sizeof(info->status)); | |
1802 | ||
be663ab6 | 1803 | hdr = iwl_legacy_tx_queue_get_hdr(priv, txq_id, index); |
4bc85c13 WYG |
1804 | if (ieee80211_is_data_qos(hdr->frame_control)) { |
1805 | qc = ieee80211_get_qos_ctl(hdr); | |
1806 | tid = qc[0] & 0xf; | |
1807 | } | |
1808 | ||
be663ab6 | 1809 | sta_id = iwl4965_get_ra_sta_id(priv, hdr); |
4bc85c13 WYG |
1810 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { |
1811 | IWL_ERR(priv, "Station not known\n"); | |
1812 | return; | |
1813 | } | |
1814 | ||
1815 | spin_lock_irqsave(&priv->sta_lock, flags); | |
1816 | if (txq->sched_retry) { | |
1817 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); | |
1818 | struct iwl_ht_agg *agg = NULL; | |
1819 | WARN_ON(!qc); | |
1820 | ||
1821 | agg = &priv->stations[sta_id].tid[tid].agg; | |
1822 | ||
1823 | iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index); | |
1824 | ||
1825 | /* check if BAR is needed */ | |
be663ab6 | 1826 | if ((tx_resp->frame_count == 1) && !iwl4965_is_tx_success(status)) |
4bc85c13 WYG |
1827 | info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; |
1828 | ||
1829 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { | |
be663ab6 WYG |
1830 | index = iwl_legacy_queue_dec_wrap(scd_ssn & 0xff, |
1831 | txq->q.n_bd); | |
4bc85c13 WYG |
1832 | IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn " |
1833 | "%d index %d\n", scd_ssn , index); | |
be663ab6 | 1834 | freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); |
4bc85c13 | 1835 | if (qc) |
be663ab6 | 1836 | iwl4965_free_tfds_in_queue(priv, sta_id, |
4bc85c13 WYG |
1837 | tid, freed); |
1838 | ||
1839 | if (priv->mac80211_registered && | |
be663ab6 WYG |
1840 | (iwl_legacy_queue_space(&txq->q) > txq->q.low_mark) |
1841 | && (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) | |
1842 | iwl_legacy_wake_queue(priv, txq); | |
4bc85c13 WYG |
1843 | } |
1844 | } else { | |
1845 | info->status.rates[0].count = tx_resp->failure_frame + 1; | |
be663ab6 WYG |
1846 | info->flags |= iwl4965_tx_status_to_mac80211(status); |
1847 | iwl4965_hwrate_to_tx_control(priv, | |
4bc85c13 WYG |
1848 | le32_to_cpu(tx_resp->rate_n_flags), |
1849 | info); | |
1850 | ||
1851 | IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) " | |
1852 | "rate_n_flags 0x%x retries %d\n", | |
1853 | txq_id, | |
be663ab6 | 1854 | iwl4965_get_tx_fail_reason(status), status, |
4bc85c13 WYG |
1855 | le32_to_cpu(tx_resp->rate_n_flags), |
1856 | tx_resp->failure_frame); | |
1857 | ||
be663ab6 | 1858 | freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); |
4bc85c13 | 1859 | if (qc && likely(sta_id != IWL_INVALID_STATION)) |
be663ab6 | 1860 | iwl4965_free_tfds_in_queue(priv, sta_id, tid, freed); |
4bc85c13 WYG |
1861 | else if (sta_id == IWL_INVALID_STATION) |
1862 | IWL_DEBUG_TX_REPLY(priv, "Station not known\n"); | |
1863 | ||
1864 | if (priv->mac80211_registered && | |
be663ab6 WYG |
1865 | (iwl_legacy_queue_space(&txq->q) > txq->q.low_mark)) |
1866 | iwl_legacy_wake_queue(priv, txq); | |
4bc85c13 WYG |
1867 | } |
1868 | if (qc && likely(sta_id != IWL_INVALID_STATION)) | |
be663ab6 | 1869 | iwl4965_txq_check_empty(priv, sta_id, tid, txq_id); |
4bc85c13 | 1870 | |
be663ab6 | 1871 | iwl4965_check_abort_status(priv, tx_resp->frame_count, status); |
4bc85c13 WYG |
1872 | |
1873 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1874 | } | |
1875 | ||
1876 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, | |
1877 | struct iwl_rx_mem_buffer *rxb) | |
1878 | { | |
1879 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1880 | struct iwl4965_beacon_notif *beacon = (void *)pkt->u.raw; | |
be663ab6 WYG |
1881 | u8 rate __maybe_unused = |
1882 | iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | |
4bc85c13 WYG |
1883 | |
1884 | IWL_DEBUG_RX(priv, "beacon status %#x, retries:%d ibssmgr:%d " | |
1885 | "tsf:0x%.8x%.8x rate:%d\n", | |
1886 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, | |
1887 | beacon->beacon_notify_hdr.failure_frame, | |
1888 | le32_to_cpu(beacon->ibss_mgr_status), | |
1889 | le32_to_cpu(beacon->high_tsf), | |
1890 | le32_to_cpu(beacon->low_tsf), rate); | |
4bc85c13 WYG |
1891 | |
1892 | priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); | |
4bc85c13 WYG |
1893 | } |
1894 | ||
4bc85c13 WYG |
1895 | /* Set up 4965-specific Rx frame reply handlers */ |
1896 | static void iwl4965_rx_handler_setup(struct iwl_priv *priv) | |
1897 | { | |
1898 | /* Legacy Rx frames */ | |
be663ab6 | 1899 | priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx; |
4bc85c13 WYG |
1900 | /* Tx response */ |
1901 | priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx; | |
1902 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
4bc85c13 WYG |
1903 | } |
1904 | ||
1905 | static struct iwl_hcmd_ops iwl4965_hcmd = { | |
1906 | .rxon_assoc = iwl4965_send_rxon_assoc, | |
1907 | .commit_rxon = iwl4965_commit_rxon, | |
be663ab6 | 1908 | .set_rxon_chain = iwl4965_set_rxon_chain, |
4bc85c13 WYG |
1909 | }; |
1910 | ||
1911 | static void iwl4965_post_scan(struct iwl_priv *priv) | |
1912 | { | |
1913 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
1914 | ||
1915 | /* | |
1916 | * Since setting the RXON may have been deferred while | |
1917 | * performing the scan, fire one off if needed | |
1918 | */ | |
1919 | if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging))) | |
be663ab6 | 1920 | iwl_legacy_commit_rxon(priv, ctx); |
4bc85c13 WYG |
1921 | } |
1922 | ||
1923 | static void iwl4965_post_associate(struct iwl_priv *priv) | |
1924 | { | |
1925 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
1926 | struct ieee80211_vif *vif = ctx->vif; | |
1927 | struct ieee80211_conf *conf = NULL; | |
1928 | int ret = 0; | |
1929 | ||
1930 | if (!vif || !priv->is_open) | |
1931 | return; | |
1932 | ||
4bc85c13 WYG |
1933 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
1934 | return; | |
1935 | ||
be663ab6 | 1936 | iwl_legacy_scan_cancel_timeout(priv, 200); |
4bc85c13 | 1937 | |
be663ab6 | 1938 | conf = iwl_legacy_ieee80211_get_hw_conf(priv->hw); |
4bc85c13 WYG |
1939 | |
1940 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
be663ab6 | 1941 | iwl_legacy_commit_rxon(priv, ctx); |
4bc85c13 | 1942 | |
be663ab6 | 1943 | ret = iwl_legacy_send_rxon_timing(priv, ctx); |
4bc85c13 WYG |
1944 | if (ret) |
1945 | IWL_WARN(priv, "RXON timing - " | |
1946 | "Attempting to continue.\n"); | |
1947 | ||
1948 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
1949 | ||
be663ab6 | 1950 | iwl_legacy_set_rxon_ht(priv, &priv->current_ht_config); |
4bc85c13 WYG |
1951 | |
1952 | if (priv->cfg->ops->hcmd->set_rxon_chain) | |
1953 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); | |
1954 | ||
1955 | ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid); | |
1956 | ||
1957 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", | |
1958 | vif->bss_conf.aid, vif->bss_conf.beacon_int); | |
1959 | ||
1960 | if (vif->bss_conf.use_short_preamble) | |
1961 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
1962 | else | |
1963 | ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
1964 | ||
1965 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { | |
1966 | if (vif->bss_conf.use_short_slot) | |
1967 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1968 | else | |
1969 | ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1970 | } | |
1971 | ||
be663ab6 | 1972 | iwl_legacy_commit_rxon(priv, ctx); |
4bc85c13 WYG |
1973 | |
1974 | IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n", | |
1975 | vif->bss_conf.aid, ctx->active.bssid_addr); | |
1976 | ||
1977 | switch (vif->type) { | |
1978 | case NL80211_IFTYPE_STATION: | |
1979 | break; | |
1980 | case NL80211_IFTYPE_ADHOC: | |
be663ab6 | 1981 | iwl4965_send_beacon_cmd(priv); |
4bc85c13 WYG |
1982 | break; |
1983 | default: | |
1984 | IWL_ERR(priv, "%s Should not be called in %d mode\n", | |
1985 | __func__, vif->type); | |
1986 | break; | |
1987 | } | |
1988 | ||
1989 | /* the chain noise calibration will enabled PM upon completion | |
1990 | * If chain noise has already been run, then we need to enable | |
1991 | * power management here */ | |
1992 | if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE) | |
be663ab6 | 1993 | iwl_legacy_power_update_mode(priv, false); |
4bc85c13 WYG |
1994 | |
1995 | /* Enable Rx differential gain and sensitivity calibrations */ | |
be663ab6 | 1996 | iwl4965_chain_noise_reset(priv); |
4bc85c13 WYG |
1997 | priv->start_calib = 1; |
1998 | } | |
1999 | ||
2000 | static void iwl4965_config_ap(struct iwl_priv *priv) | |
2001 | { | |
2002 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
2003 | struct ieee80211_vif *vif = ctx->vif; | |
2004 | int ret = 0; | |
2005 | ||
2006 | lockdep_assert_held(&priv->mutex); | |
2007 | ||
2008 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2009 | return; | |
2010 | ||
2011 | /* The following should be done only at AP bring up */ | |
be663ab6 | 2012 | if (!iwl_legacy_is_associated_ctx(ctx)) { |
4bc85c13 WYG |
2013 | |
2014 | /* RXON - unassoc (to set timing command) */ | |
2015 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
be663ab6 | 2016 | iwl_legacy_commit_rxon(priv, ctx); |
4bc85c13 WYG |
2017 | |
2018 | /* RXON Timing */ | |
be663ab6 | 2019 | ret = iwl_legacy_send_rxon_timing(priv, ctx); |
4bc85c13 WYG |
2020 | if (ret) |
2021 | IWL_WARN(priv, "RXON timing failed - " | |
2022 | "Attempting to continue.\n"); | |
2023 | ||
2024 | /* AP has all antennas */ | |
2025 | priv->chain_noise_data.active_chains = | |
2026 | priv->hw_params.valid_rx_ant; | |
be663ab6 | 2027 | iwl_legacy_set_rxon_ht(priv, &priv->current_ht_config); |
4bc85c13 WYG |
2028 | if (priv->cfg->ops->hcmd->set_rxon_chain) |
2029 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); | |
2030 | ||
2031 | ctx->staging.assoc_id = 0; | |
2032 | ||
2033 | if (vif->bss_conf.use_short_preamble) | |
2034 | ctx->staging.flags |= | |
2035 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2036 | else | |
2037 | ctx->staging.flags &= | |
2038 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2039 | ||
2040 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { | |
2041 | if (vif->bss_conf.use_short_slot) | |
2042 | ctx->staging.flags |= | |
2043 | RXON_FLG_SHORT_SLOT_MSK; | |
2044 | else | |
2045 | ctx->staging.flags &= | |
2046 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2047 | } | |
2048 | /* need to send beacon cmd before committing assoc RXON! */ | |
be663ab6 | 2049 | iwl4965_send_beacon_cmd(priv); |
4bc85c13 WYG |
2050 | /* restore RXON assoc */ |
2051 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
be663ab6 | 2052 | iwl_legacy_commit_rxon(priv, ctx); |
4bc85c13 | 2053 | } |
be663ab6 | 2054 | iwl4965_send_beacon_cmd(priv); |
4bc85c13 WYG |
2055 | } |
2056 | ||
2057 | static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = { | |
2058 | .get_hcmd_size = iwl4965_get_hcmd_size, | |
2059 | .build_addsta_hcmd = iwl4965_build_addsta_hcmd, | |
be663ab6 | 2060 | .request_scan = iwl4965_request_scan, |
4bc85c13 WYG |
2061 | .post_scan = iwl4965_post_scan, |
2062 | }; | |
2063 | ||
2064 | static struct iwl_lib_ops iwl4965_lib = { | |
2065 | .set_hw_params = iwl4965_hw_set_hw_params, | |
2066 | .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl, | |
be663ab6 WYG |
2067 | .txq_attach_buf_to_tfd = iwl4965_hw_txq_attach_buf_to_tfd, |
2068 | .txq_free_tfd = iwl4965_hw_txq_free_tfd, | |
2069 | .txq_init = iwl4965_hw_tx_queue_init, | |
4bc85c13 | 2070 | .rx_handler_setup = iwl4965_rx_handler_setup, |
4bc85c13 | 2071 | .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr, |
4bc85c13 WYG |
2072 | .init_alive_start = iwl4965_init_alive_start, |
2073 | .load_ucode = iwl4965_load_bsm, | |
be663ab6 WYG |
2074 | .dump_nic_event_log = iwl4965_dump_nic_event_log, |
2075 | .dump_nic_error_log = iwl4965_dump_nic_error_log, | |
2076 | .dump_fh = iwl4965_dump_fh, | |
4bc85c13 WYG |
2077 | .set_channel_switch = iwl4965_hw_channel_switch, |
2078 | .apm_ops = { | |
be663ab6 | 2079 | .init = iwl_legacy_apm_init, |
4bc85c13 WYG |
2080 | .config = iwl4965_nic_config, |
2081 | }, | |
2082 | .eeprom_ops = { | |
2083 | .regulatory_bands = { | |
2084 | EEPROM_REGULATORY_BAND_1_CHANNELS, | |
2085 | EEPROM_REGULATORY_BAND_2_CHANNELS, | |
2086 | EEPROM_REGULATORY_BAND_3_CHANNELS, | |
2087 | EEPROM_REGULATORY_BAND_4_CHANNELS, | |
2088 | EEPROM_REGULATORY_BAND_5_CHANNELS, | |
2089 | EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS, | |
2090 | EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS | |
2091 | }, | |
be663ab6 WYG |
2092 | .acquire_semaphore = iwl4965_eeprom_acquire_semaphore, |
2093 | .release_semaphore = iwl4965_eeprom_release_semaphore, | |
4bc85c13 WYG |
2094 | }, |
2095 | .send_tx_power = iwl4965_send_tx_power, | |
be663ab6 | 2096 | .update_chain_flags = iwl4965_update_chain_flags, |
4bc85c13 WYG |
2097 | .temp_ops = { |
2098 | .temperature = iwl4965_temperature_calib, | |
2099 | }, | |
2100 | .debugfs_ops = { | |
be663ab6 WYG |
2101 | .rx_stats_read = iwl4965_ucode_rx_stats_read, |
2102 | .tx_stats_read = iwl4965_ucode_tx_stats_read, | |
2103 | .general_stats_read = iwl4965_ucode_general_stats_read, | |
4bc85c13 | 2104 | }, |
be663ab6 | 2105 | .check_plcp_health = iwl4965_good_plcp_health, |
4bc85c13 WYG |
2106 | }; |
2107 | ||
2108 | static const struct iwl_legacy_ops iwl4965_legacy_ops = { | |
2109 | .post_associate = iwl4965_post_associate, | |
2110 | .config_ap = iwl4965_config_ap, | |
be663ab6 WYG |
2111 | .manage_ibss_station = iwl4965_manage_ibss_station, |
2112 | .update_bcast_stations = iwl4965_update_bcast_stations, | |
4bc85c13 WYG |
2113 | }; |
2114 | ||
2115 | struct ieee80211_ops iwl4965_hw_ops = { | |
be663ab6 WYG |
2116 | .tx = iwl4965_mac_tx, |
2117 | .start = iwl4965_mac_start, | |
2118 | .stop = iwl4965_mac_stop, | |
2119 | .add_interface = iwl_legacy_mac_add_interface, | |
2120 | .remove_interface = iwl_legacy_mac_remove_interface, | |
2121 | .change_interface = iwl_legacy_mac_change_interface, | |
4bc85c13 | 2122 | .config = iwl_legacy_mac_config, |
be663ab6 WYG |
2123 | .configure_filter = iwl4965_configure_filter, |
2124 | .set_key = iwl4965_mac_set_key, | |
2125 | .update_tkip_key = iwl4965_mac_update_tkip_key, | |
2126 | .conf_tx = iwl_legacy_mac_conf_tx, | |
4bc85c13 WYG |
2127 | .reset_tsf = iwl_legacy_mac_reset_tsf, |
2128 | .bss_info_changed = iwl_legacy_mac_bss_info_changed, | |
be663ab6 WYG |
2129 | .ampdu_action = iwl4965_mac_ampdu_action, |
2130 | .hw_scan = iwl_legacy_mac_hw_scan, | |
2131 | .sta_add = iwl4965_mac_sta_add, | |
2132 | .sta_remove = iwl_legacy_mac_sta_remove, | |
2133 | .channel_switch = iwl4965_mac_channel_switch, | |
2134 | .tx_last_beacon = iwl_legacy_mac_tx_last_beacon, | |
4bc85c13 WYG |
2135 | }; |
2136 | ||
2137 | static const struct iwl_ops iwl4965_ops = { | |
2138 | .lib = &iwl4965_lib, | |
2139 | .hcmd = &iwl4965_hcmd, | |
2140 | .utils = &iwl4965_hcmd_utils, | |
be663ab6 | 2141 | .led = &iwl4965_led_ops, |
4bc85c13 WYG |
2142 | .legacy = &iwl4965_legacy_ops, |
2143 | .ieee80211_ops = &iwl4965_hw_ops, | |
2144 | }; | |
2145 | ||
2146 | static struct iwl_base_params iwl4965_base_params = { | |
2147 | .eeprom_size = IWL4965_EEPROM_IMG_SIZE, | |
2148 | .num_of_queues = IWL49_NUM_QUEUES, | |
2149 | .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES, | |
2150 | .pll_cfg_val = 0, | |
2151 | .set_l0s = true, | |
2152 | .use_bsm = true, | |
4bc85c13 WYG |
2153 | .led_compensation = 61, |
2154 | .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS, | |
2155 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | |
2156 | .wd_timeout = IWL_DEF_WD_TIMEOUT, | |
2157 | .temperature_kelvin = true, | |
2158 | .max_event_log_size = 512, | |
4bc85c13 WYG |
2159 | .ucode_tracing = true, |
2160 | .sensitivity_calib_by_driver = true, | |
2161 | .chain_noise_calib_by_driver = true, | |
4bc85c13 WYG |
2162 | }; |
2163 | ||
be663ab6 | 2164 | struct iwl_cfg iwl4965_cfg = { |
4bc85c13 WYG |
2165 | .name = "Intel(R) Wireless WiFi Link 4965AGN", |
2166 | .fw_name_pre = IWL4965_FW_PRE, | |
2167 | .ucode_api_max = IWL4965_UCODE_API_MAX, | |
2168 | .ucode_api_min = IWL4965_UCODE_API_MIN, | |
2169 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | |
2170 | .valid_tx_ant = ANT_AB, | |
2171 | .valid_rx_ant = ANT_ABC, | |
2172 | .eeprom_ver = EEPROM_4965_EEPROM_VERSION, | |
2173 | .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, | |
2174 | .ops = &iwl4965_ops, | |
be663ab6 | 2175 | .mod_params = &iwl4965_mod_params, |
4bc85c13 WYG |
2176 | .base_params = &iwl4965_base_params, |
2177 | .led_mode = IWL_LED_BLINK, | |
2178 | /* | |
2179 | * Force use of chains B and C for scan RX on 5 GHz band | |
2180 | * because the device has off-channel reception on chain A. | |
2181 | */ | |
2182 | .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC, | |
2183 | }; | |
2184 | ||
2185 | /* Module firmware */ | |
2186 | MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX)); |