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Commit | Line | Data |
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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
128e63ef | 3 | * Copyright(c) 2003 - 2013 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
759ef89f | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | * | |
28 | *****************************************************************************/ | |
69b8797f JP |
29 | |
30 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
31 | ||
b481de9c ZY |
32 | #include <linux/kernel.h> |
33 | #include <linux/module.h> | |
b481de9c | 34 | #include <linux/init.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
b481de9c | 36 | #include <linux/delay.h> |
d43c36dc | 37 | #include <linux/sched.h> |
b481de9c ZY |
38 | #include <linux/skbuff.h> |
39 | #include <linux/netdevice.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
b481de9c ZY |
43 | #include <net/mac80211.h> |
44 | ||
45 | #include <asm/div64.h> | |
46 | ||
26a7ca9a JB |
47 | #include "iwl-eeprom-read.h" |
48 | #include "iwl-eeprom-parse.h" | |
3395f6e9 | 49 | #include "iwl-io.h" |
c85eb619 | 50 | #include "iwl-trans.h" |
d0f76d68 | 51 | #include "iwl-op-mode.h" |
82575102 | 52 | #include "iwl-drv.h" |
65de7e84 | 53 | #include "iwl-modparams.h" |
dada03ca | 54 | #include "iwl-prph.h" |
416e1438 | 55 | |
1023fdc4 JB |
56 | #include "dev.h" |
57 | #include "calib.h" | |
58 | #include "agn.h" | |
59 | ||
dada03ca | 60 | |
b481de9c ZY |
61 | /****************************************************************************** |
62 | * | |
63 | * module boiler plate | |
64 | * | |
65 | ******************************************************************************/ | |
66 | ||
b481de9c ZY |
67 | /* |
68 | * module name, copyright, version, etc. | |
b481de9c | 69 | */ |
d783b061 | 70 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 71 | |
0a6857e7 | 72 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
73 | #define VD "d" |
74 | #else | |
75 | #define VD | |
76 | #endif | |
77 | ||
81963d68 | 78 | #define DRV_VERSION IWLWIFI_VERSION VD |
b481de9c | 79 | |
b481de9c ZY |
80 | |
81 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
82 | MODULE_VERSION(DRV_VERSION); | |
a7b75207 | 83 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
b481de9c ZY |
84 | MODULE_LICENSE("GPL"); |
85 | ||
b1abedad JB |
86 | static const struct iwl_op_mode_ops iwl_dvm_ops; |
87 | ||
5b9f8cd3 | 88 | void iwl_update_chain_flags(struct iwl_priv *priv) |
5da4b55f | 89 | { |
246ed355 | 90 | struct iwl_rxon_context *ctx; |
5da4b55f | 91 | |
e3f10cea WYG |
92 | for_each_context(priv, ctx) { |
93 | iwlagn_set_rxon_chain(priv, ctx); | |
94 | if (ctx->active.rx_chain != ctx->staging.rx_chain) | |
95 | iwlagn_commit_rxon(priv, ctx); | |
246ed355 | 96 | } |
5da4b55f MA |
97 | } |
98 | ||
47ff65c4 DH |
99 | /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ |
100 | static void iwl_set_beacon_tim(struct iwl_priv *priv, | |
77834543 JB |
101 | struct iwl_tx_beacon_cmd *tx_beacon_cmd, |
102 | u8 *beacon, u32 frame_size) | |
47ff65c4 DH |
103 | { |
104 | u16 tim_idx; | |
105 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; | |
106 | ||
107 | /* | |
108 | * The index is relative to frame start but we start looking at the | |
109 | * variable-length part of the beacon. | |
110 | */ | |
111 | tim_idx = mgmt->u.beacon.variable - beacon; | |
112 | ||
113 | /* Parse variable-length elements of beacon to find WLAN_EID_TIM */ | |
114 | while ((tim_idx < (frame_size - 2)) && | |
115 | (beacon[tim_idx] != WLAN_EID_TIM)) | |
116 | tim_idx += beacon[tim_idx+1] + 2; | |
117 | ||
118 | /* If TIM field was found, set variables */ | |
119 | if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) { | |
120 | tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); | |
121 | tx_beacon_cmd->tim_size = beacon[tim_idx+1]; | |
122 | } else | |
123 | IWL_WARN(priv, "Unable to find TIM Element in beacon\n"); | |
124 | } | |
125 | ||
8a98d49e | 126 | int iwlagn_send_beacon_cmd(struct iwl_priv *priv) |
4bf64efd TW |
127 | { |
128 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
8a98d49e JB |
129 | struct iwl_host_cmd cmd = { |
130 | .id = REPLY_TX_BEACON, | |
e419d62d | 131 | .flags = CMD_SYNC, |
8a98d49e | 132 | }; |
0b5b3ff1 | 133 | struct ieee80211_tx_info *info; |
47ff65c4 DH |
134 | u32 frame_size; |
135 | u32 rate_flags; | |
136 | u32 rate; | |
8a98d49e | 137 | |
47ff65c4 DH |
138 | /* |
139 | * We have to set up the TX command, the TX Beacon command, and the | |
140 | * beacon contents. | |
141 | */ | |
4bf64efd | 142 | |
b1eea297 | 143 | lockdep_assert_held(&priv->mutex); |
76d04815 JB |
144 | |
145 | if (!priv->beacon_ctx) { | |
146 | IWL_ERR(priv, "trying to build beacon w/o beacon context!\n"); | |
950094cb | 147 | return 0; |
76d04815 JB |
148 | } |
149 | ||
8a98d49e JB |
150 | if (WARN_ON(!priv->beacon_skb)) |
151 | return -EINVAL; | |
152 | ||
4ce7cc2b JB |
153 | /* Allocate beacon command */ |
154 | if (!priv->beacon_cmd) | |
155 | priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL); | |
156 | tx_beacon_cmd = priv->beacon_cmd; | |
8a98d49e JB |
157 | if (!tx_beacon_cmd) |
158 | return -ENOMEM; | |
159 | ||
160 | frame_size = priv->beacon_skb->len; | |
4bf64efd | 161 | |
47ff65c4 | 162 | /* Set up TX command fields */ |
4bf64efd | 163 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); |
76d04815 | 164 | tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id; |
47ff65c4 DH |
165 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
166 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
167 | TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; | |
4bf64efd | 168 | |
47ff65c4 | 169 | /* Set up TX beacon command fields */ |
4ce7cc2b | 170 | iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data, |
77834543 | 171 | frame_size); |
4bf64efd | 172 | |
47ff65c4 | 173 | /* Set up packet rate and flags */ |
0b5b3ff1 JB |
174 | info = IEEE80211_SKB_CB(priv->beacon_skb); |
175 | ||
176 | /* | |
177 | * Let's set up the rate at least somewhat correctly; | |
178 | * it will currently not actually be used by the uCode, | |
179 | * it uses the broadcast station's rate instead. | |
180 | */ | |
181 | if (info->control.rates[0].idx < 0 || | |
182 | info->control.rates[0].flags & IEEE80211_TX_RC_MCS) | |
183 | rate = 0; | |
184 | else | |
185 | rate = info->control.rates[0].idx; | |
186 | ||
0e1654fa | 187 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant, |
b7998c8b | 188 | priv->nvm_data->valid_tx_ant); |
47ff65c4 | 189 | rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant); |
0b5b3ff1 JB |
190 | |
191 | /* In mac80211, rates for 5 GHz start at 0 */ | |
192 | if (info->band == IEEE80211_BAND_5GHZ) | |
193 | rate += IWL_FIRST_OFDM_RATE; | |
194 | else if (rate >= IWL_FIRST_CCK_RATE && rate <= IWL_LAST_CCK_RATE) | |
47ff65c4 | 195 | rate_flags |= RATE_MCS_CCK_MSK; |
0b5b3ff1 JB |
196 | |
197 | tx_beacon_cmd->tx.rate_n_flags = | |
198 | iwl_hw_set_rate_n_flags(rate, rate_flags); | |
4bf64efd | 199 | |
8a98d49e | 200 | /* Submit command */ |
4ce7cc2b | 201 | cmd.len[0] = sizeof(*tx_beacon_cmd); |
3fa50738 | 202 | cmd.data[0] = tx_beacon_cmd; |
4ce7cc2b JB |
203 | cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY; |
204 | cmd.len[1] = frame_size; | |
205 | cmd.data[1] = priv->beacon_skb->data; | |
206 | cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; | |
7aaa1d79 | 207 | |
e10a0533 | 208 | return iwl_dvm_send_cmd(priv, &cmd); |
a8e74e27 SO |
209 | } |
210 | ||
5b9f8cd3 | 211 | static void iwl_bg_beacon_update(struct work_struct *work) |
b481de9c | 212 | { |
c79dd5b5 TW |
213 | struct iwl_priv *priv = |
214 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
215 | struct sk_buff *beacon; |
216 | ||
b1eea297 | 217 | mutex_lock(&priv->mutex); |
76d04815 JB |
218 | if (!priv->beacon_ctx) { |
219 | IWL_ERR(priv, "updating beacon w/o beacon context!\n"); | |
220 | goto out; | |
221 | } | |
b481de9c | 222 | |
60744f62 JB |
223 | if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) { |
224 | /* | |
225 | * The ucode will send beacon notifications even in | |
226 | * IBSS mode, but we don't want to process them. But | |
227 | * we need to defer the type check to here due to | |
228 | * requiring locking around the beacon_ctx access. | |
229 | */ | |
230 | goto out; | |
231 | } | |
232 | ||
76d04815 JB |
233 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ |
234 | beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif); | |
b481de9c | 235 | if (!beacon) { |
77834543 | 236 | IWL_ERR(priv, "update beacon failed -- keeping old\n"); |
76d04815 | 237 | goto out; |
b481de9c ZY |
238 | } |
239 | ||
b481de9c | 240 | /* new beacon skb is allocated every time; dispose previous.*/ |
77834543 | 241 | dev_kfree_skb(priv->beacon_skb); |
b481de9c | 242 | |
12e934dc | 243 | priv->beacon_skb = beacon; |
b481de9c | 244 | |
2295c66b | 245 | iwlagn_send_beacon_cmd(priv); |
76d04815 | 246 | out: |
b1eea297 | 247 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
248 | } |
249 | ||
fbba9410 WYG |
250 | static void iwl_bg_bt_runtime_config(struct work_struct *work) |
251 | { | |
252 | struct iwl_priv *priv = | |
253 | container_of(work, struct iwl_priv, bt_runtime_config); | |
254 | ||
83626404 | 255 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
fbba9410 WYG |
256 | return; |
257 | ||
258 | /* dont send host command if rf-kill is on */ | |
83626404 | 259 | if (!iwl_is_ready_rf(priv)) |
fbba9410 | 260 | return; |
e55b517c | 261 | iwlagn_send_advance_bt_config(priv); |
fbba9410 WYG |
262 | } |
263 | ||
bee008b7 WYG |
264 | static void iwl_bg_bt_full_concurrency(struct work_struct *work) |
265 | { | |
266 | struct iwl_priv *priv = | |
267 | container_of(work, struct iwl_priv, bt_full_concurrency); | |
246ed355 | 268 | struct iwl_rxon_context *ctx; |
bee008b7 | 269 | |
b1eea297 | 270 | mutex_lock(&priv->mutex); |
dc1a4068 | 271 | |
83626404 | 272 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
dc1a4068 | 273 | goto out; |
bee008b7 WYG |
274 | |
275 | /* dont send host command if rf-kill is on */ | |
83626404 | 276 | if (!iwl_is_ready_rf(priv)) |
dc1a4068 | 277 | goto out; |
bee008b7 WYG |
278 | |
279 | IWL_DEBUG_INFO(priv, "BT coex in %s mode\n", | |
280 | priv->bt_full_concurrent ? | |
281 | "full concurrency" : "3-wire"); | |
282 | ||
283 | /* | |
284 | * LQ & RXON updated cmds must be sent before BT Config cmd | |
285 | * to avoid 3-wire collisions | |
286 | */ | |
246ed355 | 287 | for_each_context(priv, ctx) { |
e3f10cea | 288 | iwlagn_set_rxon_chain(priv, ctx); |
805a3b81 | 289 | iwlagn_commit_rxon(priv, ctx); |
246ed355 | 290 | } |
bee008b7 | 291 | |
e55b517c | 292 | iwlagn_send_advance_bt_config(priv); |
dc1a4068 | 293 | out: |
b1eea297 | 294 | mutex_unlock(&priv->mutex); |
bee008b7 WYG |
295 | } |
296 | ||
1591129d MV |
297 | int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear) |
298 | { | |
299 | struct iwl_statistics_cmd statistics_cmd = { | |
300 | .configuration_flags = | |
301 | clear ? IWL_STATS_CONF_CLEAR_STATS : 0, | |
302 | }; | |
303 | ||
304 | if (flags & CMD_ASYNC) | |
305 | return iwl_dvm_send_cmd_pdu(priv, REPLY_STATISTICS_CMD, | |
306 | CMD_ASYNC, | |
307 | sizeof(struct iwl_statistics_cmd), | |
308 | &statistics_cmd); | |
309 | else | |
310 | return iwl_dvm_send_cmd_pdu(priv, REPLY_STATISTICS_CMD, | |
311 | CMD_SYNC, | |
312 | sizeof(struct iwl_statistics_cmd), | |
313 | &statistics_cmd); | |
314 | } | |
315 | ||
4e39317d | 316 | /** |
5b9f8cd3 | 317 | * iwl_bg_statistics_periodic - Timer callback to queue statistics |
4e39317d EG |
318 | * |
319 | * This callback is provided in order to send a statistics request. | |
320 | * | |
321 | * This timer function is continually reset to execute within | |
322 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
323 | * was received. We need to ensure we receive the statistics in order | |
324 | * to update the temperature used for calibrating the TXPOWER. | |
325 | */ | |
5b9f8cd3 | 326 | static void iwl_bg_statistics_periodic(unsigned long data) |
4e39317d EG |
327 | { |
328 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
329 | ||
83626404 | 330 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
4e39317d EG |
331 | return; |
332 | ||
61780ee3 | 333 | /* dont send host command if rf-kill is on */ |
83626404 | 334 | if (!iwl_is_ready_rf(priv)) |
61780ee3 MA |
335 | return; |
336 | ||
ef8d5529 | 337 | iwl_send_statistics_request(priv, CMD_ASYNC, false); |
4e39317d EG |
338 | } |
339 | ||
a9e1cb6a WYG |
340 | |
341 | static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base, | |
342 | u32 start_idx, u32 num_events, | |
98d4bf0c | 343 | u32 capacity, u32 mode) |
a9e1cb6a WYG |
344 | { |
345 | u32 i; | |
346 | u32 ptr; /* SRAM byte address of log data */ | |
347 | u32 ev, time, data; /* event log data */ | |
348 | unsigned long reg_flags; | |
349 | ||
350 | if (mode == 0) | |
351 | ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32)); | |
352 | else | |
353 | ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32)); | |
354 | ||
355 | /* Make sure device is powered up for SRAM reads */ | |
e56b04ef | 356 | if (!iwl_trans_grab_nic_access(priv->trans, false, ®_flags)) |
a9e1cb6a | 357 | return; |
a9e1cb6a WYG |
358 | |
359 | /* Set starting address; reads will auto-increment */ | |
68e8dfda | 360 | iwl_write32(priv->trans, HBUS_TARG_MEM_RADDR, ptr); |
a9e1cb6a | 361 | |
98d4bf0c JB |
362 | /* |
363 | * Refuse to read more than would have fit into the log from | |
364 | * the current start_idx. This used to happen due to the race | |
365 | * described below, but now WARN because the code below should | |
366 | * prevent it from happening here. | |
367 | */ | |
368 | if (WARN_ON(num_events > capacity - start_idx)) | |
369 | num_events = capacity - start_idx; | |
370 | ||
a9e1cb6a WYG |
371 | /* |
372 | * "time" is actually "data" for mode 0 (no timestamp). | |
373 | * place event id # at far right for easier visual parsing. | |
374 | */ | |
375 | for (i = 0; i < num_events; i++) { | |
68e8dfda EG |
376 | ev = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT); |
377 | time = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT); | |
a9e1cb6a | 378 | if (mode == 0) { |
6c1011e1 | 379 | trace_iwlwifi_dev_ucode_cont_event( |
68e8dfda | 380 | priv->trans->dev, 0, time, ev); |
a9e1cb6a | 381 | } else { |
68e8dfda | 382 | data = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT); |
6c1011e1 | 383 | trace_iwlwifi_dev_ucode_cont_event( |
68e8dfda | 384 | priv->trans->dev, time, data, ev); |
a9e1cb6a WYG |
385 | } |
386 | } | |
387 | /* Allow device to power down */ | |
e56b04ef | 388 | iwl_trans_release_nic_access(priv->trans, ®_flags); |
a9e1cb6a WYG |
389 | } |
390 | ||
875295f1 | 391 | static void iwl_continuous_event_trace(struct iwl_priv *priv) |
a9e1cb6a WYG |
392 | { |
393 | u32 capacity; /* event log capacity in # entries */ | |
98d4bf0c JB |
394 | struct { |
395 | u32 capacity; | |
396 | u32 mode; | |
397 | u32 wrap_counter; | |
398 | u32 write_counter; | |
399 | } __packed read; | |
a9e1cb6a WYG |
400 | u32 base; /* SRAM byte address of event log header */ |
401 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
402 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
403 | u32 next_entry; /* index of next entry to be written by uCode */ | |
404 | ||
2fdfc476 | 405 | base = priv->device_pointers.log_event_table; |
4caab328 | 406 | if (iwlagn_hw_valid_rtc_data_addr(base)) { |
4fd442db EG |
407 | iwl_trans_read_mem_bytes(priv->trans, base, |
408 | &read, sizeof(read)); | |
98d4bf0c JB |
409 | capacity = read.capacity; |
410 | mode = read.mode; | |
411 | num_wraps = read.wrap_counter; | |
412 | next_entry = read.write_counter; | |
a9e1cb6a WYG |
413 | } else |
414 | return; | |
415 | ||
98d4bf0c JB |
416 | /* |
417 | * Unfortunately, the uCode doesn't use temporary variables. | |
418 | * Therefore, it can happen that we read next_entry == capacity, | |
419 | * which really means next_entry == 0. | |
420 | */ | |
421 | if (unlikely(next_entry == capacity)) | |
422 | next_entry = 0; | |
423 | /* | |
424 | * Additionally, the uCode increases the write pointer before | |
425 | * the wraps counter, so if the write pointer is smaller than | |
426 | * the old write pointer (wrap occurred) but we read that no | |
427 | * wrap occurred, we actually read between the next_entry and | |
428 | * num_wraps update (this does happen in practice!!) -- take | |
429 | * that into account by increasing num_wraps. | |
430 | */ | |
431 | if (unlikely(next_entry < priv->event_log.next_entry && | |
432 | num_wraps == priv->event_log.num_wraps)) | |
433 | num_wraps++; | |
434 | ||
a9e1cb6a | 435 | if (num_wraps == priv->event_log.num_wraps) { |
98d4bf0c JB |
436 | iwl_print_cont_event_trace( |
437 | priv, base, priv->event_log.next_entry, | |
438 | next_entry - priv->event_log.next_entry, | |
439 | capacity, mode); | |
440 | ||
a9e1cb6a WYG |
441 | priv->event_log.non_wraps_count++; |
442 | } else { | |
98d4bf0c | 443 | if (num_wraps - priv->event_log.num_wraps > 1) |
a9e1cb6a WYG |
444 | priv->event_log.wraps_more_count++; |
445 | else | |
446 | priv->event_log.wraps_once_count++; | |
98d4bf0c | 447 | |
68e8dfda | 448 | trace_iwlwifi_dev_ucode_wrap_event(priv->trans->dev, |
a9e1cb6a WYG |
449 | num_wraps - priv->event_log.num_wraps, |
450 | next_entry, priv->event_log.next_entry); | |
98d4bf0c | 451 | |
a9e1cb6a | 452 | if (next_entry < priv->event_log.next_entry) { |
98d4bf0c JB |
453 | iwl_print_cont_event_trace( |
454 | priv, base, priv->event_log.next_entry, | |
455 | capacity - priv->event_log.next_entry, | |
456 | capacity, mode); | |
a9e1cb6a | 457 | |
98d4bf0c JB |
458 | iwl_print_cont_event_trace( |
459 | priv, base, 0, next_entry, capacity, mode); | |
a9e1cb6a | 460 | } else { |
98d4bf0c JB |
461 | iwl_print_cont_event_trace( |
462 | priv, base, next_entry, | |
463 | capacity - next_entry, | |
464 | capacity, mode); | |
a9e1cb6a | 465 | |
98d4bf0c JB |
466 | iwl_print_cont_event_trace( |
467 | priv, base, 0, next_entry, capacity, mode); | |
a9e1cb6a WYG |
468 | } |
469 | } | |
98d4bf0c | 470 | |
a9e1cb6a WYG |
471 | priv->event_log.num_wraps = num_wraps; |
472 | priv->event_log.next_entry = next_entry; | |
473 | } | |
474 | ||
475 | /** | |
476 | * iwl_bg_ucode_trace - Timer callback to log ucode event | |
477 | * | |
478 | * The timer is continually set to execute every | |
479 | * UCODE_TRACE_PERIOD milliseconds after the last timer expired | |
480 | * this function is to perform continuous uCode event logging operation | |
481 | * if enabled | |
482 | */ | |
483 | static void iwl_bg_ucode_trace(unsigned long data) | |
484 | { | |
485 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
486 | ||
83626404 | 487 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
a9e1cb6a WYG |
488 | return; |
489 | ||
490 | if (priv->event_log.ucode_trace) { | |
491 | iwl_continuous_event_trace(priv); | |
492 | /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */ | |
493 | mod_timer(&priv->ucode_trace, | |
494 | jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD)); | |
495 | } | |
496 | } | |
497 | ||
65550636 WYG |
498 | static void iwl_bg_tx_flush(struct work_struct *work) |
499 | { | |
500 | struct iwl_priv *priv = | |
501 | container_of(work, struct iwl_priv, tx_flush); | |
502 | ||
83626404 | 503 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
65550636 WYG |
504 | return; |
505 | ||
506 | /* do nothing if rf-kill is on */ | |
83626404 | 507 | if (!iwl_is_ready_rf(priv)) |
65550636 WYG |
508 | return; |
509 | ||
c68744fb | 510 | IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n"); |
a4dece9a | 511 | iwlagn_dev_txfifo_flush(priv); |
65550636 WYG |
512 | } |
513 | ||
9eae88fa JB |
514 | /* |
515 | * queue/FIFO/AC mapping definitions | |
516 | */ | |
517 | ||
9eae88fa JB |
518 | static const u8 iwlagn_bss_ac_to_fifo[] = { |
519 | IWL_TX_FIFO_VO, | |
520 | IWL_TX_FIFO_VI, | |
521 | IWL_TX_FIFO_BE, | |
522 | IWL_TX_FIFO_BK, | |
523 | }; | |
524 | ||
525 | static const u8 iwlagn_bss_ac_to_queue[] = { | |
526 | 0, 1, 2, 3, | |
527 | }; | |
528 | ||
529 | static const u8 iwlagn_pan_ac_to_fifo[] = { | |
530 | IWL_TX_FIFO_VO_IPAN, | |
531 | IWL_TX_FIFO_VI_IPAN, | |
532 | IWL_TX_FIFO_BE_IPAN, | |
533 | IWL_TX_FIFO_BK_IPAN, | |
534 | }; | |
535 | ||
536 | static const u8 iwlagn_pan_ac_to_queue[] = { | |
537 | 7, 6, 5, 4, | |
538 | }; | |
539 | ||
aca86268 | 540 | static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags) |
4d2a5d0e | 541 | { |
4d2a5d0e JB |
542 | int i; |
543 | ||
544 | /* | |
545 | * The default context is always valid, | |
546 | * the PAN context depends on uCode. | |
547 | */ | |
a18f61bc | 548 | priv->valid_contexts = BIT(IWL_RXON_CTX_BSS); |
4d2a5d0e | 549 | if (ucode_flags & IWL_UCODE_TLV_FLAGS_PAN) |
a18f61bc | 550 | priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN); |
4d2a5d0e JB |
551 | |
552 | for (i = 0; i < NUM_IWL_RXON_CTX; i++) | |
553 | priv->contexts[i].ctxid = i; | |
554 | ||
555 | priv->contexts[IWL_RXON_CTX_BSS].always_active = true; | |
556 | priv->contexts[IWL_RXON_CTX_BSS].is_active = true; | |
557 | priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON; | |
558 | priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING; | |
559 | priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC; | |
560 | priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM; | |
561 | priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID; | |
562 | priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY; | |
87272af7 | 563 | priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID; |
4d2a5d0e | 564 | priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes = |
57897726 | 565 | BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_MONITOR); |
4d2a5d0e JB |
566 | priv->contexts[IWL_RXON_CTX_BSS].interface_modes = |
567 | BIT(NL80211_IFTYPE_STATION); | |
568 | priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP; | |
569 | priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS; | |
570 | priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS; | |
571 | priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS; | |
9eae88fa JB |
572 | memcpy(priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue, |
573 | iwlagn_bss_ac_to_queue, sizeof(iwlagn_bss_ac_to_queue)); | |
574 | memcpy(priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo, | |
575 | iwlagn_bss_ac_to_fifo, sizeof(iwlagn_bss_ac_to_fifo)); | |
4d2a5d0e JB |
576 | |
577 | priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON; | |
578 | priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = | |
579 | REPLY_WIPAN_RXON_TIMING; | |
580 | priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = | |
581 | REPLY_WIPAN_RXON_ASSOC; | |
582 | priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM; | |
583 | priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN; | |
584 | priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY; | |
585 | priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID; | |
586 | priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION; | |
4d2a5d0e JB |
587 | priv->contexts[IWL_RXON_CTX_PAN].interface_modes = |
588 | BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP); | |
c6baf7fb | 589 | |
4d2a5d0e JB |
590 | priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP; |
591 | priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA; | |
592 | priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P; | |
9eae88fa JB |
593 | memcpy(priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue, |
594 | iwlagn_pan_ac_to_queue, sizeof(iwlagn_pan_ac_to_queue)); | |
595 | memcpy(priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo, | |
596 | iwlagn_pan_ac_to_fifo, sizeof(iwlagn_pan_ac_to_fifo)); | |
597 | priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE; | |
4d2a5d0e JB |
598 | |
599 | BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2); | |
600 | } | |
601 | ||
aca86268 | 602 | static void iwl_rf_kill_ct_config(struct iwl_priv *priv) |
0975cc8f WYG |
603 | { |
604 | struct iwl_ct_kill_config cmd; | |
605 | struct iwl_ct_kill_throttling_config adv_cmd; | |
0975cc8f WYG |
606 | int ret = 0; |
607 | ||
68e8dfda | 608 | iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR, |
0975cc8f | 609 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
08ae86ac | 610 | |
0975cc8f WYG |
611 | priv->thermal_throttle.ct_kill_toggle = false; |
612 | ||
0d8877a1 | 613 | if (priv->lib->support_ct_kill_exit) { |
0975cc8f | 614 | adv_cmd.critical_temperature_enter = |
9e295116 | 615 | cpu_to_le32(priv->hw_params.ct_kill_threshold); |
0975cc8f | 616 | adv_cmd.critical_temperature_exit = |
9e295116 | 617 | cpu_to_le32(priv->hw_params.ct_kill_exit_threshold); |
0975cc8f | 618 | |
e10a0533 | 619 | ret = iwl_dvm_send_cmd_pdu(priv, |
e419d62d EG |
620 | REPLY_CT_KILL_CONFIG_CMD, |
621 | CMD_SYNC, sizeof(adv_cmd), &adv_cmd); | |
0975cc8f WYG |
622 | if (ret) |
623 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); | |
624 | else | |
625 | IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " | |
d6189124 EG |
626 | "succeeded, critical temperature enter is %d," |
627 | "exit is %d\n", | |
9e295116 JB |
628 | priv->hw_params.ct_kill_threshold, |
629 | priv->hw_params.ct_kill_exit_threshold); | |
0975cc8f WYG |
630 | } else { |
631 | cmd.critical_temperature_R = | |
9e295116 | 632 | cpu_to_le32(priv->hw_params.ct_kill_threshold); |
0975cc8f | 633 | |
e10a0533 | 634 | ret = iwl_dvm_send_cmd_pdu(priv, |
e419d62d EG |
635 | REPLY_CT_KILL_CONFIG_CMD, |
636 | CMD_SYNC, sizeof(cmd), &cmd); | |
0975cc8f WYG |
637 | if (ret) |
638 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); | |
639 | else | |
640 | IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " | |
d6189124 EG |
641 | "succeeded, " |
642 | "critical temperature is %d\n", | |
9e295116 | 643 | priv->hw_params.ct_kill_threshold); |
0975cc8f WYG |
644 | } |
645 | } | |
646 | ||
6d6a1afd SZ |
647 | static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg) |
648 | { | |
649 | struct iwl_calib_cfg_cmd calib_cfg_cmd; | |
650 | struct iwl_host_cmd cmd = { | |
651 | .id = CALIBRATION_CFG_CMD, | |
3fa50738 JB |
652 | .len = { sizeof(struct iwl_calib_cfg_cmd), }, |
653 | .data = { &calib_cfg_cmd, }, | |
6d6a1afd SZ |
654 | }; |
655 | ||
656 | memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd)); | |
af4dc88c | 657 | calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_RT_CFG_ALL; |
7cb1b088 | 658 | calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg); |
6d6a1afd | 659 | |
e10a0533 | 660 | return iwl_dvm_send_cmd(priv, &cmd); |
6d6a1afd SZ |
661 | } |
662 | ||
663 | ||
e505c433 WYG |
664 | static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant) |
665 | { | |
666 | struct iwl_tx_ant_config_cmd tx_ant_cmd = { | |
667 | .valid = cpu_to_le32(valid_tx_ant), | |
668 | }; | |
669 | ||
0692fe41 | 670 | if (IWL_UCODE_API(priv->fw->ucode_ver) > 1) { |
e505c433 | 671 | IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant); |
e10a0533 | 672 | return iwl_dvm_send_cmd_pdu(priv, |
e505c433 WYG |
673 | TX_ANT_CONFIGURATION_CMD, |
674 | CMD_SYNC, | |
675 | sizeof(struct iwl_tx_ant_config_cmd), | |
676 | &tx_ant_cmd); | |
677 | } else { | |
678 | IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n"); | |
679 | return -EOPNOTSUPP; | |
680 | } | |
681 | } | |
682 | ||
aca86268 | 683 | static void iwl_send_bt_config(struct iwl_priv *priv) |
e4c52ab4 MV |
684 | { |
685 | struct iwl_bt_cmd bt_cmd = { | |
686 | .lead_time = BT_LEAD_TIME_DEF, | |
687 | .max_kill = BT_MAX_KILL_DEF, | |
688 | .kill_ack_mask = 0, | |
689 | .kill_cts_mask = 0, | |
690 | }; | |
691 | ||
65de7e84 | 692 | if (!iwlwifi_mod_params.bt_coex_active) |
e4c52ab4 MV |
693 | bt_cmd.flags = BT_COEX_DISABLE; |
694 | else | |
695 | bt_cmd.flags = BT_COEX_ENABLE; | |
696 | ||
697 | priv->bt_enable_flag = bt_cmd.flags; | |
698 | IWL_DEBUG_INFO(priv, "BT coex %s\n", | |
699 | (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active"); | |
700 | ||
701 | if (iwl_dvm_send_cmd_pdu(priv, REPLY_BT_CONFIG, | |
702 | CMD_SYNC, sizeof(struct iwl_bt_cmd), &bt_cmd)) | |
703 | IWL_ERR(priv, "failed to send BT Coex Config\n"); | |
704 | } | |
705 | ||
b481de9c | 706 | /** |
4a4a9e81 | 707 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 708 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 709 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 710 | */ |
4613e72d | 711 | int iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 712 | { |
57aab75a | 713 | int ret = 0; |
246ed355 | 714 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; |
b481de9c | 715 | |
ca7966c8 | 716 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); |
6d6a1afd | 717 | |
5b9f8cd3 | 718 | /* After the ALIVE response, we can send host commands to the uCode */ |
83626404 | 719 | set_bit(STATUS_ALIVE, &priv->status); |
b481de9c | 720 | |
83626404 | 721 | if (iwl_is_rfkill(priv)) |
ca7966c8 | 722 | return -ERFKILL; |
b481de9c | 723 | |
98d4bf0c JB |
724 | if (priv->event_log.ucode_trace) { |
725 | /* start collecting data now */ | |
726 | mod_timer(&priv->ucode_trace, jiffies); | |
727 | } | |
728 | ||
bc795df1 | 729 | /* download priority table before any calibration request */ |
0d8877a1 JB |
730 | if (priv->lib->bt_params && |
731 | priv->lib->bt_params->advanced_bt_coexist) { | |
f7322f8f | 732 | /* Configure Bluetooth device coexistence support */ |
0d8877a1 | 733 | if (priv->lib->bt_params->bt_sco_disable) |
207ecc5e MV |
734 | priv->bt_enable_pspoll = false; |
735 | else | |
736 | priv->bt_enable_pspoll = true; | |
737 | ||
f7322f8f WYG |
738 | priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK; |
739 | priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT; | |
740 | priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT; | |
e55b517c | 741 | iwlagn_send_advance_bt_config(priv); |
f7322f8f | 742 | priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS; |
207ecc5e MV |
743 | priv->cur_rssi_ctx = NULL; |
744 | ||
e1991885 | 745 | iwl_send_prio_tbl(priv); |
f7322f8f WYG |
746 | |
747 | /* FIXME: w/a to force change uCode BT state machine */ | |
e1991885 | 748 | ret = iwl_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN, |
ca7966c8 JB |
749 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); |
750 | if (ret) | |
751 | return ret; | |
e1991885 | 752 | ret = iwl_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE, |
ca7966c8 JB |
753 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); |
754 | if (ret) | |
755 | return ret; | |
707aee40 | 756 | } else if (priv->lib->bt_params) { |
e55b517c WYG |
757 | /* |
758 | * default is 2-wire BT coexexistence support | |
759 | */ | |
760 | iwl_send_bt_config(priv); | |
f7322f8f | 761 | } |
e55b517c | 762 | |
885765f1 VM |
763 | /* |
764 | * Perform runtime calibrations, including DC calibration. | |
765 | */ | |
766 | iwlagn_send_calib_cfg_rt(priv, IWL_CALIB_CFG_DC_IDX); | |
bc795df1 | 767 | |
36d6825b | 768 | ieee80211_wake_queues(priv->hw); |
b481de9c | 769 | |
2f748dec | 770 | /* Configure Tx antenna selection based on H/W config */ |
b7998c8b | 771 | iwlagn_send_tx_ant_config(priv, priv->nvm_data->valid_tx_ant); |
2f748dec | 772 | |
15b86bff | 773 | if (iwl_is_associated_ctx(ctx) && !priv->wowlan) { |
c1adf9fb | 774 | struct iwl_rxon_cmd *active_rxon = |
246ed355 | 775 | (struct iwl_rxon_cmd *)&ctx->active; |
019fb97d | 776 | /* apply any changes in staging */ |
246ed355 | 777 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
b481de9c ZY |
778 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
779 | } else { | |
d0fe478c | 780 | struct iwl_rxon_context *tmp; |
b481de9c | 781 | /* Initialize our rx_config data */ |
d0fe478c JB |
782 | for_each_context(priv, tmp) |
783 | iwl_connection_init_rx_config(priv, tmp); | |
45823531 | 784 | |
e3f10cea | 785 | iwlagn_set_rxon_chain(priv, ctx); |
b481de9c ZY |
786 | } |
787 | ||
15b86bff | 788 | if (!priv->wowlan) { |
c8ac61cf JB |
789 | /* WoWLAN ucode will not reply in the same way, skip it */ |
790 | iwl_reset_run_time_calib(priv); | |
791 | } | |
4a4a9e81 | 792 | |
83626404 | 793 | set_bit(STATUS_READY, &priv->status); |
9e2e7422 | 794 | |
b481de9c | 795 | /* Configure the adapter for unassociated operation */ |
805a3b81 | 796 | ret = iwlagn_commit_rxon(priv, ctx); |
ca7966c8 JB |
797 | if (ret) |
798 | return ret; | |
b481de9c ZY |
799 | |
800 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 801 | iwl_rf_kill_ct_config(priv); |
5a66926a | 802 | |
e1623446 | 803 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); |
c46fbefa | 804 | |
ca7966c8 | 805 | return iwl_power_update_mode(priv, true); |
b481de9c ZY |
806 | } |
807 | ||
d316383d JB |
808 | /** |
809 | * iwl_clear_driver_stations - clear knowledge of all stations from driver | |
810 | * @priv: iwl priv struct | |
811 | * | |
812 | * This is called during iwl_down() to make sure that in the case | |
813 | * we're coming there from a hardware restart mac80211 will be | |
814 | * able to reconfigure stations -- if we're getting there in the | |
815 | * normal down flow then the stations will already be cleared. | |
816 | */ | |
817 | static void iwl_clear_driver_stations(struct iwl_priv *priv) | |
818 | { | |
d316383d JB |
819 | struct iwl_rxon_context *ctx; |
820 | ||
fa23cb04 | 821 | spin_lock_bh(&priv->sta_lock); |
d316383d JB |
822 | memset(priv->stations, 0, sizeof(priv->stations)); |
823 | priv->num_stations = 0; | |
824 | ||
825 | priv->ucode_key_table = 0; | |
826 | ||
827 | for_each_context(priv, ctx) { | |
828 | /* | |
829 | * Remove all key information that is not stored as part | |
830 | * of station information since mac80211 may not have had | |
831 | * a chance to remove all the keys. When device is | |
832 | * reconfigured by mac80211 after an error all keys will | |
833 | * be reconfigured. | |
834 | */ | |
835 | memset(ctx->wep_keys, 0, sizeof(ctx->wep_keys)); | |
836 | ctx->key_mapping_keys = 0; | |
837 | } | |
838 | ||
fa23cb04 | 839 | spin_unlock_bh(&priv->sta_lock); |
d316383d JB |
840 | } |
841 | ||
78e5a464 | 842 | void iwl_down(struct iwl_priv *priv) |
b481de9c | 843 | { |
22dd2fd2 | 844 | int exit_pending; |
b481de9c | 845 | |
e1623446 | 846 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); |
b481de9c | 847 | |
b1eea297 | 848 | lockdep_assert_held(&priv->mutex); |
78e5a464 | 849 | |
d745d472 SG |
850 | iwl_scan_cancel_timeout(priv, 200); |
851 | ||
63013ae3 | 852 | exit_pending = |
83626404 | 853 | test_and_set_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c | 854 | |
dcef732c | 855 | iwl_clear_ucode_stations(priv, NULL); |
a194e324 | 856 | iwl_dealloc_bcast_stations(priv); |
db125c78 | 857 | iwl_clear_driver_stations(priv); |
b481de9c | 858 | |
a1174138 | 859 | /* reset BT coex data */ |
da5dbb97 | 860 | priv->bt_status = 0; |
207ecc5e MV |
861 | priv->cur_rssi_ctx = NULL; |
862 | priv->bt_is_sco = 0; | |
0d8877a1 | 863 | if (priv->lib->bt_params) |
7cb1b088 | 864 | priv->bt_traffic_load = |
0d8877a1 | 865 | priv->lib->bt_params->bt_init_traffic_load; |
7cb1b088 WYG |
866 | else |
867 | priv->bt_traffic_load = 0; | |
bee008b7 WYG |
868 | priv->bt_full_concurrent = false; |
869 | priv->bt_ci_compliance = 0; | |
a1174138 | 870 | |
b481de9c ZY |
871 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
872 | * exiting the module */ | |
873 | if (!exit_pending) | |
83626404 | 874 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c | 875 | |
859cfb0a | 876 | if (priv->mac80211_registered) |
b481de9c ZY |
877 | ieee80211_stop_queues(priv->hw); |
878 | ||
8f7ffbe2 | 879 | priv->ucode_loaded = false; |
68e8dfda | 880 | iwl_trans_stop_device(priv->trans); |
909e9b23 | 881 | |
622a9268 IP |
882 | /* Set num_aux_in_flight must be done after the transport is stopped */ |
883 | atomic_set(&priv->num_aux_in_flight, 0); | |
884 | ||
1a10f433 | 885 | /* Clear out all status bits but a few that are stable across reset */ |
1353a7ba | 886 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << |
b481de9c | 887 | STATUS_RF_KILL_HW | |
17acd0b6 DF |
888 | test_bit(STATUS_FW_ERROR, &priv->status) << |
889 | STATUS_FW_ERROR | | |
83626404 | 890 | test_bit(STATUS_EXIT_PENDING, &priv->status) << |
052ec3f1 | 891 | STATUS_EXIT_PENDING; |
b481de9c | 892 | |
77834543 | 893 | dev_kfree_skb(priv->beacon_skb); |
12e934dc | 894 | priv->beacon_skb = NULL; |
b481de9c ZY |
895 | } |
896 | ||
b481de9c ZY |
897 | /***************************************************************************** |
898 | * | |
899 | * Workqueue callbacks | |
900 | * | |
901 | *****************************************************************************/ | |
902 | ||
16e727e8 EG |
903 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
904 | { | |
905 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
906 | run_time_calib_work); | |
907 | ||
b1eea297 | 908 | mutex_lock(&priv->mutex); |
16e727e8 | 909 | |
83626404 DF |
910 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || |
911 | test_bit(STATUS_SCANNING, &priv->status)) { | |
b1eea297 | 912 | mutex_unlock(&priv->mutex); |
16e727e8 EG |
913 | return; |
914 | } | |
915 | ||
916 | if (priv->start_calib) { | |
0da0e5bf JB |
917 | iwl_chain_noise_calibration(priv); |
918 | iwl_sensitivity_calibration(priv); | |
16e727e8 EG |
919 | } |
920 | ||
b1eea297 | 921 | mutex_unlock(&priv->mutex); |
16e727e8 EG |
922 | } |
923 | ||
7335613a | 924 | void iwlagn_prepare_restart(struct iwl_priv *priv) |
e43e85c4 | 925 | { |
e43e85c4 JB |
926 | bool bt_full_concurrent; |
927 | u8 bt_ci_compliance; | |
928 | u8 bt_load; | |
929 | u8 bt_status; | |
207ecc5e | 930 | bool bt_is_sco; |
9eae88fa | 931 | int i; |
e43e85c4 | 932 | |
b1eea297 | 933 | lockdep_assert_held(&priv->mutex); |
e43e85c4 | 934 | |
e43e85c4 JB |
935 | priv->is_open = 0; |
936 | ||
937 | /* | |
938 | * __iwl_down() will clear the BT status variables, | |
939 | * which is correct, but when we restart we really | |
940 | * want to keep them so restore them afterwards. | |
941 | * | |
942 | * The restart process will later pick them up and | |
943 | * re-configure the hw when we reconfigure the BT | |
944 | * command. | |
945 | */ | |
946 | bt_full_concurrent = priv->bt_full_concurrent; | |
947 | bt_ci_compliance = priv->bt_ci_compliance; | |
948 | bt_load = priv->bt_traffic_load; | |
949 | bt_status = priv->bt_status; | |
207ecc5e | 950 | bt_is_sco = priv->bt_is_sco; |
e43e85c4 | 951 | |
78e5a464 | 952 | iwl_down(priv); |
e43e85c4 JB |
953 | |
954 | priv->bt_full_concurrent = bt_full_concurrent; | |
955 | priv->bt_ci_compliance = bt_ci_compliance; | |
956 | priv->bt_traffic_load = bt_load; | |
957 | priv->bt_status = bt_status; | |
207ecc5e | 958 | priv->bt_is_sco = bt_is_sco; |
9eae88fa | 959 | |
1479177b | 960 | /* reset aggregation queues */ |
9eae88fa | 961 | for (i = IWLAGN_FIRST_AMPDU_QUEUE; i < IWL_MAX_HW_QUEUES; i++) |
1479177b JB |
962 | priv->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE; |
963 | /* and stop counts */ | |
964 | for (i = 0; i < IWL_MAX_HW_QUEUES; i++) | |
965 | atomic_set(&priv->queue_stop_count[i], 0); | |
9eae88fa JB |
966 | |
967 | memset(priv->agg_q_alloc, 0, sizeof(priv->agg_q_alloc)); | |
e43e85c4 JB |
968 | } |
969 | ||
5b9f8cd3 | 970 | static void iwl_bg_restart(struct work_struct *data) |
b481de9c | 971 | { |
c79dd5b5 | 972 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c | 973 | |
83626404 | 974 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
975 | return; |
976 | ||
17acd0b6 | 977 | if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) { |
b1eea297 | 978 | mutex_lock(&priv->mutex); |
e43e85c4 | 979 | iwlagn_prepare_restart(priv); |
b1eea297 | 980 | mutex_unlock(&priv->mutex); |
a1174138 | 981 | iwl_cancel_deferred_work(priv); |
40503f7b AB |
982 | if (priv->mac80211_registered) |
983 | ieee80211_restart_hw(priv->hw); | |
984 | else | |
985 | IWL_ERR(priv, | |
986 | "Cannot request restart before registrating with mac80211"); | |
19cc1087 | 987 | } else { |
ca7966c8 | 988 | WARN_ON(1); |
19cc1087 | 989 | } |
b481de9c ZY |
990 | } |
991 | ||
7335613a WYG |
992 | /***************************************************************************** |
993 | * | |
994 | * driver setup and teardown | |
995 | * | |
996 | *****************************************************************************/ | |
997 | ||
aca86268 | 998 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c | 999 | { |
1ee158d8 | 1000 | priv->workqueue = create_singlethread_workqueue(DRV_NAME); |
b481de9c | 1001 | |
7335613a WYG |
1002 | INIT_WORK(&priv->restart, iwl_bg_restart); |
1003 | INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); | |
1004 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); | |
1005 | INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush); | |
1006 | INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency); | |
1007 | INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config); | |
e655b9f0 | 1008 | |
7335613a | 1009 | iwl_setup_scan_deferred_work(priv); |
5a66926a | 1010 | |
0d8877a1 | 1011 | if (priv->lib->bt_params) |
562f08eb | 1012 | iwlagn_bt_setup_deferred_work(priv); |
5a66926a | 1013 | |
7335613a WYG |
1014 | init_timer(&priv->statistics_periodic); |
1015 | priv->statistics_periodic.data = (unsigned long)priv; | |
1016 | priv->statistics_periodic.function = iwl_bg_statistics_periodic; | |
6cd0b1cb | 1017 | |
7335613a WYG |
1018 | init_timer(&priv->ucode_trace); |
1019 | priv->ucode_trace.data = (unsigned long)priv; | |
1020 | priv->ucode_trace.function = iwl_bg_ucode_trace; | |
b481de9c ZY |
1021 | } |
1022 | ||
78e5a464 | 1023 | void iwl_cancel_deferred_work(struct iwl_priv *priv) |
c8ac61cf | 1024 | { |
0d8877a1 | 1025 | if (priv->lib->bt_params) |
562f08eb | 1026 | iwlagn_bt_cancel_deferred_work(priv); |
c8ac61cf | 1027 | |
7335613a WYG |
1028 | cancel_work_sync(&priv->run_time_calib_work); |
1029 | cancel_work_sync(&priv->beacon_update); | |
c8ac61cf | 1030 | |
7335613a | 1031 | iwl_cancel_scan_deferred_work(priv); |
c8ac61cf | 1032 | |
7335613a WYG |
1033 | cancel_work_sync(&priv->bt_full_concurrency); |
1034 | cancel_work_sync(&priv->bt_runtime_config); | |
c8ac61cf | 1035 | |
7335613a WYG |
1036 | del_timer_sync(&priv->statistics_periodic); |
1037 | del_timer_sync(&priv->ucode_trace); | |
1038 | } | |
c8ac61cf | 1039 | |
aca86268 | 1040 | static int iwl_init_drv(struct iwl_priv *priv) |
c8ac61cf | 1041 | { |
fa23cb04 | 1042 | spin_lock_init(&priv->sta_lock); |
c8ac61cf | 1043 | |
b1eea297 | 1044 | mutex_init(&priv->mutex); |
c8ac61cf | 1045 | |
e1991885 | 1046 | INIT_LIST_HEAD(&priv->calib_results); |
80e83da7 | 1047 | |
7335613a | 1048 | priv->band = IEEE80211_BAND_2GHZ; |
c8ac61cf | 1049 | |
0d8877a1 | 1050 | priv->plcp_delta_threshold = priv->lib->plcp_delta_threshold; |
ab5c0f1f | 1051 | |
7335613a WYG |
1052 | priv->iw_mode = NL80211_IFTYPE_STATION; |
1053 | priv->current_ht_config.smps = IEEE80211_SMPS_STATIC; | |
1054 | priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF; | |
1055 | priv->agg_tids_count = 0; | |
c8ac61cf | 1056 | |
7335613a | 1057 | priv->rx_statistics_jiffies = jiffies; |
c8ac61cf | 1058 | |
7335613a WYG |
1059 | /* Choose which receivers/antennas to use */ |
1060 | iwlagn_set_rxon_chain(priv, &priv->contexts[IWL_RXON_CTX_BSS]); | |
c8ac61cf | 1061 | |
7335613a | 1062 | iwl_init_scan_params(priv); |
c8ac61cf | 1063 | |
7335613a | 1064 | /* init bt coex */ |
0d8877a1 JB |
1065 | if (priv->lib->bt_params && |
1066 | priv->lib->bt_params->advanced_bt_coexist) { | |
7335613a WYG |
1067 | priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT; |
1068 | priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT; | |
1069 | priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK; | |
1070 | priv->bt_on_thresh = BT_ON_THRESHOLD_DEF; | |
1071 | priv->bt_duration = BT_DURATION_LIMIT_DEF; | |
1072 | priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; | |
1073 | } | |
c8ac61cf | 1074 | |
7335613a | 1075 | return 0; |
7335613a | 1076 | } |
c8ac61cf | 1077 | |
aca86268 | 1078 | static void iwl_uninit_drv(struct iwl_priv *priv) |
7335613a | 1079 | { |
7335613a WYG |
1080 | kfree(priv->scan_cmd); |
1081 | kfree(priv->beacon_cmd); | |
1082 | kfree(rcu_dereference_raw(priv->noa_data)); | |
e1991885 | 1083 | iwl_calib_free_results(priv); |
7335613a WYG |
1084 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1085 | kfree(priv->wowlan_sram); | |
1086 | #endif | |
1087 | } | |
c8ac61cf | 1088 | |
aca86268 | 1089 | static void iwl_set_hw_params(struct iwl_priv *priv) |
07d4f1ad | 1090 | { |
2152268f | 1091 | if (priv->cfg->ht_params) |
9e295116 | 1092 | priv->hw_params.use_rts_for_aggregation = |
2152268f | 1093 | priv->cfg->ht_params->use_rts_for_aggregation; |
b9ad70da | 1094 | |
07d4f1ad | 1095 | /* Device-specific setup */ |
e9676695 | 1096 | priv->lib->set_hw_params(priv); |
07d4f1ad WYG |
1097 | } |
1098 | ||
119ea186 | 1099 | |
119ea186 | 1100 | |
07d3c15a | 1101 | /* show what optional capabilities we have */ |
aca86268 | 1102 | static void iwl_option_config(struct iwl_priv *priv) |
ebfa867d | 1103 | { |
ebfa867d | 1104 | #ifdef CONFIG_IWLWIFI_DEBUG |
07d3c15a | 1105 | IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUG enabled\n"); |
ebfa867d | 1106 | #else |
07d3c15a | 1107 | IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUG disabled\n"); |
ebfa867d | 1108 | #endif |
07d3c15a | 1109 | |
ebfa867d | 1110 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
07d3c15a | 1111 | IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUGFS enabled\n"); |
ebfa867d | 1112 | #else |
07d3c15a | 1113 | IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUGFS disabled\n"); |
ebfa867d | 1114 | #endif |
07d3c15a | 1115 | |
ebfa867d | 1116 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING |
07d3c15a | 1117 | IWL_INFO(priv, "CONFIG_IWLWIFI_DEVICE_TRACING enabled\n"); |
ebfa867d | 1118 | #else |
07d3c15a | 1119 | IWL_INFO(priv, "CONFIG_IWLWIFI_DEVICE_TRACING disabled\n"); |
ebfa867d | 1120 | #endif |
ebfa867d WYG |
1121 | } |
1122 | ||
26a7ca9a JB |
1123 | static int iwl_eeprom_init_hw_params(struct iwl_priv *priv) |
1124 | { | |
b7998c8b EL |
1125 | struct iwl_nvm_data *data = priv->nvm_data; |
1126 | char *debug_msg; | |
1127 | ||
1128 | if (data->sku_cap_11n_enable && | |
26a7ca9a JB |
1129 | !priv->cfg->ht_params) { |
1130 | IWL_ERR(priv, "Invalid 11n configuration\n"); | |
1131 | return -EINVAL; | |
1132 | } | |
1133 | ||
b7998c8b EL |
1134 | if (!data->sku_cap_11n_enable && !data->sku_cap_band_24GHz_enable && |
1135 | !data->sku_cap_band_52GHz_enable) { | |
26a7ca9a JB |
1136 | IWL_ERR(priv, "Invalid device sku\n"); |
1137 | return -EINVAL; | |
1138 | } | |
1139 | ||
b7998c8b EL |
1140 | debug_msg = "Device SKU: 24GHz %s %s, 52GHz %s %s, 11.n %s %s\n"; |
1141 | IWL_DEBUG_INFO(priv, debug_msg, | |
1142 | data->sku_cap_band_24GHz_enable ? "" : "NOT", "enabled", | |
1143 | data->sku_cap_band_52GHz_enable ? "" : "NOT", "enabled", | |
1144 | data->sku_cap_11n_enable ? "" : "NOT", "enabled"); | |
26a7ca9a | 1145 | |
26a7ca9a | 1146 | priv->hw_params.tx_chains_num = |
b7998c8b | 1147 | num_of_ant(data->valid_tx_ant); |
26a7ca9a JB |
1148 | if (priv->cfg->rx_with_siso_diversity) |
1149 | priv->hw_params.rx_chains_num = 1; | |
1150 | else | |
1151 | priv->hw_params.rx_chains_num = | |
b7998c8b | 1152 | num_of_ant(data->valid_rx_ant); |
26a7ca9a | 1153 | |
468b4bf3 | 1154 | IWL_DEBUG_INFO(priv, "Valid Tx ant: 0x%X, Valid Rx ant: 0x%X\n", |
b7998c8b EL |
1155 | data->valid_tx_ant, |
1156 | data->valid_rx_ant); | |
26a7ca9a JB |
1157 | |
1158 | return 0; | |
1159 | } | |
1160 | ||
0692fe41 | 1161 | static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans, |
2152268f | 1162 | const struct iwl_cfg *cfg, |
9da987ac MV |
1163 | const struct iwl_fw *fw, |
1164 | struct dentry *dbgfs_dir) | |
b2ea345e | 1165 | { |
b2ea345e WYG |
1166 | struct iwl_priv *priv; |
1167 | struct ieee80211_hw *hw; | |
d0f76d68 | 1168 | struct iwl_op_mode *op_mode; |
084dd791 | 1169 | u16 num_mac; |
a78be210 | 1170 | u32 ucode_flags; |
e7332691 | 1171 | struct iwl_trans_config trans_cfg = {}; |
d663ee73 JB |
1172 | static const u8 no_reclaim_cmds[] = { |
1173 | REPLY_RX_PHY_CMD, | |
d663ee73 JB |
1174 | REPLY_RX_MPDU_CMD, |
1175 | REPLY_COMPRESSED_BA, | |
1176 | STATISTICS_NOTIFICATION, | |
1177 | REPLY_TX, | |
1178 | }; | |
9eae88fa | 1179 | int i; |
b2ea345e WYG |
1180 | |
1181 | /************************ | |
1182 | * 1. Allocating HW data | |
1183 | ************************/ | |
fa06ec79 | 1184 | hw = iwl_alloc_all(); |
b2ea345e | 1185 | if (!hw) { |
2152268f | 1186 | pr_err("%s: Cannot allocate network device\n", cfg->name); |
807caf26 EG |
1187 | goto out; |
1188 | } | |
1189 | ||
d0f76d68 EG |
1190 | op_mode = hw->priv; |
1191 | op_mode->ops = &iwl_dvm_ops; | |
1192 | priv = IWL_OP_MODE_GET_DVM(op_mode); | |
68e8dfda | 1193 | priv->trans = trans; |
4b9844f5 | 1194 | priv->dev = trans->dev; |
2152268f | 1195 | priv->cfg = cfg; |
0692fe41 | 1196 | priv->fw = fw; |
a48709c5 | 1197 | |
2152268f | 1198 | switch (priv->cfg->device_family) { |
e9676695 JB |
1199 | case IWL_DEVICE_FAMILY_1000: |
1200 | case IWL_DEVICE_FAMILY_100: | |
ee4d5471 | 1201 | priv->lib = &iwl_dvm_1000_cfg; |
e9676695 JB |
1202 | break; |
1203 | case IWL_DEVICE_FAMILY_2000: | |
ee4d5471 | 1204 | priv->lib = &iwl_dvm_2000_cfg; |
e9676695 | 1205 | break; |
0d8877a1 JB |
1206 | case IWL_DEVICE_FAMILY_105: |
1207 | priv->lib = &iwl_dvm_105_cfg; | |
1208 | break; | |
e9676695 JB |
1209 | case IWL_DEVICE_FAMILY_2030: |
1210 | case IWL_DEVICE_FAMILY_135: | |
ee4d5471 | 1211 | priv->lib = &iwl_dvm_2030_cfg; |
e9676695 JB |
1212 | break; |
1213 | case IWL_DEVICE_FAMILY_5000: | |
ee4d5471 | 1214 | priv->lib = &iwl_dvm_5000_cfg; |
e9676695 JB |
1215 | break; |
1216 | case IWL_DEVICE_FAMILY_5150: | |
ee4d5471 | 1217 | priv->lib = &iwl_dvm_5150_cfg; |
e9676695 JB |
1218 | break; |
1219 | case IWL_DEVICE_FAMILY_6000: | |
e9676695 | 1220 | case IWL_DEVICE_FAMILY_6000i: |
0d8877a1 JB |
1221 | priv->lib = &iwl_dvm_6000_cfg; |
1222 | break; | |
1223 | case IWL_DEVICE_FAMILY_6005: | |
1224 | priv->lib = &iwl_dvm_6005_cfg; | |
1225 | break; | |
e9676695 JB |
1226 | case IWL_DEVICE_FAMILY_6050: |
1227 | case IWL_DEVICE_FAMILY_6150: | |
0d8877a1 | 1228 | priv->lib = &iwl_dvm_6050_cfg; |
e9676695 JB |
1229 | break; |
1230 | case IWL_DEVICE_FAMILY_6030: | |
ee4d5471 | 1231 | priv->lib = &iwl_dvm_6030_cfg; |
e9676695 JB |
1232 | break; |
1233 | default: | |
1234 | break; | |
1235 | } | |
1236 | ||
1237 | if (WARN_ON(!priv->lib)) | |
063c5166 | 1238 | goto out_free_hw; |
e9676695 | 1239 | |
3dc420be EG |
1240 | /* |
1241 | * Populate the state variables that the transport layer needs | |
1242 | * to know about. | |
1243 | */ | |
1244 | trans_cfg.op_mode = op_mode; | |
d663ee73 JB |
1245 | trans_cfg.no_reclaim_cmds = no_reclaim_cmds; |
1246 | trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); | |
65de7e84 JB |
1247 | trans_cfg.rx_buf_size_8k = iwlwifi_mod_params.amsdu_size_8K; |
1248 | if (!iwlwifi_mod_params.wd_disable) | |
7c5ba4a8 | 1249 | trans_cfg.queue_watchdog_timeout = |
2152268f | 1250 | priv->cfg->base_params->wd_timeout; |
7c5ba4a8 | 1251 | else |
6de4902e | 1252 | trans_cfg.queue_watchdog_timeout = IWL_WATCHDOG_DISABLED; |
d9fb6465 | 1253 | trans_cfg.command_names = iwl_dvm_cmd_strings; |
b04db9ac | 1254 | trans_cfg.cmd_fifo = IWLAGN_CMD_FIFO_NUM; |
9bdfbfad | 1255 | |
303e56f2 EG |
1256 | WARN_ON(sizeof(priv->transport_queue_stop) * BITS_PER_BYTE < |
1257 | priv->cfg->base_params->num_of_queues); | |
1258 | ||
9bdfbfad MV |
1259 | ucode_flags = fw->ucode_capa.flags; |
1260 | ||
c6f600fc MV |
1261 | if (ucode_flags & IWL_UCODE_TLV_FLAGS_PAN) { |
1262 | priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN; | |
1263 | trans_cfg.cmd_queue = IWL_IPAN_CMD_QUEUE_NUM; | |
1264 | } else { | |
1265 | priv->sta_key_max_num = STA_KEY_MAX_NUM; | |
1266 | trans_cfg.cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM; | |
1267 | } | |
1268 | ||
92d743ae | 1269 | /* Configure transport layer */ |
68e8dfda | 1270 | iwl_trans_configure(priv->trans, &trans_cfg); |
ed277c93 | 1271 | |
f042c2eb JB |
1272 | trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; |
1273 | trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_res_start); | |
1274 | ||
b2ea345e | 1275 | /* At this point both hw and priv are allocated. */ |
8f2d3d2a | 1276 | |
68e8dfda | 1277 | SET_IEEE80211_DEV(priv->hw, priv->trans->dev); |
b481de9c | 1278 | |
07d3c15a | 1279 | iwl_option_config(priv); |
ebfa867d | 1280 | |
e1623446 | 1281 | IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); |
316c30d9 | 1282 | |
bee008b7 WYG |
1283 | /* is antenna coupling more than 35dB ? */ |
1284 | priv->bt_ant_couple_ok = | |
65de7e84 | 1285 | (iwlwifi_mod_params.ant_coupling > |
48f20d35 EG |
1286 | IWL_BT_ANTENNA_COUPLING_THRESHOLD) ? |
1287 | true : false; | |
bee008b7 | 1288 | |
bc53cd49 EG |
1289 | /* bt channel inhibition enabled*/ |
1290 | priv->bt_ch_announce = true; | |
9f28ebc3 WYG |
1291 | IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n", |
1292 | (priv->bt_ch_announce) ? "On" : "Off"); | |
f37837c9 | 1293 | |
731a29b7 | 1294 | /* these spin locks will be used in apm_ops.init and EEPROM access |
a8b50a0a MA |
1295 | * we should init now |
1296 | */ | |
4ff70fcd | 1297 | spin_lock_init(&priv->statistics.lock); |
4843b5a7 | 1298 | |
084dd791 | 1299 | /*********************** |
3dc420be | 1300 | * 2. Read REV register |
084dd791 | 1301 | ***********************/ |
c11362c0 | 1302 | IWL_INFO(priv, "Detected %s, REV=0x%X\n", |
2152268f | 1303 | priv->cfg->name, priv->trans->hw_rev); |
316c30d9 | 1304 | |
68e8dfda | 1305 | if (iwl_trans_start_hw(priv->trans)) |
063c5166 | 1306 | goto out_free_hw; |
1e89cbac | 1307 | |
88f10a17 | 1308 | /* Read the EEPROM */ |
26a7ca9a JB |
1309 | if (iwl_read_eeprom(priv->trans, &priv->eeprom_blob, |
1310 | &priv->eeprom_blob_size)) { | |
15b1687c | 1311 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
063c5166 | 1312 | goto out_free_hw; |
316c30d9 | 1313 | } |
26a7ca9a | 1314 | |
88f10a17 | 1315 | /* Reset chip to save power until we load uCode during "up". */ |
a4082843 | 1316 | iwl_trans_stop_device(priv->trans); |
88f10a17 | 1317 | |
b7998c8b | 1318 | priv->nvm_data = iwl_parse_eeprom_data(priv->trans->dev, priv->cfg, |
26a7ca9a JB |
1319 | priv->eeprom_blob, |
1320 | priv->eeprom_blob_size); | |
b7998c8b | 1321 | if (!priv->nvm_data) |
26a7ca9a JB |
1322 | goto out_free_eeprom_blob; |
1323 | ||
b7998c8b | 1324 | if (iwl_nvm_check_version(priv->nvm_data, priv->trans)) |
c8f16138 | 1325 | goto out_free_eeprom; |
8614f360 | 1326 | |
88f10a17 | 1327 | if (iwl_eeprom_init_hw_params(priv)) |
21a5b3c6 WYG |
1328 | goto out_free_eeprom; |
1329 | ||
02883017 | 1330 | /* extract MAC Address */ |
b7998c8b | 1331 | memcpy(priv->addresses[0].addr, priv->nvm_data->hw_addr, ETH_ALEN); |
c6fa17ed WYG |
1332 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); |
1333 | priv->hw->wiphy->addresses = priv->addresses; | |
1334 | priv->hw->wiphy->n_addresses = 1; | |
b7998c8b | 1335 | num_mac = priv->nvm_data->n_hw_addrs; |
c6fa17ed WYG |
1336 | if (num_mac > 1) { |
1337 | memcpy(priv->addresses[1].addr, priv->addresses[0].addr, | |
1338 | ETH_ALEN); | |
1339 | priv->addresses[1].addr[5]++; | |
1340 | priv->hw->wiphy->n_addresses++; | |
1341 | } | |
316c30d9 | 1342 | |
3dc420be EG |
1343 | /************************ |
1344 | * 4. Setup HW constants | |
1345 | ************************/ | |
1346 | iwl_set_hw_params(priv); | |
1347 | ||
b7998c8b | 1348 | if (!(priv->nvm_data->sku_cap_ipan_enable)) { |
3dc420be EG |
1349 | IWL_DEBUG_INFO(priv, "Your EEPROM disabled PAN"); |
1350 | ucode_flags &= ~IWL_UCODE_TLV_FLAGS_PAN; | |
1351 | /* | |
1352 | * if not PAN, then don't support P2P -- might be a uCode | |
1353 | * packaging bug or due to the eeprom check above | |
1354 | */ | |
3dc420be EG |
1355 | priv->sta_key_max_num = STA_KEY_MAX_NUM; |
1356 | trans_cfg.cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM; | |
1357 | ||
1358 | /* Configure transport layer again*/ | |
68e8dfda | 1359 | iwl_trans_configure(priv->trans, &trans_cfg); |
3dc420be EG |
1360 | } |
1361 | ||
316c30d9 | 1362 | /******************* |
3dc420be | 1363 | * 5. Setup priv |
316c30d9 | 1364 | *******************/ |
9eae88fa | 1365 | for (i = 0; i < IWL_MAX_HW_QUEUES; i++) { |
1479177b JB |
1366 | priv->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE; |
1367 | if (i < IWLAGN_FIRST_AMPDU_QUEUE && | |
1368 | i != IWL_DEFAULT_CMD_QUEUE_NUM && | |
1369 | i != IWL_IPAN_CMD_QUEUE_NUM) | |
1370 | priv->queue_to_mac80211[i] = i; | |
1371 | atomic_set(&priv->queue_stop_count[i], 0); | |
9eae88fa JB |
1372 | } |
1373 | ||
88f10a17 | 1374 | if (iwl_init_drv(priv)) |
399f4900 | 1375 | goto out_free_eeprom; |
88f10a17 | 1376 | |
bf85ea4f | 1377 | /* At this point both hw and priv are initialized. */ |
316c30d9 | 1378 | |
316c30d9 | 1379 | /******************** |
3dc420be | 1380 | * 6. Setup services |
316c30d9 | 1381 | ********************/ |
4e39317d | 1382 | iwl_setup_deferred_work(priv); |
653fa4a0 | 1383 | iwl_setup_rx_handlers(priv); |
316c30d9 | 1384 | |
58d0f361 | 1385 | iwl_power_initialize(priv); |
39b73fb1 | 1386 | iwl_tt_initialize(priv); |
158bea07 | 1387 | |
e211b242 EG |
1388 | snprintf(priv->hw->wiphy->fw_version, |
1389 | sizeof(priv->hw->wiphy->fw_version), | |
1390 | "%s", fw->fw_version); | |
1391 | ||
1392 | priv->new_scan_threshold_behaviour = | |
a78be210 | 1393 | !!(ucode_flags & IWL_UCODE_TLV_FLAGS_NEWSCAN); |
562db532 | 1394 | |
e211b242 EG |
1395 | priv->phy_calib_chain_noise_reset_cmd = |
1396 | fw->ucode_capa.standard_phy_calibration_size; | |
1397 | priv->phy_calib_chain_noise_gain_cmd = | |
1398 | fw->ucode_capa.standard_phy_calibration_size + 1; | |
1399 | ||
1400 | /* initialize all valid contexts */ | |
a78be210 | 1401 | iwl_init_context(priv, ucode_flags); |
e211b242 EG |
1402 | |
1403 | /************************************************** | |
1404 | * This is still part of probe() in a sense... | |
1405 | * | |
3dc420be | 1406 | * 7. Setup and register with mac80211 and debugfs |
e211b242 | 1407 | **************************************************/ |
88f10a17 | 1408 | if (iwlagn_mac_setup_register(priv, &fw->ucode_capa)) |
7d47618a | 1409 | goto out_destroy_workqueue; |
158bea07 | 1410 | |
9da987ac MV |
1411 | if (iwl_dbgfs_register(priv, dbgfs_dir)) |
1412 | goto out_mac80211_unregister; | |
e211b242 | 1413 | |
d0f76d68 | 1414 | return op_mode; |
b481de9c | 1415 | |
9da987ac MV |
1416 | out_mac80211_unregister: |
1417 | iwlagn_mac_unregister(priv); | |
34c1b7ba | 1418 | out_destroy_workqueue: |
273a5768 | 1419 | iwl_tt_exit(priv); |
273a5768 | 1420 | iwl_cancel_deferred_work(priv); |
1ee158d8 JB |
1421 | destroy_workqueue(priv->workqueue); |
1422 | priv->workqueue = NULL; | |
6ba87956 | 1423 | iwl_uninit_drv(priv); |
26a7ca9a JB |
1424 | out_free_eeprom_blob: |
1425 | kfree(priv->eeprom_blob); | |
34c1b7ba | 1426 | out_free_eeprom: |
b7998c8b | 1427 | iwl_free_nvm_data(priv->nvm_data); |
063c5166 | 1428 | out_free_hw: |
d7c76f4c | 1429 | ieee80211_free_hw(priv->hw); |
34c1b7ba | 1430 | out: |
d0f76d68 EG |
1431 | op_mode = NULL; |
1432 | return op_mode; | |
b481de9c ZY |
1433 | } |
1434 | ||
aca86268 | 1435 | static void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode) |
b481de9c | 1436 | { |
d0f76d68 EG |
1437 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); |
1438 | ||
e1623446 | 1439 | IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); |
b481de9c | 1440 | |
09af1403 | 1441 | iwlagn_mac_unregister(priv); |
c4f55232 | 1442 | |
39b73fb1 WYG |
1443 | iwl_tt_exit(priv); |
1444 | ||
26a7ca9a | 1445 | kfree(priv->eeprom_blob); |
b7998c8b | 1446 | iwl_free_nvm_data(priv->nvm_data); |
b481de9c | 1447 | |
948c171c | 1448 | /*netif_stop_queue(dev); */ |
1ee158d8 | 1449 | flush_workqueue(priv->workqueue); |
948c171c | 1450 | |
ade4c649 | 1451 | /* ieee80211_unregister_hw calls iwlagn_mac_stop, which flushes |
1ee158d8 | 1452 | * priv->workqueue... so we can't take down the workqueue |
b481de9c | 1453 | * until now... */ |
1ee158d8 JB |
1454 | destroy_workqueue(priv->workqueue); |
1455 | priv->workqueue = NULL; | |
b481de9c | 1456 | |
6ba87956 | 1457 | iwl_uninit_drv(priv); |
b481de9c | 1458 | |
77834543 | 1459 | dev_kfree_skb(priv->beacon_skb); |
b481de9c | 1460 | |
a4082843 | 1461 | iwl_trans_op_mode_leave(priv->trans); |
b481de9c ZY |
1462 | ieee80211_free_hw(priv->hw); |
1463 | } | |
1464 | ||
2fdfc476 MV |
1465 | static const char * const desc_lookup_text[] = { |
1466 | "OK", | |
1467 | "FAIL", | |
1468 | "BAD_PARAM", | |
1469 | "BAD_CHECKSUM", | |
1470 | "NMI_INTERRUPT_WDG", | |
1471 | "SYSASSERT", | |
1472 | "FATAL_ERROR", | |
1473 | "BAD_COMMAND", | |
1474 | "HW_ERROR_TUNE_LOCK", | |
1475 | "HW_ERROR_TEMPERATURE", | |
1476 | "ILLEGAL_CHAN_FREQ", | |
1477 | "VCC_NOT_STABLE", | |
1478 | "FH_ERROR", | |
1479 | "NMI_INTERRUPT_HOST", | |
1480 | "NMI_INTERRUPT_ACTION_PT", | |
1481 | "NMI_INTERRUPT_UNKNOWN", | |
1482 | "UCODE_VERSION_MISMATCH", | |
1483 | "HW_ERROR_ABS_LOCK", | |
1484 | "HW_ERROR_CAL_LOCK_FAIL", | |
1485 | "NMI_INTERRUPT_INST_ACTION_PT", | |
1486 | "NMI_INTERRUPT_DATA_ACTION_PT", | |
1487 | "NMI_TRM_HW_ER", | |
1488 | "NMI_INTERRUPT_TRM", | |
1489 | "NMI_INTERRUPT_BREAK_POINT", | |
1490 | "DEBUG_0", | |
1491 | "DEBUG_1", | |
1492 | "DEBUG_2", | |
1493 | "DEBUG_3", | |
1494 | }; | |
1495 | ||
1496 | static struct { char *name; u8 num; } advanced_lookup[] = { | |
1497 | { "NMI_INTERRUPT_WDG", 0x34 }, | |
1498 | { "SYSASSERT", 0x35 }, | |
1499 | { "UCODE_VERSION_MISMATCH", 0x37 }, | |
1500 | { "BAD_COMMAND", 0x38 }, | |
1501 | { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, | |
1502 | { "FATAL_ERROR", 0x3D }, | |
1503 | { "NMI_TRM_HW_ERR", 0x46 }, | |
1504 | { "NMI_INTERRUPT_TRM", 0x4C }, | |
1505 | { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, | |
1506 | { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, | |
1507 | { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, | |
1508 | { "NMI_INTERRUPT_HOST", 0x66 }, | |
1509 | { "NMI_INTERRUPT_ACTION_PT", 0x7C }, | |
1510 | { "NMI_INTERRUPT_UNKNOWN", 0x84 }, | |
1511 | { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, | |
1512 | { "ADVANCED_SYSASSERT", 0 }, | |
1513 | }; | |
1514 | ||
1515 | static const char *desc_lookup(u32 num) | |
1516 | { | |
1517 | int i; | |
1518 | int max = ARRAY_SIZE(desc_lookup_text); | |
1519 | ||
1520 | if (num < max) | |
1521 | return desc_lookup_text[num]; | |
1522 | ||
1523 | max = ARRAY_SIZE(advanced_lookup) - 1; | |
1524 | for (i = 0; i < max; i++) { | |
1525 | if (advanced_lookup[i].num == num) | |
1526 | break; | |
1527 | } | |
1528 | return advanced_lookup[i].name; | |
1529 | } | |
1530 | ||
1531 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
1532 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
1533 | ||
1534 | static void iwl_dump_nic_error_log(struct iwl_priv *priv) | |
1535 | { | |
68e8dfda | 1536 | struct iwl_trans *trans = priv->trans; |
2fdfc476 MV |
1537 | u32 base; |
1538 | struct iwl_error_event_table table; | |
1539 | ||
1540 | base = priv->device_pointers.error_event_table; | |
a42506eb | 1541 | if (priv->cur_ucode == IWL_UCODE_INIT) { |
2fdfc476 | 1542 | if (!base) |
e3ec26de | 1543 | base = priv->fw->init_errlog_ptr; |
2fdfc476 MV |
1544 | } else { |
1545 | if (!base) | |
e3ec26de | 1546 | base = priv->fw->inst_errlog_ptr; |
2fdfc476 MV |
1547 | } |
1548 | ||
1549 | if (!iwlagn_hw_valid_rtc_data_addr(base)) { | |
1550 | IWL_ERR(priv, | |
1551 | "Not valid error log pointer 0x%08X for %s uCode\n", | |
1552 | base, | |
a42506eb | 1553 | (priv->cur_ucode == IWL_UCODE_INIT) |
2fdfc476 MV |
1554 | ? "Init" : "RT"); |
1555 | return; | |
1556 | } | |
1557 | ||
1558 | /*TODO: Update dbgfs with ISR error stats obtained below */ | |
4fd442db | 1559 | iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table)); |
2fdfc476 MV |
1560 | |
1561 | if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { | |
1562 | IWL_ERR(trans, "Start IWL Error Log Dump:\n"); | |
1563 | IWL_ERR(trans, "Status: 0x%08lX, count: %d\n", | |
74fda971 | 1564 | priv->status, table.valid); |
2fdfc476 MV |
1565 | } |
1566 | ||
1567 | trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low, | |
1568 | table.data1, table.data2, table.line, | |
1569 | table.blink1, table.blink2, table.ilink1, | |
1570 | table.ilink2, table.bcon_time, table.gp1, | |
1571 | table.gp2, table.gp3, table.ucode_ver, | |
1572 | table.hw_ver, table.brd_ver); | |
1573 | IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id, | |
1574 | desc_lookup(table.error_id)); | |
1575 | IWL_ERR(priv, "0x%08X | uPc\n", table.pc); | |
1576 | IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1); | |
1577 | IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2); | |
1578 | IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1); | |
1579 | IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2); | |
1580 | IWL_ERR(priv, "0x%08X | data1\n", table.data1); | |
1581 | IWL_ERR(priv, "0x%08X | data2\n", table.data2); | |
1582 | IWL_ERR(priv, "0x%08X | line\n", table.line); | |
1583 | IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time); | |
1584 | IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low); | |
1585 | IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi); | |
1586 | IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1); | |
1587 | IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2); | |
1588 | IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3); | |
1589 | IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver); | |
1590 | IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver); | |
1591 | IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver); | |
1592 | IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd); | |
1593 | IWL_ERR(priv, "0x%08X | isr0\n", table.isr0); | |
1594 | IWL_ERR(priv, "0x%08X | isr1\n", table.isr1); | |
1595 | IWL_ERR(priv, "0x%08X | isr2\n", table.isr2); | |
1596 | IWL_ERR(priv, "0x%08X | isr3\n", table.isr3); | |
1597 | IWL_ERR(priv, "0x%08X | isr4\n", table.isr4); | |
1598 | IWL_ERR(priv, "0x%08X | isr_pref\n", table.isr_pref); | |
1599 | IWL_ERR(priv, "0x%08X | wait_event\n", table.wait_event); | |
1600 | IWL_ERR(priv, "0x%08X | l2p_control\n", table.l2p_control); | |
1601 | IWL_ERR(priv, "0x%08X | l2p_duration\n", table.l2p_duration); | |
1602 | IWL_ERR(priv, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid); | |
1603 | IWL_ERR(priv, "0x%08X | l2p_addr_match\n", table.l2p_addr_match); | |
1604 | IWL_ERR(priv, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); | |
1605 | IWL_ERR(priv, "0x%08X | timestamp\n", table.u_timestamp); | |
1606 | IWL_ERR(priv, "0x%08X | flow_handler\n", table.flow_handler); | |
1607 | } | |
1608 | ||
1609 | #define EVENT_START_OFFSET (4 * sizeof(u32)) | |
1610 | ||
1611 | /** | |
1612 | * iwl_print_event_log - Dump error event log to syslog | |
1613 | * | |
1614 | */ | |
1615 | static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, | |
1616 | u32 num_events, u32 mode, | |
1617 | int pos, char **buf, size_t bufsz) | |
1618 | { | |
1619 | u32 i; | |
1620 | u32 base; /* SRAM byte address of event log header */ | |
1621 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
1622 | u32 ptr; /* SRAM byte address of log data */ | |
1623 | u32 ev, time, data; /* event log data */ | |
1624 | unsigned long reg_flags; | |
1625 | ||
68e8dfda | 1626 | struct iwl_trans *trans = priv->trans; |
2fdfc476 MV |
1627 | |
1628 | if (num_events == 0) | |
1629 | return pos; | |
1630 | ||
1631 | base = priv->device_pointers.log_event_table; | |
a42506eb | 1632 | if (priv->cur_ucode == IWL_UCODE_INIT) { |
2fdfc476 | 1633 | if (!base) |
e3ec26de | 1634 | base = priv->fw->init_evtlog_ptr; |
2fdfc476 MV |
1635 | } else { |
1636 | if (!base) | |
e3ec26de | 1637 | base = priv->fw->inst_evtlog_ptr; |
2fdfc476 MV |
1638 | } |
1639 | ||
1640 | if (mode == 0) | |
1641 | event_size = 2 * sizeof(u32); | |
1642 | else | |
1643 | event_size = 3 * sizeof(u32); | |
1644 | ||
1645 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
1646 | ||
1647 | /* Make sure device is powered up for SRAM reads */ | |
e56b04ef LE |
1648 | if (!iwl_trans_grab_nic_access(trans, false, ®_flags)) |
1649 | return pos; | |
2fdfc476 MV |
1650 | |
1651 | /* Set starting address; reads will auto-increment */ | |
1652 | iwl_write32(trans, HBUS_TARG_MEM_RADDR, ptr); | |
1653 | ||
1654 | /* "time" is actually "data" for mode 0 (no timestamp). | |
1655 | * place event id # at far right for easier visual parsing. */ | |
1656 | for (i = 0; i < num_events; i++) { | |
1657 | ev = iwl_read32(trans, HBUS_TARG_MEM_RDAT); | |
1658 | time = iwl_read32(trans, HBUS_TARG_MEM_RDAT); | |
1659 | if (mode == 0) { | |
1660 | /* data, ev */ | |
1661 | if (bufsz) { | |
1662 | pos += scnprintf(*buf + pos, bufsz - pos, | |
1663 | "EVT_LOG:0x%08x:%04u\n", | |
1664 | time, ev); | |
1665 | } else { | |
1666 | trace_iwlwifi_dev_ucode_event(trans->dev, 0, | |
1667 | time, ev); | |
1668 | IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", | |
1669 | time, ev); | |
1670 | } | |
1671 | } else { | |
1672 | data = iwl_read32(trans, HBUS_TARG_MEM_RDAT); | |
1673 | if (bufsz) { | |
1674 | pos += scnprintf(*buf + pos, bufsz - pos, | |
1675 | "EVT_LOGT:%010u:0x%08x:%04u\n", | |
1676 | time, data, ev); | |
1677 | } else { | |
1678 | IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n", | |
1679 | time, data, ev); | |
1680 | trace_iwlwifi_dev_ucode_event(trans->dev, time, | |
1681 | data, ev); | |
1682 | } | |
1683 | } | |
1684 | } | |
1685 | ||
1686 | /* Allow device to power down */ | |
e56b04ef | 1687 | iwl_trans_release_nic_access(trans, ®_flags); |
2fdfc476 MV |
1688 | return pos; |
1689 | } | |
1690 | ||
1691 | /** | |
1692 | * iwl_print_last_event_logs - Dump the newest # of event log to syslog | |
1693 | */ | |
1694 | static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity, | |
1695 | u32 num_wraps, u32 next_entry, | |
1696 | u32 size, u32 mode, | |
1697 | int pos, char **buf, size_t bufsz) | |
1698 | { | |
1699 | /* | |
1700 | * display the newest DEFAULT_LOG_ENTRIES entries | |
1701 | * i.e the entries just before the next ont that uCode would fill. | |
1702 | */ | |
1703 | if (num_wraps) { | |
1704 | if (next_entry < size) { | |
1705 | pos = iwl_print_event_log(priv, | |
1706 | capacity - (size - next_entry), | |
1707 | size - next_entry, mode, | |
1708 | pos, buf, bufsz); | |
1709 | pos = iwl_print_event_log(priv, 0, | |
1710 | next_entry, mode, | |
1711 | pos, buf, bufsz); | |
1712 | } else | |
1713 | pos = iwl_print_event_log(priv, next_entry - size, | |
1714 | size, mode, pos, buf, bufsz); | |
1715 | } else { | |
1716 | if (next_entry < size) { | |
1717 | pos = iwl_print_event_log(priv, 0, next_entry, | |
1718 | mode, pos, buf, bufsz); | |
1719 | } else { | |
1720 | pos = iwl_print_event_log(priv, next_entry - size, | |
1721 | size, mode, pos, buf, bufsz); | |
1722 | } | |
1723 | } | |
1724 | return pos; | |
1725 | } | |
1726 | ||
1727 | #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20) | |
1728 | ||
1729 | int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log, | |
a6db0061 | 1730 | char **buf) |
2fdfc476 MV |
1731 | { |
1732 | u32 base; /* SRAM byte address of event log header */ | |
1733 | u32 capacity; /* event log capacity in # entries */ | |
1734 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
1735 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
1736 | u32 next_entry; /* index of next entry to be written by uCode */ | |
1737 | u32 size; /* # entries that we'll print */ | |
1738 | u32 logsize; | |
1739 | int pos = 0; | |
1740 | size_t bufsz = 0; | |
68e8dfda | 1741 | struct iwl_trans *trans = priv->trans; |
2fdfc476 MV |
1742 | |
1743 | base = priv->device_pointers.log_event_table; | |
a42506eb | 1744 | if (priv->cur_ucode == IWL_UCODE_INIT) { |
e3ec26de | 1745 | logsize = priv->fw->init_evtlog_size; |
2fdfc476 | 1746 | if (!base) |
e3ec26de | 1747 | base = priv->fw->init_evtlog_ptr; |
2fdfc476 | 1748 | } else { |
e3ec26de | 1749 | logsize = priv->fw->inst_evtlog_size; |
2fdfc476 | 1750 | if (!base) |
e3ec26de | 1751 | base = priv->fw->inst_evtlog_ptr; |
2fdfc476 MV |
1752 | } |
1753 | ||
1754 | if (!iwlagn_hw_valid_rtc_data_addr(base)) { | |
1755 | IWL_ERR(priv, | |
1756 | "Invalid event log pointer 0x%08X for %s uCode\n", | |
1757 | base, | |
a42506eb | 1758 | (priv->cur_ucode == IWL_UCODE_INIT) |
2fdfc476 MV |
1759 | ? "Init" : "RT"); |
1760 | return -EINVAL; | |
1761 | } | |
1762 | ||
1763 | /* event log header */ | |
4fd442db EG |
1764 | capacity = iwl_trans_read_mem32(trans, base); |
1765 | mode = iwl_trans_read_mem32(trans, base + (1 * sizeof(u32))); | |
1766 | num_wraps = iwl_trans_read_mem32(trans, base + (2 * sizeof(u32))); | |
1767 | next_entry = iwl_trans_read_mem32(trans, base + (3 * sizeof(u32))); | |
2fdfc476 MV |
1768 | |
1769 | if (capacity > logsize) { | |
1770 | IWL_ERR(priv, "Log capacity %d is bogus, limit to %d " | |
1771 | "entries\n", capacity, logsize); | |
1772 | capacity = logsize; | |
1773 | } | |
1774 | ||
1775 | if (next_entry > logsize) { | |
1776 | IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n", | |
1777 | next_entry, logsize); | |
1778 | next_entry = logsize; | |
1779 | } | |
1780 | ||
1781 | size = num_wraps ? capacity : next_entry; | |
1782 | ||
1783 | /* bail out if nothing in log */ | |
1784 | if (size == 0) { | |
1785 | IWL_ERR(trans, "Start IWL Event Log Dump: nothing in log\n"); | |
1786 | return pos; | |
1787 | } | |
1788 | ||
2fdfc476 MV |
1789 | if (!(iwl_have_debug_level(IWL_DL_FW_ERRORS)) && !full_log) |
1790 | size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES) | |
1791 | ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size; | |
2fdfc476 MV |
1792 | IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n", |
1793 | size); | |
1794 | ||
1795 | #ifdef CONFIG_IWLWIFI_DEBUG | |
a6db0061 | 1796 | if (buf) { |
2fdfc476 MV |
1797 | if (full_log) |
1798 | bufsz = capacity * 48; | |
1799 | else | |
1800 | bufsz = size * 48; | |
1801 | *buf = kmalloc(bufsz, GFP_KERNEL); | |
1802 | if (!*buf) | |
1803 | return -ENOMEM; | |
1804 | } | |
1805 | if (iwl_have_debug_level(IWL_DL_FW_ERRORS) || full_log) { | |
1806 | /* | |
1807 | * if uCode has wrapped back to top of log, | |
1808 | * start at the oldest entry, | |
1809 | * i.e the next one that uCode would fill. | |
1810 | */ | |
1811 | if (num_wraps) | |
1812 | pos = iwl_print_event_log(priv, next_entry, | |
1813 | capacity - next_entry, mode, | |
1814 | pos, buf, bufsz); | |
1815 | /* (then/else) start at top of log */ | |
1816 | pos = iwl_print_event_log(priv, 0, | |
1817 | next_entry, mode, pos, buf, bufsz); | |
1818 | } else | |
1819 | pos = iwl_print_last_event_logs(priv, capacity, num_wraps, | |
1820 | next_entry, size, mode, | |
1821 | pos, buf, bufsz); | |
1822 | #else | |
1823 | pos = iwl_print_last_event_logs(priv, capacity, num_wraps, | |
1824 | next_entry, size, mode, | |
1825 | pos, buf, bufsz); | |
1826 | #endif | |
1827 | return pos; | |
1828 | } | |
1829 | ||
193219cf MV |
1830 | static void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand) |
1831 | { | |
1832 | unsigned int reload_msec; | |
1833 | unsigned long reload_jiffies; | |
1834 | ||
193219cf MV |
1835 | if (iwl_have_debug_level(IWL_DL_FW_ERRORS)) |
1836 | iwl_print_rx_config_cmd(priv, IWL_RXON_CTX_BSS); | |
193219cf MV |
1837 | |
1838 | /* uCode is no longer loaded. */ | |
1839 | priv->ucode_loaded = false; | |
1840 | ||
1841 | /* Set the FW error flag -- cleared on iwl_down */ | |
1842 | set_bit(STATUS_FW_ERROR, &priv->status); | |
1843 | ||
193219cf MV |
1844 | iwl_abort_notification_waits(&priv->notif_wait); |
1845 | ||
1846 | /* Keep the restart process from trying to send host | |
1847 | * commands by clearing the ready bit */ | |
1848 | clear_bit(STATUS_READY, &priv->status); | |
1849 | ||
193219cf MV |
1850 | if (!ondemand) { |
1851 | /* | |
1852 | * If firmware keep reloading, then it indicate something | |
1853 | * serious wrong and firmware having problem to recover | |
1854 | * from it. Instead of keep trying which will fill the syslog | |
1855 | * and hang the system, let's just stop it | |
1856 | */ | |
1857 | reload_jiffies = jiffies; | |
1858 | reload_msec = jiffies_to_msecs((long) reload_jiffies - | |
1859 | (long) priv->reload_jiffies); | |
1860 | priv->reload_jiffies = reload_jiffies; | |
1861 | if (reload_msec <= IWL_MIN_RELOAD_DURATION) { | |
1862 | priv->reload_count++; | |
1863 | if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) { | |
1864 | IWL_ERR(priv, "BUG_ON, Stop restarting\n"); | |
1865 | return; | |
1866 | } | |
1867 | } else | |
1868 | priv->reload_count = 0; | |
1869 | } | |
1870 | ||
1871 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
65de7e84 | 1872 | if (iwlwifi_mod_params.restart_fw) { |
193219cf MV |
1873 | IWL_DEBUG_FW_ERRORS(priv, |
1874 | "Restarting adapter due to uCode error.\n"); | |
1875 | queue_work(priv->workqueue, &priv->restart); | |
1876 | } else | |
1877 | IWL_DEBUG_FW_ERRORS(priv, | |
1878 | "Detected FW error, but not restarting\n"); | |
1879 | } | |
1880 | } | |
1881 | ||
aca86268 | 1882 | static void iwl_nic_error(struct iwl_op_mode *op_mode) |
19469f47 MV |
1883 | { |
1884 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
1885 | ||
2fdfc476 | 1886 | IWL_ERR(priv, "Loaded firmware version: %s\n", |
e3ec26de | 1887 | priv->fw->fw_version); |
2fdfc476 MV |
1888 | |
1889 | iwl_dump_nic_error_log(priv); | |
a6db0061 | 1890 | iwl_dump_nic_event_log(priv, false, NULL); |
2fdfc476 | 1891 | |
19469f47 MV |
1892 | iwlagn_fw_error(priv, false); |
1893 | } | |
1894 | ||
aca86268 | 1895 | static void iwl_cmd_queue_full(struct iwl_op_mode *op_mode) |
0e781842 JB |
1896 | { |
1897 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
1898 | ||
1899 | if (!iwl_check_for_ct_kill(priv)) { | |
1900 | IWL_ERR(priv, "Restarting adapter queue is full\n"); | |
b7e21bf0 | 1901 | iwlagn_fw_error(priv, false); |
0e781842 JB |
1902 | } |
1903 | } | |
1904 | ||
1280d428 JB |
1905 | #define EEPROM_RF_CONFIG_TYPE_MAX 0x3 |
1906 | ||
aca86268 | 1907 | static void iwl_nic_config(struct iwl_op_mode *op_mode) |
ecdb975c JB |
1908 | { |
1909 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
1910 | ||
08838cde | 1911 | /* SKU Control */ |
e139dc4a LE |
1912 | iwl_trans_set_bits_mask(priv->trans, CSR_HW_IF_CONFIG_REG, |
1913 | CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | | |
1914 | CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP, | |
1915 | (CSR_HW_REV_STEP(priv->trans->hw_rev) << | |
1916 | CSR_HW_IF_CONFIG_REG_POS_MAC_STEP) | | |
1917 | (CSR_HW_REV_DASH(priv->trans->hw_rev) << | |
1918 | CSR_HW_IF_CONFIG_REG_POS_MAC_DASH)); | |
08838cde | 1919 | |
1280d428 | 1920 | /* write radio config values to register */ |
b7998c8b | 1921 | if (priv->nvm_data->radio_cfg_type <= EEPROM_RF_CONFIG_TYPE_MAX) { |
1280d428 | 1922 | u32 reg_val = |
b7998c8b | 1923 | priv->nvm_data->radio_cfg_type << |
1280d428 | 1924 | CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE | |
b7998c8b | 1925 | priv->nvm_data->radio_cfg_step << |
1280d428 | 1926 | CSR_HW_IF_CONFIG_REG_POS_PHY_STEP | |
b7998c8b | 1927 | priv->nvm_data->radio_cfg_dash << |
1280d428 JB |
1928 | CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; |
1929 | ||
e139dc4a LE |
1930 | iwl_trans_set_bits_mask(priv->trans, CSR_HW_IF_CONFIG_REG, |
1931 | CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | | |
1932 | CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | | |
1933 | CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH, | |
1934 | reg_val); | |
1280d428 JB |
1935 | |
1936 | IWL_INFO(priv, "Radio type=0x%x-0x%x-0x%x\n", | |
b7998c8b EL |
1937 | priv->nvm_data->radio_cfg_type, |
1938 | priv->nvm_data->radio_cfg_step, | |
1939 | priv->nvm_data->radio_cfg_dash); | |
1280d428 JB |
1940 | } else { |
1941 | WARN_ON(1); | |
1942 | } | |
1943 | ||
1944 | /* set CSR_HW_CONFIG_REG for uCode use */ | |
1945 | iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG, | |
1946 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
1947 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | |
1948 | ||
dada03ca EG |
1949 | /* W/A : NIC is stuck in a reset state after Early PCIe power off |
1950 | * (PCIe power is lost before PERST# is asserted), | |
1951 | * causing ME FW to lose ownership and not being able to obtain it back. | |
1952 | */ | |
1953 | iwl_set_bits_mask_prph(priv->trans, APMG_PS_CTRL_REG, | |
1954 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | |
1955 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | |
1956 | ||
1957 | if (priv->lib->nic_config) | |
1958 | priv->lib->nic_config(priv); | |
ecdb975c JB |
1959 | } |
1960 | ||
8a8bbdb4 DF |
1961 | static void iwl_wimax_active(struct iwl_op_mode *op_mode) |
1962 | { | |
1963 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
1964 | ||
1965 | clear_bit(STATUS_READY, &priv->status); | |
1966 | IWL_ERR(priv, "RF is used by WiMAX\n"); | |
1967 | } | |
1968 | ||
aca86268 | 1969 | static void iwl_stop_sw_queue(struct iwl_op_mode *op_mode, int queue) |
e755f882 JB |
1970 | { |
1971 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
1479177b | 1972 | int mq = priv->queue_to_mac80211[queue]; |
9eae88fa | 1973 | |
1479177b | 1974 | if (WARN_ON_ONCE(mq == IWL_INVALID_MAC80211_QUEUE)) |
9eae88fa JB |
1975 | return; |
1976 | ||
1479177b | 1977 | if (atomic_inc_return(&priv->queue_stop_count[mq]) > 1) { |
9eae88fa | 1978 | IWL_DEBUG_TX_QUEUES(priv, |
1479177b JB |
1979 | "queue %d (mac80211 %d) already stopped\n", |
1980 | queue, mq); | |
9eae88fa JB |
1981 | return; |
1982 | } | |
e755f882 | 1983 | |
1479177b JB |
1984 | set_bit(mq, &priv->transport_queue_stop); |
1985 | ieee80211_stop_queue(priv->hw, mq); | |
e755f882 JB |
1986 | } |
1987 | ||
aca86268 | 1988 | static void iwl_wake_sw_queue(struct iwl_op_mode *op_mode, int queue) |
e755f882 JB |
1989 | { |
1990 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
1479177b | 1991 | int mq = priv->queue_to_mac80211[queue]; |
9eae88fa | 1992 | |
1479177b | 1993 | if (WARN_ON_ONCE(mq == IWL_INVALID_MAC80211_QUEUE)) |
9eae88fa JB |
1994 | return; |
1995 | ||
1479177b | 1996 | if (atomic_dec_return(&priv->queue_stop_count[mq]) > 0) { |
9eae88fa | 1997 | IWL_DEBUG_TX_QUEUES(priv, |
1479177b JB |
1998 | "queue %d (mac80211 %d) already awake\n", |
1999 | queue, mq); | |
9eae88fa JB |
2000 | return; |
2001 | } | |
e755f882 | 2002 | |
1479177b | 2003 | clear_bit(mq, &priv->transport_queue_stop); |
e755f882 JB |
2004 | |
2005 | if (!priv->passive_no_rx) | |
1479177b | 2006 | ieee80211_wake_queue(priv->hw, mq); |
e755f882 JB |
2007 | } |
2008 | ||
2009 | void iwlagn_lift_passive_no_rx(struct iwl_priv *priv) | |
2010 | { | |
1479177b | 2011 | int mq; |
e755f882 JB |
2012 | |
2013 | if (!priv->passive_no_rx) | |
2014 | return; | |
2015 | ||
1479177b JB |
2016 | for (mq = 0; mq < IWLAGN_FIRST_AMPDU_QUEUE; mq++) { |
2017 | if (!test_bit(mq, &priv->transport_queue_stop)) { | |
2018 | IWL_DEBUG_TX_QUEUES(priv, "Wake queue %d", mq); | |
2019 | ieee80211_wake_queue(priv->hw, mq); | |
3251715d | 2020 | } else { |
1479177b | 2021 | IWL_DEBUG_TX_QUEUES(priv, "Don't wake queue %d", mq); |
3251715d | 2022 | } |
e755f882 JB |
2023 | } |
2024 | ||
2025 | priv->passive_no_rx = false; | |
2026 | } | |
2027 | ||
aca86268 | 2028 | static void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) |
ae625db3 | 2029 | { |
59c647b6 | 2030 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); |
ae625db3 MV |
2031 | struct ieee80211_tx_info *info; |
2032 | ||
2033 | info = IEEE80211_SKB_CB(skb); | |
59c647b6 | 2034 | iwl_trans_free_tx_cmd(priv->trans, info->driver_data[1]); |
31df3bb7 | 2035 | ieee80211_free_txskb(priv->hw, skb); |
ae625db3 MV |
2036 | } |
2037 | ||
aca86268 | 2038 | static void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) |
a297d95d MV |
2039 | { |
2040 | struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode); | |
2041 | ||
2042 | if (state) | |
2043 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
2044 | else | |
2045 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
2046 | ||
2047 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, state); | |
2048 | } | |
2049 | ||
b1abedad | 2050 | static const struct iwl_op_mode_ops iwl_dvm_ops = { |
d0f76d68 EG |
2051 | .start = iwl_op_mode_dvm_start, |
2052 | .stop = iwl_op_mode_dvm_stop, | |
db70f290 | 2053 | .rx = iwl_rx_dispatch, |
02e38358 EG |
2054 | .queue_full = iwl_stop_sw_queue, |
2055 | .queue_not_full = iwl_wake_sw_queue, | |
7120d989 | 2056 | .hw_rf_kill = iwl_set_hw_rfkill_state, |
ed277c93 | 2057 | .free_skb = iwl_free_skb, |
bcb9321c | 2058 | .nic_error = iwl_nic_error, |
0e781842 | 2059 | .cmd_queue_full = iwl_cmd_queue_full, |
ecdb975c | 2060 | .nic_config = iwl_nic_config, |
8a8bbdb4 | 2061 | .wimax_active = iwl_wimax_active, |
d0f76d68 | 2062 | }; |
b481de9c ZY |
2063 | |
2064 | /***************************************************************************** | |
2065 | * | |
2066 | * driver and module entry point | |
2067 | * | |
2068 | *****************************************************************************/ | |
5b9f8cd3 | 2069 | static int __init iwl_init(void) |
b481de9c ZY |
2070 | { |
2071 | ||
2072 | int ret; | |
897e1cf2 | 2073 | |
e227ceac | 2074 | ret = iwlagn_rate_control_register(); |
897e1cf2 | 2075 | if (ret) { |
c96c31e4 | 2076 | pr_err("Unable to register rate control algorithm: %d\n", ret); |
59c647b6 | 2077 | return ret; |
897e1cf2 RC |
2078 | } |
2079 | ||
cc5f7e39 DF |
2080 | ret = iwl_opmode_register("iwldvm", &iwl_dvm_ops); |
2081 | if (ret) { | |
2082 | pr_err("Unable to register op_mode: %d\n", ret); | |
59c647b6 | 2083 | iwlagn_rate_control_unregister(); |
cc5f7e39 | 2084 | } |
897e1cf2 | 2085 | |
897e1cf2 | 2086 | return ret; |
b481de9c | 2087 | } |
cc5f7e39 | 2088 | module_init(iwl_init); |
b481de9c | 2089 | |
5b9f8cd3 | 2090 | static void __exit iwl_exit(void) |
b481de9c | 2091 | { |
cc5f7e39 | 2092 | iwl_opmode_deregister("iwldvm"); |
e227ceac | 2093 | iwlagn_rate_control_unregister(); |
b481de9c | 2094 | } |
5b9f8cd3 | 2095 | module_exit(iwl_exit); |