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c5d05698 JS |
1 | /****************************************************************************** |
2 | * | |
1f447808 | 3 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. |
c5d05698 JS |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * Intel Linux Wireless <ilw@linux.intel.com> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | *****************************************************************************/ | |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/dma-mapping.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/skbuff.h> | |
34 | #include <linux/netdevice.h> | |
35 | #include <linux/wireless.h> | |
36 | #include <net/mac80211.h> | |
37 | #include <linux/etherdevice.h> | |
38 | #include <asm/unaligned.h> | |
39 | ||
40 | #include "iwl-eeprom.h" | |
41 | #include "iwl-dev.h" | |
42 | #include "iwl-core.h" | |
43 | #include "iwl-io.h" | |
44 | #include "iwl-sta.h" | |
a1175124 | 45 | #include "iwl-agn.h" |
c5d05698 | 46 | #include "iwl-helpers.h" |
19e6cda0 | 47 | #include "iwl-agn-hw.h" |
e932a609 | 48 | #include "iwl-agn-led.h" |
b8c76267 | 49 | #include "iwl-agn-debugfs.h" |
c5d05698 JS |
50 | |
51 | /* Highest firmware API version supported */ | |
cce53aa3 | 52 | #define IWL1000_UCODE_API_MAX 3 |
1de19ecc | 53 | #define IWL100_UCODE_API_MAX 5 |
c5d05698 JS |
54 | |
55 | /* Lowest firmware API version supported */ | |
77dcb6a9 | 56 | #define IWL1000_UCODE_API_MIN 1 |
1de19ecc | 57 | #define IWL100_UCODE_API_MIN 5 |
c5d05698 | 58 | |
77dcb6a9 JS |
59 | #define IWL1000_FW_PRE "iwlwifi-1000-" |
60 | #define _IWL1000_MODULE_FIRMWARE(api) IWL1000_FW_PRE #api ".ucode" | |
61 | #define IWL1000_MODULE_FIRMWARE(api) _IWL1000_MODULE_FIRMWARE(api) | |
c5d05698 | 62 | |
1de19ecc JS |
63 | #define IWL100_FW_PRE "iwlwifi-100-" |
64 | #define _IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE #api ".ucode" | |
65 | #define IWL100_MODULE_FIRMWARE(api) _IWL100_MODULE_FIRMWARE(api) | |
66 | ||
672639de WYG |
67 | |
68 | /* | |
69 | * For 1000, use advance thermal throttling critical temperature threshold, | |
70 | * but legacy thermal management implementation for now. | |
71 | * This is for the reason of 1000 uCode using advance thermal throttling API | |
72 | * but not implement ct_kill_exit based on ct_kill exit temperature | |
73 | * so the thermal throttling will still based on legacy thermal throttling | |
74 | * management. | |
75 | * The code here need to be modified once 1000 uCode has the advanced thermal | |
76 | * throttling algorithm in place | |
77 | */ | |
78 | static void iwl1000_set_ct_threshold(struct iwl_priv *priv) | |
79 | { | |
80 | /* want Celsius */ | |
81 | priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY; | |
82 | priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD; | |
83 | } | |
84 | ||
65b7998a WYG |
85 | /* NIC configuration for 1000 series */ |
86 | static void iwl1000_nic_config(struct iwl_priv *priv) | |
87 | { | |
9371d4ed WYG |
88 | /* set CSR_HW_CONFIG_REG for uCode use */ |
89 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, | |
90 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
91 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | |
65b7998a WYG |
92 | |
93 | /* Setting digital SVR for 1000 card to 1.32V */ | |
94 | /* locking is acquired in iwl_set_bits_mask_prph() function */ | |
95 | iwl_set_bits_mask_prph(priv, APMG_DIGITAL_SVR_REG, | |
96 | APMG_SVR_DIGITAL_VOLTAGE_1_32, | |
97 | ~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK); | |
98 | } | |
99 | ||
fac06108 WYG |
100 | static struct iwl_sensitivity_ranges iwl1000_sensitivity = { |
101 | .min_nrg_cck = 95, | |
102 | .max_nrg_cck = 0, /* not used, set to 0 */ | |
103 | .auto_corr_min_ofdm = 90, | |
104 | .auto_corr_min_ofdm_mrc = 170, | |
105 | .auto_corr_min_ofdm_x1 = 120, | |
106 | .auto_corr_min_ofdm_mrc_x1 = 240, | |
107 | ||
108 | .auto_corr_max_ofdm = 120, | |
109 | .auto_corr_max_ofdm_mrc = 210, | |
110 | .auto_corr_max_ofdm_x1 = 155, | |
111 | .auto_corr_max_ofdm_mrc_x1 = 290, | |
112 | ||
113 | .auto_corr_min_cck = 125, | |
114 | .auto_corr_max_cck = 200, | |
115 | .auto_corr_min_cck_mrc = 170, | |
116 | .auto_corr_max_cck_mrc = 400, | |
117 | .nrg_th_cck = 95, | |
118 | .nrg_th_ofdm = 95, | |
119 | ||
120 | .barker_corr_th_min = 190, | |
121 | .barker_corr_th_min_mrc = 390, | |
122 | .nrg_th_cca = 62, | |
123 | }; | |
124 | ||
125 | static int iwl1000_hw_set_hw_params(struct iwl_priv *priv) | |
126 | { | |
127 | if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES && | |
19e6cda0 | 128 | priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES) |
7cb1b088 | 129 | priv->cfg->base_params->num_of_queues = |
fac06108 WYG |
130 | priv->cfg->mod_params->num_of_queues; |
131 | ||
7cb1b088 | 132 | priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues; |
fac06108 WYG |
133 | priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM; |
134 | priv->hw_params.scd_bc_tbls_size = | |
7cb1b088 | 135 | priv->cfg->base_params->num_of_queues * |
19e6cda0 | 136 | sizeof(struct iwlagn_scd_bc_tbl); |
fac06108 | 137 | priv->hw_params.tfd_size = sizeof(struct iwl_tfd); |
bf3c7fdd | 138 | priv->hw_params.max_stations = IWLAGN_STATION_COUNT; |
a194e324 | 139 | priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID; |
fac06108 | 140 | |
19e6cda0 WYG |
141 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; |
142 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; | |
fac06108 WYG |
143 | |
144 | priv->hw_params.max_bsm_size = 0; | |
145 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | | |
146 | BIT(IEEE80211_BAND_5GHZ); | |
147 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | |
148 | ||
149 | priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant); | |
17423ea8 WYG |
150 | if (priv->cfg->rx_with_siso_diversity) |
151 | priv->hw_params.rx_chains_num = 1; | |
152 | else | |
153 | priv->hw_params.rx_chains_num = | |
154 | num_of_ant(priv->cfg->valid_rx_ant); | |
fac06108 WYG |
155 | priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant; |
156 | priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant; | |
157 | ||
0453674c | 158 | iwl1000_set_ct_threshold(priv); |
fac06108 WYG |
159 | |
160 | /* Set initial sensitivity parameters */ | |
161 | /* Set initial calibration set */ | |
162 | priv->hw_params.sens = &iwl1000_sensitivity; | |
163 | priv->hw_params.calib_init_cfg = | |
164 | BIT(IWL_CALIB_XTAL) | | |
165 | BIT(IWL_CALIB_LO) | | |
166 | BIT(IWL_CALIB_TX_IQ) | | |
167 | BIT(IWL_CALIB_TX_IQ_PERD) | | |
168 | BIT(IWL_CALIB_BASE_BAND); | |
178d1596 WYG |
169 | if (priv->cfg->need_dc_calib) |
170 | priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_DC); | |
fac06108 | 171 | |
a0ee74cf WYG |
172 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; |
173 | ||
fac06108 WYG |
174 | return 0; |
175 | } | |
176 | ||
672639de | 177 | static struct iwl_lib_ops iwl1000_lib = { |
fac06108 | 178 | .set_hw_params = iwl1000_hw_set_hw_params, |
b305a080 WYG |
179 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
180 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | |
181 | .txq_set_sched = iwlagn_txq_set_sched, | |
182 | .txq_agg_enable = iwlagn_txq_agg_enable, | |
183 | .txq_agg_disable = iwlagn_txq_agg_disable, | |
672639de WYG |
184 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
185 | .txq_free_tfd = iwl_hw_txq_free_tfd, | |
186 | .txq_init = iwl_hw_tx_queue_init, | |
e04ed0a5 WYG |
187 | .rx_handler_setup = iwlagn_rx_handler_setup, |
188 | .setup_deferred_work = iwlagn_setup_deferred_work, | |
189 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | |
81b8176e | 190 | .load_ucode = iwlagn_load_ucode, |
b7a79404 RC |
191 | .dump_nic_event_log = iwl_dump_nic_event_log, |
192 | .dump_nic_error_log = iwl_dump_nic_error_log, | |
696bdee3 | 193 | .dump_csr = iwl_dump_csr, |
1b3eb823 | 194 | .dump_fh = iwl_dump_fh, |
741a6266 WYG |
195 | .init_alive_start = iwlagn_init_alive_start, |
196 | .alive_notify = iwlagn_alive_notify, | |
e04ed0a5 | 197 | .send_tx_power = iwlagn_send_tx_power, |
672639de WYG |
198 | .update_chain_flags = iwl_update_chain_flags, |
199 | .apm_ops = { | |
fadb3582 | 200 | .init = iwl_apm_init, |
65b7998a | 201 | .config = iwl1000_nic_config, |
672639de WYG |
202 | }, |
203 | .eeprom_ops = { | |
204 | .regulatory_bands = { | |
e04ed0a5 WYG |
205 | EEPROM_REG_BAND_1_CHANNELS, |
206 | EEPROM_REG_BAND_2_CHANNELS, | |
207 | EEPROM_REG_BAND_3_CHANNELS, | |
208 | EEPROM_REG_BAND_4_CHANNELS, | |
209 | EEPROM_REG_BAND_5_CHANNELS, | |
210 | EEPROM_REG_BAND_24_HT40_CHANNELS, | |
211 | EEPROM_REG_BAND_52_HT40_CHANNELS | |
672639de | 212 | }, |
672639de WYG |
213 | .acquire_semaphore = iwlcore_eeprom_acquire_semaphore, |
214 | .release_semaphore = iwlcore_eeprom_release_semaphore, | |
e04ed0a5 WYG |
215 | .calib_version = iwlagn_eeprom_calib_version, |
216 | .query_addr = iwlagn_eeprom_query_addr, | |
672639de | 217 | }, |
e39fdee1 WYG |
218 | .isr_ops = { |
219 | .isr = iwl_isr_ict, | |
220 | .free = iwl_free_isr_ict, | |
221 | .alloc = iwl_alloc_isr_ict, | |
222 | .reset = iwl_reset_ict, | |
223 | .disable = iwl_disable_ict, | |
224 | }, | |
672639de | 225 | .temp_ops = { |
e04ed0a5 | 226 | .temperature = iwlagn_temperature, |
672639de | 227 | }, |
b8c76267 AK |
228 | .debugfs_ops = { |
229 | .rx_stats_read = iwl_ucode_rx_stats_read, | |
230 | .tx_stats_read = iwl_ucode_tx_stats_read, | |
231 | .general_stats_read = iwl_ucode_general_stats_read, | |
ffb7d896 | 232 | .bt_stats_read = iwl_ucode_bt_stats_read, |
54a9aa65 | 233 | .reply_tx_error = iwl_reply_tx_error_read, |
b8c76267 | 234 | }, |
fa8f130c WYG |
235 | .check_plcp_health = iwl_good_plcp_health, |
236 | .check_ack_health = iwl_good_ack_health, | |
716c74b0 | 237 | .txfifo_flush = iwlagn_txfifo_flush, |
65550636 | 238 | .dev_txfifo_flush = iwlagn_dev_txfifo_flush, |
0975cc8f WYG |
239 | .tt_ops = { |
240 | .lower_power_detection = iwl_tt_is_low_power_state, | |
241 | .tt_power_mode = iwl_tt_current_power_mode, | |
242 | .ct_kill_check = iwl_check_for_ct_kill, | |
243 | } | |
672639de WYG |
244 | }; |
245 | ||
45d5d805 | 246 | static const struct iwl_ops iwl1000_ops = { |
672639de | 247 | .lib = &iwl1000_lib, |
7dc77dba WYG |
248 | .hcmd = &iwlagn_hcmd, |
249 | .utils = &iwlagn_hcmd_utils, | |
e932a609 | 250 | .led = &iwlagn_led_ops, |
dc21b545 | 251 | .ieee80211_ops = &iwlagn_hw_ops, |
672639de WYG |
252 | }; |
253 | ||
7cb1b088 | 254 | static struct iwl_base_params iwl1000_base_params = { |
19e6cda0 WYG |
255 | .num_of_queues = IWLAGN_NUM_QUEUES, |
256 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
7cb1b088 | 257 | .eeprom_size = OTP_LOW_IMAGE_SIZE, |
fadb3582 | 258 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
a6c5c731 | 259 | .set_l0s = true, |
fadb3582 | 260 | .use_bsm = false, |
415e4993 WYG |
261 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, |
262 | .shadow_ram_support = false, | |
f2d0d0e2 | 263 | .led_compensation = 51, |
d8c07e7a | 264 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
480e8407 | 265 | .support_ct_kill_exit = true, |
6c3872e1 | 266 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 267 | .chain_noise_scale = 1000, |
22de94de | 268 | .wd_timeout = IWL_DEF_WD_TIMEOUT, |
678b385d | 269 | .max_event_log_size = 128, |
6e5c800e | 270 | .ucode_tracing = true, |
65d1f896 WYG |
271 | .sensitivity_calib_by_driver = true, |
272 | .chain_noise_calib_by_driver = true, | |
c5d05698 | 273 | }; |
7cb1b088 WYG |
274 | static struct iwl_ht_params iwl1000_ht_params = { |
275 | .ht_greenfield_support = true, | |
276 | .use_rts_for_aggregation = true, /* use rts/cts protection */ | |
277 | }; | |
278 | ||
279 | struct iwl_cfg iwl1000_bgn_cfg = { | |
280 | .name = "Intel(R) Centrino(R) Wireless-N 1000 BGN", | |
281 | .fw_name_pre = IWL1000_FW_PRE, | |
282 | .ucode_api_max = IWL1000_UCODE_API_MAX, | |
283 | .ucode_api_min = IWL1000_UCODE_API_MIN, | |
7cb1b088 WYG |
284 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
285 | .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, | |
286 | .ops = &iwl1000_ops, | |
287 | .mod_params = &iwlagn_mod_params, | |
288 | .base_params = &iwl1000_base_params, | |
289 | .ht_params = &iwl1000_ht_params, | |
564b344c | 290 | .led_mode = IWL_LED_BLINK, |
7cb1b088 | 291 | }; |
c5d05698 | 292 | |
4bd0914f | 293 | struct iwl_cfg iwl1000_bg_cfg = { |
c11362c0 | 294 | .name = "Intel(R) Centrino(R) Wireless-N 1000 BG", |
4bd0914f WYG |
295 | .fw_name_pre = IWL1000_FW_PRE, |
296 | .ucode_api_max = IWL1000_UCODE_API_MAX, | |
297 | .ucode_api_min = IWL1000_UCODE_API_MIN, | |
4bd0914f | 298 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
00e70590 | 299 | .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, |
7cb1b088 | 300 | .ops = &iwl1000_ops, |
348ee7cd | 301 | .mod_params = &iwlagn_mod_params, |
7cb1b088 | 302 | .base_params = &iwl1000_base_params, |
564b344c | 303 | .led_mode = IWL_LED_BLINK, |
4bd0914f WYG |
304 | }; |
305 | ||
1de19ecc | 306 | struct iwl_cfg iwl100_bgn_cfg = { |
638514ff | 307 | .name = "Intel(R) Centrino(R) Wireless-N 100 BGN", |
1de19ecc JS |
308 | .fw_name_pre = IWL100_FW_PRE, |
309 | .ucode_api_max = IWL100_UCODE_API_MAX, | |
310 | .ucode_api_min = IWL100_UCODE_API_MIN, | |
1de19ecc JS |
311 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
312 | .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, | |
7cb1b088 | 313 | .ops = &iwl1000_ops, |
1de19ecc | 314 | .mod_params = &iwlagn_mod_params, |
7cb1b088 WYG |
315 | .base_params = &iwl1000_base_params, |
316 | .ht_params = &iwl1000_ht_params, | |
564b344c | 317 | .led_mode = IWL_LED_RF_STATE, |
17423ea8 | 318 | .rx_with_siso_diversity = true, |
1de19ecc JS |
319 | }; |
320 | ||
321 | struct iwl_cfg iwl100_bg_cfg = { | |
638514ff | 322 | .name = "Intel(R) Centrino(R) Wireless-N 100 BG", |
1de19ecc JS |
323 | .fw_name_pre = IWL100_FW_PRE, |
324 | .ucode_api_max = IWL100_UCODE_API_MAX, | |
325 | .ucode_api_min = IWL100_UCODE_API_MIN, | |
1de19ecc JS |
326 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
327 | .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION, | |
7cb1b088 | 328 | .ops = &iwl1000_ops, |
1de19ecc | 329 | .mod_params = &iwlagn_mod_params, |
7cb1b088 | 330 | .base_params = &iwl1000_base_params, |
564b344c | 331 | .led_mode = IWL_LED_RF_STATE, |
17423ea8 | 332 | .rx_with_siso_diversity = true, |
1de19ecc JS |
333 | }; |
334 | ||
9554b34a | 335 | MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX)); |
1de19ecc | 336 | MODULE_FIRMWARE(IWL100_MODULE_FIRMWARE(IWL100_UCODE_API_MAX)); |