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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
3 | * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | *****************************************************************************/ | |
fcd427bb BC |
26 | /* |
27 | * Please use this file (iwl-3945.h) for driver implementation definitions. | |
28 | * Please use iwl-3945-commands.h for uCode API definitions. | |
29 | * Please use iwl-3945-hw.h for hardware-related definitions. | |
30 | */ | |
b481de9c ZY |
31 | |
32 | #ifndef __iwl_3945_h__ | |
33 | #define __iwl_3945_h__ | |
34 | ||
5d08cd1d CH |
35 | #include <linux/pci.h> /* for struct pci_device_id */ |
36 | #include <linux/kernel.h> | |
37 | #include <net/ieee80211_radiotap.h> | |
38 | ||
5d08cd1d | 39 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
bb8c093b | 40 | extern struct pci_device_id iwl3945_hw_card_ids[]; |
5d08cd1d CH |
41 | |
42 | #define DRV_NAME "iwl3945" | |
43 | #include "iwl-3945-hw.h" | |
44 | #include "iwl-prph.h" | |
45 | #include "iwl-3945-debug.h" | |
46 | ||
47 | /* Default noise level to report when noise measurement is not available. | |
48 | * This may be because we're: | |
49 | * 1) Not associated (4965, no beacon statistics being sent to driver) | |
50 | * 2) Scanning (noise measurement does not apply to associated channel) | |
51 | * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) | |
52 | * Use default noise value of -127 ... this is below the range of measurable | |
53 | * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. | |
54 | * Also, -127 works better than 0 when averaging frames with/without | |
55 | * noise info (e.g. averaging might be done in app); measured dBm values are | |
56 | * always negative ... using a negative value as the default keeps all | |
57 | * averages within an s8's (used in some apps) range of negative values. */ | |
58 | #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) | |
59 | ||
60 | /* Module parameters accessible from iwl-*.c */ | |
bb8c093b CH |
61 | extern int iwl3945_param_hwcrypto; |
62 | extern int iwl3945_param_queues_num; | |
5d08cd1d | 63 | |
bb8c093b | 64 | enum iwl3945_antenna { |
5d08cd1d CH |
65 | IWL_ANTENNA_DIVERSITY, |
66 | IWL_ANTENNA_MAIN, | |
67 | IWL_ANTENNA_AUX | |
68 | }; | |
69 | ||
70 | /* | |
71 | * RTS threshold here is total size [2347] minus 4 FCS bytes | |
72 | * Per spec: | |
73 | * a value of 0 means RTS on all data/management packets | |
74 | * a value > max MSDU size means no RTS | |
75 | * else RTS for data/management frames where MPDU is larger | |
76 | * than RTS value. | |
77 | */ | |
9ee1ba47 | 78 | #define IWL_RX_BUF_SIZE 3000U |
5d08cd1d CH |
79 | #define DEFAULT_RTS_THRESHOLD 2347U |
80 | #define MIN_RTS_THRESHOLD 0U | |
81 | #define MAX_RTS_THRESHOLD 2347U | |
82 | #define MAX_MSDU_SIZE 2304U | |
83 | #define MAX_MPDU_SIZE 2346U | |
84 | #define DEFAULT_BEACON_INTERVAL 100U | |
85 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | |
86 | #define DEFAULT_LONG_RETRY_LIMIT 4U | |
87 | ||
bb8c093b | 88 | struct iwl3945_rx_mem_buffer { |
5d08cd1d CH |
89 | dma_addr_t dma_addr; |
90 | struct sk_buff *skb; | |
91 | struct list_head list; | |
92 | }; | |
93 | ||
5d08cd1d CH |
94 | /* |
95 | * Generic queue structure | |
96 | * | |
97 | * Contains common data for Rx and Tx queues | |
98 | */ | |
bb8c093b | 99 | struct iwl3945_queue { |
5d08cd1d CH |
100 | int n_bd; /* number of BDs in this queue */ |
101 | int write_ptr; /* 1-st empty entry (index) host_w*/ | |
102 | int read_ptr; /* last used entry (index) host_r*/ | |
103 | dma_addr_t dma_addr; /* physical addr for BD's */ | |
104 | int n_window; /* safe queue window */ | |
105 | u32 id; | |
106 | int low_mark; /* low watermark, resume queue if free | |
107 | * space more than this */ | |
108 | int high_mark; /* high watermark, stop queue if free | |
109 | * space less than this */ | |
110 | } __attribute__ ((packed)); | |
111 | ||
112 | #define MAX_NUM_OF_TBS (20) | |
113 | ||
bc47279f | 114 | /* One for each TFD */ |
bb8c093b | 115 | struct iwl3945_tx_info { |
5d08cd1d CH |
116 | struct ieee80211_tx_status status; |
117 | struct sk_buff *skb[MAX_NUM_OF_TBS]; | |
118 | }; | |
119 | ||
120 | /** | |
bb8c093b | 121 | * struct iwl3945_tx_queue - Tx Queue for DMA |
bc47279f BC |
122 | * @q: generic Rx/Tx queue descriptor |
123 | * @bd: base of circular buffer of TFDs | |
124 | * @cmd: array of command/Tx buffers | |
125 | * @dma_addr_cmd: physical address of cmd/tx buffer array | |
126 | * @txb: array of per-TFD driver data | |
127 | * @need_update: indicates need to update read/write index | |
5d08cd1d | 128 | * |
bc47279f BC |
129 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame |
130 | * descriptors) and required locking structures. | |
5d08cd1d | 131 | */ |
bb8c093b CH |
132 | struct iwl3945_tx_queue { |
133 | struct iwl3945_queue q; | |
134 | struct iwl3945_tfd_frame *bd; | |
135 | struct iwl3945_cmd *cmd; | |
5d08cd1d | 136 | dma_addr_t dma_addr_cmd; |
bb8c093b | 137 | struct iwl3945_tx_info *txb; |
5d08cd1d | 138 | int need_update; |
5d08cd1d CH |
139 | int active; |
140 | }; | |
141 | ||
142 | #define IWL_NUM_SCAN_RATES (2) | |
143 | ||
bb8c093b | 144 | struct iwl3945_channel_tgd_info { |
5d08cd1d CH |
145 | u8 type; |
146 | s8 max_power; | |
147 | }; | |
148 | ||
bb8c093b | 149 | struct iwl3945_channel_tgh_info { |
5d08cd1d CH |
150 | s64 last_radar_time; |
151 | }; | |
152 | ||
153 | /* current Tx power values to use, one for each rate for each channel. | |
154 | * requested power is limited by: | |
155 | * -- regulatory EEPROM limits for this channel | |
156 | * -- hardware capabilities (clip-powers) | |
157 | * -- spectrum management | |
158 | * -- user preference (e.g. iwconfig) | |
159 | * when requested power is set, base power index must also be set. */ | |
bb8c093b CH |
160 | struct iwl3945_channel_power_info { |
161 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | |
5d08cd1d CH |
162 | s8 power_table_index; /* actual (compenst'd) index into gain table */ |
163 | s8 base_power_index; /* gain index for power at factory temp. */ | |
164 | s8 requested_power; /* power (dBm) requested for this chnl/rate */ | |
165 | }; | |
166 | ||
167 | /* current scan Tx power values to use, one for each scan rate for each | |
168 | * channel. */ | |
bb8c093b CH |
169 | struct iwl3945_scan_power_info { |
170 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | |
5d08cd1d CH |
171 | s8 power_table_index; /* actual (compenst'd) index into gain table */ |
172 | s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ | |
173 | }; | |
174 | ||
5d08cd1d CH |
175 | /* |
176 | * One for each channel, holds all channel setup data | |
177 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | |
178 | * with one another! | |
179 | */ | |
180 | #define IWL4965_MAX_RATE (33) | |
181 | ||
bb8c093b CH |
182 | struct iwl3945_channel_info { |
183 | struct iwl3945_channel_tgd_info tgd; | |
184 | struct iwl3945_channel_tgh_info tgh; | |
185 | struct iwl3945_eeprom_channel eeprom; /* EEPROM regulatory limit */ | |
186 | struct iwl3945_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for | |
5d08cd1d CH |
187 | * FAT channel */ |
188 | ||
189 | u8 channel; /* channel number */ | |
190 | u8 flags; /* flags copied from EEPROM */ | |
191 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | |
192 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */ | |
193 | s8 min_power; /* always 0 */ | |
194 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ | |
195 | ||
196 | u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ | |
197 | u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ | |
198 | u8 phymode; /* MODE_IEEE80211{A,B,G} */ | |
199 | ||
200 | /* Radio/DSP gain settings for each "normal" data Tx rate. | |
201 | * These include, in addition to RF and DSP gain, a few fields for | |
202 | * remembering/modifying gain settings (indexes). */ | |
bb8c093b | 203 | struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; |
5d08cd1d CH |
204 | |
205 | /* Radio/DSP gain settings for each scan rate, for directed scans. */ | |
bb8c093b | 206 | struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; |
5d08cd1d CH |
207 | }; |
208 | ||
bb8c093b | 209 | struct iwl3945_clip_group { |
5d08cd1d CH |
210 | /* maximum power level to prevent clipping for each rate, derived by |
211 | * us from this band's saturation power in EEPROM */ | |
212 | const s8 clip_powers[IWL_MAX_RATES]; | |
213 | }; | |
214 | ||
215 | #include "iwl-3945-rs.h" | |
216 | ||
217 | #define IWL_TX_FIFO_AC0 0 | |
218 | #define IWL_TX_FIFO_AC1 1 | |
219 | #define IWL_TX_FIFO_AC2 2 | |
220 | #define IWL_TX_FIFO_AC3 3 | |
221 | #define IWL_TX_FIFO_HCCA_1 5 | |
222 | #define IWL_TX_FIFO_HCCA_2 6 | |
223 | #define IWL_TX_FIFO_NONE 7 | |
224 | ||
225 | /* Minimum number of queues. MAX_NUM is defined in hw specific files */ | |
226 | #define IWL_MIN_NUM_QUEUES 4 | |
227 | ||
228 | /* Power management (not Tx power) structures */ | |
229 | ||
bb8c093b CH |
230 | struct iwl3945_power_vec_entry { |
231 | struct iwl3945_powertable_cmd cmd; | |
5d08cd1d CH |
232 | u8 no_dtim; |
233 | }; | |
234 | #define IWL_POWER_RANGE_0 (0) | |
235 | #define IWL_POWER_RANGE_1 (1) | |
236 | ||
237 | #define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */ | |
238 | #define IWL_POWER_INDEX_3 0x03 | |
239 | #define IWL_POWER_INDEX_5 0x05 | |
240 | #define IWL_POWER_AC 0x06 | |
241 | #define IWL_POWER_BATTERY 0x07 | |
242 | #define IWL_POWER_LIMIT 0x07 | |
243 | #define IWL_POWER_MASK 0x0F | |
244 | #define IWL_POWER_ENABLED 0x10 | |
245 | #define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK) | |
246 | ||
bb8c093b | 247 | struct iwl3945_power_mgr { |
5d08cd1d | 248 | spinlock_t lock; |
bb8c093b CH |
249 | struct iwl3945_power_vec_entry pwr_range_0[IWL_POWER_AC]; |
250 | struct iwl3945_power_vec_entry pwr_range_1[IWL_POWER_AC]; | |
5d08cd1d CH |
251 | u8 active_index; |
252 | u32 dtim_val; | |
253 | }; | |
254 | ||
255 | #define IEEE80211_DATA_LEN 2304 | |
256 | #define IEEE80211_4ADDR_LEN 30 | |
257 | #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) | |
258 | #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) | |
259 | ||
bb8c093b | 260 | struct iwl3945_frame { |
5d08cd1d CH |
261 | union { |
262 | struct ieee80211_hdr frame; | |
bb8c093b | 263 | struct iwl3945_tx_beacon_cmd beacon; |
5d08cd1d CH |
264 | u8 raw[IEEE80211_FRAME_LEN]; |
265 | u8 cmd[360]; | |
266 | } u; | |
267 | struct list_head list; | |
268 | }; | |
269 | ||
270 | #define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf) | |
271 | #define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8) | |
272 | #define SEQ_TO_INDEX(x) (x & 0xff) | |
273 | #define INDEX_TO_SEQ(x) (x & 0xff) | |
274 | #define SEQ_HUGE_FRAME (0x4000) | |
275 | #define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000) | |
276 | #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) | |
277 | #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) | |
278 | #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) | |
279 | ||
280 | enum { | |
281 | /* CMD_SIZE_NORMAL = 0, */ | |
282 | CMD_SIZE_HUGE = (1 << 0), | |
283 | /* CMD_SYNC = 0, */ | |
284 | CMD_ASYNC = (1 << 1), | |
285 | /* CMD_NO_SKB = 0, */ | |
286 | CMD_WANT_SKB = (1 << 2), | |
287 | }; | |
288 | ||
bb8c093b CH |
289 | struct iwl3945_cmd; |
290 | struct iwl3945_priv; | |
5d08cd1d | 291 | |
bb8c093b CH |
292 | struct iwl3945_cmd_meta { |
293 | struct iwl3945_cmd_meta *source; | |
5d08cd1d CH |
294 | union { |
295 | struct sk_buff *skb; | |
bb8c093b CH |
296 | int (*callback)(struct iwl3945_priv *priv, |
297 | struct iwl3945_cmd *cmd, struct sk_buff *skb); | |
5d08cd1d CH |
298 | } __attribute__ ((packed)) u; |
299 | ||
300 | /* The CMD_SIZE_HUGE flag bit indicates that the command | |
301 | * structure is stored at the end of the shared queue memory. */ | |
302 | u32 flags; | |
303 | ||
304 | } __attribute__ ((packed)); | |
305 | ||
bc47279f BC |
306 | /** |
307 | * struct iwl3945_cmd | |
308 | * | |
309 | * For allocation of the command and tx queues, this establishes the overall | |
310 | * size of the largest command we send to uCode, except for a scan command | |
311 | * (which is relatively huge; space is allocated separately). | |
312 | */ | |
bb8c093b CH |
313 | struct iwl3945_cmd { |
314 | struct iwl3945_cmd_meta meta; | |
315 | struct iwl3945_cmd_header hdr; | |
5d08cd1d | 316 | union { |
bb8c093b CH |
317 | struct iwl3945_addsta_cmd addsta; |
318 | struct iwl3945_led_cmd led; | |
5d08cd1d CH |
319 | u32 flags; |
320 | u8 val8; | |
321 | u16 val16; | |
322 | u32 val32; | |
bb8c093b CH |
323 | struct iwl3945_bt_cmd bt; |
324 | struct iwl3945_rxon_time_cmd rxon_time; | |
325 | struct iwl3945_powertable_cmd powertable; | |
326 | struct iwl3945_qosparam_cmd qosparam; | |
327 | struct iwl3945_tx_cmd tx; | |
328 | struct iwl3945_tx_beacon_cmd tx_beacon; | |
329 | struct iwl3945_rxon_assoc_cmd rxon_assoc; | |
5d08cd1d CH |
330 | u8 *indirect; |
331 | u8 payload[360]; | |
332 | } __attribute__ ((packed)) cmd; | |
333 | } __attribute__ ((packed)); | |
334 | ||
bb8c093b | 335 | struct iwl3945_host_cmd { |
5d08cd1d CH |
336 | u8 id; |
337 | u16 len; | |
bb8c093b | 338 | struct iwl3945_cmd_meta meta; |
5d08cd1d CH |
339 | const void *data; |
340 | }; | |
341 | ||
bb8c093b CH |
342 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl3945_cmd) - \ |
343 | sizeof(struct iwl3945_cmd_meta)) | |
5d08cd1d CH |
344 | |
345 | /* | |
346 | * RX related structures and functions | |
347 | */ | |
348 | #define RX_FREE_BUFFERS 64 | |
349 | #define RX_LOW_WATERMARK 8 | |
350 | ||
351 | #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 | |
352 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | |
353 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | |
354 | ||
355 | /** | |
bb8c093b | 356 | * struct iwl3945_rx_queue - Rx queue |
5d08cd1d CH |
357 | * @processed: Internal index to last handled Rx packet |
358 | * @read: Shared index to newest available Rx buffer | |
359 | * @write: Shared index to oldest written Rx packet | |
360 | * @free_count: Number of pre-allocated buffers in rx_free | |
361 | * @rx_free: list of free SKBs for use | |
362 | * @rx_used: List of Rx buffers with no SKB | |
363 | * @need_update: flag to indicate we need to update read/write index | |
364 | * | |
bb8c093b | 365 | * NOTE: rx_free and rx_used are used as a FIFO for iwl3945_rx_mem_buffers |
5d08cd1d | 366 | */ |
bb8c093b | 367 | struct iwl3945_rx_queue { |
5d08cd1d CH |
368 | __le32 *bd; |
369 | dma_addr_t dma_addr; | |
bb8c093b CH |
370 | struct iwl3945_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; |
371 | struct iwl3945_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | |
5d08cd1d CH |
372 | u32 processed; |
373 | u32 read; | |
374 | u32 write; | |
375 | u32 free_count; | |
376 | struct list_head rx_free; | |
377 | struct list_head rx_used; | |
378 | int need_update; | |
379 | spinlock_t lock; | |
380 | }; | |
381 | ||
382 | #define IWL_SUPPORTED_RATES_IE_LEN 8 | |
383 | ||
384 | #define SCAN_INTERVAL 100 | |
385 | ||
386 | #define MAX_A_CHANNELS 252 | |
387 | #define MIN_A_CHANNELS 7 | |
388 | ||
389 | #define MAX_B_CHANNELS 14 | |
390 | #define MIN_B_CHANNELS 1 | |
391 | ||
392 | #define STATUS_HCMD_ACTIVE 0 /* host command in progress */ | |
393 | #define STATUS_INT_ENABLED 1 | |
394 | #define STATUS_RF_KILL_HW 2 | |
395 | #define STATUS_RF_KILL_SW 3 | |
396 | #define STATUS_INIT 4 | |
397 | #define STATUS_ALIVE 5 | |
398 | #define STATUS_READY 6 | |
399 | #define STATUS_TEMPERATURE 7 | |
400 | #define STATUS_GEO_CONFIGURED 8 | |
401 | #define STATUS_EXIT_PENDING 9 | |
402 | #define STATUS_IN_SUSPEND 10 | |
403 | #define STATUS_STATISTICS 11 | |
404 | #define STATUS_SCANNING 12 | |
405 | #define STATUS_SCAN_ABORTING 13 | |
406 | #define STATUS_SCAN_HW 14 | |
407 | #define STATUS_POWER_PMI 15 | |
408 | #define STATUS_FW_ERROR 16 | |
a0646470 | 409 | #define STATUS_CONF_PENDING 17 |
5d08cd1d CH |
410 | |
411 | #define MAX_TID_COUNT 9 | |
412 | ||
413 | #define IWL_INVALID_RATE 0xFF | |
414 | #define IWL_INVALID_VALUE -1 | |
415 | ||
bb8c093b | 416 | struct iwl3945_tid_data { |
5d08cd1d CH |
417 | u16 seq_number; |
418 | }; | |
419 | ||
bb8c093b | 420 | struct iwl3945_hw_key { |
5d08cd1d CH |
421 | enum ieee80211_key_alg alg; |
422 | int keylen; | |
423 | u8 key[32]; | |
424 | }; | |
425 | ||
bb8c093b | 426 | union iwl3945_ht_rate_supp { |
5d08cd1d CH |
427 | u16 rates; |
428 | struct { | |
429 | u8 siso_rate; | |
430 | u8 mimo_rate; | |
431 | }; | |
432 | }; | |
433 | ||
c8b0e6e1 | 434 | #ifdef CONFIG_IWL3945_QOS |
5d08cd1d | 435 | |
bb8c093b | 436 | union iwl3945_qos_capabity { |
5d08cd1d CH |
437 | struct { |
438 | u8 edca_count:4; /* bit 0-3 */ | |
439 | u8 q_ack:1; /* bit 4 */ | |
440 | u8 queue_request:1; /* bit 5 */ | |
441 | u8 txop_request:1; /* bit 6 */ | |
442 | u8 reserved:1; /* bit 7 */ | |
443 | } q_AP; | |
444 | struct { | |
445 | u8 acvo_APSD:1; /* bit 0 */ | |
446 | u8 acvi_APSD:1; /* bit 1 */ | |
447 | u8 ac_bk_APSD:1; /* bit 2 */ | |
448 | u8 ac_be_APSD:1; /* bit 3 */ | |
449 | u8 q_ack:1; /* bit 4 */ | |
450 | u8 max_len:2; /* bit 5-6 */ | |
451 | u8 more_data_ack:1; /* bit 7 */ | |
452 | } q_STA; | |
453 | u8 val; | |
454 | }; | |
455 | ||
456 | /* QoS structures */ | |
bb8c093b | 457 | struct iwl3945_qos_info { |
5d08cd1d CH |
458 | int qos_enable; |
459 | int qos_active; | |
bb8c093b CH |
460 | union iwl3945_qos_capabity qos_cap; |
461 | struct iwl3945_qosparam_cmd def_qos_parm; | |
5d08cd1d | 462 | }; |
c8b0e6e1 | 463 | #endif /*CONFIG_IWL3945_QOS */ |
5d08cd1d CH |
464 | |
465 | #define STA_PS_STATUS_WAKE 0 | |
466 | #define STA_PS_STATUS_SLEEP 1 | |
467 | ||
bb8c093b CH |
468 | struct iwl3945_station_entry { |
469 | struct iwl3945_addsta_cmd sta; | |
470 | struct iwl3945_tid_data tid[MAX_TID_COUNT]; | |
5d08cd1d CH |
471 | union { |
472 | struct { | |
473 | u8 rate; | |
474 | u8 flags; | |
475 | } s; | |
476 | u16 rate_n_flags; | |
477 | } current_rate; | |
478 | u8 used; | |
479 | u8 ps_status; | |
bb8c093b | 480 | struct iwl3945_hw_key keyinfo; |
5d08cd1d CH |
481 | }; |
482 | ||
483 | /* one for each uCode image (inst/data, boot/init/runtime) */ | |
484 | struct fw_desc { | |
485 | void *v_addr; /* access by driver */ | |
486 | dma_addr_t p_addr; /* access by card's busmaster DMA */ | |
487 | u32 len; /* bytes */ | |
488 | }; | |
489 | ||
490 | /* uCode file layout */ | |
bb8c093b | 491 | struct iwl3945_ucode { |
5d08cd1d CH |
492 | __le32 ver; /* major/minor/subminor */ |
493 | __le32 inst_size; /* bytes of runtime instructions */ | |
494 | __le32 data_size; /* bytes of runtime data */ | |
495 | __le32 init_size; /* bytes of initialization instructions */ | |
496 | __le32 init_data_size; /* bytes of initialization data */ | |
497 | __le32 boot_size; /* bytes of bootstrap instructions */ | |
498 | u8 data[0]; /* data in same order as "size" elements */ | |
499 | }; | |
500 | ||
501 | #define IWL_IBSS_MAC_HASH_SIZE 32 | |
502 | ||
bb8c093b | 503 | struct iwl3945_ibss_seq { |
5d08cd1d CH |
504 | u8 mac[ETH_ALEN]; |
505 | u16 seq_num; | |
506 | u16 frag_num; | |
507 | unsigned long packet_time; | |
508 | struct list_head list; | |
509 | }; | |
510 | ||
bc47279f | 511 | /** |
12342c47 | 512 | * struct iwl3945_driver_hw_info |
bc47279f BC |
513 | * @max_txq_num: Max # Tx queues supported |
514 | * @ac_queue_count: # Tx queues for EDCA Access Categories (AC) | |
515 | * @tx_cmd_len: Size of Tx command (but not including frame itself) | |
516 | * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) | |
9ee1ba47 RR |
517 | * @rx_buf_size: |
518 | * @max_pkt_size: | |
bc47279f BC |
519 | * @max_rxq_log: Log-base-2 of max_rxq_size |
520 | * @max_stations: | |
521 | * @bcast_sta_id: | |
522 | * @shared_virt: Pointer to driver/uCode shared Tx Byte Counts and Rx status | |
523 | * @shared_phys: Physical Pointer to Tx Byte Counts and Rx status | |
524 | */ | |
bb8c093b | 525 | struct iwl3945_driver_hw_info { |
5d08cd1d CH |
526 | u16 max_txq_num; |
527 | u16 ac_queue_count; | |
528 | u16 tx_cmd_len; | |
529 | u16 max_rxq_size; | |
9ee1ba47 RR |
530 | u32 rx_buf_size; |
531 | u32 max_pkt_size; | |
5d08cd1d CH |
532 | u16 max_rxq_log; |
533 | u8 max_stations; | |
534 | u8 bcast_sta_id; | |
535 | void *shared_virt; | |
536 | dma_addr_t shared_phys; | |
537 | }; | |
538 | ||
bb8c093b | 539 | #define IWL_RX_HDR(x) ((struct iwl3945_rx_frame_hdr *)(\ |
5d08cd1d CH |
540 | x->u.rx_frame.stats.payload + \ |
541 | x->u.rx_frame.stats.phy_count)) | |
bb8c093b | 542 | #define IWL_RX_END(x) ((struct iwl3945_rx_frame_end *)(\ |
5d08cd1d CH |
543 | IWL_RX_HDR(x)->payload + \ |
544 | le16_to_cpu(IWL_RX_HDR(x)->len))) | |
545 | #define IWL_RX_STATS(x) (&x->u.rx_frame.stats) | |
546 | #define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload) | |
547 | ||
548 | ||
549 | /****************************************************************************** | |
550 | * | |
551 | * Functions implemented in iwl-base.c which are forward declared here | |
552 | * for use by iwl-*.c | |
553 | * | |
554 | *****************************************************************************/ | |
bb8c093b CH |
555 | struct iwl3945_addsta_cmd; |
556 | extern int iwl3945_send_add_station(struct iwl3945_priv *priv, | |
557 | struct iwl3945_addsta_cmd *sta, u8 flags); | |
558 | extern u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *bssid, | |
5d08cd1d | 559 | int is_ap, u8 flags); |
bb8c093b | 560 | extern int iwl3945_is_network_packet(struct iwl3945_priv *priv, |
5d08cd1d | 561 | struct ieee80211_hdr *header); |
bb8c093b CH |
562 | extern int iwl3945_power_init_handle(struct iwl3945_priv *priv); |
563 | extern int iwl3945_eeprom_init(struct iwl3945_priv *priv); | |
c8b0e6e1 | 564 | #ifdef CONFIG_IWL3945_DEBUG |
bb8c093b CH |
565 | extern void iwl3945_report_frame(struct iwl3945_priv *priv, |
566 | struct iwl3945_rx_packet *pkt, | |
5d08cd1d CH |
567 | struct ieee80211_hdr *header, int group100); |
568 | #else | |
bb8c093b CH |
569 | static inline void iwl3945_report_frame(struct iwl3945_priv *priv, |
570 | struct iwl3945_rx_packet *pkt, | |
5d08cd1d CH |
571 | struct ieee80211_hdr *header, |
572 | int group100) {} | |
573 | #endif | |
bb8c093b CH |
574 | extern void iwl3945_handle_data_packet_monitor(struct iwl3945_priv *priv, |
575 | struct iwl3945_rx_mem_buffer *rxb, | |
5d08cd1d CH |
576 | void *data, short len, |
577 | struct ieee80211_rx_status *stats, | |
578 | u16 phy_flags); | |
bb8c093b CH |
579 | extern int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, |
580 | struct ieee80211_hdr *header); | |
581 | extern int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv); | |
582 | extern void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, | |
583 | struct iwl3945_rx_queue *rxq); | |
584 | extern int iwl3945_calc_db_from_ratio(int sig_ratio); | |
585 | extern int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm); | |
586 | extern int iwl3945_tx_queue_init(struct iwl3945_priv *priv, | |
587 | struct iwl3945_tx_queue *txq, int count, u32 id); | |
588 | extern void iwl3945_rx_replenish(void *data); | |
589 | extern void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq); | |
590 | extern int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, | |
5d08cd1d | 591 | const void *data); |
bb8c093b CH |
592 | extern int __must_check iwl3945_send_cmd(struct iwl3945_priv *priv, |
593 | struct iwl3945_host_cmd *cmd); | |
594 | extern unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv, | |
5d08cd1d CH |
595 | struct ieee80211_hdr *hdr, |
596 | const u8 *dest, int left); | |
bb8c093b CH |
597 | extern int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, |
598 | struct iwl3945_rx_queue *q); | |
599 | extern int iwl3945_send_statistics_request(struct iwl3945_priv *priv); | |
600 | extern void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb, | |
5d08cd1d CH |
601 | u32 decrypt_res, |
602 | struct ieee80211_rx_status *stats); | |
bb8c093b | 603 | extern const u8 iwl3945_broadcast_addr[ETH_ALEN]; |
5d08cd1d CH |
604 | |
605 | /* | |
606 | * Currently used by iwl-3945-rs... look at restructuring so that it doesn't | |
607 | * call this... todo... fix that. | |
608 | */ | |
bb8c093b | 609 | extern u8 iwl3945_sync_station(struct iwl3945_priv *priv, int sta_id, |
5d08cd1d CH |
610 | u16 tx_rate, u8 flags); |
611 | ||
612 | /****************************************************************************** | |
613 | * | |
614 | * Functions implemented in iwl-[34]*.c which are forward declared here | |
615 | * for use by iwl-base.c | |
616 | * | |
617 | * NOTE: The implementation of these functions are hardware specific | |
618 | * which is why they are in the hardware specific files (vs. iwl-base.c) | |
619 | * | |
620 | * Naming convention -- | |
bb8c093b CH |
621 | * iwl3945_ <-- Its part of iwlwifi (should be changed to iwl3945_) |
622 | * iwl3945_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW) | |
5d08cd1d | 623 | * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) |
bb8c093b CH |
624 | * iwl3945_bg_ <-- Called from work queue context |
625 | * iwl3945_mac_ <-- mac80211 callback | |
5d08cd1d CH |
626 | * |
627 | ****************************************************************************/ | |
bb8c093b CH |
628 | extern void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv); |
629 | extern void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv); | |
630 | extern void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv); | |
631 | extern int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv); | |
632 | extern int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv); | |
633 | extern int iwl3945_hw_nic_init(struct iwl3945_priv *priv); | |
634 | extern int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv); | |
635 | extern void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv); | |
636 | extern void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv); | |
637 | extern int iwl3945_hw_nic_reset(struct iwl3945_priv *priv); | |
638 | extern int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *tfd, | |
5d08cd1d | 639 | dma_addr_t addr, u16 len); |
bb8c093b CH |
640 | extern int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq); |
641 | extern int iwl3945_hw_get_temperature(struct iwl3945_priv *priv); | |
642 | extern int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, | |
643 | struct iwl3945_tx_queue *txq); | |
644 | extern unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | |
645 | struct iwl3945_frame *frame, u8 rate); | |
646 | extern int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv); | |
647 | extern void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv, | |
648 | struct iwl3945_cmd *cmd, | |
5d08cd1d CH |
649 | struct ieee80211_tx_control *ctrl, |
650 | struct ieee80211_hdr *hdr, | |
651 | int sta_id, int tx_id); | |
bb8c093b CH |
652 | extern int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv); |
653 | extern int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power); | |
654 | extern void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, | |
655 | struct iwl3945_rx_mem_buffer *rxb); | |
656 | extern void iwl3945_disable_events(struct iwl3945_priv *priv); | |
657 | extern int iwl4965_get_temperature(const struct iwl3945_priv *priv); | |
5d08cd1d CH |
658 | |
659 | /** | |
bb8c093b | 660 | * iwl3945_hw_find_station - Find station id for a given BSSID |
5d08cd1d CH |
661 | * @bssid: MAC address of station ID to find |
662 | * | |
663 | * NOTE: This should not be hardware specific but the code has | |
664 | * not yet been merged into a single common layer for managing the | |
665 | * station tables. | |
666 | */ | |
bb8c093b | 667 | extern u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *bssid); |
5d08cd1d | 668 | |
bb8c093b | 669 | extern int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel); |
5d08cd1d | 670 | |
b481de9c ZY |
671 | /* |
672 | * Forward declare iwl-3945.c functions for iwl-base.c | |
673 | */ | |
bb8c093b CH |
674 | extern int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv); |
675 | extern __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv); | |
676 | extern int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv); | |
677 | extern void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv); | |
678 | extern int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv); | |
679 | extern u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, | |
b481de9c | 680 | u16 tx_rate, u8 flags); |
5d08cd1d CH |
681 | |
682 | ||
c8b0e6e1 | 683 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
5d08cd1d CH |
684 | |
685 | enum { | |
686 | MEASUREMENT_READY = (1 << 0), | |
687 | MEASUREMENT_ACTIVE = (1 << 1), | |
688 | }; | |
689 | ||
690 | #endif | |
691 | ||
bb8c093b | 692 | struct iwl3945_priv { |
5d08cd1d CH |
693 | |
694 | /* ieee device used by generic ieee processing code */ | |
695 | struct ieee80211_hw *hw; | |
696 | struct ieee80211_channel *ieee_channels; | |
697 | struct ieee80211_rate *ieee_rates; | |
698 | ||
699 | /* temporary frame storage list */ | |
700 | struct list_head free_frames; | |
701 | int frames_count; | |
702 | ||
703 | u8 phymode; | |
704 | int alloc_rxb_skb; | |
12342c47 | 705 | bool add_radiotap; |
5d08cd1d | 706 | |
bb8c093b CH |
707 | void (*rx_handlers[REPLY_MAX])(struct iwl3945_priv *priv, |
708 | struct iwl3945_rx_mem_buffer *rxb); | |
5d08cd1d CH |
709 | |
710 | const struct ieee80211_hw_mode *modes; | |
711 | ||
c8b0e6e1 | 712 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
5d08cd1d | 713 | /* spectrum measurement report caching */ |
bb8c093b | 714 | struct iwl3945_spectrum_notification measure_report; |
5d08cd1d CH |
715 | u8 measurement_status; |
716 | #endif | |
717 | /* ucode beacon time */ | |
718 | u32 ucode_beacon_time; | |
719 | ||
bb8c093b | 720 | /* we allocate array of iwl3945_channel_info for NIC's valid channels. |
5d08cd1d | 721 | * Access via channel # using indirect index array */ |
bb8c093b | 722 | struct iwl3945_channel_info *channel_info; /* channel info array */ |
5d08cd1d CH |
723 | u8 channel_count; /* # of channels */ |
724 | ||
725 | /* each calibration channel group in the EEPROM has a derived | |
726 | * clip setting for each rate. */ | |
bb8c093b | 727 | const struct iwl3945_clip_group clip_groups[5]; |
5d08cd1d CH |
728 | |
729 | /* thermal calibration */ | |
730 | s32 temperature; /* degrees Kelvin */ | |
731 | s32 last_temperature; | |
732 | ||
733 | /* Scan related variables */ | |
734 | unsigned long last_scan_jiffies; | |
7878a5a4 | 735 | unsigned long next_scan_jiffies; |
5d08cd1d CH |
736 | unsigned long scan_start; |
737 | unsigned long scan_pass_start; | |
738 | unsigned long scan_start_tsf; | |
739 | int scan_bands; | |
740 | int one_direct_scan; | |
741 | u8 direct_ssid_len; | |
742 | u8 direct_ssid[IW_ESSID_MAX_SIZE]; | |
bb8c093b | 743 | struct iwl3945_scan_cmd *scan; |
5d08cd1d CH |
744 | u8 only_active_channel; |
745 | ||
746 | /* spinlock */ | |
747 | spinlock_t lock; /* protect general shared data */ | |
748 | spinlock_t hcmd_lock; /* protect hcmd */ | |
749 | struct mutex mutex; | |
750 | ||
751 | /* basic pci-network driver stuff */ | |
752 | struct pci_dev *pci_dev; | |
753 | ||
754 | /* pci hardware address support */ | |
755 | void __iomem *hw_base; | |
756 | ||
757 | /* uCode images, save to reload in case of failure */ | |
758 | struct fw_desc ucode_code; /* runtime inst */ | |
759 | struct fw_desc ucode_data; /* runtime data original */ | |
760 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ | |
761 | struct fw_desc ucode_init; /* initialization inst */ | |
762 | struct fw_desc ucode_init_data; /* initialization data */ | |
763 | struct fw_desc ucode_boot; /* bootstrap inst */ | |
764 | ||
765 | ||
bb8c093b | 766 | struct iwl3945_rxon_time_cmd rxon_timing; |
5d08cd1d CH |
767 | |
768 | /* We declare this const so it can only be | |
769 | * changed via explicit cast within the | |
770 | * routines that actually update the physical | |
771 | * hardware */ | |
bb8c093b CH |
772 | const struct iwl3945_rxon_cmd active_rxon; |
773 | struct iwl3945_rxon_cmd staging_rxon; | |
5d08cd1d CH |
774 | |
775 | int error_recovering; | |
bb8c093b | 776 | struct iwl3945_rxon_cmd recovery_rxon; |
5d08cd1d CH |
777 | |
778 | /* 1st responses from initialize and runtime uCode images. | |
779 | * 4965's initialize alive response contains some calibration data. */ | |
bb8c093b CH |
780 | struct iwl3945_init_alive_resp card_alive_init; |
781 | struct iwl3945_alive_resp card_alive; | |
5d08cd1d CH |
782 | |
783 | #ifdef LED | |
784 | /* LED related variables */ | |
bb8c093b | 785 | struct iwl3945_activity_blink activity; |
5d08cd1d CH |
786 | unsigned long led_packets; |
787 | int led_state; | |
788 | #endif | |
789 | ||
790 | u16 active_rate; | |
791 | u16 active_rate_basic; | |
792 | ||
793 | u8 call_post_assoc_from_beacon; | |
794 | u8 assoc_station_added; | |
795 | /* Rate scaling data */ | |
796 | s8 data_retry_limit; | |
797 | u8 retry_rate; | |
798 | ||
799 | wait_queue_head_t wait_command_queue; | |
800 | ||
801 | int activity_timer_active; | |
802 | ||
803 | /* Rx and Tx DMA processing queues */ | |
bb8c093b CH |
804 | struct iwl3945_rx_queue rxq; |
805 | struct iwl3945_tx_queue txq[IWL_MAX_NUM_QUEUES]; | |
5d08cd1d CH |
806 | |
807 | unsigned long status; | |
808 | u32 config; | |
809 | ||
810 | int last_rx_rssi; /* From Rx packet statisitics */ | |
811 | int last_rx_noise; /* From beacon statistics */ | |
812 | ||
bb8c093b | 813 | struct iwl3945_power_mgr power_data; |
5d08cd1d | 814 | |
bb8c093b | 815 | struct iwl3945_notif_statistics statistics; |
5d08cd1d CH |
816 | unsigned long last_statistics_time; |
817 | ||
818 | /* context information */ | |
819 | u8 essid[IW_ESSID_MAX_SIZE]; | |
820 | u8 essid_len; | |
821 | u16 rates_mask; | |
822 | ||
823 | u32 power_mode; | |
824 | u32 antenna; | |
825 | u8 bssid[ETH_ALEN]; | |
826 | u16 rts_threshold; | |
827 | u8 mac_addr[ETH_ALEN]; | |
828 | ||
829 | /*station table variables */ | |
830 | spinlock_t sta_lock; | |
831 | int num_stations; | |
bb8c093b | 832 | struct iwl3945_station_entry stations[IWL_STATION_COUNT]; |
5d08cd1d CH |
833 | |
834 | /* Indication if ieee80211_ops->open has been called */ | |
835 | int is_open; | |
836 | ||
837 | u8 mac80211_registered; | |
838 | int is_abg; | |
839 | ||
840 | u32 notif_missed_beacons; | |
841 | ||
842 | /* Rx'd packet timing information */ | |
843 | u32 last_beacon_time; | |
844 | u64 last_tsf; | |
845 | ||
846 | /* Duplicate packet detection */ | |
847 | u16 last_seq_num; | |
848 | u16 last_frag_num; | |
849 | unsigned long last_packet_time; | |
bc47279f BC |
850 | |
851 | /* Hash table for finding stations in IBSS network */ | |
5d08cd1d CH |
852 | struct list_head ibss_mac_hash[IWL_IBSS_MAC_HASH_SIZE]; |
853 | ||
854 | /* eeprom */ | |
bb8c093b | 855 | struct iwl3945_eeprom eeprom; |
5d08cd1d CH |
856 | |
857 | int iw_mode; | |
858 | ||
859 | struct sk_buff *ibss_beacon; | |
860 | ||
861 | /* Last Rx'd beacon timestamp */ | |
862 | u32 timestamp0; | |
863 | u32 timestamp1; | |
864 | u16 beacon_int; | |
bb8c093b | 865 | struct iwl3945_driver_hw_info hw_setting; |
32bfd35d | 866 | struct ieee80211_vif *vif; |
5d08cd1d CH |
867 | |
868 | /* Current association information needed to configure the | |
869 | * hardware */ | |
870 | u16 assoc_id; | |
871 | u16 assoc_capability; | |
872 | u8 ps_mode; | |
873 | ||
c8b0e6e1 | 874 | #ifdef CONFIG_IWL3945_QOS |
bb8c093b | 875 | struct iwl3945_qos_info qos_data; |
c8b0e6e1 | 876 | #endif /*CONFIG_IWL3945_QOS */ |
5d08cd1d CH |
877 | |
878 | struct workqueue_struct *workqueue; | |
879 | ||
880 | struct work_struct up; | |
881 | struct work_struct restart; | |
882 | struct work_struct calibrated_work; | |
883 | struct work_struct scan_completed; | |
884 | struct work_struct rx_replenish; | |
885 | struct work_struct rf_kill; | |
886 | struct work_struct abort_scan; | |
887 | struct work_struct update_link_led; | |
888 | struct work_struct auth_work; | |
889 | struct work_struct report_work; | |
890 | struct work_struct request_scan; | |
891 | struct work_struct beacon_update; | |
892 | ||
893 | struct tasklet_struct irq_tasklet; | |
894 | ||
895 | struct delayed_work init_alive_start; | |
896 | struct delayed_work alive_start; | |
897 | struct delayed_work activity_timer; | |
898 | struct delayed_work thermal_periodic; | |
899 | struct delayed_work gather_stats; | |
900 | struct delayed_work scan_check; | |
901 | struct delayed_work post_associate; | |
902 | ||
903 | #define IWL_DEFAULT_TX_POWER 0x0F | |
904 | s8 user_txpower_limit; | |
905 | s8 max_channel_txpower_limit; | |
906 | ||
907 | #ifdef CONFIG_PM | |
908 | u32 pm_state[16]; | |
909 | #endif | |
910 | ||
c8b0e6e1 | 911 | #ifdef CONFIG_IWL3945_DEBUG |
5d08cd1d CH |
912 | /* debugging info */ |
913 | u32 framecnt_to_us; | |
914 | atomic_t restrict_refcnt; | |
915 | #endif | |
bb8c093b | 916 | }; /*iwl3945_priv */ |
5d08cd1d | 917 | |
bb8c093b | 918 | static inline int iwl3945_is_associated(struct iwl3945_priv *priv) |
5d08cd1d CH |
919 | { |
920 | return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; | |
921 | } | |
922 | ||
bb8c093b | 923 | static inline int is_channel_valid(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
924 | { |
925 | if (ch_info == NULL) | |
926 | return 0; | |
927 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; | |
928 | } | |
929 | ||
bb8c093b | 930 | static inline int is_channel_narrow(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
931 | { |
932 | return (ch_info->flags & EEPROM_CHANNEL_NARROW) ? 1 : 0; | |
933 | } | |
934 | ||
bb8c093b | 935 | static inline int is_channel_radar(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
936 | { |
937 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; | |
938 | } | |
939 | ||
bb8c093b | 940 | static inline u8 is_channel_a_band(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
941 | { |
942 | return ch_info->phymode == MODE_IEEE80211A; | |
943 | } | |
944 | ||
bb8c093b | 945 | static inline u8 is_channel_bg_band(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
946 | { |
947 | return ((ch_info->phymode == MODE_IEEE80211B) || | |
948 | (ch_info->phymode == MODE_IEEE80211G)); | |
949 | } | |
950 | ||
bb8c093b | 951 | static inline int is_channel_passive(const struct iwl3945_channel_info *ch) |
5d08cd1d CH |
952 | { |
953 | return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; | |
954 | } | |
955 | ||
bb8c093b | 956 | static inline int is_channel_ibss(const struct iwl3945_channel_info *ch) |
5d08cd1d CH |
957 | { |
958 | return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; | |
959 | } | |
960 | ||
12342c47 ZY |
961 | static inline int iwl3945_rate_index_from_plcp(int plcp) |
962 | { | |
963 | int i; | |
964 | ||
965 | for (i = 0; i < IWL_RATE_COUNT; i++) | |
966 | if (iwl3945_rates[i].plcp == plcp) | |
967 | return i; | |
968 | return -1; | |
969 | } | |
970 | ||
bb8c093b CH |
971 | extern const struct iwl3945_channel_info *iwl3945_get_channel_info( |
972 | const struct iwl3945_priv *priv, int phymode, u16 channel); | |
5d08cd1d | 973 | |
bb8c093b | 974 | /* Requires full declaration of iwl3945_priv before including */ |
5d08cd1d CH |
975 | #include "iwl-3945-io.h" |
976 | ||
b481de9c | 977 | #endif |