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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
b481de9c ZY |
32 | #include <linux/init.h> |
33 | #include <linux/pci.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/skbuff.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/wireless.h> | |
39 | #include <linux/firmware.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
b481de9c ZY |
43 | #include <net/mac80211.h> |
44 | ||
45 | #include <asm/div64.h> | |
46 | ||
6bc913bd | 47 | #include "iwl-eeprom.h" |
3e0d4cb1 | 48 | #include "iwl-dev.h" |
fee1247a | 49 | #include "iwl-core.h" |
3395f6e9 | 50 | #include "iwl-io.h" |
b481de9c | 51 | #include "iwl-helpers.h" |
6974e363 | 52 | #include "iwl-sta.h" |
f0832f13 | 53 | #include "iwl-calib.h" |
b481de9c | 54 | |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
b481de9c ZY |
62 | /* |
63 | * module name, copyright, version, etc. | |
64 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
65 | */ | |
66 | ||
d783b061 | 67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 68 | |
0a6857e7 | 69 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
70 | #define VD "d" |
71 | #else | |
72 | #define VD | |
73 | #endif | |
74 | ||
4fc22b21 | 75 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
76 | #define VS "s" |
77 | #else | |
78 | #define VS | |
79 | #endif | |
80 | ||
df48c323 | 81 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 82 | |
b481de9c ZY |
83 | |
84 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
85 | MODULE_VERSION(DRV_VERSION); | |
86 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
87 | MODULE_LICENSE("GPL"); | |
4fc22b21 | 88 | MODULE_ALIAS("iwl4965"); |
b481de9c | 89 | |
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
deb09c43 EG |
99 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
100 | { | |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
bb8c093b | 111 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
c1adf9fb | 117 | static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
bb8c093b | 177 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
54559703 | 184 | * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
54559703 | 191 | static int iwl_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 195 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
b481de9c ZY |
210 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) |
211 | return 1; | |
212 | ||
213 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
214 | * be updated with the RXON_ASSOC command -- however only some | |
215 | * flag transitions are allowed using RXON_ASSOC */ | |
216 | ||
217 | /* Check if we are not switching bands */ | |
218 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
219 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
220 | return 1; | |
221 | ||
222 | /* Check if we are switching association toggle */ | |
223 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
224 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
225 | return 1; | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
b481de9c | 230 | /** |
bb8c093b | 231 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 232 | * |
01ebd063 | 233 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
234 | * the active_rxon structure is updated with the new data. This |
235 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
236 | * a HW tune is required based on the RXON structure changes. | |
237 | */ | |
c79dd5b5 | 238 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
239 | { |
240 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 241 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 242 | DECLARE_MAC_BUF(mac); |
43d59b32 EG |
243 | int ret; |
244 | bool new_assoc = | |
245 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 246 | |
fee1247a | 247 | if (!iwl_is_alive(priv)) |
43d59b32 | 248 | return -EBUSY; |
b481de9c ZY |
249 | |
250 | /* always get timestamp with Rx frame */ | |
251 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
a326a5d0 EG |
252 | /* allow CTS-to-self if possible. this is relevant only for |
253 | * 5000, but will not damage 4965 */ | |
254 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | |
b481de9c | 255 | |
43d59b32 EG |
256 | ret = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
257 | if (ret) { | |
b481de9c ZY |
258 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
259 | return -EINVAL; | |
260 | } | |
261 | ||
262 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 263 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 264 | * and other flags for the current radio configuration. */ |
54559703 | 265 | if (!iwl_full_rxon_required(priv)) { |
43d59b32 EG |
266 | ret = iwl_send_rxon_assoc(priv); |
267 | if (ret) { | |
268 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
269 | return ret; | |
b481de9c ZY |
270 | } |
271 | ||
272 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
273 | return 0; |
274 | } | |
275 | ||
276 | /* station table will be cleared */ | |
277 | priv->assoc_station_added = 0; | |
278 | ||
b481de9c ZY |
279 | /* If we are currently associated and the new config requires |
280 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
281 | * we must clear the associated from the active configuration | |
282 | * before we apply the new config */ | |
43d59b32 | 283 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
284 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
285 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
286 | ||
43d59b32 | 287 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 288 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
289 | &priv->active_rxon); |
290 | ||
291 | /* If the mask clearing failed then we set | |
292 | * active_rxon back to what it was previously */ | |
43d59b32 | 293 | if (ret) { |
b481de9c | 294 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
295 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
296 | return ret; | |
b481de9c | 297 | } |
b481de9c ZY |
298 | } |
299 | ||
300 | IWL_DEBUG_INFO("Sending RXON\n" | |
301 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
302 | "* channel = %d\n" | |
0795af57 | 303 | "* bssid = %s\n", |
43d59b32 | 304 | (new_assoc ? "" : "out"), |
b481de9c | 305 | le16_to_cpu(priv->staging_rxon.channel), |
0795af57 | 306 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 307 | |
099b40b7 | 308 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
309 | |
310 | /* Apply the new configuration | |
311 | * RXON unassoc clears the station table in uCode, send it before | |
312 | * we add the bcast station. If assoc bit is set, we will send RXON | |
313 | * after having added the bcast and bssid station. | |
314 | */ | |
315 | if (!new_assoc) { | |
316 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 317 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
318 | if (ret) { |
319 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
320 | return ret; | |
321 | } | |
322 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
323 | } |
324 | ||
37deb2a0 | 325 | iwl_clear_stations_table(priv); |
556f8db7 | 326 | |
b481de9c ZY |
327 | if (!priv->error_recovering) |
328 | priv->start_calib = 0; | |
329 | ||
b481de9c | 330 | /* Add the broadcast address so we can send broadcast frames */ |
4f40e4d9 | 331 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 332 | IWL_INVALID_STATION) { |
b481de9c ZY |
333 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
334 | return -EIO; | |
335 | } | |
336 | ||
337 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
338 | * add the IWL_AP_ID to the station rate table */ | |
9185159d TW |
339 | if (new_assoc) { |
340 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
341 | ret = iwl_rxon_add_station(priv, | |
342 | priv->active_rxon.bssid_addr, 1); | |
343 | if (ret == IWL_INVALID_STATION) { | |
344 | IWL_ERROR("Error adding AP address for TX.\n"); | |
345 | return -EIO; | |
346 | } | |
347 | priv->assoc_station_added = 1; | |
348 | if (priv->default_wep_key && | |
349 | iwl_send_static_wepkey_cmd(priv, 0)) | |
350 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c | 351 | } |
43d59b32 EG |
352 | |
353 | /* Apply the new configuration | |
354 | * RXON assoc doesn't clear the station table in uCode, | |
355 | */ | |
356 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
357 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
358 | if (ret) { | |
359 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
360 | return ret; | |
361 | } | |
362 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
363 | } |
364 | ||
36da7d70 ZY |
365 | iwl_init_sensitivity(priv); |
366 | ||
367 | /* If we issue a new RXON command which required a tune then we must | |
368 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
369 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | |
370 | if (ret) { | |
371 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
372 | return ret; | |
373 | } | |
374 | ||
b481de9c ZY |
375 | return 0; |
376 | } | |
377 | ||
5da4b55f MA |
378 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
379 | { | |
380 | ||
c7de35cd | 381 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
382 | iwl4965_commit_rxon(priv); |
383 | } | |
384 | ||
c79dd5b5 | 385 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 386 | { |
bb8c093b | 387 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
388 | .flags = 3, |
389 | .lead_time = 0xAA, | |
390 | .max_kill = 1, | |
391 | .kill_ack_mask = 0, | |
392 | .kill_cts_mask = 0, | |
393 | }; | |
394 | ||
857485c0 | 395 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 396 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
397 | } |
398 | ||
fcab423d | 399 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
400 | { |
401 | struct list_head *element; | |
402 | ||
403 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
404 | priv->frames_count); | |
405 | ||
406 | while (!list_empty(&priv->free_frames)) { | |
407 | element = priv->free_frames.next; | |
408 | list_del(element); | |
fcab423d | 409 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
410 | priv->frames_count--; |
411 | } | |
412 | ||
413 | if (priv->frames_count) { | |
414 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
415 | priv->frames_count); | |
416 | priv->frames_count = 0; | |
417 | } | |
418 | } | |
419 | ||
fcab423d | 420 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 421 | { |
fcab423d | 422 | struct iwl_frame *frame; |
b481de9c ZY |
423 | struct list_head *element; |
424 | if (list_empty(&priv->free_frames)) { | |
425 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
426 | if (!frame) { | |
427 | IWL_ERROR("Could not allocate frame!\n"); | |
428 | return NULL; | |
429 | } | |
430 | ||
431 | priv->frames_count++; | |
432 | return frame; | |
433 | } | |
434 | ||
435 | element = priv->free_frames.next; | |
436 | list_del(element); | |
fcab423d | 437 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
438 | } |
439 | ||
fcab423d | 440 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
441 | { |
442 | memset(frame, 0, sizeof(*frame)); | |
443 | list_add(&frame->list, &priv->free_frames); | |
444 | } | |
445 | ||
4bf64efd TW |
446 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
447 | struct ieee80211_hdr *hdr, | |
448 | const u8 *dest, int left) | |
b481de9c | 449 | { |
3109ece1 | 450 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
451 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
452 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
453 | return 0; | |
454 | ||
455 | if (priv->ibss_beacon->len > left) | |
456 | return 0; | |
457 | ||
458 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
459 | ||
460 | return priv->ibss_beacon->len; | |
461 | } | |
462 | ||
39e88504 | 463 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 464 | { |
39e88504 GC |
465 | int i; |
466 | int rate_mask; | |
467 | ||
468 | /* Set rate mask*/ | |
469 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
470 | rate_mask = priv->active_rate_basic & 0xF; | |
471 | else | |
472 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 473 | |
39e88504 | 474 | /* Find lowest valid rate */ |
b481de9c | 475 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 476 | i = iwl_rates[i].next_ieee) { |
b481de9c | 477 | if (rate_mask & (1 << i)) |
1826dcc0 | 478 | return iwl_rates[i].plcp; |
b481de9c ZY |
479 | } |
480 | ||
39e88504 GC |
481 | /* No valid rate was found. Assign the lowest one */ |
482 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
483 | return IWL_RATE_1M_PLCP; | |
484 | else | |
485 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
486 | } |
487 | ||
4bf64efd TW |
488 | unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, |
489 | struct iwl_frame *frame, u8 rate) | |
490 | { | |
491 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
492 | unsigned int frame_size; | |
493 | ||
494 | tx_beacon_cmd = &frame->u.beacon; | |
495 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | |
496 | ||
497 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | |
498 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
499 | ||
500 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | |
501 | iwl_bcast_addr, | |
502 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | |
503 | ||
504 | BUG_ON(frame_size > MAX_MPDU_SIZE); | |
505 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | |
506 | ||
507 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | |
508 | tx_beacon_cmd->tx.rate_n_flags = | |
509 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | |
510 | else | |
511 | tx_beacon_cmd->tx.rate_n_flags = | |
512 | iwl_hw_set_rate_n_flags(rate, 0); | |
513 | ||
514 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
515 | TX_CMD_FLG_TSF_MSK | | |
516 | TX_CMD_FLG_STA_RATE_MSK; | |
517 | ||
518 | return sizeof(*tx_beacon_cmd) + frame_size; | |
519 | } | |
c79dd5b5 | 520 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 521 | { |
fcab423d | 522 | struct iwl_frame *frame; |
b481de9c ZY |
523 | unsigned int frame_size; |
524 | int rc; | |
525 | u8 rate; | |
526 | ||
fcab423d | 527 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
528 | |
529 | if (!frame) { | |
530 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
531 | "command.\n"); | |
532 | return -ENOMEM; | |
533 | } | |
534 | ||
39e88504 | 535 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 536 | |
bb8c093b | 537 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 538 | |
857485c0 | 539 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
540 | &frame->u.cmd[0]); |
541 | ||
fcab423d | 542 | iwl_free_frame(priv, frame); |
b481de9c ZY |
543 | |
544 | return rc; | |
545 | } | |
546 | ||
b481de9c ZY |
547 | /****************************************************************************** |
548 | * | |
549 | * Misc. internal state and helper functions | |
550 | * | |
551 | ******************************************************************************/ | |
b481de9c | 552 | |
d1141dfb EG |
553 | static void iwl4965_ht_conf(struct iwl_priv *priv, |
554 | struct ieee80211_bss_conf *bss_conf) | |
555 | { | |
556 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
557 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
558 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
559 | ||
560 | IWL_DEBUG_MAC80211("enter: \n"); | |
561 | ||
562 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
563 | ||
564 | if (!iwl_conf->is_ht) | |
565 | return; | |
566 | ||
d1141dfb | 567 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) |
a9841013 | 568 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 569 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 570 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
571 | |
572 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
573 | iwl_conf->max_amsdu_size = | |
574 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
575 | ||
576 | iwl_conf->supported_chan_width = | |
577 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
578 | iwl_conf->extension_chan_offset = | |
579 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
580 | /* If no above or below channel supplied disable FAT channel */ | |
963f5517 EG |
581 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE && |
582 | iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) { | |
583 | iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE; | |
d1141dfb | 584 | iwl_conf->supported_chan_width = 0; |
963f5517 | 585 | } |
d1141dfb | 586 | |
12837be1 RR |
587 | iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2); |
588 | ||
d1141dfb EG |
589 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); |
590 | ||
591 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
592 | iwl_conf->tx_chan_width = | |
593 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
594 | iwl_conf->ht_protection = | |
595 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
596 | iwl_conf->non_GF_STA_present = | |
597 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
598 | ||
599 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
600 | IWL_DEBUG_MAC80211("leave\n"); | |
601 | } | |
602 | ||
b481de9c ZY |
603 | /* |
604 | * QoS support | |
605 | */ | |
1ff50bda | 606 | static void iwl_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c | 607 | { |
b481de9c ZY |
608 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
609 | return; | |
610 | ||
611 | if (!priv->qos_data.qos_enable) | |
612 | return; | |
613 | ||
b481de9c ZY |
614 | priv->qos_data.def_qos_parm.qos_flags = 0; |
615 | ||
616 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
617 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
618 | priv->qos_data.def_qos_parm.qos_flags |= | |
619 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
620 | if (priv->qos_data.qos_active) |
621 | priv->qos_data.def_qos_parm.qos_flags |= | |
622 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
623 | ||
fd105e79 | 624 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 625 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 626 | |
3109ece1 | 627 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
628 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
629 | priv->qos_data.qos_active, | |
630 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 631 | |
1ff50bda EG |
632 | iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM, |
633 | sizeof(struct iwl_qosparam_cmd), | |
634 | &priv->qos_data.def_qos_parm, NULL); | |
b481de9c ZY |
635 | } |
636 | } | |
637 | ||
b481de9c | 638 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
b481de9c | 639 | |
bb8c093b | 640 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
641 | { |
642 | u16 new_val = 0; | |
643 | u16 beacon_factor = 0; | |
644 | ||
645 | beacon_factor = | |
646 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
647 | / MAX_UCODE_BEACON_INTERVAL; | |
648 | new_val = beacon_val / beacon_factor; | |
649 | ||
650 | return cpu_to_le16(new_val); | |
651 | } | |
652 | ||
c79dd5b5 | 653 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
654 | { |
655 | u64 interval_tm_unit; | |
656 | u64 tsf, result; | |
657 | unsigned long flags; | |
658 | struct ieee80211_conf *conf = NULL; | |
659 | u16 beacon_int = 0; | |
660 | ||
661 | conf = ieee80211_get_hw_conf(priv->hw); | |
662 | ||
663 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
664 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
665 | priv->rxon_timing.timestamp.dw[0] = | |
666 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c | 667 | |
b5d7be5e | 668 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
b481de9c | 669 | |
3109ece1 | 670 | tsf = priv->timestamp; |
b481de9c ZY |
671 | |
672 | beacon_int = priv->beacon_int; | |
673 | spin_unlock_irqrestore(&priv->lock, flags); | |
674 | ||
675 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
676 | if (beacon_int == 0) { | |
677 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
678 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
679 | } else { | |
680 | priv->rxon_timing.beacon_interval = | |
681 | cpu_to_le16(beacon_int); | |
682 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 683 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
684 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
685 | } | |
686 | ||
687 | priv->rxon_timing.atim_window = 0; | |
688 | } else { | |
689 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 690 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
691 | /* TODO: we need to get atim_window from upper stack |
692 | * for now we set to 0 */ | |
693 | priv->rxon_timing.atim_window = 0; | |
694 | } | |
695 | ||
696 | interval_tm_unit = | |
697 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
698 | result = do_div(tsf, interval_tm_unit); | |
699 | priv->rxon_timing.beacon_init_val = | |
700 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
701 | ||
702 | IWL_DEBUG_ASSOC | |
703 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
704 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
705 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
706 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
707 | } | |
708 | ||
82a66bbb TW |
709 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
710 | enum ieee80211_band band) | |
b481de9c | 711 | { |
8318d78a | 712 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
713 | priv->staging_rxon.flags &= |
714 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
715 | | RXON_FLG_CCK_MSK); | |
716 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
717 | } else { | |
508e32e1 | 718 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
719 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
720 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
721 | else | |
722 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
723 | ||
724 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
725 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
726 | ||
727 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
728 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
729 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
730 | } | |
731 | } | |
732 | ||
733 | /* | |
01ebd063 | 734 | * initialize rxon structure with default values from eeprom |
b481de9c | 735 | */ |
c79dd5b5 | 736 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 737 | { |
bf85ea4f | 738 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
739 | |
740 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
741 | ||
742 | switch (priv->iw_mode) { | |
743 | case IEEE80211_IF_TYPE_AP: | |
744 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
745 | break; | |
746 | ||
747 | case IEEE80211_IF_TYPE_STA: | |
748 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
749 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
750 | break; | |
751 | ||
752 | case IEEE80211_IF_TYPE_IBSS: | |
753 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
754 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
755 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
756 | RXON_FILTER_ACCEPT_GRP_MSK; | |
757 | break; | |
758 | ||
759 | case IEEE80211_IF_TYPE_MNTR: | |
760 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
761 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
762 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
763 | break; | |
69dc5d9d TW |
764 | default: |
765 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
766 | break; | |
b481de9c ZY |
767 | } |
768 | ||
769 | #if 0 | |
770 | /* TODO: Figure out when short_preamble would be set and cache from | |
771 | * that */ | |
772 | if (!hw_to_local(priv->hw)->short_preamble) | |
773 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
774 | else | |
775 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
776 | #endif | |
777 | ||
8622e705 | 778 | ch_info = iwl_get_channel_info(priv, priv->band, |
25b3f57c | 779 | le16_to_cpu(priv->active_rxon.channel)); |
b481de9c ZY |
780 | |
781 | if (!ch_info) | |
782 | ch_info = &priv->channel_info[0]; | |
783 | ||
784 | /* | |
785 | * in some case A channels are all non IBSS | |
786 | * in this case force B/G channel | |
787 | */ | |
788 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
789 | !(is_channel_ibss(ch_info))) | |
790 | ch_info = &priv->channel_info[0]; | |
791 | ||
792 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 793 | priv->band = ch_info->band; |
b481de9c | 794 | |
82a66bbb | 795 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
796 | |
797 | priv->staging_rxon.ofdm_basic_rates = | |
798 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
799 | priv->staging_rxon.cck_basic_rates = | |
800 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
801 | ||
802 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
803 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
804 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
805 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
806 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
807 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 808 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
809 | } |
810 | ||
c79dd5b5 | 811 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 812 | { |
b481de9c ZY |
813 | priv->iw_mode = mode; |
814 | ||
bb8c093b | 815 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
816 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
817 | ||
37deb2a0 | 818 | iwl_clear_stations_table(priv); |
b481de9c | 819 | |
fde3571f | 820 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 821 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
822 | return -EAGAIN; |
823 | ||
824 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 825 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
826 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
827 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
828 | return -EAGAIN; | |
829 | } | |
830 | ||
bb8c093b | 831 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
832 | |
833 | return 0; | |
834 | } | |
835 | ||
c79dd5b5 | 836 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 837 | { |
8318d78a | 838 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
839 | struct ieee80211_rate *rate; |
840 | int i; | |
841 | ||
d1141dfb | 842 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
843 | if (!hw) { |
844 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
845 | return; | |
846 | } | |
b481de9c ZY |
847 | |
848 | priv->active_rate = 0; | |
849 | priv->active_rate_basic = 0; | |
850 | ||
8318d78a JB |
851 | for (i = 0; i < hw->n_bitrates; i++) { |
852 | rate = &(hw->bitrates[i]); | |
853 | if (rate->hw_value < IWL_RATE_COUNT) | |
854 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
855 | } |
856 | ||
857 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
858 | priv->active_rate, priv->active_rate_basic); | |
859 | ||
860 | /* | |
861 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
862 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
863 | * OFDM | |
864 | */ | |
865 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
866 | priv->staging_rxon.cck_basic_rates = | |
867 | ((priv->active_rate_basic & | |
868 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
869 | else | |
870 | priv->staging_rxon.cck_basic_rates = | |
871 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
872 | ||
873 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
874 | priv->staging_rxon.ofdm_basic_rates = | |
875 | ((priv->active_rate_basic & | |
876 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
877 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
878 | else | |
879 | priv->staging_rxon.ofdm_basic_rates = | |
880 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
881 | } | |
882 | ||
4fc22b21 | 883 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
884 | |
885 | #include "iwl-spectrum.h" | |
886 | ||
887 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
888 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
889 | #define TIME_UNIT 1024 | |
890 | ||
891 | /* | |
892 | * extended beacon time format | |
893 | * time in usec will be changed into a 32-bit value in 8:24 format | |
894 | * the high 1 byte is the beacon counts | |
895 | * the lower 3 bytes is the time in usec within one beacon interval | |
896 | */ | |
897 | ||
bb8c093b | 898 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
899 | { |
900 | u32 quot; | |
901 | u32 rem; | |
902 | u32 interval = beacon_interval * 1024; | |
903 | ||
904 | if (!interval || !usec) | |
905 | return 0; | |
906 | ||
907 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
908 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
909 | ||
910 | return (quot << 24) + rem; | |
911 | } | |
912 | ||
913 | /* base is usually what we get from ucode with each received frame, | |
914 | * the same as HW timer counter counting down | |
915 | */ | |
916 | ||
bb8c093b | 917 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
918 | { |
919 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
920 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
921 | u32 interval = beacon_interval * TIME_UNIT; | |
922 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
923 | (addon & BEACON_TIME_MASK_HIGH); | |
924 | ||
925 | if (base_low > addon_low) | |
926 | res += base_low - addon_low; | |
927 | else if (base_low < addon_low) { | |
928 | res += interval + base_low - addon_low; | |
929 | res += (1 << 24); | |
930 | } else | |
931 | res += (1 << 24); | |
932 | ||
933 | return cpu_to_le32(res); | |
934 | } | |
935 | ||
c79dd5b5 | 936 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
937 | struct ieee80211_measurement_params *params, |
938 | u8 type) | |
939 | { | |
bb8c093b | 940 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 941 | struct iwl_rx_packet *res; |
857485c0 | 942 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
943 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
944 | .data = (void *)&spectrum, | |
945 | .meta.flags = CMD_WANT_SKB, | |
946 | }; | |
947 | u32 add_time = le64_to_cpu(params->start_time); | |
948 | int rc; | |
949 | int spectrum_resp_status; | |
950 | int duration = le16_to_cpu(params->duration); | |
951 | ||
3109ece1 | 952 | if (iwl_is_associated(priv)) |
b481de9c | 953 | add_time = |
bb8c093b | 954 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
955 | le64_to_cpu(params->start_time) - priv->last_tsf, |
956 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
957 | ||
958 | memset(&spectrum, 0, sizeof(spectrum)); | |
959 | ||
960 | spectrum.channel_count = cpu_to_le16(1); | |
961 | spectrum.flags = | |
962 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
963 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
964 | cmd.len = sizeof(spectrum); | |
965 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
966 | ||
3109ece1 | 967 | if (iwl_is_associated(priv)) |
b481de9c | 968 | spectrum.start_time = |
bb8c093b | 969 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
970 | add_time, |
971 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
972 | else | |
973 | spectrum.start_time = 0; | |
974 | ||
975 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
976 | spectrum.channels[0].channel = params->channel; | |
977 | spectrum.channels[0].type = type; | |
978 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
979 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
980 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
981 | ||
857485c0 | 982 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
983 | if (rc) |
984 | return rc; | |
985 | ||
db11d634 | 986 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
987 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
988 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
989 | rc = -EIO; | |
990 | } | |
991 | ||
992 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
993 | switch (spectrum_resp_status) { | |
994 | case 0: /* Command will be handled */ | |
995 | if (res->u.spectrum.id != 0xff) { | |
996 | IWL_DEBUG_INFO | |
997 | ("Replaced existing measurement: %d\n", | |
998 | res->u.spectrum.id); | |
999 | priv->measurement_status &= ~MEASUREMENT_READY; | |
1000 | } | |
1001 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
1002 | rc = 0; | |
1003 | break; | |
1004 | ||
1005 | case 1: /* Command will not be handled */ | |
1006 | rc = -EAGAIN; | |
1007 | break; | |
1008 | } | |
1009 | ||
1010 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1011 | ||
1012 | return rc; | |
1013 | } | |
1014 | #endif | |
1015 | ||
b481de9c ZY |
1016 | /****************************************************************************** |
1017 | * | |
1018 | * Generic RX handler implementations | |
1019 | * | |
1020 | ******************************************************************************/ | |
885ba202 TW |
1021 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1022 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1023 | { |
db11d634 | 1024 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1025 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1026 | struct delayed_work *pwork; |
1027 | ||
1028 | palive = &pkt->u.alive_frame; | |
1029 | ||
1030 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1031 | "0x%01X 0x%01X\n", | |
1032 | palive->is_valid, palive->ver_type, | |
1033 | palive->ver_subtype); | |
1034 | ||
1035 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1036 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1037 | memcpy(&priv->card_alive_init, | |
1038 | &pkt->u.alive_frame, | |
885ba202 | 1039 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1040 | pwork = &priv->init_alive_start; |
1041 | } else { | |
1042 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1043 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1044 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1045 | pwork = &priv->alive_start; |
1046 | } | |
1047 | ||
1048 | /* We delay the ALIVE response by 5ms to | |
1049 | * give the HW RF Kill time to activate... */ | |
1050 | if (palive->is_valid == UCODE_VALID_OK) | |
1051 | queue_delayed_work(priv->workqueue, pwork, | |
1052 | msecs_to_jiffies(5)); | |
1053 | else | |
1054 | IWL_WARNING("uCode did not respond OK.\n"); | |
1055 | } | |
1056 | ||
c79dd5b5 | 1057 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1058 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1059 | { |
db11d634 | 1060 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1061 | |
1062 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1063 | "seq 0x%04X ser 0x%08X\n", | |
1064 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1065 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1066 | pkt->u.err_resp.cmd_id, | |
1067 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1068 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1069 | } | |
1070 | ||
1071 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1072 | ||
a55360e4 | 1073 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1074 | { |
db11d634 | 1075 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1076 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1077 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1078 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1079 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1080 | rxon->channel = csa->channel; | |
1081 | priv->staging_rxon.channel = csa->channel; | |
1082 | } | |
1083 | ||
c79dd5b5 | 1084 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1085 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1086 | { |
4fc22b21 | 1087 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
db11d634 | 1088 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1089 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1090 | |
1091 | if (!report->state) { | |
f3d67999 EK |
1092 | IWL_DEBUG(IWL_DL_11H, |
1093 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1094 | return; |
1095 | } | |
1096 | ||
1097 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1098 | priv->measurement_status |= MEASUREMENT_READY; | |
1099 | #endif | |
1100 | } | |
1101 | ||
c79dd5b5 | 1102 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1103 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1104 | { |
0a6857e7 | 1105 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1106 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1107 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1108 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1109 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1110 | #endif | |
1111 | } | |
1112 | ||
c79dd5b5 | 1113 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1114 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1115 | { |
db11d634 | 1116 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1117 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1118 | "notification for %s:\n", | |
1119 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1120 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1121 | } |
1122 | ||
bb8c093b | 1123 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 1124 | { |
c79dd5b5 TW |
1125 | struct iwl_priv *priv = |
1126 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1127 | struct sk_buff *beacon; |
1128 | ||
1129 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1130 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1131 | |
1132 | if (!beacon) { | |
1133 | IWL_ERROR("update beacon failed\n"); | |
1134 | return; | |
1135 | } | |
1136 | ||
1137 | mutex_lock(&priv->mutex); | |
1138 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1139 | if (priv->ibss_beacon) | |
1140 | dev_kfree_skb(priv->ibss_beacon); | |
1141 | ||
1142 | priv->ibss_beacon = beacon; | |
1143 | mutex_unlock(&priv->mutex); | |
1144 | ||
bb8c093b | 1145 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
1146 | } |
1147 | ||
4e39317d EG |
1148 | /** |
1149 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics | |
1150 | * | |
1151 | * This callback is provided in order to send a statistics request. | |
1152 | * | |
1153 | * This timer function is continually reset to execute within | |
1154 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1155 | * was received. We need to ensure we receive the statistics in order | |
1156 | * to update the temperature used for calibrating the TXPOWER. | |
1157 | */ | |
1158 | static void iwl4965_bg_statistics_periodic(unsigned long data) | |
1159 | { | |
1160 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1161 | ||
1162 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1163 | return; | |
1164 | ||
1165 | iwl_send_statistics_request(priv, CMD_ASYNC); | |
1166 | } | |
1167 | ||
c79dd5b5 | 1168 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1169 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1170 | { |
0a6857e7 | 1171 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1172 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1173 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1174 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1175 | |
1176 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1177 | "tsf %d %d rate %d\n", | |
25a6572c | 1178 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1179 | beacon->beacon_notify_hdr.failure_frame, |
1180 | le32_to_cpu(beacon->ibss_mgr_status), | |
1181 | le32_to_cpu(beacon->high_tsf), | |
1182 | le32_to_cpu(beacon->low_tsf), rate); | |
1183 | #endif | |
1184 | ||
1185 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
1186 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
1187 | queue_work(priv->workqueue, &priv->beacon_update); | |
1188 | } | |
1189 | ||
b481de9c ZY |
1190 | /* Handle notification from uCode that card's power state is changing |
1191 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 1192 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1193 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1194 | { |
db11d634 | 1195 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1196 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1197 | unsigned long status = priv->status; | |
1198 | ||
1199 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1200 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1201 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1202 | ||
1203 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1204 | RF_CARD_DISABLED)) { | |
1205 | ||
3395f6e9 | 1206 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1207 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1208 | ||
3395f6e9 TW |
1209 | if (!iwl_grab_nic_access(priv)) { |
1210 | iwl_write_direct32( | |
b481de9c ZY |
1211 | priv, HBUS_TARG_MBX_C, |
1212 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1213 | ||
3395f6e9 | 1214 | iwl_release_nic_access(priv); |
b481de9c ZY |
1215 | } |
1216 | ||
1217 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1218 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1219 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1220 | if (!iwl_grab_nic_access(priv)) { |
1221 | iwl_write_direct32( | |
b481de9c ZY |
1222 | priv, HBUS_TARG_MBX_C, |
1223 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1224 | ||
3395f6e9 | 1225 | iwl_release_nic_access(priv); |
b481de9c ZY |
1226 | } |
1227 | } | |
1228 | ||
1229 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1230 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1231 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1232 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1233 | if (!iwl_grab_nic_access(priv)) | |
1234 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1235 | } |
1236 | } | |
1237 | ||
1238 | if (flags & HW_CARD_DISABLED) | |
1239 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1240 | else | |
1241 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1242 | ||
1243 | ||
1244 | if (flags & SW_CARD_DISABLED) | |
1245 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1246 | else | |
1247 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1248 | ||
1249 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1250 | iwl_scan_cancel(priv); |
b481de9c ZY |
1251 | |
1252 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1253 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1254 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1255 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1256 | queue_work(priv->workqueue, &priv->rf_kill); | |
1257 | else | |
1258 | wake_up_interruptible(&priv->wait_command_queue); | |
1259 | } | |
1260 | ||
e2e3c57b TW |
1261 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
1262 | { | |
1263 | int ret; | |
1264 | unsigned long flags; | |
1265 | ||
1266 | spin_lock_irqsave(&priv->lock, flags); | |
1267 | ret = iwl_grab_nic_access(priv); | |
1268 | if (ret) | |
1269 | goto err; | |
1270 | ||
1271 | if (src == IWL_PWR_SRC_VAUX) { | |
1272 | u32 val; | |
e7b63581 | 1273 | ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE, |
e2e3c57b TW |
1274 | &val); |
1275 | ||
1276 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | |
1277 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1278 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | |
1279 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1280 | } else { | |
1281 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1282 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | |
1283 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1284 | } | |
1285 | ||
1286 | iwl_release_nic_access(priv); | |
1287 | err: | |
1288 | spin_unlock_irqrestore(&priv->lock, flags); | |
1289 | return ret; | |
1290 | } | |
1291 | ||
b481de9c | 1292 | /** |
bb8c093b | 1293 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1294 | * |
1295 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1296 | * to the host. | |
1297 | * | |
1298 | * This function chains into the hardware specific files for them to setup | |
1299 | * any hardware specific handlers as well. | |
1300 | */ | |
653fa4a0 | 1301 | static void iwl_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1302 | { |
885ba202 | 1303 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
bb8c093b CH |
1304 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; |
1305 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 1306 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
1307 | iwl4965_rx_spectrum_measure_notif; |
1308 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 1309 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
1310 | iwl4965_rx_pm_debug_statistics_notif; |
1311 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 1312 | |
9fbab516 BC |
1313 | /* |
1314 | * The same handler is used for both the REPLY to a discrete | |
1315 | * statistics request from the host as well as for the periodic | |
1316 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1317 | */ |
8f91aecb EG |
1318 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; |
1319 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; | |
2a421b91 TW |
1320 | |
1321 | iwl_setup_rx_scan_handlers(priv); | |
1322 | ||
37a44211 | 1323 | /* status change handler */ |
bb8c093b | 1324 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; |
b481de9c | 1325 | |
c1354754 TW |
1326 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1327 | iwl_rx_missed_beacon_notif; | |
37a44211 | 1328 | /* Rx handlers */ |
1781a07f EG |
1329 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy; |
1330 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx; | |
653fa4a0 EG |
1331 | /* block ack */ |
1332 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba; | |
9fbab516 | 1333 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1334 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1335 | } |
1336 | ||
5c0eef96 MA |
1337 | /* |
1338 | * this should be called while priv->lock is locked | |
1339 | */ | |
a55360e4 | 1340 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1341 | { |
a55360e4 TW |
1342 | iwl_rx_allocate(priv); |
1343 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1344 | } |
1345 | ||
b481de9c ZY |
1346 | |
1347 | /** | |
a55360e4 | 1348 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1349 | * |
1350 | * Uses the priv->rx_handlers callback function array to invoke | |
1351 | * the appropriate handlers, including command responses, | |
1352 | * frame-received notifications, and other notifications. | |
1353 | */ | |
a55360e4 | 1354 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1355 | { |
a55360e4 | 1356 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1357 | struct iwl_rx_packet *pkt; |
a55360e4 | 1358 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1359 | u32 r, i; |
1360 | int reclaim; | |
1361 | unsigned long flags; | |
5c0eef96 | 1362 | u8 fill_rx = 0; |
d68ab680 | 1363 | u32 count = 8; |
b481de9c | 1364 | |
6440adb5 BC |
1365 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1366 | * buffer that the driver may process (last buffer filled by ucode). */ | |
d67f5489 | 1367 | r = priv->cfg->ops->lib->shared_mem_rx_idx(priv); |
b481de9c ZY |
1368 | i = rxq->read; |
1369 | ||
1370 | /* Rx interrupt, but nothing sent from uCode */ | |
1371 | if (i == r) | |
f3d67999 | 1372 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1373 | |
a55360e4 | 1374 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1375 | fill_rx = 1; |
1376 | ||
b481de9c ZY |
1377 | while (i != r) { |
1378 | rxb = rxq->queue[i]; | |
1379 | ||
9fbab516 | 1380 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1381 | * then a bug has been introduced in the queue refilling |
1382 | * routines -- catch it here */ | |
1383 | BUG_ON(rxb == NULL); | |
1384 | ||
1385 | rxq->queue[i] = NULL; | |
1386 | ||
1387 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1388 | priv->hw_params.rx_buf_size, |
b481de9c | 1389 | PCI_DMA_FROMDEVICE); |
db11d634 | 1390 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1391 | |
1392 | /* Reclaim a command buffer only if this packet is a response | |
1393 | * to a (driver-originated) command. | |
1394 | * If the packet (e.g. Rx frame) originated from uCode, | |
1395 | * there is no command buffer to reclaim. | |
1396 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1397 | * but apparently a few don't get set; catch them here. */ | |
1398 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1399 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1400 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 1401 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1402 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1403 | (pkt->hdr.cmd != REPLY_TX); | |
1404 | ||
1405 | /* Based on type of command response or notification, | |
1406 | * handle those that need handling via function in | |
bb8c093b | 1407 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c | 1408 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1409 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1410 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1411 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1412 | } else { | |
1413 | /* No handling needed */ | |
f3d67999 | 1414 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1415 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1416 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1417 | pkt->hdr.cmd); | |
1418 | } | |
1419 | ||
1420 | if (reclaim) { | |
9fbab516 | 1421 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1422 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1423 | * as we reclaim the driver command queue */ |
1424 | if (rxb && rxb->skb) | |
17b88929 | 1425 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1426 | else |
1427 | IWL_WARNING("Claim null rxb?\n"); | |
1428 | } | |
1429 | ||
1430 | /* For now we just don't re-use anything. We can tweak this | |
1431 | * later to try and re-use notification packets and SKBs that | |
1432 | * fail to Rx correctly */ | |
1433 | if (rxb->skb != NULL) { | |
1434 | priv->alloc_rxb_skb--; | |
1435 | dev_kfree_skb_any(rxb->skb); | |
1436 | rxb->skb = NULL; | |
1437 | } | |
1438 | ||
1439 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1440 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 1441 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1442 | spin_lock_irqsave(&rxq->lock, flags); |
1443 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1444 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1445 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1446 | /* If there are a lot of unused frames, |
1447 | * restock the Rx queue so ucode wont assert. */ | |
1448 | if (fill_rx) { | |
1449 | count++; | |
1450 | if (count >= 8) { | |
1451 | priv->rxq.read = i; | |
a55360e4 | 1452 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1453 | count = 0; |
1454 | } | |
1455 | } | |
b481de9c ZY |
1456 | } |
1457 | ||
1458 | /* Backtrack one entry */ | |
1459 | priv->rxq.read = i; | |
a55360e4 TW |
1460 | iwl_rx_queue_restock(priv); |
1461 | } | |
a55360e4 | 1462 | |
0a6857e7 | 1463 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1464 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1465 | { |
c1adf9fb | 1466 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 JP |
1467 | DECLARE_MAC_BUF(mac); |
1468 | ||
b481de9c | 1469 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1470 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1471 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1472 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1473 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1474 | le32_to_cpu(rxon->filter_flags)); | |
1475 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1476 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1477 | rxon->ofdm_basic_rates); | |
1478 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
1479 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
1480 | print_mac(mac, rxon->node_addr)); | |
1481 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
1482 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
1483 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1484 | } | |
1485 | #endif | |
1486 | ||
c79dd5b5 | 1487 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1488 | { |
1489 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1490 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1491 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1492 | } |
1493 | ||
0359facc MA |
1494 | /* call this function to flush any scheduled tasklet */ |
1495 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1496 | { | |
1497 | /* wait to make sure we flush pedding tasklet*/ | |
1498 | synchronize_irq(priv->pci_dev->irq); | |
1499 | tasklet_kill(&priv->irq_tasklet); | |
1500 | } | |
1501 | ||
c79dd5b5 | 1502 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1503 | { |
1504 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1505 | ||
1506 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1507 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1508 | |
1509 | /* acknowledge/clear/reset any interrupts still pending | |
1510 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1511 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1512 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1513 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1514 | } | |
1515 | ||
b481de9c | 1516 | |
b481de9c | 1517 | /** |
bb8c093b | 1518 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1519 | */ |
c79dd5b5 | 1520 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1521 | { |
bb8c093b | 1522 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
1523 | set_bit(STATUS_FW_ERROR, &priv->status); |
1524 | ||
1525 | /* Cancel currently queued command. */ | |
1526 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1527 | ||
0a6857e7 | 1528 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1529 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1530 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1531 | iwl_dump_nic_event_log(priv); |
bf403db8 | 1532 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
1533 | } |
1534 | #endif | |
1535 | ||
1536 | wake_up_interruptible(&priv->wait_command_queue); | |
1537 | ||
1538 | /* Keep the restart process from trying to send host | |
1539 | * commands by clearing the INIT status bit */ | |
1540 | clear_bit(STATUS_READY, &priv->status); | |
1541 | ||
1542 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1543 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1544 | "Restarting adapter due to uCode error.\n"); |
1545 | ||
3109ece1 | 1546 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1547 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1548 | sizeof(priv->recovery_rxon)); | |
1549 | priv->error_recovering = 1; | |
1550 | } | |
3a1081e8 EK |
1551 | if (priv->cfg->mod_params->restart_fw) |
1552 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1553 | } |
1554 | } | |
1555 | ||
c79dd5b5 | 1556 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1557 | { |
1558 | unsigned long flags; | |
1559 | ||
1560 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1561 | sizeof(priv->staging_rxon)); | |
1562 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 1563 | iwl4965_commit_rxon(priv); |
b481de9c | 1564 | |
4f40e4d9 | 1565 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1566 | |
1567 | spin_lock_irqsave(&priv->lock, flags); | |
1568 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1569 | priv->error_recovering = 0; | |
1570 | spin_unlock_irqrestore(&priv->lock, flags); | |
1571 | } | |
1572 | ||
c79dd5b5 | 1573 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1574 | { |
1575 | u32 inta, handled = 0; | |
1576 | u32 inta_fh; | |
1577 | unsigned long flags; | |
0a6857e7 | 1578 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1579 | u32 inta_mask; |
1580 | #endif | |
1581 | ||
1582 | spin_lock_irqsave(&priv->lock, flags); | |
1583 | ||
1584 | /* Ack/clear/reset pending uCode interrupts. | |
1585 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1586 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1587 | inta = iwl_read32(priv, CSR_INT); |
1588 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1589 | |
1590 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1591 | * Any new interrupts that happen after this, either while we're | |
1592 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1593 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1594 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1595 | |
0a6857e7 | 1596 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1597 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1598 | /* just for debug */ |
3395f6e9 | 1599 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1600 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1601 | inta, inta_mask, inta_fh); | |
1602 | } | |
1603 | #endif | |
1604 | ||
1605 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1606 | * atomic, make sure that inta covers all the interrupts that | |
1607 | * we've discovered, even if FH interrupt came in just after | |
1608 | * reading CSR_INT. */ | |
6f83eaa1 | 1609 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1610 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1611 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1612 | inta |= CSR_INT_BIT_FH_TX; |
1613 | ||
1614 | /* Now service all interrupt bits discovered above. */ | |
1615 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1616 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1617 | ||
1618 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 1619 | iwl4965_disable_interrupts(priv); |
b481de9c | 1620 | |
bb8c093b | 1621 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1622 | |
1623 | handled |= CSR_INT_BIT_HW_ERR; | |
1624 | ||
1625 | spin_unlock_irqrestore(&priv->lock, flags); | |
1626 | ||
1627 | return; | |
1628 | } | |
1629 | ||
0a6857e7 | 1630 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1631 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1632 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1633 | if (inta & CSR_INT_BIT_SCD) |
1634 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1635 | "the frame/frames.\n"); | |
b481de9c ZY |
1636 | |
1637 | /* Alive notification via Rx interrupt will do the real work */ | |
1638 | if (inta & CSR_INT_BIT_ALIVE) | |
1639 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1640 | } | |
1641 | #endif | |
1642 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1643 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1644 | |
9fbab516 | 1645 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1646 | if (inta & CSR_INT_BIT_RF_KILL) { |
1647 | int hw_rf_kill = 0; | |
3395f6e9 | 1648 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1649 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1650 | hw_rf_kill = 1; | |
1651 | ||
f3d67999 | 1652 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1653 | hw_rf_kill ? "disable radio":"enable radio"); |
1654 | ||
a9efa652 EG |
1655 | /* driver only loads ucode once setting the interface up. |
1656 | * the driver as well won't allow loading if RFKILL is set | |
1657 | * therefore no need to restart the driver from this handler | |
1658 | */ | |
1659 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) | |
53e49093 | 1660 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
b481de9c ZY |
1661 | |
1662 | handled |= CSR_INT_BIT_RF_KILL; | |
1663 | } | |
1664 | ||
9fbab516 | 1665 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1666 | if (inta & CSR_INT_BIT_CT_KILL) { |
1667 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1668 | handled |= CSR_INT_BIT_CT_KILL; | |
1669 | } | |
1670 | ||
1671 | /* Error detected by uCode */ | |
1672 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1673 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1674 | inta); | |
bb8c093b | 1675 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1676 | handled |= CSR_INT_BIT_SW_ERR; |
1677 | } | |
1678 | ||
1679 | /* uCode wakes up after power-down sleep */ | |
1680 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1681 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1682 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1683 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1684 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1685 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1686 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1687 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1688 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1689 | |
1690 | handled |= CSR_INT_BIT_WAKEUP; | |
1691 | } | |
1692 | ||
1693 | /* All uCode command responses, including Tx command responses, | |
1694 | * Rx "responses" (frame-received notification), and other | |
1695 | * notifications from uCode come through here*/ | |
1696 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1697 | iwl_rx_handle(priv); |
b481de9c ZY |
1698 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1699 | } | |
1700 | ||
1701 | if (inta & CSR_INT_BIT_FH_TX) { | |
1702 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1703 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1704 | /* FH finished to write, send event */ |
1705 | priv->ucode_write_complete = 1; | |
1706 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1707 | } |
1708 | ||
1709 | if (inta & ~handled) | |
1710 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1711 | ||
1712 | if (inta & ~CSR_INI_SET_MASK) { | |
1713 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1714 | inta & ~CSR_INI_SET_MASK); | |
1715 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1716 | } | |
1717 | ||
1718 | /* Re-enable all interrupts */ | |
0359facc MA |
1719 | /* only Re-enable if diabled by irq */ |
1720 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1721 | iwl4965_enable_interrupts(priv); | |
b481de9c | 1722 | |
0a6857e7 | 1723 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1724 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1725 | inta = iwl_read32(priv, CSR_INT); |
1726 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1727 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1728 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1729 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1730 | } | |
1731 | #endif | |
1732 | spin_unlock_irqrestore(&priv->lock, flags); | |
1733 | } | |
1734 | ||
bb8c093b | 1735 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 1736 | { |
c79dd5b5 | 1737 | struct iwl_priv *priv = data; |
b481de9c ZY |
1738 | u32 inta, inta_mask; |
1739 | u32 inta_fh; | |
1740 | if (!priv) | |
1741 | return IRQ_NONE; | |
1742 | ||
1743 | spin_lock(&priv->lock); | |
1744 | ||
1745 | /* Disable (but don't clear!) interrupts here to avoid | |
1746 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1747 | * If we have something to service, the tasklet will re-enable ints. | |
1748 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1749 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1750 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1751 | |
1752 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1753 | inta = iwl_read32(priv, CSR_INT); |
1754 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1755 | |
1756 | /* Ignore interrupt if there's nothing in NIC to service. | |
1757 | * This may be due to IRQ shared with another device, | |
1758 | * or due to sporadic interrupts thrown from our NIC. */ | |
1759 | if (!inta && !inta_fh) { | |
1760 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1761 | goto none; | |
1762 | } | |
1763 | ||
1764 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1765 | /* Hardware disappeared. It might have already raised |
1766 | * an interrupt */ | |
b481de9c | 1767 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1768 | goto unplugged; |
b481de9c ZY |
1769 | } |
1770 | ||
1771 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1772 | inta, inta_mask, inta_fh); | |
1773 | ||
25c03d8e JP |
1774 | inta &= ~CSR_INT_BIT_SCD; |
1775 | ||
bb8c093b | 1776 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1777 | if (likely(inta || inta_fh)) |
1778 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1779 | |
66fbb541 ON |
1780 | unplugged: |
1781 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1782 | return IRQ_HANDLED; |
1783 | ||
1784 | none: | |
1785 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1786 | /* only Re-enable if diabled by irq */ |
1787 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1788 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
1789 | spin_unlock(&priv->lock); |
1790 | return IRQ_NONE; | |
1791 | } | |
1792 | ||
b481de9c ZY |
1793 | /****************************************************************************** |
1794 | * | |
1795 | * uCode download functions | |
1796 | * | |
1797 | ******************************************************************************/ | |
1798 | ||
c79dd5b5 | 1799 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1800 | { |
98c92211 TW |
1801 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1802 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1803 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1804 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1805 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1806 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1807 | } |
1808 | ||
edcdf8b2 RR |
1809 | static void iwl4965_nic_start(struct iwl_priv *priv) |
1810 | { | |
1811 | /* Remove all resets to allow NIC to operate */ | |
1812 | iwl_write32(priv, CSR_RESET, 0); | |
1813 | } | |
1814 | ||
1815 | ||
b481de9c | 1816 | /** |
bb8c093b | 1817 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1818 | * |
1819 | * Copy into buffers for card to fetch via bus-mastering | |
1820 | */ | |
c79dd5b5 | 1821 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 1822 | { |
14b3d338 | 1823 | struct iwl_ucode *ucode; |
90e759d1 | 1824 | int ret; |
b481de9c | 1825 | const struct firmware *ucode_raw; |
4bf775cd | 1826 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
1827 | u8 *src; |
1828 | size_t len; | |
1829 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
1830 | ||
1831 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1832 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
1833 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
1834 | if (ret < 0) { | |
1835 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1836 | name, ret); | |
b481de9c ZY |
1837 | goto error; |
1838 | } | |
1839 | ||
1840 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1841 | name, ucode_raw->size); | |
1842 | ||
1843 | /* Make sure that we got at least our header! */ | |
1844 | if (ucode_raw->size < sizeof(*ucode)) { | |
1845 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1846 | ret = -EINVAL; |
b481de9c ZY |
1847 | goto err_release; |
1848 | } | |
1849 | ||
1850 | /* Data from ucode file: header followed by uCode images */ | |
1851 | ucode = (void *)ucode_raw->data; | |
1852 | ||
1853 | ver = le32_to_cpu(ucode->ver); | |
1854 | inst_size = le32_to_cpu(ucode->inst_size); | |
1855 | data_size = le32_to_cpu(ucode->data_size); | |
1856 | init_size = le32_to_cpu(ucode->init_size); | |
1857 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1858 | boot_size = le32_to_cpu(ucode->boot_size); | |
1859 | ||
1860 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
1861 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
1862 | inst_size); | |
1863 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1864 | data_size); | |
1865 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1866 | init_size); | |
1867 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1868 | init_data_size); | |
1869 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1870 | boot_size); | |
1871 | ||
1872 | /* Verify size of file vs. image size info in file's header */ | |
1873 | if (ucode_raw->size < sizeof(*ucode) + | |
1874 | inst_size + data_size + init_size + | |
1875 | init_data_size + boot_size) { | |
1876 | ||
1877 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1878 | (int)ucode_raw->size); | |
90e759d1 | 1879 | ret = -EINVAL; |
b481de9c ZY |
1880 | goto err_release; |
1881 | } | |
1882 | ||
1883 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1884 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1885 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1886 | inst_size); | |
1887 | ret = -EINVAL; | |
b481de9c ZY |
1888 | goto err_release; |
1889 | } | |
1890 | ||
099b40b7 | 1891 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
1892 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
1893 | data_size); | |
1894 | ret = -EINVAL; | |
b481de9c ZY |
1895 | goto err_release; |
1896 | } | |
099b40b7 | 1897 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 1898 | IWL_DEBUG_INFO |
90e759d1 TW |
1899 | ("uCode init instr len %d too large to fit in\n", |
1900 | init_size); | |
1901 | ret = -EINVAL; | |
b481de9c ZY |
1902 | goto err_release; |
1903 | } | |
099b40b7 | 1904 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 1905 | IWL_DEBUG_INFO |
90e759d1 TW |
1906 | ("uCode init data len %d too large to fit in\n", |
1907 | init_data_size); | |
1908 | ret = -EINVAL; | |
b481de9c ZY |
1909 | goto err_release; |
1910 | } | |
099b40b7 | 1911 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 1912 | IWL_DEBUG_INFO |
90e759d1 TW |
1913 | ("uCode boot instr len %d too large to fit in\n", |
1914 | boot_size); | |
1915 | ret = -EINVAL; | |
b481de9c ZY |
1916 | goto err_release; |
1917 | } | |
1918 | ||
1919 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
1920 | ||
1921 | /* Runtime instructions and 2 copies of data: | |
1922 | * 1) unmodified from disk | |
1923 | * 2) backup cache for save/restore during power-downs */ | |
1924 | priv->ucode_code.len = inst_size; | |
98c92211 | 1925 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
1926 | |
1927 | priv->ucode_data.len = data_size; | |
98c92211 | 1928 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
1929 | |
1930 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 1931 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
1932 | |
1933 | /* Initialization instructions and data */ | |
90e759d1 TW |
1934 | if (init_size && init_data_size) { |
1935 | priv->ucode_init.len = init_size; | |
98c92211 | 1936 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
1937 | |
1938 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 1939 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
1940 | |
1941 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
1942 | goto err_pci_alloc; | |
1943 | } | |
b481de9c ZY |
1944 | |
1945 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
1946 | if (boot_size) { |
1947 | priv->ucode_boot.len = boot_size; | |
98c92211 | 1948 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 1949 | |
90e759d1 TW |
1950 | if (!priv->ucode_boot.v_addr) |
1951 | goto err_pci_alloc; | |
1952 | } | |
b481de9c ZY |
1953 | |
1954 | /* Copy images into buffers for card's bus-master reads ... */ | |
1955 | ||
1956 | /* Runtime instructions (first block of data in file) */ | |
1957 | src = &ucode->data[0]; | |
1958 | len = priv->ucode_code.len; | |
90e759d1 | 1959 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
1960 | memcpy(priv->ucode_code.v_addr, src, len); |
1961 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
1962 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
1963 | ||
1964 | /* Runtime data (2nd block) | |
bb8c093b | 1965 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
1966 | src = &ucode->data[inst_size]; |
1967 | len = priv->ucode_data.len; | |
90e759d1 | 1968 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
1969 | memcpy(priv->ucode_data.v_addr, src, len); |
1970 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
1971 | ||
1972 | /* Initialization instructions (3rd block) */ | |
1973 | if (init_size) { | |
1974 | src = &ucode->data[inst_size + data_size]; | |
1975 | len = priv->ucode_init.len; | |
90e759d1 TW |
1976 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
1977 | len); | |
b481de9c ZY |
1978 | memcpy(priv->ucode_init.v_addr, src, len); |
1979 | } | |
1980 | ||
1981 | /* Initialization data (4th block) */ | |
1982 | if (init_data_size) { | |
1983 | src = &ucode->data[inst_size + data_size + init_size]; | |
1984 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
1985 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
1986 | len); | |
b481de9c ZY |
1987 | memcpy(priv->ucode_init_data.v_addr, src, len); |
1988 | } | |
1989 | ||
1990 | /* Bootstrap instructions (5th block) */ | |
1991 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
1992 | len = priv->ucode_boot.len; | |
90e759d1 | 1993 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
1994 | memcpy(priv->ucode_boot.v_addr, src, len); |
1995 | ||
1996 | /* We have our copies now, allow OS release its copies */ | |
1997 | release_firmware(ucode_raw); | |
1998 | return 0; | |
1999 | ||
2000 | err_pci_alloc: | |
2001 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 2002 | ret = -ENOMEM; |
bb8c093b | 2003 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
2004 | |
2005 | err_release: | |
2006 | release_firmware(ucode_raw); | |
2007 | ||
2008 | error: | |
90e759d1 | 2009 | return ret; |
b481de9c ZY |
2010 | } |
2011 | ||
b481de9c | 2012 | /** |
4a4a9e81 | 2013 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2014 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2015 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2016 | */ |
4a4a9e81 | 2017 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2018 | { |
57aab75a | 2019 | int ret = 0; |
b481de9c ZY |
2020 | |
2021 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2022 | ||
2023 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2024 | /* We had an error bringing up the hardware, so take it | |
2025 | * all the way back down so we can try again */ | |
2026 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2027 | goto restart; | |
2028 | } | |
2029 | ||
2030 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2031 | * This is a paranoid check, because we would not have gotten the | |
2032 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2033 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2034 | /* Runtime instruction load was bad; |
2035 | * take it all the way back down so we can try again */ | |
2036 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2037 | goto restart; | |
2038 | } | |
2039 | ||
37deb2a0 | 2040 | iwl_clear_stations_table(priv); |
57aab75a TW |
2041 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2042 | if (ret) { | |
b481de9c | 2043 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2044 | ret); |
b481de9c ZY |
2045 | goto restart; |
2046 | } | |
2047 | ||
9fbab516 | 2048 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
2049 | set_bit(STATUS_ALIVE, &priv->status); |
2050 | ||
fee1247a | 2051 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2052 | return; |
2053 | ||
36d6825b | 2054 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2055 | |
2056 | priv->active_rate = priv->rates_mask; | |
2057 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2058 | ||
3109ece1 | 2059 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2060 | struct iwl_rxon_cmd *active_rxon = |
2061 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2062 | |
2063 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2064 | sizeof(priv->staging_rxon)); | |
2065 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2066 | } else { | |
2067 | /* Initialize our rx_config data */ | |
bb8c093b | 2068 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2069 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2070 | } | |
2071 | ||
9fbab516 | 2072 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 2073 | iwl4965_send_bt_config(priv); |
b481de9c | 2074 | |
4a4a9e81 TW |
2075 | iwl_reset_run_time_calib(priv); |
2076 | ||
b481de9c | 2077 | /* Configure the adapter for unassociated operation */ |
bb8c093b | 2078 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2079 | |
2080 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2081 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2082 | |
fe00b5a5 RC |
2083 | iwl_leds_register(priv); |
2084 | ||
b481de9c | 2085 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2086 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2087 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2088 | |
2089 | if (priv->error_recovering) | |
bb8c093b | 2090 | iwl4965_error_recovery(priv); |
b481de9c | 2091 | |
58d0f361 | 2092 | iwl_power_update_mode(priv, 1); |
84363e6e | 2093 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
c46fbefa AK |
2094 | |
2095 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) | |
2096 | iwl4965_set_mode(priv, priv->iw_mode); | |
2097 | ||
b481de9c ZY |
2098 | return; |
2099 | ||
2100 | restart: | |
2101 | queue_work(priv->workqueue, &priv->restart); | |
2102 | } | |
2103 | ||
4e39317d | 2104 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2105 | |
c79dd5b5 | 2106 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2107 | { |
2108 | unsigned long flags; | |
2109 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2110 | |
2111 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2112 | ||
b481de9c ZY |
2113 | if (!exit_pending) |
2114 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2115 | ||
ab53d8af MA |
2116 | iwl_leds_unregister(priv); |
2117 | ||
37deb2a0 | 2118 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2119 | |
2120 | /* Unblock any waiting calls */ | |
2121 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2122 | ||
b481de9c ZY |
2123 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2124 | * exiting the module */ | |
2125 | if (!exit_pending) | |
2126 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2127 | ||
2128 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2129 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2130 | |
2131 | /* tell the device to stop sending interrupts */ | |
0359facc | 2132 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 2133 | iwl4965_disable_interrupts(priv); |
0359facc MA |
2134 | spin_unlock_irqrestore(&priv->lock, flags); |
2135 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2136 | |
2137 | if (priv->mac80211_registered) | |
2138 | ieee80211_stop_queues(priv->hw); | |
2139 | ||
bb8c093b | 2140 | /* If we have not previously called iwl4965_init() then |
b481de9c | 2141 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2142 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2143 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2144 | STATUS_RF_KILL_HW | | |
2145 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2146 | STATUS_RF_KILL_SW | | |
9788864e RC |
2147 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2148 | STATUS_GEO_CONFIGURED | | |
b481de9c | 2149 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
052ec3f1 MA |
2150 | STATUS_IN_SUSPEND | |
2151 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2152 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2153 | goto exit; |
2154 | } | |
2155 | ||
2156 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2157 | * SUSPEND bits and continue taking the NIC down. */ | |
2158 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2159 | STATUS_RF_KILL_HW | | |
2160 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2161 | STATUS_RF_KILL_SW | | |
9788864e RC |
2162 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2163 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2164 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2165 | STATUS_IN_SUSPEND | | |
2166 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
052ec3f1 MA |
2167 | STATUS_FW_ERROR | |
2168 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2169 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2170 | |
2171 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2172 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2173 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2174 | spin_unlock_irqrestore(&priv->lock, flags); |
2175 | ||
da1bc453 | 2176 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2177 | iwl_rxq_stop(priv); |
b481de9c ZY |
2178 | |
2179 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2180 | if (!iwl_grab_nic_access(priv)) { |
2181 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2182 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2183 | iwl_release_nic_access(priv); |
b481de9c ZY |
2184 | } |
2185 | spin_unlock_irqrestore(&priv->lock, flags); | |
2186 | ||
2187 | udelay(5); | |
2188 | ||
7f066108 | 2189 | /* FIXME: apm_ops.suspend(priv) */ |
d535311e GG |
2190 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
2191 | priv->cfg->ops->lib->apm_ops.stop(priv); | |
2192 | else | |
2193 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2194 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2195 | |
2196 | exit: | |
885ba202 | 2197 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2198 | |
2199 | if (priv->ibss_beacon) | |
2200 | dev_kfree_skb(priv->ibss_beacon); | |
2201 | priv->ibss_beacon = NULL; | |
2202 | ||
2203 | /* clear out any free frames */ | |
fcab423d | 2204 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2205 | } |
2206 | ||
c79dd5b5 | 2207 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2208 | { |
2209 | mutex_lock(&priv->mutex); | |
bb8c093b | 2210 | __iwl4965_down(priv); |
b481de9c | 2211 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2212 | |
4e39317d | 2213 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2214 | } |
2215 | ||
2216 | #define MAX_HW_RESTARTS 5 | |
2217 | ||
c79dd5b5 | 2218 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 2219 | { |
57aab75a TW |
2220 | int i; |
2221 | int ret; | |
b481de9c ZY |
2222 | |
2223 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2224 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2225 | return -EIO; | |
2226 | } | |
2227 | ||
e903fbd4 RC |
2228 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2229 | IWL_ERROR("ucode not available for device bringup\n"); | |
2230 | return -EIO; | |
2231 | } | |
2232 | ||
e655b9f0 | 2233 | /* If platform's RF_KILL switch is NOT set to KILL */ |
c1842d61 | 2234 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
e655b9f0 | 2235 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2236 | else |
e655b9f0 | 2237 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2238 | |
c1842d61 TW |
2239 | if (iwl_is_rfkill(priv)) { |
2240 | iwl4965_enable_interrupts(priv); | |
3bff19c2 EG |
2241 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2242 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | |
c1842d61 | 2243 | return 0; |
b481de9c ZY |
2244 | } |
2245 | ||
3395f6e9 | 2246 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2247 | |
399f4900 RR |
2248 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2249 | if (ret) { | |
2250 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2251 | return ret; | |
2252 | } | |
2253 | ||
1053d35f | 2254 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2255 | if (ret) { |
2256 | IWL_ERROR("Unable to init nic\n"); | |
2257 | return ret; | |
b481de9c ZY |
2258 | } |
2259 | ||
2260 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2261 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2262 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2263 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2264 | ||
2265 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2266 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 2267 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
2268 | |
2269 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2270 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2271 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2272 | |
2273 | /* Copy original ucode data image from disk into backup cache. | |
2274 | * This will be used to initialize the on-board processor's | |
2275 | * data SRAM for a clean start when the runtime program first loads. */ | |
2276 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2277 | priv->ucode_data.len); |
b481de9c | 2278 | |
b481de9c ZY |
2279 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2280 | ||
37deb2a0 | 2281 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2282 | |
2283 | /* load bootstrap state machine, | |
2284 | * load bootstrap program into processor's memory, | |
2285 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2286 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2287 | |
57aab75a TW |
2288 | if (ret) { |
2289 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2290 | continue; |
2291 | } | |
2292 | ||
f3d5b45b EG |
2293 | /* Clear out the uCode error bit if it is set */ |
2294 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2295 | ||
b481de9c | 2296 | /* start card; "initialize" will load runtime ucode */ |
edcdf8b2 | 2297 | iwl4965_nic_start(priv); |
b481de9c | 2298 | |
b481de9c ZY |
2299 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2300 | ||
2301 | return 0; | |
2302 | } | |
2303 | ||
2304 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 2305 | __iwl4965_down(priv); |
64e72c3e | 2306 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2307 | |
2308 | /* tried to restart and config the device for as long as our | |
2309 | * patience could withstand */ | |
2310 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2311 | return -EIO; | |
2312 | } | |
2313 | ||
2314 | ||
2315 | /***************************************************************************** | |
2316 | * | |
2317 | * Workqueue callbacks | |
2318 | * | |
2319 | *****************************************************************************/ | |
2320 | ||
4a4a9e81 | 2321 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2322 | { |
c79dd5b5 TW |
2323 | struct iwl_priv *priv = |
2324 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2325 | |
2326 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2327 | return; | |
2328 | ||
2329 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2330 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2331 | mutex_unlock(&priv->mutex); |
2332 | } | |
2333 | ||
4a4a9e81 | 2334 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2335 | { |
c79dd5b5 TW |
2336 | struct iwl_priv *priv = |
2337 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2338 | |
2339 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2340 | return; | |
2341 | ||
2342 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2343 | iwl_alive_start(priv); |
b481de9c ZY |
2344 | mutex_unlock(&priv->mutex); |
2345 | } | |
2346 | ||
bb8c093b | 2347 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 2348 | { |
c79dd5b5 | 2349 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2350 | |
2351 | wake_up_interruptible(&priv->wait_command_queue); | |
2352 | ||
2353 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2354 | return; | |
2355 | ||
2356 | mutex_lock(&priv->mutex); | |
2357 | ||
fee1247a | 2358 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2359 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2360 | "HW and/or SW RF Kill no longer active, restarting " |
2361 | "device\n"); | |
2362 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2363 | queue_work(priv->workqueue, &priv->restart); | |
2364 | } else { | |
ad97edd2 MA |
2365 | /* make sure mac80211 stop sending Tx frame */ |
2366 | if (priv->mac80211_registered) | |
2367 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2368 | |
2369 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2370 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2371 | "disabled by SW switch\n"); | |
2372 | else | |
2373 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2374 | "Kill switch must be turned off for " | |
2375 | "wireless networking to work.\n"); | |
2376 | } | |
2377 | mutex_unlock(&priv->mutex); | |
80fcc9e2 | 2378 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2379 | } |
2380 | ||
4419e39b AK |
2381 | static void iwl4965_bg_set_monitor(struct work_struct *work) |
2382 | { | |
2383 | struct iwl_priv *priv = container_of(work, | |
2384 | struct iwl_priv, set_monitor); | |
c46fbefa | 2385 | int ret; |
4419e39b AK |
2386 | |
2387 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2388 | ||
2389 | mutex_lock(&priv->mutex); | |
2390 | ||
c46fbefa AK |
2391 | ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR); |
2392 | ||
2393 | if (ret) { | |
2394 | if (ret == -EAGAIN) | |
2395 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2396 | else | |
2397 | IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret); | |
2398 | } | |
4419e39b AK |
2399 | |
2400 | mutex_unlock(&priv->mutex); | |
2401 | } | |
2402 | ||
16e727e8 EG |
2403 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2404 | { | |
2405 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2406 | run_time_calib_work); | |
2407 | ||
2408 | mutex_lock(&priv->mutex); | |
2409 | ||
2410 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2411 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2412 | mutex_unlock(&priv->mutex); | |
2413 | return; | |
2414 | } | |
2415 | ||
2416 | if (priv->start_calib) { | |
2417 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2418 | ||
2419 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2420 | } | |
2421 | ||
2422 | mutex_unlock(&priv->mutex); | |
2423 | return; | |
2424 | } | |
2425 | ||
bb8c093b | 2426 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 2427 | { |
c79dd5b5 | 2428 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2429 | |
2430 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2431 | return; | |
2432 | ||
2433 | mutex_lock(&priv->mutex); | |
bb8c093b | 2434 | __iwl4965_up(priv); |
b481de9c | 2435 | mutex_unlock(&priv->mutex); |
80fcc9e2 | 2436 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2437 | } |
2438 | ||
bb8c093b | 2439 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 2440 | { |
c79dd5b5 | 2441 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2442 | |
2443 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2444 | return; | |
2445 | ||
bb8c093b | 2446 | iwl4965_down(priv); |
b481de9c ZY |
2447 | queue_work(priv->workqueue, &priv->up); |
2448 | } | |
2449 | ||
bb8c093b | 2450 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2451 | { |
c79dd5b5 TW |
2452 | struct iwl_priv *priv = |
2453 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2454 | |
2455 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2456 | return; | |
2457 | ||
2458 | mutex_lock(&priv->mutex); | |
a55360e4 | 2459 | iwl_rx_replenish(priv); |
b481de9c ZY |
2460 | mutex_unlock(&priv->mutex); |
2461 | } | |
2462 | ||
7878a5a4 MA |
2463 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2464 | ||
508e32e1 | 2465 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 2466 | { |
b481de9c | 2467 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2468 | int ret = 0; |
0795af57 | 2469 | DECLARE_MAC_BUF(mac); |
1ff50bda | 2470 | unsigned long flags; |
b481de9c ZY |
2471 | |
2472 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
3ac7f146 | 2473 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
b481de9c ZY |
2474 | return; |
2475 | } | |
2476 | ||
0795af57 JP |
2477 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
2478 | priv->assoc_id, | |
2479 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
2480 | |
2481 | ||
2482 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2483 | return; | |
2484 | ||
b481de9c | 2485 | |
508e32e1 | 2486 | if (!priv->vif || !priv->is_open) |
948c171c | 2487 | return; |
508e32e1 | 2488 | |
c90a74ba | 2489 | iwl_power_cancel_timeout(priv); |
2a421b91 | 2490 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2491 | |
b481de9c ZY |
2492 | conf = ieee80211_get_hw_conf(priv->hw); |
2493 | ||
2494 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2495 | iwl4965_commit_rxon(priv); |
b481de9c | 2496 | |
bb8c093b CH |
2497 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2498 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2499 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2500 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2501 | if (ret) |
b481de9c ZY |
2502 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2503 | "Attempting to continue.\n"); | |
2504 | ||
2505 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2506 | ||
fd105e79 | 2507 | if (priv->current_ht_config.is_ht) |
47c5196e | 2508 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2509 | |
c7de35cd | 2510 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2511 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2512 | ||
2513 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2514 | priv->assoc_id, priv->beacon_int); | |
2515 | ||
2516 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2517 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2518 | else | |
2519 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2520 | ||
2521 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2522 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2523 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2524 | else | |
2525 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2526 | ||
2527 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2528 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2529 | ||
2530 | } | |
2531 | ||
bb8c093b | 2532 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2533 | |
2534 | switch (priv->iw_mode) { | |
2535 | case IEEE80211_IF_TYPE_STA: | |
b481de9c ZY |
2536 | break; |
2537 | ||
2538 | case IEEE80211_IF_TYPE_IBSS: | |
2539 | ||
c46fbefa AK |
2540 | /* assume default assoc id */ |
2541 | priv->assoc_id = 1; | |
b481de9c | 2542 | |
4f40e4d9 | 2543 | iwl_rxon_add_station(priv, priv->bssid, 0); |
bb8c093b | 2544 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2545 | |
2546 | break; | |
2547 | ||
2548 | default: | |
2549 | IWL_ERROR("%s Should not be called in %d mode\n", | |
3ac7f146 | 2550 | __func__, priv->iw_mode); |
b481de9c ZY |
2551 | break; |
2552 | } | |
2553 | ||
b481de9c ZY |
2554 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) |
2555 | priv->assoc_station_added = 1; | |
2556 | ||
1ff50bda EG |
2557 | spin_lock_irqsave(&priv->lock, flags); |
2558 | iwl_activate_qos(priv, 0); | |
2559 | spin_unlock_irqrestore(&priv->lock, flags); | |
292ae174 | 2560 | |
c90a74ba EG |
2561 | iwl_power_enable_management(priv); |
2562 | ||
2563 | /* Enable Rx differential gain and sensitivity calibrations */ | |
2564 | iwl_chain_noise_reset(priv); | |
2565 | priv->start_calib = 1; | |
2566 | ||
7878a5a4 MA |
2567 | /* we have just associated, don't start scan too early */ |
2568 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
2569 | } |
2570 | ||
76bb77e0 ZY |
2571 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
2572 | ||
2a421b91 | 2573 | static void iwl_bg_scan_completed(struct work_struct *work) |
b481de9c | 2574 | { |
c79dd5b5 TW |
2575 | struct iwl_priv *priv = |
2576 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c | 2577 | |
630fe9b6 | 2578 | IWL_DEBUG_SCAN("SCAN complete scan\n"); |
b481de9c ZY |
2579 | |
2580 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2581 | return; | |
2582 | ||
a0646470 ZY |
2583 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
2584 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 2585 | |
b481de9c ZY |
2586 | ieee80211_scan_completed(priv->hw); |
2587 | ||
2588 | /* Since setting the TXPOWER may have been deferred while | |
2589 | * performing the scan, fire one off */ | |
2590 | mutex_lock(&priv->mutex); | |
630fe9b6 | 2591 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
b481de9c ZY |
2592 | mutex_unlock(&priv->mutex); |
2593 | } | |
2594 | ||
2595 | /***************************************************************************** | |
2596 | * | |
2597 | * mac80211 entry point functions | |
2598 | * | |
2599 | *****************************************************************************/ | |
2600 | ||
154b25ce | 2601 | #define UCODE_READY_TIMEOUT (4 * HZ) |
5a66926a | 2602 | |
bb8c093b | 2603 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2604 | { |
c79dd5b5 | 2605 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2606 | int ret; |
cf88c433 | 2607 | u16 pci_cmd; |
b481de9c ZY |
2608 | |
2609 | IWL_DEBUG_MAC80211("enter\n"); | |
2610 | ||
5a66926a ZY |
2611 | if (pci_enable_device(priv->pci_dev)) { |
2612 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2613 | return -ENODEV; | |
2614 | } | |
2615 | pci_restore_state(priv->pci_dev); | |
2616 | pci_enable_msi(priv->pci_dev); | |
2617 | ||
cf88c433 TW |
2618 | /* enable interrupts if needed: hw bug w/a */ |
2619 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | |
2620 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | |
2621 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
2622 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | |
2623 | } | |
2624 | ||
5a66926a ZY |
2625 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, |
2626 | DRV_NAME, priv); | |
2627 | if (ret) { | |
2628 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2629 | goto out_disable_msi; | |
2630 | } | |
2631 | ||
b481de9c ZY |
2632 | /* we should be verifying the device is ready to be opened */ |
2633 | mutex_lock(&priv->mutex); | |
2634 | ||
c1adf9fb | 2635 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2636 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2637 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2638 | |
5a66926a ZY |
2639 | if (!priv->ucode_code.len) { |
2640 | ret = iwl4965_read_ucode(priv); | |
2641 | if (ret) { | |
2642 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2643 | mutex_unlock(&priv->mutex); | |
2644 | goto out_release_irq; | |
2645 | } | |
2646 | } | |
b481de9c | 2647 | |
e655b9f0 | 2648 | ret = __iwl4965_up(priv); |
5a66926a | 2649 | |
b481de9c | 2650 | mutex_unlock(&priv->mutex); |
5a66926a | 2651 | |
80fcc9e2 AG |
2652 | iwl_rfkill_set_hw_state(priv); |
2653 | ||
e655b9f0 ZY |
2654 | if (ret) |
2655 | goto out_release_irq; | |
2656 | ||
c1842d61 TW |
2657 | if (iwl_is_rfkill(priv)) |
2658 | goto out; | |
2659 | ||
e655b9f0 ZY |
2660 | IWL_DEBUG_INFO("Start UP work done.\n"); |
2661 | ||
2662 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2663 | return 0; | |
2664 | ||
fe9b6b72 | 2665 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2666 | * mac80211 will not be run successfully. */ |
154b25ce EG |
2667 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
2668 | test_bit(STATUS_READY, &priv->status), | |
2669 | UCODE_READY_TIMEOUT); | |
2670 | if (!ret) { | |
2671 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2672 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2673 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2674 | ret = -ETIMEDOUT; | |
2675 | goto out_release_irq; | |
5a66926a | 2676 | } |
fe9b6b72 | 2677 | } |
0a078ffa | 2678 | |
c1842d61 | 2679 | out: |
0a078ffa | 2680 | priv->is_open = 1; |
b481de9c ZY |
2681 | IWL_DEBUG_MAC80211("leave\n"); |
2682 | return 0; | |
5a66926a ZY |
2683 | |
2684 | out_release_irq: | |
2685 | free_irq(priv->pci_dev->irq, priv); | |
2686 | out_disable_msi: | |
2687 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2688 | pci_disable_device(priv->pci_dev); |
2689 | priv->is_open = 0; | |
2690 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2691 | return ret; |
b481de9c ZY |
2692 | } |
2693 | ||
bb8c093b | 2694 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2695 | { |
c79dd5b5 | 2696 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2697 | |
2698 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2699 | |
e655b9f0 ZY |
2700 | if (!priv->is_open) { |
2701 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2702 | return; | |
2703 | } | |
2704 | ||
b481de9c | 2705 | priv->is_open = 0; |
5a66926a | 2706 | |
fee1247a | 2707 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2708 | /* stop mac, cancel any scan request and clear |
2709 | * RXON_FILTER_ASSOC_MSK BIT | |
2710 | */ | |
5a66926a | 2711 | mutex_lock(&priv->mutex); |
2a421b91 | 2712 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2713 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2714 | } |
2715 | ||
5a66926a ZY |
2716 | iwl4965_down(priv); |
2717 | ||
2718 | flush_workqueue(priv->workqueue); | |
2719 | free_irq(priv->pci_dev->irq, priv); | |
2720 | pci_disable_msi(priv->pci_dev); | |
2721 | pci_save_state(priv->pci_dev); | |
2722 | pci_disable_device(priv->pci_dev); | |
948c171c | 2723 | |
b481de9c | 2724 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2725 | } |
2726 | ||
e039fa4a | 2727 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2728 | { |
c79dd5b5 | 2729 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2730 | |
f3674227 | 2731 | IWL_DEBUG_MACDUMP("enter\n"); |
b481de9c | 2732 | |
b481de9c | 2733 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
e039fa4a | 2734 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2735 | |
e039fa4a | 2736 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2737 | dev_kfree_skb_any(skb); |
2738 | ||
f3674227 | 2739 | IWL_DEBUG_MACDUMP("leave\n"); |
b481de9c ZY |
2740 | return 0; |
2741 | } | |
2742 | ||
bb8c093b | 2743 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2744 | struct ieee80211_if_init_conf *conf) |
2745 | { | |
c79dd5b5 | 2746 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2747 | unsigned long flags; |
0795af57 | 2748 | DECLARE_MAC_BUF(mac); |
b481de9c | 2749 | |
32bfd35d | 2750 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2751 | |
32bfd35d JB |
2752 | if (priv->vif) { |
2753 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2754 | return -EOPNOTSUPP; |
b481de9c ZY |
2755 | } |
2756 | ||
2757 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2758 | priv->vif = conf->vif; |
b481de9c ZY |
2759 | |
2760 | spin_unlock_irqrestore(&priv->lock, flags); | |
2761 | ||
2762 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2763 | |
2764 | if (conf->mac_addr) { | |
2765 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
2766 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
2767 | } | |
b481de9c | 2768 | |
c46fbefa AK |
2769 | if (iwl4965_set_mode(priv, conf->type) == -EAGAIN) |
2770 | /* we are not ready, will run again when ready */ | |
2771 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2772 | |
b481de9c ZY |
2773 | mutex_unlock(&priv->mutex); |
2774 | ||
5a66926a | 2775 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2776 | return 0; |
2777 | } | |
2778 | ||
2779 | /** | |
bb8c093b | 2780 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
2781 | * |
2782 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2783 | * be set inappropriately and the driver currently sets the hardware up to | |
2784 | * use it whenever needed. | |
2785 | */ | |
bb8c093b | 2786 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 2787 | { |
c79dd5b5 | 2788 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2789 | const struct iwl_channel_info *ch_info; |
b481de9c | 2790 | unsigned long flags; |
76bb77e0 | 2791 | int ret = 0; |
82a66bbb | 2792 | u16 channel; |
b481de9c ZY |
2793 | |
2794 | mutex_lock(&priv->mutex); | |
8318d78a | 2795 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2796 | |
14a08a7f | 2797 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2798 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2799 | goto out; |
64e72c3e MA |
2800 | } |
2801 | ||
14a08a7f EG |
2802 | if (!conf->radio_enabled) |
2803 | iwl_radio_kill_sw_disable_radio(priv); | |
2804 | ||
fee1247a | 2805 | if (!iwl_is_ready(priv)) { |
b481de9c | 2806 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2807 | ret = -EIO; |
2808 | goto out; | |
b481de9c ZY |
2809 | } |
2810 | ||
1ea87396 | 2811 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2812 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
2813 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
2814 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 2815 | mutex_unlock(&priv->mutex); |
a0646470 | 2816 | return 0; |
b481de9c ZY |
2817 | } |
2818 | ||
82a66bbb TW |
2819 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2820 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2821 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2822 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2823 | ret = -EINVAL; |
2824 | goto out; | |
b481de9c ZY |
2825 | } |
2826 | ||
398f9e76 AK |
2827 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS && |
2828 | !is_channel_ibss(ch_info)) { | |
2829 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2830 | conf->channel->hw_value, conf->channel->band); | |
2831 | ret = -EINVAL; | |
2832 | goto out; | |
2833 | } | |
2834 | ||
82a66bbb TW |
2835 | spin_lock_irqsave(&priv->lock, flags); |
2836 | ||
b5d7be5e | 2837 | |
78330fdd | 2838 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2839 | * from any ht related info since 2.4 does not |
2840 | * support ht */ | |
82a66bbb | 2841 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2842 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2843 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2844 | #endif | |
2845 | ) | |
2846 | priv->staging_rxon.flags = 0; | |
b481de9c | 2847 | |
17e72782 | 2848 | iwl_set_rxon_channel(priv, conf->channel); |
b481de9c | 2849 | |
82a66bbb | 2850 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2851 | |
2852 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2853 | * for each band; since the band may have changed, reset |
b481de9c | 2854 | * the rate mask to what mac80211 lists */ |
bb8c093b | 2855 | iwl4965_set_rate(priv); |
b481de9c ZY |
2856 | |
2857 | spin_unlock_irqrestore(&priv->lock, flags); | |
2858 | ||
2859 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2860 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 2861 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2862 | goto out; |
b481de9c ZY |
2863 | } |
2864 | #endif | |
2865 | ||
b481de9c ZY |
2866 | if (!conf->radio_enabled) { |
2867 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2868 | goto out; |
b481de9c ZY |
2869 | } |
2870 | ||
fee1247a | 2871 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2872 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2873 | ret = -EIO; |
2874 | goto out; | |
b481de9c ZY |
2875 | } |
2876 | ||
630fe9b6 TW |
2877 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2878 | priv->tx_power_user_lmt, conf->power_level); | |
2879 | ||
2880 | iwl_set_tx_power(priv, conf->power_level, false); | |
2881 | ||
bb8c093b | 2882 | iwl4965_set_rate(priv); |
b481de9c ZY |
2883 | |
2884 | if (memcmp(&priv->active_rxon, | |
2885 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 2886 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2887 | else |
2888 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
2889 | ||
2890 | IWL_DEBUG_MAC80211("leave\n"); | |
2891 | ||
a0646470 ZY |
2892 | out: |
2893 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 2894 | mutex_unlock(&priv->mutex); |
76bb77e0 | 2895 | return ret; |
b481de9c ZY |
2896 | } |
2897 | ||
c79dd5b5 | 2898 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 2899 | { |
857485c0 | 2900 | int ret = 0; |
1ff50bda | 2901 | unsigned long flags; |
b481de9c | 2902 | |
d986bcd1 | 2903 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
2904 | return; |
2905 | ||
2906 | /* The following should be done only at AP bring up */ | |
5d1e2325 | 2907 | if (!(iwl_is_associated(priv))) { |
b481de9c ZY |
2908 | |
2909 | /* RXON - unassoc (to set timing command) */ | |
2910 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2911 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2912 | |
2913 | /* RXON Timing */ | |
bb8c093b CH |
2914 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2915 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2916 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2917 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2918 | if (ret) |
b481de9c ZY |
2919 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2920 | "Attempting to continue.\n"); | |
2921 | ||
c7de35cd | 2922 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2923 | |
2924 | /* FIXME: what should be the assoc_id for AP? */ | |
2925 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
2926 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2927 | priv->staging_rxon.flags |= | |
2928 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2929 | else | |
2930 | priv->staging_rxon.flags &= | |
2931 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2932 | ||
2933 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2934 | if (priv->assoc_capability & | |
2935 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2936 | priv->staging_rxon.flags |= | |
2937 | RXON_FLG_SHORT_SLOT_MSK; | |
2938 | else | |
2939 | priv->staging_rxon.flags &= | |
2940 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2941 | ||
2942 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2943 | priv->staging_rxon.flags &= | |
2944 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2945 | } | |
2946 | /* restore RXON assoc */ | |
2947 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2948 | iwl4965_commit_rxon(priv); |
1ff50bda EG |
2949 | spin_lock_irqsave(&priv->lock, flags); |
2950 | iwl_activate_qos(priv, 1); | |
2951 | spin_unlock_irqrestore(&priv->lock, flags); | |
4f40e4d9 | 2952 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 2953 | } |
bb8c093b | 2954 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2955 | |
2956 | /* FIXME - we need to add code here to detect a totally new | |
2957 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
2958 | * clear sta table, add BCAST sta... */ | |
2959 | } | |
2960 | ||
9d139c81 JB |
2961 | /* temporary */ |
2962 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb); | |
2963 | ||
32bfd35d JB |
2964 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
2965 | struct ieee80211_vif *vif, | |
b481de9c ZY |
2966 | struct ieee80211_if_conf *conf) |
2967 | { | |
c79dd5b5 | 2968 | struct iwl_priv *priv = hw->priv; |
0795af57 | 2969 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
2970 | unsigned long flags; |
2971 | int rc; | |
2972 | ||
2973 | if (conf == NULL) | |
2974 | return -EIO; | |
2975 | ||
b716bb91 EG |
2976 | if (priv->vif != vif) { |
2977 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
2978 | return 0; |
2979 | } | |
2980 | ||
9d139c81 JB |
2981 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS && |
2982 | conf->changed & IEEE80211_IFCC_BEACON) { | |
2983 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
2984 | if (!beacon) | |
2985 | return -ENOMEM; | |
2986 | rc = iwl4965_mac_beacon_update(hw, beacon); | |
2987 | if (rc) | |
2988 | return rc; | |
2989 | } | |
2990 | ||
b481de9c | 2991 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
9d139c81 | 2992 | (!conf->ssid_len)) { |
b481de9c ZY |
2993 | IWL_DEBUG_MAC80211 |
2994 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
2995 | return 0; | |
2996 | } | |
2997 | ||
fee1247a | 2998 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
2999 | return -EAGAIN; |
3000 | ||
b481de9c ZY |
3001 | mutex_lock(&priv->mutex); |
3002 | ||
b481de9c | 3003 | if (conf->bssid) |
0795af57 JP |
3004 | IWL_DEBUG_MAC80211("bssid: %s\n", |
3005 | print_mac(mac, conf->bssid)); | |
b481de9c | 3006 | |
4150c572 JB |
3007 | /* |
3008 | * very dubious code was here; the probe filtering flag is never set: | |
3009 | * | |
b481de9c ZY |
3010 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
3011 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 3012 | */ |
b481de9c ZY |
3013 | |
3014 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
3015 | if (!conf->bssid) { | |
3016 | conf->bssid = priv->mac_addr; | |
3017 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
3018 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
3019 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
3020 | } |
3021 | if (priv->ibss_beacon) | |
3022 | dev_kfree_skb(priv->ibss_beacon); | |
3023 | ||
9d139c81 | 3024 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
3025 | } |
3026 | ||
fee1247a | 3027 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3028 | goto done; |
3029 | ||
b481de9c ZY |
3030 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3031 | !is_multicast_ether_addr(conf->bssid)) { | |
3032 | /* If there is currently a HW scan going on in the background | |
3033 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3034 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3035 | IWL_WARNING("Aborted scan still in progress " |
3036 | "after 100ms\n"); | |
3037 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3038 | mutex_unlock(&priv->mutex); | |
3039 | return -EAGAIN; | |
3040 | } | |
3041 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3042 | ||
3043 | /* TODO: Audit driver for usage of these members and see | |
3044 | * if mac80211 deprecates them (priv->bssid looks like it | |
3045 | * shouldn't be there, but I haven't scanned the IBSS code | |
3046 | * to verify) - jpk */ | |
3047 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3048 | ||
3049 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 3050 | iwl4965_config_ap(priv); |
b481de9c | 3051 | else { |
bb8c093b | 3052 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 3053 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
4f40e4d9 | 3054 | iwl_rxon_add_station( |
b481de9c ZY |
3055 | priv, priv->active_rxon.bssid_addr, 1); |
3056 | } | |
3057 | ||
3058 | } else { | |
2a421b91 | 3059 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3060 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3061 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3062 | } |
3063 | ||
fde3571f | 3064 | done: |
b481de9c ZY |
3065 | spin_lock_irqsave(&priv->lock, flags); |
3066 | if (!conf->ssid_len) | |
3067 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3068 | else | |
3069 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
3070 | ||
3071 | priv->essid_len = conf->ssid_len; | |
3072 | spin_unlock_irqrestore(&priv->lock, flags); | |
3073 | ||
3074 | IWL_DEBUG_MAC80211("leave\n"); | |
3075 | mutex_unlock(&priv->mutex); | |
3076 | ||
3077 | return 0; | |
3078 | } | |
3079 | ||
bb8c093b | 3080 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3081 | unsigned int changed_flags, |
3082 | unsigned int *total_flags, | |
3083 | int mc_count, struct dev_addr_list *mc_list) | |
3084 | { | |
4419e39b | 3085 | struct iwl_priv *priv = hw->priv; |
25b3f57c RF |
3086 | |
3087 | if (changed_flags & (*total_flags) & FIF_OTHER_BSS) { | |
3088 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
3089 | IEEE80211_IF_TYPE_MNTR, | |
3090 | changed_flags, *total_flags); | |
3091 | /* queue work 'cuz mac80211 is holding a lock which | |
3092 | * prevents us from issuing (synchronous) f/w cmds */ | |
3093 | queue_work(priv->workqueue, &priv->set_monitor); | |
4419e39b | 3094 | } |
25b3f57c RF |
3095 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | |
3096 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | |
4150c572 JB |
3097 | } |
3098 | ||
bb8c093b | 3099 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3100 | struct ieee80211_if_init_conf *conf) |
3101 | { | |
c79dd5b5 | 3102 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3103 | |
3104 | IWL_DEBUG_MAC80211("enter\n"); | |
3105 | ||
3106 | mutex_lock(&priv->mutex); | |
948c171c | 3107 | |
fee1247a | 3108 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3109 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f MA |
3110 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
3111 | iwl4965_commit_rxon(priv); | |
3112 | } | |
32bfd35d JB |
3113 | if (priv->vif == conf->vif) { |
3114 | priv->vif = NULL; | |
b481de9c ZY |
3115 | memset(priv->bssid, 0, ETH_ALEN); |
3116 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3117 | priv->essid_len = 0; | |
3118 | } | |
3119 | mutex_unlock(&priv->mutex); | |
3120 | ||
3121 | IWL_DEBUG_MAC80211("leave\n"); | |
3122 | ||
3123 | } | |
471b3efd | 3124 | |
3109ece1 | 3125 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
3126 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
3127 | struct ieee80211_vif *vif, | |
3128 | struct ieee80211_bss_conf *bss_conf, | |
3129 | u32 changes) | |
220173b0 | 3130 | { |
c79dd5b5 | 3131 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3132 | |
3109ece1 TW |
3133 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3134 | ||
471b3efd | 3135 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3136 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3137 | bss_conf->use_short_preamble); | |
471b3efd | 3138 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3139 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3140 | else | |
3141 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3142 | } | |
3143 | ||
471b3efd | 3144 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3145 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3146 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3147 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3148 | else | |
3149 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3150 | } | |
3151 | ||
98952d5d | 3152 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 3153 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 3154 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 3155 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3156 | } |
3157 | ||
471b3efd | 3158 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3159 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3160 | /* This should never happen as this function should |
3161 | * never be called from interrupt context. */ | |
3162 | if (WARN_ON_ONCE(in_interrupt())) | |
3163 | return; | |
3109ece1 TW |
3164 | if (bss_conf->assoc) { |
3165 | priv->assoc_id = bss_conf->aid; | |
3166 | priv->beacon_int = bss_conf->beacon_int; | |
b5d7be5e | 3167 | priv->power_data.dtim_period = bss_conf->dtim_period; |
3109ece1 TW |
3168 | priv->timestamp = bss_conf->timestamp; |
3169 | priv->assoc_capability = bss_conf->assoc_capability; | |
3170 | priv->next_scan_jiffies = jiffies + | |
3171 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
3172 | mutex_lock(&priv->mutex); |
3173 | iwl4965_post_associate(priv); | |
3174 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
3175 | } else { |
3176 | priv->assoc_id = 0; | |
3177 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3178 | } | |
3179 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3180 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3181 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3182 | } |
3183 | ||
220173b0 | 3184 | } |
b481de9c | 3185 | |
cb43dc25 | 3186 | static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len) |
b481de9c | 3187 | { |
cb43dc25 | 3188 | int ret; |
b481de9c | 3189 | unsigned long flags; |
c79dd5b5 | 3190 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3191 | |
3192 | IWL_DEBUG_MAC80211("enter\n"); | |
3193 | ||
052c4b9f | 3194 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3195 | spin_lock_irqsave(&priv->lock, flags); |
3196 | ||
fee1247a | 3197 | if (!iwl_is_ready_rf(priv)) { |
cb43dc25 | 3198 | ret = -EIO; |
b481de9c ZY |
3199 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); |
3200 | goto out_unlock; | |
3201 | } | |
3202 | ||
3203 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
cb43dc25 | 3204 | ret = -EIO; |
b481de9c ZY |
3205 | IWL_ERROR("ERROR: APs don't scan\n"); |
3206 | goto out_unlock; | |
3207 | } | |
3208 | ||
7878a5a4 MA |
3209 | /* we don't schedule scan within next_scan_jiffies period */ |
3210 | if (priv->next_scan_jiffies && | |
cb43dc25 | 3211 | time_after(priv->next_scan_jiffies, jiffies)) { |
681c0050 | 3212 | IWL_DEBUG_SCAN("scan rejected: within next scan period\n"); |
cb43dc25 | 3213 | ret = -EAGAIN; |
7878a5a4 MA |
3214 | goto out_unlock; |
3215 | } | |
b481de9c | 3216 | /* if we just finished scan ask for delay */ |
681c0050 | 3217 | if (iwl_is_associated(priv) && priv->last_scan_jiffies && |
cb43dc25 | 3218 | time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) { |
681c0050 | 3219 | IWL_DEBUG_SCAN("scan rejected: within previous scan period\n"); |
cb43dc25 | 3220 | ret = -EAGAIN; |
b481de9c ZY |
3221 | goto out_unlock; |
3222 | } | |
cb43dc25 | 3223 | if (ssid_len) { |
b481de9c | 3224 | priv->one_direct_scan = 1; |
cb43dc25 | 3225 | priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE); |
b481de9c | 3226 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); |
cb43dc25 | 3227 | } else { |
948c171c | 3228 | priv->one_direct_scan = 0; |
cb43dc25 | 3229 | } |
b481de9c | 3230 | |
cb43dc25 | 3231 | ret = iwl_scan_initiate(priv); |
b481de9c ZY |
3232 | |
3233 | IWL_DEBUG_MAC80211("leave\n"); | |
3234 | ||
3235 | out_unlock: | |
3236 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3237 | mutex_unlock(&priv->mutex); |
b481de9c | 3238 | |
cb43dc25 | 3239 | return ret; |
b481de9c ZY |
3240 | } |
3241 | ||
ab885f8c EG |
3242 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
3243 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
3244 | u32 iv32, u16 *phase1key) | |
3245 | { | |
3246 | struct iwl_priv *priv = hw->priv; | |
3247 | u8 sta_id = IWL_INVALID_STATION; | |
3248 | unsigned long flags; | |
3249 | __le16 key_flags = 0; | |
3250 | int i; | |
3251 | DECLARE_MAC_BUF(mac); | |
3252 | ||
3253 | IWL_DEBUG_MAC80211("enter\n"); | |
3254 | ||
947b13a7 | 3255 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
3256 | if (sta_id == IWL_INVALID_STATION) { |
3257 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3258 | print_mac(mac, addr)); | |
3259 | return; | |
3260 | } | |
3261 | ||
2a421b91 | 3262 | iwl_scan_cancel_timeout(priv, 100); |
ab885f8c EG |
3263 | |
3264 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3265 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3266 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3267 | ||
5425e490 | 3268 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3269 | key_flags |= STA_KEY_MULTICAST_MSK; |
3270 | ||
3271 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3272 | ||
ab885f8c EG |
3273 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3274 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3275 | ||
3276 | for (i = 0; i < 5; i++) | |
3277 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3278 | cpu_to_le16(phase1key[i]); | |
3279 | ||
3280 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3281 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3282 | ||
133636de | 3283 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3284 | |
3285 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3286 | ||
3287 | IWL_DEBUG_MAC80211("leave\n"); | |
3288 | } | |
3289 | ||
bb8c093b | 3290 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3291 | const u8 *local_addr, const u8 *addr, |
3292 | struct ieee80211_key_conf *key) | |
3293 | { | |
c79dd5b5 | 3294 | struct iwl_priv *priv = hw->priv; |
0795af57 | 3295 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
3296 | int ret = 0; |
3297 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3298 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3299 | |
3300 | IWL_DEBUG_MAC80211("enter\n"); | |
3301 | ||
099b40b7 | 3302 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3303 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3304 | return -EOPNOTSUPP; | |
3305 | } | |
3306 | ||
3307 | if (is_zero_ether_addr(addr)) | |
3308 | /* only support pairwise keys */ | |
3309 | return -EOPNOTSUPP; | |
3310 | ||
947b13a7 | 3311 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
3312 | if (sta_id == IWL_INVALID_STATION) { |
3313 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3314 | print_mac(mac, addr)); | |
3315 | return -EINVAL; | |
b481de9c | 3316 | |
deb09c43 | 3317 | } |
b481de9c | 3318 | |
6974e363 | 3319 | mutex_lock(&priv->mutex); |
2a421b91 | 3320 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3321 | mutex_unlock(&priv->mutex); |
3322 | ||
3323 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3324 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3325 | * in 1X mode. | |
3326 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3327 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
3328 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
3329 | if (cmd == SET_KEY) | |
3330 | is_default_wep_key = !priv->key_mapping_key; | |
3331 | else | |
ccc038ab EG |
3332 | is_default_wep_key = |
3333 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3334 | } |
052c4b9f | 3335 | |
b481de9c | 3336 | switch (cmd) { |
deb09c43 | 3337 | case SET_KEY: |
6974e363 EG |
3338 | if (is_default_wep_key) |
3339 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3340 | else |
7480513f | 3341 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3342 | |
3343 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3344 | break; |
3345 | case DISABLE_KEY: | |
6974e363 EG |
3346 | if (is_default_wep_key) |
3347 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3348 | else |
3ec47732 | 3349 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3350 | |
3351 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3352 | break; |
3353 | default: | |
deb09c43 | 3354 | ret = -EINVAL; |
b481de9c ZY |
3355 | } |
3356 | ||
3357 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3358 | |
deb09c43 | 3359 | return ret; |
b481de9c ZY |
3360 | } |
3361 | ||
e100bb64 | 3362 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3363 | const struct ieee80211_tx_queue_params *params) |
3364 | { | |
c79dd5b5 | 3365 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3366 | unsigned long flags; |
3367 | int q; | |
b481de9c ZY |
3368 | |
3369 | IWL_DEBUG_MAC80211("enter\n"); | |
3370 | ||
fee1247a | 3371 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3372 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3373 | return -EIO; | |
3374 | } | |
3375 | ||
3376 | if (queue >= AC_NUM) { | |
3377 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3378 | return 0; | |
3379 | } | |
3380 | ||
b481de9c ZY |
3381 | if (!priv->qos_data.qos_enable) { |
3382 | priv->qos_data.qos_active = 0; | |
3383 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3384 | return 0; | |
3385 | } | |
3386 | q = AC_NUM - 1 - queue; | |
3387 | ||
3388 | spin_lock_irqsave(&priv->lock, flags); | |
3389 | ||
3390 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3391 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3392 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3393 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3394 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3395 | |
3396 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3397 | priv->qos_data.qos_active = 1; | |
3398 | ||
b481de9c | 3399 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) |
1ff50bda | 3400 | iwl_activate_qos(priv, 1); |
3109ece1 | 3401 | else if (priv->assoc_id && iwl_is_associated(priv)) |
1ff50bda | 3402 | iwl_activate_qos(priv, 0); |
b481de9c | 3403 | |
1ff50bda | 3404 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3405 | |
b481de9c ZY |
3406 | IWL_DEBUG_MAC80211("leave\n"); |
3407 | return 0; | |
3408 | } | |
3409 | ||
d783b061 TW |
3410 | static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, |
3411 | enum ieee80211_ampdu_mlme_action action, | |
3412 | const u8 *addr, u16 tid, u16 *ssn) | |
3413 | { | |
3414 | struct iwl_priv *priv = hw->priv; | |
3415 | DECLARE_MAC_BUF(mac); | |
3416 | ||
3417 | IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n", | |
3418 | print_mac(mac, addr), tid); | |
3419 | ||
3420 | if (!(priv->cfg->sku & IWL_SKU_N)) | |
3421 | return -EACCES; | |
3422 | ||
3423 | switch (action) { | |
3424 | case IEEE80211_AMPDU_RX_START: | |
3425 | IWL_DEBUG_HT("start Rx\n"); | |
3426 | return iwl_rx_agg_start(priv, addr, tid, *ssn); | |
3427 | case IEEE80211_AMPDU_RX_STOP: | |
3428 | IWL_DEBUG_HT("stop Rx\n"); | |
3429 | return iwl_rx_agg_stop(priv, addr, tid); | |
3430 | case IEEE80211_AMPDU_TX_START: | |
3431 | IWL_DEBUG_HT("start Tx\n"); | |
3432 | return iwl_tx_agg_start(priv, addr, tid, ssn); | |
3433 | case IEEE80211_AMPDU_TX_STOP: | |
3434 | IWL_DEBUG_HT("stop Tx\n"); | |
3435 | return iwl_tx_agg_stop(priv, addr, tid); | |
3436 | default: | |
3437 | IWL_DEBUG_HT("unknown\n"); | |
3438 | return -EINVAL; | |
3439 | break; | |
3440 | } | |
3441 | return 0; | |
3442 | } | |
bb8c093b | 3443 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3444 | struct ieee80211_tx_queue_stats *stats) |
3445 | { | |
c79dd5b5 | 3446 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3447 | int i, avail; |
16466903 | 3448 | struct iwl_tx_queue *txq; |
443cfd45 | 3449 | struct iwl_queue *q; |
b481de9c ZY |
3450 | unsigned long flags; |
3451 | ||
3452 | IWL_DEBUG_MAC80211("enter\n"); | |
3453 | ||
fee1247a | 3454 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3455 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3456 | return -EIO; | |
3457 | } | |
3458 | ||
3459 | spin_lock_irqsave(&priv->lock, flags); | |
3460 | ||
3461 | for (i = 0; i < AC_NUM; i++) { | |
3462 | txq = &priv->txq[i]; | |
3463 | q = &txq->q; | |
443cfd45 | 3464 | avail = iwl_queue_space(q); |
b481de9c | 3465 | |
57ffc589 JB |
3466 | stats[i].len = q->n_window - avail; |
3467 | stats[i].limit = q->n_window - q->high_mark; | |
3468 | stats[i].count = q->n_window; | |
b481de9c ZY |
3469 | |
3470 | } | |
3471 | spin_unlock_irqrestore(&priv->lock, flags); | |
3472 | ||
3473 | IWL_DEBUG_MAC80211("leave\n"); | |
3474 | ||
3475 | return 0; | |
3476 | } | |
3477 | ||
bb8c093b | 3478 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3479 | struct ieee80211_low_level_stats *stats) |
3480 | { | |
bf403db8 EK |
3481 | struct iwl_priv *priv = hw->priv; |
3482 | ||
3483 | priv = hw->priv; | |
b481de9c ZY |
3484 | IWL_DEBUG_MAC80211("enter\n"); |
3485 | IWL_DEBUG_MAC80211("leave\n"); | |
3486 | ||
3487 | return 0; | |
3488 | } | |
3489 | ||
bb8c093b | 3490 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3491 | { |
c79dd5b5 | 3492 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3493 | unsigned long flags; |
3494 | ||
3495 | mutex_lock(&priv->mutex); | |
3496 | IWL_DEBUG_MAC80211("enter\n"); | |
3497 | ||
b481de9c | 3498 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3499 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3500 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3501 | |
c7de35cd | 3502 | iwl_reset_qos(priv); |
b481de9c | 3503 | |
b481de9c ZY |
3504 | spin_lock_irqsave(&priv->lock, flags); |
3505 | priv->assoc_id = 0; | |
3506 | priv->assoc_capability = 0; | |
b481de9c ZY |
3507 | priv->assoc_station_added = 0; |
3508 | ||
3509 | /* new association get rid of ibss beacon skb */ | |
3510 | if (priv->ibss_beacon) | |
3511 | dev_kfree_skb(priv->ibss_beacon); | |
3512 | ||
3513 | priv->ibss_beacon = NULL; | |
3514 | ||
3515 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3516 | priv->timestamp = 0; |
b481de9c ZY |
3517 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
3518 | priv->beacon_int = 0; | |
3519 | ||
3520 | spin_unlock_irqrestore(&priv->lock, flags); | |
3521 | ||
fee1247a | 3522 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3523 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3524 | mutex_unlock(&priv->mutex); | |
3525 | return; | |
3526 | } | |
3527 | ||
052c4b9f | 3528 | /* we are restarting association process |
3529 | * clear RXON_FILTER_ASSOC_MSK bit | |
3530 | */ | |
3531 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2a421b91 | 3532 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3533 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3534 | iwl4965_commit_rxon(priv); |
052c4b9f | 3535 | } |
3536 | ||
5da4b55f MA |
3537 | iwl_power_update_mode(priv, 0); |
3538 | ||
b481de9c ZY |
3539 | /* Per mac80211.h: This is only used in IBSS mode... */ |
3540 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 3541 | |
c90a74ba EG |
3542 | /* switch to CAM during association period. |
3543 | * the ucode will block any association/authentication | |
3544 | * frome during assiciation period if it can not hear | |
3545 | * the AP because of PM. the timer enable PM back is | |
3546 | * association do not complete | |
3547 | */ | |
3548 | if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN | | |
3549 | IEEE80211_CHAN_RADAR)) | |
3550 | iwl_power_disable_management(priv, 3000); | |
3551 | ||
b481de9c ZY |
3552 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3553 | mutex_unlock(&priv->mutex); | |
3554 | return; | |
3555 | } | |
3556 | ||
bb8c093b | 3557 | iwl4965_set_rate(priv); |
b481de9c ZY |
3558 | |
3559 | mutex_unlock(&priv->mutex); | |
3560 | ||
3561 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3562 | } |
3563 | ||
e039fa4a | 3564 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3565 | { |
c79dd5b5 | 3566 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3567 | unsigned long flags; |
2ff75b78 | 3568 | __le64 timestamp; |
b481de9c ZY |
3569 | |
3570 | mutex_lock(&priv->mutex); | |
3571 | IWL_DEBUG_MAC80211("enter\n"); | |
3572 | ||
fee1247a | 3573 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3574 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3575 | mutex_unlock(&priv->mutex); | |
3576 | return -EIO; | |
3577 | } | |
3578 | ||
3579 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
3580 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
3581 | mutex_unlock(&priv->mutex); | |
3582 | return -EIO; | |
3583 | } | |
3584 | ||
3585 | spin_lock_irqsave(&priv->lock, flags); | |
3586 | ||
3587 | if (priv->ibss_beacon) | |
3588 | dev_kfree_skb(priv->ibss_beacon); | |
3589 | ||
3590 | priv->ibss_beacon = skb; | |
3591 | ||
3592 | priv->assoc_id = 0; | |
2ff75b78 | 3593 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b94d8eea | 3594 | priv->timestamp = le64_to_cpu(timestamp); |
b481de9c ZY |
3595 | |
3596 | IWL_DEBUG_MAC80211("leave\n"); | |
3597 | spin_unlock_irqrestore(&priv->lock, flags); | |
3598 | ||
c7de35cd | 3599 | iwl_reset_qos(priv); |
b481de9c | 3600 | |
c46fbefa | 3601 | iwl4965_post_associate(priv); |
b481de9c ZY |
3602 | |
3603 | mutex_unlock(&priv->mutex); | |
3604 | ||
3605 | return 0; | |
3606 | } | |
3607 | ||
b481de9c ZY |
3608 | /***************************************************************************** |
3609 | * | |
3610 | * sysfs attributes | |
3611 | * | |
3612 | *****************************************************************************/ | |
3613 | ||
0a6857e7 | 3614 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3615 | |
3616 | /* | |
3617 | * The following adds a new attribute to the sysfs representation | |
3618 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3619 | * used for controlling the debug level. | |
3620 | * | |
3621 | * See the level definitions in iwl for details. | |
3622 | */ | |
3623 | ||
8cf769c6 EK |
3624 | static ssize_t show_debug_level(struct device *d, |
3625 | struct device_attribute *attr, char *buf) | |
b481de9c | 3626 | { |
8cf769c6 EK |
3627 | struct iwl_priv *priv = d->driver_data; |
3628 | ||
3629 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3630 | } |
8cf769c6 EK |
3631 | static ssize_t store_debug_level(struct device *d, |
3632 | struct device_attribute *attr, | |
b481de9c ZY |
3633 | const char *buf, size_t count) |
3634 | { | |
8cf769c6 | 3635 | struct iwl_priv *priv = d->driver_data; |
9257746f TW |
3636 | unsigned long val; |
3637 | int ret; | |
b481de9c | 3638 | |
9257746f TW |
3639 | ret = strict_strtoul(buf, 0, &val); |
3640 | if (ret) | |
b481de9c ZY |
3641 | printk(KERN_INFO DRV_NAME |
3642 | ": %s is not in hex or decimal form.\n", buf); | |
3643 | else | |
8cf769c6 | 3644 | priv->debug_level = val; |
b481de9c ZY |
3645 | |
3646 | return strnlen(buf, count); | |
3647 | } | |
3648 | ||
8cf769c6 EK |
3649 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3650 | show_debug_level, store_debug_level); | |
3651 | ||
b481de9c | 3652 | |
0a6857e7 | 3653 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3654 | |
b481de9c | 3655 | |
bc6f59bc TW |
3656 | static ssize_t show_version(struct device *d, |
3657 | struct device_attribute *attr, char *buf) | |
3658 | { | |
3659 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3660 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3661 | ssize_t pos = 0; |
3662 | u16 eeprom_ver; | |
bc6f59bc TW |
3663 | |
3664 | if (palive->is_valid) | |
f236a265 TW |
3665 | pos += sprintf(buf + pos, |
3666 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3667 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3668 | palive->ucode_major, palive->ucode_minor, |
3669 | palive->sw_rev[0], palive->sw_rev[1], | |
3670 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3671 | else |
f236a265 TW |
3672 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3673 | ||
3674 | if (priv->eeprom) { | |
3675 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3676 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3677 | eeprom_ver); | |
3678 | } else { | |
3679 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3680 | } | |
3681 | ||
3682 | return pos; | |
bc6f59bc TW |
3683 | } |
3684 | ||
3685 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3686 | ||
b481de9c ZY |
3687 | static ssize_t show_temperature(struct device *d, |
3688 | struct device_attribute *attr, char *buf) | |
3689 | { | |
c79dd5b5 | 3690 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3691 | |
fee1247a | 3692 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3693 | return -EAGAIN; |
3694 | ||
91dbc5bd | 3695 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3696 | } |
3697 | ||
3698 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3699 | ||
b481de9c ZY |
3700 | static ssize_t show_tx_power(struct device *d, |
3701 | struct device_attribute *attr, char *buf) | |
3702 | { | |
c79dd5b5 | 3703 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3704 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3705 | } |
3706 | ||
3707 | static ssize_t store_tx_power(struct device *d, | |
3708 | struct device_attribute *attr, | |
3709 | const char *buf, size_t count) | |
3710 | { | |
c79dd5b5 | 3711 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3712 | unsigned long val; |
3713 | int ret; | |
b481de9c | 3714 | |
9257746f TW |
3715 | ret = strict_strtoul(buf, 10, &val); |
3716 | if (ret) | |
b481de9c ZY |
3717 | printk(KERN_INFO DRV_NAME |
3718 | ": %s is not in decimal form.\n", buf); | |
3719 | else | |
630fe9b6 | 3720 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3721 | |
3722 | return count; | |
3723 | } | |
3724 | ||
3725 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3726 | ||
3727 | static ssize_t show_flags(struct device *d, | |
3728 | struct device_attribute *attr, char *buf) | |
3729 | { | |
c79dd5b5 | 3730 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3731 | |
3732 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3733 | } | |
3734 | ||
3735 | static ssize_t store_flags(struct device *d, | |
3736 | struct device_attribute *attr, | |
3737 | const char *buf, size_t count) | |
3738 | { | |
c79dd5b5 | 3739 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3740 | unsigned long val; |
3741 | u32 flags; | |
3742 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3743 | if (ret) |
9257746f TW |
3744 | return ret; |
3745 | flags = (u32)val; | |
b481de9c ZY |
3746 | |
3747 | mutex_lock(&priv->mutex); | |
3748 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3749 | /* Cancel any currently running scans... */ | |
2a421b91 | 3750 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3751 | IWL_WARNING("Could not cancel scan.\n"); |
3752 | else { | |
9257746f | 3753 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); |
b481de9c | 3754 | priv->staging_rxon.flags = cpu_to_le32(flags); |
bb8c093b | 3755 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3756 | } |
3757 | } | |
3758 | mutex_unlock(&priv->mutex); | |
3759 | ||
3760 | return count; | |
3761 | } | |
3762 | ||
3763 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3764 | ||
3765 | static ssize_t show_filter_flags(struct device *d, | |
3766 | struct device_attribute *attr, char *buf) | |
3767 | { | |
c79dd5b5 | 3768 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3769 | |
3770 | return sprintf(buf, "0x%04X\n", | |
3771 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3772 | } | |
3773 | ||
3774 | static ssize_t store_filter_flags(struct device *d, | |
3775 | struct device_attribute *attr, | |
3776 | const char *buf, size_t count) | |
3777 | { | |
c79dd5b5 | 3778 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3779 | unsigned long val; |
3780 | u32 filter_flags; | |
3781 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3782 | if (ret) |
9257746f TW |
3783 | return ret; |
3784 | filter_flags = (u32)val; | |
b481de9c ZY |
3785 | |
3786 | mutex_lock(&priv->mutex); | |
3787 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3788 | /* Cancel any currently running scans... */ | |
2a421b91 | 3789 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3790 | IWL_WARNING("Could not cancel scan.\n"); |
3791 | else { | |
3792 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3793 | "0x%04X\n", filter_flags); | |
3794 | priv->staging_rxon.filter_flags = | |
3795 | cpu_to_le32(filter_flags); | |
bb8c093b | 3796 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3797 | } |
3798 | } | |
3799 | mutex_unlock(&priv->mutex); | |
3800 | ||
3801 | return count; | |
3802 | } | |
3803 | ||
3804 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3805 | store_filter_flags); | |
3806 | ||
4fc22b21 | 3807 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3808 | |
3809 | static ssize_t show_measurement(struct device *d, | |
3810 | struct device_attribute *attr, char *buf) | |
3811 | { | |
c79dd5b5 | 3812 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3813 | struct iwl4965_spectrum_notification measure_report; |
b481de9c | 3814 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3ac7f146 | 3815 | u8 *data = (u8 *)&measure_report; |
b481de9c ZY |
3816 | unsigned long flags; |
3817 | ||
3818 | spin_lock_irqsave(&priv->lock, flags); | |
3819 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3820 | spin_unlock_irqrestore(&priv->lock, flags); | |
3821 | return 0; | |
3822 | } | |
3823 | memcpy(&measure_report, &priv->measure_report, size); | |
3824 | priv->measurement_status = 0; | |
3825 | spin_unlock_irqrestore(&priv->lock, flags); | |
3826 | ||
3827 | while (size && (PAGE_SIZE - len)) { | |
3828 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3829 | PAGE_SIZE - len, 1); | |
3830 | len = strlen(buf); | |
3831 | if (PAGE_SIZE - len) | |
3832 | buf[len++] = '\n'; | |
3833 | ||
3834 | ofs += 16; | |
3835 | size -= min(size, 16U); | |
3836 | } | |
3837 | ||
3838 | return len; | |
3839 | } | |
3840 | ||
3841 | static ssize_t store_measurement(struct device *d, | |
3842 | struct device_attribute *attr, | |
3843 | const char *buf, size_t count) | |
3844 | { | |
c79dd5b5 | 3845 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3846 | struct ieee80211_measurement_params params = { |
3847 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
3848 | .start_time = cpu_to_le64(priv->last_tsf), | |
3849 | .duration = cpu_to_le16(1), | |
3850 | }; | |
3851 | u8 type = IWL_MEASURE_BASIC; | |
3852 | u8 buffer[32]; | |
3853 | u8 channel; | |
3854 | ||
3855 | if (count) { | |
3856 | char *p = buffer; | |
3857 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
3858 | channel = simple_strtoul(p, NULL, 0); | |
3859 | if (channel) | |
3860 | params.channel = channel; | |
3861 | ||
3862 | p = buffer; | |
3863 | while (*p && *p != ' ') | |
3864 | p++; | |
3865 | if (*p) | |
3866 | type = simple_strtoul(p + 1, NULL, 0); | |
3867 | } | |
3868 | ||
3869 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
3870 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 3871 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
3872 | |
3873 | return count; | |
3874 | } | |
3875 | ||
3876 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
3877 | show_measurement, store_measurement); | |
4fc22b21 | 3878 | #endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
3879 | |
3880 | static ssize_t store_retry_rate(struct device *d, | |
3881 | struct device_attribute *attr, | |
3882 | const char *buf, size_t count) | |
3883 | { | |
c79dd5b5 | 3884 | struct iwl_priv *priv = dev_get_drvdata(d); |
9257746f TW |
3885 | long val; |
3886 | int ret = strict_strtol(buf, 10, &val); | |
3887 | if (!ret) | |
3888 | return ret; | |
b481de9c | 3889 | |
9257746f | 3890 | priv->retry_rate = (val > 0) ? val : 1; |
b481de9c ZY |
3891 | |
3892 | return count; | |
3893 | } | |
3894 | ||
3895 | static ssize_t show_retry_rate(struct device *d, | |
3896 | struct device_attribute *attr, char *buf) | |
3897 | { | |
c79dd5b5 | 3898 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3899 | return sprintf(buf, "%d", priv->retry_rate); |
3900 | } | |
3901 | ||
3902 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3903 | store_retry_rate); | |
3904 | ||
3905 | static ssize_t store_power_level(struct device *d, | |
3906 | struct device_attribute *attr, | |
3907 | const char *buf, size_t count) | |
3908 | { | |
c79dd5b5 | 3909 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 | 3910 | int ret; |
9257746f TW |
3911 | unsigned long mode; |
3912 | ||
b481de9c | 3913 | |
b481de9c ZY |
3914 | mutex_lock(&priv->mutex); |
3915 | ||
fee1247a | 3916 | if (!iwl_is_ready(priv)) { |
298df1f6 | 3917 | ret = -EAGAIN; |
b481de9c ZY |
3918 | goto out; |
3919 | } | |
3920 | ||
9257746f | 3921 | ret = strict_strtoul(buf, 10, &mode); |
926f0b2e | 3922 | if (ret) |
9257746f TW |
3923 | goto out; |
3924 | ||
298df1f6 EK |
3925 | ret = iwl_power_set_user_mode(priv, mode); |
3926 | if (ret) { | |
5da4b55f MA |
3927 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3928 | goto out; | |
b481de9c | 3929 | } |
298df1f6 | 3930 | ret = count; |
b481de9c ZY |
3931 | |
3932 | out: | |
3933 | mutex_unlock(&priv->mutex); | |
298df1f6 | 3934 | return ret; |
b481de9c ZY |
3935 | } |
3936 | ||
b481de9c ZY |
3937 | static ssize_t show_power_level(struct device *d, |
3938 | struct device_attribute *attr, char *buf) | |
3939 | { | |
c79dd5b5 | 3940 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 EK |
3941 | int mode = priv->power_data.user_power_setting; |
3942 | int system = priv->power_data.system_power_setting; | |
5da4b55f | 3943 | int level = priv->power_data.power_mode; |
b481de9c ZY |
3944 | char *p = buf; |
3945 | ||
298df1f6 EK |
3946 | switch (system) { |
3947 | case IWL_POWER_SYS_AUTO: | |
3948 | p += sprintf(p, "SYSTEM:auto"); | |
b481de9c | 3949 | break; |
298df1f6 EK |
3950 | case IWL_POWER_SYS_AC: |
3951 | p += sprintf(p, "SYSTEM:ac"); | |
3952 | break; | |
3953 | case IWL_POWER_SYS_BATTERY: | |
3954 | p += sprintf(p, "SYSTEM:battery"); | |
b481de9c | 3955 | break; |
b481de9c | 3956 | } |
298df1f6 EK |
3957 | |
3958 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto"); | |
3959 | p += sprintf(p, "\tINDEX:%d", level); | |
3960 | p += sprintf(p, "\n"); | |
3ac7f146 | 3961 | return p - buf + 1; |
b481de9c ZY |
3962 | } |
3963 | ||
3964 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
3965 | store_power_level); | |
3966 | ||
3967 | static ssize_t show_channels(struct device *d, | |
3968 | struct device_attribute *attr, char *buf) | |
3969 | { | |
5d72a1f5 EK |
3970 | |
3971 | struct iwl_priv *priv = dev_get_drvdata(d); | |
3972 | struct ieee80211_channel *channels = NULL; | |
3973 | const struct ieee80211_supported_band *supp_band = NULL; | |
3974 | int len = 0, i; | |
3975 | int count = 0; | |
3976 | ||
3977 | if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status)) | |
3978 | return -EAGAIN; | |
3979 | ||
3980 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); | |
3981 | channels = supp_band->channels; | |
3982 | count = supp_band->n_channels; | |
3983 | ||
3984 | len += sprintf(&buf[len], | |
3985 | "Displaying %d channels in 2.4GHz band " | |
3986 | "(802.11bg):\n", count); | |
3987 | ||
3988 | for (i = 0; i < count; i++) | |
3989 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3990 | ieee80211_frequency_to_channel( | |
3991 | channels[i].center_freq), | |
3992 | channels[i].max_power, | |
3993 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3994 | " (IEEE 802.11h required)" : "", | |
3995 | (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3996 | || (channels[i].flags & | |
3997 | IEEE80211_CHAN_RADAR)) ? "" : | |
3998 | ", IBSS", | |
3999 | channels[i].flags & | |
4000 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
4001 | "passive only" : "active/passive"); | |
4002 | ||
4003 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); | |
4004 | channels = supp_band->channels; | |
4005 | count = supp_band->n_channels; | |
4006 | ||
4007 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
4008 | "(802.11a):\n", count); | |
4009 | ||
4010 | for (i = 0; i < count; i++) | |
4011 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
4012 | ieee80211_frequency_to_channel( | |
4013 | channels[i].center_freq), | |
4014 | channels[i].max_power, | |
4015 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
4016 | " (IEEE 802.11h required)" : "", | |
4017 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
4018 | || (channels[i].flags & | |
4019 | IEEE80211_CHAN_RADAR)) ? "" : | |
4020 | ", IBSS", | |
4021 | channels[i].flags & | |
4022 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
4023 | "passive only" : "active/passive"); | |
4024 | ||
4025 | return len; | |
b481de9c ZY |
4026 | } |
4027 | ||
4028 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4029 | ||
4030 | static ssize_t show_statistics(struct device *d, | |
4031 | struct device_attribute *attr, char *buf) | |
4032 | { | |
c79dd5b5 | 4033 | struct iwl_priv *priv = dev_get_drvdata(d); |
8f91aecb | 4034 | u32 size = sizeof(struct iwl_notif_statistics); |
b481de9c | 4035 | u32 len = 0, ofs = 0; |
3ac7f146 | 4036 | u8 *data = (u8 *)&priv->statistics; |
b481de9c ZY |
4037 | int rc = 0; |
4038 | ||
fee1247a | 4039 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4040 | return -EAGAIN; |
4041 | ||
4042 | mutex_lock(&priv->mutex); | |
49ea8596 | 4043 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4044 | mutex_unlock(&priv->mutex); |
4045 | ||
4046 | if (rc) { | |
4047 | len = sprintf(buf, | |
4048 | "Error sending statistics request: 0x%08X\n", rc); | |
4049 | return len; | |
4050 | } | |
4051 | ||
4052 | while (size && (PAGE_SIZE - len)) { | |
4053 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4054 | PAGE_SIZE - len, 1); | |
4055 | len = strlen(buf); | |
4056 | if (PAGE_SIZE - len) | |
4057 | buf[len++] = '\n'; | |
4058 | ||
4059 | ofs += 16; | |
4060 | size -= min(size, 16U); | |
4061 | } | |
4062 | ||
4063 | return len; | |
4064 | } | |
4065 | ||
4066 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4067 | ||
b481de9c ZY |
4068 | static ssize_t show_status(struct device *d, |
4069 | struct device_attribute *attr, char *buf) | |
4070 | { | |
c79dd5b5 | 4071 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4072 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4073 | return -EAGAIN; |
4074 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4075 | } | |
4076 | ||
4077 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4078 | ||
b481de9c ZY |
4079 | /***************************************************************************** |
4080 | * | |
4081 | * driver setup and teardown | |
4082 | * | |
4083 | *****************************************************************************/ | |
4084 | ||
4e39317d | 4085 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4086 | { |
4087 | priv->workqueue = create_workqueue(DRV_NAME); | |
4088 | ||
4089 | init_waitqueue_head(&priv->wait_command_queue); | |
4090 | ||
bb8c093b CH |
4091 | INIT_WORK(&priv->up, iwl4965_bg_up); |
4092 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
4093 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
bb8c093b CH |
4094 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); |
4095 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
4419e39b | 4096 | INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor); |
16e727e8 | 4097 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
4a4a9e81 TW |
4098 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4099 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 TW |
4100 | |
4101 | /* FIXME : remove when resolved PENDING */ | |
4102 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); | |
4103 | iwl_setup_scan_deferred_work(priv); | |
c90a74ba | 4104 | iwl_setup_power_deferred_work(priv); |
bb8c093b | 4105 | |
4e39317d EG |
4106 | if (priv->cfg->ops->lib->setup_deferred_work) |
4107 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4108 | ||
4109 | init_timer(&priv->statistics_periodic); | |
4110 | priv->statistics_periodic.data = (unsigned long)priv; | |
4111 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; | |
b481de9c ZY |
4112 | |
4113 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4114 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4115 | } |
4116 | ||
4e39317d | 4117 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4118 | { |
4e39317d EG |
4119 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4120 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4121 | |
3ae6a054 | 4122 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c | 4123 | cancel_delayed_work(&priv->scan_check); |
c90a74ba | 4124 | cancel_delayed_work_sync(&priv->set_power_save); |
b481de9c | 4125 | cancel_delayed_work(&priv->alive_start); |
b481de9c | 4126 | cancel_work_sync(&priv->beacon_update); |
4e39317d | 4127 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4128 | } |
4129 | ||
bb8c093b | 4130 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c | 4131 | &dev_attr_channels.attr, |
b481de9c ZY |
4132 | &dev_attr_flags.attr, |
4133 | &dev_attr_filter_flags.attr, | |
4fc22b21 | 4134 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4135 | &dev_attr_measurement.attr, |
4136 | #endif | |
4137 | &dev_attr_power_level.attr, | |
4138 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4139 | &dev_attr_statistics.attr, |
4140 | &dev_attr_status.attr, | |
4141 | &dev_attr_temperature.attr, | |
b481de9c | 4142 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4143 | #ifdef CONFIG_IWLWIFI_DEBUG |
4144 | &dev_attr_debug_level.attr, | |
4145 | #endif | |
bc6f59bc | 4146 | &dev_attr_version.attr, |
b481de9c ZY |
4147 | |
4148 | NULL | |
4149 | }; | |
4150 | ||
bb8c093b | 4151 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 4152 | .name = NULL, /* put in device directory */ |
bb8c093b | 4153 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
4154 | }; |
4155 | ||
bb8c093b CH |
4156 | static struct ieee80211_ops iwl4965_hw_ops = { |
4157 | .tx = iwl4965_mac_tx, | |
4158 | .start = iwl4965_mac_start, | |
4159 | .stop = iwl4965_mac_stop, | |
4160 | .add_interface = iwl4965_mac_add_interface, | |
4161 | .remove_interface = iwl4965_mac_remove_interface, | |
4162 | .config = iwl4965_mac_config, | |
4163 | .config_interface = iwl4965_mac_config_interface, | |
4164 | .configure_filter = iwl4965_configure_filter, | |
4165 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 4166 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
4167 | .get_stats = iwl4965_mac_get_stats, |
4168 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
4169 | .conf_tx = iwl4965_mac_conf_tx, | |
bb8c093b | 4170 | .reset_tsf = iwl4965_mac_reset_tsf, |
471b3efd | 4171 | .bss_info_changed = iwl4965_bss_info_changed, |
9ab46173 | 4172 | .ampdu_action = iwl4965_mac_ampdu_action, |
cb43dc25 | 4173 | .hw_scan = iwl_mac_hw_scan |
b481de9c ZY |
4174 | }; |
4175 | ||
bb8c093b | 4176 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4177 | { |
4178 | int err = 0; | |
c79dd5b5 | 4179 | struct iwl_priv *priv; |
b481de9c | 4180 | struct ieee80211_hw *hw; |
82b9a121 | 4181 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4182 | unsigned long flags; |
5a66926a | 4183 | DECLARE_MAC_BUF(mac); |
b481de9c | 4184 | |
316c30d9 AK |
4185 | /************************ |
4186 | * 1. Allocating HW data | |
4187 | ************************/ | |
4188 | ||
6440adb5 BC |
4189 | /* Disabling hardware scan means that mac80211 will perform scans |
4190 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4191 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4192 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4193 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4194 | "Disabling hw_scan\n"); | |
bb8c093b | 4195 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4196 | } |
4197 | ||
1d0a082d AK |
4198 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
4199 | if (!hw) { | |
b481de9c ZY |
4200 | err = -ENOMEM; |
4201 | goto out; | |
4202 | } | |
1d0a082d AK |
4203 | priv = hw->priv; |
4204 | /* At this point both hw and priv are allocated. */ | |
4205 | ||
b481de9c ZY |
4206 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4207 | ||
4208 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4209 | priv->cfg = cfg; |
b481de9c | 4210 | priv->pci_dev = pdev; |
316c30d9 | 4211 | |
0a6857e7 | 4212 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4213 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4214 | atomic_set(&priv->restrict_refcnt, 0); |
4215 | #endif | |
b481de9c | 4216 | |
316c30d9 AK |
4217 | /************************** |
4218 | * 2. Initializing PCI bus | |
4219 | **************************/ | |
4220 | if (pci_enable_device(pdev)) { | |
4221 | err = -ENODEV; | |
4222 | goto out_ieee80211_free_hw; | |
4223 | } | |
4224 | ||
4225 | pci_set_master(pdev); | |
4226 | ||
cc2a8ea8 | 4227 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
316c30d9 | 4228 | if (!err) |
cc2a8ea8 RR |
4229 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
4230 | if (err) { | |
4231 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
4232 | if (!err) | |
4233 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
4234 | /* both attempts failed: */ | |
316c30d9 | 4235 | if (err) { |
cc2a8ea8 RR |
4236 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4237 | DRV_NAME); | |
316c30d9 | 4238 | goto out_pci_disable_device; |
cc2a8ea8 | 4239 | } |
316c30d9 AK |
4240 | } |
4241 | ||
4242 | err = pci_request_regions(pdev, DRV_NAME); | |
4243 | if (err) | |
4244 | goto out_pci_disable_device; | |
4245 | ||
4246 | pci_set_drvdata(pdev, priv); | |
4247 | ||
316c30d9 AK |
4248 | |
4249 | /*********************** | |
4250 | * 3. Read REV register | |
4251 | ***********************/ | |
4252 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4253 | if (!priv->hw_base) { | |
4254 | err = -ENODEV; | |
4255 | goto out_pci_release_regions; | |
4256 | } | |
4257 | ||
4258 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4259 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4260 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4261 | ||
b661c819 | 4262 | iwl_hw_detect(priv); |
316c30d9 | 4263 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4264 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4265 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4266 | |
e7b63581 TW |
4267 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
4268 | * PCI Tx retries from interfering with C3 CPU state */ | |
4269 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | |
4270 | ||
91238714 TW |
4271 | /* amp init */ |
4272 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4273 | if (err < 0) { |
91238714 | 4274 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4275 | goto out_iounmap; |
4276 | } | |
91238714 TW |
4277 | /***************** |
4278 | * 4. Read EEPROM | |
4279 | *****************/ | |
316c30d9 AK |
4280 | /* Read the EEPROM */ |
4281 | err = iwl_eeprom_init(priv); | |
4282 | if (err) { | |
4283 | IWL_ERROR("Unable to init EEPROM\n"); | |
4284 | goto out_iounmap; | |
4285 | } | |
8614f360 TW |
4286 | err = iwl_eeprom_check_version(priv); |
4287 | if (err) | |
4288 | goto out_iounmap; | |
4289 | ||
02883017 | 4290 | /* extract MAC Address */ |
316c30d9 AK |
4291 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
4292 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
4293 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
4294 | ||
4295 | /************************ | |
4296 | * 5. Setup HW constants | |
4297 | ************************/ | |
da154e30 | 4298 | if (iwl_set_hw_params(priv)) { |
5425e490 | 4299 | IWL_ERROR("failed to set hw parameters\n"); |
073d3f5f | 4300 | goto out_free_eeprom; |
316c30d9 AK |
4301 | } |
4302 | ||
4303 | /******************* | |
6ba87956 | 4304 | * 6. Setup priv |
316c30d9 | 4305 | *******************/ |
b481de9c | 4306 | |
6ba87956 | 4307 | err = iwl_init_drv(priv); |
bf85ea4f | 4308 | if (err) |
399f4900 | 4309 | goto out_free_eeprom; |
bf85ea4f | 4310 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4311 | |
4312 | /********************************** | |
4313 | * 7. Initialize module parameters | |
4314 | **********************************/ | |
4315 | ||
4316 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4317 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4318 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4319 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4320 | } | |
4321 | ||
316c30d9 AK |
4322 | /******************** |
4323 | * 8. Setup services | |
4324 | ********************/ | |
0359facc | 4325 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 4326 | iwl4965_disable_interrupts(priv); |
0359facc | 4327 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
4328 | |
4329 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4330 | if (err) { | |
4331 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4332 | goto out_uninit_drv; |
316c30d9 AK |
4333 | } |
4334 | ||
316c30d9 | 4335 | |
4e39317d | 4336 | iwl_setup_deferred_work(priv); |
653fa4a0 | 4337 | iwl_setup_rx_handlers(priv); |
316c30d9 AK |
4338 | |
4339 | /******************** | |
4340 | * 9. Conclude | |
4341 | ********************/ | |
5a66926a ZY |
4342 | pci_save_state(pdev); |
4343 | pci_disable_device(pdev); | |
b481de9c | 4344 | |
6ba87956 TW |
4345 | /********************************** |
4346 | * 10. Setup and register mac80211 | |
4347 | **********************************/ | |
4348 | ||
4349 | err = iwl_setup_mac(priv); | |
4350 | if (err) | |
4351 | goto out_remove_sysfs; | |
4352 | ||
4353 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4354 | if (err) | |
4355 | IWL_ERROR("failed to create debugfs files\n"); | |
4356 | ||
58d0f361 EG |
4357 | err = iwl_rfkill_init(priv); |
4358 | if (err) | |
4359 | IWL_ERROR("Unable to initialize RFKILL system. " | |
4360 | "Ignoring error: %d\n", err); | |
4361 | iwl_power_initialize(priv); | |
b481de9c ZY |
4362 | return 0; |
4363 | ||
316c30d9 AK |
4364 | out_remove_sysfs: |
4365 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6ba87956 TW |
4366 | out_uninit_drv: |
4367 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4368 | out_free_eeprom: |
4369 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4370 | out_iounmap: |
4371 | pci_iounmap(pdev, priv->hw_base); | |
4372 | out_pci_release_regions: | |
4373 | pci_release_regions(pdev); | |
316c30d9 | 4374 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4375 | out_pci_disable_device: |
4376 | pci_disable_device(pdev); | |
b481de9c ZY |
4377 | out_ieee80211_free_hw: |
4378 | ieee80211_free_hw(priv->hw); | |
4379 | out: | |
4380 | return err; | |
4381 | } | |
4382 | ||
c83dbf68 | 4383 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 4384 | { |
c79dd5b5 | 4385 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 4386 | unsigned long flags; |
b481de9c ZY |
4387 | |
4388 | if (!priv) | |
4389 | return; | |
4390 | ||
4391 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4392 | ||
67249625 EG |
4393 | iwl_dbgfs_unregister(priv); |
4394 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4395 | ||
0b124c31 GG |
4396 | /* ieee80211_unregister_hw call wil cause iwl4965_mac_stop to |
4397 | * to be called and iwl4965_down since we are removing the device | |
4398 | * we need to set STATUS_EXIT_PENDING bit. | |
4399 | */ | |
4400 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
c4f55232 RR |
4401 | if (priv->mac80211_registered) { |
4402 | ieee80211_unregister_hw(priv->hw); | |
4403 | priv->mac80211_registered = 0; | |
0b124c31 GG |
4404 | } else { |
4405 | iwl4965_down(priv); | |
c4f55232 RR |
4406 | } |
4407 | ||
0359facc MA |
4408 | /* make sure we flush any pending irq or |
4409 | * tasklet for the driver | |
4410 | */ | |
4411 | spin_lock_irqsave(&priv->lock, flags); | |
4412 | iwl4965_disable_interrupts(priv); | |
4413 | spin_unlock_irqrestore(&priv->lock, flags); | |
4414 | ||
4415 | iwl_synchronize_irq(priv); | |
4416 | ||
58d0f361 | 4417 | iwl_rfkill_unregister(priv); |
bb8c093b | 4418 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4419 | |
4420 | if (priv->rxq.bd) | |
a55360e4 | 4421 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4422 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4423 | |
37deb2a0 | 4424 | iwl_clear_stations_table(priv); |
073d3f5f | 4425 | iwl_eeprom_free(priv); |
b481de9c | 4426 | |
b481de9c | 4427 | |
948c171c MA |
4428 | /*netif_stop_queue(dev); */ |
4429 | flush_workqueue(priv->workqueue); | |
4430 | ||
bb8c093b | 4431 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
4432 | * priv->workqueue... so we can't take down the workqueue |
4433 | * until now... */ | |
4434 | destroy_workqueue(priv->workqueue); | |
4435 | priv->workqueue = NULL; | |
4436 | ||
b481de9c ZY |
4437 | pci_iounmap(pdev, priv->hw_base); |
4438 | pci_release_regions(pdev); | |
4439 | pci_disable_device(pdev); | |
4440 | pci_set_drvdata(pdev, NULL); | |
4441 | ||
6ba87956 | 4442 | iwl_uninit_drv(priv); |
b481de9c ZY |
4443 | |
4444 | if (priv->ibss_beacon) | |
4445 | dev_kfree_skb(priv->ibss_beacon); | |
4446 | ||
4447 | ieee80211_free_hw(priv->hw); | |
4448 | } | |
4449 | ||
4450 | #ifdef CONFIG_PM | |
4451 | ||
bb8c093b | 4452 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4453 | { |
c79dd5b5 | 4454 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4455 | |
e655b9f0 ZY |
4456 | if (priv->is_open) { |
4457 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
4458 | iwl4965_mac_stop(priv->hw); | |
4459 | priv->is_open = 1; | |
4460 | } | |
b481de9c | 4461 | |
b481de9c ZY |
4462 | pci_set_power_state(pdev, PCI_D3hot); |
4463 | ||
b481de9c ZY |
4464 | return 0; |
4465 | } | |
4466 | ||
bb8c093b | 4467 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 4468 | { |
c79dd5b5 | 4469 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4470 | |
b481de9c | 4471 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4472 | |
e655b9f0 ZY |
4473 | if (priv->is_open) |
4474 | iwl4965_mac_start(priv->hw); | |
b481de9c | 4475 | |
e655b9f0 | 4476 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4477 | return 0; |
4478 | } | |
4479 | ||
4480 | #endif /* CONFIG_PM */ | |
4481 | ||
4482 | /***************************************************************************** | |
4483 | * | |
4484 | * driver and module entry point | |
4485 | * | |
4486 | *****************************************************************************/ | |
4487 | ||
fed9017e RR |
4488 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4489 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4fc22b21 | 4490 | #ifdef CONFIG_IWL4965 |
fed9017e RR |
4491 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4492 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4fc22b21 | 4493 | #endif /* CONFIG_IWL4965 */ |
5a6a256e | 4494 | #ifdef CONFIG_IWL5000 |
47408639 EK |
4495 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4496 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | |
4497 | {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, | |
4498 | {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, | |
4499 | {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, | |
4500 | {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, | |
5a6a256e | 4501 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, |
47408639 EK |
4502 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, |
4503 | {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4504 | {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
5a6a256e TW |
4505 | {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)}, |
4506 | #endif /* CONFIG_IWL5000 */ | |
fed9017e RR |
4507 | {0} |
4508 | }; | |
4509 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4510 | ||
4511 | static struct pci_driver iwl_driver = { | |
b481de9c | 4512 | .name = DRV_NAME, |
fed9017e | 4513 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
4514 | .probe = iwl4965_pci_probe, |
4515 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 4516 | #ifdef CONFIG_PM |
bb8c093b CH |
4517 | .suspend = iwl4965_pci_suspend, |
4518 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
4519 | #endif |
4520 | }; | |
4521 | ||
bb8c093b | 4522 | static int __init iwl4965_init(void) |
b481de9c ZY |
4523 | { |
4524 | ||
4525 | int ret; | |
4526 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4527 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 | 4528 | |
e227ceac | 4529 | ret = iwlagn_rate_control_register(); |
897e1cf2 RC |
4530 | if (ret) { |
4531 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4532 | return ret; | |
4533 | } | |
4534 | ||
fed9017e | 4535 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4536 | if (ret) { |
4537 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4538 | goto error_register; |
b481de9c | 4539 | } |
b481de9c ZY |
4540 | |
4541 | return ret; | |
897e1cf2 | 4542 | |
897e1cf2 | 4543 | error_register: |
e227ceac | 4544 | iwlagn_rate_control_unregister(); |
897e1cf2 | 4545 | return ret; |
b481de9c ZY |
4546 | } |
4547 | ||
bb8c093b | 4548 | static void __exit iwl4965_exit(void) |
b481de9c | 4549 | { |
fed9017e | 4550 | pci_unregister_driver(&iwl_driver); |
e227ceac | 4551 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
4552 | } |
4553 | ||
bb8c093b CH |
4554 | module_exit(iwl4965_exit); |
4555 | module_init(iwl4965_init); |