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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
759ef89f | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
b481de9c ZY |
32 | #include <linux/init.h> |
33 | #include <linux/pci.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/skbuff.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/wireless.h> | |
39 | #include <linux/firmware.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
b481de9c ZY |
43 | #include <net/mac80211.h> |
44 | ||
45 | #include <asm/div64.h> | |
46 | ||
6bc913bd | 47 | #include "iwl-eeprom.h" |
3e0d4cb1 | 48 | #include "iwl-dev.h" |
fee1247a | 49 | #include "iwl-core.h" |
3395f6e9 | 50 | #include "iwl-io.h" |
b481de9c | 51 | #include "iwl-helpers.h" |
6974e363 | 52 | #include "iwl-sta.h" |
f0832f13 | 53 | #include "iwl-calib.h" |
b481de9c | 54 | |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
b481de9c ZY |
62 | /* |
63 | * module name, copyright, version, etc. | |
64 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
65 | */ | |
66 | ||
d783b061 | 67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 68 | |
0a6857e7 | 69 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
70 | #define VD "d" |
71 | #else | |
72 | #define VD | |
73 | #endif | |
74 | ||
4fc22b21 | 75 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
76 | #define VS "s" |
77 | #else | |
78 | #define VS | |
79 | #endif | |
80 | ||
df48c323 | 81 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 82 | |
b481de9c ZY |
83 | |
84 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
85 | MODULE_VERSION(DRV_VERSION); | |
86 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
87 | MODULE_LICENSE("GPL"); | |
4fc22b21 | 88 | MODULE_ALIAS("iwl4965"); |
b481de9c | 89 | |
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
5b9f8cd3 | 99 | static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
deb09c43 | 100 | { |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
54559703 | 111 | * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 112 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 113 | * |
9fbab516 BC |
114 | * If the RXON structure is changing enough to require a new tune, |
115 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
116 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 117 | */ |
54559703 | 118 | static int iwl_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
119 | { |
120 | ||
121 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 122 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
123 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
124 | priv->active_rxon.bssid_addr) || | |
125 | compare_ether_addr(priv->staging_rxon.node_addr, | |
126 | priv->active_rxon.node_addr) || | |
127 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
128 | priv->active_rxon.wlap_bssid_addr) || | |
129 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
130 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
131 | (priv->staging_rxon.air_propagation != | |
132 | priv->active_rxon.air_propagation) || | |
133 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
134 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
135 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
136 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
b481de9c ZY |
137 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) |
138 | return 1; | |
139 | ||
140 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
141 | * be updated with the RXON_ASSOC command -- however only some | |
142 | * flag transitions are allowed using RXON_ASSOC */ | |
143 | ||
144 | /* Check if we are not switching bands */ | |
145 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
146 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
147 | return 1; | |
148 | ||
149 | /* Check if we are switching association toggle */ | |
150 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
151 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
152 | return 1; | |
153 | ||
154 | return 0; | |
155 | } | |
156 | ||
b481de9c | 157 | /** |
5b9f8cd3 | 158 | * iwl_commit_rxon - commit staging_rxon to hardware |
b481de9c | 159 | * |
01ebd063 | 160 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
161 | * the active_rxon structure is updated with the new data. This |
162 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
163 | * a HW tune is required based on the RXON structure changes. | |
164 | */ | |
5b9f8cd3 | 165 | static int iwl_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
166 | { |
167 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 168 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
43d59b32 EG |
169 | int ret; |
170 | bool new_assoc = | |
171 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 172 | |
fee1247a | 173 | if (!iwl_is_alive(priv)) |
43d59b32 | 174 | return -EBUSY; |
b481de9c ZY |
175 | |
176 | /* always get timestamp with Rx frame */ | |
177 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
a326a5d0 EG |
178 | /* allow CTS-to-self if possible. this is relevant only for |
179 | * 5000, but will not damage 4965 */ | |
180 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | |
b481de9c | 181 | |
8f5c87dc | 182 | ret = iwl_agn_check_rxon_cmd(&priv->staging_rxon); |
43d59b32 | 183 | if (ret) { |
b481de9c ZY |
184 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
185 | return -EINVAL; | |
186 | } | |
187 | ||
188 | /* If we don't need to send a full RXON, we can use | |
5b9f8cd3 | 189 | * iwl_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 190 | * and other flags for the current radio configuration. */ |
54559703 | 191 | if (!iwl_full_rxon_required(priv)) { |
43d59b32 EG |
192 | ret = iwl_send_rxon_assoc(priv); |
193 | if (ret) { | |
194 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
195 | return ret; | |
b481de9c ZY |
196 | } |
197 | ||
198 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
199 | return 0; |
200 | } | |
201 | ||
202 | /* station table will be cleared */ | |
203 | priv->assoc_station_added = 0; | |
204 | ||
b481de9c ZY |
205 | /* If we are currently associated and the new config requires |
206 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
207 | * we must clear the associated from the active configuration | |
208 | * before we apply the new config */ | |
43d59b32 | 209 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
210 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
211 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
212 | ||
43d59b32 | 213 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 214 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
215 | &priv->active_rxon); |
216 | ||
217 | /* If the mask clearing failed then we set | |
218 | * active_rxon back to what it was previously */ | |
43d59b32 | 219 | if (ret) { |
b481de9c | 220 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
221 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
222 | return ret; | |
b481de9c | 223 | } |
b481de9c ZY |
224 | } |
225 | ||
226 | IWL_DEBUG_INFO("Sending RXON\n" | |
227 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
228 | "* channel = %d\n" | |
e174961c | 229 | "* bssid = %pM\n", |
43d59b32 | 230 | (new_assoc ? "" : "out"), |
b481de9c | 231 | le16_to_cpu(priv->staging_rxon.channel), |
e174961c | 232 | priv->staging_rxon.bssid_addr); |
b481de9c | 233 | |
5b9f8cd3 | 234 | iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
235 | |
236 | /* Apply the new configuration | |
237 | * RXON unassoc clears the station table in uCode, send it before | |
238 | * we add the bcast station. If assoc bit is set, we will send RXON | |
239 | * after having added the bcast and bssid station. | |
240 | */ | |
241 | if (!new_assoc) { | |
242 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 243 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
244 | if (ret) { |
245 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
246 | return ret; | |
247 | } | |
248 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
249 | } |
250 | ||
37deb2a0 | 251 | iwl_clear_stations_table(priv); |
556f8db7 | 252 | |
b481de9c ZY |
253 | if (!priv->error_recovering) |
254 | priv->start_calib = 0; | |
255 | ||
b481de9c | 256 | /* Add the broadcast address so we can send broadcast frames */ |
4f40e4d9 | 257 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 258 | IWL_INVALID_STATION) { |
b481de9c ZY |
259 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
260 | return -EIO; | |
261 | } | |
262 | ||
263 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
264 | * add the IWL_AP_ID to the station rate table */ | |
9185159d | 265 | if (new_assoc) { |
05c914fe | 266 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
9185159d TW |
267 | ret = iwl_rxon_add_station(priv, |
268 | priv->active_rxon.bssid_addr, 1); | |
269 | if (ret == IWL_INVALID_STATION) { | |
270 | IWL_ERROR("Error adding AP address for TX.\n"); | |
271 | return -EIO; | |
272 | } | |
273 | priv->assoc_station_added = 1; | |
274 | if (priv->default_wep_key && | |
275 | iwl_send_static_wepkey_cmd(priv, 0)) | |
276 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c | 277 | } |
43d59b32 EG |
278 | |
279 | /* Apply the new configuration | |
280 | * RXON assoc doesn't clear the station table in uCode, | |
281 | */ | |
282 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
283 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
284 | if (ret) { | |
285 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
286 | return ret; | |
287 | } | |
288 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
289 | } |
290 | ||
36da7d70 ZY |
291 | iwl_init_sensitivity(priv); |
292 | ||
293 | /* If we issue a new RXON command which required a tune then we must | |
294 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
295 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | |
296 | if (ret) { | |
297 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
298 | return ret; | |
299 | } | |
300 | ||
b481de9c ZY |
301 | return 0; |
302 | } | |
303 | ||
5b9f8cd3 | 304 | void iwl_update_chain_flags(struct iwl_priv *priv) |
5da4b55f MA |
305 | { |
306 | ||
c7de35cd | 307 | iwl_set_rxon_chain(priv); |
5b9f8cd3 | 308 | iwl_commit_rxon(priv); |
5da4b55f MA |
309 | } |
310 | ||
5b9f8cd3 | 311 | static int iwl_send_bt_config(struct iwl_priv *priv) |
b481de9c | 312 | { |
2aa6ab86 | 313 | struct iwl_bt_cmd bt_cmd = { |
b481de9c ZY |
314 | .flags = 3, |
315 | .lead_time = 0xAA, | |
316 | .max_kill = 1, | |
317 | .kill_ack_mask = 0, | |
318 | .kill_cts_mask = 0, | |
319 | }; | |
320 | ||
857485c0 | 321 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
2aa6ab86 | 322 | sizeof(struct iwl_bt_cmd), &bt_cmd); |
b481de9c ZY |
323 | } |
324 | ||
fcab423d | 325 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
326 | { |
327 | struct list_head *element; | |
328 | ||
329 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
330 | priv->frames_count); | |
331 | ||
332 | while (!list_empty(&priv->free_frames)) { | |
333 | element = priv->free_frames.next; | |
334 | list_del(element); | |
fcab423d | 335 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
336 | priv->frames_count--; |
337 | } | |
338 | ||
339 | if (priv->frames_count) { | |
340 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
341 | priv->frames_count); | |
342 | priv->frames_count = 0; | |
343 | } | |
344 | } | |
345 | ||
fcab423d | 346 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 347 | { |
fcab423d | 348 | struct iwl_frame *frame; |
b481de9c ZY |
349 | struct list_head *element; |
350 | if (list_empty(&priv->free_frames)) { | |
351 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
352 | if (!frame) { | |
353 | IWL_ERROR("Could not allocate frame!\n"); | |
354 | return NULL; | |
355 | } | |
356 | ||
357 | priv->frames_count++; | |
358 | return frame; | |
359 | } | |
360 | ||
361 | element = priv->free_frames.next; | |
362 | list_del(element); | |
fcab423d | 363 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
364 | } |
365 | ||
fcab423d | 366 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
367 | { |
368 | memset(frame, 0, sizeof(*frame)); | |
369 | list_add(&frame->list, &priv->free_frames); | |
370 | } | |
371 | ||
4bf64efd TW |
372 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
373 | struct ieee80211_hdr *hdr, | |
374 | const u8 *dest, int left) | |
b481de9c | 375 | { |
3109ece1 | 376 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
05c914fe JB |
377 | ((priv->iw_mode != NL80211_IFTYPE_ADHOC) && |
378 | (priv->iw_mode != NL80211_IFTYPE_AP))) | |
b481de9c ZY |
379 | return 0; |
380 | ||
381 | if (priv->ibss_beacon->len > left) | |
382 | return 0; | |
383 | ||
384 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
385 | ||
386 | return priv->ibss_beacon->len; | |
387 | } | |
388 | ||
5b9f8cd3 | 389 | static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 390 | { |
39e88504 GC |
391 | int i; |
392 | int rate_mask; | |
393 | ||
394 | /* Set rate mask*/ | |
395 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
dbce56a4 | 396 | rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK; |
39e88504 | 397 | else |
dbce56a4 | 398 | rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK; |
b481de9c | 399 | |
39e88504 | 400 | /* Find lowest valid rate */ |
b481de9c | 401 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 402 | i = iwl_rates[i].next_ieee) { |
b481de9c | 403 | if (rate_mask & (1 << i)) |
1826dcc0 | 404 | return iwl_rates[i].plcp; |
b481de9c ZY |
405 | } |
406 | ||
39e88504 GC |
407 | /* No valid rate was found. Assign the lowest one */ |
408 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
409 | return IWL_RATE_1M_PLCP; | |
410 | else | |
411 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
412 | } |
413 | ||
5b9f8cd3 | 414 | static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, |
4bf64efd TW |
415 | struct iwl_frame *frame, u8 rate) |
416 | { | |
417 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
418 | unsigned int frame_size; | |
419 | ||
420 | tx_beacon_cmd = &frame->u.beacon; | |
421 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | |
422 | ||
423 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | |
424 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
425 | ||
426 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | |
427 | iwl_bcast_addr, | |
428 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | |
429 | ||
430 | BUG_ON(frame_size > MAX_MPDU_SIZE); | |
431 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | |
432 | ||
433 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | |
434 | tx_beacon_cmd->tx.rate_n_flags = | |
435 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | |
436 | else | |
437 | tx_beacon_cmd->tx.rate_n_flags = | |
438 | iwl_hw_set_rate_n_flags(rate, 0); | |
439 | ||
440 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
441 | TX_CMD_FLG_TSF_MSK | | |
442 | TX_CMD_FLG_STA_RATE_MSK; | |
443 | ||
444 | return sizeof(*tx_beacon_cmd) + frame_size; | |
445 | } | |
5b9f8cd3 | 446 | static int iwl_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 447 | { |
fcab423d | 448 | struct iwl_frame *frame; |
b481de9c ZY |
449 | unsigned int frame_size; |
450 | int rc; | |
451 | u8 rate; | |
452 | ||
fcab423d | 453 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
454 | |
455 | if (!frame) { | |
456 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
457 | "command.\n"); | |
458 | return -ENOMEM; | |
459 | } | |
460 | ||
5b9f8cd3 | 461 | rate = iwl_rate_get_lowest_plcp(priv); |
b481de9c | 462 | |
5b9f8cd3 | 463 | frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 464 | |
857485c0 | 465 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
466 | &frame->u.cmd[0]); |
467 | ||
fcab423d | 468 | iwl_free_frame(priv, frame); |
b481de9c ZY |
469 | |
470 | return rc; | |
471 | } | |
472 | ||
b481de9c ZY |
473 | /****************************************************************************** |
474 | * | |
475 | * Misc. internal state and helper functions | |
476 | * | |
477 | ******************************************************************************/ | |
b481de9c | 478 | |
5b9f8cd3 | 479 | static void iwl_ht_conf(struct iwl_priv *priv, |
d1141dfb EG |
480 | struct ieee80211_bss_conf *bss_conf) |
481 | { | |
ae5eb026 | 482 | struct ieee80211_sta_ht_cap *ht_conf; |
d1141dfb | 483 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; |
ae5eb026 | 484 | struct ieee80211_sta *sta; |
d1141dfb EG |
485 | |
486 | IWL_DEBUG_MAC80211("enter: \n"); | |
487 | ||
d1141dfb EG |
488 | if (!iwl_conf->is_ht) |
489 | return; | |
490 | ||
ae5eb026 JB |
491 | |
492 | /* | |
493 | * It is totally wrong to base global information on something | |
494 | * that is valid only when associated, alas, this driver works | |
495 | * that way and I don't know how to fix it. | |
496 | */ | |
497 | ||
498 | rcu_read_lock(); | |
499 | sta = ieee80211_find_sta(priv->hw, priv->bssid); | |
500 | if (!sta) { | |
501 | rcu_read_unlock(); | |
502 | return; | |
503 | } | |
504 | ht_conf = &sta->ht_cap; | |
505 | ||
d1141dfb | 506 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) |
a9841013 | 507 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 508 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 509 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
510 | |
511 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
512 | iwl_conf->max_amsdu_size = | |
513 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
514 | ||
515 | iwl_conf->supported_chan_width = | |
d9fe60de | 516 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40); |
ae5eb026 JB |
517 | |
518 | iwl_conf->extension_chan_offset = bss_conf->ht.secondary_channel_offset; | |
d1141dfb | 519 | /* If no above or below channel supplied disable FAT channel */ |
d9fe60de JB |
520 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE && |
521 | iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW) { | |
522 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; | |
d1141dfb | 523 | iwl_conf->supported_chan_width = 0; |
963f5517 | 524 | } |
d1141dfb | 525 | |
12837be1 RR |
526 | iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2); |
527 | ||
d9fe60de | 528 | memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16); |
d1141dfb | 529 | |
ae5eb026 | 530 | iwl_conf->tx_chan_width = bss_conf->ht.width_40_ok; |
d1141dfb | 531 | iwl_conf->ht_protection = |
ae5eb026 | 532 | bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; |
d1141dfb | 533 | iwl_conf->non_GF_STA_present = |
ae5eb026 JB |
534 | !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); |
535 | ||
536 | rcu_read_unlock(); | |
d1141dfb | 537 | |
d1141dfb EG |
538 | IWL_DEBUG_MAC80211("leave\n"); |
539 | } | |
540 | ||
b481de9c ZY |
541 | /* |
542 | * QoS support | |
543 | */ | |
1ff50bda | 544 | static void iwl_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c | 545 | { |
b481de9c ZY |
546 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
547 | return; | |
548 | ||
b481de9c ZY |
549 | priv->qos_data.def_qos_parm.qos_flags = 0; |
550 | ||
551 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
552 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
553 | priv->qos_data.def_qos_parm.qos_flags |= | |
554 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
555 | if (priv->qos_data.qos_active) |
556 | priv->qos_data.def_qos_parm.qos_flags |= | |
557 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
558 | ||
fd105e79 | 559 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 560 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 561 | |
3109ece1 | 562 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
563 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
564 | priv->qos_data.qos_active, | |
565 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 566 | |
1ff50bda EG |
567 | iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM, |
568 | sizeof(struct iwl_qosparam_cmd), | |
569 | &priv->qos_data.def_qos_parm, NULL); | |
b481de9c ZY |
570 | } |
571 | } | |
572 | ||
b481de9c | 573 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
b481de9c | 574 | |
3195c1f3 | 575 | static u16 iwl_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
576 | { |
577 | u16 new_val = 0; | |
578 | u16 beacon_factor = 0; | |
579 | ||
3195c1f3 TW |
580 | beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL) |
581 | / MAX_UCODE_BEACON_INTERVAL; | |
b481de9c ZY |
582 | new_val = beacon_val / beacon_factor; |
583 | ||
3195c1f3 | 584 | return new_val; |
b481de9c ZY |
585 | } |
586 | ||
3195c1f3 | 587 | static void iwl_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c | 588 | { |
3195c1f3 TW |
589 | u64 tsf; |
590 | s32 interval_tm, rem; | |
b481de9c ZY |
591 | unsigned long flags; |
592 | struct ieee80211_conf *conf = NULL; | |
593 | u16 beacon_int = 0; | |
594 | ||
595 | conf = ieee80211_get_hw_conf(priv->hw); | |
596 | ||
597 | spin_lock_irqsave(&priv->lock, flags); | |
3195c1f3 | 598 | priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp); |
b5d7be5e | 599 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
b481de9c | 600 | |
05c914fe | 601 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
3195c1f3 | 602 | beacon_int = iwl_adjust_beacon_interval(priv->beacon_int); |
b481de9c ZY |
603 | priv->rxon_timing.atim_window = 0; |
604 | } else { | |
3195c1f3 TW |
605 | beacon_int = iwl_adjust_beacon_interval(conf->beacon_int); |
606 | ||
b481de9c ZY |
607 | /* TODO: we need to get atim_window from upper stack |
608 | * for now we set to 0 */ | |
609 | priv->rxon_timing.atim_window = 0; | |
610 | } | |
611 | ||
3195c1f3 | 612 | priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int); |
b481de9c | 613 | |
3195c1f3 TW |
614 | tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ |
615 | interval_tm = beacon_int * 1024; | |
616 | rem = do_div(tsf, interval_tm); | |
617 | priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem); | |
618 | ||
619 | spin_unlock_irqrestore(&priv->lock, flags); | |
620 | IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n", | |
621 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
622 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
623 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
b481de9c ZY |
624 | } |
625 | ||
82a66bbb TW |
626 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
627 | enum ieee80211_band band) | |
b481de9c | 628 | { |
8318d78a | 629 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
630 | priv->staging_rxon.flags &= |
631 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
632 | | RXON_FLG_CCK_MSK); | |
633 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
634 | } else { | |
5b9f8cd3 | 635 | /* Copied from iwl_post_associate() */ |
b481de9c ZY |
636 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
637 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
638 | else | |
639 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
640 | ||
05c914fe | 641 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
642 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
643 | ||
644 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
645 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
646 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
647 | } | |
648 | } | |
649 | ||
650 | /* | |
01ebd063 | 651 | * initialize rxon structure with default values from eeprom |
b481de9c | 652 | */ |
5b9f8cd3 | 653 | static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode) |
b481de9c | 654 | { |
bf85ea4f | 655 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
656 | |
657 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
658 | ||
60294de3 | 659 | switch (mode) { |
05c914fe | 660 | case NL80211_IFTYPE_AP: |
b481de9c ZY |
661 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; |
662 | break; | |
663 | ||
05c914fe | 664 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
665 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; |
666 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
667 | break; | |
668 | ||
05c914fe | 669 | case NL80211_IFTYPE_ADHOC: |
b481de9c ZY |
670 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; |
671 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
672 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
673 | RXON_FILTER_ACCEPT_GRP_MSK; | |
674 | break; | |
675 | ||
05c914fe | 676 | case NL80211_IFTYPE_MONITOR: |
b481de9c ZY |
677 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; |
678 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
679 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
680 | break; | |
69dc5d9d | 681 | default: |
60294de3 | 682 | IWL_ERROR("Unsupported interface type %d\n", mode); |
69dc5d9d | 683 | break; |
b481de9c ZY |
684 | } |
685 | ||
686 | #if 0 | |
687 | /* TODO: Figure out when short_preamble would be set and cache from | |
688 | * that */ | |
689 | if (!hw_to_local(priv->hw)->short_preamble) | |
690 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
691 | else | |
692 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
693 | #endif | |
694 | ||
8622e705 | 695 | ch_info = iwl_get_channel_info(priv, priv->band, |
25b3f57c | 696 | le16_to_cpu(priv->active_rxon.channel)); |
b481de9c ZY |
697 | |
698 | if (!ch_info) | |
699 | ch_info = &priv->channel_info[0]; | |
700 | ||
701 | /* | |
702 | * in some case A channels are all non IBSS | |
703 | * in this case force B/G channel | |
704 | */ | |
05c914fe | 705 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && |
b481de9c ZY |
706 | !(is_channel_ibss(ch_info))) |
707 | ch_info = &priv->channel_info[0]; | |
708 | ||
709 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 710 | priv->band = ch_info->band; |
b481de9c | 711 | |
82a66bbb | 712 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
713 | |
714 | priv->staging_rxon.ofdm_basic_rates = | |
715 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
716 | priv->staging_rxon.cck_basic_rates = | |
717 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
718 | ||
719 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
720 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
721 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
722 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
723 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
724 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 725 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
726 | } |
727 | ||
5b9f8cd3 | 728 | static int iwl_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 729 | { |
5b9f8cd3 | 730 | iwl_connection_init_rx_config(priv, mode); |
b481de9c ZY |
731 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
732 | ||
37deb2a0 | 733 | iwl_clear_stations_table(priv); |
b481de9c | 734 | |
fde3571f | 735 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 736 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
737 | return -EAGAIN; |
738 | ||
739 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 740 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
741 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
742 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
743 | return -EAGAIN; | |
744 | } | |
745 | ||
5b9f8cd3 | 746 | iwl_commit_rxon(priv); |
b481de9c ZY |
747 | |
748 | return 0; | |
749 | } | |
750 | ||
5b9f8cd3 | 751 | static void iwl_set_rate(struct iwl_priv *priv) |
b481de9c | 752 | { |
8318d78a | 753 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
754 | struct ieee80211_rate *rate; |
755 | int i; | |
756 | ||
d1141dfb | 757 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
758 | if (!hw) { |
759 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
760 | return; | |
761 | } | |
b481de9c ZY |
762 | |
763 | priv->active_rate = 0; | |
764 | priv->active_rate_basic = 0; | |
765 | ||
8318d78a JB |
766 | for (i = 0; i < hw->n_bitrates; i++) { |
767 | rate = &(hw->bitrates[i]); | |
768 | if (rate->hw_value < IWL_RATE_COUNT) | |
769 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
770 | } |
771 | ||
772 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
773 | priv->active_rate, priv->active_rate_basic); | |
774 | ||
775 | /* | |
776 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
777 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
778 | * OFDM | |
779 | */ | |
780 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
781 | priv->staging_rxon.cck_basic_rates = | |
782 | ((priv->active_rate_basic & | |
783 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
784 | else | |
785 | priv->staging_rxon.cck_basic_rates = | |
786 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
787 | ||
788 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
789 | priv->staging_rxon.ofdm_basic_rates = | |
790 | ((priv->active_rate_basic & | |
791 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
792 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
793 | else | |
794 | priv->staging_rxon.ofdm_basic_rates = | |
795 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
796 | } | |
797 | ||
b481de9c | 798 | |
b481de9c ZY |
799 | /****************************************************************************** |
800 | * | |
801 | * Generic RX handler implementations | |
802 | * | |
803 | ******************************************************************************/ | |
885ba202 TW |
804 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
805 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 806 | { |
db11d634 | 807 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 808 | struct iwl_alive_resp *palive; |
b481de9c ZY |
809 | struct delayed_work *pwork; |
810 | ||
811 | palive = &pkt->u.alive_frame; | |
812 | ||
813 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
814 | "0x%01X 0x%01X\n", | |
815 | palive->is_valid, palive->ver_type, | |
816 | palive->ver_subtype); | |
817 | ||
818 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
819 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
820 | memcpy(&priv->card_alive_init, | |
821 | &pkt->u.alive_frame, | |
885ba202 | 822 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
823 | pwork = &priv->init_alive_start; |
824 | } else { | |
825 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
826 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 827 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
828 | pwork = &priv->alive_start; |
829 | } | |
830 | ||
831 | /* We delay the ALIVE response by 5ms to | |
832 | * give the HW RF Kill time to activate... */ | |
833 | if (palive->is_valid == UCODE_VALID_OK) | |
834 | queue_delayed_work(priv->workqueue, pwork, | |
835 | msecs_to_jiffies(5)); | |
836 | else | |
837 | IWL_WARNING("uCode did not respond OK.\n"); | |
838 | } | |
839 | ||
5b9f8cd3 | 840 | static void iwl_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 841 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 842 | { |
db11d634 | 843 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
844 | |
845 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
846 | "seq 0x%04X ser 0x%08X\n", | |
847 | le32_to_cpu(pkt->u.err_resp.error_type), | |
848 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
849 | pkt->u.err_resp.cmd_id, | |
850 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
851 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
852 | } | |
853 | ||
854 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
855 | ||
5b9f8cd3 | 856 | static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 857 | { |
db11d634 | 858 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 859 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
2aa6ab86 | 860 | struct iwl_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
861 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
862 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
863 | rxon->channel = csa->channel; | |
864 | priv->staging_rxon.channel = csa->channel; | |
865 | } | |
866 | ||
5b9f8cd3 | 867 | static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 868 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 869 | { |
0a6857e7 | 870 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 871 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
2aa6ab86 | 872 | struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
873 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
874 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
875 | #endif | |
876 | } | |
877 | ||
5b9f8cd3 | 878 | static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 879 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 880 | { |
db11d634 | 881 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
882 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
883 | "notification for %s:\n", | |
884 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 885 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
886 | } |
887 | ||
5b9f8cd3 | 888 | static void iwl_bg_beacon_update(struct work_struct *work) |
b481de9c | 889 | { |
c79dd5b5 TW |
890 | struct iwl_priv *priv = |
891 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
892 | struct sk_buff *beacon; |
893 | ||
894 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 895 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
896 | |
897 | if (!beacon) { | |
898 | IWL_ERROR("update beacon failed\n"); | |
899 | return; | |
900 | } | |
901 | ||
902 | mutex_lock(&priv->mutex); | |
903 | /* new beacon skb is allocated every time; dispose previous.*/ | |
904 | if (priv->ibss_beacon) | |
905 | dev_kfree_skb(priv->ibss_beacon); | |
906 | ||
907 | priv->ibss_beacon = beacon; | |
908 | mutex_unlock(&priv->mutex); | |
909 | ||
5b9f8cd3 | 910 | iwl_send_beacon_cmd(priv); |
b481de9c ZY |
911 | } |
912 | ||
4e39317d | 913 | /** |
5b9f8cd3 | 914 | * iwl_bg_statistics_periodic - Timer callback to queue statistics |
4e39317d EG |
915 | * |
916 | * This callback is provided in order to send a statistics request. | |
917 | * | |
918 | * This timer function is continually reset to execute within | |
919 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
920 | * was received. We need to ensure we receive the statistics in order | |
921 | * to update the temperature used for calibrating the TXPOWER. | |
922 | */ | |
5b9f8cd3 | 923 | static void iwl_bg_statistics_periodic(unsigned long data) |
4e39317d EG |
924 | { |
925 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
926 | ||
927 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
928 | return; | |
929 | ||
61780ee3 MA |
930 | /* dont send host command if rf-kill is on */ |
931 | if (!iwl_is_ready_rf(priv)) | |
932 | return; | |
933 | ||
4e39317d EG |
934 | iwl_send_statistics_request(priv, CMD_ASYNC); |
935 | } | |
936 | ||
5b9f8cd3 | 937 | static void iwl_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 938 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 939 | { |
0a6857e7 | 940 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 941 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
2aa6ab86 TW |
942 | struct iwl4965_beacon_notif *beacon = |
943 | (struct iwl4965_beacon_notif *)pkt->u.raw; | |
e7d326ac | 944 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
945 | |
946 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
947 | "tsf %d %d rate %d\n", | |
25a6572c | 948 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
949 | beacon->beacon_notify_hdr.failure_frame, |
950 | le32_to_cpu(beacon->ibss_mgr_status), | |
951 | le32_to_cpu(beacon->high_tsf), | |
952 | le32_to_cpu(beacon->low_tsf), rate); | |
953 | #endif | |
954 | ||
05c914fe | 955 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
b481de9c ZY |
956 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) |
957 | queue_work(priv->workqueue, &priv->beacon_update); | |
958 | } | |
959 | ||
b481de9c ZY |
960 | /* Handle notification from uCode that card's power state is changing |
961 | * due to software, hardware, or critical temperature RFKILL */ | |
5b9f8cd3 | 962 | static void iwl_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 963 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 964 | { |
db11d634 | 965 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
966 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
967 | unsigned long status = priv->status; | |
968 | ||
969 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
970 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
971 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
972 | ||
973 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
974 | RF_CARD_DISABLED)) { | |
975 | ||
3395f6e9 | 976 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
977 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
978 | ||
3395f6e9 TW |
979 | if (!iwl_grab_nic_access(priv)) { |
980 | iwl_write_direct32( | |
b481de9c ZY |
981 | priv, HBUS_TARG_MBX_C, |
982 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
983 | ||
3395f6e9 | 984 | iwl_release_nic_access(priv); |
b481de9c ZY |
985 | } |
986 | ||
987 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 988 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 989 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
990 | if (!iwl_grab_nic_access(priv)) { |
991 | iwl_write_direct32( | |
b481de9c ZY |
992 | priv, HBUS_TARG_MBX_C, |
993 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
994 | ||
3395f6e9 | 995 | iwl_release_nic_access(priv); |
b481de9c ZY |
996 | } |
997 | } | |
998 | ||
999 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1000 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1001 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1002 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1003 | if (!iwl_grab_nic_access(priv)) | |
1004 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1005 | } |
1006 | } | |
1007 | ||
1008 | if (flags & HW_CARD_DISABLED) | |
1009 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1010 | else | |
1011 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1012 | ||
1013 | ||
1014 | if (flags & SW_CARD_DISABLED) | |
1015 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1016 | else | |
1017 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1018 | ||
1019 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1020 | iwl_scan_cancel(priv); |
b481de9c ZY |
1021 | |
1022 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1023 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1024 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1025 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1026 | queue_work(priv->workqueue, &priv->rf_kill); | |
1027 | else | |
1028 | wake_up_interruptible(&priv->wait_command_queue); | |
1029 | } | |
1030 | ||
5b9f8cd3 | 1031 | int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
e2e3c57b TW |
1032 | { |
1033 | int ret; | |
1034 | unsigned long flags; | |
1035 | ||
1036 | spin_lock_irqsave(&priv->lock, flags); | |
1037 | ret = iwl_grab_nic_access(priv); | |
1038 | if (ret) | |
1039 | goto err; | |
1040 | ||
1041 | if (src == IWL_PWR_SRC_VAUX) { | |
1042 | u32 val; | |
e7b63581 | 1043 | ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE, |
e2e3c57b TW |
1044 | &val); |
1045 | ||
1046 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | |
1047 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1048 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | |
1049 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1050 | } else { | |
1051 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1052 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | |
1053 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1054 | } | |
1055 | ||
1056 | iwl_release_nic_access(priv); | |
1057 | err: | |
1058 | spin_unlock_irqrestore(&priv->lock, flags); | |
1059 | return ret; | |
1060 | } | |
1061 | ||
b481de9c | 1062 | /** |
5b9f8cd3 | 1063 | * iwl_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1064 | * |
1065 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1066 | * to the host. | |
1067 | * | |
1068 | * This function chains into the hardware specific files for them to setup | |
1069 | * any hardware specific handlers as well. | |
1070 | */ | |
653fa4a0 | 1071 | static void iwl_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1072 | { |
885ba202 | 1073 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
5b9f8cd3 EG |
1074 | priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error; |
1075 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa; | |
5b9f8cd3 | 1076 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; |
b481de9c | 1077 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
5b9f8cd3 EG |
1078 | iwl_rx_pm_debug_statistics_notif; |
1079 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif; | |
b481de9c | 1080 | |
9fbab516 BC |
1081 | /* |
1082 | * The same handler is used for both the REPLY to a discrete | |
1083 | * statistics request from the host as well as for the periodic | |
1084 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1085 | */ |
8f91aecb EG |
1086 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; |
1087 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; | |
2a421b91 | 1088 | |
21c339bf | 1089 | iwl_setup_spectrum_handlers(priv); |
2a421b91 TW |
1090 | iwl_setup_rx_scan_handlers(priv); |
1091 | ||
37a44211 | 1092 | /* status change handler */ |
5b9f8cd3 | 1093 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif; |
b481de9c | 1094 | |
c1354754 TW |
1095 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1096 | iwl_rx_missed_beacon_notif; | |
37a44211 | 1097 | /* Rx handlers */ |
1781a07f EG |
1098 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy; |
1099 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx; | |
653fa4a0 EG |
1100 | /* block ack */ |
1101 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba; | |
9fbab516 | 1102 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1103 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1104 | } |
1105 | ||
5c0eef96 MA |
1106 | /* |
1107 | * this should be called while priv->lock is locked | |
1108 | */ | |
a55360e4 | 1109 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1110 | { |
a55360e4 TW |
1111 | iwl_rx_allocate(priv); |
1112 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1113 | } |
1114 | ||
b481de9c ZY |
1115 | |
1116 | /** | |
a55360e4 | 1117 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1118 | * |
1119 | * Uses the priv->rx_handlers callback function array to invoke | |
1120 | * the appropriate handlers, including command responses, | |
1121 | * frame-received notifications, and other notifications. | |
1122 | */ | |
a55360e4 | 1123 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1124 | { |
a55360e4 | 1125 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1126 | struct iwl_rx_packet *pkt; |
a55360e4 | 1127 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1128 | u32 r, i; |
1129 | int reclaim; | |
1130 | unsigned long flags; | |
5c0eef96 | 1131 | u8 fill_rx = 0; |
d68ab680 | 1132 | u32 count = 8; |
b481de9c | 1133 | |
6440adb5 BC |
1134 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1135 | * buffer that the driver may process (last buffer filled by ucode). */ | |
8d86422a | 1136 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; |
b481de9c ZY |
1137 | i = rxq->read; |
1138 | ||
1139 | /* Rx interrupt, but nothing sent from uCode */ | |
1140 | if (i == r) | |
f3d67999 | 1141 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1142 | |
a55360e4 | 1143 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1144 | fill_rx = 1; |
1145 | ||
b481de9c ZY |
1146 | while (i != r) { |
1147 | rxb = rxq->queue[i]; | |
1148 | ||
9fbab516 | 1149 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1150 | * then a bug has been introduced in the queue refilling |
1151 | * routines -- catch it here */ | |
1152 | BUG_ON(rxb == NULL); | |
1153 | ||
1154 | rxq->queue[i] = NULL; | |
1155 | ||
e91af0af JB |
1156 | dma_sync_single_range_for_cpu( |
1157 | &priv->pci_dev->dev, rxb->real_dma_addr, | |
1158 | rxb->aligned_dma_addr - rxb->real_dma_addr, | |
1159 | priv->hw_params.rx_buf_size, | |
1160 | PCI_DMA_FROMDEVICE); | |
db11d634 | 1161 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1162 | |
1163 | /* Reclaim a command buffer only if this packet is a response | |
1164 | * to a (driver-originated) command. | |
1165 | * If the packet (e.g. Rx frame) originated from uCode, | |
1166 | * there is no command buffer to reclaim. | |
1167 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1168 | * but apparently a few don't get set; catch them here. */ | |
1169 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1170 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1171 | (pkt->hdr.cmd != REPLY_RX) && |
7dddaf1a | 1172 | (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) && |
cfe01709 | 1173 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1174 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1175 | (pkt->hdr.cmd != REPLY_TX); | |
1176 | ||
1177 | /* Based on type of command response or notification, | |
1178 | * handle those that need handling via function in | |
5b9f8cd3 | 1179 | * rx_handlers table. See iwl_setup_rx_handlers() */ |
b481de9c | 1180 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1181 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1182 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1183 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1184 | } else { | |
1185 | /* No handling needed */ | |
f3d67999 | 1186 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1187 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1188 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1189 | pkt->hdr.cmd); | |
1190 | } | |
1191 | ||
1192 | if (reclaim) { | |
9fbab516 | 1193 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1194 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1195 | * as we reclaim the driver command queue */ |
1196 | if (rxb && rxb->skb) | |
17b88929 | 1197 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1198 | else |
1199 | IWL_WARNING("Claim null rxb?\n"); | |
1200 | } | |
1201 | ||
1202 | /* For now we just don't re-use anything. We can tweak this | |
1203 | * later to try and re-use notification packets and SKBs that | |
1204 | * fail to Rx correctly */ | |
1205 | if (rxb->skb != NULL) { | |
1206 | priv->alloc_rxb_skb--; | |
1207 | dev_kfree_skb_any(rxb->skb); | |
1208 | rxb->skb = NULL; | |
1209 | } | |
1210 | ||
4018517a JB |
1211 | pci_unmap_single(priv->pci_dev, rxb->real_dma_addr, |
1212 | priv->hw_params.rx_buf_size + 256, | |
9ee1ba47 | 1213 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1214 | spin_lock_irqsave(&rxq->lock, flags); |
1215 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1216 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1217 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1218 | /* If there are a lot of unused frames, |
1219 | * restock the Rx queue so ucode wont assert. */ | |
1220 | if (fill_rx) { | |
1221 | count++; | |
1222 | if (count >= 8) { | |
1223 | priv->rxq.read = i; | |
a55360e4 | 1224 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1225 | count = 0; |
1226 | } | |
1227 | } | |
b481de9c ZY |
1228 | } |
1229 | ||
1230 | /* Backtrack one entry */ | |
1231 | priv->rxq.read = i; | |
a55360e4 TW |
1232 | iwl_rx_queue_restock(priv); |
1233 | } | |
a55360e4 | 1234 | |
0a6857e7 | 1235 | #ifdef CONFIG_IWLWIFI_DEBUG |
5b9f8cd3 | 1236 | static void iwl_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1237 | { |
c1adf9fb | 1238 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 | 1239 | |
b481de9c | 1240 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1241 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1242 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1243 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1244 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1245 | le32_to_cpu(rxon->filter_flags)); | |
1246 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1247 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1248 | rxon->ofdm_basic_rates); | |
1249 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
e174961c JB |
1250 | IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); |
1251 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); | |
b481de9c ZY |
1252 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1253 | } | |
1254 | #endif | |
1255 | ||
0359facc MA |
1256 | /* call this function to flush any scheduled tasklet */ |
1257 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1258 | { | |
a96a27f9 | 1259 | /* wait to make sure we flush pending tasklet*/ |
0359facc MA |
1260 | synchronize_irq(priv->pci_dev->irq); |
1261 | tasklet_kill(&priv->irq_tasklet); | |
1262 | } | |
1263 | ||
b481de9c | 1264 | /** |
5b9f8cd3 | 1265 | * iwl_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1266 | */ |
5b9f8cd3 | 1267 | static void iwl_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1268 | { |
5b9f8cd3 | 1269 | /* Set the FW error flag -- cleared on iwl_down */ |
b481de9c ZY |
1270 | set_bit(STATUS_FW_ERROR, &priv->status); |
1271 | ||
1272 | /* Cancel currently queued command. */ | |
1273 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1274 | ||
0a6857e7 | 1275 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1276 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1277 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1278 | iwl_dump_nic_event_log(priv); |
5b9f8cd3 | 1279 | iwl_print_rx_config_cmd(priv); |
b481de9c ZY |
1280 | } |
1281 | #endif | |
1282 | ||
1283 | wake_up_interruptible(&priv->wait_command_queue); | |
1284 | ||
1285 | /* Keep the restart process from trying to send host | |
1286 | * commands by clearing the INIT status bit */ | |
1287 | clear_bit(STATUS_READY, &priv->status); | |
1288 | ||
1289 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1290 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1291 | "Restarting adapter due to uCode error.\n"); |
1292 | ||
3109ece1 | 1293 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1294 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1295 | sizeof(priv->recovery_rxon)); | |
1296 | priv->error_recovering = 1; | |
1297 | } | |
3a1081e8 EK |
1298 | if (priv->cfg->mod_params->restart_fw) |
1299 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1300 | } |
1301 | } | |
1302 | ||
5b9f8cd3 | 1303 | static void iwl_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1304 | { |
1305 | unsigned long flags; | |
1306 | ||
1307 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1308 | sizeof(priv->staging_rxon)); | |
1309 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 1310 | iwl_commit_rxon(priv); |
b481de9c | 1311 | |
4f40e4d9 | 1312 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1313 | |
1314 | spin_lock_irqsave(&priv->lock, flags); | |
1315 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1316 | priv->error_recovering = 0; | |
1317 | spin_unlock_irqrestore(&priv->lock, flags); | |
1318 | } | |
1319 | ||
5b9f8cd3 | 1320 | static void iwl_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1321 | { |
1322 | u32 inta, handled = 0; | |
1323 | u32 inta_fh; | |
1324 | unsigned long flags; | |
0a6857e7 | 1325 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1326 | u32 inta_mask; |
1327 | #endif | |
1328 | ||
1329 | spin_lock_irqsave(&priv->lock, flags); | |
1330 | ||
1331 | /* Ack/clear/reset pending uCode interrupts. | |
1332 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1333 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1334 | inta = iwl_read32(priv, CSR_INT); |
1335 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1336 | |
1337 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1338 | * Any new interrupts that happen after this, either while we're | |
1339 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1340 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1341 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1342 | |
0a6857e7 | 1343 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1344 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1345 | /* just for debug */ |
3395f6e9 | 1346 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1347 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1348 | inta, inta_mask, inta_fh); | |
1349 | } | |
1350 | #endif | |
1351 | ||
1352 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1353 | * atomic, make sure that inta covers all the interrupts that | |
1354 | * we've discovered, even if FH interrupt came in just after | |
1355 | * reading CSR_INT. */ | |
6f83eaa1 | 1356 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1357 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1358 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1359 | inta |= CSR_INT_BIT_FH_TX; |
1360 | ||
1361 | /* Now service all interrupt bits discovered above. */ | |
1362 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1363 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1364 | ||
1365 | /* Tell the device to stop sending interrupts */ | |
5b9f8cd3 | 1366 | iwl_disable_interrupts(priv); |
b481de9c | 1367 | |
5b9f8cd3 | 1368 | iwl_irq_handle_error(priv); |
b481de9c ZY |
1369 | |
1370 | handled |= CSR_INT_BIT_HW_ERR; | |
1371 | ||
1372 | spin_unlock_irqrestore(&priv->lock, flags); | |
1373 | ||
1374 | return; | |
1375 | } | |
1376 | ||
0a6857e7 | 1377 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1378 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1379 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1380 | if (inta & CSR_INT_BIT_SCD) |
1381 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1382 | "the frame/frames.\n"); | |
b481de9c ZY |
1383 | |
1384 | /* Alive notification via Rx interrupt will do the real work */ | |
1385 | if (inta & CSR_INT_BIT_ALIVE) | |
1386 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1387 | } | |
1388 | #endif | |
1389 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1390 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1391 | |
9fbab516 | 1392 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1393 | if (inta & CSR_INT_BIT_RF_KILL) { |
1394 | int hw_rf_kill = 0; | |
3395f6e9 | 1395 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1396 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1397 | hw_rf_kill = 1; | |
1398 | ||
f3d67999 | 1399 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
c3056065 | 1400 | hw_rf_kill ? "disable radio" : "enable radio"); |
b481de9c | 1401 | |
a9efa652 EG |
1402 | /* driver only loads ucode once setting the interface up. |
1403 | * the driver as well won't allow loading if RFKILL is set | |
1404 | * therefore no need to restart the driver from this handler | |
1405 | */ | |
edb34228 | 1406 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
53e49093 | 1407 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
edb34228 MA |
1408 | if (priv->is_open && !iwl_is_rfkill(priv)) |
1409 | queue_work(priv->workqueue, &priv->up); | |
1410 | } | |
b481de9c ZY |
1411 | |
1412 | handled |= CSR_INT_BIT_RF_KILL; | |
1413 | } | |
1414 | ||
9fbab516 | 1415 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1416 | if (inta & CSR_INT_BIT_CT_KILL) { |
1417 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1418 | handled |= CSR_INT_BIT_CT_KILL; | |
1419 | } | |
1420 | ||
1421 | /* Error detected by uCode */ | |
1422 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1423 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1424 | inta); | |
5b9f8cd3 | 1425 | iwl_irq_handle_error(priv); |
b481de9c ZY |
1426 | handled |= CSR_INT_BIT_SW_ERR; |
1427 | } | |
1428 | ||
1429 | /* uCode wakes up after power-down sleep */ | |
1430 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1431 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1432 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1433 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1434 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1435 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1436 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1437 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1438 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1439 | |
1440 | handled |= CSR_INT_BIT_WAKEUP; | |
1441 | } | |
1442 | ||
1443 | /* All uCode command responses, including Tx command responses, | |
1444 | * Rx "responses" (frame-received notification), and other | |
1445 | * notifications from uCode come through here*/ | |
1446 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1447 | iwl_rx_handle(priv); |
b481de9c ZY |
1448 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1449 | } | |
1450 | ||
1451 | if (inta & CSR_INT_BIT_FH_TX) { | |
1452 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1453 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1454 | /* FH finished to write, send event */ |
1455 | priv->ucode_write_complete = 1; | |
1456 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1457 | } |
1458 | ||
1459 | if (inta & ~handled) | |
1460 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1461 | ||
1462 | if (inta & ~CSR_INI_SET_MASK) { | |
1463 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1464 | inta & ~CSR_INI_SET_MASK); | |
1465 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1466 | } | |
1467 | ||
1468 | /* Re-enable all interrupts */ | |
0359facc MA |
1469 | /* only Re-enable if diabled by irq */ |
1470 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
5b9f8cd3 | 1471 | iwl_enable_interrupts(priv); |
b481de9c | 1472 | |
0a6857e7 | 1473 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1474 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1475 | inta = iwl_read32(priv, CSR_INT); |
1476 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1477 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1478 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1479 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1480 | } | |
1481 | #endif | |
1482 | spin_unlock_irqrestore(&priv->lock, flags); | |
1483 | } | |
1484 | ||
5b9f8cd3 | 1485 | static irqreturn_t iwl_isr(int irq, void *data) |
b481de9c | 1486 | { |
c79dd5b5 | 1487 | struct iwl_priv *priv = data; |
b481de9c ZY |
1488 | u32 inta, inta_mask; |
1489 | u32 inta_fh; | |
1490 | if (!priv) | |
1491 | return IRQ_NONE; | |
1492 | ||
1493 | spin_lock(&priv->lock); | |
1494 | ||
1495 | /* Disable (but don't clear!) interrupts here to avoid | |
1496 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1497 | * If we have something to service, the tasklet will re-enable ints. | |
1498 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1499 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1500 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1501 | |
1502 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1503 | inta = iwl_read32(priv, CSR_INT); |
1504 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1505 | |
1506 | /* Ignore interrupt if there's nothing in NIC to service. | |
1507 | * This may be due to IRQ shared with another device, | |
1508 | * or due to sporadic interrupts thrown from our NIC. */ | |
1509 | if (!inta && !inta_fh) { | |
1510 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1511 | goto none; | |
1512 | } | |
1513 | ||
1514 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1515 | /* Hardware disappeared. It might have already raised |
1516 | * an interrupt */ | |
99df630c | 1517 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta); |
66fbb541 | 1518 | goto unplugged; |
b481de9c ZY |
1519 | } |
1520 | ||
1521 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1522 | inta, inta_mask, inta_fh); | |
1523 | ||
25c03d8e JP |
1524 | inta &= ~CSR_INT_BIT_SCD; |
1525 | ||
5b9f8cd3 | 1526 | /* iwl_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1527 | if (likely(inta || inta_fh)) |
1528 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1529 | |
66fbb541 ON |
1530 | unplugged: |
1531 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1532 | return IRQ_HANDLED; |
1533 | ||
1534 | none: | |
1535 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1536 | /* only Re-enable if diabled by irq */ |
1537 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
5b9f8cd3 | 1538 | iwl_enable_interrupts(priv); |
b481de9c ZY |
1539 | spin_unlock(&priv->lock); |
1540 | return IRQ_NONE; | |
1541 | } | |
1542 | ||
b481de9c ZY |
1543 | /****************************************************************************** |
1544 | * | |
1545 | * uCode download functions | |
1546 | * | |
1547 | ******************************************************************************/ | |
1548 | ||
5b9f8cd3 | 1549 | static void iwl_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1550 | { |
98c92211 TW |
1551 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1552 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1553 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1554 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1555 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1556 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1557 | } |
1558 | ||
5b9f8cd3 | 1559 | static void iwl_nic_start(struct iwl_priv *priv) |
edcdf8b2 RR |
1560 | { |
1561 | /* Remove all resets to allow NIC to operate */ | |
1562 | iwl_write32(priv, CSR_RESET, 0); | |
1563 | } | |
1564 | ||
1565 | ||
b481de9c | 1566 | /** |
5b9f8cd3 | 1567 | * iwl_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1568 | * |
1569 | * Copy into buffers for card to fetch via bus-mastering | |
1570 | */ | |
5b9f8cd3 | 1571 | static int iwl_read_ucode(struct iwl_priv *priv) |
b481de9c | 1572 | { |
14b3d338 | 1573 | struct iwl_ucode *ucode; |
a0987a8d | 1574 | int ret = -EINVAL, index; |
b481de9c | 1575 | const struct firmware *ucode_raw; |
a0987a8d RC |
1576 | const char *name_pre = priv->cfg->fw_name_pre; |
1577 | const unsigned int api_max = priv->cfg->ucode_api_max; | |
1578 | const unsigned int api_min = priv->cfg->ucode_api_min; | |
1579 | char buf[25]; | |
b481de9c ZY |
1580 | u8 *src; |
1581 | size_t len; | |
a0987a8d | 1582 | u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; |
b481de9c ZY |
1583 | |
1584 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1585 | * request_firmware() is synchronous, file is in memory on return. */ | |
a0987a8d RC |
1586 | for (index = api_max; index >= api_min; index--) { |
1587 | sprintf(buf, "%s%d%s", name_pre, index, ".ucode"); | |
1588 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); | |
1589 | if (ret < 0) { | |
1590 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1591 | buf, ret); | |
1592 | if (ret == -ENOENT) | |
1593 | continue; | |
1594 | else | |
1595 | goto error; | |
1596 | } else { | |
1597 | if (index < api_max) | |
1598 | IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n", | |
1599 | buf, api_max); | |
1600 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1601 | buf, ucode_raw->size); | |
1602 | break; | |
1603 | } | |
b481de9c ZY |
1604 | } |
1605 | ||
a0987a8d RC |
1606 | if (ret < 0) |
1607 | goto error; | |
b481de9c ZY |
1608 | |
1609 | /* Make sure that we got at least our header! */ | |
1610 | if (ucode_raw->size < sizeof(*ucode)) { | |
1611 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1612 | ret = -EINVAL; |
b481de9c ZY |
1613 | goto err_release; |
1614 | } | |
1615 | ||
1616 | /* Data from ucode file: header followed by uCode images */ | |
1617 | ucode = (void *)ucode_raw->data; | |
1618 | ||
c02b3acd | 1619 | priv->ucode_ver = le32_to_cpu(ucode->ver); |
a0987a8d | 1620 | api_ver = IWL_UCODE_API(priv->ucode_ver); |
b481de9c ZY |
1621 | inst_size = le32_to_cpu(ucode->inst_size); |
1622 | data_size = le32_to_cpu(ucode->data_size); | |
1623 | init_size = le32_to_cpu(ucode->init_size); | |
1624 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1625 | boot_size = le32_to_cpu(ucode->boot_size); | |
1626 | ||
a0987a8d RC |
1627 | /* api_ver should match the api version forming part of the |
1628 | * firmware filename ... but we don't check for that and only rely | |
1629 | * on the API version read from firware header from here on forward */ | |
1630 | ||
1631 | if (api_ver < api_min || api_ver > api_max) { | |
1632 | IWL_ERROR("Driver unable to support your firmware API. " | |
1633 | "Driver supports v%u, firmware is v%u.\n", | |
1634 | api_max, api_ver); | |
1635 | priv->ucode_ver = 0; | |
1636 | ret = -EINVAL; | |
1637 | goto err_release; | |
1638 | } | |
1639 | if (api_ver != api_max) | |
1640 | IWL_ERROR("Firmware has old API version. Expected v%u, " | |
1641 | "got v%u. New firmware can be obtained " | |
1642 | "from http://www.intellinuxwireless.org.\n", | |
1643 | api_max, api_ver); | |
1644 | ||
1645 | printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n", | |
c02b3acd CR |
1646 | IWL_UCODE_MAJOR(priv->ucode_ver), |
1647 | IWL_UCODE_MINOR(priv->ucode_ver), | |
1648 | IWL_UCODE_API(priv->ucode_ver), | |
1649 | IWL_UCODE_SERIAL(priv->ucode_ver)); | |
a0987a8d RC |
1650 | |
1651 | IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n", | |
1652 | priv->ucode_ver); | |
b481de9c ZY |
1653 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", |
1654 | inst_size); | |
1655 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1656 | data_size); | |
1657 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1658 | init_size); | |
1659 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1660 | init_data_size); | |
1661 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1662 | boot_size); | |
1663 | ||
1664 | /* Verify size of file vs. image size info in file's header */ | |
1665 | if (ucode_raw->size < sizeof(*ucode) + | |
1666 | inst_size + data_size + init_size + | |
1667 | init_data_size + boot_size) { | |
1668 | ||
1669 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1670 | (int)ucode_raw->size); | |
90e759d1 | 1671 | ret = -EINVAL; |
b481de9c ZY |
1672 | goto err_release; |
1673 | } | |
1674 | ||
1675 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1676 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1677 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1678 | inst_size); | |
1679 | ret = -EINVAL; | |
b481de9c ZY |
1680 | goto err_release; |
1681 | } | |
1682 | ||
099b40b7 | 1683 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
1684 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
1685 | data_size); | |
1686 | ret = -EINVAL; | |
b481de9c ZY |
1687 | goto err_release; |
1688 | } | |
099b40b7 | 1689 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 1690 | IWL_DEBUG_INFO |
90e759d1 TW |
1691 | ("uCode init instr len %d too large to fit in\n", |
1692 | init_size); | |
1693 | ret = -EINVAL; | |
b481de9c ZY |
1694 | goto err_release; |
1695 | } | |
099b40b7 | 1696 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 1697 | IWL_DEBUG_INFO |
90e759d1 TW |
1698 | ("uCode init data len %d too large to fit in\n", |
1699 | init_data_size); | |
1700 | ret = -EINVAL; | |
b481de9c ZY |
1701 | goto err_release; |
1702 | } | |
099b40b7 | 1703 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 1704 | IWL_DEBUG_INFO |
90e759d1 TW |
1705 | ("uCode boot instr len %d too large to fit in\n", |
1706 | boot_size); | |
1707 | ret = -EINVAL; | |
b481de9c ZY |
1708 | goto err_release; |
1709 | } | |
1710 | ||
1711 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
1712 | ||
1713 | /* Runtime instructions and 2 copies of data: | |
1714 | * 1) unmodified from disk | |
1715 | * 2) backup cache for save/restore during power-downs */ | |
1716 | priv->ucode_code.len = inst_size; | |
98c92211 | 1717 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
1718 | |
1719 | priv->ucode_data.len = data_size; | |
98c92211 | 1720 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
1721 | |
1722 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 1723 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
1724 | |
1725 | /* Initialization instructions and data */ | |
90e759d1 TW |
1726 | if (init_size && init_data_size) { |
1727 | priv->ucode_init.len = init_size; | |
98c92211 | 1728 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
1729 | |
1730 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 1731 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
1732 | |
1733 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
1734 | goto err_pci_alloc; | |
1735 | } | |
b481de9c ZY |
1736 | |
1737 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
1738 | if (boot_size) { |
1739 | priv->ucode_boot.len = boot_size; | |
98c92211 | 1740 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 1741 | |
90e759d1 TW |
1742 | if (!priv->ucode_boot.v_addr) |
1743 | goto err_pci_alloc; | |
1744 | } | |
b481de9c ZY |
1745 | |
1746 | /* Copy images into buffers for card's bus-master reads ... */ | |
1747 | ||
1748 | /* Runtime instructions (first block of data in file) */ | |
1749 | src = &ucode->data[0]; | |
1750 | len = priv->ucode_code.len; | |
90e759d1 | 1751 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
1752 | memcpy(priv->ucode_code.v_addr, src, len); |
1753 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
1754 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
1755 | ||
1756 | /* Runtime data (2nd block) | |
5b9f8cd3 | 1757 | * NOTE: Copy into backup buffer will be done in iwl_up() */ |
b481de9c ZY |
1758 | src = &ucode->data[inst_size]; |
1759 | len = priv->ucode_data.len; | |
90e759d1 | 1760 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
1761 | memcpy(priv->ucode_data.v_addr, src, len); |
1762 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
1763 | ||
1764 | /* Initialization instructions (3rd block) */ | |
1765 | if (init_size) { | |
1766 | src = &ucode->data[inst_size + data_size]; | |
1767 | len = priv->ucode_init.len; | |
90e759d1 TW |
1768 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
1769 | len); | |
b481de9c ZY |
1770 | memcpy(priv->ucode_init.v_addr, src, len); |
1771 | } | |
1772 | ||
1773 | /* Initialization data (4th block) */ | |
1774 | if (init_data_size) { | |
1775 | src = &ucode->data[inst_size + data_size + init_size]; | |
1776 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
1777 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
1778 | len); | |
b481de9c ZY |
1779 | memcpy(priv->ucode_init_data.v_addr, src, len); |
1780 | } | |
1781 | ||
1782 | /* Bootstrap instructions (5th block) */ | |
1783 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
1784 | len = priv->ucode_boot.len; | |
90e759d1 | 1785 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
1786 | memcpy(priv->ucode_boot.v_addr, src, len); |
1787 | ||
1788 | /* We have our copies now, allow OS release its copies */ | |
1789 | release_firmware(ucode_raw); | |
1790 | return 0; | |
1791 | ||
1792 | err_pci_alloc: | |
1793 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 1794 | ret = -ENOMEM; |
5b9f8cd3 | 1795 | iwl_dealloc_ucode_pci(priv); |
b481de9c ZY |
1796 | |
1797 | err_release: | |
1798 | release_firmware(ucode_raw); | |
1799 | ||
1800 | error: | |
90e759d1 | 1801 | return ret; |
b481de9c ZY |
1802 | } |
1803 | ||
ada17513 MA |
1804 | /* temporary */ |
1805 | static int iwl_mac_beacon_update(struct ieee80211_hw *hw, | |
1806 | struct sk_buff *skb); | |
1807 | ||
b481de9c | 1808 | /** |
4a4a9e81 | 1809 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 1810 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 1811 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 1812 | */ |
4a4a9e81 | 1813 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 1814 | { |
57aab75a | 1815 | int ret = 0; |
b481de9c ZY |
1816 | |
1817 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1818 | ||
1819 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
1820 | /* We had an error bringing up the hardware, so take it | |
1821 | * all the way back down so we can try again */ | |
1822 | IWL_DEBUG_INFO("Alive failed.\n"); | |
1823 | goto restart; | |
1824 | } | |
1825 | ||
1826 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
1827 | * This is a paranoid check, because we would not have gotten the | |
1828 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 1829 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
1830 | /* Runtime instruction load was bad; |
1831 | * take it all the way back down so we can try again */ | |
1832 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
1833 | goto restart; | |
1834 | } | |
1835 | ||
37deb2a0 | 1836 | iwl_clear_stations_table(priv); |
57aab75a TW |
1837 | ret = priv->cfg->ops->lib->alive_notify(priv); |
1838 | if (ret) { | |
b481de9c | 1839 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 1840 | ret); |
b481de9c ZY |
1841 | goto restart; |
1842 | } | |
1843 | ||
5b9f8cd3 | 1844 | /* After the ALIVE response, we can send host commands to the uCode */ |
b481de9c ZY |
1845 | set_bit(STATUS_ALIVE, &priv->status); |
1846 | ||
fee1247a | 1847 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
1848 | return; |
1849 | ||
36d6825b | 1850 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
1851 | |
1852 | priv->active_rate = priv->rates_mask; | |
1853 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
1854 | ||
3109ece1 | 1855 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
1856 | struct iwl_rxon_cmd *active_rxon = |
1857 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
1858 | |
1859 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
1860 | sizeof(priv->staging_rxon)); | |
1861 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
1862 | } else { | |
1863 | /* Initialize our rx_config data */ | |
5b9f8cd3 | 1864 | iwl_connection_init_rx_config(priv, priv->iw_mode); |
b481de9c ZY |
1865 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
1866 | } | |
1867 | ||
9fbab516 | 1868 | /* Configure Bluetooth device coexistence support */ |
5b9f8cd3 | 1869 | iwl_send_bt_config(priv); |
b481de9c | 1870 | |
4a4a9e81 TW |
1871 | iwl_reset_run_time_calib(priv); |
1872 | ||
b481de9c | 1873 | /* Configure the adapter for unassociated operation */ |
5b9f8cd3 | 1874 | iwl_commit_rxon(priv); |
b481de9c ZY |
1875 | |
1876 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 1877 | iwl_rf_kill_ct_config(priv); |
5a66926a | 1878 | |
fe00b5a5 RC |
1879 | iwl_leds_register(priv); |
1880 | ||
b481de9c | 1881 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 1882 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 1883 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
1884 | |
1885 | if (priv->error_recovering) | |
5b9f8cd3 | 1886 | iwl_error_recovery(priv); |
b481de9c | 1887 | |
58d0f361 | 1888 | iwl_power_update_mode(priv, 1); |
c46fbefa | 1889 | |
ada17513 MA |
1890 | /* reassociate for ADHOC mode */ |
1891 | if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) { | |
1892 | struct sk_buff *beacon = ieee80211_beacon_get(priv->hw, | |
1893 | priv->vif); | |
1894 | if (beacon) | |
1895 | iwl_mac_beacon_update(priv->hw, beacon); | |
1896 | } | |
1897 | ||
1898 | ||
c46fbefa | 1899 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) |
5b9f8cd3 | 1900 | iwl_set_mode(priv, priv->iw_mode); |
c46fbefa | 1901 | |
b481de9c ZY |
1902 | return; |
1903 | ||
1904 | restart: | |
1905 | queue_work(priv->workqueue, &priv->restart); | |
1906 | } | |
1907 | ||
4e39317d | 1908 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 1909 | |
5b9f8cd3 | 1910 | static void __iwl_down(struct iwl_priv *priv) |
b481de9c ZY |
1911 | { |
1912 | unsigned long flags; | |
1913 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
1914 | |
1915 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
1916 | ||
b481de9c ZY |
1917 | if (!exit_pending) |
1918 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
1919 | ||
ab53d8af MA |
1920 | iwl_leds_unregister(priv); |
1921 | ||
37deb2a0 | 1922 | iwl_clear_stations_table(priv); |
b481de9c ZY |
1923 | |
1924 | /* Unblock any waiting calls */ | |
1925 | wake_up_interruptible_all(&priv->wait_command_queue); | |
1926 | ||
b481de9c ZY |
1927 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
1928 | * exiting the module */ | |
1929 | if (!exit_pending) | |
1930 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
1931 | ||
1932 | /* stop and reset the on-board processor */ | |
3395f6e9 | 1933 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
1934 | |
1935 | /* tell the device to stop sending interrupts */ | |
0359facc | 1936 | spin_lock_irqsave(&priv->lock, flags); |
5b9f8cd3 | 1937 | iwl_disable_interrupts(priv); |
0359facc MA |
1938 | spin_unlock_irqrestore(&priv->lock, flags); |
1939 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
1940 | |
1941 | if (priv->mac80211_registered) | |
1942 | ieee80211_stop_queues(priv->hw); | |
1943 | ||
5b9f8cd3 | 1944 | /* If we have not previously called iwl_init() then |
b481de9c | 1945 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 1946 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
1947 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
1948 | STATUS_RF_KILL_HW | | |
1949 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
1950 | STATUS_RF_KILL_SW | | |
9788864e RC |
1951 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
1952 | STATUS_GEO_CONFIGURED | | |
b481de9c | 1953 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
052ec3f1 MA |
1954 | STATUS_IN_SUSPEND | |
1955 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
1956 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
1957 | goto exit; |
1958 | } | |
1959 | ||
1960 | /* ...otherwise clear out all the status bits but the RF Kill and | |
1961 | * SUSPEND bits and continue taking the NIC down. */ | |
1962 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
1963 | STATUS_RF_KILL_HW | | |
1964 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
1965 | STATUS_RF_KILL_SW | | |
9788864e RC |
1966 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
1967 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
1968 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
1969 | STATUS_IN_SUSPEND | | |
1970 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
052ec3f1 MA |
1971 | STATUS_FW_ERROR | |
1972 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
1973 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
1974 | |
1975 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 1976 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 1977 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
1978 | spin_unlock_irqrestore(&priv->lock, flags); |
1979 | ||
da1bc453 | 1980 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 1981 | iwl_rxq_stop(priv); |
b481de9c ZY |
1982 | |
1983 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
1984 | if (!iwl_grab_nic_access(priv)) { |
1985 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 1986 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 1987 | iwl_release_nic_access(priv); |
b481de9c ZY |
1988 | } |
1989 | spin_unlock_irqrestore(&priv->lock, flags); | |
1990 | ||
1991 | udelay(5); | |
1992 | ||
7f066108 | 1993 | /* FIXME: apm_ops.suspend(priv) */ |
d535311e GG |
1994 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
1995 | priv->cfg->ops->lib->apm_ops.stop(priv); | |
1996 | else | |
1997 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
b481de9c | 1998 | exit: |
885ba202 | 1999 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2000 | |
2001 | if (priv->ibss_beacon) | |
2002 | dev_kfree_skb(priv->ibss_beacon); | |
2003 | priv->ibss_beacon = NULL; | |
2004 | ||
2005 | /* clear out any free frames */ | |
fcab423d | 2006 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2007 | } |
2008 | ||
5b9f8cd3 | 2009 | static void iwl_down(struct iwl_priv *priv) |
b481de9c ZY |
2010 | { |
2011 | mutex_lock(&priv->mutex); | |
5b9f8cd3 | 2012 | __iwl_down(priv); |
b481de9c | 2013 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2014 | |
4e39317d | 2015 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2016 | } |
2017 | ||
2018 | #define MAX_HW_RESTARTS 5 | |
2019 | ||
5b9f8cd3 | 2020 | static int __iwl_up(struct iwl_priv *priv) |
b481de9c | 2021 | { |
57aab75a TW |
2022 | int i; |
2023 | int ret; | |
b481de9c ZY |
2024 | |
2025 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2026 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2027 | return -EIO; | |
2028 | } | |
2029 | ||
e903fbd4 RC |
2030 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2031 | IWL_ERROR("ucode not available for device bringup\n"); | |
2032 | return -EIO; | |
2033 | } | |
2034 | ||
e655b9f0 | 2035 | /* If platform's RF_KILL switch is NOT set to KILL */ |
c1842d61 | 2036 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
e655b9f0 | 2037 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2038 | else |
e655b9f0 | 2039 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2040 | |
c1842d61 | 2041 | if (iwl_is_rfkill(priv)) { |
5b9f8cd3 | 2042 | iwl_enable_interrupts(priv); |
3bff19c2 EG |
2043 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2044 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | |
c1842d61 | 2045 | return 0; |
b481de9c ZY |
2046 | } |
2047 | ||
3395f6e9 | 2048 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2049 | |
1053d35f | 2050 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2051 | if (ret) { |
2052 | IWL_ERROR("Unable to init nic\n"); | |
2053 | return ret; | |
b481de9c ZY |
2054 | } |
2055 | ||
2056 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2057 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2058 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2059 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2060 | ||
2061 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2062 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
5b9f8cd3 | 2063 | iwl_enable_interrupts(priv); |
b481de9c ZY |
2064 | |
2065 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2066 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2067 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2068 | |
2069 | /* Copy original ucode data image from disk into backup cache. | |
2070 | * This will be used to initialize the on-board processor's | |
2071 | * data SRAM for a clean start when the runtime program first loads. */ | |
2072 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2073 | priv->ucode_data.len); |
b481de9c | 2074 | |
b481de9c ZY |
2075 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2076 | ||
37deb2a0 | 2077 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2078 | |
2079 | /* load bootstrap state machine, | |
2080 | * load bootstrap program into processor's memory, | |
2081 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2082 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2083 | |
57aab75a TW |
2084 | if (ret) { |
2085 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2086 | continue; |
2087 | } | |
2088 | ||
f3d5b45b EG |
2089 | /* Clear out the uCode error bit if it is set */ |
2090 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2091 | ||
b481de9c | 2092 | /* start card; "initialize" will load runtime ucode */ |
5b9f8cd3 | 2093 | iwl_nic_start(priv); |
b481de9c | 2094 | |
b481de9c ZY |
2095 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2096 | ||
2097 | return 0; | |
2098 | } | |
2099 | ||
2100 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
5b9f8cd3 | 2101 | __iwl_down(priv); |
64e72c3e | 2102 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2103 | |
2104 | /* tried to restart and config the device for as long as our | |
2105 | * patience could withstand */ | |
2106 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2107 | return -EIO; | |
2108 | } | |
2109 | ||
2110 | ||
2111 | /***************************************************************************** | |
2112 | * | |
2113 | * Workqueue callbacks | |
2114 | * | |
2115 | *****************************************************************************/ | |
2116 | ||
4a4a9e81 | 2117 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2118 | { |
c79dd5b5 TW |
2119 | struct iwl_priv *priv = |
2120 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2121 | |
2122 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2123 | return; | |
2124 | ||
2125 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2126 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2127 | mutex_unlock(&priv->mutex); |
2128 | } | |
2129 | ||
4a4a9e81 | 2130 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2131 | { |
c79dd5b5 TW |
2132 | struct iwl_priv *priv = |
2133 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2134 | |
2135 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2136 | return; | |
2137 | ||
2138 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2139 | iwl_alive_start(priv); |
b481de9c ZY |
2140 | mutex_unlock(&priv->mutex); |
2141 | } | |
2142 | ||
5b9f8cd3 | 2143 | static void iwl_bg_rf_kill(struct work_struct *work) |
b481de9c | 2144 | { |
c79dd5b5 | 2145 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2146 | |
2147 | wake_up_interruptible(&priv->wait_command_queue); | |
2148 | ||
2149 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2150 | return; | |
2151 | ||
2152 | mutex_lock(&priv->mutex); | |
2153 | ||
fee1247a | 2154 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2155 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2156 | "HW and/or SW RF Kill no longer active, restarting " |
2157 | "device\n"); | |
2158 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2159 | queue_work(priv->workqueue, &priv->restart); | |
2160 | } else { | |
ad97edd2 MA |
2161 | /* make sure mac80211 stop sending Tx frame */ |
2162 | if (priv->mac80211_registered) | |
2163 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2164 | |
2165 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2166 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2167 | "disabled by SW switch\n"); | |
2168 | else | |
2169 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2170 | "Kill switch must be turned off for " | |
2171 | "wireless networking to work.\n"); | |
2172 | } | |
2173 | mutex_unlock(&priv->mutex); | |
80fcc9e2 | 2174 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2175 | } |
2176 | ||
16e727e8 EG |
2177 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2178 | { | |
2179 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2180 | run_time_calib_work); | |
2181 | ||
2182 | mutex_lock(&priv->mutex); | |
2183 | ||
2184 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2185 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2186 | mutex_unlock(&priv->mutex); | |
2187 | return; | |
2188 | } | |
2189 | ||
2190 | if (priv->start_calib) { | |
2191 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2192 | ||
2193 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2194 | } | |
2195 | ||
2196 | mutex_unlock(&priv->mutex); | |
2197 | return; | |
2198 | } | |
2199 | ||
5b9f8cd3 | 2200 | static void iwl_bg_up(struct work_struct *data) |
b481de9c | 2201 | { |
c79dd5b5 | 2202 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2203 | |
2204 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2205 | return; | |
2206 | ||
2207 | mutex_lock(&priv->mutex); | |
5b9f8cd3 | 2208 | __iwl_up(priv); |
b481de9c | 2209 | mutex_unlock(&priv->mutex); |
80fcc9e2 | 2210 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2211 | } |
2212 | ||
5b9f8cd3 | 2213 | static void iwl_bg_restart(struct work_struct *data) |
b481de9c | 2214 | { |
c79dd5b5 | 2215 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2216 | |
2217 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2218 | return; | |
2219 | ||
5b9f8cd3 | 2220 | iwl_down(priv); |
b481de9c ZY |
2221 | queue_work(priv->workqueue, &priv->up); |
2222 | } | |
2223 | ||
5b9f8cd3 | 2224 | static void iwl_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2225 | { |
c79dd5b5 TW |
2226 | struct iwl_priv *priv = |
2227 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2228 | |
2229 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2230 | return; | |
2231 | ||
2232 | mutex_lock(&priv->mutex); | |
a55360e4 | 2233 | iwl_rx_replenish(priv); |
b481de9c ZY |
2234 | mutex_unlock(&priv->mutex); |
2235 | } | |
2236 | ||
7878a5a4 MA |
2237 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2238 | ||
5b9f8cd3 | 2239 | static void iwl_post_associate(struct iwl_priv *priv) |
b481de9c | 2240 | { |
b481de9c | 2241 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2242 | int ret = 0; |
1ff50bda | 2243 | unsigned long flags; |
b481de9c | 2244 | |
05c914fe | 2245 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
3ac7f146 | 2246 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
b481de9c ZY |
2247 | return; |
2248 | } | |
2249 | ||
e174961c JB |
2250 | IWL_DEBUG_ASSOC("Associated as %d to: %pM\n", |
2251 | priv->assoc_id, priv->active_rxon.bssid_addr); | |
b481de9c ZY |
2252 | |
2253 | ||
2254 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2255 | return; | |
2256 | ||
b481de9c | 2257 | |
508e32e1 | 2258 | if (!priv->vif || !priv->is_open) |
948c171c | 2259 | return; |
508e32e1 | 2260 | |
c90a74ba | 2261 | iwl_power_cancel_timeout(priv); |
2a421b91 | 2262 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2263 | |
b481de9c ZY |
2264 | conf = ieee80211_get_hw_conf(priv->hw); |
2265 | ||
2266 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 2267 | iwl_commit_rxon(priv); |
b481de9c | 2268 | |
3195c1f3 | 2269 | iwl_setup_rxon_timing(priv); |
857485c0 | 2270 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2271 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2272 | if (ret) |
b481de9c ZY |
2273 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2274 | "Attempting to continue.\n"); | |
2275 | ||
2276 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2277 | ||
42eb7c64 | 2278 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2279 | |
c7de35cd | 2280 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2281 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2282 | ||
2283 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2284 | priv->assoc_id, priv->beacon_int); | |
2285 | ||
2286 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2287 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2288 | else | |
2289 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2290 | ||
2291 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2292 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2293 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2294 | else | |
2295 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2296 | ||
05c914fe | 2297 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2298 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2299 | ||
2300 | } | |
2301 | ||
5b9f8cd3 | 2302 | iwl_commit_rxon(priv); |
b481de9c ZY |
2303 | |
2304 | switch (priv->iw_mode) { | |
05c914fe | 2305 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
2306 | break; |
2307 | ||
05c914fe | 2308 | case NL80211_IFTYPE_ADHOC: |
b481de9c | 2309 | |
c46fbefa AK |
2310 | /* assume default assoc id */ |
2311 | priv->assoc_id = 1; | |
b481de9c | 2312 | |
4f40e4d9 | 2313 | iwl_rxon_add_station(priv, priv->bssid, 0); |
5b9f8cd3 | 2314 | iwl_send_beacon_cmd(priv); |
b481de9c ZY |
2315 | |
2316 | break; | |
2317 | ||
2318 | default: | |
2319 | IWL_ERROR("%s Should not be called in %d mode\n", | |
3ac7f146 | 2320 | __func__, priv->iw_mode); |
b481de9c ZY |
2321 | break; |
2322 | } | |
2323 | ||
05c914fe | 2324 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2325 | priv->assoc_station_added = 1; |
2326 | ||
1ff50bda EG |
2327 | spin_lock_irqsave(&priv->lock, flags); |
2328 | iwl_activate_qos(priv, 0); | |
2329 | spin_unlock_irqrestore(&priv->lock, flags); | |
292ae174 | 2330 | |
04816448 GE |
2331 | /* the chain noise calibration will enabled PM upon completion |
2332 | * If chain noise has already been run, then we need to enable | |
2333 | * power management here */ | |
2334 | if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE) | |
2335 | iwl_power_enable_management(priv); | |
c90a74ba EG |
2336 | |
2337 | /* Enable Rx differential gain and sensitivity calibrations */ | |
2338 | iwl_chain_noise_reset(priv); | |
2339 | priv->start_calib = 1; | |
2340 | ||
508e32e1 RC |
2341 | } |
2342 | ||
b481de9c ZY |
2343 | /***************************************************************************** |
2344 | * | |
2345 | * mac80211 entry point functions | |
2346 | * | |
2347 | *****************************************************************************/ | |
2348 | ||
154b25ce | 2349 | #define UCODE_READY_TIMEOUT (4 * HZ) |
5a66926a | 2350 | |
5b9f8cd3 | 2351 | static int iwl_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2352 | { |
c79dd5b5 | 2353 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2354 | int ret; |
cf88c433 | 2355 | u16 pci_cmd; |
b481de9c ZY |
2356 | |
2357 | IWL_DEBUG_MAC80211("enter\n"); | |
2358 | ||
5a66926a ZY |
2359 | if (pci_enable_device(priv->pci_dev)) { |
2360 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2361 | return -ENODEV; | |
2362 | } | |
2363 | pci_restore_state(priv->pci_dev); | |
2364 | pci_enable_msi(priv->pci_dev); | |
2365 | ||
cf88c433 TW |
2366 | /* enable interrupts if needed: hw bug w/a */ |
2367 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | |
2368 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | |
2369 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
2370 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | |
2371 | } | |
2372 | ||
5b9f8cd3 | 2373 | ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, |
5a66926a ZY |
2374 | DRV_NAME, priv); |
2375 | if (ret) { | |
2376 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2377 | goto out_disable_msi; | |
2378 | } | |
2379 | ||
b481de9c ZY |
2380 | /* we should be verifying the device is ready to be opened */ |
2381 | mutex_lock(&priv->mutex); | |
2382 | ||
c1adf9fb | 2383 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2384 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2385 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2386 | |
5a66926a | 2387 | if (!priv->ucode_code.len) { |
5b9f8cd3 | 2388 | ret = iwl_read_ucode(priv); |
5a66926a ZY |
2389 | if (ret) { |
2390 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2391 | mutex_unlock(&priv->mutex); | |
2392 | goto out_release_irq; | |
2393 | } | |
2394 | } | |
b481de9c | 2395 | |
5b9f8cd3 | 2396 | ret = __iwl_up(priv); |
5a66926a | 2397 | |
b481de9c | 2398 | mutex_unlock(&priv->mutex); |
5a66926a | 2399 | |
80fcc9e2 AG |
2400 | iwl_rfkill_set_hw_state(priv); |
2401 | ||
e655b9f0 ZY |
2402 | if (ret) |
2403 | goto out_release_irq; | |
2404 | ||
c1842d61 TW |
2405 | if (iwl_is_rfkill(priv)) |
2406 | goto out; | |
2407 | ||
e655b9f0 ZY |
2408 | IWL_DEBUG_INFO("Start UP work done.\n"); |
2409 | ||
2410 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2411 | return 0; | |
2412 | ||
fe9b6b72 | 2413 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2414 | * mac80211 will not be run successfully. */ |
154b25ce EG |
2415 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
2416 | test_bit(STATUS_READY, &priv->status), | |
2417 | UCODE_READY_TIMEOUT); | |
2418 | if (!ret) { | |
2419 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2420 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2421 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2422 | ret = -ETIMEDOUT; | |
2423 | goto out_release_irq; | |
5a66926a | 2424 | } |
fe9b6b72 | 2425 | } |
0a078ffa | 2426 | |
c1842d61 | 2427 | out: |
0a078ffa | 2428 | priv->is_open = 1; |
b481de9c ZY |
2429 | IWL_DEBUG_MAC80211("leave\n"); |
2430 | return 0; | |
5a66926a ZY |
2431 | |
2432 | out_release_irq: | |
2433 | free_irq(priv->pci_dev->irq, priv); | |
2434 | out_disable_msi: | |
2435 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2436 | pci_disable_device(priv->pci_dev); |
2437 | priv->is_open = 0; | |
2438 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2439 | return ret; |
b481de9c ZY |
2440 | } |
2441 | ||
5b9f8cd3 | 2442 | static void iwl_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2443 | { |
c79dd5b5 | 2444 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2445 | |
2446 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2447 | |
e655b9f0 ZY |
2448 | if (!priv->is_open) { |
2449 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2450 | return; | |
2451 | } | |
2452 | ||
b481de9c | 2453 | priv->is_open = 0; |
5a66926a | 2454 | |
fee1247a | 2455 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2456 | /* stop mac, cancel any scan request and clear |
2457 | * RXON_FILTER_ASSOC_MSK BIT | |
2458 | */ | |
5a66926a | 2459 | mutex_lock(&priv->mutex); |
2a421b91 | 2460 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2461 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2462 | } |
2463 | ||
5b9f8cd3 | 2464 | iwl_down(priv); |
5a66926a ZY |
2465 | |
2466 | flush_workqueue(priv->workqueue); | |
2467 | free_irq(priv->pci_dev->irq, priv); | |
2468 | pci_disable_msi(priv->pci_dev); | |
2469 | pci_save_state(priv->pci_dev); | |
2470 | pci_disable_device(priv->pci_dev); | |
948c171c | 2471 | |
b481de9c | 2472 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2473 | } |
2474 | ||
5b9f8cd3 | 2475 | static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2476 | { |
c79dd5b5 | 2477 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2478 | |
f3674227 | 2479 | IWL_DEBUG_MACDUMP("enter\n"); |
b481de9c | 2480 | |
b481de9c | 2481 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
e039fa4a | 2482 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2483 | |
e039fa4a | 2484 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2485 | dev_kfree_skb_any(skb); |
2486 | ||
f3674227 | 2487 | IWL_DEBUG_MACDUMP("leave\n"); |
b481de9c ZY |
2488 | return 0; |
2489 | } | |
2490 | ||
5b9f8cd3 | 2491 | static int iwl_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2492 | struct ieee80211_if_init_conf *conf) |
2493 | { | |
c79dd5b5 | 2494 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2495 | unsigned long flags; |
2496 | ||
32bfd35d | 2497 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2498 | |
32bfd35d JB |
2499 | if (priv->vif) { |
2500 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2501 | return -EOPNOTSUPP; |
b481de9c ZY |
2502 | } |
2503 | ||
2504 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2505 | priv->vif = conf->vif; |
60294de3 | 2506 | priv->iw_mode = conf->type; |
b481de9c ZY |
2507 | |
2508 | spin_unlock_irqrestore(&priv->lock, flags); | |
2509 | ||
2510 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2511 | |
2512 | if (conf->mac_addr) { | |
e174961c | 2513 | IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr); |
864792e3 TW |
2514 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
2515 | } | |
b481de9c | 2516 | |
5b9f8cd3 | 2517 | if (iwl_set_mode(priv, conf->type) == -EAGAIN) |
c46fbefa AK |
2518 | /* we are not ready, will run again when ready */ |
2519 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2520 | |
b481de9c ZY |
2521 | mutex_unlock(&priv->mutex); |
2522 | ||
5a66926a | 2523 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2524 | return 0; |
2525 | } | |
2526 | ||
2527 | /** | |
5b9f8cd3 | 2528 | * iwl_mac_config - mac80211 config callback |
b481de9c ZY |
2529 | * |
2530 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2531 | * be set inappropriately and the driver currently sets the hardware up to | |
2532 | * use it whenever needed. | |
2533 | */ | |
5b9f8cd3 | 2534 | static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) |
b481de9c | 2535 | { |
c79dd5b5 | 2536 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2537 | const struct iwl_channel_info *ch_info; |
e8975581 | 2538 | struct ieee80211_conf *conf = &hw->conf; |
b481de9c | 2539 | unsigned long flags; |
76bb77e0 | 2540 | int ret = 0; |
82a66bbb | 2541 | u16 channel; |
b481de9c ZY |
2542 | |
2543 | mutex_lock(&priv->mutex); | |
8318d78a | 2544 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2545 | |
ae5eb026 JB |
2546 | priv->current_ht_config.is_ht = conf->ht.enabled; |
2547 | ||
14a08a7f | 2548 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2549 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2550 | goto out; |
64e72c3e MA |
2551 | } |
2552 | ||
14a08a7f EG |
2553 | if (!conf->radio_enabled) |
2554 | iwl_radio_kill_sw_disable_radio(priv); | |
2555 | ||
fee1247a | 2556 | if (!iwl_is_ready(priv)) { |
b481de9c | 2557 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2558 | ret = -EIO; |
2559 | goto out; | |
b481de9c ZY |
2560 | } |
2561 | ||
1ea87396 | 2562 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2563 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 | 2564 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
b481de9c | 2565 | mutex_unlock(&priv->mutex); |
a0646470 | 2566 | return 0; |
b481de9c ZY |
2567 | } |
2568 | ||
82a66bbb TW |
2569 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2570 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2571 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2572 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2573 | ret = -EINVAL; |
2574 | goto out; | |
b481de9c ZY |
2575 | } |
2576 | ||
05c914fe | 2577 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
398f9e76 AK |
2578 | !is_channel_ibss(ch_info)) { |
2579 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2580 | conf->channel->hw_value, conf->channel->band); | |
2581 | ret = -EINVAL; | |
2582 | goto out; | |
2583 | } | |
2584 | ||
82a66bbb TW |
2585 | spin_lock_irqsave(&priv->lock, flags); |
2586 | ||
b5d7be5e | 2587 | |
78330fdd | 2588 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2589 | * from any ht related info since 2.4 does not |
2590 | * support ht */ | |
82a66bbb | 2591 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2592 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2593 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2594 | #endif | |
2595 | ) | |
2596 | priv->staging_rxon.flags = 0; | |
b481de9c | 2597 | |
17e72782 | 2598 | iwl_set_rxon_channel(priv, conf->channel); |
b481de9c | 2599 | |
82a66bbb | 2600 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2601 | |
2602 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2603 | * for each band; since the band may have changed, reset |
b481de9c | 2604 | * the rate mask to what mac80211 lists */ |
5b9f8cd3 | 2605 | iwl_set_rate(priv); |
b481de9c ZY |
2606 | |
2607 | spin_unlock_irqrestore(&priv->lock, flags); | |
2608 | ||
2609 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2610 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
5b9f8cd3 | 2611 | iwl_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2612 | goto out; |
b481de9c ZY |
2613 | } |
2614 | #endif | |
2615 | ||
b481de9c ZY |
2616 | if (!conf->radio_enabled) { |
2617 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2618 | goto out; |
b481de9c ZY |
2619 | } |
2620 | ||
fee1247a | 2621 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2622 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2623 | ret = -EIO; |
2624 | goto out; | |
b481de9c ZY |
2625 | } |
2626 | ||
e602cb18 EK |
2627 | if (conf->flags & IEEE80211_CONF_PS) |
2628 | ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3); | |
2629 | else | |
2630 | ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM); | |
2631 | if (ret) | |
2632 | IWL_DEBUG_MAC80211("Error setting power level\n"); | |
2633 | ||
630fe9b6 TW |
2634 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2635 | priv->tx_power_user_lmt, conf->power_level); | |
2636 | ||
2637 | iwl_set_tx_power(priv, conf->power_level, false); | |
2638 | ||
5b9f8cd3 | 2639 | iwl_set_rate(priv); |
b481de9c ZY |
2640 | |
2641 | if (memcmp(&priv->active_rxon, | |
2642 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
5b9f8cd3 | 2643 | iwl_commit_rxon(priv); |
b481de9c ZY |
2644 | else |
2645 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
2646 | ||
2647 | IWL_DEBUG_MAC80211("leave\n"); | |
2648 | ||
a0646470 | 2649 | out: |
5a66926a | 2650 | mutex_unlock(&priv->mutex); |
76bb77e0 | 2651 | return ret; |
b481de9c ZY |
2652 | } |
2653 | ||
5b9f8cd3 | 2654 | static void iwl_config_ap(struct iwl_priv *priv) |
b481de9c | 2655 | { |
857485c0 | 2656 | int ret = 0; |
1ff50bda | 2657 | unsigned long flags; |
b481de9c | 2658 | |
d986bcd1 | 2659 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
2660 | return; |
2661 | ||
2662 | /* The following should be done only at AP bring up */ | |
3195c1f3 | 2663 | if (!iwl_is_associated(priv)) { |
b481de9c ZY |
2664 | |
2665 | /* RXON - unassoc (to set timing command) */ | |
2666 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 2667 | iwl_commit_rxon(priv); |
b481de9c ZY |
2668 | |
2669 | /* RXON Timing */ | |
3195c1f3 | 2670 | iwl_setup_rxon_timing(priv); |
857485c0 | 2671 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2672 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2673 | if (ret) |
b481de9c ZY |
2674 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2675 | "Attempting to continue.\n"); | |
2676 | ||
c7de35cd | 2677 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2678 | |
2679 | /* FIXME: what should be the assoc_id for AP? */ | |
2680 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
2681 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2682 | priv->staging_rxon.flags |= | |
2683 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2684 | else | |
2685 | priv->staging_rxon.flags &= | |
2686 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2687 | ||
2688 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2689 | if (priv->assoc_capability & | |
2690 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2691 | priv->staging_rxon.flags |= | |
2692 | RXON_FLG_SHORT_SLOT_MSK; | |
2693 | else | |
2694 | priv->staging_rxon.flags &= | |
2695 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2696 | ||
05c914fe | 2697 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2698 | priv->staging_rxon.flags &= |
2699 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2700 | } | |
2701 | /* restore RXON assoc */ | |
2702 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 2703 | iwl_commit_rxon(priv); |
1ff50bda EG |
2704 | spin_lock_irqsave(&priv->lock, flags); |
2705 | iwl_activate_qos(priv, 1); | |
2706 | spin_unlock_irqrestore(&priv->lock, flags); | |
4f40e4d9 | 2707 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 2708 | } |
5b9f8cd3 | 2709 | iwl_send_beacon_cmd(priv); |
b481de9c ZY |
2710 | |
2711 | /* FIXME - we need to add code here to detect a totally new | |
2712 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
2713 | * clear sta table, add BCAST sta... */ | |
2714 | } | |
2715 | ||
9d139c81 | 2716 | |
5b9f8cd3 | 2717 | static int iwl_mac_config_interface(struct ieee80211_hw *hw, |
32bfd35d | 2718 | struct ieee80211_vif *vif, |
b481de9c ZY |
2719 | struct ieee80211_if_conf *conf) |
2720 | { | |
c79dd5b5 | 2721 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2722 | int rc; |
2723 | ||
2724 | if (conf == NULL) | |
2725 | return -EIO; | |
2726 | ||
b716bb91 EG |
2727 | if (priv->vif != vif) { |
2728 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
2729 | return 0; |
2730 | } | |
2731 | ||
05c914fe | 2732 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
9d139c81 JB |
2733 | conf->changed & IEEE80211_IFCC_BEACON) { |
2734 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
2735 | if (!beacon) | |
2736 | return -ENOMEM; | |
ada17513 | 2737 | mutex_lock(&priv->mutex); |
5b9f8cd3 | 2738 | rc = iwl_mac_beacon_update(hw, beacon); |
ada17513 | 2739 | mutex_unlock(&priv->mutex); |
9d139c81 JB |
2740 | if (rc) |
2741 | return rc; | |
2742 | } | |
2743 | ||
fee1247a | 2744 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
2745 | return -EAGAIN; |
2746 | ||
b481de9c ZY |
2747 | mutex_lock(&priv->mutex); |
2748 | ||
b481de9c | 2749 | if (conf->bssid) |
e174961c | 2750 | IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid); |
b481de9c | 2751 | |
4150c572 JB |
2752 | /* |
2753 | * very dubious code was here; the probe filtering flag is never set: | |
2754 | * | |
b481de9c ZY |
2755 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
2756 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 2757 | */ |
b481de9c | 2758 | |
05c914fe | 2759 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
b481de9c ZY |
2760 | if (!conf->bssid) { |
2761 | conf->bssid = priv->mac_addr; | |
2762 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
e174961c JB |
2763 | IWL_DEBUG_MAC80211("bssid was set to: %pM\n", |
2764 | conf->bssid); | |
b481de9c ZY |
2765 | } |
2766 | if (priv->ibss_beacon) | |
2767 | dev_kfree_skb(priv->ibss_beacon); | |
2768 | ||
9d139c81 | 2769 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
2770 | } |
2771 | ||
fee1247a | 2772 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
2773 | goto done; |
2774 | ||
b481de9c ZY |
2775 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
2776 | !is_multicast_ether_addr(conf->bssid)) { | |
2777 | /* If there is currently a HW scan going on in the background | |
2778 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 2779 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
2780 | IWL_WARNING("Aborted scan still in progress " |
2781 | "after 100ms\n"); | |
2782 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
2783 | mutex_unlock(&priv->mutex); | |
2784 | return -EAGAIN; | |
2785 | } | |
2786 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
2787 | ||
2788 | /* TODO: Audit driver for usage of these members and see | |
2789 | * if mac80211 deprecates them (priv->bssid looks like it | |
2790 | * shouldn't be there, but I haven't scanned the IBSS code | |
2791 | * to verify) - jpk */ | |
2792 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
2793 | ||
05c914fe | 2794 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
5b9f8cd3 | 2795 | iwl_config_ap(priv); |
b481de9c | 2796 | else { |
5b9f8cd3 | 2797 | rc = iwl_commit_rxon(priv); |
05c914fe | 2798 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) |
4f40e4d9 | 2799 | iwl_rxon_add_station( |
b481de9c ZY |
2800 | priv, priv->active_rxon.bssid_addr, 1); |
2801 | } | |
2802 | ||
2803 | } else { | |
2a421b91 | 2804 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 2805 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5b9f8cd3 | 2806 | iwl_commit_rxon(priv); |
b481de9c ZY |
2807 | } |
2808 | ||
fde3571f | 2809 | done: |
b481de9c ZY |
2810 | IWL_DEBUG_MAC80211("leave\n"); |
2811 | mutex_unlock(&priv->mutex); | |
2812 | ||
2813 | return 0; | |
2814 | } | |
2815 | ||
5b9f8cd3 | 2816 | static void iwl_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
2817 | unsigned int changed_flags, |
2818 | unsigned int *total_flags, | |
2819 | int mc_count, struct dev_addr_list *mc_list) | |
2820 | { | |
4419e39b | 2821 | struct iwl_priv *priv = hw->priv; |
352bc8de ZY |
2822 | __le32 *filter_flags = &priv->staging_rxon.filter_flags; |
2823 | ||
2824 | IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", | |
2825 | changed_flags, *total_flags); | |
25b3f57c | 2826 | |
352bc8de ZY |
2827 | if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) { |
2828 | if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) | |
2829 | *filter_flags |= RXON_FILTER_PROMISC_MSK; | |
2830 | else | |
2831 | *filter_flags &= ~RXON_FILTER_PROMISC_MSK; | |
2832 | } | |
2833 | if (changed_flags & FIF_ALLMULTI) { | |
2834 | if (*total_flags & FIF_ALLMULTI) | |
2835 | *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK; | |
2836 | else | |
2837 | *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK; | |
2838 | } | |
2839 | if (changed_flags & FIF_CONTROL) { | |
2840 | if (*total_flags & FIF_CONTROL) | |
2841 | *filter_flags |= RXON_FILTER_CTL2HOST_MSK; | |
2842 | else | |
2843 | *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK; | |
2844 | } | |
2845 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { | |
2846 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) | |
2847 | *filter_flags |= RXON_FILTER_BCON_AWARE_MSK; | |
2848 | else | |
2849 | *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK; | |
4419e39b | 2850 | } |
352bc8de ZY |
2851 | |
2852 | /* We avoid iwl_commit_rxon here to commit the new filter flags | |
2853 | * since mac80211 will call ieee80211_hw_config immediately. | |
2854 | * (mc_list is not supported at this time). Otherwise, we need to | |
2855 | * queue a background iwl_commit_rxon work. | |
2856 | */ | |
2857 | ||
2858 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | |
25b3f57c | 2859 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; |
4150c572 JB |
2860 | } |
2861 | ||
5b9f8cd3 | 2862 | static void iwl_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2863 | struct ieee80211_if_init_conf *conf) |
2864 | { | |
c79dd5b5 | 2865 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2866 | |
2867 | IWL_DEBUG_MAC80211("enter\n"); | |
2868 | ||
2869 | mutex_lock(&priv->mutex); | |
948c171c | 2870 | |
fee1247a | 2871 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 2872 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2873 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5b9f8cd3 | 2874 | iwl_commit_rxon(priv); |
fde3571f | 2875 | } |
32bfd35d JB |
2876 | if (priv->vif == conf->vif) { |
2877 | priv->vif = NULL; | |
b481de9c | 2878 | memset(priv->bssid, 0, ETH_ALEN); |
b481de9c ZY |
2879 | } |
2880 | mutex_unlock(&priv->mutex); | |
2881 | ||
2882 | IWL_DEBUG_MAC80211("leave\n"); | |
2883 | ||
2884 | } | |
471b3efd | 2885 | |
3109ece1 | 2886 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
5b9f8cd3 | 2887 | static void iwl_bss_info_changed(struct ieee80211_hw *hw, |
471b3efd JB |
2888 | struct ieee80211_vif *vif, |
2889 | struct ieee80211_bss_conf *bss_conf, | |
2890 | u32 changes) | |
220173b0 | 2891 | { |
c79dd5b5 | 2892 | struct iwl_priv *priv = hw->priv; |
220173b0 | 2893 | |
3109ece1 TW |
2894 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
2895 | ||
471b3efd | 2896 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
2897 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
2898 | bss_conf->use_short_preamble); | |
471b3efd | 2899 | if (bss_conf->use_short_preamble) |
220173b0 TW |
2900 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
2901 | else | |
2902 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2903 | } | |
2904 | ||
471b3efd | 2905 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 2906 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 2907 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
2908 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
2909 | else | |
2910 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
2911 | } | |
2912 | ||
98952d5d | 2913 | if (changes & BSS_CHANGED_HT) { |
5b9f8cd3 | 2914 | iwl_ht_conf(priv, bss_conf); |
c7de35cd | 2915 | iwl_set_rxon_chain(priv); |
98952d5d TW |
2916 | } |
2917 | ||
471b3efd | 2918 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 2919 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
2920 | /* This should never happen as this function should |
2921 | * never be called from interrupt context. */ | |
2922 | if (WARN_ON_ONCE(in_interrupt())) | |
2923 | return; | |
3109ece1 TW |
2924 | if (bss_conf->assoc) { |
2925 | priv->assoc_id = bss_conf->aid; | |
2926 | priv->beacon_int = bss_conf->beacon_int; | |
b5d7be5e | 2927 | priv->power_data.dtim_period = bss_conf->dtim_period; |
3109ece1 TW |
2928 | priv->timestamp = bss_conf->timestamp; |
2929 | priv->assoc_capability = bss_conf->assoc_capability; | |
9ccacb86 TW |
2930 | |
2931 | /* we have just associated, don't start scan too early | |
2932 | * leave time for EAPOL exchange to complete | |
2933 | */ | |
3109ece1 TW |
2934 | priv->next_scan_jiffies = jiffies + |
2935 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 | 2936 | mutex_lock(&priv->mutex); |
5b9f8cd3 | 2937 | iwl_post_associate(priv); |
508e32e1 | 2938 | mutex_unlock(&priv->mutex); |
3109ece1 TW |
2939 | } else { |
2940 | priv->assoc_id = 0; | |
2941 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
2942 | } | |
2943 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
2944 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 2945 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
2946 | } |
2947 | ||
220173b0 | 2948 | } |
b481de9c | 2949 | |
cb43dc25 | 2950 | static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len) |
b481de9c | 2951 | { |
b481de9c | 2952 | unsigned long flags; |
c79dd5b5 | 2953 | struct iwl_priv *priv = hw->priv; |
8d09a5e1 | 2954 | int ret; |
b481de9c ZY |
2955 | |
2956 | IWL_DEBUG_MAC80211("enter\n"); | |
2957 | ||
052c4b9f | 2958 | mutex_lock(&priv->mutex); |
b481de9c ZY |
2959 | spin_lock_irqsave(&priv->lock, flags); |
2960 | ||
fee1247a | 2961 | if (!iwl_is_ready_rf(priv)) { |
cb43dc25 | 2962 | ret = -EIO; |
b481de9c ZY |
2963 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); |
2964 | goto out_unlock; | |
2965 | } | |
2966 | ||
8d09a5e1 TW |
2967 | /* We don't schedule scan within next_scan_jiffies period. |
2968 | * Avoid scanning during possible EAPOL exchange, return | |
2969 | * success immediately. | |
2970 | */ | |
7878a5a4 | 2971 | if (priv->next_scan_jiffies && |
cb43dc25 | 2972 | time_after(priv->next_scan_jiffies, jiffies)) { |
681c0050 | 2973 | IWL_DEBUG_SCAN("scan rejected: within next scan period\n"); |
8d09a5e1 TW |
2974 | queue_work(priv->workqueue, &priv->scan_completed); |
2975 | ret = 0; | |
7878a5a4 MA |
2976 | goto out_unlock; |
2977 | } | |
8d09a5e1 | 2978 | |
b481de9c | 2979 | /* if we just finished scan ask for delay */ |
681c0050 | 2980 | if (iwl_is_associated(priv) && priv->last_scan_jiffies && |
cb43dc25 | 2981 | time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) { |
681c0050 | 2982 | IWL_DEBUG_SCAN("scan rejected: within previous scan period\n"); |
8d09a5e1 TW |
2983 | queue_work(priv->workqueue, &priv->scan_completed); |
2984 | ret = 0; | |
b481de9c ZY |
2985 | goto out_unlock; |
2986 | } | |
8d09a5e1 | 2987 | |
cb43dc25 | 2988 | if (ssid_len) { |
b481de9c | 2989 | priv->one_direct_scan = 1; |
cb43dc25 | 2990 | priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE); |
b481de9c | 2991 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); |
cb43dc25 | 2992 | } else { |
948c171c | 2993 | priv->one_direct_scan = 0; |
cb43dc25 | 2994 | } |
b481de9c | 2995 | |
cb43dc25 | 2996 | ret = iwl_scan_initiate(priv); |
b481de9c ZY |
2997 | |
2998 | IWL_DEBUG_MAC80211("leave\n"); | |
2999 | ||
3000 | out_unlock: | |
3001 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3002 | mutex_unlock(&priv->mutex); |
b481de9c | 3003 | |
cb43dc25 | 3004 | return ret; |
b481de9c ZY |
3005 | } |
3006 | ||
5b9f8cd3 | 3007 | static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw, |
ab885f8c EG |
3008 | struct ieee80211_key_conf *keyconf, const u8 *addr, |
3009 | u32 iv32, u16 *phase1key) | |
3010 | { | |
ab885f8c | 3011 | |
9f58671e | 3012 | struct iwl_priv *priv = hw->priv; |
ab885f8c EG |
3013 | IWL_DEBUG_MAC80211("enter\n"); |
3014 | ||
9f58671e | 3015 | iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key); |
ab885f8c EG |
3016 | |
3017 | IWL_DEBUG_MAC80211("leave\n"); | |
3018 | } | |
3019 | ||
5b9f8cd3 | 3020 | static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3021 | const u8 *local_addr, const u8 *addr, |
3022 | struct ieee80211_key_conf *key) | |
3023 | { | |
c79dd5b5 | 3024 | struct iwl_priv *priv = hw->priv; |
deb09c43 EG |
3025 | int ret = 0; |
3026 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3027 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3028 | |
3029 | IWL_DEBUG_MAC80211("enter\n"); | |
3030 | ||
099b40b7 | 3031 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3032 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3033 | return -EOPNOTSUPP; | |
3034 | } | |
3035 | ||
3036 | if (is_zero_ether_addr(addr)) | |
3037 | /* only support pairwise keys */ | |
3038 | return -EOPNOTSUPP; | |
3039 | ||
947b13a7 | 3040 | sta_id = iwl_find_station(priv, addr); |
6974e363 | 3041 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3042 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3043 | addr); | |
6974e363 | 3044 | return -EINVAL; |
b481de9c | 3045 | |
deb09c43 | 3046 | } |
b481de9c | 3047 | |
6974e363 | 3048 | mutex_lock(&priv->mutex); |
2a421b91 | 3049 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3050 | mutex_unlock(&priv->mutex); |
3051 | ||
3052 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3053 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3054 | * in 1X mode. | |
3055 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3056 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
05c914fe | 3057 | priv->iw_mode != NL80211_IFTYPE_AP) { |
6974e363 EG |
3058 | if (cmd == SET_KEY) |
3059 | is_default_wep_key = !priv->key_mapping_key; | |
3060 | else | |
ccc038ab EG |
3061 | is_default_wep_key = |
3062 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3063 | } |
052c4b9f | 3064 | |
b481de9c | 3065 | switch (cmd) { |
deb09c43 | 3066 | case SET_KEY: |
6974e363 EG |
3067 | if (is_default_wep_key) |
3068 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3069 | else |
7480513f | 3070 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3071 | |
3072 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3073 | break; |
3074 | case DISABLE_KEY: | |
6974e363 EG |
3075 | if (is_default_wep_key) |
3076 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3077 | else |
3ec47732 | 3078 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3079 | |
3080 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3081 | break; |
3082 | default: | |
deb09c43 | 3083 | ret = -EINVAL; |
b481de9c ZY |
3084 | } |
3085 | ||
3086 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3087 | |
deb09c43 | 3088 | return ret; |
b481de9c ZY |
3089 | } |
3090 | ||
5b9f8cd3 | 3091 | static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3092 | const struct ieee80211_tx_queue_params *params) |
3093 | { | |
c79dd5b5 | 3094 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3095 | unsigned long flags; |
3096 | int q; | |
b481de9c ZY |
3097 | |
3098 | IWL_DEBUG_MAC80211("enter\n"); | |
3099 | ||
fee1247a | 3100 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3101 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3102 | return -EIO; | |
3103 | } | |
3104 | ||
3105 | if (queue >= AC_NUM) { | |
3106 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3107 | return 0; | |
3108 | } | |
3109 | ||
b481de9c ZY |
3110 | q = AC_NUM - 1 - queue; |
3111 | ||
3112 | spin_lock_irqsave(&priv->lock, flags); | |
3113 | ||
3114 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3115 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3116 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3117 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3118 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3119 | |
3120 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3121 | priv->qos_data.qos_active = 1; | |
3122 | ||
05c914fe | 3123 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
1ff50bda | 3124 | iwl_activate_qos(priv, 1); |
3109ece1 | 3125 | else if (priv->assoc_id && iwl_is_associated(priv)) |
1ff50bda | 3126 | iwl_activate_qos(priv, 0); |
b481de9c | 3127 | |
1ff50bda | 3128 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3129 | |
b481de9c ZY |
3130 | IWL_DEBUG_MAC80211("leave\n"); |
3131 | return 0; | |
3132 | } | |
3133 | ||
5b9f8cd3 | 3134 | static int iwl_mac_ampdu_action(struct ieee80211_hw *hw, |
d783b061 | 3135 | enum ieee80211_ampdu_mlme_action action, |
17741cdc | 3136 | struct ieee80211_sta *sta, u16 tid, u16 *ssn) |
d783b061 TW |
3137 | { |
3138 | struct iwl_priv *priv = hw->priv; | |
d783b061 | 3139 | |
e174961c JB |
3140 | IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n", |
3141 | sta->addr, tid); | |
d783b061 TW |
3142 | |
3143 | if (!(priv->cfg->sku & IWL_SKU_N)) | |
3144 | return -EACCES; | |
3145 | ||
3146 | switch (action) { | |
3147 | case IEEE80211_AMPDU_RX_START: | |
3148 | IWL_DEBUG_HT("start Rx\n"); | |
9f58671e | 3149 | return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn); |
d783b061 TW |
3150 | case IEEE80211_AMPDU_RX_STOP: |
3151 | IWL_DEBUG_HT("stop Rx\n"); | |
9f58671e | 3152 | return iwl_sta_rx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3153 | case IEEE80211_AMPDU_TX_START: |
3154 | IWL_DEBUG_HT("start Tx\n"); | |
17741cdc | 3155 | return iwl_tx_agg_start(priv, sta->addr, tid, ssn); |
d783b061 TW |
3156 | case IEEE80211_AMPDU_TX_STOP: |
3157 | IWL_DEBUG_HT("stop Tx\n"); | |
17741cdc | 3158 | return iwl_tx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3159 | default: |
3160 | IWL_DEBUG_HT("unknown\n"); | |
3161 | return -EINVAL; | |
3162 | break; | |
3163 | } | |
3164 | return 0; | |
3165 | } | |
9f58671e | 3166 | |
5b9f8cd3 | 3167 | static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3168 | struct ieee80211_tx_queue_stats *stats) |
3169 | { | |
c79dd5b5 | 3170 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3171 | int i, avail; |
16466903 | 3172 | struct iwl_tx_queue *txq; |
443cfd45 | 3173 | struct iwl_queue *q; |
b481de9c ZY |
3174 | unsigned long flags; |
3175 | ||
3176 | IWL_DEBUG_MAC80211("enter\n"); | |
3177 | ||
fee1247a | 3178 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3179 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3180 | return -EIO; | |
3181 | } | |
3182 | ||
3183 | spin_lock_irqsave(&priv->lock, flags); | |
3184 | ||
3185 | for (i = 0; i < AC_NUM; i++) { | |
3186 | txq = &priv->txq[i]; | |
3187 | q = &txq->q; | |
443cfd45 | 3188 | avail = iwl_queue_space(q); |
b481de9c | 3189 | |
57ffc589 JB |
3190 | stats[i].len = q->n_window - avail; |
3191 | stats[i].limit = q->n_window - q->high_mark; | |
3192 | stats[i].count = q->n_window; | |
b481de9c ZY |
3193 | |
3194 | } | |
3195 | spin_unlock_irqrestore(&priv->lock, flags); | |
3196 | ||
3197 | IWL_DEBUG_MAC80211("leave\n"); | |
3198 | ||
3199 | return 0; | |
3200 | } | |
3201 | ||
5b9f8cd3 | 3202 | static int iwl_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3203 | struct ieee80211_low_level_stats *stats) |
3204 | { | |
bf403db8 EK |
3205 | struct iwl_priv *priv = hw->priv; |
3206 | ||
3207 | priv = hw->priv; | |
b481de9c ZY |
3208 | IWL_DEBUG_MAC80211("enter\n"); |
3209 | IWL_DEBUG_MAC80211("leave\n"); | |
3210 | ||
3211 | return 0; | |
3212 | } | |
3213 | ||
5b9f8cd3 | 3214 | static void iwl_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3215 | { |
c79dd5b5 | 3216 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3217 | unsigned long flags; |
3218 | ||
3219 | mutex_lock(&priv->mutex); | |
3220 | IWL_DEBUG_MAC80211("enter\n"); | |
3221 | ||
b481de9c | 3222 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3223 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3224 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3225 | |
c7de35cd | 3226 | iwl_reset_qos(priv); |
b481de9c | 3227 | |
b481de9c ZY |
3228 | spin_lock_irqsave(&priv->lock, flags); |
3229 | priv->assoc_id = 0; | |
3230 | priv->assoc_capability = 0; | |
b481de9c ZY |
3231 | priv->assoc_station_added = 0; |
3232 | ||
3233 | /* new association get rid of ibss beacon skb */ | |
3234 | if (priv->ibss_beacon) | |
3235 | dev_kfree_skb(priv->ibss_beacon); | |
3236 | ||
3237 | priv->ibss_beacon = NULL; | |
3238 | ||
3239 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3240 | priv->timestamp = 0; |
05c914fe | 3241 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) |
b481de9c ZY |
3242 | priv->beacon_int = 0; |
3243 | ||
3244 | spin_unlock_irqrestore(&priv->lock, flags); | |
3245 | ||
fee1247a | 3246 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3247 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3248 | mutex_unlock(&priv->mutex); | |
3249 | return; | |
3250 | } | |
3251 | ||
052c4b9f | 3252 | /* we are restarting association process |
3253 | * clear RXON_FILTER_ASSOC_MSK bit | |
3254 | */ | |
05c914fe | 3255 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
2a421b91 | 3256 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3257 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5b9f8cd3 | 3258 | iwl_commit_rxon(priv); |
052c4b9f | 3259 | } |
3260 | ||
5da4b55f MA |
3261 | iwl_power_update_mode(priv, 0); |
3262 | ||
b481de9c | 3263 | /* Per mac80211.h: This is only used in IBSS mode... */ |
05c914fe | 3264 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
052c4b9f | 3265 | |
c90a74ba EG |
3266 | /* switch to CAM during association period. |
3267 | * the ucode will block any association/authentication | |
3268 | * frome during assiciation period if it can not hear | |
3269 | * the AP because of PM. the timer enable PM back is | |
3270 | * association do not complete | |
3271 | */ | |
3272 | if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN | | |
3273 | IEEE80211_CHAN_RADAR)) | |
3274 | iwl_power_disable_management(priv, 3000); | |
3275 | ||
b481de9c ZY |
3276 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3277 | mutex_unlock(&priv->mutex); | |
3278 | return; | |
3279 | } | |
3280 | ||
5b9f8cd3 | 3281 | iwl_set_rate(priv); |
b481de9c ZY |
3282 | |
3283 | mutex_unlock(&priv->mutex); | |
3284 | ||
3285 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3286 | } |
3287 | ||
5b9f8cd3 | 3288 | static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3289 | { |
c79dd5b5 | 3290 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3291 | unsigned long flags; |
2ff75b78 | 3292 | __le64 timestamp; |
b481de9c | 3293 | |
b481de9c ZY |
3294 | IWL_DEBUG_MAC80211("enter\n"); |
3295 | ||
fee1247a | 3296 | if (!iwl_is_ready_rf(priv)) { |
b481de9c | 3297 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
b481de9c ZY |
3298 | return -EIO; |
3299 | } | |
3300 | ||
05c914fe | 3301 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
b481de9c | 3302 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); |
b481de9c ZY |
3303 | return -EIO; |
3304 | } | |
3305 | ||
3306 | spin_lock_irqsave(&priv->lock, flags); | |
3307 | ||
3308 | if (priv->ibss_beacon) | |
3309 | dev_kfree_skb(priv->ibss_beacon); | |
3310 | ||
3311 | priv->ibss_beacon = skb; | |
3312 | ||
3313 | priv->assoc_id = 0; | |
2ff75b78 | 3314 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b94d8eea | 3315 | priv->timestamp = le64_to_cpu(timestamp); |
b481de9c ZY |
3316 | |
3317 | IWL_DEBUG_MAC80211("leave\n"); | |
3318 | spin_unlock_irqrestore(&priv->lock, flags); | |
3319 | ||
c7de35cd | 3320 | iwl_reset_qos(priv); |
b481de9c | 3321 | |
5b9f8cd3 | 3322 | iwl_post_associate(priv); |
b481de9c | 3323 | |
b481de9c ZY |
3324 | |
3325 | return 0; | |
3326 | } | |
3327 | ||
b481de9c ZY |
3328 | /***************************************************************************** |
3329 | * | |
3330 | * sysfs attributes | |
3331 | * | |
3332 | *****************************************************************************/ | |
3333 | ||
0a6857e7 | 3334 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3335 | |
3336 | /* | |
3337 | * The following adds a new attribute to the sysfs representation | |
3338 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3339 | * used for controlling the debug level. | |
3340 | * | |
3341 | * See the level definitions in iwl for details. | |
3342 | */ | |
3343 | ||
8cf769c6 EK |
3344 | static ssize_t show_debug_level(struct device *d, |
3345 | struct device_attribute *attr, char *buf) | |
b481de9c | 3346 | { |
8cf769c6 EK |
3347 | struct iwl_priv *priv = d->driver_data; |
3348 | ||
3349 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3350 | } |
8cf769c6 EK |
3351 | static ssize_t store_debug_level(struct device *d, |
3352 | struct device_attribute *attr, | |
b481de9c ZY |
3353 | const char *buf, size_t count) |
3354 | { | |
8cf769c6 | 3355 | struct iwl_priv *priv = d->driver_data; |
9257746f TW |
3356 | unsigned long val; |
3357 | int ret; | |
b481de9c | 3358 | |
9257746f TW |
3359 | ret = strict_strtoul(buf, 0, &val); |
3360 | if (ret) | |
b481de9c ZY |
3361 | printk(KERN_INFO DRV_NAME |
3362 | ": %s is not in hex or decimal form.\n", buf); | |
3363 | else | |
8cf769c6 | 3364 | priv->debug_level = val; |
b481de9c ZY |
3365 | |
3366 | return strnlen(buf, count); | |
3367 | } | |
3368 | ||
8cf769c6 EK |
3369 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3370 | show_debug_level, store_debug_level); | |
3371 | ||
b481de9c | 3372 | |
0a6857e7 | 3373 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3374 | |
b481de9c | 3375 | |
bc6f59bc TW |
3376 | static ssize_t show_version(struct device *d, |
3377 | struct device_attribute *attr, char *buf) | |
3378 | { | |
3379 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3380 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3381 | ssize_t pos = 0; |
3382 | u16 eeprom_ver; | |
bc6f59bc TW |
3383 | |
3384 | if (palive->is_valid) | |
f236a265 TW |
3385 | pos += sprintf(buf + pos, |
3386 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3387 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3388 | palive->ucode_major, palive->ucode_minor, |
3389 | palive->sw_rev[0], palive->sw_rev[1], | |
3390 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3391 | else |
f236a265 TW |
3392 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3393 | ||
3394 | if (priv->eeprom) { | |
3395 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3396 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3397 | eeprom_ver); | |
3398 | } else { | |
3399 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3400 | } | |
3401 | ||
3402 | return pos; | |
bc6f59bc TW |
3403 | } |
3404 | ||
3405 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3406 | ||
b481de9c ZY |
3407 | static ssize_t show_temperature(struct device *d, |
3408 | struct device_attribute *attr, char *buf) | |
3409 | { | |
c79dd5b5 | 3410 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3411 | |
fee1247a | 3412 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3413 | return -EAGAIN; |
3414 | ||
91dbc5bd | 3415 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3416 | } |
3417 | ||
3418 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3419 | ||
b481de9c ZY |
3420 | static ssize_t show_tx_power(struct device *d, |
3421 | struct device_attribute *attr, char *buf) | |
3422 | { | |
c79dd5b5 | 3423 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3424 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3425 | } |
3426 | ||
3427 | static ssize_t store_tx_power(struct device *d, | |
3428 | struct device_attribute *attr, | |
3429 | const char *buf, size_t count) | |
3430 | { | |
c79dd5b5 | 3431 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3432 | unsigned long val; |
3433 | int ret; | |
b481de9c | 3434 | |
9257746f TW |
3435 | ret = strict_strtoul(buf, 10, &val); |
3436 | if (ret) | |
b481de9c ZY |
3437 | printk(KERN_INFO DRV_NAME |
3438 | ": %s is not in decimal form.\n", buf); | |
3439 | else | |
630fe9b6 | 3440 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3441 | |
3442 | return count; | |
3443 | } | |
3444 | ||
3445 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3446 | ||
3447 | static ssize_t show_flags(struct device *d, | |
3448 | struct device_attribute *attr, char *buf) | |
3449 | { | |
c79dd5b5 | 3450 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3451 | |
3452 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3453 | } | |
3454 | ||
3455 | static ssize_t store_flags(struct device *d, | |
3456 | struct device_attribute *attr, | |
3457 | const char *buf, size_t count) | |
3458 | { | |
c79dd5b5 | 3459 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3460 | unsigned long val; |
3461 | u32 flags; | |
3462 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3463 | if (ret) |
9257746f TW |
3464 | return ret; |
3465 | flags = (u32)val; | |
b481de9c ZY |
3466 | |
3467 | mutex_lock(&priv->mutex); | |
3468 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3469 | /* Cancel any currently running scans... */ | |
2a421b91 | 3470 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3471 | IWL_WARNING("Could not cancel scan.\n"); |
3472 | else { | |
9257746f | 3473 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); |
b481de9c | 3474 | priv->staging_rxon.flags = cpu_to_le32(flags); |
5b9f8cd3 | 3475 | iwl_commit_rxon(priv); |
b481de9c ZY |
3476 | } |
3477 | } | |
3478 | mutex_unlock(&priv->mutex); | |
3479 | ||
3480 | return count; | |
3481 | } | |
3482 | ||
3483 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3484 | ||
3485 | static ssize_t show_filter_flags(struct device *d, | |
3486 | struct device_attribute *attr, char *buf) | |
3487 | { | |
c79dd5b5 | 3488 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3489 | |
3490 | return sprintf(buf, "0x%04X\n", | |
3491 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3492 | } | |
3493 | ||
3494 | static ssize_t store_filter_flags(struct device *d, | |
3495 | struct device_attribute *attr, | |
3496 | const char *buf, size_t count) | |
3497 | { | |
c79dd5b5 | 3498 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3499 | unsigned long val; |
3500 | u32 filter_flags; | |
3501 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3502 | if (ret) |
9257746f TW |
3503 | return ret; |
3504 | filter_flags = (u32)val; | |
b481de9c ZY |
3505 | |
3506 | mutex_lock(&priv->mutex); | |
3507 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3508 | /* Cancel any currently running scans... */ | |
2a421b91 | 3509 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3510 | IWL_WARNING("Could not cancel scan.\n"); |
3511 | else { | |
3512 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3513 | "0x%04X\n", filter_flags); | |
3514 | priv->staging_rxon.filter_flags = | |
3515 | cpu_to_le32(filter_flags); | |
5b9f8cd3 | 3516 | iwl_commit_rxon(priv); |
b481de9c ZY |
3517 | } |
3518 | } | |
3519 | mutex_unlock(&priv->mutex); | |
3520 | ||
3521 | return count; | |
3522 | } | |
3523 | ||
3524 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3525 | store_filter_flags); | |
3526 | ||
b481de9c ZY |
3527 | static ssize_t store_retry_rate(struct device *d, |
3528 | struct device_attribute *attr, | |
3529 | const char *buf, size_t count) | |
3530 | { | |
c79dd5b5 | 3531 | struct iwl_priv *priv = dev_get_drvdata(d); |
9257746f TW |
3532 | long val; |
3533 | int ret = strict_strtol(buf, 10, &val); | |
3534 | if (!ret) | |
3535 | return ret; | |
b481de9c | 3536 | |
9257746f | 3537 | priv->retry_rate = (val > 0) ? val : 1; |
b481de9c ZY |
3538 | |
3539 | return count; | |
3540 | } | |
3541 | ||
3542 | static ssize_t show_retry_rate(struct device *d, | |
3543 | struct device_attribute *attr, char *buf) | |
3544 | { | |
c79dd5b5 | 3545 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3546 | return sprintf(buf, "%d", priv->retry_rate); |
3547 | } | |
3548 | ||
3549 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3550 | store_retry_rate); | |
3551 | ||
3552 | static ssize_t store_power_level(struct device *d, | |
3553 | struct device_attribute *attr, | |
3554 | const char *buf, size_t count) | |
3555 | { | |
c79dd5b5 | 3556 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 | 3557 | int ret; |
9257746f TW |
3558 | unsigned long mode; |
3559 | ||
b481de9c | 3560 | |
b481de9c ZY |
3561 | mutex_lock(&priv->mutex); |
3562 | ||
fee1247a | 3563 | if (!iwl_is_ready(priv)) { |
298df1f6 | 3564 | ret = -EAGAIN; |
b481de9c ZY |
3565 | goto out; |
3566 | } | |
3567 | ||
9257746f | 3568 | ret = strict_strtoul(buf, 10, &mode); |
926f0b2e | 3569 | if (ret) |
9257746f TW |
3570 | goto out; |
3571 | ||
298df1f6 EK |
3572 | ret = iwl_power_set_user_mode(priv, mode); |
3573 | if (ret) { | |
5da4b55f MA |
3574 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3575 | goto out; | |
b481de9c | 3576 | } |
298df1f6 | 3577 | ret = count; |
b481de9c ZY |
3578 | |
3579 | out: | |
3580 | mutex_unlock(&priv->mutex); | |
298df1f6 | 3581 | return ret; |
b481de9c ZY |
3582 | } |
3583 | ||
b481de9c ZY |
3584 | static ssize_t show_power_level(struct device *d, |
3585 | struct device_attribute *attr, char *buf) | |
3586 | { | |
c79dd5b5 | 3587 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 EK |
3588 | int mode = priv->power_data.user_power_setting; |
3589 | int system = priv->power_data.system_power_setting; | |
5da4b55f | 3590 | int level = priv->power_data.power_mode; |
b481de9c ZY |
3591 | char *p = buf; |
3592 | ||
298df1f6 EK |
3593 | switch (system) { |
3594 | case IWL_POWER_SYS_AUTO: | |
3595 | p += sprintf(p, "SYSTEM:auto"); | |
b481de9c | 3596 | break; |
298df1f6 EK |
3597 | case IWL_POWER_SYS_AC: |
3598 | p += sprintf(p, "SYSTEM:ac"); | |
3599 | break; | |
3600 | case IWL_POWER_SYS_BATTERY: | |
3601 | p += sprintf(p, "SYSTEM:battery"); | |
b481de9c | 3602 | break; |
b481de9c | 3603 | } |
298df1f6 | 3604 | |
c3056065 AK |
3605 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ? |
3606 | "fixed" : "auto"); | |
298df1f6 EK |
3607 | p += sprintf(p, "\tINDEX:%d", level); |
3608 | p += sprintf(p, "\n"); | |
3ac7f146 | 3609 | return p - buf + 1; |
b481de9c ZY |
3610 | } |
3611 | ||
3612 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
3613 | store_power_level); | |
3614 | ||
b481de9c ZY |
3615 | |
3616 | static ssize_t show_statistics(struct device *d, | |
3617 | struct device_attribute *attr, char *buf) | |
3618 | { | |
c79dd5b5 | 3619 | struct iwl_priv *priv = dev_get_drvdata(d); |
8f91aecb | 3620 | u32 size = sizeof(struct iwl_notif_statistics); |
b481de9c | 3621 | u32 len = 0, ofs = 0; |
3ac7f146 | 3622 | u8 *data = (u8 *)&priv->statistics; |
b481de9c ZY |
3623 | int rc = 0; |
3624 | ||
fee1247a | 3625 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3626 | return -EAGAIN; |
3627 | ||
3628 | mutex_lock(&priv->mutex); | |
49ea8596 | 3629 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
3630 | mutex_unlock(&priv->mutex); |
3631 | ||
3632 | if (rc) { | |
3633 | len = sprintf(buf, | |
3634 | "Error sending statistics request: 0x%08X\n", rc); | |
3635 | return len; | |
3636 | } | |
3637 | ||
3638 | while (size && (PAGE_SIZE - len)) { | |
3639 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3640 | PAGE_SIZE - len, 1); | |
3641 | len = strlen(buf); | |
3642 | if (PAGE_SIZE - len) | |
3643 | buf[len++] = '\n'; | |
3644 | ||
3645 | ofs += 16; | |
3646 | size -= min(size, 16U); | |
3647 | } | |
3648 | ||
3649 | return len; | |
3650 | } | |
3651 | ||
3652 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
3653 | ||
b481de9c ZY |
3654 | static ssize_t show_status(struct device *d, |
3655 | struct device_attribute *attr, char *buf) | |
3656 | { | |
c79dd5b5 | 3657 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 3658 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3659 | return -EAGAIN; |
3660 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
3661 | } | |
3662 | ||
3663 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
3664 | ||
b481de9c ZY |
3665 | /***************************************************************************** |
3666 | * | |
3667 | * driver setup and teardown | |
3668 | * | |
3669 | *****************************************************************************/ | |
3670 | ||
4e39317d | 3671 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
3672 | { |
3673 | priv->workqueue = create_workqueue(DRV_NAME); | |
3674 | ||
3675 | init_waitqueue_head(&priv->wait_command_queue); | |
3676 | ||
5b9f8cd3 EG |
3677 | INIT_WORK(&priv->up, iwl_bg_up); |
3678 | INIT_WORK(&priv->restart, iwl_bg_restart); | |
3679 | INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish); | |
3680 | INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill); | |
3681 | INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); | |
16e727e8 | 3682 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
4a4a9e81 TW |
3683 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
3684 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 | 3685 | |
2a421b91 | 3686 | iwl_setup_scan_deferred_work(priv); |
c90a74ba | 3687 | iwl_setup_power_deferred_work(priv); |
bb8c093b | 3688 | |
4e39317d EG |
3689 | if (priv->cfg->ops->lib->setup_deferred_work) |
3690 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
3691 | ||
3692 | init_timer(&priv->statistics_periodic); | |
3693 | priv->statistics_periodic.data = (unsigned long)priv; | |
5b9f8cd3 | 3694 | priv->statistics_periodic.function = iwl_bg_statistics_periodic; |
b481de9c ZY |
3695 | |
3696 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
5b9f8cd3 | 3697 | iwl_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
3698 | } |
3699 | ||
4e39317d | 3700 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 3701 | { |
4e39317d EG |
3702 | if (priv->cfg->ops->lib->cancel_deferred_work) |
3703 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 3704 | |
3ae6a054 | 3705 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c | 3706 | cancel_delayed_work(&priv->scan_check); |
c90a74ba | 3707 | cancel_delayed_work_sync(&priv->set_power_save); |
b481de9c | 3708 | cancel_delayed_work(&priv->alive_start); |
b481de9c | 3709 | cancel_work_sync(&priv->beacon_update); |
4e39317d | 3710 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
3711 | } |
3712 | ||
5b9f8cd3 | 3713 | static struct attribute *iwl_sysfs_entries[] = { |
b481de9c ZY |
3714 | &dev_attr_flags.attr, |
3715 | &dev_attr_filter_flags.attr, | |
b481de9c ZY |
3716 | &dev_attr_power_level.attr, |
3717 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
3718 | &dev_attr_statistics.attr, |
3719 | &dev_attr_status.attr, | |
3720 | &dev_attr_temperature.attr, | |
b481de9c | 3721 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
3722 | #ifdef CONFIG_IWLWIFI_DEBUG |
3723 | &dev_attr_debug_level.attr, | |
3724 | #endif | |
bc6f59bc | 3725 | &dev_attr_version.attr, |
b481de9c ZY |
3726 | |
3727 | NULL | |
3728 | }; | |
3729 | ||
5b9f8cd3 | 3730 | static struct attribute_group iwl_attribute_group = { |
b481de9c | 3731 | .name = NULL, /* put in device directory */ |
5b9f8cd3 | 3732 | .attrs = iwl_sysfs_entries, |
b481de9c ZY |
3733 | }; |
3734 | ||
5b9f8cd3 EG |
3735 | static struct ieee80211_ops iwl_hw_ops = { |
3736 | .tx = iwl_mac_tx, | |
3737 | .start = iwl_mac_start, | |
3738 | .stop = iwl_mac_stop, | |
3739 | .add_interface = iwl_mac_add_interface, | |
3740 | .remove_interface = iwl_mac_remove_interface, | |
3741 | .config = iwl_mac_config, | |
3742 | .config_interface = iwl_mac_config_interface, | |
3743 | .configure_filter = iwl_configure_filter, | |
3744 | .set_key = iwl_mac_set_key, | |
3745 | .update_tkip_key = iwl_mac_update_tkip_key, | |
3746 | .get_stats = iwl_mac_get_stats, | |
3747 | .get_tx_stats = iwl_mac_get_tx_stats, | |
3748 | .conf_tx = iwl_mac_conf_tx, | |
3749 | .reset_tsf = iwl_mac_reset_tsf, | |
3750 | .bss_info_changed = iwl_bss_info_changed, | |
3751 | .ampdu_action = iwl_mac_ampdu_action, | |
cb43dc25 | 3752 | .hw_scan = iwl_mac_hw_scan |
b481de9c ZY |
3753 | }; |
3754 | ||
5b9f8cd3 | 3755 | static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
3756 | { |
3757 | int err = 0; | |
c79dd5b5 | 3758 | struct iwl_priv *priv; |
b481de9c | 3759 | struct ieee80211_hw *hw; |
82b9a121 | 3760 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 3761 | unsigned long flags; |
b481de9c | 3762 | |
316c30d9 AK |
3763 | /************************ |
3764 | * 1. Allocating HW data | |
3765 | ************************/ | |
3766 | ||
6440adb5 BC |
3767 | /* Disabling hardware scan means that mac80211 will perform scans |
3768 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 3769 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
3770 | if (cfg->mod_params->debug & IWL_DL_INFO) |
3771 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
3772 | "Disabling hw_scan\n"); | |
5b9f8cd3 | 3773 | iwl_hw_ops.hw_scan = NULL; |
b481de9c ZY |
3774 | } |
3775 | ||
5b9f8cd3 | 3776 | hw = iwl_alloc_all(cfg, &iwl_hw_ops); |
1d0a082d | 3777 | if (!hw) { |
b481de9c ZY |
3778 | err = -ENOMEM; |
3779 | goto out; | |
3780 | } | |
1d0a082d AK |
3781 | priv = hw->priv; |
3782 | /* At this point both hw and priv are allocated. */ | |
3783 | ||
b481de9c ZY |
3784 | SET_IEEE80211_DEV(hw, &pdev->dev); |
3785 | ||
3786 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 3787 | priv->cfg = cfg; |
b481de9c | 3788 | priv->pci_dev = pdev; |
316c30d9 | 3789 | |
0a6857e7 | 3790 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3791 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
3792 | atomic_set(&priv->restrict_refcnt, 0); |
3793 | #endif | |
b481de9c | 3794 | |
316c30d9 AK |
3795 | /************************** |
3796 | * 2. Initializing PCI bus | |
3797 | **************************/ | |
3798 | if (pci_enable_device(pdev)) { | |
3799 | err = -ENODEV; | |
3800 | goto out_ieee80211_free_hw; | |
3801 | } | |
3802 | ||
3803 | pci_set_master(pdev); | |
3804 | ||
093d874c | 3805 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36)); |
316c30d9 | 3806 | if (!err) |
093d874c | 3807 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36)); |
cc2a8ea8 | 3808 | if (err) { |
093d874c | 3809 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 3810 | if (!err) |
093d874c | 3811 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 3812 | /* both attempts failed: */ |
316c30d9 | 3813 | if (err) { |
cc2a8ea8 RR |
3814 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
3815 | DRV_NAME); | |
316c30d9 | 3816 | goto out_pci_disable_device; |
cc2a8ea8 | 3817 | } |
316c30d9 AK |
3818 | } |
3819 | ||
3820 | err = pci_request_regions(pdev, DRV_NAME); | |
3821 | if (err) | |
3822 | goto out_pci_disable_device; | |
3823 | ||
3824 | pci_set_drvdata(pdev, priv); | |
3825 | ||
316c30d9 AK |
3826 | |
3827 | /*********************** | |
3828 | * 3. Read REV register | |
3829 | ***********************/ | |
3830 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
3831 | if (!priv->hw_base) { | |
3832 | err = -ENODEV; | |
3833 | goto out_pci_release_regions; | |
3834 | } | |
3835 | ||
3836 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
3837 | (unsigned long long) pci_resource_len(pdev, 0)); | |
3838 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
3839 | ||
b661c819 | 3840 | iwl_hw_detect(priv); |
316c30d9 | 3841 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
3842 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
3843 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 3844 | |
e7b63581 TW |
3845 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
3846 | * PCI Tx retries from interfering with C3 CPU state */ | |
3847 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | |
3848 | ||
91238714 TW |
3849 | /* amp init */ |
3850 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 3851 | if (err < 0) { |
91238714 | 3852 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
3853 | goto out_iounmap; |
3854 | } | |
91238714 TW |
3855 | /***************** |
3856 | * 4. Read EEPROM | |
3857 | *****************/ | |
316c30d9 AK |
3858 | /* Read the EEPROM */ |
3859 | err = iwl_eeprom_init(priv); | |
3860 | if (err) { | |
3861 | IWL_ERROR("Unable to init EEPROM\n"); | |
3862 | goto out_iounmap; | |
3863 | } | |
8614f360 TW |
3864 | err = iwl_eeprom_check_version(priv); |
3865 | if (err) | |
3866 | goto out_iounmap; | |
3867 | ||
02883017 | 3868 | /* extract MAC Address */ |
316c30d9 | 3869 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
e174961c | 3870 | IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr); |
316c30d9 AK |
3871 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); |
3872 | ||
3873 | /************************ | |
3874 | * 5. Setup HW constants | |
3875 | ************************/ | |
da154e30 | 3876 | if (iwl_set_hw_params(priv)) { |
5425e490 | 3877 | IWL_ERROR("failed to set hw parameters\n"); |
073d3f5f | 3878 | goto out_free_eeprom; |
316c30d9 AK |
3879 | } |
3880 | ||
3881 | /******************* | |
6ba87956 | 3882 | * 6. Setup priv |
316c30d9 | 3883 | *******************/ |
b481de9c | 3884 | |
6ba87956 | 3885 | err = iwl_init_drv(priv); |
bf85ea4f | 3886 | if (err) |
399f4900 | 3887 | goto out_free_eeprom; |
bf85ea4f | 3888 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
3889 | |
3890 | /********************************** | |
3891 | * 7. Initialize module parameters | |
3892 | **********************************/ | |
3893 | ||
3894 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 3895 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
3896 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
3897 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
3898 | } | |
3899 | ||
316c30d9 AK |
3900 | /******************** |
3901 | * 8. Setup services | |
3902 | ********************/ | |
0359facc | 3903 | spin_lock_irqsave(&priv->lock, flags); |
5b9f8cd3 | 3904 | iwl_disable_interrupts(priv); |
0359facc | 3905 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 | 3906 | |
5b9f8cd3 | 3907 | err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group); |
316c30d9 AK |
3908 | if (err) { |
3909 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 3910 | goto out_uninit_drv; |
316c30d9 AK |
3911 | } |
3912 | ||
316c30d9 | 3913 | |
4e39317d | 3914 | iwl_setup_deferred_work(priv); |
653fa4a0 | 3915 | iwl_setup_rx_handlers(priv); |
316c30d9 AK |
3916 | |
3917 | /******************** | |
3918 | * 9. Conclude | |
3919 | ********************/ | |
5a66926a ZY |
3920 | pci_save_state(pdev); |
3921 | pci_disable_device(pdev); | |
b481de9c | 3922 | |
6ba87956 TW |
3923 | /********************************** |
3924 | * 10. Setup and register mac80211 | |
3925 | **********************************/ | |
3926 | ||
3927 | err = iwl_setup_mac(priv); | |
3928 | if (err) | |
3929 | goto out_remove_sysfs; | |
3930 | ||
3931 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
3932 | if (err) | |
3933 | IWL_ERROR("failed to create debugfs files\n"); | |
3934 | ||
58d0f361 EG |
3935 | err = iwl_rfkill_init(priv); |
3936 | if (err) | |
3937 | IWL_ERROR("Unable to initialize RFKILL system. " | |
3938 | "Ignoring error: %d\n", err); | |
3939 | iwl_power_initialize(priv); | |
b481de9c ZY |
3940 | return 0; |
3941 | ||
316c30d9 | 3942 | out_remove_sysfs: |
5b9f8cd3 | 3943 | sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); |
6ba87956 TW |
3944 | out_uninit_drv: |
3945 | iwl_uninit_drv(priv); | |
073d3f5f TW |
3946 | out_free_eeprom: |
3947 | iwl_eeprom_free(priv); | |
b481de9c ZY |
3948 | out_iounmap: |
3949 | pci_iounmap(pdev, priv->hw_base); | |
3950 | out_pci_release_regions: | |
3951 | pci_release_regions(pdev); | |
316c30d9 | 3952 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
3953 | out_pci_disable_device: |
3954 | pci_disable_device(pdev); | |
b481de9c ZY |
3955 | out_ieee80211_free_hw: |
3956 | ieee80211_free_hw(priv->hw); | |
3957 | out: | |
3958 | return err; | |
3959 | } | |
3960 | ||
5b9f8cd3 | 3961 | static void __devexit iwl_pci_remove(struct pci_dev *pdev) |
b481de9c | 3962 | { |
c79dd5b5 | 3963 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 3964 | unsigned long flags; |
b481de9c ZY |
3965 | |
3966 | if (!priv) | |
3967 | return; | |
3968 | ||
3969 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
3970 | ||
67249625 | 3971 | iwl_dbgfs_unregister(priv); |
5b9f8cd3 | 3972 | sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); |
67249625 | 3973 | |
5b9f8cd3 EG |
3974 | /* ieee80211_unregister_hw call wil cause iwl_mac_stop to |
3975 | * to be called and iwl_down since we are removing the device | |
0b124c31 GG |
3976 | * we need to set STATUS_EXIT_PENDING bit. |
3977 | */ | |
3978 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
c4f55232 RR |
3979 | if (priv->mac80211_registered) { |
3980 | ieee80211_unregister_hw(priv->hw); | |
3981 | priv->mac80211_registered = 0; | |
0b124c31 | 3982 | } else { |
5b9f8cd3 | 3983 | iwl_down(priv); |
c4f55232 RR |
3984 | } |
3985 | ||
0359facc MA |
3986 | /* make sure we flush any pending irq or |
3987 | * tasklet for the driver | |
3988 | */ | |
3989 | spin_lock_irqsave(&priv->lock, flags); | |
5b9f8cd3 | 3990 | iwl_disable_interrupts(priv); |
0359facc MA |
3991 | spin_unlock_irqrestore(&priv->lock, flags); |
3992 | ||
3993 | iwl_synchronize_irq(priv); | |
3994 | ||
58d0f361 | 3995 | iwl_rfkill_unregister(priv); |
5b9f8cd3 | 3996 | iwl_dealloc_ucode_pci(priv); |
b481de9c ZY |
3997 | |
3998 | if (priv->rxq.bd) | |
a55360e4 | 3999 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4000 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4001 | |
37deb2a0 | 4002 | iwl_clear_stations_table(priv); |
073d3f5f | 4003 | iwl_eeprom_free(priv); |
b481de9c | 4004 | |
b481de9c | 4005 | |
948c171c MA |
4006 | /*netif_stop_queue(dev); */ |
4007 | flush_workqueue(priv->workqueue); | |
4008 | ||
5b9f8cd3 | 4009 | /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes |
b481de9c ZY |
4010 | * priv->workqueue... so we can't take down the workqueue |
4011 | * until now... */ | |
4012 | destroy_workqueue(priv->workqueue); | |
4013 | priv->workqueue = NULL; | |
4014 | ||
b481de9c ZY |
4015 | pci_iounmap(pdev, priv->hw_base); |
4016 | pci_release_regions(pdev); | |
4017 | pci_disable_device(pdev); | |
4018 | pci_set_drvdata(pdev, NULL); | |
4019 | ||
6ba87956 | 4020 | iwl_uninit_drv(priv); |
b481de9c ZY |
4021 | |
4022 | if (priv->ibss_beacon) | |
4023 | dev_kfree_skb(priv->ibss_beacon); | |
4024 | ||
4025 | ieee80211_free_hw(priv->hw); | |
4026 | } | |
4027 | ||
4028 | #ifdef CONFIG_PM | |
4029 | ||
5b9f8cd3 | 4030 | static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4031 | { |
c79dd5b5 | 4032 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4033 | |
e655b9f0 ZY |
4034 | if (priv->is_open) { |
4035 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
5b9f8cd3 | 4036 | iwl_mac_stop(priv->hw); |
e655b9f0 ZY |
4037 | priv->is_open = 1; |
4038 | } | |
b481de9c | 4039 | |
b481de9c ZY |
4040 | pci_set_power_state(pdev, PCI_D3hot); |
4041 | ||
b481de9c ZY |
4042 | return 0; |
4043 | } | |
4044 | ||
5b9f8cd3 | 4045 | static int iwl_pci_resume(struct pci_dev *pdev) |
b481de9c | 4046 | { |
c79dd5b5 | 4047 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4048 | |
b481de9c | 4049 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4050 | |
e655b9f0 | 4051 | if (priv->is_open) |
5b9f8cd3 | 4052 | iwl_mac_start(priv->hw); |
b481de9c | 4053 | |
e655b9f0 | 4054 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4055 | return 0; |
4056 | } | |
4057 | ||
4058 | #endif /* CONFIG_PM */ | |
4059 | ||
4060 | /***************************************************************************** | |
4061 | * | |
4062 | * driver and module entry point | |
4063 | * | |
4064 | *****************************************************************************/ | |
4065 | ||
fed9017e RR |
4066 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4067 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4fc22b21 | 4068 | #ifdef CONFIG_IWL4965 |
fed9017e RR |
4069 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4070 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4fc22b21 | 4071 | #endif /* CONFIG_IWL4965 */ |
5a6a256e | 4072 | #ifdef CONFIG_IWL5000 |
47408639 EK |
4073 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4074 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | |
4075 | {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, | |
4076 | {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, | |
4077 | {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, | |
4078 | {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, | |
5a6a256e | 4079 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, |
47408639 EK |
4080 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, |
4081 | {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4082 | {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
e96a8495 TW |
4083 | /* 5350 WiFi/WiMax */ |
4084 | {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, | |
4085 | {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, | |
4086 | {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, | |
7100e924 TW |
4087 | /* 5150 Wifi/WiMax */ |
4088 | {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)}, | |
4089 | {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)}, | |
5a6a256e | 4090 | #endif /* CONFIG_IWL5000 */ |
7100e924 | 4091 | |
fed9017e RR |
4092 | {0} |
4093 | }; | |
4094 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4095 | ||
4096 | static struct pci_driver iwl_driver = { | |
b481de9c | 4097 | .name = DRV_NAME, |
fed9017e | 4098 | .id_table = iwl_hw_card_ids, |
5b9f8cd3 EG |
4099 | .probe = iwl_pci_probe, |
4100 | .remove = __devexit_p(iwl_pci_remove), | |
b481de9c | 4101 | #ifdef CONFIG_PM |
5b9f8cd3 EG |
4102 | .suspend = iwl_pci_suspend, |
4103 | .resume = iwl_pci_resume, | |
b481de9c ZY |
4104 | #endif |
4105 | }; | |
4106 | ||
5b9f8cd3 | 4107 | static int __init iwl_init(void) |
b481de9c ZY |
4108 | { |
4109 | ||
4110 | int ret; | |
4111 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4112 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 | 4113 | |
e227ceac | 4114 | ret = iwlagn_rate_control_register(); |
897e1cf2 RC |
4115 | if (ret) { |
4116 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4117 | return ret; | |
4118 | } | |
4119 | ||
fed9017e | 4120 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4121 | if (ret) { |
4122 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4123 | goto error_register; |
b481de9c | 4124 | } |
b481de9c ZY |
4125 | |
4126 | return ret; | |
897e1cf2 | 4127 | |
897e1cf2 | 4128 | error_register: |
e227ceac | 4129 | iwlagn_rate_control_unregister(); |
897e1cf2 | 4130 | return ret; |
b481de9c ZY |
4131 | } |
4132 | ||
5b9f8cd3 | 4133 | static void __exit iwl_exit(void) |
b481de9c | 4134 | { |
fed9017e | 4135 | pci_unregister_driver(&iwl_driver); |
e227ceac | 4136 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
4137 | } |
4138 | ||
5b9f8cd3 EG |
4139 | module_exit(iwl_exit); |
4140 | module_init(iwl_init); |