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Merge branch 'for_rmk' of git://git.mnementh.co.uk/linux-2.6-im into devel
[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
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43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
b481de9c
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56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
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62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
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70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
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76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
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83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
86MODULE_AUTHOR(DRV_COPYRIGHT);
87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
deb09c43
EG
99static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
bb8c093b 111 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
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112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
c1adf9fb 117static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
b481de9c
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118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
bb8c093b 177 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
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178 return -1;
179 }
180 return 0;
181}
182
183/**
54559703 184 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC
187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
54559703 191static int iwl_full_rxon_required(struct iwl_priv *priv)
b481de9c
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192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
b481de9c
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196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
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210 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
211 return 1;
212
213 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
214 * be updated with the RXON_ASSOC command -- however only some
215 * flag transitions are allowed using RXON_ASSOC */
216
217 /* Check if we are not switching bands */
218 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
219 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
220 return 1;
221
222 /* Check if we are switching association toggle */
223 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
224 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
225 return 1;
226
227 return 0;
228}
229
b481de9c 230/**
bb8c093b 231 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 232 *
01ebd063 233 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
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234 * the active_rxon structure is updated with the new data. This
235 * function correctly transitions out of the RXON_ASSOC_MSK state if
236 * a HW tune is required based on the RXON structure changes.
237 */
c79dd5b5 238static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
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239{
240 /* cast away the const for active_rxon in this function */
c1adf9fb 241 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 242 DECLARE_MAC_BUF(mac);
43d59b32
EG
243 int ret;
244 bool new_assoc =
245 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 246
fee1247a 247 if (!iwl_is_alive(priv))
43d59b32 248 return -EBUSY;
b481de9c
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249
250 /* always get timestamp with Rx frame */
251 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
252 /* allow CTS-to-self if possible. this is relevant only for
253 * 5000, but will not damage 4965 */
254 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 255
43d59b32
EG
256 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
257 if (ret) {
b481de9c
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258 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
259 return -EINVAL;
260 }
261
262 /* If we don't need to send a full RXON, we can use
bb8c093b 263 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 264 * and other flags for the current radio configuration. */
54559703 265 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG
266 ret = iwl_send_rxon_assoc(priv);
267 if (ret) {
268 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
269 return ret;
b481de9c
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270 }
271
272 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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273 return 0;
274 }
275
276 /* station table will be cleared */
277 priv->assoc_station_added = 0;
278
b481de9c
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279 /* If we are currently associated and the new config requires
280 * an RXON_ASSOC and the new config wants the associated mask enabled,
281 * we must clear the associated from the active configuration
282 * before we apply the new config */
43d59b32 283 if (iwl_is_associated(priv) && new_assoc) {
b481de9c
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284 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
285 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
286
43d59b32 287 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 288 sizeof(struct iwl_rxon_cmd),
b481de9c
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289 &priv->active_rxon);
290
291 /* If the mask clearing failed then we set
292 * active_rxon back to what it was previously */
43d59b32 293 if (ret) {
b481de9c 294 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
295 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
296 return ret;
b481de9c 297 }
b481de9c
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298 }
299
300 IWL_DEBUG_INFO("Sending RXON\n"
301 "* with%s RXON_FILTER_ASSOC_MSK\n"
302 "* channel = %d\n"
0795af57 303 "* bssid = %s\n",
43d59b32 304 (new_assoc ? "" : "out"),
b481de9c 305 le16_to_cpu(priv->staging_rxon.channel),
0795af57 306 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 307
099b40b7 308 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
309
310 /* Apply the new configuration
311 * RXON unassoc clears the station table in uCode, send it before
312 * we add the bcast station. If assoc bit is set, we will send RXON
313 * after having added the bcast and bssid station.
314 */
315 if (!new_assoc) {
316 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 317 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
318 if (ret) {
319 IWL_ERROR("Error setting new RXON (%d)\n", ret);
320 return ret;
321 }
322 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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323 }
324
37deb2a0 325 iwl_clear_stations_table(priv);
556f8db7 326
b481de9c
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327 if (!priv->error_recovering)
328 priv->start_calib = 0;
329
b481de9c 330 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 331 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 332 IWL_INVALID_STATION) {
b481de9c
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333 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
334 return -EIO;
335 }
336
337 /* If we have set the ASSOC_MSK and we are in BSS mode then
338 * add the IWL_AP_ID to the station rate table */
9185159d 339 if (new_assoc) {
05c914fe 340 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW
341 ret = iwl_rxon_add_station(priv,
342 priv->active_rxon.bssid_addr, 1);
343 if (ret == IWL_INVALID_STATION) {
344 IWL_ERROR("Error adding AP address for TX.\n");
345 return -EIO;
346 }
347 priv->assoc_station_added = 1;
348 if (priv->default_wep_key &&
349 iwl_send_static_wepkey_cmd(priv, 0))
350 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 351 }
43d59b32
EG
352
353 /* Apply the new configuration
354 * RXON assoc doesn't clear the station table in uCode,
355 */
356 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
357 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
358 if (ret) {
359 IWL_ERROR("Error setting new RXON (%d)\n", ret);
360 return ret;
361 }
362 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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363 }
364
36da7d70
ZY
365 iwl_init_sensitivity(priv);
366
367 /* If we issue a new RXON command which required a tune then we must
368 * send a new TXPOWER command or we won't be able to Tx any frames */
369 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
370 if (ret) {
371 IWL_ERROR("Error sending TX power (%d)\n", ret);
372 return ret;
373 }
374
b481de9c
ZY
375 return 0;
376}
377
5da4b55f
MA
378void iwl4965_update_chain_flags(struct iwl_priv *priv)
379{
380
c7de35cd 381 iwl_set_rxon_chain(priv);
5da4b55f
MA
382 iwl4965_commit_rxon(priv);
383}
384
c79dd5b5 385static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 386{
bb8c093b 387 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
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388 .flags = 3,
389 .lead_time = 0xAA,
390 .max_kill = 1,
391 .kill_ack_mask = 0,
392 .kill_cts_mask = 0,
393 };
394
857485c0 395 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 396 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
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397}
398
fcab423d 399static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
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400{
401 struct list_head *element;
402
403 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
404 priv->frames_count);
405
406 while (!list_empty(&priv->free_frames)) {
407 element = priv->free_frames.next;
408 list_del(element);
fcab423d 409 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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410 priv->frames_count--;
411 }
412
413 if (priv->frames_count) {
414 IWL_WARNING("%d frames still in use. Did we lose one?\n",
415 priv->frames_count);
416 priv->frames_count = 0;
417 }
418}
419
fcab423d 420static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 421{
fcab423d 422 struct iwl_frame *frame;
b481de9c
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423 struct list_head *element;
424 if (list_empty(&priv->free_frames)) {
425 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
426 if (!frame) {
427 IWL_ERROR("Could not allocate frame!\n");
428 return NULL;
429 }
430
431 priv->frames_count++;
432 return frame;
433 }
434
435 element = priv->free_frames.next;
436 list_del(element);
fcab423d 437 return list_entry(element, struct iwl_frame, list);
b481de9c
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438}
439
fcab423d 440static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
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441{
442 memset(frame, 0, sizeof(*frame));
443 list_add(&frame->list, &priv->free_frames);
444}
445
4bf64efd
TW
446static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
447 struct ieee80211_hdr *hdr,
448 const u8 *dest, int left)
b481de9c 449{
3109ece1 450 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
451 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
452 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
453 return 0;
454
455 if (priv->ibss_beacon->len > left)
456 return 0;
457
458 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
459
460 return priv->ibss_beacon->len;
461}
462
39e88504 463static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 464{
39e88504
GC
465 int i;
466 int rate_mask;
467
468 /* Set rate mask*/
469 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
470 rate_mask = priv->active_rate_basic & 0xF;
471 else
472 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 473
39e88504 474 /* Find lowest valid rate */
b481de9c 475 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 476 i = iwl_rates[i].next_ieee) {
b481de9c 477 if (rate_mask & (1 << i))
1826dcc0 478 return iwl_rates[i].plcp;
b481de9c
ZY
479 }
480
39e88504
GC
481 /* No valid rate was found. Assign the lowest one */
482 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
483 return IWL_RATE_1M_PLCP;
484 else
485 return IWL_RATE_6M_PLCP;
b481de9c
ZY
486}
487
a33c2f47 488static unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW
489 struct iwl_frame *frame, u8 rate)
490{
491 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
492 unsigned int frame_size;
493
494 tx_beacon_cmd = &frame->u.beacon;
495 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
496
497 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
498 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
499
500 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
501 iwl_bcast_addr,
502 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
503
504 BUG_ON(frame_size > MAX_MPDU_SIZE);
505 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
506
507 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
508 tx_beacon_cmd->tx.rate_n_flags =
509 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
510 else
511 tx_beacon_cmd->tx.rate_n_flags =
512 iwl_hw_set_rate_n_flags(rate, 0);
513
514 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
515 TX_CMD_FLG_TSF_MSK |
516 TX_CMD_FLG_STA_RATE_MSK;
517
518 return sizeof(*tx_beacon_cmd) + frame_size;
519}
c79dd5b5 520static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 521{
fcab423d 522 struct iwl_frame *frame;
b481de9c
ZY
523 unsigned int frame_size;
524 int rc;
525 u8 rate;
526
fcab423d 527 frame = iwl_get_free_frame(priv);
b481de9c
ZY
528
529 if (!frame) {
530 IWL_ERROR("Could not obtain free frame buffer for beacon "
531 "command.\n");
532 return -ENOMEM;
533 }
534
39e88504 535 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 536
bb8c093b 537 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 538
857485c0 539 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
540 &frame->u.cmd[0]);
541
fcab423d 542 iwl_free_frame(priv, frame);
b481de9c
ZY
543
544 return rc;
545}
546
b481de9c
ZY
547/******************************************************************************
548 *
549 * Misc. internal state and helper functions
550 *
551 ******************************************************************************/
b481de9c 552
d1141dfb
EG
553static void iwl4965_ht_conf(struct iwl_priv *priv,
554 struct ieee80211_bss_conf *bss_conf)
555{
556 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
557 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
558 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
559
560 IWL_DEBUG_MAC80211("enter: \n");
561
562 iwl_conf->is_ht = bss_conf->assoc_ht;
563
564 if (!iwl_conf->is_ht)
565 return;
566
d1141dfb 567 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 568 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 569 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 570 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
571
572 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
573 iwl_conf->max_amsdu_size =
574 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
575
576 iwl_conf->supported_chan_width =
577 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
578 iwl_conf->extension_chan_offset =
579 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
580 /* If no above or below channel supplied disable FAT channel */
963f5517
EG
581 if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE &&
582 iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) {
583 iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE;
d1141dfb 584 iwl_conf->supported_chan_width = 0;
963f5517 585 }
d1141dfb 586
12837be1
RR
587 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
588
d1141dfb
EG
589 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
590
591 iwl_conf->control_channel = ht_bss_conf->primary_channel;
592 iwl_conf->tx_chan_width =
593 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
594 iwl_conf->ht_protection =
595 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
596 iwl_conf->non_GF_STA_present =
597 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
598
599 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
600 IWL_DEBUG_MAC80211("leave\n");
601}
602
b481de9c
ZY
603/*
604 * QoS support
605*/
1ff50bda 606static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 607{
b481de9c
ZY
608 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
609 return;
610
611 if (!priv->qos_data.qos_enable)
612 return;
613
b481de9c
ZY
614 priv->qos_data.def_qos_parm.qos_flags = 0;
615
616 if (priv->qos_data.qos_cap.q_AP.queue_request &&
617 !priv->qos_data.qos_cap.q_AP.txop_request)
618 priv->qos_data.def_qos_parm.qos_flags |=
619 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
620 if (priv->qos_data.qos_active)
621 priv->qos_data.def_qos_parm.qos_flags |=
622 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
623
fd105e79 624 if (priv->current_ht_config.is_ht)
f1f1f5c7 625 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 626
3109ece1 627 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
628 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
629 priv->qos_data.qos_active,
630 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 631
1ff50bda
EG
632 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
633 sizeof(struct iwl_qosparam_cmd),
634 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
635 }
636}
637
b481de9c 638#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 639
bb8c093b 640static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
641{
642 u16 new_val = 0;
643 u16 beacon_factor = 0;
644
645 beacon_factor =
646 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
647 / MAX_UCODE_BEACON_INTERVAL;
648 new_val = beacon_val / beacon_factor;
649
650 return cpu_to_le16(new_val);
651}
652
c79dd5b5 653static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
654{
655 u64 interval_tm_unit;
656 u64 tsf, result;
657 unsigned long flags;
658 struct ieee80211_conf *conf = NULL;
659 u16 beacon_int = 0;
660
661 conf = ieee80211_get_hw_conf(priv->hw);
662
663 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
664 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
665 priv->rxon_timing.timestamp.dw[0] =
666 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c 667
b5d7be5e 668 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 669
3109ece1 670 tsf = priv->timestamp;
b481de9c
ZY
671
672 beacon_int = priv->beacon_int;
673 spin_unlock_irqrestore(&priv->lock, flags);
674
05c914fe 675 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
ZY
676 if (beacon_int == 0) {
677 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
678 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
679 } else {
680 priv->rxon_timing.beacon_interval =
681 cpu_to_le16(beacon_int);
682 priv->rxon_timing.beacon_interval =
bb8c093b 683 iwl4965_adjust_beacon_interval(
b481de9c
ZY
684 le16_to_cpu(priv->rxon_timing.beacon_interval));
685 }
686
687 priv->rxon_timing.atim_window = 0;
688 } else {
689 priv->rxon_timing.beacon_interval =
bb8c093b 690 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
691 /* TODO: we need to get atim_window from upper stack
692 * for now we set to 0 */
693 priv->rxon_timing.atim_window = 0;
694 }
695
696 interval_tm_unit =
697 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
698 result = do_div(tsf, interval_tm_unit);
699 priv->rxon_timing.beacon_init_val =
700 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
701
702 IWL_DEBUG_ASSOC
703 ("beacon interval %d beacon timer %d beacon tim %d\n",
704 le16_to_cpu(priv->rxon_timing.beacon_interval),
705 le32_to_cpu(priv->rxon_timing.beacon_init_val),
706 le16_to_cpu(priv->rxon_timing.atim_window));
707}
708
82a66bbb
TW
709static void iwl_set_flags_for_band(struct iwl_priv *priv,
710 enum ieee80211_band band)
b481de9c 711{
8318d78a 712 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
713 priv->staging_rxon.flags &=
714 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
715 | RXON_FLG_CCK_MSK);
716 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
717 } else {
508e32e1 718 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
719 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
720 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
721 else
722 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
723
05c914fe 724 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
725 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
726
727 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
728 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
729 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
730 }
731}
732
733/*
01ebd063 734 * initialize rxon structure with default values from eeprom
b481de9c 735 */
c79dd5b5 736static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 737{
bf85ea4f 738 const struct iwl_channel_info *ch_info;
b481de9c
ZY
739
740 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
741
742 switch (priv->iw_mode) {
05c914fe 743 case NL80211_IFTYPE_AP:
b481de9c
ZY
744 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
745 break;
746
05c914fe 747 case NL80211_IFTYPE_STATION:
b481de9c
ZY
748 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
749 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
750 break;
751
05c914fe 752 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY
753 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
754 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
755 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
756 RXON_FILTER_ACCEPT_GRP_MSK;
757 break;
758
05c914fe 759 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY
760 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
761 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
762 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
763 break;
69dc5d9d
TW
764 default:
765 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
766 break;
b481de9c
ZY
767 }
768
769#if 0
770 /* TODO: Figure out when short_preamble would be set and cache from
771 * that */
772 if (!hw_to_local(priv->hw)->short_preamble)
773 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
774 else
775 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
776#endif
777
8622e705 778 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 779 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
780
781 if (!ch_info)
782 ch_info = &priv->channel_info[0];
783
784 /*
785 * in some case A channels are all non IBSS
786 * in this case force B/G channel
787 */
05c914fe 788 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY
789 !(is_channel_ibss(ch_info)))
790 ch_info = &priv->channel_info[0];
791
792 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 793 priv->band = ch_info->band;
b481de9c 794
82a66bbb 795 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
796
797 priv->staging_rxon.ofdm_basic_rates =
798 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
799 priv->staging_rxon.cck_basic_rates =
800 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
801
802 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
803 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
804 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
805 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
806 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
807 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 808 iwl_set_rxon_chain(priv);
b481de9c
ZY
809}
810
c79dd5b5 811static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 812{
b481de9c
ZY
813 priv->iw_mode = mode;
814
bb8c093b 815 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
816 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
817
37deb2a0 818 iwl_clear_stations_table(priv);
b481de9c 819
fde3571f 820 /* dont commit rxon if rf-kill is on*/
fee1247a 821 if (!iwl_is_ready_rf(priv))
fde3571f
MA
822 return -EAGAIN;
823
824 cancel_delayed_work(&priv->scan_check);
2a421b91 825 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
826 IWL_WARNING("Aborted scan still in progress after 100ms\n");
827 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
828 return -EAGAIN;
829 }
830
bb8c093b 831 iwl4965_commit_rxon(priv);
b481de9c
ZY
832
833 return 0;
834}
835
c79dd5b5 836static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 837{
8318d78a 838 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
839 struct ieee80211_rate *rate;
840 int i;
841
d1141dfb 842 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
843 if (!hw) {
844 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
845 return;
846 }
b481de9c
ZY
847
848 priv->active_rate = 0;
849 priv->active_rate_basic = 0;
850
8318d78a
JB
851 for (i = 0; i < hw->n_bitrates; i++) {
852 rate = &(hw->bitrates[i]);
853 if (rate->hw_value < IWL_RATE_COUNT)
854 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
855 }
856
857 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
858 priv->active_rate, priv->active_rate_basic);
859
860 /*
861 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
862 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
863 * OFDM
864 */
865 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
866 priv->staging_rxon.cck_basic_rates =
867 ((priv->active_rate_basic &
868 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
869 else
870 priv->staging_rxon.cck_basic_rates =
871 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
872
873 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
874 priv->staging_rxon.ofdm_basic_rates =
875 ((priv->active_rate_basic &
876 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
877 IWL_FIRST_OFDM_RATE) & 0xFF;
878 else
879 priv->staging_rxon.ofdm_basic_rates =
880 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
881}
882
4fc22b21 883#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
884
885#include "iwl-spectrum.h"
886
887#define BEACON_TIME_MASK_LOW 0x00FFFFFF
888#define BEACON_TIME_MASK_HIGH 0xFF000000
889#define TIME_UNIT 1024
890
891/*
892 * extended beacon time format
893 * time in usec will be changed into a 32-bit value in 8:24 format
894 * the high 1 byte is the beacon counts
895 * the lower 3 bytes is the time in usec within one beacon interval
896 */
897
bb8c093b 898static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
899{
900 u32 quot;
901 u32 rem;
902 u32 interval = beacon_interval * 1024;
903
904 if (!interval || !usec)
905 return 0;
906
907 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
908 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
909
910 return (quot << 24) + rem;
911}
912
913/* base is usually what we get from ucode with each received frame,
914 * the same as HW timer counter counting down
915 */
916
bb8c093b 917static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
918{
919 u32 base_low = base & BEACON_TIME_MASK_LOW;
920 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
921 u32 interval = beacon_interval * TIME_UNIT;
922 u32 res = (base & BEACON_TIME_MASK_HIGH) +
923 (addon & BEACON_TIME_MASK_HIGH);
924
925 if (base_low > addon_low)
926 res += base_low - addon_low;
927 else if (base_low < addon_low) {
928 res += interval + base_low - addon_low;
929 res += (1 << 24);
930 } else
931 res += (1 << 24);
932
933 return cpu_to_le32(res);
934}
935
c79dd5b5 936static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
937 struct ieee80211_measurement_params *params,
938 u8 type)
939{
bb8c093b 940 struct iwl4965_spectrum_cmd spectrum;
db11d634 941 struct iwl_rx_packet *res;
857485c0 942 struct iwl_host_cmd cmd = {
b481de9c
ZY
943 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
944 .data = (void *)&spectrum,
945 .meta.flags = CMD_WANT_SKB,
946 };
947 u32 add_time = le64_to_cpu(params->start_time);
948 int rc;
949 int spectrum_resp_status;
950 int duration = le16_to_cpu(params->duration);
951
3109ece1 952 if (iwl_is_associated(priv))
b481de9c 953 add_time =
bb8c093b 954 iwl4965_usecs_to_beacons(
b481de9c
ZY
955 le64_to_cpu(params->start_time) - priv->last_tsf,
956 le16_to_cpu(priv->rxon_timing.beacon_interval));
957
958 memset(&spectrum, 0, sizeof(spectrum));
959
960 spectrum.channel_count = cpu_to_le16(1);
961 spectrum.flags =
962 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
963 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
964 cmd.len = sizeof(spectrum);
965 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
966
3109ece1 967 if (iwl_is_associated(priv))
b481de9c 968 spectrum.start_time =
bb8c093b 969 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
970 add_time,
971 le16_to_cpu(priv->rxon_timing.beacon_interval));
972 else
973 spectrum.start_time = 0;
974
975 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
976 spectrum.channels[0].channel = params->channel;
977 spectrum.channels[0].type = type;
978 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
979 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
980 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
981
857485c0 982 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
983 if (rc)
984 return rc;
985
db11d634 986 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
987 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
988 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
989 rc = -EIO;
990 }
991
992 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
993 switch (spectrum_resp_status) {
994 case 0: /* Command will be handled */
995 if (res->u.spectrum.id != 0xff) {
996 IWL_DEBUG_INFO
997 ("Replaced existing measurement: %d\n",
998 res->u.spectrum.id);
999 priv->measurement_status &= ~MEASUREMENT_READY;
1000 }
1001 priv->measurement_status |= MEASUREMENT_ACTIVE;
1002 rc = 0;
1003 break;
1004
1005 case 1: /* Command will not be handled */
1006 rc = -EAGAIN;
1007 break;
1008 }
1009
1010 dev_kfree_skb_any(cmd.meta.u.skb);
1011
1012 return rc;
1013}
1014#endif
1015
b481de9c
ZY
1016/******************************************************************************
1017 *
1018 * Generic RX handler implementations
1019 *
1020 ******************************************************************************/
885ba202
TW
1021static void iwl_rx_reply_alive(struct iwl_priv *priv,
1022 struct iwl_rx_mem_buffer *rxb)
b481de9c 1023{
db11d634 1024 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1025 struct iwl_alive_resp *palive;
b481de9c
ZY
1026 struct delayed_work *pwork;
1027
1028 palive = &pkt->u.alive_frame;
1029
1030 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1031 "0x%01X 0x%01X\n",
1032 palive->is_valid, palive->ver_type,
1033 palive->ver_subtype);
1034
1035 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1036 IWL_DEBUG_INFO("Initialization Alive received.\n");
1037 memcpy(&priv->card_alive_init,
1038 &pkt->u.alive_frame,
885ba202 1039 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1040 pwork = &priv->init_alive_start;
1041 } else {
1042 IWL_DEBUG_INFO("Runtime Alive received.\n");
1043 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1044 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1045 pwork = &priv->alive_start;
1046 }
1047
1048 /* We delay the ALIVE response by 5ms to
1049 * give the HW RF Kill time to activate... */
1050 if (palive->is_valid == UCODE_VALID_OK)
1051 queue_delayed_work(priv->workqueue, pwork,
1052 msecs_to_jiffies(5));
1053 else
1054 IWL_WARNING("uCode did not respond OK.\n");
1055}
1056
c79dd5b5 1057static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1058 struct iwl_rx_mem_buffer *rxb)
b481de9c 1059{
db11d634 1060 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1061
1062 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1063 "seq 0x%04X ser 0x%08X\n",
1064 le32_to_cpu(pkt->u.err_resp.error_type),
1065 get_cmd_string(pkt->u.err_resp.cmd_id),
1066 pkt->u.err_resp.cmd_id,
1067 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1068 le32_to_cpu(pkt->u.err_resp.error_info));
1069}
1070
1071#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1072
a55360e4 1073static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1074{
db11d634 1075 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1076 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1077 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1078 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1079 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1080 rxon->channel = csa->channel;
1081 priv->staging_rxon.channel = csa->channel;
1082}
1083
c79dd5b5 1084static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1085 struct iwl_rx_mem_buffer *rxb)
b481de9c 1086{
4fc22b21 1087#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
db11d634 1088 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1089 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1090
1091 if (!report->state) {
f3d67999
EK
1092 IWL_DEBUG(IWL_DL_11H,
1093 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1094 return;
1095 }
1096
1097 memcpy(&priv->measure_report, report, sizeof(*report));
1098 priv->measurement_status |= MEASUREMENT_READY;
1099#endif
1100}
1101
c79dd5b5 1102static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1103 struct iwl_rx_mem_buffer *rxb)
b481de9c 1104{
0a6857e7 1105#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1106 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1107 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1108 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1109 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1110#endif
1111}
1112
c79dd5b5 1113static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1114 struct iwl_rx_mem_buffer *rxb)
b481de9c 1115{
db11d634 1116 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1117 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1118 "notification for %s:\n",
1119 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1120 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1121}
1122
bb8c093b 1123static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1124{
c79dd5b5
TW
1125 struct iwl_priv *priv =
1126 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1127 struct sk_buff *beacon;
1128
1129 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1130 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1131
1132 if (!beacon) {
1133 IWL_ERROR("update beacon failed\n");
1134 return;
1135 }
1136
1137 mutex_lock(&priv->mutex);
1138 /* new beacon skb is allocated every time; dispose previous.*/
1139 if (priv->ibss_beacon)
1140 dev_kfree_skb(priv->ibss_beacon);
1141
1142 priv->ibss_beacon = beacon;
1143 mutex_unlock(&priv->mutex);
1144
bb8c093b 1145 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1146}
1147
4e39317d
EG
1148/**
1149 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1150 *
1151 * This callback is provided in order to send a statistics request.
1152 *
1153 * This timer function is continually reset to execute within
1154 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1155 * was received. We need to ensure we receive the statistics in order
1156 * to update the temperature used for calibrating the TXPOWER.
1157 */
1158static void iwl4965_bg_statistics_periodic(unsigned long data)
1159{
1160 struct iwl_priv *priv = (struct iwl_priv *)data;
1161
1162 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1163 return;
1164
1165 iwl_send_statistics_request(priv, CMD_ASYNC);
1166}
1167
c79dd5b5 1168static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1169 struct iwl_rx_mem_buffer *rxb)
b481de9c 1170{
0a6857e7 1171#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1172 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1173 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1174 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1175
1176 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1177 "tsf %d %d rate %d\n",
25a6572c 1178 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1179 beacon->beacon_notify_hdr.failure_frame,
1180 le32_to_cpu(beacon->ibss_mgr_status),
1181 le32_to_cpu(beacon->high_tsf),
1182 le32_to_cpu(beacon->low_tsf), rate);
1183#endif
1184
05c914fe 1185 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1186 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1187 queue_work(priv->workqueue, &priv->beacon_update);
1188}
1189
b481de9c
ZY
1190/* Handle notification from uCode that card's power state is changing
1191 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1192static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1193 struct iwl_rx_mem_buffer *rxb)
b481de9c 1194{
db11d634 1195 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1196 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1197 unsigned long status = priv->status;
1198
1199 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1200 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1201 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1202
1203 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1204 RF_CARD_DISABLED)) {
1205
3395f6e9 1206 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1207 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1208
3395f6e9
TW
1209 if (!iwl_grab_nic_access(priv)) {
1210 iwl_write_direct32(
b481de9c
ZY
1211 priv, HBUS_TARG_MBX_C,
1212 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1213
3395f6e9 1214 iwl_release_nic_access(priv);
b481de9c
ZY
1215 }
1216
1217 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1218 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1219 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1220 if (!iwl_grab_nic_access(priv)) {
1221 iwl_write_direct32(
b481de9c
ZY
1222 priv, HBUS_TARG_MBX_C,
1223 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1224
3395f6e9 1225 iwl_release_nic_access(priv);
b481de9c
ZY
1226 }
1227 }
1228
1229 if (flags & RF_CARD_DISABLED) {
3395f6e9 1230 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1231 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1232 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1233 if (!iwl_grab_nic_access(priv))
1234 iwl_release_nic_access(priv);
b481de9c
ZY
1235 }
1236 }
1237
1238 if (flags & HW_CARD_DISABLED)
1239 set_bit(STATUS_RF_KILL_HW, &priv->status);
1240 else
1241 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1242
1243
1244 if (flags & SW_CARD_DISABLED)
1245 set_bit(STATUS_RF_KILL_SW, &priv->status);
1246 else
1247 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1248
1249 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1250 iwl_scan_cancel(priv);
b481de9c
ZY
1251
1252 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1253 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1254 (test_bit(STATUS_RF_KILL_SW, &status) !=
1255 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1256 queue_work(priv->workqueue, &priv->rf_kill);
1257 else
1258 wake_up_interruptible(&priv->wait_command_queue);
1259}
1260
e2e3c57b
TW
1261int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
1262{
1263 int ret;
1264 unsigned long flags;
1265
1266 spin_lock_irqsave(&priv->lock, flags);
1267 ret = iwl_grab_nic_access(priv);
1268 if (ret)
1269 goto err;
1270
1271 if (src == IWL_PWR_SRC_VAUX) {
1272 u32 val;
e7b63581 1273 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW
1274 &val);
1275
1276 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1277 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1278 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1279 ~APMG_PS_CTRL_MSK_PWR_SRC);
1280 } else {
1281 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1282 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1283 ~APMG_PS_CTRL_MSK_PWR_SRC);
1284 }
1285
1286 iwl_release_nic_access(priv);
1287err:
1288 spin_unlock_irqrestore(&priv->lock, flags);
1289 return ret;
1290}
1291
b481de9c 1292/**
bb8c093b 1293 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1294 *
1295 * Setup the RX handlers for each of the reply types sent from the uCode
1296 * to the host.
1297 *
1298 * This function chains into the hardware specific files for them to setup
1299 * any hardware specific handlers as well.
1300 */
653fa4a0 1301static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1302{
885ba202 1303 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1304 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1305 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1306 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1307 iwl4965_rx_spectrum_measure_notif;
1308 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1309 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1310 iwl4965_rx_pm_debug_statistics_notif;
1311 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1312
9fbab516
BC
1313 /*
1314 * The same handler is used for both the REPLY to a discrete
1315 * statistics request from the host as well as for the periodic
1316 * statistics notifications (after received beacons) from the uCode.
b481de9c 1317 */
8f91aecb
EG
1318 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1319 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1320
1321 iwl_setup_rx_scan_handlers(priv);
1322
37a44211 1323 /* status change handler */
bb8c093b 1324 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1325
c1354754
TW
1326 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1327 iwl_rx_missed_beacon_notif;
37a44211 1328 /* Rx handlers */
1781a07f
EG
1329 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1330 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1331 /* block ack */
1332 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1333 /* Set up hardware specific Rx handlers */
d4789efe 1334 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1335}
1336
5c0eef96
MA
1337/*
1338 * this should be called while priv->lock is locked
1339*/
a55360e4 1340static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1341{
a55360e4
TW
1342 iwl_rx_allocate(priv);
1343 iwl_rx_queue_restock(priv);
b481de9c
ZY
1344}
1345
b481de9c
ZY
1346
1347/**
a55360e4 1348 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1349 *
1350 * Uses the priv->rx_handlers callback function array to invoke
1351 * the appropriate handlers, including command responses,
1352 * frame-received notifications, and other notifications.
1353 */
a55360e4 1354void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1355{
a55360e4 1356 struct iwl_rx_mem_buffer *rxb;
db11d634 1357 struct iwl_rx_packet *pkt;
a55360e4 1358 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1359 u32 r, i;
1360 int reclaim;
1361 unsigned long flags;
5c0eef96 1362 u8 fill_rx = 0;
d68ab680 1363 u32 count = 8;
b481de9c 1364
6440adb5
BC
1365 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1366 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1367 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1368 i = rxq->read;
1369
1370 /* Rx interrupt, but nothing sent from uCode */
1371 if (i == r)
f3d67999 1372 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1373
a55360e4 1374 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1375 fill_rx = 1;
1376
b481de9c
ZY
1377 while (i != r) {
1378 rxb = rxq->queue[i];
1379
9fbab516 1380 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1381 * then a bug has been introduced in the queue refilling
1382 * routines -- catch it here */
1383 BUG_ON(rxb == NULL);
1384
1385 rxq->queue[i] = NULL;
1386
e91af0af
JB
1387 dma_sync_single_range_for_cpu(
1388 &priv->pci_dev->dev, rxb->real_dma_addr,
1389 rxb->aligned_dma_addr - rxb->real_dma_addr,
1390 priv->hw_params.rx_buf_size,
1391 PCI_DMA_FROMDEVICE);
db11d634 1392 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1393
1394 /* Reclaim a command buffer only if this packet is a response
1395 * to a (driver-originated) command.
1396 * If the packet (e.g. Rx frame) originated from uCode,
1397 * there is no command buffer to reclaim.
1398 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1399 * but apparently a few don't get set; catch them here. */
1400 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1401 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1402 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1403 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1404 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1405 (pkt->hdr.cmd != REPLY_TX);
1406
1407 /* Based on type of command response or notification,
1408 * handle those that need handling via function in
bb8c093b 1409 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1410 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1411 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1412 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1413 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1414 } else {
1415 /* No handling needed */
f3d67999 1416 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1417 "r %d i %d No handler needed for %s, 0x%02x\n",
1418 r, i, get_cmd_string(pkt->hdr.cmd),
1419 pkt->hdr.cmd);
1420 }
1421
1422 if (reclaim) {
9fbab516 1423 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1424 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1425 * as we reclaim the driver command queue */
1426 if (rxb && rxb->skb)
17b88929 1427 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1428 else
1429 IWL_WARNING("Claim null rxb?\n");
1430 }
1431
1432 /* For now we just don't re-use anything. We can tweak this
1433 * later to try and re-use notification packets and SKBs that
1434 * fail to Rx correctly */
1435 if (rxb->skb != NULL) {
1436 priv->alloc_rxb_skb--;
1437 dev_kfree_skb_any(rxb->skb);
1438 rxb->skb = NULL;
1439 }
1440
4018517a
JB
1441 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1442 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1443 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1444 spin_lock_irqsave(&rxq->lock, flags);
1445 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1446 spin_unlock_irqrestore(&rxq->lock, flags);
1447 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1448 /* If there are a lot of unused frames,
1449 * restock the Rx queue so ucode wont assert. */
1450 if (fill_rx) {
1451 count++;
1452 if (count >= 8) {
1453 priv->rxq.read = i;
a55360e4 1454 __iwl_rx_replenish(priv);
5c0eef96
MA
1455 count = 0;
1456 }
1457 }
b481de9c
ZY
1458 }
1459
1460 /* Backtrack one entry */
1461 priv->rxq.read = i;
a55360e4
TW
1462 iwl_rx_queue_restock(priv);
1463}
a55360e4 1464
0a6857e7 1465#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1466static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1467{
c1adf9fb 1468 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57
JP
1469 DECLARE_MAC_BUF(mac);
1470
b481de9c 1471 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1472 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1473 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1474 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1475 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1476 le32_to_cpu(rxon->filter_flags));
1477 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1478 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1479 rxon->ofdm_basic_rates);
1480 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
1481 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
1482 print_mac(mac, rxon->node_addr));
1483 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
1484 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
1485 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1486}
1487#endif
1488
c79dd5b5 1489static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1490{
1491 IWL_DEBUG_ISR("Enabling interrupts\n");
1492 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1493 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1494}
1495
0359facc
MA
1496/* call this function to flush any scheduled tasklet */
1497static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1498{
1499 /* wait to make sure we flush pedding tasklet*/
1500 synchronize_irq(priv->pci_dev->irq);
1501 tasklet_kill(&priv->irq_tasklet);
1502}
1503
c79dd5b5 1504static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1505{
1506 clear_bit(STATUS_INT_ENABLED, &priv->status);
1507
1508 /* disable interrupts from uCode/NIC to host */
3395f6e9 1509 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1510
1511 /* acknowledge/clear/reset any interrupts still pending
1512 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1513 iwl_write32(priv, CSR_INT, 0xffffffff);
1514 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1515 IWL_DEBUG_ISR("Disabled interrupts\n");
1516}
1517
b481de9c 1518
b481de9c 1519/**
bb8c093b 1520 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1521 */
c79dd5b5 1522static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1523{
bb8c093b 1524 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1525 set_bit(STATUS_FW_ERROR, &priv->status);
1526
1527 /* Cancel currently queued command. */
1528 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1529
0a6857e7 1530#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1531 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1532 iwl_dump_nic_error_log(priv);
189a2b59 1533 iwl_dump_nic_event_log(priv);
bf403db8 1534 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1535 }
1536#endif
1537
1538 wake_up_interruptible(&priv->wait_command_queue);
1539
1540 /* Keep the restart process from trying to send host
1541 * commands by clearing the INIT status bit */
1542 clear_bit(STATUS_READY, &priv->status);
1543
1544 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1545 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1546 "Restarting adapter due to uCode error.\n");
1547
3109ece1 1548 if (iwl_is_associated(priv)) {
b481de9c
ZY
1549 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1550 sizeof(priv->recovery_rxon));
1551 priv->error_recovering = 1;
1552 }
3a1081e8
EK
1553 if (priv->cfg->mod_params->restart_fw)
1554 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1555 }
1556}
1557
c79dd5b5 1558static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1559{
1560 unsigned long flags;
1561
1562 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1563 sizeof(priv->staging_rxon));
1564 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1565 iwl4965_commit_rxon(priv);
b481de9c 1566
4f40e4d9 1567 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1568
1569 spin_lock_irqsave(&priv->lock, flags);
1570 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1571 priv->error_recovering = 0;
1572 spin_unlock_irqrestore(&priv->lock, flags);
1573}
1574
c79dd5b5 1575static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1576{
1577 u32 inta, handled = 0;
1578 u32 inta_fh;
1579 unsigned long flags;
0a6857e7 1580#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1581 u32 inta_mask;
1582#endif
1583
1584 spin_lock_irqsave(&priv->lock, flags);
1585
1586 /* Ack/clear/reset pending uCode interrupts.
1587 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1588 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1589 inta = iwl_read32(priv, CSR_INT);
1590 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1591
1592 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1593 * Any new interrupts that happen after this, either while we're
1594 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1595 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1596 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1597
0a6857e7 1598#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1599 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1600 /* just for debug */
3395f6e9 1601 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1602 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1603 inta, inta_mask, inta_fh);
1604 }
1605#endif
1606
1607 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1608 * atomic, make sure that inta covers all the interrupts that
1609 * we've discovered, even if FH interrupt came in just after
1610 * reading CSR_INT. */
6f83eaa1 1611 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1612 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1613 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1614 inta |= CSR_INT_BIT_FH_TX;
1615
1616 /* Now service all interrupt bits discovered above. */
1617 if (inta & CSR_INT_BIT_HW_ERR) {
1618 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1619
1620 /* Tell the device to stop sending interrupts */
bb8c093b 1621 iwl4965_disable_interrupts(priv);
b481de9c 1622
bb8c093b 1623 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1624
1625 handled |= CSR_INT_BIT_HW_ERR;
1626
1627 spin_unlock_irqrestore(&priv->lock, flags);
1628
1629 return;
1630 }
1631
0a6857e7 1632#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1633 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1634 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1635 if (inta & CSR_INT_BIT_SCD)
1636 IWL_DEBUG_ISR("Scheduler finished to transmit "
1637 "the frame/frames.\n");
b481de9c
ZY
1638
1639 /* Alive notification via Rx interrupt will do the real work */
1640 if (inta & CSR_INT_BIT_ALIVE)
1641 IWL_DEBUG_ISR("Alive interrupt\n");
1642 }
1643#endif
1644 /* Safely ignore these bits for debug checks below */
25c03d8e 1645 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1646
9fbab516 1647 /* HW RF KILL switch toggled */
b481de9c
ZY
1648 if (inta & CSR_INT_BIT_RF_KILL) {
1649 int hw_rf_kill = 0;
3395f6e9 1650 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1651 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1652 hw_rf_kill = 1;
1653
f3d67999 1654 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1655 hw_rf_kill ? "disable radio":"enable radio");
1656
a9efa652
EG
1657 /* driver only loads ucode once setting the interface up.
1658 * the driver as well won't allow loading if RFKILL is set
1659 * therefore no need to restart the driver from this handler
1660 */
1661 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
53e49093 1662 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c
ZY
1663
1664 handled |= CSR_INT_BIT_RF_KILL;
1665 }
1666
9fbab516 1667 /* Chip got too hot and stopped itself */
b481de9c
ZY
1668 if (inta & CSR_INT_BIT_CT_KILL) {
1669 IWL_ERROR("Microcode CT kill error detected.\n");
1670 handled |= CSR_INT_BIT_CT_KILL;
1671 }
1672
1673 /* Error detected by uCode */
1674 if (inta & CSR_INT_BIT_SW_ERR) {
1675 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1676 inta);
bb8c093b 1677 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1678 handled |= CSR_INT_BIT_SW_ERR;
1679 }
1680
1681 /* uCode wakes up after power-down sleep */
1682 if (inta & CSR_INT_BIT_WAKEUP) {
1683 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1684 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1685 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1686 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1687 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1688 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1689 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1690 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1691
1692 handled |= CSR_INT_BIT_WAKEUP;
1693 }
1694
1695 /* All uCode command responses, including Tx command responses,
1696 * Rx "responses" (frame-received notification), and other
1697 * notifications from uCode come through here*/
1698 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1699 iwl_rx_handle(priv);
b481de9c
ZY
1700 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1701 }
1702
1703 if (inta & CSR_INT_BIT_FH_TX) {
1704 IWL_DEBUG_ISR("Tx interrupt\n");
1705 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1706 /* FH finished to write, send event */
1707 priv->ucode_write_complete = 1;
1708 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1709 }
1710
1711 if (inta & ~handled)
1712 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1713
1714 if (inta & ~CSR_INI_SET_MASK) {
1715 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1716 inta & ~CSR_INI_SET_MASK);
1717 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1718 }
1719
1720 /* Re-enable all interrupts */
0359facc
MA
1721 /* only Re-enable if diabled by irq */
1722 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1723 iwl4965_enable_interrupts(priv);
b481de9c 1724
0a6857e7 1725#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1726 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1727 inta = iwl_read32(priv, CSR_INT);
1728 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1729 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1730 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1731 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1732 }
1733#endif
1734 spin_unlock_irqrestore(&priv->lock, flags);
1735}
1736
bb8c093b 1737static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1738{
c79dd5b5 1739 struct iwl_priv *priv = data;
b481de9c
ZY
1740 u32 inta, inta_mask;
1741 u32 inta_fh;
1742 if (!priv)
1743 return IRQ_NONE;
1744
1745 spin_lock(&priv->lock);
1746
1747 /* Disable (but don't clear!) interrupts here to avoid
1748 * back-to-back ISRs and sporadic interrupts from our NIC.
1749 * If we have something to service, the tasklet will re-enable ints.
1750 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1751 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1752 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1753
1754 /* Discover which interrupts are active/pending */
3395f6e9
TW
1755 inta = iwl_read32(priv, CSR_INT);
1756 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1757
1758 /* Ignore interrupt if there's nothing in NIC to service.
1759 * This may be due to IRQ shared with another device,
1760 * or due to sporadic interrupts thrown from our NIC. */
1761 if (!inta && !inta_fh) {
1762 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1763 goto none;
1764 }
1765
1766 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1767 /* Hardware disappeared. It might have already raised
1768 * an interrupt */
b481de9c 1769 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1770 goto unplugged;
b481de9c
ZY
1771 }
1772
1773 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1774 inta, inta_mask, inta_fh);
1775
25c03d8e
JP
1776 inta &= ~CSR_INT_BIT_SCD;
1777
bb8c093b 1778 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1779 if (likely(inta || inta_fh))
1780 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1781
66fbb541
ON
1782 unplugged:
1783 spin_unlock(&priv->lock);
b481de9c
ZY
1784 return IRQ_HANDLED;
1785
1786 none:
1787 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1788 /* only Re-enable if diabled by irq */
1789 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1790 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1791 spin_unlock(&priv->lock);
1792 return IRQ_NONE;
1793}
1794
b481de9c
ZY
1795/******************************************************************************
1796 *
1797 * uCode download functions
1798 *
1799 ******************************************************************************/
1800
c79dd5b5 1801static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1802{
98c92211
TW
1803 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1804 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1805 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1806 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1807 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1808 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1809}
1810
edcdf8b2
RR
1811static void iwl4965_nic_start(struct iwl_priv *priv)
1812{
1813 /* Remove all resets to allow NIC to operate */
1814 iwl_write32(priv, CSR_RESET, 0);
1815}
1816
1817
b481de9c 1818/**
bb8c093b 1819 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1820 *
1821 * Copy into buffers for card to fetch via bus-mastering
1822 */
c79dd5b5 1823static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1824{
14b3d338 1825 struct iwl_ucode *ucode;
90e759d1 1826 int ret;
b481de9c 1827 const struct firmware *ucode_raw;
4bf775cd 1828 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1829 u8 *src;
1830 size_t len;
1831 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1832
1833 /* Ask kernel firmware_class module to get the boot firmware off disk.
1834 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1835 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1836 if (ret < 0) {
1837 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1838 name, ret);
b481de9c
ZY
1839 goto error;
1840 }
1841
1842 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1843 name, ucode_raw->size);
1844
1845 /* Make sure that we got at least our header! */
1846 if (ucode_raw->size < sizeof(*ucode)) {
1847 IWL_ERROR("File size way too small!\n");
90e759d1 1848 ret = -EINVAL;
b481de9c
ZY
1849 goto err_release;
1850 }
1851
1852 /* Data from ucode file: header followed by uCode images */
1853 ucode = (void *)ucode_raw->data;
1854
1855 ver = le32_to_cpu(ucode->ver);
1856 inst_size = le32_to_cpu(ucode->inst_size);
1857 data_size = le32_to_cpu(ucode->data_size);
1858 init_size = le32_to_cpu(ucode->init_size);
1859 init_data_size = le32_to_cpu(ucode->init_data_size);
1860 boot_size = le32_to_cpu(ucode->boot_size);
1861
1862 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1863 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1864 inst_size);
1865 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1866 data_size);
1867 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1868 init_size);
1869 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1870 init_data_size);
1871 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1872 boot_size);
1873
1874 /* Verify size of file vs. image size info in file's header */
1875 if (ucode_raw->size < sizeof(*ucode) +
1876 inst_size + data_size + init_size +
1877 init_data_size + boot_size) {
1878
1879 IWL_DEBUG_INFO("uCode file size %d too small\n",
1880 (int)ucode_raw->size);
90e759d1 1881 ret = -EINVAL;
b481de9c
ZY
1882 goto err_release;
1883 }
1884
1885 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1886 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1887 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1888 inst_size);
1889 ret = -EINVAL;
b481de9c
ZY
1890 goto err_release;
1891 }
1892
099b40b7 1893 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1894 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1895 data_size);
1896 ret = -EINVAL;
b481de9c
ZY
1897 goto err_release;
1898 }
099b40b7 1899 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1900 IWL_DEBUG_INFO
90e759d1
TW
1901 ("uCode init instr len %d too large to fit in\n",
1902 init_size);
1903 ret = -EINVAL;
b481de9c
ZY
1904 goto err_release;
1905 }
099b40b7 1906 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1907 IWL_DEBUG_INFO
90e759d1
TW
1908 ("uCode init data len %d too large to fit in\n",
1909 init_data_size);
1910 ret = -EINVAL;
b481de9c
ZY
1911 goto err_release;
1912 }
099b40b7 1913 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1914 IWL_DEBUG_INFO
90e759d1
TW
1915 ("uCode boot instr len %d too large to fit in\n",
1916 boot_size);
1917 ret = -EINVAL;
b481de9c
ZY
1918 goto err_release;
1919 }
1920
1921 /* Allocate ucode buffers for card's bus-master loading ... */
1922
1923 /* Runtime instructions and 2 copies of data:
1924 * 1) unmodified from disk
1925 * 2) backup cache for save/restore during power-downs */
1926 priv->ucode_code.len = inst_size;
98c92211 1927 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1928
1929 priv->ucode_data.len = data_size;
98c92211 1930 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1931
1932 priv->ucode_data_backup.len = data_size;
98c92211 1933 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1934
1935 /* Initialization instructions and data */
90e759d1
TW
1936 if (init_size && init_data_size) {
1937 priv->ucode_init.len = init_size;
98c92211 1938 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1939
1940 priv->ucode_init_data.len = init_data_size;
98c92211 1941 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1942
1943 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1944 goto err_pci_alloc;
1945 }
b481de9c
ZY
1946
1947 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1948 if (boot_size) {
1949 priv->ucode_boot.len = boot_size;
98c92211 1950 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1951
90e759d1
TW
1952 if (!priv->ucode_boot.v_addr)
1953 goto err_pci_alloc;
1954 }
b481de9c
ZY
1955
1956 /* Copy images into buffers for card's bus-master reads ... */
1957
1958 /* Runtime instructions (first block of data in file) */
1959 src = &ucode->data[0];
1960 len = priv->ucode_code.len;
90e759d1 1961 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1962 memcpy(priv->ucode_code.v_addr, src, len);
1963 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1964 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1965
1966 /* Runtime data (2nd block)
bb8c093b 1967 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1968 src = &ucode->data[inst_size];
1969 len = priv->ucode_data.len;
90e759d1 1970 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1971 memcpy(priv->ucode_data.v_addr, src, len);
1972 memcpy(priv->ucode_data_backup.v_addr, src, len);
1973
1974 /* Initialization instructions (3rd block) */
1975 if (init_size) {
1976 src = &ucode->data[inst_size + data_size];
1977 len = priv->ucode_init.len;
90e759d1
TW
1978 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1979 len);
b481de9c
ZY
1980 memcpy(priv->ucode_init.v_addr, src, len);
1981 }
1982
1983 /* Initialization data (4th block) */
1984 if (init_data_size) {
1985 src = &ucode->data[inst_size + data_size + init_size];
1986 len = priv->ucode_init_data.len;
90e759d1
TW
1987 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1988 len);
b481de9c
ZY
1989 memcpy(priv->ucode_init_data.v_addr, src, len);
1990 }
1991
1992 /* Bootstrap instructions (5th block) */
1993 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1994 len = priv->ucode_boot.len;
90e759d1 1995 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1996 memcpy(priv->ucode_boot.v_addr, src, len);
1997
1998 /* We have our copies now, allow OS release its copies */
1999 release_firmware(ucode_raw);
2000 return 0;
2001
2002 err_pci_alloc:
2003 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 2004 ret = -ENOMEM;
bb8c093b 2005 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
2006
2007 err_release:
2008 release_firmware(ucode_raw);
2009
2010 error:
90e759d1 2011 return ret;
b481de9c
ZY
2012}
2013
b481de9c 2014/**
4a4a9e81 2015 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 2016 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 2017 * Alive gets handled by iwl_init_alive_start()).
b481de9c 2018 */
4a4a9e81 2019static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 2020{
57aab75a 2021 int ret = 0;
b481de9c
ZY
2022
2023 IWL_DEBUG_INFO("Runtime Alive received.\n");
2024
2025 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2026 /* We had an error bringing up the hardware, so take it
2027 * all the way back down so we can try again */
2028 IWL_DEBUG_INFO("Alive failed.\n");
2029 goto restart;
2030 }
2031
2032 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2033 * This is a paranoid check, because we would not have gotten the
2034 * "runtime" alive if code weren't properly loaded. */
b0692f2f 2035 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
2036 /* Runtime instruction load was bad;
2037 * take it all the way back down so we can try again */
2038 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
2039 goto restart;
2040 }
2041
37deb2a0 2042 iwl_clear_stations_table(priv);
57aab75a
TW
2043 ret = priv->cfg->ops->lib->alive_notify(priv);
2044 if (ret) {
b481de9c 2045 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 2046 ret);
b481de9c
ZY
2047 goto restart;
2048 }
2049
9fbab516 2050 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2051 set_bit(STATUS_ALIVE, &priv->status);
2052
fee1247a 2053 if (iwl_is_rfkill(priv))
b481de9c
ZY
2054 return;
2055
36d6825b 2056 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2057
2058 priv->active_rate = priv->rates_mask;
2059 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2060
3109ece1 2061 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2062 struct iwl_rxon_cmd *active_rxon =
2063 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2064
2065 memcpy(&priv->staging_rxon, &priv->active_rxon,
2066 sizeof(priv->staging_rxon));
2067 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2068 } else {
2069 /* Initialize our rx_config data */
bb8c093b 2070 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2071 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2072 }
2073
9fbab516 2074 /* Configure Bluetooth device coexistence support */
bb8c093b 2075 iwl4965_send_bt_config(priv);
b481de9c 2076
4a4a9e81
TW
2077 iwl_reset_run_time_calib(priv);
2078
b481de9c 2079 /* Configure the adapter for unassociated operation */
bb8c093b 2080 iwl4965_commit_rxon(priv);
b481de9c
ZY
2081
2082 /* At this point, the NIC is initialized and operational */
47f4a587 2083 iwl_rf_kill_ct_config(priv);
5a66926a 2084
fe00b5a5
RC
2085 iwl_leds_register(priv);
2086
b481de9c 2087 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2088 set_bit(STATUS_READY, &priv->status);
5a66926a 2089 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2090
2091 if (priv->error_recovering)
bb8c093b 2092 iwl4965_error_recovery(priv);
b481de9c 2093
58d0f361 2094 iwl_power_update_mode(priv, 1);
c46fbefa
AK
2095
2096 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2097 iwl4965_set_mode(priv, priv->iw_mode);
2098
b481de9c
ZY
2099 return;
2100
2101 restart:
2102 queue_work(priv->workqueue, &priv->restart);
2103}
2104
4e39317d 2105static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2106
c79dd5b5 2107static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2108{
2109 unsigned long flags;
2110 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2111
2112 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2113
b481de9c
ZY
2114 if (!exit_pending)
2115 set_bit(STATUS_EXIT_PENDING, &priv->status);
2116
ab53d8af
MA
2117 iwl_leds_unregister(priv);
2118
37deb2a0 2119 iwl_clear_stations_table(priv);
b481de9c
ZY
2120
2121 /* Unblock any waiting calls */
2122 wake_up_interruptible_all(&priv->wait_command_queue);
2123
b481de9c
ZY
2124 /* Wipe out the EXIT_PENDING status bit if we are not actually
2125 * exiting the module */
2126 if (!exit_pending)
2127 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2128
2129 /* stop and reset the on-board processor */
3395f6e9 2130 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2131
2132 /* tell the device to stop sending interrupts */
0359facc 2133 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2134 iwl4965_disable_interrupts(priv);
0359facc
MA
2135 spin_unlock_irqrestore(&priv->lock, flags);
2136 iwl_synchronize_irq(priv);
b481de9c
ZY
2137
2138 if (priv->mac80211_registered)
2139 ieee80211_stop_queues(priv->hw);
2140
bb8c093b 2141 /* If we have not previously called iwl4965_init() then
b481de9c 2142 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2143 if (!iwl_is_init(priv)) {
b481de9c
ZY
2144 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2145 STATUS_RF_KILL_HW |
2146 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2147 STATUS_RF_KILL_SW |
9788864e
RC
2148 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2149 STATUS_GEO_CONFIGURED |
b481de9c 2150 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
2151 STATUS_IN_SUSPEND |
2152 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2153 STATUS_EXIT_PENDING;
b481de9c
ZY
2154 goto exit;
2155 }
2156
2157 /* ...otherwise clear out all the status bits but the RF Kill and
2158 * SUSPEND bits and continue taking the NIC down. */
2159 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2160 STATUS_RF_KILL_HW |
2161 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2162 STATUS_RF_KILL_SW |
9788864e
RC
2163 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2164 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2165 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2166 STATUS_IN_SUSPEND |
2167 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
2168 STATUS_FW_ERROR |
2169 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2170 STATUS_EXIT_PENDING;
b481de9c
ZY
2171
2172 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2173 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2174 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2175 spin_unlock_irqrestore(&priv->lock, flags);
2176
da1bc453 2177 iwl_txq_ctx_stop(priv);
b3bbacb7 2178 iwl_rxq_stop(priv);
b481de9c
ZY
2179
2180 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2181 if (!iwl_grab_nic_access(priv)) {
2182 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2183 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2184 iwl_release_nic_access(priv);
b481de9c
ZY
2185 }
2186 spin_unlock_irqrestore(&priv->lock, flags);
2187
2188 udelay(5);
2189
7f066108 2190 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG
2191 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
2192 priv->cfg->ops->lib->apm_ops.stop(priv);
2193 else
2194 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2195 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2196
2197 exit:
885ba202 2198 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2199
2200 if (priv->ibss_beacon)
2201 dev_kfree_skb(priv->ibss_beacon);
2202 priv->ibss_beacon = NULL;
2203
2204 /* clear out any free frames */
fcab423d 2205 iwl_clear_free_frames(priv);
b481de9c
ZY
2206}
2207
c79dd5b5 2208static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2209{
2210 mutex_lock(&priv->mutex);
bb8c093b 2211 __iwl4965_down(priv);
b481de9c 2212 mutex_unlock(&priv->mutex);
b24d22b1 2213
4e39317d 2214 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2215}
2216
2217#define MAX_HW_RESTARTS 5
2218
c79dd5b5 2219static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2220{
57aab75a
TW
2221 int i;
2222 int ret;
b481de9c
ZY
2223
2224 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2225 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2226 return -EIO;
2227 }
2228
e903fbd4
RC
2229 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2230 IWL_ERROR("ucode not available for device bringup\n");
2231 return -EIO;
2232 }
2233
e655b9f0 2234 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2235 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2236 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2237 else
e655b9f0 2238 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2239
c1842d61
TW
2240 if (iwl_is_rfkill(priv)) {
2241 iwl4965_enable_interrupts(priv);
3bff19c2
EG
2242 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2243 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2244 return 0;
b481de9c
ZY
2245 }
2246
3395f6e9 2247 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2248
399f4900
RR
2249 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2250 if (ret) {
2251 IWL_ERROR("Unable to allocate shared memory\n");
2252 return ret;
2253 }
2254
1053d35f 2255 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2256 if (ret) {
2257 IWL_ERROR("Unable to init nic\n");
2258 return ret;
b481de9c
ZY
2259 }
2260
2261 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2262 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2263 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2264 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2265
2266 /* clear (again), then enable host interrupts */
3395f6e9 2267 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2268 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2269
2270 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2271 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2272 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2273
2274 /* Copy original ucode data image from disk into backup cache.
2275 * This will be used to initialize the on-board processor's
2276 * data SRAM for a clean start when the runtime program first loads. */
2277 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2278 priv->ucode_data.len);
b481de9c 2279
b481de9c
ZY
2280 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2281
37deb2a0 2282 iwl_clear_stations_table(priv);
b481de9c
ZY
2283
2284 /* load bootstrap state machine,
2285 * load bootstrap program into processor's memory,
2286 * prepare to load the "initialize" uCode */
57aab75a 2287 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2288
57aab75a
TW
2289 if (ret) {
2290 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2291 continue;
2292 }
2293
f3d5b45b
EG
2294 /* Clear out the uCode error bit if it is set */
2295 clear_bit(STATUS_FW_ERROR, &priv->status);
2296
b481de9c 2297 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2298 iwl4965_nic_start(priv);
b481de9c 2299
b481de9c
ZY
2300 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2301
2302 return 0;
2303 }
2304
2305 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2306 __iwl4965_down(priv);
64e72c3e 2307 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2308
2309 /* tried to restart and config the device for as long as our
2310 * patience could withstand */
2311 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2312 return -EIO;
2313}
2314
2315
2316/*****************************************************************************
2317 *
2318 * Workqueue callbacks
2319 *
2320 *****************************************************************************/
2321
4a4a9e81 2322static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2323{
c79dd5b5
TW
2324 struct iwl_priv *priv =
2325 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2326
2327 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2328 return;
2329
2330 mutex_lock(&priv->mutex);
f3ccc08c 2331 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2332 mutex_unlock(&priv->mutex);
2333}
2334
4a4a9e81 2335static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2336{
c79dd5b5
TW
2337 struct iwl_priv *priv =
2338 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2339
2340 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2341 return;
2342
2343 mutex_lock(&priv->mutex);
4a4a9e81 2344 iwl_alive_start(priv);
b481de9c
ZY
2345 mutex_unlock(&priv->mutex);
2346}
2347
bb8c093b 2348static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2349{
c79dd5b5 2350 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2351
2352 wake_up_interruptible(&priv->wait_command_queue);
2353
2354 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2355 return;
2356
2357 mutex_lock(&priv->mutex);
2358
fee1247a 2359 if (!iwl_is_rfkill(priv)) {
f3d67999 2360 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2361 "HW and/or SW RF Kill no longer active, restarting "
2362 "device\n");
2363 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2364 queue_work(priv->workqueue, &priv->restart);
2365 } else {
ad97edd2
MA
2366 /* make sure mac80211 stop sending Tx frame */
2367 if (priv->mac80211_registered)
2368 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2369
2370 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2371 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2372 "disabled by SW switch\n");
2373 else
2374 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2375 "Kill switch must be turned off for "
2376 "wireless networking to work.\n");
2377 }
2378 mutex_unlock(&priv->mutex);
80fcc9e2 2379 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2380}
2381
4419e39b
AK
2382static void iwl4965_bg_set_monitor(struct work_struct *work)
2383{
2384 struct iwl_priv *priv = container_of(work,
2385 struct iwl_priv, set_monitor);
c46fbefa 2386 int ret;
4419e39b
AK
2387
2388 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2389
2390 mutex_lock(&priv->mutex);
2391
05c914fe 2392 ret = iwl4965_set_mode(priv, NL80211_IFTYPE_MONITOR);
c46fbefa
AK
2393
2394 if (ret) {
2395 if (ret == -EAGAIN)
2396 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2397 else
2398 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2399 }
4419e39b
AK
2400
2401 mutex_unlock(&priv->mutex);
2402}
2403
16e727e8
EG
2404static void iwl_bg_run_time_calib_work(struct work_struct *work)
2405{
2406 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2407 run_time_calib_work);
2408
2409 mutex_lock(&priv->mutex);
2410
2411 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2412 test_bit(STATUS_SCANNING, &priv->status)) {
2413 mutex_unlock(&priv->mutex);
2414 return;
2415 }
2416
2417 if (priv->start_calib) {
2418 iwl_chain_noise_calibration(priv, &priv->statistics);
2419
2420 iwl_sensitivity_calibration(priv, &priv->statistics);
2421 }
2422
2423 mutex_unlock(&priv->mutex);
2424 return;
2425}
2426
bb8c093b 2427static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2428{
c79dd5b5 2429 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2430
2431 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2432 return;
2433
2434 mutex_lock(&priv->mutex);
bb8c093b 2435 __iwl4965_up(priv);
b481de9c 2436 mutex_unlock(&priv->mutex);
80fcc9e2 2437 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2438}
2439
bb8c093b 2440static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2441{
c79dd5b5 2442 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2443
2444 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2445 return;
2446
bb8c093b 2447 iwl4965_down(priv);
b481de9c
ZY
2448 queue_work(priv->workqueue, &priv->up);
2449}
2450
bb8c093b 2451static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2452{
c79dd5b5
TW
2453 struct iwl_priv *priv =
2454 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2455
2456 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2457 return;
2458
2459 mutex_lock(&priv->mutex);
a55360e4 2460 iwl_rx_replenish(priv);
b481de9c
ZY
2461 mutex_unlock(&priv->mutex);
2462}
2463
7878a5a4
MA
2464#define IWL_DELAY_NEXT_SCAN (HZ*2)
2465
508e32e1 2466static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2467{
b481de9c 2468 struct ieee80211_conf *conf = NULL;
857485c0 2469 int ret = 0;
0795af57 2470 DECLARE_MAC_BUF(mac);
1ff50bda 2471 unsigned long flags;
b481de9c 2472
05c914fe 2473 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3ac7f146 2474 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2475 return;
2476 }
2477
0795af57
JP
2478 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
2479 priv->assoc_id,
2480 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
2481
2482
2483 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2484 return;
2485
b481de9c 2486
508e32e1 2487 if (!priv->vif || !priv->is_open)
948c171c 2488 return;
508e32e1 2489
c90a74ba 2490 iwl_power_cancel_timeout(priv);
2a421b91 2491 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2492
b481de9c
ZY
2493 conf = ieee80211_get_hw_conf(priv->hw);
2494
2495 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2496 iwl4965_commit_rxon(priv);
b481de9c 2497
bb8c093b
CH
2498 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2499 iwl4965_setup_rxon_timing(priv);
857485c0 2500 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2501 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2502 if (ret)
b481de9c
ZY
2503 IWL_WARNING("REPLY_RXON_TIMING failed - "
2504 "Attempting to continue.\n");
2505
2506 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2507
42eb7c64 2508 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2509
c7de35cd 2510 iwl_set_rxon_chain(priv);
b481de9c
ZY
2511 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2512
2513 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2514 priv->assoc_id, priv->beacon_int);
2515
2516 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2517 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2518 else
2519 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2520
2521 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2522 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2523 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2524 else
2525 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2526
05c914fe 2527 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2528 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2529
2530 }
2531
bb8c093b 2532 iwl4965_commit_rxon(priv);
b481de9c
ZY
2533
2534 switch (priv->iw_mode) {
05c914fe 2535 case NL80211_IFTYPE_STATION:
b481de9c
ZY
2536 break;
2537
05c914fe 2538 case NL80211_IFTYPE_ADHOC:
b481de9c 2539
c46fbefa
AK
2540 /* assume default assoc id */
2541 priv->assoc_id = 1;
b481de9c 2542
4f40e4d9 2543 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b 2544 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2545
2546 break;
2547
2548 default:
2549 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2550 __func__, priv->iw_mode);
b481de9c
ZY
2551 break;
2552 }
2553
05c914fe 2554 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2555 priv->assoc_station_added = 1;
2556
1ff50bda
EG
2557 spin_lock_irqsave(&priv->lock, flags);
2558 iwl_activate_qos(priv, 0);
2559 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2560
04816448
GE
2561 /* the chain noise calibration will enabled PM upon completion
2562 * If chain noise has already been run, then we need to enable
2563 * power management here */
2564 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2565 iwl_power_enable_management(priv);
c90a74ba
EG
2566
2567 /* Enable Rx differential gain and sensitivity calibrations */
2568 iwl_chain_noise_reset(priv);
2569 priv->start_calib = 1;
2570
508e32e1
RC
2571}
2572
b481de9c
ZY
2573/*****************************************************************************
2574 *
2575 * mac80211 entry point functions
2576 *
2577 *****************************************************************************/
2578
154b25ce 2579#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2580
bb8c093b 2581static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2582{
c79dd5b5 2583 struct iwl_priv *priv = hw->priv;
5a66926a 2584 int ret;
cf88c433 2585 u16 pci_cmd;
b481de9c
ZY
2586
2587 IWL_DEBUG_MAC80211("enter\n");
2588
5a66926a
ZY
2589 if (pci_enable_device(priv->pci_dev)) {
2590 IWL_ERROR("Fail to pci_enable_device\n");
2591 return -ENODEV;
2592 }
2593 pci_restore_state(priv->pci_dev);
2594 pci_enable_msi(priv->pci_dev);
2595
cf88c433
TW
2596 /* enable interrupts if needed: hw bug w/a */
2597 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2598 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2599 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2600 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2601 }
2602
5a66926a
ZY
2603 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2604 DRV_NAME, priv);
2605 if (ret) {
2606 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2607 goto out_disable_msi;
2608 }
2609
b481de9c
ZY
2610 /* we should be verifying the device is ready to be opened */
2611 mutex_lock(&priv->mutex);
2612
c1adf9fb 2613 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2614 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2615 * ucode filename and max sizes are card-specific. */
b481de9c 2616
5a66926a
ZY
2617 if (!priv->ucode_code.len) {
2618 ret = iwl4965_read_ucode(priv);
2619 if (ret) {
2620 IWL_ERROR("Could not read microcode: %d\n", ret);
2621 mutex_unlock(&priv->mutex);
2622 goto out_release_irq;
2623 }
2624 }
b481de9c 2625
e655b9f0 2626 ret = __iwl4965_up(priv);
5a66926a 2627
b481de9c 2628 mutex_unlock(&priv->mutex);
5a66926a 2629
80fcc9e2
AG
2630 iwl_rfkill_set_hw_state(priv);
2631
e655b9f0
ZY
2632 if (ret)
2633 goto out_release_irq;
2634
c1842d61
TW
2635 if (iwl_is_rfkill(priv))
2636 goto out;
2637
e655b9f0
ZY
2638 IWL_DEBUG_INFO("Start UP work done.\n");
2639
2640 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2641 return 0;
2642
fe9b6b72 2643 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2644 * mac80211 will not be run successfully. */
154b25ce
EG
2645 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2646 test_bit(STATUS_READY, &priv->status),
2647 UCODE_READY_TIMEOUT);
2648 if (!ret) {
2649 if (!test_bit(STATUS_READY, &priv->status)) {
2650 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2651 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2652 ret = -ETIMEDOUT;
2653 goto out_release_irq;
5a66926a 2654 }
fe9b6b72 2655 }
0a078ffa 2656
c1842d61 2657out:
0a078ffa 2658 priv->is_open = 1;
b481de9c
ZY
2659 IWL_DEBUG_MAC80211("leave\n");
2660 return 0;
5a66926a
ZY
2661
2662out_release_irq:
2663 free_irq(priv->pci_dev->irq, priv);
2664out_disable_msi:
2665 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2666 pci_disable_device(priv->pci_dev);
2667 priv->is_open = 0;
2668 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2669 return ret;
b481de9c
ZY
2670}
2671
bb8c093b 2672static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2673{
c79dd5b5 2674 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2675
2676 IWL_DEBUG_MAC80211("enter\n");
948c171c 2677
e655b9f0
ZY
2678 if (!priv->is_open) {
2679 IWL_DEBUG_MAC80211("leave - skip\n");
2680 return;
2681 }
2682
b481de9c 2683 priv->is_open = 0;
5a66926a 2684
fee1247a 2685 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2686 /* stop mac, cancel any scan request and clear
2687 * RXON_FILTER_ASSOC_MSK BIT
2688 */
5a66926a 2689 mutex_lock(&priv->mutex);
2a421b91 2690 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2691 mutex_unlock(&priv->mutex);
fde3571f
MA
2692 }
2693
5a66926a
ZY
2694 iwl4965_down(priv);
2695
2696 flush_workqueue(priv->workqueue);
2697 free_irq(priv->pci_dev->irq, priv);
2698 pci_disable_msi(priv->pci_dev);
2699 pci_save_state(priv->pci_dev);
2700 pci_disable_device(priv->pci_dev);
948c171c 2701
b481de9c 2702 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2703}
2704
e039fa4a 2705static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2706{
c79dd5b5 2707 struct iwl_priv *priv = hw->priv;
b481de9c 2708
f3674227 2709 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2710
b481de9c 2711 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2712 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2713
e039fa4a 2714 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2715 dev_kfree_skb_any(skb);
2716
f3674227 2717 IWL_DEBUG_MACDUMP("leave\n");
b481de9c
ZY
2718 return 0;
2719}
2720
bb8c093b 2721static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2722 struct ieee80211_if_init_conf *conf)
2723{
c79dd5b5 2724 struct iwl_priv *priv = hw->priv;
b481de9c 2725 unsigned long flags;
0795af57 2726 DECLARE_MAC_BUF(mac);
b481de9c 2727
32bfd35d 2728 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2729
32bfd35d
JB
2730 if (priv->vif) {
2731 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2732 return -EOPNOTSUPP;
b481de9c
ZY
2733 }
2734
2735 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2736 priv->vif = conf->vif;
b481de9c
ZY
2737
2738 spin_unlock_irqrestore(&priv->lock, flags);
2739
2740 mutex_lock(&priv->mutex);
864792e3
TW
2741
2742 if (conf->mac_addr) {
2743 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
2744 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2745 }
b481de9c 2746
c46fbefa
AK
2747 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2748 /* we are not ready, will run again when ready */
2749 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2750
b481de9c
ZY
2751 mutex_unlock(&priv->mutex);
2752
5a66926a 2753 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2754 return 0;
2755}
2756
2757/**
bb8c093b 2758 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2759 *
2760 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2761 * be set inappropriately and the driver currently sets the hardware up to
2762 * use it whenever needed.
2763 */
bb8c093b 2764static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2765{
c79dd5b5 2766 struct iwl_priv *priv = hw->priv;
bf85ea4f 2767 const struct iwl_channel_info *ch_info;
b481de9c 2768 unsigned long flags;
76bb77e0 2769 int ret = 0;
82a66bbb 2770 u16 channel;
b481de9c
ZY
2771
2772 mutex_lock(&priv->mutex);
8318d78a 2773 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2774
14a08a7f 2775 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2776 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2777 goto out;
64e72c3e
MA
2778 }
2779
14a08a7f
EG
2780 if (!conf->radio_enabled)
2781 iwl_radio_kill_sw_disable_radio(priv);
2782
fee1247a 2783 if (!iwl_is_ready(priv)) {
b481de9c 2784 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2785 ret = -EIO;
2786 goto out;
b481de9c
ZY
2787 }
2788
1ea87396 2789 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2790 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2791 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2792 mutex_unlock(&priv->mutex);
a0646470 2793 return 0;
b481de9c
ZY
2794 }
2795
82a66bbb
TW
2796 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2797 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2798 if (!is_channel_valid(ch_info)) {
b481de9c 2799 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2800 ret = -EINVAL;
2801 goto out;
b481de9c
ZY
2802 }
2803
05c914fe 2804 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76
AK
2805 !is_channel_ibss(ch_info)) {
2806 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2807 conf->channel->hw_value, conf->channel->band);
2808 ret = -EINVAL;
2809 goto out;
2810 }
2811
82a66bbb
TW
2812 spin_lock_irqsave(&priv->lock, flags);
2813
b5d7be5e 2814
78330fdd 2815 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2816 * from any ht related info since 2.4 does not
2817 * support ht */
82a66bbb 2818 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2819#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2820 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2821#endif
2822 )
2823 priv->staging_rxon.flags = 0;
b481de9c 2824
17e72782 2825 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2826
82a66bbb 2827 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2828
2829 /* The list of supported rates and rate mask can be different
8318d78a 2830 * for each band; since the band may have changed, reset
b481de9c 2831 * the rate mask to what mac80211 lists */
bb8c093b 2832 iwl4965_set_rate(priv);
b481de9c
ZY
2833
2834 spin_unlock_irqrestore(&priv->lock, flags);
2835
2836#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2837 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2838 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2839 goto out;
b481de9c
ZY
2840 }
2841#endif
2842
b481de9c
ZY
2843 if (!conf->radio_enabled) {
2844 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2845 goto out;
b481de9c
ZY
2846 }
2847
fee1247a 2848 if (iwl_is_rfkill(priv)) {
b481de9c 2849 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2850 ret = -EIO;
2851 goto out;
b481de9c
ZY
2852 }
2853
e602cb18
EK
2854 if (conf->flags & IEEE80211_CONF_PS)
2855 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2856 else
2857 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2858 if (ret)
2859 IWL_DEBUG_MAC80211("Error setting power level\n");
2860
630fe9b6
TW
2861 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2862 priv->tx_power_user_lmt, conf->power_level);
2863
2864 iwl_set_tx_power(priv, conf->power_level, false);
2865
bb8c093b 2866 iwl4965_set_rate(priv);
b481de9c
ZY
2867
2868 if (memcmp(&priv->active_rxon,
2869 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2870 iwl4965_commit_rxon(priv);
b481de9c
ZY
2871 else
2872 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2873
2874 IWL_DEBUG_MAC80211("leave\n");
2875
a0646470 2876out:
5a66926a 2877 mutex_unlock(&priv->mutex);
76bb77e0 2878 return ret;
b481de9c
ZY
2879}
2880
c79dd5b5 2881static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2882{
857485c0 2883 int ret = 0;
1ff50bda 2884 unsigned long flags;
b481de9c 2885
d986bcd1 2886 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2887 return;
2888
2889 /* The following should be done only at AP bring up */
5d1e2325 2890 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
2891
2892 /* RXON - unassoc (to set timing command) */
2893 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2894 iwl4965_commit_rxon(priv);
b481de9c
ZY
2895
2896 /* RXON Timing */
bb8c093b
CH
2897 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2898 iwl4965_setup_rxon_timing(priv);
857485c0 2899 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2900 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2901 if (ret)
b481de9c
ZY
2902 IWL_WARNING("REPLY_RXON_TIMING failed - "
2903 "Attempting to continue.\n");
2904
c7de35cd 2905 iwl_set_rxon_chain(priv);
b481de9c
ZY
2906
2907 /* FIXME: what should be the assoc_id for AP? */
2908 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2909 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2910 priv->staging_rxon.flags |=
2911 RXON_FLG_SHORT_PREAMBLE_MSK;
2912 else
2913 priv->staging_rxon.flags &=
2914 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2915
2916 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2917 if (priv->assoc_capability &
2918 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2919 priv->staging_rxon.flags |=
2920 RXON_FLG_SHORT_SLOT_MSK;
2921 else
2922 priv->staging_rxon.flags &=
2923 ~RXON_FLG_SHORT_SLOT_MSK;
2924
05c914fe 2925 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2926 priv->staging_rxon.flags &=
2927 ~RXON_FLG_SHORT_SLOT_MSK;
2928 }
2929 /* restore RXON assoc */
2930 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2931 iwl4965_commit_rxon(priv);
1ff50bda
EG
2932 spin_lock_irqsave(&priv->lock, flags);
2933 iwl_activate_qos(priv, 1);
2934 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2935 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2936 }
bb8c093b 2937 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2938
2939 /* FIXME - we need to add code here to detect a totally new
2940 * configuration, reset the AP, unassoc, rxon timing, assoc,
2941 * clear sta table, add BCAST sta... */
2942}
2943
9d139c81
JB
2944/* temporary */
2945static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
2946
32bfd35d
JB
2947static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2948 struct ieee80211_vif *vif,
b481de9c
ZY
2949 struct ieee80211_if_conf *conf)
2950{
c79dd5b5 2951 struct iwl_priv *priv = hw->priv;
0795af57 2952 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2953 unsigned long flags;
2954 int rc;
2955
2956 if (conf == NULL)
2957 return -EIO;
2958
b716bb91
EG
2959 if (priv->vif != vif) {
2960 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2961 return 0;
2962 }
2963
05c914fe 2964 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
2965 conf->changed & IEEE80211_IFCC_BEACON) {
2966 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2967 if (!beacon)
2968 return -ENOMEM;
2969 rc = iwl4965_mac_beacon_update(hw, beacon);
2970 if (rc)
2971 return rc;
2972 }
2973
05c914fe 2974 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
9d139c81 2975 (!conf->ssid_len)) {
b481de9c
ZY
2976 IWL_DEBUG_MAC80211
2977 ("Leaving in AP mode because HostAPD is not ready.\n");
2978 return 0;
2979 }
2980
fee1247a 2981 if (!iwl_is_alive(priv))
5a66926a
ZY
2982 return -EAGAIN;
2983
b481de9c
ZY
2984 mutex_lock(&priv->mutex);
2985
b481de9c 2986 if (conf->bssid)
0795af57
JP
2987 IWL_DEBUG_MAC80211("bssid: %s\n",
2988 print_mac(mac, conf->bssid));
b481de9c 2989
4150c572
JB
2990/*
2991 * very dubious code was here; the probe filtering flag is never set:
2992 *
b481de9c
ZY
2993 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2994 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2995 */
b481de9c 2996
05c914fe 2997 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
2998 if (!conf->bssid) {
2999 conf->bssid = priv->mac_addr;
3000 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
3001 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
3002 print_mac(mac, conf->bssid));
b481de9c
ZY
3003 }
3004 if (priv->ibss_beacon)
3005 dev_kfree_skb(priv->ibss_beacon);
3006
9d139c81 3007 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
3008 }
3009
fee1247a 3010 if (iwl_is_rfkill(priv))
fde3571f
MA
3011 goto done;
3012
b481de9c
ZY
3013 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3014 !is_multicast_ether_addr(conf->bssid)) {
3015 /* If there is currently a HW scan going on in the background
3016 * then we need to cancel it else the RXON below will fail. */
2a421b91 3017 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
3018 IWL_WARNING("Aborted scan still in progress "
3019 "after 100ms\n");
3020 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
3021 mutex_unlock(&priv->mutex);
3022 return -EAGAIN;
3023 }
3024 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
3025
3026 /* TODO: Audit driver for usage of these members and see
3027 * if mac80211 deprecates them (priv->bssid looks like it
3028 * shouldn't be there, but I haven't scanned the IBSS code
3029 * to verify) - jpk */
3030 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3031
05c914fe 3032 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 3033 iwl4965_config_ap(priv);
b481de9c 3034 else {
bb8c093b 3035 rc = iwl4965_commit_rxon(priv);
05c914fe 3036 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 3037 iwl_rxon_add_station(
b481de9c
ZY
3038 priv, priv->active_rxon.bssid_addr, 1);
3039 }
3040
3041 } else {
2a421b91 3042 iwl_scan_cancel_timeout(priv, 100);
b481de9c 3043 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3044 iwl4965_commit_rxon(priv);
b481de9c
ZY
3045 }
3046
fde3571f 3047 done:
b481de9c
ZY
3048 spin_lock_irqsave(&priv->lock, flags);
3049 if (!conf->ssid_len)
3050 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3051 else
3052 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3053
3054 priv->essid_len = conf->ssid_len;
3055 spin_unlock_irqrestore(&priv->lock, flags);
3056
3057 IWL_DEBUG_MAC80211("leave\n");
3058 mutex_unlock(&priv->mutex);
3059
3060 return 0;
3061}
3062
bb8c093b 3063static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3064 unsigned int changed_flags,
3065 unsigned int *total_flags,
3066 int mc_count, struct dev_addr_list *mc_list)
3067{
4419e39b 3068 struct iwl_priv *priv = hw->priv;
25b3f57c
RF
3069
3070 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
3071 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
05c914fe 3072 NL80211_IFTYPE_MONITOR,
25b3f57c
RF
3073 changed_flags, *total_flags);
3074 /* queue work 'cuz mac80211 is holding a lock which
3075 * prevents us from issuing (synchronous) f/w cmds */
3076 queue_work(priv->workqueue, &priv->set_monitor);
4419e39b 3077 }
25b3f57c
RF
3078 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
3079 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
3080}
3081
bb8c093b 3082static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3083 struct ieee80211_if_init_conf *conf)
3084{
c79dd5b5 3085 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3086
3087 IWL_DEBUG_MAC80211("enter\n");
3088
3089 mutex_lock(&priv->mutex);
948c171c 3090
fee1247a 3091 if (iwl_is_ready_rf(priv)) {
2a421b91 3092 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3093 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3094 iwl4965_commit_rxon(priv);
3095 }
32bfd35d
JB
3096 if (priv->vif == conf->vif) {
3097 priv->vif = NULL;
b481de9c
ZY
3098 memset(priv->bssid, 0, ETH_ALEN);
3099 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3100 priv->essid_len = 0;
3101 }
3102 mutex_unlock(&priv->mutex);
3103
3104 IWL_DEBUG_MAC80211("leave\n");
3105
3106}
471b3efd 3107
3109ece1 3108#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3109static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3110 struct ieee80211_vif *vif,
3111 struct ieee80211_bss_conf *bss_conf,
3112 u32 changes)
220173b0 3113{
c79dd5b5 3114 struct iwl_priv *priv = hw->priv;
220173b0 3115
3109ece1
TW
3116 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3117
471b3efd 3118 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3119 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3120 bss_conf->use_short_preamble);
471b3efd 3121 if (bss_conf->use_short_preamble)
220173b0
TW
3122 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3123 else
3124 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3125 }
3126
471b3efd 3127 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3128 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3129 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3130 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3131 else
3132 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3133 }
3134
98952d5d 3135 if (changes & BSS_CHANGED_HT) {
3109ece1 3136 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3137 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3138 iwl_set_rxon_chain(priv);
98952d5d
TW
3139 }
3140
471b3efd 3141 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3142 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3143 /* This should never happen as this function should
3144 * never be called from interrupt context. */
3145 if (WARN_ON_ONCE(in_interrupt()))
3146 return;
3109ece1
TW
3147 if (bss_conf->assoc) {
3148 priv->assoc_id = bss_conf->aid;
3149 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 3150 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
3151 priv->timestamp = bss_conf->timestamp;
3152 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW
3153
3154 /* we have just associated, don't start scan too early
3155 * leave time for EAPOL exchange to complete
3156 */
3109ece1
TW
3157 priv->next_scan_jiffies = jiffies +
3158 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3159 mutex_lock(&priv->mutex);
3160 iwl4965_post_associate(priv);
3161 mutex_unlock(&priv->mutex);
3109ece1
TW
3162 } else {
3163 priv->assoc_id = 0;
3164 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3165 }
3166 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3167 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3168 iwl_send_rxon_assoc(priv);
471b3efd
JB
3169 }
3170
220173b0 3171}
b481de9c 3172
cb43dc25 3173static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 3174{
b481de9c 3175 unsigned long flags;
c79dd5b5 3176 struct iwl_priv *priv = hw->priv;
8d09a5e1 3177 int ret;
b481de9c
ZY
3178
3179 IWL_DEBUG_MAC80211("enter\n");
3180
052c4b9f 3181 mutex_lock(&priv->mutex);
b481de9c
ZY
3182 spin_lock_irqsave(&priv->lock, flags);
3183
fee1247a 3184 if (!iwl_is_ready_rf(priv)) {
cb43dc25 3185 ret = -EIO;
b481de9c
ZY
3186 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3187 goto out_unlock;
3188 }
3189
05c914fe 3190 if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */
cb43dc25 3191 ret = -EIO;
b481de9c
ZY
3192 IWL_ERROR("ERROR: APs don't scan\n");
3193 goto out_unlock;
3194 }
3195
8d09a5e1
TW
3196 /* We don't schedule scan within next_scan_jiffies period.
3197 * Avoid scanning during possible EAPOL exchange, return
3198 * success immediately.
3199 */
7878a5a4 3200 if (priv->next_scan_jiffies &&
cb43dc25 3201 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 3202 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW
3203 queue_work(priv->workqueue, &priv->scan_completed);
3204 ret = 0;
7878a5a4
MA
3205 goto out_unlock;
3206 }
8d09a5e1 3207
b481de9c 3208 /* if we just finished scan ask for delay */
681c0050 3209 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 3210 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 3211 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW
3212 queue_work(priv->workqueue, &priv->scan_completed);
3213 ret = 0;
b481de9c
ZY
3214 goto out_unlock;
3215 }
8d09a5e1 3216
cb43dc25 3217 if (ssid_len) {
b481de9c 3218 priv->one_direct_scan = 1;
cb43dc25 3219 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 3220 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 3221 } else {
948c171c 3222 priv->one_direct_scan = 0;
cb43dc25 3223 }
b481de9c 3224
cb43dc25 3225 ret = iwl_scan_initiate(priv);
b481de9c
ZY
3226
3227 IWL_DEBUG_MAC80211("leave\n");
3228
3229out_unlock:
3230 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3231 mutex_unlock(&priv->mutex);
b481de9c 3232
cb43dc25 3233 return ret;
b481de9c
ZY
3234}
3235
ab885f8c
EG
3236static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3237 struct ieee80211_key_conf *keyconf, const u8 *addr,
3238 u32 iv32, u16 *phase1key)
3239{
3240 struct iwl_priv *priv = hw->priv;
3241 u8 sta_id = IWL_INVALID_STATION;
3242 unsigned long flags;
3243 __le16 key_flags = 0;
3244 int i;
3245 DECLARE_MAC_BUF(mac);
3246
3247 IWL_DEBUG_MAC80211("enter\n");
3248
947b13a7 3249 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
3250 if (sta_id == IWL_INVALID_STATION) {
3251 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3252 print_mac(mac, addr));
3253 return;
3254 }
3255
964d2777
JL
3256 if (iwl_scan_cancel(priv)) {
3257 /* cancel scan failed, just live w/ bad key and rely
3258 briefly on SW decryption */
3259 return;
3260 }
ab885f8c
EG
3261
3262 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3263 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3264 key_flags &= ~STA_KEY_FLG_INVALID;
3265
5425e490 3266 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3267 key_flags |= STA_KEY_MULTICAST_MSK;
3268
3269 spin_lock_irqsave(&priv->sta_lock, flags);
3270
ab885f8c
EG
3271 priv->stations[sta_id].sta.key.key_flags = key_flags;
3272 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3273
3274 for (i = 0; i < 5; i++)
3275 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3276 cpu_to_le16(phase1key[i]);
3277
3278 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3279 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3280
133636de 3281 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3282
3283 spin_unlock_irqrestore(&priv->sta_lock, flags);
3284
3285 IWL_DEBUG_MAC80211("leave\n");
3286}
3287
bb8c093b 3288static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3289 const u8 *local_addr, const u8 *addr,
3290 struct ieee80211_key_conf *key)
3291{
c79dd5b5 3292 struct iwl_priv *priv = hw->priv;
0795af57 3293 DECLARE_MAC_BUF(mac);
deb09c43
EG
3294 int ret = 0;
3295 u8 sta_id = IWL_INVALID_STATION;
6974e363 3296 u8 is_default_wep_key = 0;
b481de9c
ZY
3297
3298 IWL_DEBUG_MAC80211("enter\n");
3299
099b40b7 3300 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3301 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3302 return -EOPNOTSUPP;
3303 }
3304
3305 if (is_zero_ether_addr(addr))
3306 /* only support pairwise keys */
3307 return -EOPNOTSUPP;
3308
947b13a7 3309 sta_id = iwl_find_station(priv, addr);
6974e363
EG
3310 if (sta_id == IWL_INVALID_STATION) {
3311 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3312 print_mac(mac, addr));
3313 return -EINVAL;
b481de9c 3314
deb09c43 3315 }
b481de9c 3316
6974e363 3317 mutex_lock(&priv->mutex);
2a421b91 3318 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3319 mutex_unlock(&priv->mutex);
3320
3321 /* If we are getting WEP group key and we didn't receive any key mapping
3322 * so far, we are in legacy wep mode (group key only), otherwise we are
3323 * in 1X mode.
3324 * In legacy wep mode, we use another host command to the uCode */
5425e490 3325 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3326 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG
3327 if (cmd == SET_KEY)
3328 is_default_wep_key = !priv->key_mapping_key;
3329 else
ccc038ab
EG
3330 is_default_wep_key =
3331 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3332 }
052c4b9f 3333
b481de9c 3334 switch (cmd) {
deb09c43 3335 case SET_KEY:
6974e363
EG
3336 if (is_default_wep_key)
3337 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3338 else
7480513f 3339 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3340
3341 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3342 break;
3343 case DISABLE_KEY:
6974e363
EG
3344 if (is_default_wep_key)
3345 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3346 else
3ec47732 3347 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3348
3349 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3350 break;
3351 default:
deb09c43 3352 ret = -EINVAL;
b481de9c
ZY
3353 }
3354
3355 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3356
deb09c43 3357 return ret;
b481de9c
ZY
3358}
3359
e100bb64 3360static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3361 const struct ieee80211_tx_queue_params *params)
3362{
c79dd5b5 3363 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3364 unsigned long flags;
3365 int q;
b481de9c
ZY
3366
3367 IWL_DEBUG_MAC80211("enter\n");
3368
fee1247a 3369 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3370 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3371 return -EIO;
3372 }
3373
3374 if (queue >= AC_NUM) {
3375 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3376 return 0;
3377 }
3378
b481de9c
ZY
3379 if (!priv->qos_data.qos_enable) {
3380 priv->qos_data.qos_active = 0;
3381 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3382 return 0;
3383 }
3384 q = AC_NUM - 1 - queue;
3385
3386 spin_lock_irqsave(&priv->lock, flags);
3387
3388 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3389 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3390 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3391 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3392 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3393
3394 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3395 priv->qos_data.qos_active = 1;
3396
05c914fe 3397 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3398 iwl_activate_qos(priv, 1);
3109ece1 3399 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3400 iwl_activate_qos(priv, 0);
b481de9c 3401
1ff50bda 3402 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3403
b481de9c
ZY
3404 IWL_DEBUG_MAC80211("leave\n");
3405 return 0;
3406}
3407
d783b061
TW
3408static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3409 enum ieee80211_ampdu_mlme_action action,
17741cdc 3410 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW
3411{
3412 struct iwl_priv *priv = hw->priv;
3413 DECLARE_MAC_BUF(mac);
3414
3415 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
17741cdc 3416 print_mac(mac, sta->addr), tid);
d783b061
TW
3417
3418 if (!(priv->cfg->sku & IWL_SKU_N))
3419 return -EACCES;
3420
3421 switch (action) {
3422 case IEEE80211_AMPDU_RX_START:
3423 IWL_DEBUG_HT("start Rx\n");
17741cdc 3424 return iwl_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW
3425 case IEEE80211_AMPDU_RX_STOP:
3426 IWL_DEBUG_HT("stop Rx\n");
17741cdc 3427 return iwl_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3428 case IEEE80211_AMPDU_TX_START:
3429 IWL_DEBUG_HT("start Tx\n");
17741cdc 3430 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW
3431 case IEEE80211_AMPDU_TX_STOP:
3432 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3433 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3434 default:
3435 IWL_DEBUG_HT("unknown\n");
3436 return -EINVAL;
3437 break;
3438 }
3439 return 0;
3440}
bb8c093b 3441static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3442 struct ieee80211_tx_queue_stats *stats)
3443{
c79dd5b5 3444 struct iwl_priv *priv = hw->priv;
b481de9c 3445 int i, avail;
16466903 3446 struct iwl_tx_queue *txq;
443cfd45 3447 struct iwl_queue *q;
b481de9c
ZY
3448 unsigned long flags;
3449
3450 IWL_DEBUG_MAC80211("enter\n");
3451
fee1247a 3452 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3453 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3454 return -EIO;
3455 }
3456
3457 spin_lock_irqsave(&priv->lock, flags);
3458
3459 for (i = 0; i < AC_NUM; i++) {
3460 txq = &priv->txq[i];
3461 q = &txq->q;
443cfd45 3462 avail = iwl_queue_space(q);
b481de9c 3463
57ffc589
JB
3464 stats[i].len = q->n_window - avail;
3465 stats[i].limit = q->n_window - q->high_mark;
3466 stats[i].count = q->n_window;
b481de9c
ZY
3467
3468 }
3469 spin_unlock_irqrestore(&priv->lock, flags);
3470
3471 IWL_DEBUG_MAC80211("leave\n");
3472
3473 return 0;
3474}
3475
bb8c093b 3476static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3477 struct ieee80211_low_level_stats *stats)
3478{
bf403db8
EK
3479 struct iwl_priv *priv = hw->priv;
3480
3481 priv = hw->priv;
b481de9c
ZY
3482 IWL_DEBUG_MAC80211("enter\n");
3483 IWL_DEBUG_MAC80211("leave\n");
3484
3485 return 0;
3486}
3487
bb8c093b 3488static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3489{
c79dd5b5 3490 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3491 unsigned long flags;
3492
3493 mutex_lock(&priv->mutex);
3494 IWL_DEBUG_MAC80211("enter\n");
3495
b481de9c 3496 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3497 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3498 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3499
c7de35cd 3500 iwl_reset_qos(priv);
b481de9c 3501
b481de9c
ZY
3502 spin_lock_irqsave(&priv->lock, flags);
3503 priv->assoc_id = 0;
3504 priv->assoc_capability = 0;
b481de9c
ZY
3505 priv->assoc_station_added = 0;
3506
3507 /* new association get rid of ibss beacon skb */
3508 if (priv->ibss_beacon)
3509 dev_kfree_skb(priv->ibss_beacon);
3510
3511 priv->ibss_beacon = NULL;
3512
3513 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3514 priv->timestamp = 0;
05c914fe 3515 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
3516 priv->beacon_int = 0;
3517
3518 spin_unlock_irqrestore(&priv->lock, flags);
3519
fee1247a 3520 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3521 IWL_DEBUG_MAC80211("leave - not ready\n");
3522 mutex_unlock(&priv->mutex);
3523 return;
3524 }
3525
052c4b9f 3526 /* we are restarting association process
3527 * clear RXON_FILTER_ASSOC_MSK bit
3528 */
05c914fe 3529 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3530 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3531 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3532 iwl4965_commit_rxon(priv);
052c4b9f 3533 }
3534
5da4b55f
MA
3535 iwl_power_update_mode(priv, 0);
3536
b481de9c 3537 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3538 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3539
c90a74ba
EG
3540 /* switch to CAM during association period.
3541 * the ucode will block any association/authentication
3542 * frome during assiciation period if it can not hear
3543 * the AP because of PM. the timer enable PM back is
3544 * association do not complete
3545 */
3546 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3547 IEEE80211_CHAN_RADAR))
3548 iwl_power_disable_management(priv, 3000);
3549
b481de9c
ZY
3550 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3551 mutex_unlock(&priv->mutex);
3552 return;
3553 }
3554
bb8c093b 3555 iwl4965_set_rate(priv);
b481de9c
ZY
3556
3557 mutex_unlock(&priv->mutex);
3558
3559 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3560}
3561
e039fa4a 3562static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3563{
c79dd5b5 3564 struct iwl_priv *priv = hw->priv;
b481de9c 3565 unsigned long flags;
2ff75b78 3566 __le64 timestamp;
b481de9c
ZY
3567
3568 mutex_lock(&priv->mutex);
3569 IWL_DEBUG_MAC80211("enter\n");
3570
fee1247a 3571 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3572 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3573 mutex_unlock(&priv->mutex);
3574 return -EIO;
3575 }
3576
05c914fe 3577 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c
ZY
3578 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3579 mutex_unlock(&priv->mutex);
3580 return -EIO;
3581 }
3582
3583 spin_lock_irqsave(&priv->lock, flags);
3584
3585 if (priv->ibss_beacon)
3586 dev_kfree_skb(priv->ibss_beacon);
3587
3588 priv->ibss_beacon = skb;
3589
3590 priv->assoc_id = 0;
2ff75b78 3591 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3592 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY
3593
3594 IWL_DEBUG_MAC80211("leave\n");
3595 spin_unlock_irqrestore(&priv->lock, flags);
3596
c7de35cd 3597 iwl_reset_qos(priv);
b481de9c 3598
c46fbefa 3599 iwl4965_post_associate(priv);
b481de9c
ZY
3600
3601 mutex_unlock(&priv->mutex);
3602
3603 return 0;
3604}
3605
b481de9c
ZY
3606/*****************************************************************************
3607 *
3608 * sysfs attributes
3609 *
3610 *****************************************************************************/
3611
0a6857e7 3612#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3613
3614/*
3615 * The following adds a new attribute to the sysfs representation
3616 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3617 * used for controlling the debug level.
3618 *
3619 * See the level definitions in iwl for details.
3620 */
3621
8cf769c6
EK
3622static ssize_t show_debug_level(struct device *d,
3623 struct device_attribute *attr, char *buf)
b481de9c 3624{
8cf769c6
EK
3625 struct iwl_priv *priv = d->driver_data;
3626
3627 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3628}
8cf769c6
EK
3629static ssize_t store_debug_level(struct device *d,
3630 struct device_attribute *attr,
b481de9c
ZY
3631 const char *buf, size_t count)
3632{
8cf769c6 3633 struct iwl_priv *priv = d->driver_data;
9257746f
TW
3634 unsigned long val;
3635 int ret;
b481de9c 3636
9257746f
TW
3637 ret = strict_strtoul(buf, 0, &val);
3638 if (ret)
b481de9c
ZY
3639 printk(KERN_INFO DRV_NAME
3640 ": %s is not in hex or decimal form.\n", buf);
3641 else
8cf769c6 3642 priv->debug_level = val;
b481de9c
ZY
3643
3644 return strnlen(buf, count);
3645}
3646
8cf769c6
EK
3647static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3648 show_debug_level, store_debug_level);
3649
b481de9c 3650
0a6857e7 3651#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3652
b481de9c 3653
bc6f59bc
TW
3654static ssize_t show_version(struct device *d,
3655 struct device_attribute *attr, char *buf)
3656{
3657 struct iwl_priv *priv = d->driver_data;
885ba202 3658 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3659 ssize_t pos = 0;
3660 u16 eeprom_ver;
bc6f59bc
TW
3661
3662 if (palive->is_valid)
f236a265
TW
3663 pos += sprintf(buf + pos,
3664 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3665 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3666 palive->ucode_major, palive->ucode_minor,
3667 palive->sw_rev[0], palive->sw_rev[1],
3668 palive->ver_type, palive->ver_subtype);
bc6f59bc 3669 else
f236a265
TW
3670 pos += sprintf(buf + pos, "fw not loaded\n");
3671
3672 if (priv->eeprom) {
3673 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3674 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3675 eeprom_ver);
3676 } else {
3677 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3678 }
3679
3680 return pos;
bc6f59bc
TW
3681}
3682
3683static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3684
b481de9c
ZY
3685static ssize_t show_temperature(struct device *d,
3686 struct device_attribute *attr, char *buf)
3687{
c79dd5b5 3688 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3689
fee1247a 3690 if (!iwl_is_alive(priv))
b481de9c
ZY
3691 return -EAGAIN;
3692
91dbc5bd 3693 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3694}
3695
3696static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3697
b481de9c
ZY
3698static ssize_t show_tx_power(struct device *d,
3699 struct device_attribute *attr, char *buf)
3700{
c79dd5b5 3701 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3702 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3703}
3704
3705static ssize_t store_tx_power(struct device *d,
3706 struct device_attribute *attr,
3707 const char *buf, size_t count)
3708{
c79dd5b5 3709 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3710 unsigned long val;
3711 int ret;
b481de9c 3712
9257746f
TW
3713 ret = strict_strtoul(buf, 10, &val);
3714 if (ret)
b481de9c
ZY
3715 printk(KERN_INFO DRV_NAME
3716 ": %s is not in decimal form.\n", buf);
3717 else
630fe9b6 3718 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3719
3720 return count;
3721}
3722
3723static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3724
3725static ssize_t show_flags(struct device *d,
3726 struct device_attribute *attr, char *buf)
3727{
c79dd5b5 3728 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3729
3730 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3731}
3732
3733static ssize_t store_flags(struct device *d,
3734 struct device_attribute *attr,
3735 const char *buf, size_t count)
3736{
c79dd5b5 3737 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3738 unsigned long val;
3739 u32 flags;
3740 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3741 if (ret)
9257746f
TW
3742 return ret;
3743 flags = (u32)val;
b481de9c
ZY
3744
3745 mutex_lock(&priv->mutex);
3746 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3747 /* Cancel any currently running scans... */
2a421b91 3748 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3749 IWL_WARNING("Could not cancel scan.\n");
3750 else {
9257746f 3751 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3752 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3753 iwl4965_commit_rxon(priv);
b481de9c
ZY
3754 }
3755 }
3756 mutex_unlock(&priv->mutex);
3757
3758 return count;
3759}
3760
3761static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3762
3763static ssize_t show_filter_flags(struct device *d,
3764 struct device_attribute *attr, char *buf)
3765{
c79dd5b5 3766 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3767
3768 return sprintf(buf, "0x%04X\n",
3769 le32_to_cpu(priv->active_rxon.filter_flags));
3770}
3771
3772static ssize_t store_filter_flags(struct device *d,
3773 struct device_attribute *attr,
3774 const char *buf, size_t count)
3775{
c79dd5b5 3776 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3777 unsigned long val;
3778 u32 filter_flags;
3779 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3780 if (ret)
9257746f
TW
3781 return ret;
3782 filter_flags = (u32)val;
b481de9c
ZY
3783
3784 mutex_lock(&priv->mutex);
3785 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3786 /* Cancel any currently running scans... */
2a421b91 3787 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3788 IWL_WARNING("Could not cancel scan.\n");
3789 else {
3790 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3791 "0x%04X\n", filter_flags);
3792 priv->staging_rxon.filter_flags =
3793 cpu_to_le32(filter_flags);
bb8c093b 3794 iwl4965_commit_rxon(priv);
b481de9c
ZY
3795 }
3796 }
3797 mutex_unlock(&priv->mutex);
3798
3799 return count;
3800}
3801
3802static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3803 store_filter_flags);
3804
4fc22b21 3805#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
3806
3807static ssize_t show_measurement(struct device *d,
3808 struct device_attribute *attr, char *buf)
3809{
c79dd5b5 3810 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3811 struct iwl4965_spectrum_notification measure_report;
b481de9c 3812 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3813 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3814 unsigned long flags;
3815
3816 spin_lock_irqsave(&priv->lock, flags);
3817 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3818 spin_unlock_irqrestore(&priv->lock, flags);
3819 return 0;
3820 }
3821 memcpy(&measure_report, &priv->measure_report, size);
3822 priv->measurement_status = 0;
3823 spin_unlock_irqrestore(&priv->lock, flags);
3824
3825 while (size && (PAGE_SIZE - len)) {
3826 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3827 PAGE_SIZE - len, 1);
3828 len = strlen(buf);
3829 if (PAGE_SIZE - len)
3830 buf[len++] = '\n';
3831
3832 ofs += 16;
3833 size -= min(size, 16U);
3834 }
3835
3836 return len;
3837}
3838
3839static ssize_t store_measurement(struct device *d,
3840 struct device_attribute *attr,
3841 const char *buf, size_t count)
3842{
c79dd5b5 3843 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3844 struct ieee80211_measurement_params params = {
3845 .channel = le16_to_cpu(priv->active_rxon.channel),
3846 .start_time = cpu_to_le64(priv->last_tsf),
3847 .duration = cpu_to_le16(1),
3848 };
3849 u8 type = IWL_MEASURE_BASIC;
3850 u8 buffer[32];
3851 u8 channel;
3852
3853 if (count) {
3854 char *p = buffer;
3855 strncpy(buffer, buf, min(sizeof(buffer), count));
3856 channel = simple_strtoul(p, NULL, 0);
3857 if (channel)
3858 params.channel = channel;
3859
3860 p = buffer;
3861 while (*p && *p != ' ')
3862 p++;
3863 if (*p)
3864 type = simple_strtoul(p + 1, NULL, 0);
3865 }
3866
3867 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3868 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3869 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3870
3871 return count;
3872}
3873
3874static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3875 show_measurement, store_measurement);
4fc22b21 3876#endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3877
3878static ssize_t store_retry_rate(struct device *d,
3879 struct device_attribute *attr,
3880 const char *buf, size_t count)
3881{
c79dd5b5 3882 struct iwl_priv *priv = dev_get_drvdata(d);
9257746f
TW
3883 long val;
3884 int ret = strict_strtol(buf, 10, &val);
3885 if (!ret)
3886 return ret;
b481de9c 3887
9257746f 3888 priv->retry_rate = (val > 0) ? val : 1;
b481de9c
ZY
3889
3890 return count;
3891}
3892
3893static ssize_t show_retry_rate(struct device *d,
3894 struct device_attribute *attr, char *buf)
3895{
c79dd5b5 3896 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3897 return sprintf(buf, "%d", priv->retry_rate);
3898}
3899
3900static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3901 store_retry_rate);
3902
3903static ssize_t store_power_level(struct device *d,
3904 struct device_attribute *attr,
3905 const char *buf, size_t count)
3906{
c79dd5b5 3907 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3908 int ret;
9257746f
TW
3909 unsigned long mode;
3910
b481de9c 3911
b481de9c
ZY
3912 mutex_lock(&priv->mutex);
3913
fee1247a 3914 if (!iwl_is_ready(priv)) {
298df1f6 3915 ret = -EAGAIN;
b481de9c
ZY
3916 goto out;
3917 }
3918
9257746f 3919 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3920 if (ret)
9257746f
TW
3921 goto out;
3922
298df1f6
EK
3923 ret = iwl_power_set_user_mode(priv, mode);
3924 if (ret) {
5da4b55f
MA
3925 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3926 goto out;
b481de9c 3927 }
298df1f6 3928 ret = count;
b481de9c
ZY
3929
3930 out:
3931 mutex_unlock(&priv->mutex);
298df1f6 3932 return ret;
b481de9c
ZY
3933}
3934
b481de9c
ZY
3935static ssize_t show_power_level(struct device *d,
3936 struct device_attribute *attr, char *buf)
3937{
c79dd5b5 3938 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3939 int mode = priv->power_data.user_power_setting;
3940 int system = priv->power_data.system_power_setting;
5da4b55f 3941 int level = priv->power_data.power_mode;
b481de9c
ZY
3942 char *p = buf;
3943
298df1f6
EK
3944 switch (system) {
3945 case IWL_POWER_SYS_AUTO:
3946 p += sprintf(p, "SYSTEM:auto");
b481de9c 3947 break;
298df1f6
EK
3948 case IWL_POWER_SYS_AC:
3949 p += sprintf(p, "SYSTEM:ac");
3950 break;
3951 case IWL_POWER_SYS_BATTERY:
3952 p += sprintf(p, "SYSTEM:battery");
b481de9c 3953 break;
b481de9c 3954 }
298df1f6
EK
3955
3956 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto");
3957 p += sprintf(p, "\tINDEX:%d", level);
3958 p += sprintf(p, "\n");
3ac7f146 3959 return p - buf + 1;
b481de9c
ZY
3960}
3961
3962static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3963 store_power_level);
3964
3965static ssize_t show_channels(struct device *d,
3966 struct device_attribute *attr, char *buf)
3967{
5d72a1f5
EK
3968
3969 struct iwl_priv *priv = dev_get_drvdata(d);
3970 struct ieee80211_channel *channels = NULL;
3971 const struct ieee80211_supported_band *supp_band = NULL;
3972 int len = 0, i;
3973 int count = 0;
3974
3975 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3976 return -EAGAIN;
3977
3978 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3979 channels = supp_band->channels;
3980 count = supp_band->n_channels;
3981
3982 len += sprintf(&buf[len],
3983 "Displaying %d channels in 2.4GHz band "
3984 "(802.11bg):\n", count);
3985
3986 for (i = 0; i < count; i++)
3987 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3988 ieee80211_frequency_to_channel(
3989 channels[i].center_freq),
3990 channels[i].max_power,
3991 channels[i].flags & IEEE80211_CHAN_RADAR ?
3992 " (IEEE 802.11h required)" : "",
3993 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3994 || (channels[i].flags &
3995 IEEE80211_CHAN_RADAR)) ? "" :
3996 ", IBSS",
3997 channels[i].flags &
3998 IEEE80211_CHAN_PASSIVE_SCAN ?
3999 "passive only" : "active/passive");
4000
4001 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
4002 channels = supp_band->channels;
4003 count = supp_band->n_channels;
4004
4005 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
4006 "(802.11a):\n", count);
4007
4008 for (i = 0; i < count; i++)
4009 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
4010 ieee80211_frequency_to_channel(
4011 channels[i].center_freq),
4012 channels[i].max_power,
4013 channels[i].flags & IEEE80211_CHAN_RADAR ?
4014 " (IEEE 802.11h required)" : "",
4015 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
4016 || (channels[i].flags &
4017 IEEE80211_CHAN_RADAR)) ? "" :
4018 ", IBSS",
4019 channels[i].flags &
4020 IEEE80211_CHAN_PASSIVE_SCAN ?
4021 "passive only" : "active/passive");
4022
4023 return len;
b481de9c
ZY
4024}
4025
4026static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4027
4028static ssize_t show_statistics(struct device *d,
4029 struct device_attribute *attr, char *buf)
4030{
c79dd5b5 4031 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 4032 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 4033 u32 len = 0, ofs = 0;
3ac7f146 4034 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
4035 int rc = 0;
4036
fee1247a 4037 if (!iwl_is_alive(priv))
b481de9c
ZY
4038 return -EAGAIN;
4039
4040 mutex_lock(&priv->mutex);
49ea8596 4041 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4042 mutex_unlock(&priv->mutex);
4043
4044 if (rc) {
4045 len = sprintf(buf,
4046 "Error sending statistics request: 0x%08X\n", rc);
4047 return len;
4048 }
4049
4050 while (size && (PAGE_SIZE - len)) {
4051 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4052 PAGE_SIZE - len, 1);
4053 len = strlen(buf);
4054 if (PAGE_SIZE - len)
4055 buf[len++] = '\n';
4056
4057 ofs += 16;
4058 size -= min(size, 16U);
4059 }
4060
4061 return len;
4062}
4063
4064static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4065
b481de9c
ZY
4066static ssize_t show_status(struct device *d,
4067 struct device_attribute *attr, char *buf)
4068{
c79dd5b5 4069 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4070 if (!iwl_is_alive(priv))
b481de9c
ZY
4071 return -EAGAIN;
4072 return sprintf(buf, "0x%08x\n", (int)priv->status);
4073}
4074
4075static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4076
b481de9c
ZY
4077/*****************************************************************************
4078 *
4079 * driver setup and teardown
4080 *
4081 *****************************************************************************/
4082
4e39317d 4083static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4084{
4085 priv->workqueue = create_workqueue(DRV_NAME);
4086
4087 init_waitqueue_head(&priv->wait_command_queue);
4088
bb8c093b
CH
4089 INIT_WORK(&priv->up, iwl4965_bg_up);
4090 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4091 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4092 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4093 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4094 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4095 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
4096 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4097 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 4098
2a421b91 4099 iwl_setup_scan_deferred_work(priv);
c90a74ba 4100 iwl_setup_power_deferred_work(priv);
bb8c093b 4101
4e39317d
EG
4102 if (priv->cfg->ops->lib->setup_deferred_work)
4103 priv->cfg->ops->lib->setup_deferred_work(priv);
4104
4105 init_timer(&priv->statistics_periodic);
4106 priv->statistics_periodic.data = (unsigned long)priv;
4107 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4108
4109 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4110 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4111}
4112
4e39317d 4113static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4114{
4e39317d
EG
4115 if (priv->cfg->ops->lib->cancel_deferred_work)
4116 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4117
3ae6a054 4118 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 4119 cancel_delayed_work(&priv->scan_check);
c90a74ba 4120 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 4121 cancel_delayed_work(&priv->alive_start);
b481de9c 4122 cancel_work_sync(&priv->beacon_update);
4e39317d 4123 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4124}
4125
bb8c093b 4126static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4127 &dev_attr_channels.attr,
b481de9c
ZY
4128 &dev_attr_flags.attr,
4129 &dev_attr_filter_flags.attr,
4fc22b21 4130#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
4131 &dev_attr_measurement.attr,
4132#endif
4133 &dev_attr_power_level.attr,
4134 &dev_attr_retry_rate.attr,
b481de9c
ZY
4135 &dev_attr_statistics.attr,
4136 &dev_attr_status.attr,
4137 &dev_attr_temperature.attr,
b481de9c 4138 &dev_attr_tx_power.attr,
8cf769c6
EK
4139#ifdef CONFIG_IWLWIFI_DEBUG
4140 &dev_attr_debug_level.attr,
4141#endif
bc6f59bc 4142 &dev_attr_version.attr,
b481de9c
ZY
4143
4144 NULL
4145};
4146
bb8c093b 4147static struct attribute_group iwl4965_attribute_group = {
b481de9c 4148 .name = NULL, /* put in device directory */
bb8c093b 4149 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4150};
4151
bb8c093b
CH
4152static struct ieee80211_ops iwl4965_hw_ops = {
4153 .tx = iwl4965_mac_tx,
4154 .start = iwl4965_mac_start,
4155 .stop = iwl4965_mac_stop,
4156 .add_interface = iwl4965_mac_add_interface,
4157 .remove_interface = iwl4965_mac_remove_interface,
4158 .config = iwl4965_mac_config,
4159 .config_interface = iwl4965_mac_config_interface,
4160 .configure_filter = iwl4965_configure_filter,
4161 .set_key = iwl4965_mac_set_key,
ab885f8c 4162 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4163 .get_stats = iwl4965_mac_get_stats,
4164 .get_tx_stats = iwl4965_mac_get_tx_stats,
4165 .conf_tx = iwl4965_mac_conf_tx,
bb8c093b 4166 .reset_tsf = iwl4965_mac_reset_tsf,
471b3efd 4167 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4168 .ampdu_action = iwl4965_mac_ampdu_action,
cb43dc25 4169 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4170};
4171
bb8c093b 4172static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4173{
4174 int err = 0;
c79dd5b5 4175 struct iwl_priv *priv;
b481de9c 4176 struct ieee80211_hw *hw;
82b9a121 4177 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4178 unsigned long flags;
5a66926a 4179 DECLARE_MAC_BUF(mac);
b481de9c 4180
316c30d9
AK
4181 /************************
4182 * 1. Allocating HW data
4183 ************************/
4184
6440adb5
BC
4185 /* Disabling hardware scan means that mac80211 will perform scans
4186 * "the hard way", rather than using device's scan. */
1ea87396 4187 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4188 if (cfg->mod_params->debug & IWL_DL_INFO)
4189 dev_printk(KERN_DEBUG, &(pdev->dev),
4190 "Disabling hw_scan\n");
bb8c093b 4191 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4192 }
4193
1d0a082d
AK
4194 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4195 if (!hw) {
b481de9c
ZY
4196 err = -ENOMEM;
4197 goto out;
4198 }
1d0a082d
AK
4199 priv = hw->priv;
4200 /* At this point both hw and priv are allocated. */
4201
b481de9c
ZY
4202 SET_IEEE80211_DEV(hw, &pdev->dev);
4203
4204 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4205 priv->cfg = cfg;
b481de9c 4206 priv->pci_dev = pdev;
316c30d9 4207
0a6857e7 4208#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4209 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4210 atomic_set(&priv->restrict_refcnt, 0);
4211#endif
b481de9c 4212
316c30d9
AK
4213 /**************************
4214 * 2. Initializing PCI bus
4215 **************************/
4216 if (pci_enable_device(pdev)) {
4217 err = -ENODEV;
4218 goto out_ieee80211_free_hw;
4219 }
4220
4221 pci_set_master(pdev);
4222
093d874c 4223 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 4224 if (!err)
093d874c 4225 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 4226 if (err) {
093d874c 4227 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 4228 if (!err)
093d874c 4229 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 4230 /* both attempts failed: */
316c30d9 4231 if (err) {
cc2a8ea8
RR
4232 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4233 DRV_NAME);
316c30d9 4234 goto out_pci_disable_device;
cc2a8ea8 4235 }
316c30d9
AK
4236 }
4237
4238 err = pci_request_regions(pdev, DRV_NAME);
4239 if (err)
4240 goto out_pci_disable_device;
4241
4242 pci_set_drvdata(pdev, priv);
4243
316c30d9
AK
4244
4245 /***********************
4246 * 3. Read REV register
4247 ***********************/
4248 priv->hw_base = pci_iomap(pdev, 0, 0);
4249 if (!priv->hw_base) {
4250 err = -ENODEV;
4251 goto out_pci_release_regions;
4252 }
4253
4254 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4255 (unsigned long long) pci_resource_len(pdev, 0));
4256 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4257
b661c819 4258 iwl_hw_detect(priv);
316c30d9 4259 printk(KERN_INFO DRV_NAME
b661c819
TW
4260 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4261 priv->cfg->name, priv->hw_rev);
316c30d9 4262
e7b63581
TW
4263 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4264 * PCI Tx retries from interfering with C3 CPU state */
4265 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4266
91238714
TW
4267 /* amp init */
4268 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4269 if (err < 0) {
91238714 4270 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4271 goto out_iounmap;
4272 }
91238714
TW
4273 /*****************
4274 * 4. Read EEPROM
4275 *****************/
316c30d9
AK
4276 /* Read the EEPROM */
4277 err = iwl_eeprom_init(priv);
4278 if (err) {
4279 IWL_ERROR("Unable to init EEPROM\n");
4280 goto out_iounmap;
4281 }
8614f360
TW
4282 err = iwl_eeprom_check_version(priv);
4283 if (err)
4284 goto out_iounmap;
4285
02883017 4286 /* extract MAC Address */
316c30d9
AK
4287 iwl_eeprom_get_mac(priv, priv->mac_addr);
4288 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
4289 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4290
4291 /************************
4292 * 5. Setup HW constants
4293 ************************/
da154e30 4294 if (iwl_set_hw_params(priv)) {
5425e490 4295 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4296 goto out_free_eeprom;
316c30d9
AK
4297 }
4298
4299 /*******************
6ba87956 4300 * 6. Setup priv
316c30d9 4301 *******************/
b481de9c 4302
6ba87956 4303 err = iwl_init_drv(priv);
bf85ea4f 4304 if (err)
399f4900 4305 goto out_free_eeprom;
bf85ea4f 4306 /* At this point both hw and priv are initialized. */
316c30d9
AK
4307
4308 /**********************************
4309 * 7. Initialize module parameters
4310 **********************************/
4311
4312 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4313 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4314 set_bit(STATUS_RF_KILL_SW, &priv->status);
4315 IWL_DEBUG_INFO("Radio disabled.\n");
4316 }
4317
316c30d9
AK
4318 /********************
4319 * 8. Setup services
4320 ********************/
0359facc 4321 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4322 iwl4965_disable_interrupts(priv);
0359facc 4323 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4324
4325 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4326 if (err) {
4327 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4328 goto out_uninit_drv;
316c30d9
AK
4329 }
4330
316c30d9 4331
4e39317d 4332 iwl_setup_deferred_work(priv);
653fa4a0 4333 iwl_setup_rx_handlers(priv);
316c30d9
AK
4334
4335 /********************
4336 * 9. Conclude
4337 ********************/
5a66926a
ZY
4338 pci_save_state(pdev);
4339 pci_disable_device(pdev);
b481de9c 4340
6ba87956
TW
4341 /**********************************
4342 * 10. Setup and register mac80211
4343 **********************************/
4344
4345 err = iwl_setup_mac(priv);
4346 if (err)
4347 goto out_remove_sysfs;
4348
4349 err = iwl_dbgfs_register(priv, DRV_NAME);
4350 if (err)
4351 IWL_ERROR("failed to create debugfs files\n");
4352
58d0f361
EG
4353 err = iwl_rfkill_init(priv);
4354 if (err)
4355 IWL_ERROR("Unable to initialize RFKILL system. "
4356 "Ignoring error: %d\n", err);
4357 iwl_power_initialize(priv);
b481de9c
ZY
4358 return 0;
4359
316c30d9
AK
4360 out_remove_sysfs:
4361 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4362 out_uninit_drv:
4363 iwl_uninit_drv(priv);
073d3f5f
TW
4364 out_free_eeprom:
4365 iwl_eeprom_free(priv);
b481de9c
ZY
4366 out_iounmap:
4367 pci_iounmap(pdev, priv->hw_base);
4368 out_pci_release_regions:
4369 pci_release_regions(pdev);
316c30d9 4370 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4371 out_pci_disable_device:
4372 pci_disable_device(pdev);
b481de9c
ZY
4373 out_ieee80211_free_hw:
4374 ieee80211_free_hw(priv->hw);
4375 out:
4376 return err;
4377}
4378
c83dbf68 4379static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4380{
c79dd5b5 4381 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4382 unsigned long flags;
b481de9c
ZY
4383
4384 if (!priv)
4385 return;
4386
4387 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4388
67249625
EG
4389 iwl_dbgfs_unregister(priv);
4390 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4391
0b124c31
GG
4392 /* ieee80211_unregister_hw call wil cause iwl4965_mac_stop to
4393 * to be called and iwl4965_down since we are removing the device
4394 * we need to set STATUS_EXIT_PENDING bit.
4395 */
4396 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR
4397 if (priv->mac80211_registered) {
4398 ieee80211_unregister_hw(priv->hw);
4399 priv->mac80211_registered = 0;
0b124c31
GG
4400 } else {
4401 iwl4965_down(priv);
c4f55232
RR
4402 }
4403
0359facc
MA
4404 /* make sure we flush any pending irq or
4405 * tasklet for the driver
4406 */
4407 spin_lock_irqsave(&priv->lock, flags);
4408 iwl4965_disable_interrupts(priv);
4409 spin_unlock_irqrestore(&priv->lock, flags);
4410
4411 iwl_synchronize_irq(priv);
4412
58d0f361 4413 iwl_rfkill_unregister(priv);
bb8c093b 4414 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4415
4416 if (priv->rxq.bd)
a55360e4 4417 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4418 iwl_hw_txq_ctx_free(priv);
b481de9c 4419
37deb2a0 4420 iwl_clear_stations_table(priv);
073d3f5f 4421 iwl_eeprom_free(priv);
b481de9c 4422
b481de9c 4423
948c171c
MA
4424 /*netif_stop_queue(dev); */
4425 flush_workqueue(priv->workqueue);
4426
bb8c093b 4427 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4428 * priv->workqueue... so we can't take down the workqueue
4429 * until now... */
4430 destroy_workqueue(priv->workqueue);
4431 priv->workqueue = NULL;
4432
b481de9c
ZY
4433 pci_iounmap(pdev, priv->hw_base);
4434 pci_release_regions(pdev);
4435 pci_disable_device(pdev);
4436 pci_set_drvdata(pdev, NULL);
4437
6ba87956 4438 iwl_uninit_drv(priv);
b481de9c
ZY
4439
4440 if (priv->ibss_beacon)
4441 dev_kfree_skb(priv->ibss_beacon);
4442
4443 ieee80211_free_hw(priv->hw);
4444}
4445
4446#ifdef CONFIG_PM
4447
bb8c093b 4448static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4449{
c79dd5b5 4450 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4451
e655b9f0
ZY
4452 if (priv->is_open) {
4453 set_bit(STATUS_IN_SUSPEND, &priv->status);
4454 iwl4965_mac_stop(priv->hw);
4455 priv->is_open = 1;
4456 }
b481de9c 4457
b481de9c
ZY
4458 pci_set_power_state(pdev, PCI_D3hot);
4459
b481de9c
ZY
4460 return 0;
4461}
4462
bb8c093b 4463static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4464{
c79dd5b5 4465 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4466
b481de9c 4467 pci_set_power_state(pdev, PCI_D0);
b481de9c 4468
e655b9f0
ZY
4469 if (priv->is_open)
4470 iwl4965_mac_start(priv->hw);
b481de9c 4471
e655b9f0 4472 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4473 return 0;
4474}
4475
4476#endif /* CONFIG_PM */
4477
4478/*****************************************************************************
4479 *
4480 * driver and module entry point
4481 *
4482 *****************************************************************************/
4483
fed9017e
RR
4484/* Hardware specific file defines the PCI IDs table for that hardware module */
4485static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4486#ifdef CONFIG_IWL4965
fed9017e
RR
4487 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4488 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4489#endif /* CONFIG_IWL4965 */
5a6a256e 4490#ifdef CONFIG_IWL5000
47408639
EK
4491 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4492 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4493 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4494 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4495 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4496 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4497 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4498 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4499 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4500 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW
4501/* 5350 WiFi/WiMax */
4502 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4503 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4504 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
5a6a256e 4505#endif /* CONFIG_IWL5000 */
fed9017e
RR
4506 {0}
4507};
4508MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4509
4510static struct pci_driver iwl_driver = {
b481de9c 4511 .name = DRV_NAME,
fed9017e 4512 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4513 .probe = iwl4965_pci_probe,
4514 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4515#ifdef CONFIG_PM
bb8c093b
CH
4516 .suspend = iwl4965_pci_suspend,
4517 .resume = iwl4965_pci_resume,
b481de9c
ZY
4518#endif
4519};
4520
bb8c093b 4521static int __init iwl4965_init(void)
b481de9c
ZY
4522{
4523
4524 int ret;
4525 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4526 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4527
e227ceac 4528 ret = iwlagn_rate_control_register();
897e1cf2
RC
4529 if (ret) {
4530 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4531 return ret;
4532 }
4533
fed9017e 4534 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4535 if (ret) {
4536 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4537 goto error_register;
b481de9c 4538 }
b481de9c
ZY
4539
4540 return ret;
897e1cf2 4541
897e1cf2 4542error_register:
e227ceac 4543 iwlagn_rate_control_unregister();
897e1cf2 4544 return ret;
b481de9c
ZY
4545}
4546
bb8c093b 4547static void __exit iwl4965_exit(void)
b481de9c 4548{
fed9017e 4549 pci_unregister_driver(&iwl_driver);
e227ceac 4550 iwlagn_rate_control_unregister();
b481de9c
ZY
4551}
4552
bb8c093b
CH
4553module_exit(iwl4965_exit);
4554module_init(iwl4965_init);