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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
901069c7 | 8 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
b481de9c ZY |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
01ebd063 | 11 | * it under the terms of version 2 of the GNU General Public License as |
b481de9c ZY |
12 | * published by the Free Software Foundation. |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called LICENSE.GPL. | |
26 | * | |
27 | * Contact Information: | |
759ef89f | 28 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
901069c7 | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
b481de9c ZY |
34 | * All rights reserved. |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
fcd427bb | 63 | /* |
5a36ba0e | 64 | * Please use this file (iwl-commands.h) only for uCode API definitions. |
767d055d | 65 | * Please use iwl-xxxx-hw.h for hardware-related definitions. |
3e0d4cb1 | 66 | * Please use iwl-dev.h for driver implementation definitions. |
fcd427bb | 67 | */ |
b481de9c | 68 | |
6a63578d EG |
69 | #ifndef __iwl_commands_h__ |
70 | #define __iwl_commands_h__ | |
b481de9c | 71 | |
1f7b6172 EG |
72 | #include <linux/etherdevice.h> |
73 | #include <linux/ieee80211.h> | |
74 | ||
a3139c59 SO |
75 | struct iwl_priv; |
76 | ||
c02b3acd CR |
77 | /* uCode version contains 4 values: Major/Minor/API/Serial */ |
78 | #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) | |
79 | #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) | |
80 | #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) | |
81 | #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) | |
82 | ||
4c897253 TW |
83 | |
84 | /* Tx rates */ | |
85 | #define IWL_CCK_RATES 4 | |
86 | #define IWL_OFDM_RATES 8 | |
87 | #define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES) | |
88 | ||
b481de9c ZY |
89 | enum { |
90 | REPLY_ALIVE = 0x1, | |
91 | REPLY_ERROR = 0x2, | |
92 | ||
93 | /* RXON and QOS commands */ | |
94 | REPLY_RXON = 0x10, | |
95 | REPLY_RXON_ASSOC = 0x11, | |
96 | REPLY_QOS_PARAM = 0x13, | |
97 | REPLY_RXON_TIMING = 0x14, | |
98 | ||
99 | /* Multi-Station support */ | |
100 | REPLY_ADD_STA = 0x18, | |
fc66be2a | 101 | REPLY_REMOVE_STA = 0x19, |
b481de9c | 102 | REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ |
947279ee | 103 | REPLY_TXFIFO_FLUSH = 0x1e, |
b481de9c | 104 | |
0a0bed1d EG |
105 | /* Security */ |
106 | REPLY_WEPKEY = 0x20, | |
107 | ||
b481de9c | 108 | /* RX, TX, LEDs */ |
b481de9c | 109 | REPLY_TX = 0x1c, |
b481de9c | 110 | REPLY_LEDS_CMD = 0x48, |
4c8d1913 | 111 | REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */ |
b481de9c | 112 | |
9636e583 | 113 | /* WiMAX coexistence */ |
d23000cd | 114 | COEX_PRIORITY_TABLE_CMD = 0x5a, /* for 5000 series and up */ |
9636e583 RR |
115 | COEX_MEDIUM_NOTIFICATION = 0x5b, |
116 | COEX_EVENT_CMD = 0x5c, | |
117 | ||
be5d56ed | 118 | /* Calibration */ |
1a5c3d61 | 119 | TEMPERATURE_NOTIFICATION = 0x62, |
be5d56ed TW |
120 | CALIBRATION_CFG_CMD = 0x65, |
121 | CALIBRATION_RES_NOTIFICATION = 0x66, | |
122 | CALIBRATION_COMPLETE_NOTIFICATION = 0x67, | |
123 | ||
b481de9c | 124 | /* 802.11h related */ |
b481de9c ZY |
125 | REPLY_QUIET_CMD = 0x71, /* not used */ |
126 | REPLY_CHANNEL_SWITCH = 0x72, | |
127 | CHANNEL_SWITCH_NOTIFICATION = 0x73, | |
128 | REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, | |
129 | SPECTRUM_MEASURE_NOTIFICATION = 0x75, | |
130 | ||
131 | /* Power Management */ | |
132 | POWER_TABLE_CMD = 0x77, | |
133 | PM_SLEEP_NOTIFICATION = 0x7A, | |
134 | PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, | |
135 | ||
136 | /* Scan commands and notifications */ | |
137 | REPLY_SCAN_CMD = 0x80, | |
138 | REPLY_SCAN_ABORT_CMD = 0x81, | |
139 | SCAN_START_NOTIFICATION = 0x82, | |
140 | SCAN_RESULTS_NOTIFICATION = 0x83, | |
141 | SCAN_COMPLETE_NOTIFICATION = 0x84, | |
142 | ||
143 | /* IBSS/AP commands */ | |
144 | BEACON_NOTIFICATION = 0x90, | |
145 | REPLY_TX_BEACON = 0x91, | |
146 | WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ | |
147 | ||
148 | /* Miscellaneous commands */ | |
76a2407a | 149 | REPLY_TX_POWER_DBM_CMD = 0x95, |
b481de9c ZY |
150 | QUIET_NOTIFICATION = 0x96, /* not used */ |
151 | REPLY_TX_PWR_TABLE_CMD = 0x97, | |
76a2407a | 152 | REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ |
2f748dec | 153 | TX_ANT_CONFIGURATION_CMD = 0x98, |
b481de9c ZY |
154 | MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ |
155 | ||
a96a27f9 | 156 | /* Bluetooth device coexistence config command */ |
b481de9c ZY |
157 | REPLY_BT_CONFIG = 0x9b, |
158 | ||
80cc0c38 | 159 | /* Statistics */ |
b481de9c ZY |
160 | REPLY_STATISTICS_CMD = 0x9c, |
161 | STATISTICS_NOTIFICATION = 0x9d, | |
162 | ||
163 | /* RF-KILL commands and notifications */ | |
164 | REPLY_CARD_STATE_CMD = 0xa0, | |
165 | CARD_STATE_NOTIFICATION = 0xa1, | |
166 | ||
167 | /* Missed beacons notification */ | |
168 | MISSED_BEACONS_NOTIFICATION = 0xa2, | |
169 | ||
b481de9c ZY |
170 | REPLY_CT_KILL_CONFIG_CMD = 0xa4, |
171 | SENSITIVITY_CMD = 0xa8, | |
172 | REPLY_PHY_CALIBRATION_CMD = 0xb0, | |
173 | REPLY_RX_PHY_CMD = 0xc0, | |
174 | REPLY_RX_MPDU_CMD = 0xc1, | |
857485c0 | 175 | REPLY_RX = 0xc3, |
b481de9c | 176 | REPLY_COMPRESSED_BA = 0xc5, |
0288d237 JB |
177 | |
178 | /* BT Coex */ | |
179 | REPLY_BT_COEX_PRIO_TABLE = 0xcc, | |
180 | REPLY_BT_COEX_PROT_ENV = 0xcd, | |
181 | REPLY_BT_COEX_PROFILE_NOTIF = 0xce, | |
182 | ||
946ba30d JB |
183 | /* PAN commands */ |
184 | REPLY_WIPAN_PARAMS = 0xb2, | |
185 | REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */ | |
186 | REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */ | |
187 | REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */ | |
188 | REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */ | |
189 | REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */ | |
190 | REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9, | |
191 | REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, | |
311dce71 | 192 | REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, |
946ba30d | 193 | |
c8ac61cf JB |
194 | REPLY_WOWLAN_PATTERNS = 0xe0, |
195 | REPLY_WOWLAN_WAKEUP_FILTER = 0xe1, | |
196 | REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2, | |
197 | REPLY_WOWLAN_TKIP_PARAMS = 0xe3, | |
198 | REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4, | |
199 | REPLY_WOWLAN_GET_STATUS = 0xe5, | |
200 | ||
b481de9c ZY |
201 | REPLY_MAX = 0xff |
202 | }; | |
203 | ||
204 | /****************************************************************************** | |
205 | * (0) | |
abceddb4 | 206 | * Commonly used structures and definitions: |
80cc0c38 | 207 | * Command header, rate_n_flags, txpower |
b481de9c ZY |
208 | * |
209 | *****************************************************************************/ | |
210 | ||
857485c0 | 211 | /* iwl_cmd_header flags value */ |
b481de9c ZY |
212 | #define IWL_CMD_FAILED_MSK 0x40 |
213 | ||
9734cb23 TW |
214 | #define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f) |
215 | #define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8) | |
216 | #define SEQ_TO_INDEX(s) ((s) & 0xff) | |
217 | #define INDEX_TO_SEQ(i) ((i) & 0xff) | |
51e9bf5d | 218 | #define SEQ_RX_FRAME cpu_to_le16(0x8000) |
9734cb23 | 219 | |
075416cd | 220 | /** |
857485c0 | 221 | * struct iwl_cmd_header |
075416cd BC |
222 | * |
223 | * This header format appears in the beginning of each command sent from the | |
224 | * driver, and each response/notification received from uCode. | |
225 | */ | |
857485c0 | 226 | struct iwl_cmd_header { |
075416cd | 227 | u8 cmd; /* Command ID: REPLY_RXON, etc. */ |
9734cb23 | 228 | u8 flags; /* 0:5 reserved, 6 abort, 7 internal */ |
075416cd | 229 | /* |
a96a27f9 | 230 | * The driver sets up the sequence number to values of its choosing. |
075416cd BC |
231 | * uCode does not use this value, but passes it back to the driver |
232 | * when sending the response to each driver-originated command, so | |
233 | * the driver can match the response to the command. Since the values | |
234 | * don't get used by uCode, the driver may set up an arbitrary format. | |
b481de9c | 235 | * |
075416cd BC |
236 | * There is one exception: uCode sets bit 15 when it originates |
237 | * the response/notification, i.e. when the response/notification | |
238 | * is not a direct response to a command sent by the driver. For | |
3240cab3 | 239 | * example, uCode issues REPLY_RX when it sends a received frame |
075416cd | 240 | * to the driver; it is not a direct response to any driver command. |
b481de9c | 241 | * |
075416cd BC |
242 | * The Linux driver uses the following format: |
243 | * | |
9734cb23 TW |
244 | * 0:7 tfd index - position within TX queue |
245 | * 8:12 TX queue id | |
4ce7cc2b | 246 | * 13:14 reserved |
9734cb23 | 247 | * 15 unsolicited RX or uCode-originated notification |
b481de9c ZY |
248 | */ |
249 | __le16 sequence; | |
250 | ||
075416cd | 251 | /* command or response/notification data follows immediately */ |
b481de9c | 252 | u8 data[0]; |
ba2d3587 | 253 | } __packed; |
b481de9c | 254 | |
3d24a9f7 | 255 | |
abceddb4 | 256 | /** |
5c5aa3f1 | 257 | * iwlagn rate_n_flags bit fields |
abceddb4 | 258 | * |
5c5aa3f1 | 259 | * rate_n_flags format is used in following iwlagn commands: |
857485c0 | 260 | * REPLY_RX (response only) |
5c5aa3f1 | 261 | * REPLY_RX_MPDU (response only) |
abceddb4 BC |
262 | * REPLY_TX (both command and response) |
263 | * REPLY_TX_LINK_QUALITY_CMD | |
264 | * | |
265 | * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"): | |
266 | * 2-0: 0) 6 Mbps | |
267 | * 1) 12 Mbps | |
268 | * 2) 18 Mbps | |
269 | * 3) 24 Mbps | |
270 | * 4) 36 Mbps | |
271 | * 5) 48 Mbps | |
272 | * 6) 54 Mbps | |
273 | * 7) 60 Mbps | |
274 | * | |
5c5aa3f1 | 275 | * 4-3: 0) Single stream (SISO) |
abceddb4 | 276 | * 1) Dual stream (MIMO) |
5c5aa3f1 | 277 | * 2) Triple stream (MIMO) |
abceddb4 | 278 | * |
7aafef1c | 279 | * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data |
abceddb4 BC |
280 | * |
281 | * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"): | |
282 | * 3-0: 0xD) 6 Mbps | |
283 | * 0xF) 9 Mbps | |
284 | * 0x5) 12 Mbps | |
285 | * 0x7) 18 Mbps | |
286 | * 0x9) 24 Mbps | |
287 | * 0xB) 36 Mbps | |
288 | * 0x1) 48 Mbps | |
289 | * 0x3) 54 Mbps | |
290 | * | |
291 | * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"): | |
10617879 | 292 | * 6-0: 10) 1 Mbps |
abceddb4 BC |
293 | * 20) 2 Mbps |
294 | * 55) 5.5 Mbps | |
295 | * 110) 11 Mbps | |
296 | */ | |
297 | #define RATE_MCS_CODE_MSK 0x7 | |
5c5aa3f1 HD |
298 | #define RATE_MCS_SPATIAL_POS 3 |
299 | #define RATE_MCS_SPATIAL_MSK 0x18 | |
abceddb4 BC |
300 | #define RATE_MCS_HT_DUP_POS 5 |
301 | #define RATE_MCS_HT_DUP_MSK 0x20 | |
2520546a DH |
302 | /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ |
303 | #define RATE_MCS_RATE_MSK 0xff | |
abceddb4 | 304 | |
075416cd | 305 | /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ |
abceddb4 BC |
306 | #define RATE_MCS_FLAGS_POS 8 |
307 | #define RATE_MCS_HT_POS 8 | |
308 | #define RATE_MCS_HT_MSK 0x100 | |
309 | ||
075416cd | 310 | /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ |
abceddb4 BC |
311 | #define RATE_MCS_CCK_POS 9 |
312 | #define RATE_MCS_CCK_MSK 0x200 | |
313 | ||
075416cd | 314 | /* Bit 10: (1) Use Green Field preamble */ |
abceddb4 BC |
315 | #define RATE_MCS_GF_POS 10 |
316 | #define RATE_MCS_GF_MSK 0x400 | |
317 | ||
7aafef1c WYG |
318 | /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */ |
319 | #define RATE_MCS_HT40_POS 11 | |
320 | #define RATE_MCS_HT40_MSK 0x800 | |
abceddb4 | 321 | |
7aafef1c | 322 | /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */ |
abceddb4 BC |
323 | #define RATE_MCS_DUP_POS 12 |
324 | #define RATE_MCS_DUP_MSK 0x1000 | |
325 | ||
075416cd | 326 | /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ |
abceddb4 BC |
327 | #define RATE_MCS_SGI_POS 13 |
328 | #define RATE_MCS_SGI_MSK 0x2000 | |
329 | ||
330 | /** | |
76eff18b TW |
331 | * rate_n_flags Tx antenna masks |
332 | * 4965 has 2 transmitters | |
333 | * 5100 has 1 transmitter B | |
334 | * 5150 has 1 transmitter A | |
335 | * 5300 has 3 transmitters | |
336 | * 5350 has 3 transmitters | |
337 | * bit14:16 | |
abceddb4 | 338 | */ |
600c0e11 TW |
339 | #define RATE_MCS_ANT_POS 14 |
340 | #define RATE_MCS_ANT_A_MSK 0x04000 | |
341 | #define RATE_MCS_ANT_B_MSK 0x08000 | |
342 | #define RATE_MCS_ANT_C_MSK 0x10000 | |
343 | #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) | |
344 | #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) | |
76eff18b | 345 | #define RATE_ANT_NUM 3 |
80cc0c38 BC |
346 | |
347 | #define POWER_TABLE_NUM_ENTRIES 33 | |
348 | #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 | |
349 | #define POWER_TABLE_CCK_ENTRY 32 | |
350 | ||
e57f1489 WYG |
351 | #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24 |
352 | #define IWL_PWR_CCK_ENTRIES 2 | |
353 | ||
80cc0c38 BC |
354 | /** |
355 | * struct tx_power_dual_stream | |
356 | * | |
357 | * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | |
358 | * | |
359 | * Same format as iwl_tx_power_dual_stream, but __le32 | |
360 | */ | |
361 | struct tx_power_dual_stream { | |
362 | __le32 dw; | |
ba2d3587 | 363 | } __packed; |
80cc0c38 | 364 | |
630fe9b6 | 365 | /** |
a96a27f9 | 366 | * Command REPLY_TX_POWER_DBM_CMD = 0x98 |
ab63c68a | 367 | * struct iwlagn_tx_power_dbm_cmd |
630fe9b6 | 368 | */ |
ab63c68a WYG |
369 | #define IWLAGN_TX_POWER_AUTO 0x7f |
370 | #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6) | |
853554ac | 371 | |
ab63c68a | 372 | struct iwlagn_tx_power_dbm_cmd { |
630fe9b6 TW |
373 | s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ |
374 | u8 flags; | |
375 | s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ | |
376 | u8 reserved; | |
ba2d3587 | 377 | } __packed; |
80cc0c38 | 378 | |
2f748dec WYG |
379 | /** |
380 | * Command TX_ANT_CONFIGURATION_CMD = 0x98 | |
381 | * This command is used to configure valid Tx antenna. | |
382 | * By default uCode concludes the valid antenna according to the radio flavor. | |
383 | * This command enables the driver to override/modify this conclusion. | |
384 | */ | |
385 | struct iwl_tx_ant_config_cmd { | |
386 | __le32 valid; | |
ba2d3587 | 387 | } __packed; |
2f748dec | 388 | |
b481de9c ZY |
389 | /****************************************************************************** |
390 | * (0a) | |
391 | * Alive and Error Commands & Responses: | |
392 | * | |
393 | *****************************************************************************/ | |
394 | ||
51e9bf5d | 395 | #define UCODE_VALID_OK cpu_to_le32(0x1) |
ca7966c8 | 396 | |
075416cd BC |
397 | /** |
398 | * REPLY_ALIVE = 0x1 (response only, not a command) | |
399 | * | |
400 | * uCode issues this "alive" notification once the runtime image is ready | |
401 | * to receive commands from the driver. This is the *second* "alive" | |
402 | * notification that the driver will receive after rebooting uCode; | |
403 | * this "alive" is indicated by subtype field != 9. | |
404 | * | |
405 | * See comments documenting "BSM" (bootstrap state machine). | |
406 | * | |
407 | * This response includes two pointers to structures within the device's | |
408 | * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: | |
409 | * | |
410 | * 1) log_event_table_ptr indicates base of the event log. This traces | |
411 | * a 256-entry history of uCode execution within a circular buffer. | |
412 | * Its header format is: | |
413 | * | |
414 | * __le32 log_size; log capacity (in number of entries) | |
415 | * __le32 type; (1) timestamp with each entry, (0) no timestamp | |
416 | * __le32 wraps; # times uCode has wrapped to top of circular buffer | |
417 | * __le32 write_index; next circular buffer entry that uCode would fill | |
418 | * | |
419 | * The header is followed by the circular buffer of log entries. Entries | |
420 | * with timestamps have the following format: | |
421 | * | |
422 | * __le32 event_id; range 0 - 1500 | |
423 | * __le32 timestamp; low 32 bits of TSF (of network, if associated) | |
424 | * __le32 data; event_id-specific data value | |
425 | * | |
426 | * Entries without timestamps contain only event_id and data. | |
427 | * | |
461ef382 | 428 | * |
075416cd | 429 | * 2) error_event_table_ptr indicates base of the error log. This contains |
461ef382 | 430 | * information about any uCode error that occurs. For agn, the format |
e46f6538 | 431 | * of the error log is defined by struct iwl_error_event_table. |
075416cd BC |
432 | * |
433 | * The Linux driver can print both logs to the system log when a uCode error | |
434 | * occurs. | |
435 | */ | |
e46f6538 JB |
436 | |
437 | /* | |
438 | * Note: This structure is read from the device with IO accesses, | |
439 | * and the reading already does the endian conversion. As it is | |
440 | * read with u32-sized accesses, any members with a different size | |
441 | * need to be ordered correctly though! | |
442 | */ | |
443 | struct iwl_error_event_table { | |
444 | u32 valid; /* (nonzero) valid, (0) log is empty */ | |
445 | u32 error_id; /* type of error */ | |
446 | u32 pc; /* program counter */ | |
447 | u32 blink1; /* branch link */ | |
448 | u32 blink2; /* branch link */ | |
449 | u32 ilink1; /* interrupt link */ | |
450 | u32 ilink2; /* interrupt link */ | |
451 | u32 data1; /* error-specific data */ | |
452 | u32 data2; /* error-specific data */ | |
453 | u32 line; /* source code line of error */ | |
454 | u32 bcon_time; /* beacon timer */ | |
455 | u32 tsf_low; /* network timestamp function timer */ | |
456 | u32 tsf_hi; /* network timestamp function timer */ | |
457 | u32 gp1; /* GP1 timer register */ | |
458 | u32 gp2; /* GP2 timer register */ | |
459 | u32 gp3; /* GP3 timer register */ | |
460 | u32 ucode_ver; /* uCode version */ | |
461 | u32 hw_ver; /* HW Silicon version */ | |
462 | u32 brd_ver; /* HW board version */ | |
463 | u32 log_pc; /* log program counter */ | |
464 | u32 frame_ptr; /* frame pointer */ | |
465 | u32 stack_ptr; /* stack pointer */ | |
466 | u32 hcmd; /* last host command header */ | |
467 | #if 0 | |
468 | /* no need to read the remainder, we don't use the values */ | |
469 | u32 isr0; /* isr status register LMPM_NIC_ISR0: rxtx_flag */ | |
470 | u32 isr1; /* isr status register LMPM_NIC_ISR1: host_flag */ | |
471 | u32 isr2; /* isr status register LMPM_NIC_ISR2: enc_flag */ | |
472 | u32 isr3; /* isr status register LMPM_NIC_ISR3: time_flag */ | |
473 | u32 isr4; /* isr status register LMPM_NIC_ISR4: wico interrupt */ | |
474 | u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ | |
475 | u32 wait_event; /* wait event() caller address */ | |
476 | u32 l2p_control; /* L2pControlField */ | |
477 | u32 l2p_duration; /* L2pDurationField */ | |
478 | u32 l2p_mhvalid; /* L2pMhValidBits */ | |
479 | u32 l2p_addr_match; /* L2pAddrMatchStat */ | |
480 | u32 lmpm_pmg_sel; /* indicate which clocks are turned on (LMPM_PMG_SEL) */ | |
481 | u32 u_timestamp; /* indicate when the date and time of the compilation */ | |
482 | u32 flow_handler; /* FH read/write pointers, RX credit */ | |
483 | #endif | |
484 | } __packed; | |
485 | ||
885ba202 | 486 | struct iwl_alive_resp { |
b481de9c ZY |
487 | u8 ucode_minor; |
488 | u8 ucode_major; | |
489 | __le16 reserved1; | |
490 | u8 sw_rev[8]; | |
491 | u8 ver_type; | |
075416cd | 492 | u8 ver_subtype; /* not "9" for runtime alive */ |
b481de9c | 493 | __le16 reserved2; |
075416cd BC |
494 | __le32 log_event_table_ptr; /* SRAM address for event log */ |
495 | __le32 error_event_table_ptr; /* SRAM address for error log */ | |
b481de9c ZY |
496 | __le32 timestamp; |
497 | __le32 is_valid; | |
ba2d3587 | 498 | } __packed; |
b481de9c | 499 | |
b481de9c ZY |
500 | /* |
501 | * REPLY_ERROR = 0x2 (response only, not a command) | |
502 | */ | |
885ba202 | 503 | struct iwl_error_resp { |
b481de9c ZY |
504 | __le32 error_type; |
505 | u8 cmd_id; | |
506 | u8 reserved1; | |
507 | __le16 bad_cmd_seq_num; | |
b481de9c | 508 | __le32 error_info; |
3195c1f3 | 509 | __le64 timestamp; |
ba2d3587 | 510 | } __packed; |
b481de9c ZY |
511 | |
512 | /****************************************************************************** | |
513 | * (1) | |
514 | * RXON Commands & Responses: | |
515 | * | |
516 | *****************************************************************************/ | |
517 | ||
518 | /* | |
519 | * Rx config defines & structure | |
520 | */ | |
521 | /* rx_config device types */ | |
522 | enum { | |
523 | RXON_DEV_TYPE_AP = 1, | |
524 | RXON_DEV_TYPE_ESS = 3, | |
525 | RXON_DEV_TYPE_IBSS = 4, | |
526 | RXON_DEV_TYPE_SNIFFER = 6, | |
946ba30d JB |
527 | RXON_DEV_TYPE_CP = 7, |
528 | RXON_DEV_TYPE_2STA = 8, | |
529 | RXON_DEV_TYPE_P2P = 9, | |
b481de9c ZY |
530 | }; |
531 | ||
14519a0b | 532 | |
51e9bf5d | 533 | #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) |
7b841727 | 534 | #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) |
51e9bf5d | 535 | #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) |
14519a0b | 536 | #define RXON_RX_CHAIN_VALID_POS (1) |
51e9bf5d | 537 | #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) |
14519a0b | 538 | #define RXON_RX_CHAIN_FORCE_SEL_POS (4) |
51e9bf5d | 539 | #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7) |
14519a0b | 540 | #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) |
51e9bf5d | 541 | #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10) |
14519a0b | 542 | #define RXON_RX_CHAIN_CNT_POS (10) |
51e9bf5d | 543 | #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12) |
14519a0b | 544 | #define RXON_RX_CHAIN_MIMO_CNT_POS (12) |
51e9bf5d | 545 | #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14) |
14519a0b BC |
546 | #define RXON_RX_CHAIN_MIMO_FORCE_POS (14) |
547 | ||
b481de9c ZY |
548 | /* rx_config flags */ |
549 | /* band & modulation selection */ | |
51e9bf5d HH |
550 | #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) |
551 | #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) | |
b481de9c | 552 | /* auto detection enable */ |
51e9bf5d | 553 | #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) |
b481de9c | 554 | /* TGg protection when tx */ |
51e9bf5d | 555 | #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) |
b481de9c | 556 | /* cck short slot & preamble */ |
51e9bf5d HH |
557 | #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) |
558 | #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) | |
b481de9c | 559 | /* antenna selection */ |
51e9bf5d HH |
560 | #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) |
561 | #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) | |
562 | #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) | |
563 | #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) | |
b481de9c | 564 | /* radar detection enable */ |
51e9bf5d HH |
565 | #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) |
566 | #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) | |
b481de9c ZY |
567 | /* rx response to host with 8-byte TSF |
568 | * (according to ON_AIR deassertion) */ | |
51e9bf5d | 569 | #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) |
b481de9c | 570 | |
14519a0b BC |
571 | |
572 | /* HT flags */ | |
573 | #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) | |
51e9bf5d | 574 | #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) |
14519a0b BC |
575 | |
576 | #define RXON_FLG_HT_OPERATING_MODE_POS (23) | |
577 | ||
51e9bf5d | 578 | #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23) |
7aafef1c | 579 | #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23) |
14519a0b BC |
580 | |
581 | #define RXON_FLG_CHANNEL_MODE_POS (25) | |
51e9bf5d | 582 | #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) |
a2b0f02e WYG |
583 | |
584 | /* channel mode */ | |
585 | enum { | |
586 | CHANNEL_MODE_LEGACY = 0, | |
587 | CHANNEL_MODE_PURE_40 = 1, | |
588 | CHANNEL_MODE_MIXED = 2, | |
589 | CHANNEL_MODE_RESERVED = 3, | |
590 | }; | |
591 | #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS) | |
592 | #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS) | |
593 | #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS) | |
594 | ||
a326a5d0 | 595 | /* CTS to self (if spec allows) flag */ |
51e9bf5d | 596 | #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) |
14519a0b | 597 | |
b481de9c ZY |
598 | /* rx_config filter flags */ |
599 | /* accept all data frames */ | |
51e9bf5d | 600 | #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) |
b481de9c | 601 | /* pass control & management to host */ |
51e9bf5d | 602 | #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) |
b481de9c | 603 | /* accept multi-cast */ |
51e9bf5d | 604 | #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) |
b481de9c | 605 | /* don't decrypt uni-cast frames */ |
51e9bf5d | 606 | #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) |
b481de9c | 607 | /* don't decrypt multi-cast frames */ |
51e9bf5d | 608 | #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) |
b481de9c | 609 | /* STA is associated */ |
51e9bf5d | 610 | #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) |
b481de9c | 611 | /* transfer to host non bssid beacons in associated state */ |
51e9bf5d | 612 | #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) |
b481de9c | 613 | |
80cc0c38 | 614 | /** |
b481de9c | 615 | * REPLY_RXON = 0x10 (command, has simple generic response) |
80cc0c38 BC |
616 | * |
617 | * RXON tunes the radio tuner to a service channel, and sets up a number | |
618 | * of parameters that are used primarily for Rx, but also for Tx operations. | |
619 | * | |
620 | * NOTE: When tuning to a new channel, driver must set the | |
621 | * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent | |
622 | * info within the device, including the station tables, tx retry | |
623 | * rate tables, and txpower tables. Driver must build a new station | |
624 | * table and txpower table before transmitting anything on the RXON | |
625 | * channel. | |
626 | * | |
627 | * NOTE: All RXONs wipe clean the internal txpower table. Driver must | |
628 | * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), | |
629 | * regardless of whether RXON_FILTER_ASSOC_MSK is set. | |
b481de9c | 630 | */ |
3d24a9f7 | 631 | |
c1adf9fb GG |
632 | struct iwl_rxon_cmd { |
633 | u8 node_addr[6]; | |
634 | __le16 reserved1; | |
635 | u8 bssid_addr[6]; | |
636 | __le16 reserved2; | |
637 | u8 wlap_bssid_addr[6]; | |
638 | __le16 reserved3; | |
639 | u8 dev_type; | |
640 | u8 air_propagation; | |
641 | __le16 rx_chain; | |
642 | u8 ofdm_basic_rates; | |
643 | u8 cck_basic_rates; | |
644 | __le16 assoc_id; | |
645 | __le32 flags; | |
646 | __le32 filter_flags; | |
647 | __le16 channel; | |
648 | u8 ofdm_ht_single_stream_basic_rates; | |
649 | u8 ofdm_ht_dual_stream_basic_rates; | |
650 | u8 ofdm_ht_triple_stream_basic_rates; | |
651 | u8 reserved5; | |
652 | __le16 acquisition_data; | |
653 | __le16 reserved6; | |
ba2d3587 | 654 | } __packed; |
c1adf9fb | 655 | |
3d24a9f7 TW |
656 | /* |
657 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) | |
658 | */ | |
89e746b2 | 659 | struct iwl_rxon_assoc_cmd { |
b481de9c ZY |
660 | __le32 flags; |
661 | __le32 filter_flags; | |
662 | u8 ofdm_basic_rates; | |
663 | u8 cck_basic_rates; | |
3d24a9f7 | 664 | __le16 reserved1; |
b481de9c ZY |
665 | u8 ofdm_ht_single_stream_basic_rates; |
666 | u8 ofdm_ht_dual_stream_basic_rates; | |
3d24a9f7 TW |
667 | u8 ofdm_ht_triple_stream_basic_rates; |
668 | u8 reserved2; | |
b481de9c | 669 | __le16 rx_chain_select_flags; |
3d24a9f7 TW |
670 | __le16 acquisition_data; |
671 | __le32 reserved3; | |
ba2d3587 | 672 | } __packed; |
b481de9c | 673 | |
b5d7be5e | 674 | #define IWL_CONN_MAX_LISTEN_INTERVAL 10 |
2c2f3b33 | 675 | #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ |
fe7a90c2 | 676 | |
b481de9c ZY |
677 | /* |
678 | * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) | |
679 | */ | |
3195c1f3 TW |
680 | struct iwl_rxon_time_cmd { |
681 | __le64 timestamp; | |
b481de9c ZY |
682 | __le16 beacon_interval; |
683 | __le16 atim_window; | |
684 | __le32 beacon_init_val; | |
685 | __le16 listen_interval; | |
946ba30d JB |
686 | u8 dtim_period; |
687 | u8 delta_cp_bss_tbtts; | |
ba2d3587 | 688 | } __packed; |
b481de9c | 689 | |
b481de9c ZY |
690 | /* |
691 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) | |
692 | */ | |
e57f1489 WYG |
693 | /** |
694 | * struct iwl5000_channel_switch_cmd | |
695 | * @band: 0- 5.2GHz, 1- 2.4GHz | |
696 | * @expect_beacon: 0- resume transmits after channel switch | |
697 | * 1- wait for beacon to resume transmits | |
698 | * @channel: new channel number | |
699 | * @rxon_flags: Rx on flags | |
700 | * @rxon_filter_flags: filtering parameters | |
701 | * @switch_time: switch time in extended beacon format | |
702 | * @reserved: reserved bytes | |
703 | */ | |
704 | struct iwl5000_channel_switch_cmd { | |
705 | u8 band; | |
706 | u8 expect_beacon; | |
707 | __le16 channel; | |
708 | __le32 rxon_flags; | |
709 | __le32 rxon_filter_flags; | |
710 | __le32 switch_time; | |
711 | __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; | |
ba2d3587 | 712 | } __packed; |
e57f1489 WYG |
713 | |
714 | /** | |
715 | * struct iwl6000_channel_switch_cmd | |
716 | * @band: 0- 5.2GHz, 1- 2.4GHz | |
717 | * @expect_beacon: 0- resume transmits after channel switch | |
718 | * 1- wait for beacon to resume transmits | |
719 | * @channel: new channel number | |
720 | * @rxon_flags: Rx on flags | |
721 | * @rxon_filter_flags: filtering parameters | |
722 | * @switch_time: switch time in extended beacon format | |
723 | * @reserved: reserved bytes | |
724 | */ | |
725 | struct iwl6000_channel_switch_cmd { | |
726 | u8 band; | |
727 | u8 expect_beacon; | |
728 | __le16 channel; | |
729 | __le32 rxon_flags; | |
730 | __le32 rxon_filter_flags; | |
731 | __le32 switch_time; | |
732 | __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; | |
ba2d3587 | 733 | } __packed; |
e57f1489 | 734 | |
b481de9c ZY |
735 | /* |
736 | * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) | |
737 | */ | |
2aa6ab86 | 738 | struct iwl_csa_notification { |
b481de9c ZY |
739 | __le16 band; |
740 | __le16 channel; | |
741 | __le32 status; /* 0 - OK, 1 - fail */ | |
ba2d3587 | 742 | } __packed; |
b481de9c ZY |
743 | |
744 | /****************************************************************************** | |
745 | * (2) | |
746 | * Quality-of-Service (QOS) Commands & Responses: | |
747 | * | |
748 | *****************************************************************************/ | |
2054a00b BC |
749 | |
750 | /** | |
751 | * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM | |
752 | * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd | |
753 | * | |
754 | * @cw_min: Contention window, start value in numbers of slots. | |
755 | * Should be a power-of-2, minus 1. Device's default is 0x0f. | |
756 | * @cw_max: Contention window, max value in numbers of slots. | |
757 | * Should be a power-of-2, minus 1. Device's default is 0x3f. | |
758 | * @aifsn: Number of slots in Arbitration Interframe Space (before | |
759 | * performing random backoff timing prior to Tx). Device default 1. | |
760 | * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. | |
761 | * | |
762 | * Device will automatically increase contention window by (2*CW) + 1 for each | |
763 | * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW | |
764 | * value, to cap the CW value. | |
765 | */ | |
1ff50bda | 766 | struct iwl_ac_qos { |
b481de9c ZY |
767 | __le16 cw_min; |
768 | __le16 cw_max; | |
769 | u8 aifsn; | |
770 | u8 reserved1; | |
771 | __le16 edca_txop; | |
ba2d3587 | 772 | } __packed; |
b481de9c ZY |
773 | |
774 | /* QoS flags defines */ | |
51e9bf5d HH |
775 | #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) |
776 | #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) | |
777 | #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) | |
b481de9c | 778 | |
2054a00b | 779 | /* Number of Access Categories (AC) (EDCA), queues 0..3 */ |
b481de9c ZY |
780 | #define AC_NUM 4 |
781 | ||
782 | /* | |
783 | * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) | |
2054a00b BC |
784 | * |
785 | * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs | |
786 | * 0: Background, 1: Best Effort, 2: Video, 3: Voice. | |
b481de9c | 787 | */ |
1ff50bda | 788 | struct iwl_qosparam_cmd { |
b481de9c | 789 | __le32 qos_flags; |
1ff50bda | 790 | struct iwl_ac_qos ac[AC_NUM]; |
ba2d3587 | 791 | } __packed; |
b481de9c ZY |
792 | |
793 | /****************************************************************************** | |
794 | * (3) | |
795 | * Add/Modify Stations Commands & Responses: | |
796 | * | |
797 | *****************************************************************************/ | |
798 | /* | |
799 | * Multi station support | |
800 | */ | |
2054a00b BC |
801 | |
802 | /* Special, dedicated locations within device's station table */ | |
b481de9c | 803 | #define IWL_AP_ID 0 |
946ba30d | 804 | #define IWL_AP_ID_PAN 1 |
b481de9c | 805 | #define IWL_STA_ID 2 |
946ba30d | 806 | #define IWLAGN_PAN_BCAST_ID 14 |
bf3c7fdd WYG |
807 | #define IWLAGN_BROADCAST_ID 15 |
808 | #define IWLAGN_STATION_COUNT 16 | |
b481de9c | 809 | |
b481de9c | 810 | #define IWL_INVALID_STATION 255 |
5f85a789 | 811 | #define IWL_MAX_TID_COUNT 9 |
b481de9c | 812 | |
1bd14eaf JB |
813 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) |
814 | #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8) | |
946ba30d | 815 | #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13) |
51e9bf5d HH |
816 | #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) |
817 | #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) | |
74093ddf | 818 | #define STA_FLG_MAX_AGG_SIZE_POS (19) |
51e9bf5d | 819 | #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19) |
7aafef1c | 820 | #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21) |
51e9bf5d | 821 | #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22) |
74093ddf | 822 | #define STA_FLG_AGG_MPDU_DENSITY_POS (23) |
51e9bf5d | 823 | #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23) |
b481de9c | 824 | |
2054a00b | 825 | /* Use in mode field. 1: modify existing entry, 0: add new station entry */ |
b481de9c ZY |
826 | #define STA_CONTROL_MODIFY_MSK 0x01 |
827 | ||
828 | /* key flags __le16*/ | |
51e9bf5d HH |
829 | #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) |
830 | #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) | |
831 | #define STA_KEY_FLG_WEP cpu_to_le16(0x0001) | |
832 | #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) | |
833 | #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) | |
b481de9c ZY |
834 | |
835 | #define STA_KEY_FLG_KEYID_POS 8 | |
51e9bf5d | 836 | #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) |
eaaf7894 | 837 | /* wep key is either from global key (0) or from station info array (1) */ |
51e9bf5d | 838 | #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008) |
eaaf7894 EG |
839 | |
840 | /* wep key in STA: 5-bytes (0) or 13-bytes (1) */ | |
51e9bf5d HH |
841 | #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) |
842 | #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) | |
deb09c43 | 843 | #define STA_KEY_MAX_NUM 8 |
c10afb6e | 844 | #define STA_KEY_MAX_NUM_PAN 16 |
5a3d9882 JB |
845 | /* must not match WEP_INVALID_OFFSET */ |
846 | #define IWLAGN_HW_KEY_DEFAULT 0xfe | |
b481de9c | 847 | |
2054a00b | 848 | /* Flags indicate whether to modify vs. don't change various station params */ |
b481de9c ZY |
849 | #define STA_MODIFY_KEY_MASK 0x01 |
850 | #define STA_MODIFY_TID_DISABLE_TX 0x02 | |
851 | #define STA_MODIFY_TX_RATE_MSK 0x04 | |
852 | #define STA_MODIFY_ADDBA_TID_MSK 0x08 | |
853 | #define STA_MODIFY_DELBA_TID_MSK 0x10 | |
6ab10ff8 | 854 | #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20 |
2054a00b BC |
855 | |
856 | /* Receiver address (actually, Rx station's index into station table), | |
857 | * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */ | |
b481de9c ZY |
858 | #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid)) |
859 | ||
a8029bb7 | 860 | /* agn */ |
133636de TW |
861 | struct iwl_keyinfo { |
862 | __le16 key_flags; | |
863 | u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ | |
864 | u8 reserved1; | |
865 | __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ | |
866 | u8 key_offset; | |
867 | u8 reserved2; | |
868 | u8 key[16]; /* 16-byte unicast decryption key */ | |
869 | __le64 tx_secur_seq_cnt; | |
870 | __le64 hw_tkip_mic_rx_key; | |
871 | __le64 hw_tkip_mic_tx_key; | |
ba2d3587 | 872 | } __packed; |
133636de | 873 | |
2054a00b BC |
874 | /** |
875 | * struct sta_id_modify | |
876 | * @addr[ETH_ALEN]: station's MAC address | |
877 | * @sta_id: index of station in uCode's station table | |
878 | * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change | |
879 | * | |
880 | * Driver selects unused table index when adding new station, | |
881 | * or the index to a pre-existing station entry when modifying that station. | |
882 | * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). | |
883 | * | |
884 | * modify_mask flags select which parameters to modify vs. leave alone. | |
885 | */ | |
b481de9c ZY |
886 | struct sta_id_modify { |
887 | u8 addr[ETH_ALEN]; | |
888 | __le16 reserved1; | |
889 | u8 sta_id; | |
890 | u8 modify_mask; | |
891 | __le16 reserved2; | |
ba2d3587 | 892 | } __packed; |
b481de9c ZY |
893 | |
894 | /* | |
895 | * REPLY_ADD_STA = 0x18 (command) | |
2054a00b BC |
896 | * |
897 | * The device contains an internal table of per-station information, | |
898 | * with info on security keys, aggregation parameters, and Tx rates for | |
767d055d WYG |
899 | * initial Tx attempt and any retries (agn devices uses |
900 | * REPLY_TX_LINK_QUALITY_CMD, | |
2054a00b BC |
901 | * |
902 | * REPLY_ADD_STA sets up the table entry for one station, either creating | |
903 | * a new entry, or modifying a pre-existing one. | |
904 | * | |
905 | * NOTE: RXON command (without "associated" bit set) wipes the station table | |
906 | * clean. Moving into RF_KILL state does this also. Driver must set up | |
907 | * new station table before transmitting anything on the RXON channel | |
908 | * (except active scans or active measurements; those commands carry | |
909 | * their own txpower/rate setup data). | |
910 | * | |
911 | * When getting started on a new channel, driver must set up the | |
912 | * IWL_BROADCAST_ID entry (last entry in the table). For a client | |
913 | * station in a BSS, once an AP is selected, driver sets up the AP STA | |
914 | * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP | |
915 | * are all that are needed for a BSS client station. If the device is | |
916 | * used as AP, or in an IBSS network, driver must set up station table | |
917 | * entries for all STAs in network, starting with index IWL_STA_ID. | |
b481de9c | 918 | */ |
3d24a9f7 | 919 | |
133636de TW |
920 | struct iwl_addsta_cmd { |
921 | u8 mode; /* 1: modify existing, 0: add new station */ | |
922 | u8 reserved[3]; | |
923 | struct sta_id_modify sta; | |
924 | struct iwl_keyinfo key; | |
925 | __le32 station_flags; /* STA_FLG_* */ | |
926 | __le32 station_flags_msk; /* STA_FLG_* */ | |
927 | ||
928 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | |
929 | * corresponding to bit (e.g. bit 5 controls TID 5). | |
930 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | |
931 | __le16 tid_disable_tx; | |
932 | ||
c587de0b | 933 | __le16 rate_n_flags; /* 3945 only */ |
133636de TW |
934 | |
935 | /* TID for which to add block-ack support. | |
936 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | |
937 | u8 add_immediate_ba_tid; | |
938 | ||
939 | /* TID for which to remove block-ack support. | |
940 | * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ | |
941 | u8 remove_immediate_ba_tid; | |
942 | ||
943 | /* Starting Sequence Number for added block-ack support. | |
944 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | |
945 | __le16 add_immediate_ba_ssn; | |
946 | ||
9bb487b4 JB |
947 | /* |
948 | * Number of packets OK to transmit to station even though | |
949 | * it is asleep -- used to synchronise PS-poll and u-APSD | |
950 | * responses while ucode keeps track of STA sleep state. | |
951 | */ | |
952 | __le16 sleep_tx_count; | |
953 | ||
954 | __le16 reserved2; | |
ba2d3587 | 955 | } __packed; |
133636de TW |
956 | |
957 | ||
2054a00b BC |
958 | #define ADD_STA_SUCCESS_MSK 0x1 |
959 | #define ADD_STA_NO_ROOM_IN_TABLE 0x2 | |
960 | #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 | |
961 | #define ADD_STA_MODIFY_NON_EXIST_STA 0x8 | |
b481de9c ZY |
962 | /* |
963 | * REPLY_ADD_STA = 0x18 (response) | |
964 | */ | |
7a999bf0 | 965 | struct iwl_add_sta_resp { |
2054a00b | 966 | u8 status; /* ADD_STA_* */ |
ba2d3587 | 967 | } __packed; |
b481de9c | 968 | |
7a999bf0 TW |
969 | #define REM_STA_SUCCESS_MSK 0x1 |
970 | /* | |
971 | * REPLY_REM_STA = 0x19 (response) | |
972 | */ | |
973 | struct iwl_rem_sta_resp { | |
974 | u8 status; | |
ba2d3587 | 975 | } __packed; |
7a999bf0 TW |
976 | |
977 | /* | |
978 | * REPLY_REM_STA = 0x19 (command) | |
979 | */ | |
980 | struct iwl_rem_sta_cmd { | |
981 | u8 num_sta; /* number of removed stations */ | |
982 | u8 reserved[3]; | |
983 | u8 addr[ETH_ALEN]; /* MAC addr of the first station */ | |
984 | u8 reserved2[2]; | |
ba2d3587 | 985 | } __packed; |
7a999bf0 | 986 | |
f88e0ecc WYG |
987 | |
988 | /* WiFi queues mask */ | |
989 | #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0)) | |
990 | #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1)) | |
991 | #define IWL_SCD_VI_MSK cpu_to_le32(BIT(2)) | |
992 | #define IWL_SCD_VO_MSK cpu_to_le32(BIT(3)) | |
993 | #define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3)) | |
994 | ||
995 | /* PAN queues mask */ | |
996 | #define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4)) | |
997 | #define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5)) | |
998 | #define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6)) | |
999 | #define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7)) | |
1000 | #define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7)) | |
1001 | #define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8)) | |
1002 | ||
947279ee WYG |
1003 | #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00) |
1004 | ||
716c74b0 | 1005 | #define IWL_DROP_SINGLE 0 |
ecdbe86e | 1006 | #define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN)) |
716c74b0 | 1007 | |
947279ee WYG |
1008 | /* |
1009 | * REPLY_TXFIFO_FLUSH = 0x1e(command and response) | |
1010 | * | |
1011 | * When using full FIFO flush this command checks the scheduler HW block WR/RD | |
1012 | * pointers to check if all the frames were transferred by DMA into the | |
1013 | * relevant TX FIFO queue. Only when the DMA is finished and the queue is | |
1014 | * empty the command can finish. | |
1015 | * This command is used to flush the TXFIFO from transmit commands, it may | |
1016 | * operate on single or multiple queues, the command queue can't be flushed by | |
1017 | * this command. The command response is returned when all the queue flush | |
1018 | * operations are done. Each TX command flushed return response with the FLUSH | |
1019 | * status set in the TX response status. When FIFO flush operation is used, | |
1020 | * the flush operation ends when both the scheduler DMA done and TXFIFO empty | |
1021 | * are set. | |
1022 | * | |
1023 | * @fifo_control: bit mask for which queues to flush | |
1024 | * @flush_control: flush controls | |
1025 | * 0: Dump single MSDU | |
1026 | * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable. | |
1027 | * 2: Dump all FIFO | |
1028 | */ | |
1029 | struct iwl_txfifo_flush_cmd { | |
1030 | __le32 fifo_control; | |
1031 | __le16 flush_control; | |
1032 | __le16 reserved; | |
0e954099 | 1033 | } __packed; |
947279ee | 1034 | |
0a0bed1d EG |
1035 | /* |
1036 | * REPLY_WEP_KEY = 0x20 | |
1037 | */ | |
1038 | struct iwl_wep_key { | |
1039 | u8 key_index; | |
1040 | u8 key_offset; | |
1041 | u8 reserved1[2]; | |
1042 | u8 key_size; | |
1043 | u8 reserved2[3]; | |
1044 | u8 key[16]; | |
ba2d3587 | 1045 | } __packed; |
0a0bed1d EG |
1046 | |
1047 | struct iwl_wep_cmd { | |
1048 | u8 num_keys; | |
1049 | u8 global_key_type; | |
1050 | u8 flags; | |
1051 | u8 reserved; | |
1052 | struct iwl_wep_key key[0]; | |
ba2d3587 | 1053 | } __packed; |
0a0bed1d EG |
1054 | |
1055 | #define WEP_KEY_WEP_TYPE 1 | |
1056 | #define WEP_KEYS_MAX 4 | |
1057 | #define WEP_INVALID_OFFSET 0xff | |
4564ce8b | 1058 | #define WEP_KEY_LEN_64 5 |
0a0bed1d | 1059 | #define WEP_KEY_LEN_128 13 |
b481de9c ZY |
1060 | |
1061 | /****************************************************************************** | |
1062 | * (4) | |
1063 | * Rx Responses: | |
1064 | * | |
1065 | *****************************************************************************/ | |
1066 | ||
51e9bf5d HH |
1067 | #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) |
1068 | #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) | |
8211ef78 | 1069 | |
51e9bf5d HH |
1070 | #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) |
1071 | #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) | |
1072 | #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) | |
1073 | #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) | |
9024adf5 | 1074 | #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0 |
9f30e04e | 1075 | #define RX_RES_PHY_FLAGS_ANTENNA_POS 4 |
8211ef78 TW |
1076 | |
1077 | #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) | |
1078 | #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) | |
1079 | #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) | |
1080 | #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) | |
1081 | #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) | |
17e476b8 EG |
1082 | #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8) |
1083 | ||
1084 | #define RX_RES_STATUS_STATION_FOUND (1<<6) | |
1085 | #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7) | |
8211ef78 TW |
1086 | |
1087 | #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) | |
1088 | #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) | |
1089 | #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) | |
1090 | #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) | |
1091 | #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) | |
b481de9c | 1092 | |
17e476b8 EG |
1093 | #define RX_MPDU_RES_STATUS_ICV_OK (0x20) |
1094 | #define RX_MPDU_RES_STATUS_MIC_OK (0x40) | |
1095 | #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) | |
1096 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) | |
1097 | ||
3d24a9f7 | 1098 | |
7ccc896f WYG |
1099 | #define IWLAGN_RX_RES_PHY_CNT 8 |
1100 | #define IWLAGN_RX_RES_AGC_IDX 1 | |
1101 | #define IWLAGN_RX_RES_RSSI_AB_IDX 2 | |
1102 | #define IWLAGN_RX_RES_RSSI_C_IDX 3 | |
1103 | #define IWLAGN_OFDM_AGC_MSK 0xfe00 | |
1104 | #define IWLAGN_OFDM_AGC_BIT_POS 9 | |
1105 | #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff | |
1106 | #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00 | |
1107 | #define IWLAGN_OFDM_RSSI_A_BIT_POS 0 | |
1108 | #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000 | |
1109 | #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000 | |
1110 | #define IWLAGN_OFDM_RSSI_B_BIT_POS 16 | |
1111 | #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff | |
1112 | #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00 | |
1113 | #define IWLAGN_OFDM_RSSI_C_BIT_POS 0 | |
1114 | ||
1115 | struct iwlagn_non_cfg_phy { | |
1116 | __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */ | |
ba2d3587 | 1117 | } __packed; |
caab8f1a TW |
1118 | |
1119 | ||
b481de9c | 1120 | /* |
857485c0 | 1121 | * REPLY_RX = 0xc3 (response only, not a command) |
b481de9c ZY |
1122 | * Used only for legacy (non 11n) frames. |
1123 | */ | |
caab8f1a | 1124 | struct iwl_rx_phy_res { |
b481de9c ZY |
1125 | u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ |
1126 | u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ | |
1127 | u8 stat_id; /* configurable DSP phy data set ID */ | |
1128 | u8 reserved1; | |
1129 | __le64 timestamp; /* TSF at on air rise */ | |
1130 | __le32 beacon_time_stamp; /* beacon at on-air rise */ | |
1131 | __le16 phy_flags; /* general phy flags: band, modulation, ... */ | |
1132 | __le16 channel; /* channel number */ | |
caab8f1a | 1133 | u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ |
52969981 BC |
1134 | __le32 rate_n_flags; /* RATE_MCS_* */ |
1135 | __le16 byte_count; /* frame's byte-count */ | |
30c1b0f7 | 1136 | __le16 frame_time; /* frame's time on the air */ |
ba2d3587 | 1137 | } __packed; |
b481de9c | 1138 | |
2fb291ee | 1139 | struct iwl_rx_mpdu_res_start { |
b481de9c ZY |
1140 | __le16 byte_count; |
1141 | __le16 reserved; | |
ba2d3587 | 1142 | } __packed; |
b481de9c ZY |
1143 | |
1144 | ||
1145 | /****************************************************************************** | |
1146 | * (5) | |
1147 | * Tx Commands & Responses: | |
1148 | * | |
52969981 BC |
1149 | * Driver must place each REPLY_TX command into one of the prioritized Tx |
1150 | * queues in host DRAM, shared between driver and device (see comments for | |
1151 | * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode | |
1152 | * are preparing to transmit, the device pulls the Tx command over the PCI | |
1153 | * bus via one of the device's Tx DMA channels, to fill an internal FIFO | |
1154 | * from which data will be transmitted. | |
1155 | * | |
1156 | * uCode handles all timing and protocol related to control frames | |
1157 | * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler | |
1158 | * handle reception of block-acks; uCode updates the host driver via | |
767d055d | 1159 | * REPLY_COMPRESSED_BA. |
52969981 BC |
1160 | * |
1161 | * uCode handles retrying Tx when an ACK is expected but not received. | |
1162 | * This includes trying lower data rates than the one requested in the Tx | |
1163 | * command, as set up by the REPLY_RATE_SCALE (for 3945) or | |
767d055d | 1164 | * REPLY_TX_LINK_QUALITY_CMD (agn). |
52969981 BC |
1165 | * |
1166 | * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. | |
1167 | * This command must be executed after every RXON command, before Tx can occur. | |
b481de9c ZY |
1168 | *****************************************************************************/ |
1169 | ||
52969981 BC |
1170 | /* REPLY_TX Tx flags field */ |
1171 | ||
4e3243f5 WYG |
1172 | /* |
1173 | * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it | |
a326a5d0 | 1174 | * before this frame. if CTS-to-self required check |
4e3243f5 WYG |
1175 | * RXON_FLG_SELF_CTS_EN status. |
1176 | * unused in 3945/4965, used in 5000 series and after | |
1177 | */ | |
1178 | #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0) | |
a326a5d0 | 1179 | |
4e3243f5 WYG |
1180 | /* |
1181 | * 1: Use Request-To-Send protocol before this frame. | |
1182 | * Mutually exclusive vs. TX_CMD_FLG_CTS_MSK. | |
1183 | * used in 3945/4965, unused in 5000 series and after | |
1184 | */ | |
51e9bf5d | 1185 | #define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1) |
52969981 | 1186 | |
4e3243f5 WYG |
1187 | /* |
1188 | * 1: Transmit Clear-To-Send to self before this frame. | |
52969981 | 1189 | * Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames. |
4e3243f5 WYG |
1190 | * Mutually exclusive vs. TX_CMD_FLG_RTS_MSK. |
1191 | * used in 3945/4965, unused in 5000 series and after | |
1192 | */ | |
51e9bf5d | 1193 | #define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2) |
52969981 BC |
1194 | |
1195 | /* 1: Expect ACK from receiving station | |
1196 | * 0: Don't expect ACK (MAC header's duration field s/b 0) | |
1197 | * Set this for unicast frames, but not broadcast/multicast. */ | |
51e9bf5d | 1198 | #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) |
52969981 | 1199 | |
767d055d | 1200 | /* For agn devices: |
52969981 BC |
1201 | * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). |
1202 | * Tx command's initial_rate_index indicates first rate to try; | |
1203 | * uCode walks through table for additional Tx attempts. | |
1204 | * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. | |
1205 | * This rate will be used for all Tx attempts; it will not be scaled. */ | |
51e9bf5d | 1206 | #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) |
52969981 BC |
1207 | |
1208 | /* 1: Expect immediate block-ack. | |
1209 | * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ | |
51e9bf5d | 1210 | #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) |
52969981 | 1211 | |
4e3243f5 WYG |
1212 | /* |
1213 | * 1: Frame requires full Tx-Op protection. | |
1214 | * Set this if either RTS or CTS Tx Flag gets set. | |
1215 | * used in 3945/4965, unused in 5000 series and after | |
1216 | */ | |
51e9bf5d | 1217 | #define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7) |
52969981 | 1218 | |
767d055d | 1219 | /* Tx antenna selection field; used only for 3945, reserved (0) for agn devices. |
52969981 | 1220 | * Set field to "0" to allow 3945 uCode to select antenna (normal usage). */ |
51e9bf5d HH |
1221 | #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) |
1222 | #define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8) | |
1223 | #define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9) | |
b481de9c | 1224 | |
52969981 BC |
1225 | /* 1: Ignore Bluetooth priority for this frame. |
1226 | * 0: Delay Tx until Bluetooth device is done (normal usage). */ | |
b2e8690d | 1227 | #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12) |
b481de9c | 1228 | |
52969981 BC |
1229 | /* 1: uCode overrides sequence control field in MAC header. |
1230 | * 0: Driver provides sequence control field in MAC header. | |
1231 | * Set this for management frames, non-QOS data frames, non-unicast frames, | |
1232 | * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ | |
51e9bf5d | 1233 | #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) |
b481de9c | 1234 | |
52969981 BC |
1235 | /* 1: This frame is non-last MPDU; more fragments are coming. |
1236 | * 0: Last fragment, or not using fragmentation. */ | |
51e9bf5d | 1237 | #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) |
b481de9c | 1238 | |
52969981 BC |
1239 | /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. |
1240 | * 0: No TSF required in outgoing frame. | |
1241 | * Set this for transmitting beacons and probe responses. */ | |
51e9bf5d | 1242 | #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) |
b481de9c | 1243 | |
52969981 BC |
1244 | /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword |
1245 | * alignment of frame's payload data field. | |
1246 | * 0: No pad | |
1247 | * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 | |
1248 | * field (but not both). Driver must align frame data (i.e. data following | |
1249 | * MAC header) to DWORD boundary. */ | |
51e9bf5d | 1250 | #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) |
b481de9c | 1251 | |
8236e183 MS |
1252 | /* accelerate aggregation support |
1253 | * 0 - no CCMP encryption; 1 - CCMP encryption */ | |
51e9bf5d | 1254 | #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22) |
8236e183 | 1255 | |
b481de9c | 1256 | /* HCCA-AP - disable duration overwriting. */ |
51e9bf5d | 1257 | #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) |
b481de9c | 1258 | |
52969981 | 1259 | |
b481de9c ZY |
1260 | /* |
1261 | * TX command security control | |
1262 | */ | |
1263 | #define TX_CMD_SEC_WEP 0x01 | |
1264 | #define TX_CMD_SEC_CCM 0x02 | |
1265 | #define TX_CMD_SEC_TKIP 0x03 | |
1266 | #define TX_CMD_SEC_MSK 0x03 | |
1267 | #define TX_CMD_SEC_SHIFT 6 | |
1268 | #define TX_CMD_SEC_KEY128 0x08 | |
1269 | ||
3195cdb7 TW |
1270 | /* |
1271 | * security overhead sizes | |
1272 | */ | |
1273 | #define WEP_IV_LEN 4 | |
1274 | #define WEP_ICV_LEN 4 | |
1275 | #define CCMP_MIC_LEN 8 | |
1276 | #define TKIP_ICV_LEN 4 | |
1277 | ||
3d24a9f7 TW |
1278 | /* |
1279 | * REPLY_TX = 0x1c (command) | |
1280 | */ | |
1281 | ||
b481de9c | 1282 | /* |
52969981 BC |
1283 | * 4965 uCode updates these Tx attempt count values in host DRAM. |
1284 | * Used for managing Tx retries when expecting block-acks. | |
1285 | * Driver should set these fields to 0. | |
b481de9c | 1286 | */ |
2aa6ab86 | 1287 | struct iwl_dram_scratch { |
52969981 BC |
1288 | u8 try_cnt; /* Tx attempts */ |
1289 | u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ | |
b481de9c | 1290 | __le16 reserved; |
ba2d3587 | 1291 | } __packed; |
b481de9c | 1292 | |
83d527d9 | 1293 | struct iwl_tx_cmd { |
52969981 BC |
1294 | /* |
1295 | * MPDU byte count: | |
1296 | * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, | |
1297 | * + 8 byte IV for CCM or TKIP (not used for WEP) | |
1298 | * + Data payload | |
1299 | * + 8-byte MIC (not used for CCM/WEP) | |
1300 | * NOTE: Does not include Tx command bytes, post-MAC pad bytes, | |
1301 | * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i | |
1302 | * Range: 14-2342 bytes. | |
1303 | */ | |
b481de9c | 1304 | __le16 len; |
52969981 BC |
1305 | |
1306 | /* | |
1307 | * MPDU or MSDU byte count for next frame. | |
1308 | * Used for fragmentation and bursting, but not 11n aggregation. | |
1309 | * Same as "len", but for next frame. Set to 0 if not applicable. | |
1310 | */ | |
b481de9c | 1311 | __le16 next_frame_len; |
52969981 BC |
1312 | |
1313 | __le32 tx_flags; /* TX_CMD_FLG_* */ | |
1314 | ||
2aa6ab86 | 1315 | /* uCode may modify this field of the Tx command (in host DRAM!). |
52969981 | 1316 | * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */ |
2aa6ab86 | 1317 | struct iwl_dram_scratch scratch; |
52969981 BC |
1318 | |
1319 | /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */ | |
1320 | __le32 rate_n_flags; /* RATE_MCS_* */ | |
1321 | ||
1322 | /* Index of destination station in uCode's station table */ | |
b481de9c | 1323 | u8 sta_id; |
52969981 BC |
1324 | |
1325 | /* Type of security encryption: CCM or TKIP */ | |
1326 | u8 sec_ctl; /* TX_CMD_SEC_* */ | |
1327 | ||
1328 | /* | |
1329 | * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial | |
1330 | * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for | |
1331 | * data frames, this field may be used to selectively reduce initial | |
1332 | * rate (via non-0 value) for special frames (e.g. management), while | |
1333 | * still supporting rate scaling for all frames. | |
1334 | */ | |
b481de9c ZY |
1335 | u8 initial_rate_index; |
1336 | u8 reserved; | |
b481de9c | 1337 | u8 key[16]; |
b481de9c ZY |
1338 | __le16 next_frame_flags; |
1339 | __le16 reserved2; | |
b481de9c ZY |
1340 | union { |
1341 | __le32 life_time; | |
1342 | __le32 attempt; | |
1343 | } stop_time; | |
52969981 BC |
1344 | |
1345 | /* Host DRAM physical address pointer to "scratch" in this command. | |
1346 | * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */ | |
b481de9c ZY |
1347 | __le32 dram_lsb_ptr; |
1348 | u8 dram_msb_ptr; | |
52969981 | 1349 | |
b481de9c ZY |
1350 | u8 rts_retry_limit; /*byte 50 */ |
1351 | u8 data_retry_limit; /*byte 51 */ | |
b481de9c | 1352 | u8 tid_tspec; |
b481de9c ZY |
1353 | union { |
1354 | __le16 pm_frame_timeout; | |
1355 | __le16 attempt_duration; | |
1356 | } timeout; | |
52969981 BC |
1357 | |
1358 | /* | |
1359 | * Duration of EDCA burst Tx Opportunity, in 32-usec units. | |
1360 | * Set this if txop time is not specified by HCCA protocol (e.g. by AP). | |
1361 | */ | |
b481de9c | 1362 | __le16 driver_txop; |
52969981 BC |
1363 | |
1364 | /* | |
1365 | * MAC header goes here, followed by 2 bytes padding if MAC header | |
1366 | * length is 26 or 30 bytes, followed by payload data | |
1367 | */ | |
b481de9c ZY |
1368 | u8 payload[0]; |
1369 | struct ieee80211_hdr hdr[0]; | |
ba2d3587 | 1370 | } __packed; |
b481de9c | 1371 | |
04569cbe WYG |
1372 | /* |
1373 | * TX command response is sent after *agn* transmission attempts. | |
1374 | * | |
1375 | * both postpone and abort status are expected behavior from uCode. there is | |
1376 | * no special operation required from driver; except for RFKILL_FLUSH, | |
1377 | * which required tx flush host command to flush all the tx frames in queues | |
1378 | */ | |
b481de9c ZY |
1379 | enum { |
1380 | TX_STATUS_SUCCESS = 0x01, | |
1381 | TX_STATUS_DIRECT_DONE = 0x02, | |
04569cbe WYG |
1382 | /* postpone TX */ |
1383 | TX_STATUS_POSTPONE_DELAY = 0x40, | |
1384 | TX_STATUS_POSTPONE_FEW_BYTES = 0x41, | |
1385 | TX_STATUS_POSTPONE_BT_PRIO = 0x42, | |
1386 | TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43, | |
1387 | TX_STATUS_POSTPONE_CALC_TTAK = 0x44, | |
1388 | /* abort TX */ | |
1389 | TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81, | |
b481de9c ZY |
1390 | TX_STATUS_FAIL_SHORT_LIMIT = 0x82, |
1391 | TX_STATUS_FAIL_LONG_LIMIT = 0x83, | |
1392 | TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, | |
04569cbe WYG |
1393 | TX_STATUS_FAIL_DRAIN_FLOW = 0x85, |
1394 | TX_STATUS_FAIL_RFKILL_FLUSH = 0x86, | |
b481de9c ZY |
1395 | TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, |
1396 | TX_STATUS_FAIL_DEST_PS = 0x88, | |
04569cbe | 1397 | TX_STATUS_FAIL_HOST_ABORTED = 0x89, |
b481de9c ZY |
1398 | TX_STATUS_FAIL_BT_RETRY = 0x8a, |
1399 | TX_STATUS_FAIL_STA_INVALID = 0x8b, | |
1400 | TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, | |
1401 | TX_STATUS_FAIL_TID_DISABLE = 0x8d, | |
04569cbe | 1402 | TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e, |
b481de9c | 1403 | TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, |
1d270075 WYG |
1404 | TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90, |
1405 | TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, | |
b481de9c ZY |
1406 | }; |
1407 | ||
1408 | #define TX_PACKET_MODE_REGULAR 0x0000 | |
1409 | #define TX_PACKET_MODE_BURST_SEQ 0x0100 | |
1410 | #define TX_PACKET_MODE_BURST_FIRST 0x0200 | |
1411 | ||
1412 | enum { | |
1413 | TX_POWER_PA_NOT_ACTIVE = 0x0, | |
1414 | }; | |
1415 | ||
1416 | enum { | |
3fd07a1e | 1417 | TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ |
b481de9c ZY |
1418 | TX_STATUS_DELAY_MSK = 0x00000040, |
1419 | TX_STATUS_ABORT_MSK = 0x00000080, | |
1420 | TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ | |
1421 | TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ | |
3fd07a1e | 1422 | TX_RESERVED = 0x00780000, /* bits 19:22 */ |
b481de9c ZY |
1423 | TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ |
1424 | TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ | |
1425 | }; | |
1426 | ||
1427 | /* ******************************* | |
52969981 | 1428 | * TX aggregation status |
b481de9c ZY |
1429 | ******************************* */ |
1430 | ||
1431 | enum { | |
1432 | AGG_TX_STATE_TRANSMITTED = 0x00, | |
1433 | AGG_TX_STATE_UNDERRUN_MSK = 0x01, | |
1434 | AGG_TX_STATE_BT_PRIO_MSK = 0x02, | |
1435 | AGG_TX_STATE_FEW_BYTES_MSK = 0x04, | |
1436 | AGG_TX_STATE_ABORT_MSK = 0x08, | |
1437 | AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10, | |
1438 | AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20, | |
1439 | AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40, | |
1440 | AGG_TX_STATE_SCD_QUERY_MSK = 0x80, | |
1441 | AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100, | |
1442 | AGG_TX_STATE_RESPONSE_MSK = 0x1ff, | |
1443 | AGG_TX_STATE_DUMP_TX_MSK = 0x200, | |
1444 | AGG_TX_STATE_DELAY_TX_MSK = 0x400 | |
1445 | }; | |
1446 | ||
e1b3fa0c WYG |
1447 | #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */ |
1448 | #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */ | |
1449 | ||
3fd07a1e TW |
1450 | #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \ |
1451 | AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \ | |
1452 | AGG_TX_STATE_LAST_SENT_BT_KILL_MSK) | |
b481de9c | 1453 | |
52969981 | 1454 | /* # tx attempts for first frame in aggregation */ |
b481de9c ZY |
1455 | #define AGG_TX_STATE_TRY_CNT_POS 12 |
1456 | #define AGG_TX_STATE_TRY_CNT_MSK 0xf000 | |
1457 | ||
52969981 | 1458 | /* Command ID and sequence number of Tx command for this frame */ |
b481de9c ZY |
1459 | #define AGG_TX_STATE_SEQ_NUM_POS 16 |
1460 | #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000 | |
1461 | ||
1462 | /* | |
1463 | * REPLY_TX = 0x1c (response) | |
52969981 BC |
1464 | * |
1465 | * This response may be in one of two slightly different formats, indicated | |
1466 | * by the frame_count field: | |
1467 | * | |
1468 | * 1) No aggregation (frame_count == 1). This reports Tx results for | |
1469 | * a single frame. Multiple attempts, at various bit rates, may have | |
1470 | * been made for this frame. | |
1471 | * | |
1472 | * 2) Aggregation (frame_count > 1). This reports Tx results for | |
1473 | * 2 or more frames that used block-acknowledge. All frames were | |
1474 | * transmitted at same rate. Rate scaling may have been used if first | |
1475 | * frame in this new agg block failed in previous agg block(s). | |
1476 | * | |
1477 | * Note that, for aggregation, ACK (block-ack) status is not delivered here; | |
767d055d WYG |
1478 | * block-ack has not been received by the time the agn device records |
1479 | * this status. | |
52969981 | 1480 | * This status relates to reasons the tx might have been blocked or aborted |
767d055d | 1481 | * within the sending station (this agn device), rather than whether it was |
52969981 | 1482 | * received successfully by the destination station. |
b481de9c | 1483 | */ |
001caff0 RR |
1484 | struct agg_tx_status { |
1485 | __le16 status; | |
1486 | __le16 sequence; | |
ba2d3587 | 1487 | } __packed; |
001caff0 | 1488 | |
3fd07a1e TW |
1489 | /* |
1490 | * definitions for initial rate index field | |
a96a27f9 | 1491 | * bits [3:0] initial rate index |
3fd07a1e TW |
1492 | * bits [6:4] rate table color, used for the initial rate |
1493 | * bit-7 invalid rate indication | |
1494 | * i.e. rate was not chosen from rate table | |
1495 | * or rate table color was changed during frame retries | |
1496 | * refer tlc rate info | |
1497 | */ | |
1498 | ||
1499 | #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0 | |
1500 | #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f | |
1501 | #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4 | |
1502 | #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70 | |
1503 | #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80 | |
1504 | ||
1505 | /* refer to ra_tid */ | |
898dade1 WYG |
1506 | #define IWLAGN_TX_RES_TID_POS 0 |
1507 | #define IWLAGN_TX_RES_TID_MSK 0x0f | |
1508 | #define IWLAGN_TX_RES_RA_POS 4 | |
1509 | #define IWLAGN_TX_RES_RA_MSK 0xf0 | |
3fd07a1e | 1510 | |
898dade1 | 1511 | struct iwlagn_tx_resp { |
001caff0 RR |
1512 | u8 frame_count; /* 1 no aggregation, >1 aggregation */ |
1513 | u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ | |
1514 | u8 failure_rts; /* # failures due to unsuccessful RTS */ | |
1515 | u8 failure_frame; /* # failures due to no ACK (unused for agg) */ | |
1516 | ||
1517 | /* For non-agg: Rate at which frame was successful. | |
1518 | * For agg: Rate at which all frames were transmitted. */ | |
1519 | __le32 rate_n_flags; /* RATE_MCS_* */ | |
1520 | ||
1521 | /* For non-agg: RTS + CTS + frame tx attempts time + ACK. | |
1522 | * For agg: RTS + CTS + aggregation tx time + block-ack time. */ | |
1523 | __le16 wireless_media_time; /* uSecs */ | |
1524 | ||
3fd07a1e TW |
1525 | u8 pa_status; /* RF power amplifier measurement (not used) */ |
1526 | u8 pa_integ_res_a[3]; | |
1527 | u8 pa_integ_res_b[3]; | |
1528 | u8 pa_integ_res_C[3]; | |
001caff0 RR |
1529 | |
1530 | __le32 tfd_info; | |
1531 | __le16 seq_ctl; | |
1532 | __le16 byte_cnt; | |
3fd07a1e TW |
1533 | u8 tlc_info; |
1534 | u8 ra_tid; /* tid (0:3), sta_id (4:7) */ | |
1535 | __le16 frame_ctrl; | |
001caff0 RR |
1536 | /* |
1537 | * For non-agg: frame status TX_STATUS_* | |
1538 | * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status | |
1539 | * fields follow this one, up to frame_count. | |
1540 | * Bit fields: | |
1541 | * 11- 0: AGG_TX_STATE_* status code | |
1542 | * 15-12: Retry count for 1st frame in aggregation (retries | |
1543 | * occur if tx failed for this frame when it was a | |
1544 | * member of a previous aggregation block). If rate | |
1545 | * scaling is used, retry count indicates the rate | |
1546 | * table entry used for all frames in the new agg. | |
1547 | * 31-16: Sequence # for this frame's Tx cmd (not SSN!) | |
1548 | */ | |
1549 | struct agg_tx_status status; /* TX status (in aggregation - | |
1550 | * status of 1st frame) */ | |
ba2d3587 | 1551 | } __packed; |
b481de9c ZY |
1552 | /* |
1553 | * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) | |
52969981 BC |
1554 | * |
1555 | * Reports Block-Acknowledge from recipient station | |
b481de9c | 1556 | */ |
653fa4a0 | 1557 | struct iwl_compressed_ba_resp { |
b481de9c ZY |
1558 | __le32 sta_addr_lo32; |
1559 | __le16 sta_addr_hi16; | |
1560 | __le16 reserved; | |
52969981 BC |
1561 | |
1562 | /* Index of recipient (BA-sending) station in uCode's station table */ | |
b481de9c ZY |
1563 | u8 sta_id; |
1564 | u8 tid; | |
fe01b477 RR |
1565 | __le16 seq_ctl; |
1566 | __le64 bitmap; | |
b481de9c ZY |
1567 | __le16 scd_flow; |
1568 | __le16 scd_ssn; | |
8829c9e2 WYG |
1569 | /* following only for 5000 series and up */ |
1570 | u8 txed; /* number of frames sent */ | |
1571 | u8 txed_2_done; /* number of frames acked */ | |
ba2d3587 | 1572 | } __packed; |
b481de9c ZY |
1573 | |
1574 | /* | |
1575 | * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) | |
2bdc7031 | 1576 | * |
3d24a9f7 | 1577 | */ |
3d24a9f7 | 1578 | |
b481de9c | 1579 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ |
8a1b0245 | 1580 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) |
b481de9c | 1581 | |
2bdc7031 | 1582 | /* # of EDCA prioritized tx fifos */ |
b481de9c | 1583 | #define LINK_QUAL_AC_NUM AC_NUM |
2bdc7031 BC |
1584 | |
1585 | /* # entries in rate scale table to support Tx retries */ | |
b481de9c ZY |
1586 | #define LINK_QUAL_MAX_RETRY_NUM 16 |
1587 | ||
2bdc7031 | 1588 | /* Tx antenna selection values */ |
8a1b0245 RC |
1589 | #define LINK_QUAL_ANT_A_MSK (1 << 0) |
1590 | #define LINK_QUAL_ANT_B_MSK (1 << 1) | |
b481de9c ZY |
1591 | #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) |
1592 | ||
2bdc7031 BC |
1593 | |
1594 | /** | |
66c73db7 | 1595 | * struct iwl_link_qual_general_params |
2bdc7031 BC |
1596 | * |
1597 | * Used in REPLY_TX_LINK_QUALITY_CMD | |
1598 | */ | |
66c73db7 | 1599 | struct iwl_link_qual_general_params { |
b481de9c | 1600 | u8 flags; |
2bdc7031 BC |
1601 | |
1602 | /* No entries at or above this (driver chosen) index contain MIMO */ | |
b481de9c | 1603 | u8 mimo_delimiter; |
2bdc7031 BC |
1604 | |
1605 | /* Best single antenna to use for single stream (legacy, SISO). */ | |
1606 | u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ | |
1607 | ||
1608 | /* Best antennas to use for MIMO (unused for 4965, assumes both). */ | |
1609 | u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ | |
1610 | ||
1611 | /* | |
1612 | * If driver needs to use different initial rates for different | |
1613 | * EDCA QOS access categories (as implemented by tx fifos 0-3), | |
1614 | * this table will set that up, by indicating the indexes in the | |
1615 | * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start. | |
1616 | * Otherwise, driver should set all entries to 0. | |
1617 | * | |
1618 | * Entry usage: | |
1619 | * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice | |
1620 | * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. | |
1621 | */ | |
b481de9c | 1622 | u8 start_rate_index[LINK_QUAL_AC_NUM]; |
ba2d3587 | 1623 | } __packed; |
b481de9c | 1624 | |
13c33a09 | 1625 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ |
b15826a7 WYG |
1626 | #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) |
1627 | #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) | |
13c33a09 WYG |
1628 | |
1629 | #define LINK_QUAL_AGG_DISABLE_START_DEF (3) | |
1630 | #define LINK_QUAL_AGG_DISABLE_START_MAX (255) | |
1631 | #define LINK_QUAL_AGG_DISABLE_START_MIN (0) | |
1632 | ||
4263108c | 1633 | #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) |
b623a9f7 | 1634 | #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) |
13c33a09 WYG |
1635 | #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) |
1636 | ||
2bdc7031 | 1637 | /** |
66c73db7 | 1638 | * struct iwl_link_qual_agg_params |
2bdc7031 BC |
1639 | * |
1640 | * Used in REPLY_TX_LINK_QUALITY_CMD | |
1641 | */ | |
66c73db7 | 1642 | struct iwl_link_qual_agg_params { |
2bdc7031 | 1643 | |
7469701e WYG |
1644 | /* |
1645 | *Maximum number of uSec in aggregation. | |
1646 | * default set to 4000 (4 milliseconds) if not configured in .cfg | |
1647 | */ | |
b481de9c | 1648 | __le16 agg_time_limit; |
2bdc7031 BC |
1649 | |
1650 | /* | |
1651 | * Number of Tx retries allowed for a frame, before that frame will | |
1652 | * no longer be considered for the start of an aggregation sequence | |
1653 | * (scheduler will then try to tx it as single frame). | |
1654 | * Driver should set this to 3. | |
1655 | */ | |
b481de9c | 1656 | u8 agg_dis_start_th; |
2bdc7031 BC |
1657 | |
1658 | /* | |
1659 | * Maximum number of frames in aggregation. | |
1660 | * 0 = no limit (default). 1 = no aggregation. | |
1661 | * Other values = max # frames in aggregation. | |
1662 | */ | |
b481de9c | 1663 | u8 agg_frame_cnt_limit; |
2bdc7031 | 1664 | |
b481de9c | 1665 | __le32 reserved; |
ba2d3587 | 1666 | } __packed; |
b481de9c ZY |
1667 | |
1668 | /* | |
1669 | * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) | |
2bdc7031 | 1670 | * |
767d055d | 1671 | * For agn devices only; 3945 uses REPLY_RATE_SCALE. |
2bdc7031 | 1672 | * |
767d055d WYG |
1673 | * Each station in the agn device's internal station table has its own table |
1674 | * of 16 | |
2bdc7031 BC |
1675 | * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when |
1676 | * an ACK is not received. This command replaces the entire table for | |
1677 | * one station. | |
1678 | * | |
767d055d WYG |
1679 | * NOTE: Station must already be in agn device's station table. |
1680 | * Use REPLY_ADD_STA. | |
2bdc7031 BC |
1681 | * |
1682 | * The rate scaling procedures described below work well. Of course, other | |
1683 | * procedures are possible, and may work better for particular environments. | |
1684 | * | |
1685 | * | |
1686 | * FILLING THE RATE TABLE | |
1687 | * | |
1688 | * Given a particular initial rate and mode, as determined by the rate | |
1689 | * scaling algorithm described below, the Linux driver uses the following | |
1690 | * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the | |
1691 | * Link Quality command: | |
1692 | * | |
1693 | * | |
1694 | * 1) If using High-throughput (HT) (SISO or MIMO) initial rate: | |
1695 | * a) Use this same initial rate for first 3 entries. | |
1696 | * b) Find next lower available rate using same mode (SISO or MIMO), | |
1697 | * use for next 3 entries. If no lower rate available, switch to | |
7aafef1c | 1698 | * legacy mode (no HT40 channel, no MIMO, no short guard interval). |
2bdc7031 BC |
1699 | * c) If using MIMO, set command's mimo_delimiter to number of entries |
1700 | * using MIMO (3 or 6). | |
7aafef1c | 1701 | * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel, |
2bdc7031 BC |
1702 | * no MIMO, no short guard interval), at the next lower bit rate |
1703 | * (e.g. if second HT bit rate was 54, try 48 legacy), and follow | |
1704 | * legacy procedure for remaining table entries. | |
1705 | * | |
1706 | * 2) If using legacy initial rate: | |
1707 | * a) Use the initial rate for only one entry. | |
1708 | * b) For each following entry, reduce the rate to next lower available | |
1709 | * rate, until reaching the lowest available rate. | |
1710 | * c) When reducing rate, also switch antenna selection. | |
1711 | * d) Once lowest available rate is reached, repeat this rate until | |
1712 | * rate table is filled (16 entries), switching antenna each entry. | |
1713 | * | |
1714 | * | |
1715 | * ACCUMULATING HISTORY | |
1716 | * | |
767d055d WYG |
1717 | * The rate scaling algorithm for agn devices, as implemented in Linux driver, |
1718 | * uses two sets of frame Tx success history: One for the current/active | |
1719 | * modulation mode, and one for a speculative/search mode that is being | |
1720 | * attempted. If the speculative mode turns out to be more effective (i.e. | |
1721 | * actual transfer rate is better), then the driver continues to use the | |
1722 | * speculative mode as the new current active mode. | |
2bdc7031 BC |
1723 | * |
1724 | * Each history set contains, separately for each possible rate, data for a | |
1725 | * sliding window of the 62 most recent tx attempts at that rate. The data | |
1726 | * includes a shifting bitmap of success(1)/failure(0), and sums of successful | |
1727 | * and attempted frames, from which the driver can additionally calculate a | |
1728 | * success ratio (success / attempted) and number of failures | |
1729 | * (attempted - success), and control the size of the window (attempted). | |
1730 | * The driver uses the bit map to remove successes from the success sum, as | |
1731 | * the oldest tx attempts fall out of the window. | |
1732 | * | |
767d055d WYG |
1733 | * When the agn device makes multiple tx attempts for a given frame, each |
1734 | * attempt might be at a different rate, and have different modulation | |
1735 | * characteristics (e.g. antenna, fat channel, short guard interval), as set | |
1736 | * up in the rate scaling table in the Link Quality command. The driver must | |
1737 | * determine which rate table entry was used for each tx attempt, to determine | |
1738 | * which rate-specific history to update, and record only those attempts that | |
2bdc7031 BC |
1739 | * match the modulation characteristics of the history set. |
1740 | * | |
1741 | * When using block-ack (aggregation), all frames are transmitted at the same | |
a96a27f9 | 1742 | * rate, since there is no per-attempt acknowledgment from the destination |
2bdc7031 BC |
1743 | * station. The Tx response struct iwl_tx_resp indicates the Tx rate in |
1744 | * rate_n_flags field. After receiving a block-ack, the driver can update | |
1745 | * history for the entire block all at once. | |
1746 | * | |
1747 | * | |
1748 | * FINDING BEST STARTING RATE: | |
1749 | * | |
1750 | * When working with a selected initial modulation mode (see below), the | |
1751 | * driver attempts to find a best initial rate. The initial rate is the | |
1752 | * first entry in the Link Quality command's rate table. | |
1753 | * | |
1754 | * 1) Calculate actual throughput (success ratio * expected throughput, see | |
1755 | * table below) for current initial rate. Do this only if enough frames | |
1756 | * have been attempted to make the value meaningful: at least 6 failed | |
1757 | * tx attempts, or at least 8 successes. If not enough, don't try rate | |
1758 | * scaling yet. | |
1759 | * | |
1760 | * 2) Find available rates adjacent to current initial rate. Available means: | |
1761 | * a) supported by hardware && | |
1762 | * b) supported by association && | |
1763 | * c) within any constraints selected by user | |
1764 | * | |
1765 | * 3) Gather measured throughputs for adjacent rates. These might not have | |
1766 | * enough history to calculate a throughput. That's okay, we might try | |
1767 | * using one of them anyway! | |
1768 | * | |
1769 | * 4) Try decreasing rate if, for current rate: | |
1770 | * a) success ratio is < 15% || | |
1771 | * b) lower adjacent rate has better measured throughput || | |
1772 | * c) higher adjacent rate has worse throughput, and lower is unmeasured | |
1773 | * | |
1774 | * As a sanity check, if decrease was determined above, leave rate | |
1775 | * unchanged if: | |
1776 | * a) lower rate unavailable | |
1777 | * b) success ratio at current rate > 85% (very good) | |
1778 | * c) current measured throughput is better than expected throughput | |
1779 | * of lower rate (under perfect 100% tx conditions, see table below) | |
1780 | * | |
1781 | * 5) Try increasing rate if, for current rate: | |
1782 | * a) success ratio is < 15% || | |
1783 | * b) both adjacent rates' throughputs are unmeasured (try it!) || | |
1784 | * b) higher adjacent rate has better measured throughput || | |
1785 | * c) lower adjacent rate has worse throughput, and higher is unmeasured | |
1786 | * | |
1787 | * As a sanity check, if increase was determined above, leave rate | |
1788 | * unchanged if: | |
1789 | * a) success ratio at current rate < 70%. This is not particularly | |
1790 | * good performance; higher rate is sure to have poorer success. | |
1791 | * | |
1792 | * 6) Re-evaluate the rate after each tx frame. If working with block- | |
1793 | * acknowledge, history and statistics may be calculated for the entire | |
1794 | * block (including prior history that fits within the history windows), | |
1795 | * before re-evaluation. | |
1796 | * | |
1797 | * FINDING BEST STARTING MODULATION MODE: | |
1798 | * | |
1799 | * After working with a modulation mode for a "while" (and doing rate scaling), | |
1800 | * the driver searches for a new initial mode in an attempt to improve | |
1801 | * throughput. The "while" is measured by numbers of attempted frames: | |
1802 | * | |
1803 | * For legacy mode, search for new mode after: | |
1804 | * 480 successful frames, or 160 failed frames | |
1805 | * For high-throughput modes (SISO or MIMO), search for new mode after: | |
1806 | * 4500 successful frames, or 400 failed frames | |
1807 | * | |
1808 | * Mode switch possibilities are (3 for each mode): | |
1809 | * | |
1810 | * For legacy: | |
1811 | * Change antenna, try SISO (if HT association), try MIMO (if HT association) | |
1812 | * For SISO: | |
1813 | * Change antenna, try MIMO, try shortened guard interval (SGI) | |
1814 | * For MIMO: | |
1815 | * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI) | |
1816 | * | |
1817 | * When trying a new mode, use the same bit rate as the old/current mode when | |
1818 | * trying antenna switches and shortened guard interval. When switching to | |
1819 | * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate | |
1820 | * for which the expected throughput (under perfect conditions) is about the | |
1821 | * same or slightly better than the actual measured throughput delivered by | |
1822 | * the old/current mode. | |
1823 | * | |
1824 | * Actual throughput can be estimated by multiplying the expected throughput | |
1825 | * by the success ratio (successful / attempted tx frames). Frame size is | |
1826 | * not considered in this calculation; it assumes that frame size will average | |
1827 | * out to be fairly consistent over several samples. The following are | |
1828 | * metric values for expected throughput assuming 100% success ratio. | |
1829 | * Only G band has support for CCK rates: | |
1830 | * | |
1831 | * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60 | |
1832 | * | |
1833 | * G: 7 13 35 58 40 57 72 98 121 154 177 186 186 | |
1834 | * A: 0 0 0 0 40 57 72 98 121 154 177 186 186 | |
1835 | * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202 | |
1836 | * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211 | |
1837 | * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251 | |
1838 | * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257 | |
1839 | * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257 | |
1840 | * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264 | |
1841 | * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289 | |
1842 | * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293 | |
1843 | * | |
1844 | * After the new mode has been tried for a short while (minimum of 6 failed | |
1845 | * frames or 8 successful frames), compare success ratio and actual throughput | |
1846 | * estimate of the new mode with the old. If either is better with the new | |
1847 | * mode, continue to use the new mode. | |
1848 | * | |
1849 | * Continue comparing modes until all 3 possibilities have been tried. | |
1850 | * If moving from legacy to HT, try all 3 possibilities from the new HT | |
1851 | * mode. After trying all 3, a best mode is found. Continue to use this mode | |
1852 | * for the longer "while" described above (e.g. 480 successful frames for | |
1853 | * legacy), and then repeat the search process. | |
1854 | * | |
b481de9c | 1855 | */ |
66c73db7 | 1856 | struct iwl_link_quality_cmd { |
2bdc7031 BC |
1857 | |
1858 | /* Index of destination/recipient station in uCode's station table */ | |
b481de9c ZY |
1859 | u8 sta_id; |
1860 | u8 reserved1; | |
2bdc7031 | 1861 | __le16 control; /* not used */ |
66c73db7 TW |
1862 | struct iwl_link_qual_general_params general_params; |
1863 | struct iwl_link_qual_agg_params agg_params; | |
2bdc7031 BC |
1864 | |
1865 | /* | |
1866 | * Rate info; when using rate-scaling, Tx command's initial_rate_index | |
1867 | * specifies 1st Tx rate attempted, via index into this table. | |
767d055d | 1868 | * agn devices works its way through table when retrying Tx. |
2bdc7031 | 1869 | */ |
b481de9c | 1870 | struct { |
2bdc7031 | 1871 | __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ |
b481de9c ZY |
1872 | } rs_table[LINK_QUAL_MAX_RETRY_NUM]; |
1873 | __le32 reserved2; | |
ba2d3587 | 1874 | } __packed; |
b481de9c | 1875 | |
dab1c161 WYG |
1876 | /* |
1877 | * BT configuration enable flags: | |
1878 | * bit 0 - 1: BT channel announcement enabled | |
1879 | * 0: disable | |
1880 | * bit 1 - 1: priority of BT device enabled | |
1881 | * 0: disable | |
1882 | * bit 2 - 1: BT 2 wire support enabled | |
1883 | * 0: disable | |
1884 | */ | |
456d0f76 | 1885 | #define BT_COEX_DISABLE (0x0) |
dab1c161 WYG |
1886 | #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0) |
1887 | #define BT_ENABLE_PRIORITY BIT(1) | |
1888 | #define BT_ENABLE_2_WIRE BIT(2) | |
456d0f76 | 1889 | |
06702a73 WYG |
1890 | #define BT_COEX_DISABLE (0x0) |
1891 | #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY) | |
1892 | ||
456d0f76 WYG |
1893 | #define BT_LEAD_TIME_MIN (0x0) |
1894 | #define BT_LEAD_TIME_DEF (0x1E) | |
1895 | #define BT_LEAD_TIME_MAX (0xFF) | |
1896 | ||
1897 | #define BT_MAX_KILL_MIN (0x1) | |
1898 | #define BT_MAX_KILL_DEF (0x5) | |
1899 | #define BT_MAX_KILL_MAX (0xFF) | |
1900 | ||
22bf59a0 WYG |
1901 | #define BT_DURATION_LIMIT_DEF 625 |
1902 | #define BT_DURATION_LIMIT_MAX 1250 | |
1903 | #define BT_DURATION_LIMIT_MIN 625 | |
1904 | ||
1905 | #define BT_ON_THRESHOLD_DEF 4 | |
1906 | #define BT_ON_THRESHOLD_MAX 1000 | |
1907 | #define BT_ON_THRESHOLD_MIN 1 | |
1908 | ||
1909 | #define BT_FRAG_THRESHOLD_DEF 0 | |
1910 | #define BT_FRAG_THRESHOLD_MAX 0 | |
1911 | #define BT_FRAG_THRESHOLD_MIN 0 | |
1912 | ||
95a5ede3 WYG |
1913 | #define BT_AGG_THRESHOLD_DEF 1200 |
1914 | #define BT_AGG_THRESHOLD_MAX 8000 | |
1915 | #define BT_AGG_THRESHOLD_MIN 400 | |
22bf59a0 | 1916 | |
b481de9c ZY |
1917 | /* |
1918 | * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) | |
3058f021 | 1919 | * |
767d055d | 1920 | * 3945 and agn devices support hardware handshake with Bluetooth device on |
3058f021 | 1921 | * same platform. Bluetooth device alerts wireless device when it will Tx; |
a96a27f9 | 1922 | * wireless device can delay or kill its own Tx to accommodate. |
b481de9c | 1923 | */ |
2aa6ab86 | 1924 | struct iwl_bt_cmd { |
b481de9c ZY |
1925 | u8 flags; |
1926 | u8 lead_time; | |
1927 | u8 max_kill; | |
1928 | u8 reserved; | |
1929 | __le32 kill_ack_mask; | |
1930 | __le32 kill_cts_mask; | |
ba2d3587 | 1931 | } __packed; |
b481de9c | 1932 | |
b6e116e8 | 1933 | #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0) |
670245ed | 1934 | |
b6e116e8 WYG |
1935 | #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5)) |
1936 | #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3 | |
1937 | #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0 | |
1938 | #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1 | |
1939 | #define IWLAGN_BT_FLAG_COEX_MODE_3W 2 | |
1940 | #define IWLAGN_BT_FLAG_COEX_MODE_4W 3 | |
670245ed | 1941 | |
eeb1f83f WYG |
1942 | #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) |
1943 | /* Disable Sync PSPoll on SCO/eSCO */ | |
1944 | #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) | |
670245ed | 1945 | |
207ecc5e MV |
1946 | #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */ |
1947 | #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */ | |
1948 | ||
b6e116e8 WYG |
1949 | #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF |
1950 | #define IWLAGN_BT_PRIO_BOOST_MIN 0x00 | |
1951 | #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0 | |
670245ed | 1952 | |
b6e116e8 | 1953 | #define IWLAGN_BT_MAX_KILL_DEFAULT 5 |
670245ed | 1954 | |
b6e116e8 | 1955 | #define IWLAGN_BT3_T7_DEFAULT 1 |
670245ed | 1956 | |
05433df2 WYG |
1957 | #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) |
1958 | #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) | |
506aa156 | 1959 | #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff) |
670245ed | 1960 | |
b6e116e8 | 1961 | #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 |
670245ed | 1962 | |
b6e116e8 | 1963 | #define IWLAGN_BT3_T2_DEFAULT 0xc |
670245ed | 1964 | |
b6e116e8 WYG |
1965 | #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0)) |
1966 | #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1)) | |
1967 | #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2)) | |
1968 | #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3)) | |
1969 | #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4)) | |
1970 | #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5)) | |
1971 | #define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6)) | |
1972 | #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7)) | |
670245ed | 1973 | |
b6e116e8 WYG |
1974 | #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \ |
1975 | IWLAGN_BT_VALID_BOOST | \ | |
1976 | IWLAGN_BT_VALID_MAX_KILL | \ | |
1977 | IWLAGN_BT_VALID_3W_TIMERS | \ | |
1978 | IWLAGN_BT_VALID_KILL_ACK_MASK | \ | |
1979 | IWLAGN_BT_VALID_KILL_CTS_MASK | \ | |
1980 | IWLAGN_BT_VALID_BT4_TIMES | \ | |
1981 | IWLAGN_BT_VALID_3W_LUT) | |
670245ed | 1982 | |
6013270a | 1983 | struct iwl_basic_bt_cmd { |
670245ed JB |
1984 | u8 flags; |
1985 | u8 ledtime; /* unused */ | |
1986 | u8 max_kill; | |
1987 | u8 bt3_timer_t7_value; | |
1988 | __le32 kill_ack_mask; | |
1989 | __le32 kill_cts_mask; | |
1990 | u8 bt3_prio_sample_time; | |
1991 | u8 bt3_timer_t2_value; | |
1992 | __le16 bt4_reaction_time; /* unused */ | |
1993 | __le32 bt3_lookup_table[12]; | |
1994 | __le16 bt4_decision_time; /* unused */ | |
1995 | __le16 valid; | |
6013270a WYG |
1996 | }; |
1997 | ||
1998 | struct iwl6000_bt_cmd { | |
1999 | struct iwl_basic_bt_cmd basic; | |
670245ed | 2000 | u8 prio_boost; |
b345f4da WYG |
2001 | /* |
2002 | * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask | |
2003 | * if configure the following patterns | |
2004 | */ | |
2005 | u8 tx_prio_boost; /* SW boost of WiFi tx priority */ | |
2006 | __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ | |
670245ed JB |
2007 | }; |
2008 | ||
d6f62655 | 2009 | struct iwl2000_bt_cmd { |
6013270a | 2010 | struct iwl_basic_bt_cmd basic; |
d6f62655 WYG |
2011 | __le32 prio_boost; |
2012 | /* | |
2013 | * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask | |
2014 | * if configure the following patterns | |
2015 | */ | |
2016 | u8 reserved; | |
2017 | u8 tx_prio_boost; /* SW boost of WiFi tx priority */ | |
2018 | __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ | |
2019 | }; | |
2020 | ||
b6e116e8 | 2021 | #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0)) |
9e4afc21 | 2022 | |
b6e116e8 | 2023 | struct iwlagn_bt_sco_cmd { |
9e4afc21 JB |
2024 | __le32 flags; |
2025 | }; | |
2026 | ||
b481de9c ZY |
2027 | /****************************************************************************** |
2028 | * (6) | |
2029 | * Spectrum Management (802.11h) Commands, Responses, Notifications: | |
2030 | * | |
2031 | *****************************************************************************/ | |
2032 | ||
2033 | /* | |
2034 | * Spectrum Management | |
2035 | */ | |
2036 | #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ | |
2037 | RXON_FILTER_CTL2HOST_MSK | \ | |
2038 | RXON_FILTER_ACCEPT_GRP_MSK | \ | |
2039 | RXON_FILTER_DIS_DECRYPT_MSK | \ | |
2040 | RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ | |
2041 | RXON_FILTER_ASSOC_MSK | \ | |
2042 | RXON_FILTER_BCON_AWARE_MSK) | |
2043 | ||
2aa6ab86 | 2044 | struct iwl_measure_channel { |
b481de9c ZY |
2045 | __le32 duration; /* measurement duration in extended beacon |
2046 | * format */ | |
2047 | u8 channel; /* channel to measure */ | |
2aa6ab86 | 2048 | u8 type; /* see enum iwl_measure_type */ |
b481de9c | 2049 | __le16 reserved; |
ba2d3587 | 2050 | } __packed; |
b481de9c ZY |
2051 | |
2052 | /* | |
2053 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) | |
2054 | */ | |
2aa6ab86 | 2055 | struct iwl_spectrum_cmd { |
b481de9c ZY |
2056 | __le16 len; /* number of bytes starting from token */ |
2057 | u8 token; /* token id */ | |
2058 | u8 id; /* measurement id -- 0 or 1 */ | |
2059 | u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ | |
2060 | u8 periodic; /* 1 = periodic */ | |
2061 | __le16 path_loss_timeout; | |
2062 | __le32 start_time; /* start time in extended beacon format */ | |
2063 | __le32 reserved2; | |
2064 | __le32 flags; /* rxon flags */ | |
2065 | __le32 filter_flags; /* rxon filter flags */ | |
2066 | __le16 channel_count; /* minimum 1, maximum 10 */ | |
2067 | __le16 reserved3; | |
2aa6ab86 | 2068 | struct iwl_measure_channel channels[10]; |
ba2d3587 | 2069 | } __packed; |
b481de9c ZY |
2070 | |
2071 | /* | |
2072 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) | |
2073 | */ | |
2aa6ab86 | 2074 | struct iwl_spectrum_resp { |
b481de9c ZY |
2075 | u8 token; |
2076 | u8 id; /* id of the prior command replaced, or 0xff */ | |
2077 | __le16 status; /* 0 - command will be handled | |
2078 | * 1 - cannot handle (conflicts with another | |
2079 | * measurement) */ | |
ba2d3587 | 2080 | } __packed; |
b481de9c | 2081 | |
2aa6ab86 | 2082 | enum iwl_measurement_state { |
b481de9c ZY |
2083 | IWL_MEASUREMENT_START = 0, |
2084 | IWL_MEASUREMENT_STOP = 1, | |
2085 | }; | |
2086 | ||
2aa6ab86 | 2087 | enum iwl_measurement_status { |
b481de9c ZY |
2088 | IWL_MEASUREMENT_OK = 0, |
2089 | IWL_MEASUREMENT_CONCURRENT = 1, | |
2090 | IWL_MEASUREMENT_CSA_CONFLICT = 2, | |
2091 | IWL_MEASUREMENT_TGH_CONFLICT = 3, | |
2092 | /* 4-5 reserved */ | |
2093 | IWL_MEASUREMENT_STOPPED = 6, | |
2094 | IWL_MEASUREMENT_TIMEOUT = 7, | |
2095 | IWL_MEASUREMENT_PERIODIC_FAILED = 8, | |
2096 | }; | |
2097 | ||
2098 | #define NUM_ELEMENTS_IN_HISTOGRAM 8 | |
2099 | ||
2aa6ab86 | 2100 | struct iwl_measurement_histogram { |
b481de9c ZY |
2101 | __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ |
2102 | __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ | |
ba2d3587 | 2103 | } __packed; |
b481de9c ZY |
2104 | |
2105 | /* clear channel availability counters */ | |
2aa6ab86 | 2106 | struct iwl_measurement_cca_counters { |
b481de9c ZY |
2107 | __le32 ofdm; |
2108 | __le32 cck; | |
ba2d3587 | 2109 | } __packed; |
b481de9c | 2110 | |
2aa6ab86 | 2111 | enum iwl_measure_type { |
b481de9c ZY |
2112 | IWL_MEASURE_BASIC = (1 << 0), |
2113 | IWL_MEASURE_CHANNEL_LOAD = (1 << 1), | |
2114 | IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), | |
2115 | IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), | |
2116 | IWL_MEASURE_FRAME = (1 << 4), | |
2117 | /* bits 5:6 are reserved */ | |
2118 | IWL_MEASURE_IDLE = (1 << 7), | |
2119 | }; | |
2120 | ||
2121 | /* | |
2122 | * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) | |
2123 | */ | |
2aa6ab86 | 2124 | struct iwl_spectrum_notification { |
b481de9c ZY |
2125 | u8 id; /* measurement id -- 0 or 1 */ |
2126 | u8 token; | |
2127 | u8 channel_index; /* index in measurement channel list */ | |
2128 | u8 state; /* 0 - start, 1 - stop */ | |
2129 | __le32 start_time; /* lower 32-bits of TSF */ | |
2130 | u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ | |
2131 | u8 channel; | |
2aa6ab86 | 2132 | u8 type; /* see enum iwl_measurement_type */ |
b481de9c ZY |
2133 | u8 reserved1; |
2134 | /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only | |
2135 | * valid if applicable for measurement type requested. */ | |
2136 | __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ | |
2137 | __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ | |
2138 | __le32 cca_time; /* channel load time in usecs */ | |
2139 | u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - | |
2140 | * unidentified */ | |
2141 | u8 reserved2[3]; | |
2aa6ab86 | 2142 | struct iwl_measurement_histogram histogram; |
b481de9c | 2143 | __le32 stop_time; /* lower 32-bits of TSF */ |
2aa6ab86 | 2144 | __le32 status; /* see iwl_measurement_status */ |
ba2d3587 | 2145 | } __packed; |
b481de9c ZY |
2146 | |
2147 | /****************************************************************************** | |
2148 | * (7) | |
2149 | * Power Management Commands, Responses, Notifications: | |
2150 | * | |
2151 | *****************************************************************************/ | |
2152 | ||
2153 | /** | |
ca579617 | 2154 | * struct iwl_powertable_cmd - Power Table Command |
b481de9c ZY |
2155 | * @flags: See below: |
2156 | * | |
2157 | * POWER_TABLE_CMD = 0x77 (command, has simple generic response) | |
2158 | * | |
2159 | * PM allow: | |
2160 | * bit 0 - '0' Driver not allow power management | |
2161 | * '1' Driver allow PM (use rest of parameters) | |
e312c24c | 2162 | * |
b481de9c ZY |
2163 | * uCode send sleep notifications: |
2164 | * bit 1 - '0' Don't send sleep notification | |
2165 | * '1' send sleep notification (SEND_PM_NOTIFICATION) | |
e312c24c | 2166 | * |
b481de9c ZY |
2167 | * Sleep over DTIM |
2168 | * bit 2 - '0' PM have to walk up every DTIM | |
2169 | * '1' PM could sleep over DTIM till listen Interval. | |
e312c24c | 2170 | * |
b481de9c | 2171 | * PCI power managed |
e7b63581 TW |
2172 | * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1) |
2173 | * '1' !(PCI_CFG_LINK_CTRL & 0x1) | |
e312c24c JB |
2174 | * |
2175 | * Fast PD | |
2176 | * bit 4 - '1' Put radio to sleep when receiving frame for others | |
2177 | * | |
b481de9c ZY |
2178 | * Force sleep Modes |
2179 | * bit 31/30- '00' use both mac/xtal sleeps | |
2180 | * '01' force Mac sleep | |
2181 | * '10' force xtal sleep | |
2182 | * '11' Illegal set | |
2183 | * | |
2184 | * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then | |
a96a27f9 | 2185 | * ucode assume sleep over DTIM is allowed and we don't need to wake up |
b481de9c ZY |
2186 | * for every DTIM. |
2187 | */ | |
2188 | #define IWL_POWER_VEC_SIZE 5 | |
2189 | ||
600c0e11 | 2190 | #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) |
35162ba7 WYG |
2191 | #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) |
2192 | #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) | |
600c0e11 TW |
2193 | #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) |
2194 | #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) | |
2195 | #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) | |
97badb0e WYG |
2196 | #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) |
2197 | #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) | |
2198 | #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) | |
2199 | #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) | |
35162ba7 | 2200 | #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) |
600c0e11 | 2201 | |
ca579617 | 2202 | struct iwl_powertable_cmd { |
b481de9c | 2203 | __le16 flags; |
600c0e11 TW |
2204 | u8 keep_alive_seconds; /* 3945 reserved */ |
2205 | u8 debug_flags; /* 3945 reserved */ | |
b481de9c ZY |
2206 | __le32 rx_data_timeout; |
2207 | __le32 tx_data_timeout; | |
2208 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | |
2209 | __le32 keep_alive_beacons; | |
ba2d3587 | 2210 | } __packed; |
b481de9c ZY |
2211 | |
2212 | /* | |
2213 | * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) | |
767d055d | 2214 | * all devices identical. |
b481de9c | 2215 | */ |
2aa6ab86 | 2216 | struct iwl_sleep_notification { |
b481de9c ZY |
2217 | u8 pm_sleep_mode; |
2218 | u8 pm_wakeup_src; | |
2219 | __le16 reserved; | |
2220 | __le32 sleep_time; | |
2221 | __le32 tsf_low; | |
2222 | __le32 bcon_timer; | |
ba2d3587 | 2223 | } __packed; |
b481de9c | 2224 | |
767d055d | 2225 | /* Sleep states. all devices identical. */ |
b481de9c ZY |
2226 | enum { |
2227 | IWL_PM_NO_SLEEP = 0, | |
2228 | IWL_PM_SLP_MAC = 1, | |
2229 | IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, | |
2230 | IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, | |
2231 | IWL_PM_SLP_PHY = 4, | |
2232 | IWL_PM_SLP_REPENT = 5, | |
2233 | IWL_PM_WAKEUP_BY_TIMER = 6, | |
2234 | IWL_PM_WAKEUP_BY_DRIVER = 7, | |
2235 | IWL_PM_WAKEUP_BY_RFKILL = 8, | |
2236 | /* 3 reserved */ | |
2237 | IWL_PM_NUM_OF_MODES = 12, | |
2238 | }; | |
2239 | ||
2240 | /* | |
2241 | * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) | |
2242 | */ | |
2243 | #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ | |
2244 | #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ | |
2245 | #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ | |
2aa6ab86 | 2246 | struct iwl_card_state_cmd { |
b481de9c | 2247 | __le32 status; /* CARD_STATE_CMD_* request new power state */ |
ba2d3587 | 2248 | } __packed; |
b481de9c ZY |
2249 | |
2250 | /* | |
2251 | * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) | |
2252 | */ | |
2aa6ab86 | 2253 | struct iwl_card_state_notif { |
b481de9c | 2254 | __le32 flags; |
ba2d3587 | 2255 | } __packed; |
b481de9c ZY |
2256 | |
2257 | #define HW_CARD_DISABLED 0x01 | |
2258 | #define SW_CARD_DISABLED 0x02 | |
3a41bbd5 | 2259 | #define CT_CARD_DISABLED 0x04 |
b481de9c ZY |
2260 | #define RXON_CARD_DISABLED 0x10 |
2261 | ||
47f4a587 | 2262 | struct iwl_ct_kill_config { |
b481de9c ZY |
2263 | __le32 reserved; |
2264 | __le32 critical_temperature_M; | |
2265 | __le32 critical_temperature_R; | |
ba2d3587 | 2266 | } __packed; |
b481de9c | 2267 | |
672639de WYG |
2268 | /* 1000, and 6x00 */ |
2269 | struct iwl_ct_kill_throttling_config { | |
2270 | __le32 critical_temperature_exit; | |
2271 | __le32 reserved; | |
2272 | __le32 critical_temperature_enter; | |
ba2d3587 | 2273 | } __packed; |
672639de | 2274 | |
b481de9c ZY |
2275 | /****************************************************************************** |
2276 | * (8) | |
2277 | * Scan Commands, Responses, Notifications: | |
2278 | * | |
2279 | *****************************************************************************/ | |
2280 | ||
51e9bf5d HH |
2281 | #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0) |
2282 | #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1) | |
d16dc48a | 2283 | |
3058f021 | 2284 | /** |
2a421b91 | 2285 | * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table |
3058f021 BC |
2286 | * |
2287 | * One for each channel in the scan list. | |
2288 | * Each channel can independently select: | |
2289 | * 1) SSID for directed active scans | |
2290 | * 2) Txpower setting (for rate specified within Tx command) | |
2291 | * 3) How long to stay on-channel (behavior may be modified by quiet_time, | |
2292 | * quiet_plcp_th, good_CRC_th) | |
2293 | * | |
2294 | * To avoid uCode errors, make sure the following are true (see comments | |
2a421b91 | 2295 | * under struct iwl_scan_cmd about max_out_time and quiet_time): |
3058f021 BC |
2296 | * 1) If using passive_dwell (i.e. passive_dwell != 0): |
2297 | * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) | |
2298 | * 2) quiet_time <= active_dwell | |
2299 | * 3) If restricting off-channel time (i.e. max_out_time !=0): | |
2300 | * passive_dwell < max_out_time | |
2301 | * active_dwell < max_out_time | |
2302 | */ | |
3d24a9f7 | 2303 | |
2a421b91 | 2304 | struct iwl_scan_channel { |
3058f021 BC |
2305 | /* |
2306 | * type is defined as: | |
2307 | * 0:0 1 = active, 0 = passive | |
d16dc48a | 2308 | * 1:20 SSID direct bit map; if a bit is set, then corresponding |
3058f021 | 2309 | * SSID IE is transmitted in probe request. |
d16dc48a | 2310 | * 21:31 reserved |
b481de9c | 2311 | */ |
d16dc48a TW |
2312 | __le32 type; |
2313 | __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */ | |
f53696de TW |
2314 | u8 tx_gain; /* gain for analog radio */ |
2315 | u8 dsp_atten; /* gain for DSP */ | |
3058f021 BC |
2316 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ |
2317 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | |
ba2d3587 | 2318 | } __packed; |
b481de9c | 2319 | |
0d21044e WT |
2320 | /* set number of direct probes __le32 type */ |
2321 | #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) | |
2322 | ||
3058f021 | 2323 | /** |
2a421b91 | 2324 | * struct iwl_ssid_ie - directed scan network information element |
3058f021 | 2325 | * |
2a3b793d BC |
2326 | * Up to 20 of these may appear in REPLY_SCAN_CMD (Note: Only 4 are in |
2327 | * 3945 SCAN api), selected by "type" bit field in struct iwl_scan_channel; | |
2328 | * each channel may select different ssids from among the 20 (4) entries. | |
2329 | * SSID IEs get transmitted in reverse order of entry. | |
3058f021 | 2330 | */ |
2a421b91 | 2331 | struct iwl_ssid_ie { |
b481de9c ZY |
2332 | u8 id; |
2333 | u8 len; | |
2334 | u8 ssid[32]; | |
ba2d3587 | 2335 | } __packed; |
b481de9c | 2336 | |
9b3bf06a JB |
2337 | #define PROBE_OPTION_MAX_3945 4 |
2338 | #define PROBE_OPTION_MAX 20 | |
51e9bf5d | 2339 | #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) |
96ff5641 JB |
2340 | #define IWL_GOOD_CRC_TH_DISABLED 0 |
2341 | #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) | |
2342 | #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) | |
b481de9c | 2343 | #define IWL_MAX_SCAN_SIZE 1024 |
89612124 | 2344 | #define IWL_MAX_CMD_SIZE 4096 |
b481de9c ZY |
2345 | |
2346 | /* | |
2347 | * REPLY_SCAN_CMD = 0x80 (command) | |
3058f021 BC |
2348 | * |
2349 | * The hardware scan command is very powerful; the driver can set it up to | |
2350 | * maintain (relatively) normal network traffic while doing a scan in the | |
2351 | * background. The max_out_time and suspend_time control the ratio of how | |
2352 | * long the device stays on an associated network channel ("service channel") | |
2353 | * vs. how long it's away from the service channel, i.e. tuned to other channels | |
2354 | * for scanning. | |
2355 | * | |
2356 | * max_out_time is the max time off-channel (in usec), and suspend_time | |
2357 | * is how long (in "extended beacon" format) that the scan is "suspended" | |
2358 | * after returning to the service channel. That is, suspend_time is the | |
2359 | * time that we stay on the service channel, doing normal work, between | |
2360 | * scan segments. The driver may set these parameters differently to support | |
2361 | * scanning when associated vs. not associated, and light vs. heavy traffic | |
2362 | * loads when associated. | |
2363 | * | |
2364 | * After receiving this command, the device's scan engine does the following; | |
2365 | * | |
2366 | * 1) Sends SCAN_START notification to driver | |
2367 | * 2) Checks to see if it has time to do scan for one channel | |
2368 | * 3) Sends NULL packet, with power-save (PS) bit set to 1, | |
2369 | * to tell AP that we're going off-channel | |
2370 | * 4) Tunes to first channel in scan list, does active or passive scan | |
2371 | * 5) Sends SCAN_RESULT notification to driver | |
2372 | * 6) Checks to see if it has time to do scan on *next* channel in list | |
2373 | * 7) Repeats 4-6 until it no longer has time to scan the next channel | |
2374 | * before max_out_time expires | |
2375 | * 8) Returns to service channel | |
2376 | * 9) Sends NULL packet with PS=0 to tell AP that we're back | |
2377 | * 10) Stays on service channel until suspend_time expires | |
2378 | * 11) Repeats entire process 2-10 until list is complete | |
2379 | * 12) Sends SCAN_COMPLETE notification | |
2380 | * | |
2381 | * For fast, efficient scans, the scan command also has support for staying on | |
2382 | * a channel for just a short time, if doing active scanning and getting no | |
2383 | * responses to the transmitted probe request. This time is controlled by | |
2384 | * quiet_time, and the number of received packets below which a channel is | |
2385 | * considered "quiet" is controlled by quiet_plcp_threshold. | |
2386 | * | |
2387 | * For active scanning on channels that have regulatory restrictions against | |
2388 | * blindly transmitting, the scan can listen before transmitting, to make sure | |
2389 | * that there is already legitimate activity on the channel. If enough | |
2390 | * packets are cleanly received on the channel (controlled by good_CRC_th, | |
2391 | * typical value 1), the scan engine starts transmitting probe requests. | |
2392 | * | |
2393 | * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. | |
2394 | * | |
2395 | * To avoid uCode errors, see timing restrictions described under | |
2a421b91 | 2396 | * struct iwl_scan_channel. |
b481de9c | 2397 | */ |
3d24a9f7 | 2398 | |
266af4c7 JB |
2399 | enum iwl_scan_flags { |
2400 | /* BIT(0) currently unused */ | |
2401 | IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), | |
2402 | /* bits 2-7 reserved */ | |
2403 | }; | |
2404 | ||
2a421b91 | 2405 | struct iwl_scan_cmd { |
b481de9c | 2406 | __le16 len; |
266af4c7 | 2407 | u8 scan_flags; /* scan flags: see enum iwl_scan_flags */ |
3058f021 BC |
2408 | u8 channel_count; /* # channels in channel list */ |
2409 | __le16 quiet_time; /* dwell only this # millisecs on quiet channel | |
2410 | * (only for active scan) */ | |
2411 | __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ | |
2412 | __le16 good_CRC_th; /* passive -> active promotion threshold */ | |
2413 | __le16 rx_chain; /* RXON_RX_CHAIN_* */ | |
2414 | __le32 max_out_time; /* max usec to be away from associated (service) | |
2415 | * channel */ | |
2416 | __le32 suspend_time; /* pause scan this long (in "extended beacon | |
2417 | * format") when returning to service chnl: | |
2418 | * 3945; 31:24 # beacons, 19:0 additional usec, | |
2419 | * 4965; 31:22 # beacons, 21:0 additional usec. | |
2420 | */ | |
2421 | __le32 flags; /* RXON_FLG_* */ | |
2422 | __le32 filter_flags; /* RXON_FILTER_* */ | |
2423 | ||
2424 | /* For active scans (set to all-0s for passive scans). | |
2425 | * Does not include payload. Must specify Tx rate; no rate scaling. */ | |
83d527d9 | 2426 | struct iwl_tx_cmd tx_cmd; |
3058f021 BC |
2427 | |
2428 | /* For directed active scans (set to all-0s otherwise) */ | |
2a421b91 | 2429 | struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX]; |
b481de9c | 2430 | |
b481de9c | 2431 | /* |
3058f021 BC |
2432 | * Probe request frame, followed by channel list. |
2433 | * | |
2434 | * Size of probe request frame is specified by byte count in tx_cmd. | |
2435 | * Channel list follows immediately after probe request frame. | |
2436 | * Number of channels in list is specified by channel_count. | |
2437 | * Each channel in list is of type: | |
b481de9c | 2438 | * |
2aa6ab86 | 2439 | * struct iwl_scan_channel channels[0]; |
b481de9c ZY |
2440 | * |
2441 | * NOTE: Only one band of channels can be scanned per pass. You | |
3058f021 BC |
2442 | * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait |
2443 | * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) | |
2444 | * before requesting another scan. | |
b481de9c | 2445 | */ |
3058f021 | 2446 | u8 data[0]; |
ba2d3587 | 2447 | } __packed; |
b481de9c ZY |
2448 | |
2449 | /* Can abort will notify by complete notification with abort status. */ | |
51e9bf5d | 2450 | #define CAN_ABORT_STATUS cpu_to_le32(0x1) |
b481de9c ZY |
2451 | /* complete notification statuses */ |
2452 | #define ABORT_STATUS 0x2 | |
2453 | ||
2454 | /* | |
2455 | * REPLY_SCAN_CMD = 0x80 (response) | |
2456 | */ | |
2a421b91 | 2457 | struct iwl_scanreq_notification { |
b481de9c | 2458 | __le32 status; /* 1: okay, 2: cannot fulfill request */ |
ba2d3587 | 2459 | } __packed; |
b481de9c ZY |
2460 | |
2461 | /* | |
2462 | * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) | |
2463 | */ | |
2a421b91 | 2464 | struct iwl_scanstart_notification { |
b481de9c ZY |
2465 | __le32 tsf_low; |
2466 | __le32 tsf_high; | |
2467 | __le32 beacon_timer; | |
2468 | u8 channel; | |
2469 | u8 band; | |
2470 | u8 reserved[2]; | |
2471 | __le32 status; | |
ba2d3587 | 2472 | } __packed; |
b481de9c | 2473 | |
497888cf PC |
2474 | #define SCAN_OWNER_STATUS 0x1 |
2475 | #define MEASURE_OWNER_STATUS 0x2 | |
b481de9c | 2476 | |
0288d237 JB |
2477 | #define IWL_PROBE_STATUS_OK 0 |
2478 | #define IWL_PROBE_STATUS_TX_FAILED BIT(0) | |
2479 | /* error statuses combined with TX_FAILED */ | |
2480 | #define IWL_PROBE_STATUS_FAIL_TTL BIT(1) | |
2481 | #define IWL_PROBE_STATUS_FAIL_BT BIT(2) | |
2482 | ||
b481de9c ZY |
2483 | #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ |
2484 | /* | |
2485 | * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) | |
2486 | */ | |
2a421b91 | 2487 | struct iwl_scanresults_notification { |
b481de9c ZY |
2488 | u8 channel; |
2489 | u8 band; | |
0288d237 JB |
2490 | u8 probe_status; |
2491 | u8 num_probe_not_sent; /* not enough time to send */ | |
b481de9c ZY |
2492 | __le32 tsf_low; |
2493 | __le32 tsf_high; | |
2494 | __le32 statistics[NUMBER_OF_STATISTICS]; | |
ba2d3587 | 2495 | } __packed; |
b481de9c ZY |
2496 | |
2497 | /* | |
2498 | * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) | |
2499 | */ | |
2a421b91 | 2500 | struct iwl_scancomplete_notification { |
b481de9c ZY |
2501 | u8 scanned_channels; |
2502 | u8 status; | |
f78e5454 | 2503 | u8 bt_status; /* BT On/Off status */ |
b481de9c ZY |
2504 | u8 last_channel; |
2505 | __le32 tsf_low; | |
2506 | __le32 tsf_high; | |
ba2d3587 | 2507 | } __packed; |
b481de9c ZY |
2508 | |
2509 | ||
2510 | /****************************************************************************** | |
2511 | * (9) | |
2512 | * IBSS/AP Commands and Notifications: | |
2513 | * | |
2514 | *****************************************************************************/ | |
2515 | ||
a85d7cca JB |
2516 | enum iwl_ibss_manager { |
2517 | IWL_NOT_IBSS_MANAGER = 0, | |
2518 | IWL_IBSS_MANAGER = 1, | |
2519 | }; | |
2520 | ||
b481de9c ZY |
2521 | /* |
2522 | * BEACON_NOTIFICATION = 0x90 (notification only, not a command) | |
2523 | */ | |
3d24a9f7 | 2524 | |
241887a2 JB |
2525 | struct iwlagn_beacon_notif { |
2526 | struct iwlagn_tx_resp beacon_notify_hdr; | |
2527 | __le32 low_tsf; | |
2528 | __le32 high_tsf; | |
2529 | __le32 ibss_mgr_status; | |
2530 | } __packed; | |
2531 | ||
b481de9c ZY |
2532 | /* |
2533 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) | |
2534 | */ | |
3d24a9f7 | 2535 | |
4bf64efd | 2536 | struct iwl_tx_beacon_cmd { |
83d527d9 | 2537 | struct iwl_tx_cmd tx; |
b481de9c ZY |
2538 | __le16 tim_idx; |
2539 | u8 tim_size; | |
2540 | u8 reserved1; | |
2541 | struct ieee80211_hdr frame[0]; /* beacon frame */ | |
ba2d3587 | 2542 | } __packed; |
b481de9c ZY |
2543 | |
2544 | /****************************************************************************** | |
2545 | * (10) | |
2546 | * Statistics Commands and Notifications: | |
2547 | * | |
2548 | *****************************************************************************/ | |
2549 | ||
2550 | #define IWL_TEMP_CONVERT 260 | |
2551 | ||
2552 | #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 | |
2553 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | |
2554 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | |
2555 | ||
2556 | /* Used for passing to driver number of successes and failures per rate */ | |
2557 | struct rate_histogram { | |
2558 | union { | |
2559 | __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | |
2560 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | |
2561 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | |
2562 | } success; | |
2563 | union { | |
2564 | __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | |
2565 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | |
2566 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | |
2567 | } failed; | |
ba2d3587 | 2568 | } __packed; |
b481de9c ZY |
2569 | |
2570 | /* statistics command response */ | |
2571 | ||
3d24a9f7 TW |
2572 | struct statistics_dbg { |
2573 | __le32 burst_check; | |
2574 | __le32 burst_count; | |
7c094c5c WYG |
2575 | __le32 wait_for_silence_timeout_cnt; |
2576 | __le32 reserved[3]; | |
ba2d3587 | 2577 | } __packed; |
3d24a9f7 | 2578 | |
b481de9c ZY |
2579 | struct statistics_rx_phy { |
2580 | __le32 ina_cnt; | |
2581 | __le32 fina_cnt; | |
2582 | __le32 plcp_err; | |
2583 | __le32 crc32_err; | |
2584 | __le32 overrun_err; | |
2585 | __le32 early_overrun_err; | |
2586 | __le32 crc32_good; | |
2587 | __le32 false_alarm_cnt; | |
2588 | __le32 fina_sync_err_cnt; | |
2589 | __le32 sfd_timeout; | |
2590 | __le32 fina_timeout; | |
2591 | __le32 unresponded_rts; | |
2592 | __le32 rxe_frame_limit_overrun; | |
2593 | __le32 sent_ack_cnt; | |
2594 | __le32 sent_cts_cnt; | |
b481de9c ZY |
2595 | __le32 sent_ba_rsp_cnt; |
2596 | __le32 dsp_self_kill; | |
2597 | __le32 mh_format_err; | |
2598 | __le32 re_acq_main_rssi_sum; | |
2599 | __le32 reserved3; | |
ba2d3587 | 2600 | } __packed; |
b481de9c | 2601 | |
b481de9c ZY |
2602 | struct statistics_rx_ht_phy { |
2603 | __le32 plcp_err; | |
2604 | __le32 overrun_err; | |
2605 | __le32 early_overrun_err; | |
2606 | __le32 crc32_good; | |
2607 | __le32 crc32_err; | |
2608 | __le32 mh_format_err; | |
2609 | __le32 agg_crc32_good; | |
2610 | __le32 agg_mpdu_cnt; | |
2611 | __le32 agg_cnt; | |
f0118a45 | 2612 | __le32 unsupport_mcs; |
ba2d3587 | 2613 | } __packed; |
b481de9c | 2614 | |
c1b4aa3f | 2615 | #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) |
34c22cf9 | 2616 | |
b481de9c ZY |
2617 | struct statistics_rx_non_phy { |
2618 | __le32 bogus_cts; /* CTS received when not expecting CTS */ | |
2619 | __le32 bogus_ack; /* ACK received when not expecting ACK */ | |
2620 | __le32 non_bssid_frames; /* number of frames with BSSID that | |
2621 | * doesn't belong to the STA BSSID */ | |
2622 | __le32 filtered_frames; /* count frames that were dumped in the | |
2623 | * filtering process */ | |
2624 | __le32 non_channel_beacons; /* beacons with our bss id but not on | |
2625 | * our serving channel */ | |
b481de9c ZY |
2626 | __le32 channel_beacons; /* beacons with our bss id and in our |
2627 | * serving channel */ | |
2628 | __le32 num_missed_bcon; /* number of missed beacons */ | |
2629 | __le32 adc_rx_saturation_time; /* count in 0.8us units the time the | |
2630 | * ADC was in saturation */ | |
2631 | __le32 ina_detection_search_time;/* total time (in 0.8us) searched | |
2632 | * for INA */ | |
2633 | __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ | |
2634 | __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ | |
2635 | __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ | |
2636 | __le32 interference_data_flag; /* flag for interference data | |
2637 | * availability. 1 when data is | |
2638 | * available. */ | |
3058f021 | 2639 | __le32 channel_load; /* counts RX Enable time in uSec */ |
b481de9c ZY |
2640 | __le32 dsp_false_alarms; /* DSP false alarm (both OFDM |
2641 | * and CCK) counter */ | |
2642 | __le32 beacon_rssi_a; | |
2643 | __le32 beacon_rssi_b; | |
2644 | __le32 beacon_rssi_c; | |
2645 | __le32 beacon_energy_a; | |
2646 | __le32 beacon_energy_b; | |
2647 | __le32 beacon_energy_c; | |
ba2d3587 | 2648 | } __packed; |
b481de9c | 2649 | |
325322ee WYG |
2650 | struct statistics_rx_non_phy_bt { |
2651 | struct statistics_rx_non_phy common; | |
2652 | /* additional stats for bt */ | |
2653 | __le32 num_bt_kills; | |
2654 | __le32 reserved[2]; | |
da22f795 | 2655 | } __packed; |
325322ee | 2656 | |
b481de9c ZY |
2657 | struct statistics_rx { |
2658 | struct statistics_rx_phy ofdm; | |
2659 | struct statistics_rx_phy cck; | |
2660 | struct statistics_rx_non_phy general; | |
b481de9c | 2661 | struct statistics_rx_ht_phy ofdm_ht; |
ba2d3587 | 2662 | } __packed; |
b481de9c | 2663 | |
325322ee WYG |
2664 | struct statistics_rx_bt { |
2665 | struct statistics_rx_phy ofdm; | |
2666 | struct statistics_rx_phy cck; | |
2667 | struct statistics_rx_non_phy_bt general; | |
2668 | struct statistics_rx_ht_phy ofdm_ht; | |
da22f795 | 2669 | } __packed; |
325322ee | 2670 | |
fcbaf8b0 WYG |
2671 | /** |
2672 | * struct statistics_tx_power - current tx power | |
2673 | * | |
2674 | * @ant_a: current tx power on chain a in 1/2 dB step | |
2675 | * @ant_b: current tx power on chain b in 1/2 dB step | |
2676 | * @ant_c: current tx power on chain c in 1/2 dB step | |
2677 | */ | |
2678 | struct statistics_tx_power { | |
2679 | u8 ant_a; | |
2680 | u8 ant_b; | |
2681 | u8 ant_c; | |
2682 | u8 reserved; | |
ba2d3587 | 2683 | } __packed; |
fcbaf8b0 | 2684 | |
b481de9c ZY |
2685 | struct statistics_tx_non_phy_agg { |
2686 | __le32 ba_timeout; | |
2687 | __le32 ba_reschedule_frames; | |
2688 | __le32 scd_query_agg_frame_cnt; | |
2689 | __le32 scd_query_no_agg; | |
2690 | __le32 scd_query_agg; | |
2691 | __le32 scd_query_mismatch; | |
2692 | __le32 frame_not_ready; | |
2693 | __le32 underrun; | |
2694 | __le32 bt_prio_kill; | |
2695 | __le32 rx_ba_rsp_cnt; | |
ba2d3587 | 2696 | } __packed; |
b481de9c ZY |
2697 | |
2698 | struct statistics_tx { | |
2699 | __le32 preamble_cnt; | |
2700 | __le32 rx_detected_cnt; | |
2701 | __le32 bt_prio_defer_cnt; | |
2702 | __le32 bt_prio_kill_cnt; | |
2703 | __le32 few_bytes_cnt; | |
2704 | __le32 cts_timeout; | |
2705 | __le32 ack_timeout; | |
2706 | __le32 expected_ack_cnt; | |
2707 | __le32 actual_ack_cnt; | |
b481de9c ZY |
2708 | __le32 dump_msdu_cnt; |
2709 | __le32 burst_abort_next_frame_mismatch_cnt; | |
2710 | __le32 burst_abort_missing_next_frame_cnt; | |
2711 | __le32 cts_timeout_collision; | |
2712 | __le32 ack_or_ba_timeout_collision; | |
2713 | struct statistics_tx_non_phy_agg agg; | |
470356b8 WYG |
2714 | /* |
2715 | * "tx_power" are optional parameters provided by uCode, | |
2716 | * 6000 series is the only device provide the information, | |
2717 | * Those are reserved fields for all the other devices | |
2718 | */ | |
fcbaf8b0 WYG |
2719 | struct statistics_tx_power tx_power; |
2720 | __le32 reserved1; | |
ba2d3587 | 2721 | } __packed; |
b481de9c | 2722 | |
b481de9c ZY |
2723 | |
2724 | struct statistics_div { | |
2725 | __le32 tx_on_a; | |
2726 | __le32 tx_on_b; | |
2727 | __le32 exec_time; | |
2728 | __le32 probe_time; | |
b481de9c ZY |
2729 | __le32 reserved1; |
2730 | __le32 reserved2; | |
ba2d3587 | 2731 | } __packed; |
b481de9c | 2732 | |
325322ee | 2733 | struct statistics_general_common { |
f0118a45 WYG |
2734 | __le32 temperature; /* radio temperature */ |
2735 | __le32 temperature_m; /* for 5000 and up, this is radio voltage */ | |
b481de9c ZY |
2736 | struct statistics_dbg dbg; |
2737 | __le32 sleep_time; | |
2738 | __le32 slots_out; | |
2739 | __le32 slots_idle; | |
2740 | __le32 ttl_timestamp; | |
2741 | struct statistics_div div; | |
b481de9c | 2742 | __le32 rx_enable_counter; |
11fc5249 WYG |
2743 | /* |
2744 | * num_of_sos_states: | |
2745 | * count the number of times we have to re-tune | |
2746 | * in order to get out of bad PHY status | |
2747 | */ | |
2748 | __le32 num_of_sos_states; | |
da22f795 | 2749 | } __packed; |
325322ee WYG |
2750 | |
2751 | struct statistics_bt_activity { | |
2752 | /* Tx statistics */ | |
2753 | __le32 hi_priority_tx_req_cnt; | |
2754 | __le32 hi_priority_tx_denied_cnt; | |
2755 | __le32 lo_priority_tx_req_cnt; | |
2756 | __le32 lo_priority_tx_denied_cnt; | |
2757 | /* Rx statistics */ | |
2758 | __le32 hi_priority_rx_req_cnt; | |
2759 | __le32 hi_priority_rx_denied_cnt; | |
2760 | __le32 lo_priority_rx_req_cnt; | |
2761 | __le32 lo_priority_rx_denied_cnt; | |
da22f795 | 2762 | } __packed; |
325322ee WYG |
2763 | |
2764 | struct statistics_general { | |
2765 | struct statistics_general_common common; | |
2766 | __le32 reserved2; | |
2767 | __le32 reserved3; | |
da22f795 | 2768 | } __packed; |
325322ee WYG |
2769 | |
2770 | struct statistics_general_bt { | |
2771 | struct statistics_general_common common; | |
2772 | struct statistics_bt_activity activity; | |
b481de9c ZY |
2773 | __le32 reserved2; |
2774 | __le32 reserved3; | |
ba2d3587 | 2775 | } __packed; |
b481de9c | 2776 | |
ef8d5529 WYG |
2777 | #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) |
2778 | #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) | |
2779 | #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2) | |
2780 | ||
b481de9c ZY |
2781 | /* |
2782 | * REPLY_STATISTICS_CMD = 0x9c, | |
767d055d | 2783 | * all devices identical. |
b481de9c ZY |
2784 | * |
2785 | * This command triggers an immediate response containing uCode statistics. | |
2786 | * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. | |
2787 | * | |
2788 | * If the CLEAR_STATS configuration flag is set, uCode will clear its | |
2789 | * internal copy of the statistics (counters) after issuing the response. | |
2790 | * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). | |
2791 | * | |
2792 | * If the DISABLE_NOTIF configuration flag is set, uCode will not issue | |
2793 | * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag | |
2794 | * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. | |
2795 | */ | |
51e9bf5d HH |
2796 | #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ |
2797 | #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ | |
8f91aecb | 2798 | struct iwl_statistics_cmd { |
b481de9c | 2799 | __le32 configuration_flags; /* IWL_STATS_CONF_* */ |
ba2d3587 | 2800 | } __packed; |
b481de9c ZY |
2801 | |
2802 | /* | |
2803 | * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) | |
2804 | * | |
2805 | * By default, uCode issues this notification after receiving a beacon | |
2806 | * while associated. To disable this behavior, set DISABLE_NOTIF flag in the | |
2807 | * REPLY_STATISTICS_CMD 0x9c, above. | |
2808 | * | |
2809 | * Statistics counters continue to increment beacon after beacon, but are | |
2810 | * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD | |
2811 | * 0x9c with CLEAR_STATS bit set (see above). | |
2812 | * | |
2813 | * uCode also issues this notification during scans. uCode clears statistics | |
2814 | * appropriately so that each notification contains statistics for only the | |
2815 | * one channel that has just been scanned. | |
2816 | */ | |
51e9bf5d | 2817 | #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) |
7aafef1c | 2818 | #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) |
3d24a9f7 | 2819 | |
8f91aecb | 2820 | struct iwl_notif_statistics { |
b481de9c ZY |
2821 | __le32 flag; |
2822 | struct statistics_rx rx; | |
2823 | struct statistics_tx tx; | |
2824 | struct statistics_general general; | |
ba2d3587 | 2825 | } __packed; |
b481de9c | 2826 | |
325322ee WYG |
2827 | struct iwl_bt_notif_statistics { |
2828 | __le32 flag; | |
2829 | struct statistics_rx_bt rx; | |
2830 | struct statistics_tx tx; | |
2831 | struct statistics_general_bt general; | |
da22f795 | 2832 | } __packed; |
b481de9c ZY |
2833 | |
2834 | /* | |
2835 | * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) | |
a13d276f WYG |
2836 | * |
2837 | * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed | |
2838 | * in regardless of how many missed beacons, which mean when driver receive the | |
2839 | * notification, inside the command, it can find all the beacons information | |
2840 | * which include number of total missed beacons, number of consecutive missed | |
2841 | * beacons, number of beacons received and number of beacons expected to | |
2842 | * receive. | |
2843 | * | |
2844 | * If uCode detected consecutive_missed_beacons > 5, it will reset the radio | |
2845 | * in order to bring the radio/PHY back to working state; which has no relation | |
2846 | * to when driver will perform sensitivity calibration. | |
2847 | * | |
2848 | * Driver should set it own missed_beacon_threshold to decide when to perform | |
2849 | * sensitivity calibration based on number of consecutive missed beacons in | |
2850 | * order to improve overall performance, especially in noisy environment. | |
2851 | * | |
b481de9c | 2852 | */ |
a13d276f WYG |
2853 | |
2854 | #define IWL_MISSED_BEACON_THRESHOLD_MIN (1) | |
2855 | #define IWL_MISSED_BEACON_THRESHOLD_DEF (5) | |
2856 | #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF | |
b481de9c | 2857 | |
2aa6ab86 | 2858 | struct iwl_missed_beacon_notif { |
a13d276f | 2859 | __le32 consecutive_missed_beacons; |
b481de9c ZY |
2860 | __le32 total_missed_becons; |
2861 | __le32 num_expected_beacons; | |
2862 | __le32 num_recvd_beacons; | |
ba2d3587 | 2863 | } __packed; |
b481de9c | 2864 | |
f7d09d7c | 2865 | |
b481de9c ZY |
2866 | /****************************************************************************** |
2867 | * (11) | |
2868 | * Rx Calibration Commands: | |
2869 | * | |
f7d09d7c BC |
2870 | * With the uCode used for open source drivers, most Tx calibration (except |
2871 | * for Tx Power) and most Rx calibration is done by uCode during the | |
2872 | * "initialize" phase of uCode boot. Driver must calibrate only: | |
2873 | * | |
2874 | * 1) Tx power (depends on temperature), described elsewhere | |
2875 | * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas) | |
2876 | * 3) Receiver sensitivity (to optimize signal detection) | |
2877 | * | |
b481de9c ZY |
2878 | *****************************************************************************/ |
2879 | ||
f7d09d7c BC |
2880 | /** |
2881 | * SENSITIVITY_CMD = 0xa8 (command, has simple generic response) | |
2882 | * | |
2883 | * This command sets up the Rx signal detector for a sensitivity level that | |
2884 | * is high enough to lock onto all signals within the associated network, | |
2885 | * but low enough to ignore signals that are below a certain threshold, so as | |
2886 | * not to have too many "false alarms". False alarms are signals that the | |
2887 | * Rx DSP tries to lock onto, but then discards after determining that they | |
2888 | * are noise. | |
2889 | * | |
2890 | * The optimum number of false alarms is between 5 and 50 per 200 TUs | |
2891 | * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e. | |
2892 | * time listening, not transmitting). Driver must adjust sensitivity so that | |
2893 | * the ratio of actual false alarms to actual Rx time falls within this range. | |
2894 | * | |
2895 | * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each | |
2896 | * received beacon. These provide information to the driver to analyze the | |
2897 | * sensitivity. Don't analyze statistics that come in from scanning, or any | |
2898 | * other non-associated-network source. Pertinent statistics include: | |
2899 | * | |
2900 | * From "general" statistics (struct statistics_rx_non_phy): | |
2901 | * | |
2902 | * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level) | |
2903 | * Measure of energy of desired signal. Used for establishing a level | |
2904 | * below which the device does not detect signals. | |
2905 | * | |
2906 | * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB) | |
2907 | * Measure of background noise in silent period after beacon. | |
2908 | * | |
2909 | * channel_load | |
2910 | * uSecs of actual Rx time during beacon period (varies according to | |
2911 | * how much time was spent transmitting). | |
2912 | * | |
2913 | * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately: | |
2914 | * | |
2915 | * false_alarm_cnt | |
2916 | * Signal locks abandoned early (before phy-level header). | |
2917 | * | |
2918 | * plcp_err | |
2919 | * Signal locks abandoned late (during phy-level header). | |
2920 | * | |
2921 | * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from | |
2922 | * beacon to beacon, i.e. each value is an accumulation of all errors | |
2923 | * before and including the latest beacon. Values will wrap around to 0 | |
2924 | * after counting up to 2^32 - 1. Driver must differentiate vs. | |
2925 | * previous beacon's values to determine # false alarms in the current | |
2926 | * beacon period. | |
2927 | * | |
2928 | * Total number of false alarms = false_alarms + plcp_errs | |
2929 | * | |
2930 | * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd | |
2931 | * (notice that the start points for OFDM are at or close to settings for | |
2932 | * maximum sensitivity): | |
2933 | * | |
2934 | * START / MIN / MAX | |
2935 | * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120 | |
2936 | * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210 | |
2937 | * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140 | |
2938 | * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270 | |
2939 | * | |
2940 | * If actual rate of OFDM false alarms (+ plcp_errors) is too high | |
2941 | * (greater than 50 for each 204.8 msecs listening), reduce sensitivity | |
2942 | * by *adding* 1 to all 4 of the table entries above, up to the max for | |
2943 | * each entry. Conversely, if false alarm rate is too low (less than 5 | |
2944 | * for each 204.8 msecs listening), *subtract* 1 from each entry to | |
2945 | * increase sensitivity. | |
2946 | * | |
2947 | * For CCK sensitivity, keep track of the following: | |
2948 | * | |
2949 | * 1). 20-beacon history of maximum background noise, indicated by | |
2950 | * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the | |
2951 | * 3 receivers. For any given beacon, the "silence reference" is | |
2952 | * the maximum of last 60 samples (20 beacons * 3 receivers). | |
2953 | * | |
2954 | * 2). 10-beacon history of strongest signal level, as indicated | |
2955 | * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers, | |
2956 | * i.e. the strength of the signal through the best receiver at the | |
2957 | * moment. These measurements are "upside down", with lower values | |
2958 | * for stronger signals, so max energy will be *minimum* value. | |
2959 | * | |
2960 | * Then for any given beacon, the driver must determine the *weakest* | |
2961 | * of the strongest signals; this is the minimum level that needs to be | |
2962 | * successfully detected, when using the best receiver at the moment. | |
2963 | * "Max cck energy" is the maximum (higher value means lower energy!) | |
2964 | * of the last 10 minima. Once this is determined, driver must add | |
2965 | * a little margin by adding "6" to it. | |
2966 | * | |
2967 | * 3). Number of consecutive beacon periods with too few false alarms. | |
2968 | * Reset this to 0 at the first beacon period that falls within the | |
2969 | * "good" range (5 to 50 false alarms per 204.8 milliseconds rx). | |
2970 | * | |
2971 | * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd | |
2972 | * (notice that the start points for CCK are at maximum sensitivity): | |
2973 | * | |
2974 | * START / MIN / MAX | |
2975 | * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200 | |
2976 | * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400 | |
2977 | * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100 | |
2978 | * | |
2979 | * If actual rate of CCK false alarms (+ plcp_errors) is too high | |
2980 | * (greater than 50 for each 204.8 msecs listening), method for reducing | |
2981 | * sensitivity is: | |
2982 | * | |
2983 | * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, | |
2984 | * up to max 400. | |
2985 | * | |
2986 | * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160, | |
2987 | * sensitivity has been reduced a significant amount; bring it up to | |
2988 | * a moderate 161. Otherwise, *add* 3, up to max 200. | |
2989 | * | |
2990 | * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160, | |
2991 | * sensitivity has been reduced only a moderate or small amount; | |
2992 | * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX, | |
2993 | * down to min 0. Otherwise (if gain has been significantly reduced), | |
2994 | * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value. | |
2995 | * | |
2996 | * b) Save a snapshot of the "silence reference". | |
2997 | * | |
2998 | * If actual rate of CCK false alarms (+ plcp_errors) is too low | |
2999 | * (less than 5 for each 204.8 msecs listening), method for increasing | |
3000 | * sensitivity is used only if: | |
3001 | * | |
3002 | * 1a) Previous beacon did not have too many false alarms | |
3003 | * 1b) AND difference between previous "silence reference" and current | |
3004 | * "silence reference" (prev - current) is 2 or more, | |
3005 | * OR 2) 100 or more consecutive beacon periods have had rate of | |
3006 | * less than 5 false alarms per 204.8 milliseconds rx time. | |
3007 | * | |
3008 | * Method for increasing sensitivity: | |
3009 | * | |
3010 | * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX, | |
3011 | * down to min 125. | |
3012 | * | |
3013 | * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, | |
3014 | * down to min 200. | |
3015 | * | |
3016 | * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100. | |
3017 | * | |
3018 | * If actual rate of CCK false alarms (+ plcp_errors) is within good range | |
3019 | * (between 5 and 50 for each 204.8 msecs listening): | |
3020 | * | |
3021 | * 1) Save a snapshot of the silence reference. | |
3022 | * | |
3023 | * 2) If previous beacon had too many CCK false alarms (+ plcp_errors), | |
3024 | * give some extra margin to energy threshold by *subtracting* 8 | |
3025 | * from value in HD_MIN_ENERGY_CCK_DET_INDEX. | |
3026 | * | |
3027 | * For all cases (too few, too many, good range), make sure that the CCK | |
3028 | * detection threshold (energy) is below the energy level for robust | |
3029 | * detection over the past 10 beacon periods, the "Max cck energy". | |
3030 | * Lower values mean higher energy; this means making sure that the value | |
3031 | * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". | |
3032 | * | |
f7d09d7c BC |
3033 | */ |
3034 | ||
3035 | /* | |
f0832f13 | 3036 | * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd) |
f7d09d7c BC |
3037 | */ |
3038 | #define HD_TABLE_SIZE (11) /* number of entries */ | |
3039 | #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */ | |
3040 | #define HD_MIN_ENERGY_OFDM_DET_INDEX (1) | |
3041 | #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2) | |
3042 | #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3) | |
3043 | #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4) | |
3044 | #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5) | |
3045 | #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6) | |
3046 | #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7) | |
3047 | #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8) | |
3048 | #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9) | |
3049 | #define HD_OFDM_ENERGY_TH_IN_INDEX (10) | |
3050 | ||
c8312fac WYG |
3051 | /* |
3052 | * Additional table entries in enhance SENSITIVITY_CMD | |
3053 | */ | |
3054 | #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11) | |
3055 | #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12) | |
3056 | #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13) | |
3057 | #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14) | |
3058 | #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15) | |
3059 | #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16) | |
3060 | #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17) | |
3061 | #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18) | |
3062 | #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19) | |
3063 | #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20) | |
3064 | #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21) | |
3065 | #define HD_RESERVED (22) | |
3066 | ||
3067 | /* number of entries for enhanced tbl */ | |
3068 | #define ENHANCE_HD_TABLE_SIZE (23) | |
3069 | ||
3070 | /* number of additional entries for enhanced tbl */ | |
3071 | #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE) | |
3072 | ||
ae7f9a74 WYG |
3073 | #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0) |
3074 | #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0) | |
3075 | #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0) | |
3076 | #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668) | |
3077 | #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) | |
3078 | #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486) | |
3079 | #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37) | |
3080 | #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853) | |
3081 | #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) | |
3082 | #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476) | |
3083 | #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99) | |
3084 | ||
3085 | #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1) | |
3086 | #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1) | |
3087 | #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1) | |
3088 | #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600) | |
3089 | #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40) | |
3090 | #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486) | |
3091 | #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45) | |
3092 | #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853) | |
3093 | #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60) | |
3094 | #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476) | |
3095 | #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99) | |
c8312fac WYG |
3096 | |
3097 | ||
f0832f13 | 3098 | /* Control field in struct iwl_sensitivity_cmd */ |
51e9bf5d HH |
3099 | #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0) |
3100 | #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1) | |
b481de9c | 3101 | |
f7d09d7c | 3102 | /** |
f0832f13 | 3103 | * struct iwl_sensitivity_cmd |
f7d09d7c BC |
3104 | * @control: (1) updates working table, (0) updates default table |
3105 | * @table: energy threshold values, use HD_* as index into table | |
3106 | * | |
3107 | * Always use "1" in "control" to update uCode's working table and DSP. | |
3108 | */ | |
f0832f13 | 3109 | struct iwl_sensitivity_cmd { |
f7d09d7c BC |
3110 | __le16 control; /* always use "1" */ |
3111 | __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ | |
ba2d3587 | 3112 | } __packed; |
b481de9c | 3113 | |
c8312fac WYG |
3114 | /* |
3115 | * | |
3116 | */ | |
3117 | struct iwl_enhance_sensitivity_cmd { | |
3118 | __le16 control; /* always use "1" */ | |
3119 | __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */ | |
0e954099 | 3120 | } __packed; |
c8312fac | 3121 | |
f7d09d7c BC |
3122 | |
3123 | /** | |
3124 | * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response) | |
3125 | * | |
767d055d | 3126 | * This command sets the relative gains of agn device's 3 radio receiver chains. |
f7d09d7c BC |
3127 | * |
3128 | * After the first association, driver should accumulate signal and noise | |
3129 | * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20 | |
3130 | * beacons from the associated network (don't collect statistics that come | |
3131 | * in from scanning, or any other non-network source). | |
3132 | * | |
3133 | * DISCONNECTED ANTENNA: | |
3134 | * | |
3135 | * Driver should determine which antennas are actually connected, by comparing | |
3136 | * average beacon signal levels for the 3 Rx chains. Accumulate (add) the | |
3137 | * following values over 20 beacons, one accumulator for each of the chains | |
3138 | * a/b/c, from struct statistics_rx_non_phy: | |
3139 | * | |
3140 | * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB) | |
3141 | * | |
3142 | * Find the strongest signal from among a/b/c. Compare the other two to the | |
3143 | * strongest. If any signal is more than 15 dB (times 20, unless you | |
3144 | * divide the accumulated values by 20) below the strongest, the driver | |
3145 | * considers that antenna to be disconnected, and should not try to use that | |
3146 | * antenna/chain for Rx or Tx. If both A and B seem to be disconnected, | |
3147 | * driver should declare the stronger one as connected, and attempt to use it | |
3148 | * (A and B are the only 2 Tx chains!). | |
3149 | * | |
3150 | * | |
3151 | * RX BALANCE: | |
3152 | * | |
3153 | * Driver should balance the 3 receivers (but just the ones that are connected | |
3154 | * to antennas, see above) for gain, by comparing the average signal levels | |
3155 | * detected during the silence after each beacon (background noise). | |
3156 | * Accumulate (add) the following values over 20 beacons, one accumulator for | |
3157 | * each of the chains a/b/c, from struct statistics_rx_non_phy: | |
3158 | * | |
3159 | * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB) | |
3160 | * | |
3161 | * Find the weakest background noise level from among a/b/c. This Rx chain | |
3162 | * will be the reference, with 0 gain adjustment. Attenuate other channels by | |
3163 | * finding noise difference: | |
3164 | * | |
3165 | * (accum_noise[i] - accum_noise[reference]) / 30 | |
3166 | * | |
3167 | * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB. | |
3168 | * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the | |
3169 | * driver should limit the difference results to a range of 0-3 (0-4.5 dB), | |
3170 | * and set bit 2 to indicate "reduce gain". The value for the reference | |
3171 | * (weakest) chain should be "0". | |
3172 | * | |
3173 | * diff_gain_[abc] bit fields: | |
3174 | * 2: (1) reduce gain, (0) increase gain | |
3175 | * 1-0: amount of gain, units of 1.5 dB | |
3176 | */ | |
3177 | ||
f69f42a6 | 3178 | /* Phy calibration command for series */ |
642454cc SZ |
3179 | /* The default calibrate table size if not specified by firmware */ |
3180 | #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 | |
33fd5033 | 3181 | enum { |
f69f42a6 TW |
3182 | IWL_PHY_CALIBRATE_DC_CMD = 8, |
3183 | IWL_PHY_CALIBRATE_LO_CMD = 9, | |
f69f42a6 | 3184 | IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, |
f69f42a6 TW |
3185 | IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, |
3186 | IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, | |
3187 | IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, | |
bf53f939 SZ |
3188 | IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18, |
3189 | IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19, | |
33fd5033 EG |
3190 | }; |
3191 | ||
6a822d06 | 3192 | #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253) |
f69f42a6 | 3193 | |
6d6a1afd SZ |
3194 | /* This enum defines the bitmap of various calibrations to enable in both |
3195 | * init ucode and runtime ucode through CALIBRATION_CFG_CMD. | |
3196 | */ | |
3197 | enum iwl_ucode_calib_cfg { | |
45d50024 WYG |
3198 | IWL_CALIB_CFG_RX_BB_IDX = BIT(0), |
3199 | IWL_CALIB_CFG_DC_IDX = BIT(1), | |
3200 | IWL_CALIB_CFG_LO_IDX = BIT(2), | |
3201 | IWL_CALIB_CFG_TX_IQ_IDX = BIT(3), | |
3202 | IWL_CALIB_CFG_RX_IQ_IDX = BIT(4), | |
3203 | IWL_CALIB_CFG_NOISE_IDX = BIT(5), | |
3204 | IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6), | |
3205 | IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7), | |
3206 | IWL_CALIB_CFG_PAPD_IDX = BIT(8), | |
3207 | IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9), | |
3208 | IWL_CALIB_CFG_TX_PWR_IDX = BIT(10), | |
6d6a1afd SZ |
3209 | }; |
3210 | ||
ad3f7124 WYG |
3211 | #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ |
3212 | IWL_CALIB_CFG_DC_IDX | \ | |
3213 | IWL_CALIB_CFG_LO_IDX | \ | |
3214 | IWL_CALIB_CFG_TX_IQ_IDX | \ | |
3215 | IWL_CALIB_CFG_RX_IQ_IDX | \ | |
a944aa9d | 3216 | IWL_CALIB_CFG_CRYSTAL_IDX) |
ad3f7124 | 3217 | |
af4dc88c WYG |
3218 | #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ |
3219 | IWL_CALIB_CFG_DC_IDX | \ | |
3220 | IWL_CALIB_CFG_LO_IDX | \ | |
3221 | IWL_CALIB_CFG_TX_IQ_IDX | \ | |
3222 | IWL_CALIB_CFG_RX_IQ_IDX | \ | |
3223 | IWL_CALIB_CFG_TEMPERATURE_IDX | \ | |
3224 | IWL_CALIB_CFG_PAPD_IDX | \ | |
3225 | IWL_CALIB_CFG_TX_PWR_IDX | \ | |
3226 | IWL_CALIB_CFG_CRYSTAL_IDX) | |
3227 | ||
ad3f7124 | 3228 | #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) |
6d6a1afd | 3229 | |
7c616cba TW |
3230 | struct iwl_calib_cfg_elmnt_s { |
3231 | __le32 is_enable; | |
3232 | __le32 start; | |
3233 | __le32 send_res; | |
3234 | __le32 apply_res; | |
3235 | __le32 reserved; | |
ba2d3587 | 3236 | } __packed; |
7c616cba TW |
3237 | |
3238 | struct iwl_calib_cfg_status_s { | |
3239 | struct iwl_calib_cfg_elmnt_s once; | |
3240 | struct iwl_calib_cfg_elmnt_s perd; | |
3241 | __le32 flags; | |
ba2d3587 | 3242 | } __packed; |
7c616cba | 3243 | |
f69f42a6 | 3244 | struct iwl_calib_cfg_cmd { |
7c616cba TW |
3245 | struct iwl_calib_cfg_status_s ucd_calib_cfg; |
3246 | struct iwl_calib_cfg_status_s drv_calib_cfg; | |
3247 | __le32 reserved1; | |
ba2d3587 | 3248 | } __packed; |
7c616cba | 3249 | |
f69f42a6 | 3250 | struct iwl_calib_hdr { |
7c616cba TW |
3251 | u8 op_code; |
3252 | u8 first_group; | |
3253 | u8 groups_num; | |
3254 | u8 data_valid; | |
ba2d3587 | 3255 | } __packed; |
7c616cba | 3256 | |
f69f42a6 TW |
3257 | struct iwl_calib_cmd { |
3258 | struct iwl_calib_hdr hdr; | |
be5d56ed | 3259 | u8 data[0]; |
ba2d3587 | 3260 | } __packed; |
be5d56ed | 3261 | |
0d950d84 TW |
3262 | struct iwl_calib_xtal_freq_cmd { |
3263 | struct iwl_calib_hdr hdr; | |
3264 | u8 cap_pin1; | |
3265 | u8 cap_pin2; | |
3266 | u8 pad[2]; | |
ba2d3587 | 3267 | } __packed; |
33fd5033 | 3268 | |
2e277996 | 3269 | #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700) |
bf53f939 SZ |
3270 | struct iwl_calib_temperature_offset_cmd { |
3271 | struct iwl_calib_hdr hdr; | |
2e277996 WYG |
3272 | __le16 radio_sensor_offset; |
3273 | __le16 reserved; | |
bf53f939 SZ |
3274 | } __packed; |
3275 | ||
c6f30347 WYG |
3276 | struct iwl_calib_temperature_offset_v2_cmd { |
3277 | struct iwl_calib_hdr hdr; | |
3278 | __le16 radio_sensor_offset_high; | |
3279 | __le16 radio_sensor_offset_low; | |
3280 | __le16 burntVoltageRef; | |
3281 | __le16 reserved; | |
3282 | } __packed; | |
3283 | ||
0d950d84 TW |
3284 | /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ |
3285 | struct iwl_calib_chain_noise_reset_cmd { | |
3286 | struct iwl_calib_hdr hdr; | |
3287 | u8 data[0]; | |
3288 | }; | |
3289 | ||
3290 | /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */ | |
f69f42a6 | 3291 | struct iwl_calib_chain_noise_gain_cmd { |
0d950d84 | 3292 | struct iwl_calib_hdr hdr; |
33fd5033 EG |
3293 | u8 delta_gain_1; |
3294 | u8 delta_gain_2; | |
0d950d84 | 3295 | u8 pad[2]; |
ba2d3587 | 3296 | } __packed; |
33fd5033 | 3297 | |
b481de9c ZY |
3298 | /****************************************************************************** |
3299 | * (12) | |
3300 | * Miscellaneous Commands: | |
3301 | * | |
3302 | *****************************************************************************/ | |
3303 | ||
3304 | /* | |
3305 | * LEDs Command & Response | |
3306 | * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) | |
3307 | * | |
3308 | * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), | |
3309 | * this command turns it on or off, or sets up a periodic blinking cycle. | |
3310 | */ | |
ec1a7460 | 3311 | struct iwl_led_cmd { |
b481de9c ZY |
3312 | __le32 interval; /* "interval" in uSec */ |
3313 | u8 id; /* 1: Activity, 2: Link, 3: Tech */ | |
3314 | u8 off; /* # intervals off while blinking; | |
3315 | * "0", with >0 "on" value, turns LED on */ | |
3316 | u8 on; /* # intervals on while blinking; | |
3317 | * "0", regardless of "off", turns LED off */ | |
3318 | u8 reserved; | |
ba2d3587 | 3319 | } __packed; |
b481de9c | 3320 | |
9636e583 | 3321 | /* |
fe1bcbfd WYG |
3322 | * station priority table entries |
3323 | * also used as potential "events" value for both | |
3324 | * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD | |
9636e583 | 3325 | */ |
1933ac4d WYG |
3326 | |
3327 | /* | |
3328 | * COEX events entry flag masks | |
3329 | * RP - Requested Priority | |
3330 | * WP - Win Medium Priority: priority assigned when the contention has been won | |
3331 | */ | |
3332 | #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1) | |
3333 | #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2) | |
3334 | #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4) | |
3335 | ||
3336 | #define COEX_CU_UNASSOC_IDLE_RP 4 | |
3337 | #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4 | |
3338 | #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4 | |
3339 | #define COEX_CU_CALIBRATION_RP 4 | |
3340 | #define COEX_CU_PERIODIC_CALIBRATION_RP 4 | |
3341 | #define COEX_CU_CONNECTION_ESTAB_RP 4 | |
3342 | #define COEX_CU_ASSOCIATED_IDLE_RP 4 | |
3343 | #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4 | |
3344 | #define COEX_CU_ASSOC_AUTO_SCAN_RP 4 | |
3345 | #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4 | |
3346 | #define COEX_CU_RF_ON_RP 6 | |
3347 | #define COEX_CU_RF_OFF_RP 4 | |
3348 | #define COEX_CU_STAND_ALONE_DEBUG_RP 6 | |
3349 | #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4 | |
3350 | #define COEX_CU_RSRVD1_RP 4 | |
3351 | #define COEX_CU_RSRVD2_RP 4 | |
3352 | ||
3353 | #define COEX_CU_UNASSOC_IDLE_WP 3 | |
3354 | #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3 | |
3355 | #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3 | |
3356 | #define COEX_CU_CALIBRATION_WP 3 | |
3357 | #define COEX_CU_PERIODIC_CALIBRATION_WP 3 | |
3358 | #define COEX_CU_CONNECTION_ESTAB_WP 3 | |
3359 | #define COEX_CU_ASSOCIATED_IDLE_WP 3 | |
3360 | #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3 | |
3361 | #define COEX_CU_ASSOC_AUTO_SCAN_WP 3 | |
3362 | #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3 | |
3363 | #define COEX_CU_RF_ON_WP 3 | |
3364 | #define COEX_CU_RF_OFF_WP 3 | |
3365 | #define COEX_CU_STAND_ALONE_DEBUG_WP 6 | |
3366 | #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3 | |
3367 | #define COEX_CU_RSRVD1_WP 3 | |
3368 | #define COEX_CU_RSRVD2_WP 3 | |
3369 | ||
3370 | #define COEX_UNASSOC_IDLE_FLAGS 0 | |
3371 | #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \ | |
3372 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3373 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) | |
3374 | #define COEX_UNASSOC_AUTO_SCAN_FLAGS \ | |
3375 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3376 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) | |
3377 | #define COEX_CALIBRATION_FLAGS \ | |
3378 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3379 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) | |
3380 | #define COEX_PERIODIC_CALIBRATION_FLAGS 0 | |
3381 | /* | |
3382 | * COEX_CONNECTION_ESTAB: | |
3383 | * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. | |
3384 | */ | |
3385 | #define COEX_CONNECTION_ESTAB_FLAGS \ | |
3386 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3387 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ | |
3388 | COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) | |
3389 | #define COEX_ASSOCIATED_IDLE_FLAGS 0 | |
3390 | #define COEX_ASSOC_MANUAL_SCAN_FLAGS \ | |
3391 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3392 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) | |
3393 | #define COEX_ASSOC_AUTO_SCAN_FLAGS \ | |
3394 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3395 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) | |
3396 | #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0 | |
3397 | #define COEX_RF_ON_FLAGS 0 | |
3398 | #define COEX_RF_OFF_FLAGS 0 | |
3399 | #define COEX_STAND_ALONE_DEBUG_FLAGS \ | |
3400 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3401 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) | |
3402 | #define COEX_IPAN_ASSOC_LEVEL_FLAGS \ | |
3403 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3404 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ | |
3405 | COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) | |
3406 | #define COEX_RSRVD1_FLAGS 0 | |
3407 | #define COEX_RSRVD2_FLAGS 0 | |
3408 | /* | |
3409 | * COEX_CU_RF_ON is the event wrapping all radio ownership. | |
3410 | * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. | |
3411 | */ | |
3412 | #define COEX_CU_RF_ON_FLAGS \ | |
3413 | (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ | |
3414 | COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ | |
3415 | COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) | |
3416 | ||
3417 | ||
9636e583 | 3418 | enum { |
fe1bcbfd | 3419 | /* un-association part */ |
9636e583 RR |
3420 | COEX_UNASSOC_IDLE = 0, |
3421 | COEX_UNASSOC_MANUAL_SCAN = 1, | |
3422 | COEX_UNASSOC_AUTO_SCAN = 2, | |
fe1bcbfd | 3423 | /* calibration */ |
9636e583 RR |
3424 | COEX_CALIBRATION = 3, |
3425 | COEX_PERIODIC_CALIBRATION = 4, | |
fe1bcbfd | 3426 | /* connection */ |
9636e583 | 3427 | COEX_CONNECTION_ESTAB = 5, |
fe1bcbfd | 3428 | /* association part */ |
9636e583 RR |
3429 | COEX_ASSOCIATED_IDLE = 6, |
3430 | COEX_ASSOC_MANUAL_SCAN = 7, | |
3431 | COEX_ASSOC_AUTO_SCAN = 8, | |
3432 | COEX_ASSOC_ACTIVE_LEVEL = 9, | |
fe1bcbfd | 3433 | /* RF ON/OFF */ |
9636e583 RR |
3434 | COEX_RF_ON = 10, |
3435 | COEX_RF_OFF = 11, | |
3436 | COEX_STAND_ALONE_DEBUG = 12, | |
fe1bcbfd | 3437 | /* IPAN */ |
9636e583 | 3438 | COEX_IPAN_ASSOC_LEVEL = 13, |
fe1bcbfd | 3439 | /* reserved */ |
9636e583 RR |
3440 | COEX_RSRVD1 = 14, |
3441 | COEX_RSRVD2 = 15, | |
3442 | COEX_NUM_OF_EVENTS = 16 | |
3443 | }; | |
3444 | ||
fe1bcbfd WYG |
3445 | /* |
3446 | * Coexistence WIFI/WIMAX Command | |
3447 | * COEX_PRIORITY_TABLE_CMD = 0x5a | |
3448 | * | |
3449 | */ | |
9636e583 RR |
3450 | struct iwl_wimax_coex_event_entry { |
3451 | u8 request_prio; | |
3452 | u8 win_medium_prio; | |
3453 | u8 reserved; | |
3454 | u8 flags; | |
ba2d3587 | 3455 | } __packed; |
9636e583 RR |
3456 | |
3457 | /* COEX flag masks */ | |
3458 | ||
a96a27f9 | 3459 | /* Station table is valid */ |
9636e583 | 3460 | #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1) |
a96a27f9 | 3461 | /* UnMask wake up src at unassociated sleep */ |
9636e583 | 3462 | #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4) |
a96a27f9 | 3463 | /* UnMask wake up src at associated sleep */ |
9636e583 RR |
3464 | #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8) |
3465 | /* Enable CoEx feature. */ | |
3466 | #define COEX_FLAGS_COEX_ENABLE_MSK (0x80) | |
3467 | ||
3468 | struct iwl_wimax_coex_cmd { | |
3469 | u8 flags; | |
3470 | u8 reserved[3]; | |
3471 | struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; | |
ba2d3587 | 3472 | } __packed; |
9636e583 | 3473 | |
fe1bcbfd WYG |
3474 | /* |
3475 | * Coexistence MEDIUM NOTIFICATION | |
3476 | * COEX_MEDIUM_NOTIFICATION = 0x5b | |
3477 | * | |
3478 | * notification from uCode to host to indicate medium changes | |
3479 | * | |
3480 | */ | |
3481 | /* | |
3482 | * status field | |
3483 | * bit 0 - 2: medium status | |
3484 | * bit 3: medium change indication | |
3485 | * bit 4 - 31: reserved | |
3486 | */ | |
3487 | /* status option values, (0 - 2 bits) */ | |
3488 | #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */ | |
3489 | #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */ | |
3490 | #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */ | |
3491 | #define COEX_MEDIUM_MSK (0x7) | |
3492 | ||
3493 | /* send notification status (1 bit) */ | |
3494 | #define COEX_MEDIUM_CHANGED (0x8) | |
3495 | #define COEX_MEDIUM_CHANGED_MSK (0x8) | |
3496 | #define COEX_MEDIUM_SHIFT (3) | |
3497 | ||
3498 | struct iwl_coex_medium_notification { | |
3499 | __le32 status; | |
3500 | __le32 events; | |
ba2d3587 | 3501 | } __packed; |
fe1bcbfd WYG |
3502 | |
3503 | /* | |
3504 | * Coexistence EVENT Command | |
3505 | * COEX_EVENT_CMD = 0x5c | |
3506 | * | |
3507 | * send from host to uCode for coex event request. | |
3508 | */ | |
3509 | /* flags options */ | |
3510 | #define COEX_EVENT_REQUEST_MSK (0x1) | |
3511 | ||
3512 | struct iwl_coex_event_cmd { | |
3513 | u8 flags; | |
3514 | u8 event; | |
3515 | __le16 reserved; | |
ba2d3587 | 3516 | } __packed; |
fe1bcbfd WYG |
3517 | |
3518 | struct iwl_coex_event_resp { | |
3519 | __le32 status; | |
ba2d3587 | 3520 | } __packed; |
fe1bcbfd WYG |
3521 | |
3522 | ||
0288d237 JB |
3523 | /****************************************************************************** |
3524 | * Bluetooth Coexistence commands | |
3525 | * | |
3526 | *****************************************************************************/ | |
3527 | ||
3528 | /* | |
3529 | * BT Status notification | |
fbba9410 | 3530 | * REPLY_BT_COEX_PROFILE_NOTIF = 0xce |
0288d237 JB |
3531 | */ |
3532 | enum iwl_bt_coex_profile_traffic_load { | |
3533 | IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0, | |
3534 | IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1, | |
3535 | IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2, | |
3536 | IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3, | |
3537 | /* | |
3538 | * There are no more even though below is a u8, the | |
3539 | * indication from the BT device only has two bits. | |
3540 | */ | |
3541 | }; | |
3542 | ||
6013270a WYG |
3543 | #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1 |
3544 | #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2 | |
3545 | ||
d7220f0d | 3546 | /* BT UART message - Share Part (BT -> WiFi) */ |
fbba9410 WYG |
3547 | #define BT_UART_MSG_FRAME1MSGTYPE_POS (0) |
3548 | #define BT_UART_MSG_FRAME1MSGTYPE_MSK \ | |
3549 | (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS) | |
3550 | #define BT_UART_MSG_FRAME1SSN_POS (3) | |
3551 | #define BT_UART_MSG_FRAME1SSN_MSK \ | |
3552 | (0x3 << BT_UART_MSG_FRAME1SSN_POS) | |
3553 | #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5) | |
3554 | #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \ | |
3555 | (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS) | |
3556 | #define BT_UART_MSG_FRAME1RESERVED_POS (6) | |
3557 | #define BT_UART_MSG_FRAME1RESERVED_MSK \ | |
3558 | (0x3 << BT_UART_MSG_FRAME1RESERVED_POS) | |
3559 | ||
3560 | #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0) | |
3561 | #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \ | |
3562 | (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS) | |
3563 | #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2) | |
3564 | #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \ | |
3565 | (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS) | |
3566 | #define BT_UART_MSG_FRAME2CHLSEQN_POS (4) | |
3567 | #define BT_UART_MSG_FRAME2CHLSEQN_MSK \ | |
3568 | (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS) | |
3569 | #define BT_UART_MSG_FRAME2INBAND_POS (5) | |
3570 | #define BT_UART_MSG_FRAME2INBAND_MSK \ | |
3571 | (0x1 << BT_UART_MSG_FRAME2INBAND_POS) | |
3572 | #define BT_UART_MSG_FRAME2RESERVED_POS (6) | |
3573 | #define BT_UART_MSG_FRAME2RESERVED_MSK \ | |
3574 | (0x3 << BT_UART_MSG_FRAME2RESERVED_POS) | |
3575 | ||
3576 | #define BT_UART_MSG_FRAME3SCOESCO_POS (0) | |
3577 | #define BT_UART_MSG_FRAME3SCOESCO_MSK \ | |
3578 | (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS) | |
3579 | #define BT_UART_MSG_FRAME3SNIFF_POS (1) | |
3580 | #define BT_UART_MSG_FRAME3SNIFF_MSK \ | |
3581 | (0x1 << BT_UART_MSG_FRAME3SNIFF_POS) | |
3582 | #define BT_UART_MSG_FRAME3A2DP_POS (2) | |
3583 | #define BT_UART_MSG_FRAME3A2DP_MSK \ | |
3584 | (0x1 << BT_UART_MSG_FRAME3A2DP_POS) | |
3585 | #define BT_UART_MSG_FRAME3ACL_POS (3) | |
3586 | #define BT_UART_MSG_FRAME3ACL_MSK \ | |
3587 | (0x1 << BT_UART_MSG_FRAME3ACL_POS) | |
3588 | #define BT_UART_MSG_FRAME3MASTER_POS (4) | |
3589 | #define BT_UART_MSG_FRAME3MASTER_MSK \ | |
3590 | (0x1 << BT_UART_MSG_FRAME3MASTER_POS) | |
3591 | #define BT_UART_MSG_FRAME3OBEX_POS (5) | |
3592 | #define BT_UART_MSG_FRAME3OBEX_MSK \ | |
3593 | (0x1 << BT_UART_MSG_FRAME3OBEX_POS) | |
3594 | #define BT_UART_MSG_FRAME3RESERVED_POS (6) | |
3595 | #define BT_UART_MSG_FRAME3RESERVED_MSK \ | |
3596 | (0x3 << BT_UART_MSG_FRAME3RESERVED_POS) | |
3597 | ||
3598 | #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0) | |
3599 | #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \ | |
3600 | (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS) | |
3601 | #define BT_UART_MSG_FRAME4RESERVED_POS (6) | |
3602 | #define BT_UART_MSG_FRAME4RESERVED_MSK \ | |
3603 | (0x3 << BT_UART_MSG_FRAME4RESERVED_POS) | |
3604 | ||
3605 | #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0) | |
3606 | #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \ | |
3607 | (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS) | |
3608 | #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2) | |
3609 | #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \ | |
3610 | (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS) | |
3611 | #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4) | |
3612 | #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \ | |
3613 | (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS) | |
3614 | #define BT_UART_MSG_FRAME5RESERVED_POS (6) | |
3615 | #define BT_UART_MSG_FRAME5RESERVED_MSK \ | |
3616 | (0x3 << BT_UART_MSG_FRAME5RESERVED_POS) | |
3617 | ||
3618 | #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0) | |
3619 | #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \ | |
3620 | (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS) | |
3621 | #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5) | |
3622 | #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \ | |
3623 | (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS) | |
3624 | #define BT_UART_MSG_FRAME6RESERVED_POS (6) | |
3625 | #define BT_UART_MSG_FRAME6RESERVED_MSK \ | |
3626 | (0x3 << BT_UART_MSG_FRAME6RESERVED_POS) | |
3627 | ||
3628 | #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0) | |
3629 | #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \ | |
3630 | (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS) | |
399f66fd WYG |
3631 | #define BT_UART_MSG_FRAME7PAGE_POS (3) |
3632 | #define BT_UART_MSG_FRAME7PAGE_MSK \ | |
3633 | (0x1 << BT_UART_MSG_FRAME7PAGE_POS) | |
3634 | #define BT_UART_MSG_FRAME7INQUIRY_POS (4) | |
3635 | #define BT_UART_MSG_FRAME7INQUIRY_MSK \ | |
3636 | (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS) | |
fbba9410 WYG |
3637 | #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5) |
3638 | #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \ | |
3639 | (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS) | |
3640 | #define BT_UART_MSG_FRAME7RESERVED_POS (6) | |
3641 | #define BT_UART_MSG_FRAME7RESERVED_MSK \ | |
3642 | (0x3 << BT_UART_MSG_FRAME7RESERVED_POS) | |
3643 | ||
d7220f0d WYG |
3644 | /* BT Session Activity 2 UART message (BT -> WiFi) */ |
3645 | #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5) | |
3646 | #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \ | |
3647 | (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS) | |
3648 | #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6) | |
3649 | #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \ | |
3650 | (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS) | |
3651 | ||
3652 | #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0) | |
3653 | #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \ | |
3654 | (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS) | |
3655 | #define BT_UART_MSG_2_FRAME2RESERVED_POS (6) | |
3656 | #define BT_UART_MSG_2_FRAME2RESERVED_MSK \ | |
3657 | (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS) | |
3658 | ||
3659 | #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0) | |
3660 | #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \ | |
3661 | (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS) | |
3662 | #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4) | |
3663 | #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \ | |
3664 | (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS) | |
3665 | #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5) | |
3666 | #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \ | |
3667 | (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS) | |
3668 | #define BT_UART_MSG_2_FRAME3RESERVED_POS (6) | |
3669 | #define BT_UART_MSG_2_FRAME3RESERVED_MSK \ | |
3670 | (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS) | |
3671 | ||
3672 | #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0) | |
3673 | #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \ | |
3674 | (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS) | |
3675 | #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4) | |
3676 | #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \ | |
3677 | (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS) | |
3678 | #define BT_UART_MSG_2_FRAME4RESERVED_POS (6) | |
3679 | #define BT_UART_MSG_2_FRAME4RESERVED_MSK \ | |
3680 | (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS) | |
3681 | ||
3682 | #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0) | |
3683 | #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \ | |
3684 | (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS) | |
3685 | #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4) | |
3686 | #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \ | |
3687 | (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS) | |
3688 | #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5) | |
3689 | #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \ | |
3690 | (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS) | |
3691 | #define BT_UART_MSG_2_FRAME5RESERVED_POS (6) | |
3692 | #define BT_UART_MSG_2_FRAME5RESERVED_MSK \ | |
3693 | (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS) | |
3694 | ||
3695 | #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0) | |
3696 | #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \ | |
3697 | (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS) | |
3698 | #define BT_UART_MSG_2_FRAME6RFU_POS (5) | |
3699 | #define BT_UART_MSG_2_FRAME6RFU_MSK \ | |
3700 | (0x1<<BT_UART_MSG_2_FRAME6RFU_POS) | |
3701 | #define BT_UART_MSG_2_FRAME6RESERVED_POS (6) | |
3702 | #define BT_UART_MSG_2_FRAME6RESERVED_MSK \ | |
3703 | (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS) | |
3704 | ||
3705 | #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0) | |
3706 | #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \ | |
3707 | (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS) | |
3708 | #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3) | |
3709 | #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \ | |
3710 | (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS) | |
3711 | #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4) | |
3712 | #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \ | |
3713 | (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS) | |
3714 | #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5) | |
3715 | #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \ | |
3716 | (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS) | |
3717 | #define BT_UART_MSG_2_FRAME7RESERVED_POS (6) | |
3718 | #define BT_UART_MSG_2_FRAME7RESERVED_MSK \ | |
3719 | (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS) | |
3720 | ||
fbba9410 WYG |
3721 | |
3722 | struct iwl_bt_uart_msg { | |
3723 | u8 header; | |
3724 | u8 frame1; | |
3725 | u8 frame2; | |
3726 | u8 frame3; | |
3727 | u8 frame4; | |
3728 | u8 frame5; | |
3729 | u8 frame6; | |
3730 | u8 frame7; | |
3731 | } __attribute__((packed)); | |
3732 | ||
0288d237 | 3733 | struct iwl_bt_coex_profile_notif { |
fbba9410 | 3734 | struct iwl_bt_uart_msg last_bt_uart_msg; |
0288d237 JB |
3735 | u8 bt_status; /* 0 - off, 1 - on */ |
3736 | u8 bt_traffic_load; /* 0 .. 3? */ | |
3737 | u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */ | |
3738 | u8 reserved; | |
3739 | } __attribute__((packed)); | |
3740 | ||
aeb4a2ee WYG |
3741 | #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0 |
3742 | #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1 | |
3743 | #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1 | |
3744 | #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e | |
3745 | #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4 | |
3746 | #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0 | |
3747 | #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1 | |
0288d237 JB |
3748 | |
3749 | /* | |
3750 | * BT Coexistence Priority table | |
3751 | * REPLY_BT_COEX_PRIO_TABLE = 0xcc | |
3752 | */ | |
aeb4a2ee WYG |
3753 | enum bt_coex_prio_table_events { |
3754 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0, | |
3755 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1, | |
3756 | BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2, | |
3757 | BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */ | |
3758 | BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4, | |
3759 | BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5, | |
3760 | BT_COEX_PRIO_TBL_EVT_DTIM = 6, | |
3761 | BT_COEX_PRIO_TBL_EVT_SCAN52 = 7, | |
3762 | BT_COEX_PRIO_TBL_EVT_SCAN24 = 8, | |
3763 | BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9, | |
3764 | BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10, | |
3765 | BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11, | |
3766 | BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12, | |
3767 | BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13, | |
3768 | BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14, | |
3769 | BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15, | |
3770 | /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */ | |
3771 | BT_COEX_PRIO_TBL_EVT_MAX, | |
3772 | }; | |
3773 | ||
3774 | enum bt_coex_prio_table_priorities { | |
3775 | BT_COEX_PRIO_TBL_DISABLED = 0, | |
3776 | BT_COEX_PRIO_TBL_PRIO_LOW = 1, | |
3777 | BT_COEX_PRIO_TBL_PRIO_HIGH = 2, | |
3778 | BT_COEX_PRIO_TBL_PRIO_BYPASS = 3, | |
3779 | BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4, | |
3780 | BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5, | |
3781 | BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6, | |
3782 | BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7, | |
3783 | BT_COEX_PRIO_TBL_MAX, | |
3784 | }; | |
3785 | ||
0288d237 | 3786 | struct iwl_bt_coex_prio_table_cmd { |
aeb4a2ee | 3787 | u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX]; |
0288d237 JB |
3788 | } __attribute__((packed)); |
3789 | ||
aeb4a2ee WYG |
3790 | #define IWL_BT_COEX_ENV_CLOSE 0 |
3791 | #define IWL_BT_COEX_ENV_OPEN 1 | |
0288d237 JB |
3792 | /* |
3793 | * BT Protection Envelope | |
3794 | * REPLY_BT_COEX_PROT_ENV = 0xcd | |
3795 | */ | |
3796 | struct iwl_bt_coex_prot_env_cmd { | |
aeb4a2ee | 3797 | u8 action; /* 0 = closed, 1 = open */ |
0288d237 JB |
3798 | u8 type; /* 0 .. 15 */ |
3799 | u8 reserved[2]; | |
3800 | } __attribute__((packed)); | |
3801 | ||
c8ac61cf JB |
3802 | /* |
3803 | * REPLY_WOWLAN_PATTERNS | |
3804 | */ | |
3805 | #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16 | |
3806 | #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128 | |
3807 | ||
3808 | struct iwlagn_wowlan_pattern { | |
3809 | u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8]; | |
3810 | u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN]; | |
3811 | u8 mask_size; | |
3812 | u8 pattern_size; | |
3813 | __le16 reserved; | |
3814 | } __packed; | |
3815 | ||
3816 | #define IWLAGN_WOWLAN_MAX_PATTERNS 20 | |
3817 | ||
3818 | struct iwlagn_wowlan_patterns_cmd { | |
3819 | __le32 n_patterns; | |
3820 | struct iwlagn_wowlan_pattern patterns[]; | |
3821 | } __packed; | |
3822 | ||
3823 | /* | |
3824 | * REPLY_WOWLAN_WAKEUP_FILTER | |
3825 | */ | |
3826 | enum iwlagn_wowlan_wakeup_filters { | |
3827 | IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0), | |
3828 | IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1), | |
3829 | IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2), | |
3830 | IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3), | |
3831 | IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4), | |
3832 | IWLAGN_WOWLAN_WAKEUP_RFKILL = BIT(5), | |
3833 | IWLAGN_WOWLAN_WAKEUP_UCODE_ERROR = BIT(6), | |
3834 | IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(7), | |
3835 | IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(8), | |
3836 | IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(9), | |
3837 | IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(10), | |
3838 | }; | |
3839 | ||
3840 | struct iwlagn_wowlan_wakeup_filter_cmd { | |
3841 | __le32 enabled; | |
3842 | __le16 non_qos_seq; | |
3843 | u8 min_sleep_seconds; | |
3844 | u8 reserved; | |
3845 | __le16 qos_seq[8]; | |
3846 | }; | |
3847 | ||
3848 | /* | |
3849 | * REPLY_WOWLAN_TSC_RSC_PARAMS | |
3850 | */ | |
3851 | #define IWLAGN_NUM_RSC 16 | |
3852 | ||
3853 | struct tkip_sc { | |
3854 | __le16 iv16; | |
3855 | __le16 pad; | |
3856 | __le32 iv32; | |
3857 | } __packed; | |
3858 | ||
3859 | struct iwlagn_tkip_rsc_tsc { | |
3860 | struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC]; | |
3861 | struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC]; | |
3862 | struct tkip_sc tsc; | |
3863 | } __packed; | |
3864 | ||
3865 | struct aes_sc { | |
3866 | __le64 pn; | |
3867 | } __packed; | |
3868 | ||
3869 | struct iwlagn_aes_rsc_tsc { | |
3870 | struct aes_sc unicast_rsc[IWLAGN_NUM_RSC]; | |
3871 | struct aes_sc multicast_rsc[IWLAGN_NUM_RSC]; | |
3872 | struct aes_sc tsc; | |
3873 | } __packed; | |
3874 | ||
3875 | union iwlagn_all_tsc_rsc { | |
3876 | struct iwlagn_tkip_rsc_tsc tkip; | |
3877 | struct iwlagn_aes_rsc_tsc aes; | |
3878 | }; | |
3879 | ||
3880 | struct iwlagn_wowlan_rsc_tsc_params_cmd { | |
3881 | union iwlagn_all_tsc_rsc all_tsc_rsc; | |
3882 | } __packed; | |
3883 | ||
3884 | /* | |
3885 | * REPLY_WOWLAN_TKIP_PARAMS | |
3886 | */ | |
3887 | #define IWLAGN_MIC_KEY_SIZE 8 | |
3888 | #define IWLAGN_P1K_SIZE 5 | |
3889 | struct iwlagn_mic_keys { | |
3890 | u8 tx[IWLAGN_MIC_KEY_SIZE]; | |
3891 | u8 rx_unicast[IWLAGN_MIC_KEY_SIZE]; | |
3892 | u8 rx_mcast[IWLAGN_MIC_KEY_SIZE]; | |
3893 | } __packed; | |
3894 | ||
3895 | struct iwlagn_p1k_cache { | |
3896 | __le16 p1k[IWLAGN_P1K_SIZE]; | |
3897 | } __packed; | |
3898 | ||
3899 | #define IWLAGN_NUM_RX_P1K_CACHE 2 | |
3900 | ||
3901 | struct iwlagn_wowlan_tkip_params_cmd { | |
3902 | struct iwlagn_mic_keys mic_keys; | |
3903 | struct iwlagn_p1k_cache tx; | |
3904 | struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE]; | |
3905 | struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE]; | |
3906 | } __packed; | |
3907 | ||
3908 | /* | |
3909 | * REPLY_WOWLAN_KEK_KCK_MATERIAL | |
3910 | */ | |
3911 | ||
3912 | #define IWLAGN_KCK_MAX_SIZE 32 | |
3913 | #define IWLAGN_KEK_MAX_SIZE 32 | |
3914 | ||
3915 | struct iwlagn_wowlan_kek_kck_material_cmd { | |
3916 | u8 kck[IWLAGN_KCK_MAX_SIZE]; | |
3917 | u8 kek[IWLAGN_KEK_MAX_SIZE]; | |
3918 | __le16 kck_len; | |
3919 | __le16 kek_len; | |
3920 | __le64 replay_ctr; | |
3921 | } __packed; | |
3922 | ||
b481de9c ZY |
3923 | /****************************************************************************** |
3924 | * (13) | |
3925 | * Union of all expected notifications/responses: | |
3926 | * | |
3927 | *****************************************************************************/ | |
dda61a44 | 3928 | #define FH_RSCSR_FRAME_SIZE_MSK (0x00003FFF) /* bits 0-13 */ |
b481de9c | 3929 | |
db11d634 | 3930 | struct iwl_rx_packet { |
2f301227 ZY |
3931 | /* |
3932 | * The first 4 bytes of the RX frame header contain both the RX frame | |
3933 | * size and some flags. | |
3934 | * Bit fields: | |
3935 | * 31: flag flush RB request | |
3936 | * 30: flag ignore TC (terminal counter) request | |
3937 | * 29: flag fast IRQ request | |
3938 | * 28-14: Reserved | |
3939 | * 13-00: RX frame size | |
3940 | */ | |
396887a2 | 3941 | __le32 len_n_flags; |
857485c0 | 3942 | struct iwl_cmd_header hdr; |
b481de9c | 3943 | union { |
885ba202 | 3944 | struct iwl_alive_resp alive_frame; |
2aa6ab86 TW |
3945 | struct iwl_spectrum_notification spectrum_notif; |
3946 | struct iwl_csa_notification csa_notif; | |
885ba202 | 3947 | struct iwl_error_resp err_resp; |
2aa6ab86 | 3948 | struct iwl_card_state_notif card_state_notif; |
7a999bf0 TW |
3949 | struct iwl_add_sta_resp add_sta; |
3950 | struct iwl_rem_sta_resp rem_sta; | |
2aa6ab86 TW |
3951 | struct iwl_sleep_notification sleep_notif; |
3952 | struct iwl_spectrum_resp spectrum; | |
8f91aecb | 3953 | struct iwl_notif_statistics stats; |
7980fba5 | 3954 | struct iwl_bt_notif_statistics stats_bt; |
653fa4a0 | 3955 | struct iwl_compressed_ba_resp compressed_ba; |
2aa6ab86 | 3956 | struct iwl_missed_beacon_notif missed_beacon; |
fe1bcbfd WYG |
3957 | struct iwl_coex_medium_notification coex_medium_notif; |
3958 | struct iwl_coex_event_resp coex_event; | |
0288d237 | 3959 | struct iwl_bt_coex_profile_notif bt_coex_profile_notif; |
b481de9c ZY |
3960 | __le32 status; |
3961 | u8 raw[0]; | |
3962 | } u; | |
ba2d3587 | 3963 | } __packed; |
b481de9c | 3964 | |
a3139c59 | 3965 | int iwl_agn_check_rxon_cmd(struct iwl_priv *priv); |
8f5c87dc | 3966 | |
946ba30d JB |
3967 | /* |
3968 | * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification) | |
3969 | */ | |
3970 | ||
94073919 JB |
3971 | /* |
3972 | * Minimum slot time in TU | |
3973 | */ | |
3974 | #define IWL_MIN_SLOT_TIME 20 | |
3975 | ||
946ba30d JB |
3976 | /** |
3977 | * struct iwl_wipan_slot | |
3978 | * @width: Time in TU | |
3979 | * @type: | |
3980 | * 0 - BSS | |
3981 | * 1 - PAN | |
3982 | */ | |
3983 | struct iwl_wipan_slot { | |
3984 | __le16 width; | |
3985 | u8 type; | |
3986 | u8 reserved; | |
3987 | } __packed; | |
3988 | ||
3989 | #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */ | |
3990 | #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */ | |
3991 | #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */ | |
3992 | #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4) | |
3993 | #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5) | |
3994 | ||
3995 | /** | |
3996 | * struct iwl_wipan_params_cmd | |
3997 | * @flags: | |
3998 | * bit0: reserved | |
3999 | * bit1: CP leave channel with CTS | |
4000 | * bit2: CP leave channel qith Quiet | |
4001 | * bit3: slotted mode | |
4002 | * 1 - work in slotted mode | |
4003 | * 0 - work in non slotted mode | |
4004 | * bit4: filter beacon notification | |
4005 | * bit5: full tx slotted mode. if this flag is set, | |
4006 | * uCode will perform leaving channel methods in context switch | |
4007 | * also when working in same channel mode | |
4008 | * @num_slots: 1 - 10 | |
4009 | */ | |
4010 | struct iwl_wipan_params_cmd { | |
4011 | __le16 flags; | |
4012 | u8 reserved; | |
4013 | u8 num_slots; | |
4014 | struct iwl_wipan_slot slots[10]; | |
4015 | } __packed; | |
4016 | ||
4017 | /* | |
4018 | * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9 | |
4019 | * | |
4020 | * TODO: Figure out what this is used for, | |
4021 | * it can only switch between 2.4 GHz | |
4022 | * channels!! | |
4023 | */ | |
4024 | ||
4025 | struct iwl_wipan_p2p_channel_switch_cmd { | |
4026 | __le16 channel; | |
4027 | __le16 reserved; | |
4028 | }; | |
4029 | ||
4030 | /* | |
4031 | * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc | |
4032 | * | |
4033 | * This is used by the device to notify us of the | |
4034 | * NoA schedule it determined so we can forward it | |
4035 | * to userspace for inclusion in probe responses. | |
4036 | * | |
4037 | * In beacons, the NoA schedule is simply appended | |
4038 | * to the frame we give the device. | |
4039 | */ | |
4040 | ||
4041 | struct iwl_wipan_noa_descriptor { | |
4042 | u8 count; | |
4043 | __le32 duration; | |
4044 | __le32 interval; | |
4045 | __le32 starttime; | |
4046 | } __packed; | |
4047 | ||
4048 | struct iwl_wipan_noa_attribute { | |
4049 | u8 id; | |
4050 | __le16 length; | |
4051 | u8 index; | |
4052 | u8 ct_window; | |
4053 | struct iwl_wipan_noa_descriptor descr0, descr1; | |
4054 | u8 reserved; | |
4055 | } __packed; | |
4056 | ||
4057 | struct iwl_wipan_noa_notification { | |
4058 | u32 noa_active; | |
4059 | struct iwl_wipan_noa_attribute noa_attribute; | |
4060 | } __packed; | |
4061 | ||
6a63578d | 4062 | #endif /* __iwl_commands_h__ */ |