]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/wireless/iwlwifi/iwl-core.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
headers: remove sched.h from interrupt.h
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
01f8162a 5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
1d0a082d 33#include <net/mac80211.h>
df48c323 34
6bc913bd 35#include "iwl-eeprom.h"
3e0d4cb1 36#include "iwl-dev.h" /* FIXME: remove */
19335774 37#include "iwl-debug.h"
df48c323 38#include "iwl-core.h"
b661c819 39#include "iwl-io.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
ef850d7c 42#include "iwl-helpers.h"
df48c323 43
1d0a082d 44
df48c323
TW		 45MODULE_DESCRIPTION("iwl core");
46MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 47MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 48MODULE_LICENSE("GPL");
df48c323 49
c7de35cd
RR		 50#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
51 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
52 IWL_RATE_SISO_##s##M_PLCP, \
53 IWL_RATE_MIMO2_##s##M_PLCP,\
54 IWL_RATE_MIMO3_##s##M_PLCP,\
55 IWL_RATE_##r##M_IEEE, \
56 IWL_RATE_##ip##M_INDEX, \
57 IWL_RATE_##in##M_INDEX, \
58 IWL_RATE_##rp##M_INDEX, \
59 IWL_RATE_##rn##M_INDEX, \
60 IWL_RATE_##pp##M_INDEX, \
61 IWL_RATE_##np##M_INDEX }
62
a562a9dd
RC		 63u32 iwl_debug_level;
64EXPORT_SYMBOL(iwl_debug_level);
65
ef850d7c
MA		 66static irqreturn_t iwl_isr(int irq, void *data);
67
c7de35cd
RR		 68/*
69 * Parameter order:
70 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
71 *
72 * If there isn't a valid next or previous rate then INV is used which
73 * maps to IWL_RATE_INVALID
74 *
75 */
1826dcc0 76const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 77 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
78 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
79 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
80 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
81 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
82 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
83 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
84 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
85 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
86 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
87 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
88 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
89 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
90 /* FIXME:RS: ^^ should be INV (legacy) */
91};
1826dcc0 92EXPORT_SYMBOL(iwl_rates);
c7de35cd 93
e7d326ac
TW		 94/**
95 * translate ucode response to mac80211 tx status control values
96 */
97void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 98 struct ieee80211_tx_info *info)
e7d326ac 99{
e6a9854b 100 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 101
e6a9854b 102 info->antenna_sel_tx =
e7d326ac
TW		 103 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
104 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 105 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 106 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 107 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
7aafef1c 108 if (rate_n_flags & RATE_MCS_HT40_MSK)
e6a9854b 109 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 110 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 111 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 112 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 113 r->flags |= IEEE80211_TX_RC_SHORT_GI;
31513be8 114 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
e7d326ac
TW		 115}
116EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
117
118int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
119{
120 int idx = 0;
121
122 /* HT rate format */
123 if (rate_n_flags & RATE_MCS_HT_MSK) {
124 idx = (rate_n_flags & 0xff);
125
60d32215
DH		 126 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
127 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
128 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 129 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
130
131 idx += IWL_FIRST_OFDM_RATE;
132 /* skip 9M not supported in ht*/
133 if (idx >= IWL_RATE_9M_INDEX)
134 idx += 1;
135 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
136 return idx;
137
138 /* legacy rate format, search for match in table */
139 } else {
140 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
141 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
142 return idx;
143 }
144
145 return -1;
146}
147EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
148
31513be8
DH		 149int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
150{
151 int idx = 0;
152 int band_offset = 0;
153
154 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
155 if (rate_n_flags & RATE_MCS_HT_MSK) {
156 idx = (rate_n_flags & 0xff);
157 return idx;
158 /* Legacy rate format, search for match in table */
159 } else {
160 if (band == IEEE80211_BAND_5GHZ)
161 band_offset = IWL_FIRST_OFDM_RATE;
162 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
163 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
164 return idx - band_offset;
165 }
166
167 return -1;
168}
169
76eff18b
TW		 170u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
171{
172 int i;
173 u8 ind = ant;
174 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
175 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
176 if (priv->hw_params.valid_tx_ant & BIT(ind))
177 return ind;
178 }
179 return ant;
180}
57bd1bea
TW		 181
182const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
183EXPORT_SYMBOL(iwl_bcast_addr);
184
185
1d0a082d
AK		 186/* This function both allocates and initializes hw and priv. */
187struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
188 struct ieee80211_ops *hw_ops)
189{
190 struct iwl_priv *priv;
191
192 /* mac80211 allocates memory for this device instance, including
193 * space for this driver's private structure */
194 struct ieee80211_hw *hw =
195 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
196 if (hw == NULL) {
a3139c59
SO		 197 printk(KERN_ERR "%s: Can not allocate network device\n",
198 cfg->name);
1d0a082d
AK		 199 goto out;
200 }
201
202 priv = hw->priv;
203 priv->hw = hw;
204
205out:
206 return hw;
207}
208EXPORT_SYMBOL(iwl_alloc_all);
209
b661c819
TW		 210void iwl_hw_detect(struct iwl_priv *priv)
211{
212 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
213 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
214 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
215}
216EXPORT_SYMBOL(iwl_hw_detect);
217
1053d35f
RR		 218int iwl_hw_nic_init(struct iwl_priv *priv)
219{
220 unsigned long flags;
221 struct iwl_rx_queue *rxq = &priv->rxq;
222 int ret;
223
224 /* nic_init */
1053d35f 225 spin_lock_irqsave(&priv->lock, flags);
1b73af82 226 priv->cfg->ops->lib->apm_ops.init(priv);
1053d35f
RR		 227 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
228 spin_unlock_irqrestore(&priv->lock, flags);
229
230 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
231
232 priv->cfg->ops->lib->apm_ops.config(priv);
233
234 /* Allocate the RX queue, or reset if it is already allocated */
235 if (!rxq->bd) {
236 ret = iwl_rx_queue_alloc(priv);
237 if (ret) {
15b1687c 238 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 239 return -ENOMEM;
240 }
241 } else
242 iwl_rx_queue_reset(priv, rxq);
243
244 iwl_rx_replenish(priv);
245
246 iwl_rx_init(priv, rxq);
247
248 spin_lock_irqsave(&priv->lock, flags);
249
250 rxq->need_update = 1;
251 iwl_rx_queue_update_write_ptr(priv, rxq);
252
253 spin_unlock_irqrestore(&priv->lock, flags);
254
255 /* Allocate and init all Tx and Command queues */
256 ret = iwl_txq_ctx_reset(priv);
257 if (ret)
258 return ret;
259
260 set_bit(STATUS_INIT, &priv->status);
261
262 return 0;
263}
264EXPORT_SYMBOL(iwl_hw_nic_init);
265
14d2aac5
AK		 266/*
267 * QoS support
268*/
269void iwl_activate_qos(struct iwl_priv *priv, u8 force)
270{
271 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
272 return;
273
274 priv->qos_data.def_qos_parm.qos_flags = 0;
275
276 if (priv->qos_data.qos_cap.q_AP.queue_request &&
277 !priv->qos_data.qos_cap.q_AP.txop_request)
278 priv->qos_data.def_qos_parm.qos_flags |=
279 QOS_PARAM_FLG_TXOP_TYPE_MSK;
280 if (priv->qos_data.qos_active)
281 priv->qos_data.def_qos_parm.qos_flags |=
282 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
283
284 if (priv->current_ht_config.is_ht)
285 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
286
287 if (force || iwl_is_associated(priv)) {
288 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
289 priv->qos_data.qos_active,
290 priv->qos_data.def_qos_parm.qos_flags);
291
292 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
293 sizeof(struct iwl_qosparam_cmd),
294 &priv->qos_data.def_qos_parm, NULL);
295 }
296}
297EXPORT_SYMBOL(iwl_activate_qos);
298
f2c95b04
WYG		 299/*
300 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
301 * (802.11b) (802.11a/g)
302 * AC_BK 15 1023 7 0 0
303 * AC_BE 15 1023 3 0 0
304 * AC_VI 7 15 2 6.016ms 3.008ms
305 * AC_VO 3 7 2 3.264ms 1.504ms
306 */
c7de35cd 307void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 308{
309 u16 cw_min = 15;
310 u16 cw_max = 1023;
311 u8 aifs = 2;
30dab79e 312 bool is_legacy = false;
bf85ea4f
AK		 313 unsigned long flags;
314 int i;
315
316 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 317 /* QoS always active in AP and ADHOC mode
318 * In STA mode wait for association
319 */
320 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
321 priv->iw_mode == NL80211_IFTYPE_AP)
322 priv->qos_data.qos_active = 1;
323 else
324 priv->qos_data.qos_active = 0;
bf85ea4f 325
30dab79e
WT		 326 /* check for legacy mode */
327 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
328 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
329 (priv->iw_mode == NL80211_IFTYPE_STATION &&
330 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 331 cw_min = 31;
332 is_legacy = 1;
333 }
334
335 if (priv->qos_data.qos_active)
336 aifs = 3;
337
f2c95b04 338 /* AC_BE */
bf85ea4f
AK		 339 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
340 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
341 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
342 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
343 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
344
345 if (priv->qos_data.qos_active) {
f2c95b04 346 /* AC_BK */
bf85ea4f
AK		 347 i = 1;
348 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
349 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
350 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
351 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
352 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
353
f2c95b04 354 /* AC_VI */
bf85ea4f
AK		 355 i = 2;
356 priv->qos_data.def_qos_parm.ac[i].cw_min =
357 cpu_to_le16((cw_min + 1) / 2 - 1);
358 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 359 cpu_to_le16(cw_min);
bf85ea4f
AK		 360 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
361 if (is_legacy)
362 priv->qos_data.def_qos_parm.ac[i].edca_txop =
363 cpu_to_le16(6016);
364 else
365 priv->qos_data.def_qos_parm.ac[i].edca_txop =
366 cpu_to_le16(3008);
367 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
368
f2c95b04 369 /* AC_VO */
bf85ea4f
AK		 370 i = 3;
371 priv->qos_data.def_qos_parm.ac[i].cw_min =
372 cpu_to_le16((cw_min + 1) / 4 - 1);
373 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 374 cpu_to_le16((cw_min + 1) / 2 - 1);
bf85ea4f
AK		 375 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
376 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
377 if (is_legacy)
378 priv->qos_data.def_qos_parm.ac[i].edca_txop =
379 cpu_to_le16(3264);
380 else
381 priv->qos_data.def_qos_parm.ac[i].edca_txop =
382 cpu_to_le16(1504);
383 } else {
384 for (i = 1; i < 4; i++) {
385 priv->qos_data.def_qos_parm.ac[i].cw_min =
386 cpu_to_le16(cw_min);
387 priv->qos_data.def_qos_parm.ac[i].cw_max =
388 cpu_to_le16(cw_max);
389 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
390 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
391 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
392 }
393 }
e1623446 394 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 395
396 spin_unlock_irqrestore(&priv->lock, flags);
397}
c7de35cd
RR		 398EXPORT_SYMBOL(iwl_reset_qos);
399
d9fe60de
JB		 400#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
401#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 402static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 403 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 404 enum ieee80211_band band)
405{
39130df3
RR		 406 u16 max_bit_rate = 0;
407 u8 rx_chains_num = priv->hw_params.rx_chains_num;
408 u8 tx_chains_num = priv->hw_params.tx_chains_num;
409
c7de35cd 410 ht_info->cap = 0;
d9fe60de 411 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 412
d9fe60de 413 ht_info->ht_supported = true;
c7de35cd 414
b261793d
DH		 415 if (priv->cfg->ht_greenfield_support)
416 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de
JB		 417 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
418 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
00c5ae2f 419 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
39130df3
RR		 420
421 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 422 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 423 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
424 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
425 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 426 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 427 }
c7de35cd
RR		 428
429 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 430 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 431
432 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
433 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
434
d9fe60de 435 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 436 if (rx_chains_num >= 2)
d9fe60de 437 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 438 if (rx_chains_num >= 3)
d9fe60de 439 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 440
441 /* Highest supported Rx data rate */
442 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 443 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
444 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 445
446 /* Tx MCS capabilities */
d9fe60de 447 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 448 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 449 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
450 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
451 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 452 }
c7de35cd 453}
c7de35cd
RR		 454
455static void iwlcore_init_hw_rates(struct iwl_priv *priv,
456 struct ieee80211_rate *rates)
457{
458 int i;
459
5027309b 460 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1826dcc0 461 rates[i].bitrate = iwl_rates[i].ieee * 5;
c7de35cd
RR		 462 rates[i].hw_value = i; /* Rate scaling will work on indexes */
463 rates[i].hw_value_short = i;
464 rates[i].flags = 0;
5027309b 465 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
c7de35cd
RR		 466 /*
467 * If CCK != 1M then set short preamble rate flag.
468 */
469 rates[i].flags |=
1826dcc0 470 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
c7de35cd
RR		 471 0 : IEEE80211_RATE_SHORT_PREAMBLE;
472 }
473 }
474}
475
8ccde88a 476
c7de35cd
RR		 477/**
478 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
479 */
534166de 480int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 481{
482 struct iwl_channel_info *ch;
483 struct ieee80211_supported_band *sband;
484 struct ieee80211_channel *channels;
485 struct ieee80211_channel *geo_ch;
486 struct ieee80211_rate *rates;
487 int i = 0;
488
489 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
490 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 491 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 492 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
493 return 0;
494 }
495
496 channels = kzalloc(sizeof(struct ieee80211_channel) *
497 priv->channel_count, GFP_KERNEL);
498 if (!channels)
499 return -ENOMEM;
500
5027309b 501 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 502 GFP_KERNEL);
503 if (!rates) {
504 kfree(channels);
505 return -ENOMEM;
506 }
507
508 /* 5.2GHz channels start after the 2.4GHz channels */
509 sband = &priv->bands[IEEE80211_BAND_5GHZ];
510 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
511 /* just OFDM */
512 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 513 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 514
49779293 515 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 516 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 517 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 518
519 sband = &priv->bands[IEEE80211_BAND_2GHZ];
520 sband->channels = channels;
521 /* OFDM & CCK */
522 sband->bitrates = rates;
5027309b 523 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 524
49779293 525 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 526 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 527 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 528
529 priv->ieee_channels = channels;
530 priv->ieee_rates = rates;
531
c7de35cd
RR		 532 for (i = 0; i < priv->channel_count; i++) {
533 ch = &priv->channel_info[i];
534
535 /* FIXME: might be removed if scan is OK */
536 if (!is_channel_valid(ch))
537 continue;
538
539 if (is_channel_a_band(ch))
540 sband = &priv->bands[IEEE80211_BAND_5GHZ];
541 else
542 sband = &priv->bands[IEEE80211_BAND_2GHZ];
543
544 geo_ch = &sband->channels[sband->n_channels++];
545
546 geo_ch->center_freq =
547 ieee80211_channel_to_frequency(ch->channel);
548 geo_ch->max_power = ch->max_power_avg;
549 geo_ch->max_antenna_gain = 0xff;
550 geo_ch->hw_value = ch->channel;
551
552 if (is_channel_valid(ch)) {
553 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
554 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
555
556 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
557 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
558
559 if (ch->flags & EEPROM_CHANNEL_RADAR)
560 geo_ch->flags |= IEEE80211_CHAN_RADAR;
561
7aafef1c 562 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 563
dc1b0973
WYG		 564 if (ch->max_power_avg > priv->tx_power_device_lmt)
565 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 566 } else {
567 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
568 }
569
e1623446 570 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 571 ch->channel, geo_ch->center_freq,
572 is_channel_a_band(ch) ? "5.2" : "2.4",
573 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
574 "restricted" : "valid",
575 geo_ch->flags);
576 }
577
578 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
579 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 580 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
581 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 582 priv->pci_dev->device,
583 priv->pci_dev->subsystem_device);
c7de35cd
RR		 584 priv->cfg->sku &= ~IWL_SKU_A;
585 }
586
978785a3 587 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 588 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
589 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 590
591 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
592
593 return 0;
594}
534166de 595EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 596
597/*
598 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
599 */
534166de 600void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 601{
602 kfree(priv->ieee_channels);
603 kfree(priv->ieee_rates);
604 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
605}
534166de 606EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 607
28a6b07a 608static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd
RR		 609{
610 return !priv->current_ht_config.is_ht ||
d9fe60de
JB		 611 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
612 (priv->current_ht_config.mcs.rx_mask[2] == 0));
c7de35cd 613}
963f5517 614
47c5196e
TW		 615static u8 iwl_is_channel_extension(struct iwl_priv *priv,
616 enum ieee80211_band band,
617 u16 channel, u8 extension_chan_offset)
618{
619 const struct iwl_channel_info *ch_info;
620
621 ch_info = iwl_get_channel_info(priv, band, channel);
622 if (!is_channel_valid(ch_info))
623 return 0;
624
d9fe60de 625 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 626 return !(ch_info->ht40_extension_channel &
689da1b3 627 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 628 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 629 return !(ch_info->ht40_extension_channel &
689da1b3 630 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 631
632 return 0;
633}
634
7aafef1c 635u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 636 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e
TW		 637{
638 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
639
640 if ((!iwl_ht_conf->is_ht) ||
a2b0f02e 641 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
47c5196e
TW		 642 return 0;
643
a2b0f02e
WYG		 644 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
645 * the bit will not set if it is pure 40MHz case
646 */
47c5196e 647 if (sta_ht_inf) {
a2b0f02e 648 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 649 return 0;
650 }
1e4247d4
WYG		 651#ifdef CONFIG_IWLWIFI_DEBUG
652 if (priv->disable_ht40)
653 return 0;
654#endif
611d3eb7
WYG		 655 return iwl_is_channel_extension(priv, priv->band,
656 le16_to_cpu(priv->staging_rxon.channel),
657 iwl_ht_conf->extension_chan_offset);
47c5196e 658}
7aafef1c 659EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 660
2c2f3b33
TW		 661static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
662{
663 u16 new_val = 0;
664 u16 beacon_factor = 0;
665
666 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
667 new_val = beacon_val / beacon_factor;
668
669 if (!new_val)
670 new_val = max_beacon_val;
671
672 return new_val;
673}
674
675void iwl_setup_rxon_timing(struct iwl_priv *priv)
676{
677 u64 tsf;
678 s32 interval_tm, rem;
679 unsigned long flags;
680 struct ieee80211_conf *conf = NULL;
681 u16 beacon_int;
682
683 conf = ieee80211_get_hw_conf(priv->hw);
684
685 spin_lock_irqsave(&priv->lock, flags);
686 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
687 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
688
689 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
690 beacon_int = priv->beacon_int;
691 priv->rxon_timing.atim_window = 0;
692 } else {
693 beacon_int = priv->vif->bss_conf.beacon_int;
694
695 /* TODO: we need to get atim_window from upper stack
696 * for now we set to 0 */
697 priv->rxon_timing.atim_window = 0;
698 }
699
700 beacon_int = iwl_adjust_beacon_interval(beacon_int,
701 priv->hw_params.max_beacon_itrvl * 1024);
702 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
703
704 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
705 interval_tm = beacon_int * 1024;
706 rem = do_div(tsf, interval_tm);
707 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
708
709 spin_unlock_irqrestore(&priv->lock, flags);
710 IWL_DEBUG_ASSOC(priv,
711 "beacon interval %d beacon timer %d beacon tim %d\n",
712 le16_to_cpu(priv->rxon_timing.beacon_interval),
713 le32_to_cpu(priv->rxon_timing.beacon_init_val),
714 le16_to_cpu(priv->rxon_timing.atim_window));
715}
716EXPORT_SYMBOL(iwl_setup_rxon_timing);
717
8ccde88a
SO		 718void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
719{
720 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
721
722 if (hw_decrypt)
723 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
724 else
725 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
726
727}
728EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
729
730/**
731 * iwl_check_rxon_cmd - validate RXON structure is valid
732 *
733 * NOTE: This is really only useful during development and can eventually
734 * be #ifdef'd out once the driver is stable and folks aren't actively
735 * making changes
736 */
737int iwl_check_rxon_cmd(struct iwl_priv *priv)
738{
739 int error = 0;
740 int counter = 1;
741 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
742
743 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
744 error |= le32_to_cpu(rxon->flags &
745 (RXON_FLG_TGJ_NARROW_BAND_MSK |
746 RXON_FLG_RADAR_DETECT_MSK));
747 if (error)
748 IWL_WARN(priv, "check 24G fields %d | %d\n",
749 counter++, error);
750 } else {
751 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
752 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
753 if (error)
754 IWL_WARN(priv, "check 52 fields %d | %d\n",
755 counter++, error);
756 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
757 if (error)
758 IWL_WARN(priv, "check 52 CCK %d | %d\n",
759 counter++, error);
760 }
761 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
762 if (error)
763 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
764
765 /* make sure basic rates 6Mbps and 1Mbps are supported */
766 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
767 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
768 if (error)
769 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
770
771 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
772 if (error)
773 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
774
775 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
776 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
777 if (error)
778 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
779 counter++, error);
780
781 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
782 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
783 if (error)
784 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
785 counter++, error);
786
787 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
788 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
789 if (error)
790 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
791 counter++, error);
792
793 if (error)
794 IWL_WARN(priv, "Tuning to channel %d\n",
795 le16_to_cpu(rxon->channel));
796
797 if (error) {
798 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
799 return -1;
800 }
801 return 0;
802}
803EXPORT_SYMBOL(iwl_check_rxon_cmd);
804
805/**
806 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
807 * @priv: staging_rxon is compared to active_rxon
808 *
809 * If the RXON structure is changing enough to require a new tune,
810 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
811 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
812 */
813int iwl_full_rxon_required(struct iwl_priv *priv)
814{
815
816 /* These items are only settable from the full RXON command */
817 if (!(iwl_is_associated(priv)) ||
818 compare_ether_addr(priv->staging_rxon.bssid_addr,
819 priv->active_rxon.bssid_addr) ||
820 compare_ether_addr(priv->staging_rxon.node_addr,
821 priv->active_rxon.node_addr) ||
822 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
823 priv->active_rxon.wlap_bssid_addr) ||
824 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
825 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
826 (priv->staging_rxon.air_propagation !=
827 priv->active_rxon.air_propagation) ||
828 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
829 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
830 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
831 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 832 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
833 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 834 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
835 return 1;
836
837 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
838 * be updated with the RXON_ASSOC command -- however only some
839 * flag transitions are allowed using RXON_ASSOC */
840
841 /* Check if we are not switching bands */
842 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
843 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
844 return 1;
845
846 /* Check if we are switching association toggle */
847 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
848 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
849 return 1;
850
851 return 0;
852}
853EXPORT_SYMBOL(iwl_full_rxon_required);
854
855u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
856{
857 int i;
858 int rate_mask;
859
860 /* Set rate mask*/
861 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
862 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
863 else
864 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
865
866 /* Find lowest valid rate */
867 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
868 i = iwl_rates[i].next_ieee) {
869 if (rate_mask & (1 << i))
870 return iwl_rates[i].plcp;
871 }
872
873 /* No valid rate was found. Assign the lowest one */
874 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
875 return IWL_RATE_1M_PLCP;
876 else
877 return IWL_RATE_6M_PLCP;
878}
879EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
880
47c5196e
TW		 881void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
882{
c1adf9fb 883 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 884
42eb7c64 885 if (!ht_info->is_ht) {
a2b0f02e 886 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 887 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 888 RXON_FLG_HT40_PROT_MSK |
42eb7c64 889 RXON_FLG_HT_PROT_MSK);
47c5196e 890 return;
42eb7c64 891 }
47c5196e 892
a2b0f02e
WYG		 893 /* FIXME: if the definition of ht_protection changed, the "translation"
894 * will be needed for rxon->flags
895 */
896 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
897
898 /* Set up channel bandwidth:
7aafef1c 899 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 900 /* clear the HT channel mode before set the mode */
901 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
902 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 903 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
904 /* pure ht40 */
508b08e7 905 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 906 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7
WYG		 907 /* Note: control channel is opposite of extension channel */
908 switch (ht_info->extension_chan_offset) {
909 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
910 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
911 break;
912 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
913 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
914 break;
915 }
916 } else {
a2b0f02e
WYG		 917 /* Note: control channel is opposite of extension channel */
918 switch (ht_info->extension_chan_offset) {
919 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
920 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
921 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
922 break;
923 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
924 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
925 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
926 break;
927 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
928 default:
929 /* channel location only valid if in Mixed mode */
930 IWL_ERR(priv, "invalid extension channel offset\n");
931 break;
932 }
933 }
934 } else {
935 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 936 }
937
45823531
AK		 938 if (priv->cfg->ops->hcmd->set_rxon_chain)
939 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 940
e1623446 941 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
47c5196e 942 "rxon flags 0x%X operation mode :0x%X "
ae5eb026 943 "extension channel offset 0x%x\n",
d9fe60de
JB		 944 ht_info->mcs.rx_mask[0],
945 ht_info->mcs.rx_mask[1],
946 ht_info->mcs.rx_mask[2],
47c5196e 947 le32_to_cpu(rxon->flags), ht_info->ht_protection,
ae5eb026 948 ht_info->extension_chan_offset);
47c5196e
TW		 949 return;
950}
951EXPORT_SYMBOL(iwl_set_rxon_ht);
952
9e5e6c32
TW		 953#define IWL_NUM_RX_CHAINS_MULTIPLE 3
954#define IWL_NUM_RX_CHAINS_SINGLE 2
955#define IWL_NUM_IDLE_CHAINS_DUAL 2
956#define IWL_NUM_IDLE_CHAINS_SINGLE 1
957
958/* Determine how many receiver/antenna chains to use.
c7de35cd
RR		 959 * More provides better reception via diversity. Fewer saves power.
960 * MIMO (dual stream) requires at least 2, but works better with 3.
961 * This does not determine *which* chains to use, just how many.
962 */
28a6b07a 963static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 964{
28a6b07a
TW		 965 bool is_single = is_single_rx_stream(priv);
966 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd
RR		 967
968 /* # of Rx chains to use when expecting MIMO. */
12837be1
RR		 969 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
970 WLAN_HT_CAP_SM_PS_STATIC)))
9e5e6c32 971 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 972 else
9e5e6c32 973 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 974}
c7de35cd 975
28a6b07a
TW		 976static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
977{
978 int idle_cnt;
979 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd 980 /* # Rx chains when idling and maybe trying to save power */
12837be1 981 switch (priv->current_ht_config.sm_ps) {
00c5ae2f
TW		 982 case WLAN_HT_CAP_SM_PS_STATIC:
983 case WLAN_HT_CAP_SM_PS_DYNAMIC:
9e5e6c32
TW		 984 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
985 IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 986 break;
00c5ae2f 987 case WLAN_HT_CAP_SM_PS_DISABLED:
9e5e6c32 988 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 989 break;
00c5ae2f 990 case WLAN_HT_CAP_SM_PS_INVALID:
c7de35cd 991 default:
15b1687c 992 IWL_ERR(priv, "invalid mimo ps mode %d\n",
12837be1 993 priv->current_ht_config.sm_ps);
28a6b07a
TW		 994 WARN_ON(1);
995 idle_cnt = -1;
c7de35cd
RR		 996 break;
997 }
28a6b07a 998 return idle_cnt;
c7de35cd
RR		 999}
1000
04816448
GE		 1001/* up to 4 chains */
1002static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1003{
1004 u8 res;
1005 res = (chain_bitmap & BIT(0)) >> 0;
1006 res += (chain_bitmap & BIT(1)) >> 1;
1007 res += (chain_bitmap & BIT(2)) >> 2;
1008 res += (chain_bitmap & BIT(4)) >> 4;
1009 return res;
1010}
1011
4c4df78f
CR		 1012/**
1013 * iwl_is_monitor_mode - Determine if interface in monitor mode
1014 *
1015 * priv->iw_mode is set in add_interface, but add_interface is
1016 * never called for monitor mode. The only way mac80211 informs us about
1017 * monitor mode is through configuring filters (call to configure_filter).
1018 */
279b05d4 1019bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 1020{
1021 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1022}
279b05d4 1023EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 1024
c7de35cd
RR		 1025/**
1026 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1027 *
1028 * Selects how many and which Rx receivers/antennas/chains to use.
1029 * This should not be used for scan command ... it puts data in wrong place.
1030 */
1031void iwl_set_rxon_chain(struct iwl_priv *priv)
1032{
28a6b07a
TW		 1033 bool is_single = is_single_rx_stream(priv);
1034 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 1035 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1036 u32 active_chains;
28a6b07a 1037 u16 rx_chain;
c7de35cd
RR		 1038
1039 /* Tell uCode which antennas are actually connected.
1040 * Before first association, we assume all antennas are connected.
1041 * Just after first association, iwl_chain_noise_calibration()
1042 * checks which antennas actually *are* connected. */
04816448
GE		 1043 if (priv->chain_noise_data.active_chains)
1044 active_chains = priv->chain_noise_data.active_chains;
1045 else
1046 active_chains = priv->hw_params.valid_rx_ant;
1047
1048 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 1049
1050 /* How many receivers should we use? */
28a6b07a
TW		 1051 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1052 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1053
28a6b07a 1054
04816448
GE		 1055 /* correct rx chain count according hw settings
1056 * and chain noise calibration
1057 */
1058 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1059 if (valid_rx_cnt < active_rx_cnt)
1060 active_rx_cnt = valid_rx_cnt;
1061
1062 if (valid_rx_cnt < idle_rx_cnt)
1063 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 1064
1065 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1066 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1067
7b841727
RF		 1068 /* copied from 'iwl_bg_request_scan()' */
1069 /* Force use of chains B and C (0x6) for Rx for 4965
1070 * Avoid A (0x1) because of its off-channel reception on A-band.
1071 * MIMO is not used here, but value is required */
1072 if (iwl_is_monitor_mode(priv) &&
1073 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1074 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
fff7a434
WYG		 1075 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1076 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1077 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1078 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 1079 }
1080
28a6b07a
TW		 1081 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1082
9e5e6c32 1083 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 1084 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1085 else
1086 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1087
e1623446 1088 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 1089 priv->staging_rxon.rx_chain,
1090 active_rx_cnt, idle_rx_cnt);
1091
1092 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1093 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 1094}
1095EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 1096
1097/**
17e72782 1098 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 1099 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1100 * @channel: Any channel valid for the requested phymode
1101
1102 * In addition to setting the staging RXON, priv->phymode is also set.
1103 *
1104 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1105 * in the staging RXON flag structure based on the phymode
1106 */
17e72782 1107int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 1108{
17e72782
TW		 1109 enum ieee80211_band band = ch->band;
1110 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1111
8622e705 1112 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1113 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1114 channel, band);
1115 return -EINVAL;
1116 }
1117
1118 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1119 (priv->band == band))
1120 return 0;
1121
1122 priv->staging_rxon.channel = cpu_to_le16(channel);
1123 if (band == IEEE80211_BAND_5GHZ)
1124 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1125 else
1126 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1127
1128 priv->band = band;
1129
e1623446 1130 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1131
1132 return 0;
1133}
c7de35cd 1134EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1135
8ccde88a
SO		 1136void iwl_set_flags_for_band(struct iwl_priv *priv,
1137 enum ieee80211_band band)
1138{
1139 if (band == IEEE80211_BAND_5GHZ) {
1140 priv->staging_rxon.flags &=
1141 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1142 | RXON_FLG_CCK_MSK);
1143 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1144 } else {
1145 /* Copied from iwl_post_associate() */
1146 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1147 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1148 else
1149 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1150
1151 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1152 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1153
1154 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1155 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1156 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1157 }
1158}
8ccde88a
SO		 1159
1160/*
1161 * initialize rxon structure with default values from eeprom
1162 */
1163void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1164{
1165 const struct iwl_channel_info *ch_info;
1166
1167 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1168
1169 switch (mode) {
1170 case NL80211_IFTYPE_AP:
1171 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1172 break;
1173
1174 case NL80211_IFTYPE_STATION:
1175 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1176 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1177 break;
1178
1179 case NL80211_IFTYPE_ADHOC:
1180 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1181 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1182 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1183 RXON_FILTER_ACCEPT_GRP_MSK;
1184 break;
1185
8ccde88a
SO		 1186 default:
1187 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1188 break;
1189 }
1190
1191#if 0
1192 /* TODO: Figure out when short_preamble would be set and cache from
1193 * that */
1194 if (!hw_to_local(priv->hw)->short_preamble)
1195 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1196 else
1197 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1198#endif
1199
1200 ch_info = iwl_get_channel_info(priv, priv->band,
1201 le16_to_cpu(priv->active_rxon.channel));
1202
1203 if (!ch_info)
1204 ch_info = &priv->channel_info[0];
1205
1206 /*
1207 * in some case A channels are all non IBSS
1208 * in this case force B/G channel
1209 */
1210 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1211 !(is_channel_ibss(ch_info)))
1212 ch_info = &priv->channel_info[0];
1213
1214 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1215 priv->band = ch_info->band;
1216
1217 iwl_set_flags_for_band(priv, priv->band);
1218
1219 priv->staging_rxon.ofdm_basic_rates =
1220 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1221 priv->staging_rxon.cck_basic_rates =
1222 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1223
a2b0f02e
WYG		 1224 /* clear both MIX and PURE40 mode flag */
1225 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1226 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1227 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1228 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1229 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1230 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1231 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1232}
1233EXPORT_SYMBOL(iwl_connection_init_rx_config);
1234
782571f4 1235static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1236{
1237 const struct ieee80211_supported_band *hw = NULL;
1238 struct ieee80211_rate *rate;
1239 int i;
1240
1241 hw = iwl_get_hw_mode(priv, priv->band);
1242 if (!hw) {
1243 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1244 return;
1245 }
1246
1247 priv->active_rate = 0;
1248 priv->active_rate_basic = 0;
1249
1250 for (i = 0; i < hw->n_bitrates; i++) {
1251 rate = &(hw->bitrates[i]);
5027309b 1252 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1253 priv->active_rate |= (1 << rate->hw_value);
1254 }
1255
e1623446 1256 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1257 priv->active_rate, priv->active_rate_basic);
1258
1259 /*
1260 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1261 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1262 * OFDM
1263 */
1264 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1265 priv->staging_rxon.cck_basic_rates =
1266 ((priv->active_rate_basic &
1267 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1268 else
1269 priv->staging_rxon.cck_basic_rates =
1270 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1271
1272 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1273 priv->staging_rxon.ofdm_basic_rates =
1274 ((priv->active_rate_basic &
1275 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1276 IWL_FIRST_OFDM_RATE) & 0xFF;
1277 else
1278 priv->staging_rxon.ofdm_basic_rates =
1279 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1280}
8ccde88a
SO		 1281
1282void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1283{
1284 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1285 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1286 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
e1623446 1287 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
8ccde88a
SO		 1288 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1289 rxon->channel = csa->channel;
1290 priv->staging_rxon.channel = csa->channel;
1291}
1292EXPORT_SYMBOL(iwl_rx_csa);
1293
1294#ifdef CONFIG_IWLWIFI_DEBUG
1295static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1296{
1297 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1298
e1623446 1299 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1300 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1301 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1302 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1303 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1304 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1305 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1306 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1307 rxon->ofdm_basic_rates);
e1623446
TW		 1308 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1309 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1310 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1311 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1312}
6686d17e 1313#endif
8ccde88a
SO		 1314/**
1315 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1316 */
1317void iwl_irq_handle_error(struct iwl_priv *priv)
1318{
1319 /* Set the FW error flag -- cleared on iwl_down */
1320 set_bit(STATUS_FW_ERROR, &priv->status);
1321
1322 /* Cancel currently queued command. */
1323 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1324
1325#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1326 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
b7a79404
RC		 1327 priv->cfg->ops->lib->dump_nic_error_log(priv);
1328 priv->cfg->ops->lib->dump_nic_event_log(priv);
8ccde88a
SO		 1329 iwl_print_rx_config_cmd(priv);
1330 }
1331#endif
1332
1333 wake_up_interruptible(&priv->wait_command_queue);
1334
1335 /* Keep the restart process from trying to send host
1336 * commands by clearing the INIT status bit */
1337 clear_bit(STATUS_READY, &priv->status);
1338
1339 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1340 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1341 "Restarting adapter due to uCode error.\n");
1342
8ccde88a
SO		 1343 if (priv->cfg->mod_params->restart_fw)
1344 queue_work(priv->workqueue, &priv->restart);
1345 }
1346}
1347EXPORT_SYMBOL(iwl_irq_handle_error);
1348
1349void iwl_configure_filter(struct ieee80211_hw *hw,
1350 unsigned int changed_flags,
1351 unsigned int *total_flags,
3ac64bee 1352 u64 multicast)
8ccde88a
SO		 1353{
1354 struct iwl_priv *priv = hw->priv;
1355 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1356
e1623446 1357 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1358 changed_flags, *total_flags);
1359
1360 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1361 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1362 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1363 else
1364 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1365 }
1366 if (changed_flags & FIF_ALLMULTI) {
1367 if (*total_flags & FIF_ALLMULTI)
1368 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1369 else
1370 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1371 }
1372 if (changed_flags & FIF_CONTROL) {
1373 if (*total_flags & FIF_CONTROL)
1374 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1375 else
1376 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1377 }
1378 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1379 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1380 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1381 else
1382 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1383 }
1384
1385 /* We avoid iwl_commit_rxon here to commit the new filter flags
1386 * since mac80211 will call ieee80211_hw_config immediately.
1387 * (mc_list is not supported at this time). Otherwise, we need to
1388 * queue a background iwl_commit_rxon work.
1389 */
1390
1391 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1392 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1393}
1394EXPORT_SYMBOL(iwl_configure_filter);
1395
6ba87956 1396int iwl_setup_mac(struct iwl_priv *priv)
bf85ea4f 1397{
6ba87956 1398 int ret;
bf85ea4f 1399 struct ieee80211_hw *hw = priv->hw;
e227ceac 1400 hw->rate_control_algorithm = "iwl-agn-rs";
bf85ea4f 1401
566bfe5a 1402 /* Tell mac80211 our characteristics */
605a0bd6 1403 hw->flags = IEEE80211_HW_SIGNAL_DBM |
8b30b1fe 1404 IEEE80211_HW_NOISE_DBM |
4be8c387 1405 IEEE80211_HW_AMPDU_AGGREGATION |
559a4741
JB		 1406 IEEE80211_HW_SPECTRUM_MGMT;
1407
1408 if (!priv->cfg->broken_powersave)
1409 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
1410 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
1411
f59ac048 1412 hw->wiphy->interface_modes =
f59ac048
LR		 1413 BIT(NL80211_IFTYPE_STATION) |
1414 BIT(NL80211_IFTYPE_ADHOC);
ea4a82dc 1415
2a44f911 1416 hw->wiphy->custom_regulatory = true;
1ecf9fc1 1417
37184244
LR		 1418 /* Firmware does not support this */
1419 hw->wiphy->disable_beacon_hints = true;
1420
b23da49e
JB		 1421 /*
1422 * For now, disable PS by default because it affects
1423 * RX performance significantly.
1424 */
1425 hw->wiphy->ps_default = false;
1426
1ecf9fc1
JB		 1427 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1428 /* we create the 802.11 header and a zero-length SSID element */
1429 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
ea4a82dc 1430
bf85ea4f
AK		 1431 /* Default value; 4 EDCA QOS priorities */
1432 hw->queues = 4;
6ba87956 1433
b5d7be5e 1434 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
6ba87956
TW		 1435
1436 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1437 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1438 &priv->bands[IEEE80211_BAND_2GHZ];
1439 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1440 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1441 &priv->bands[IEEE80211_BAND_5GHZ];
1442
1443 ret = ieee80211_register_hw(priv->hw);
1444 if (ret) {
15b1687c 1445 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
6ba87956
TW		 1446 return ret;
1447 }
1448 priv->mac80211_registered = 1;
1449
1450 return 0;
bf85ea4f 1451}
6ba87956 1452EXPORT_SYMBOL(iwl_setup_mac);
bf85ea4f 1453
da154e30
RR		 1454int iwl_set_hw_params(struct iwl_priv *priv)
1455{
da154e30
RR		 1456 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1457 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1458 if (priv->cfg->mod_params->amsdu_size_8K)
1459 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1460 else
1461 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1462 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1463
2c2f3b33
TW		 1464 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1465
49779293
RR		 1466 if (priv->cfg->mod_params->disable_11n)
1467 priv->cfg->sku &= ~IWL_SKU_N;
1468
da154e30
RR		 1469 /* Device-specific setup */
1470 return priv->cfg->ops->lib->set_hw_params(priv);
1471}
1472EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956
TW		 1473
1474int iwl_init_drv(struct iwl_priv *priv)
c7de35cd
RR		 1475{
1476 int ret;
c7de35cd 1477
c7de35cd
RR		 1478 priv->ibss_beacon = NULL;
1479
1480 spin_lock_init(&priv->lock);
c7de35cd
RR		 1481 spin_lock_init(&priv->sta_lock);
1482 spin_lock_init(&priv->hcmd_lock);
c7de35cd 1483
c7de35cd
RR		 1484 INIT_LIST_HEAD(&priv->free_frames);
1485
1486 mutex_init(&priv->mutex);
1487
1488 /* Clear the driver's (not device's) station table */
c587de0b 1489 iwl_clear_stations_table(priv);
c7de35cd
RR		 1490
1491 priv->data_retry_limit = -1;
1492 priv->ieee_channels = NULL;
1493 priv->ieee_rates = NULL;
1494 priv->band = IEEE80211_BAND_2GHZ;
1495
05c914fe 1496 priv->iw_mode = NL80211_IFTYPE_STATION;
c7de35cd 1497
12837be1 1498 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
c7de35cd
RR		 1499
1500 /* Choose which receivers/antennas to use */
45823531
AK		 1501 if (priv->cfg->ops->hcmd->set_rxon_chain)
1502 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1503
f53696de 1504 iwl_init_scan_params(priv);
c7de35cd
RR		 1505
1506 iwl_reset_qos(priv);
1507
1508 priv->qos_data.qos_active = 0;
1509 priv->qos_data.qos_cap.val = 0;
1510
c7de35cd 1511 priv->rates_mask = IWL_RATES_MASK;
02eec9c5
WYG		 1512 /* Set the tx_power_user_lmt to the lowest power level
1513 * this value will get overwritten by channel max power avg
1514 * from eeprom */
1515 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR		 1516
1517 ret = iwl_init_channel_map(priv);
1518 if (ret) {
15b1687c 1519 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
c7de35cd
RR		 1520 goto err;
1521 }
1522
1523 ret = iwlcore_init_geos(priv);
1524 if (ret) {
15b1687c 1525 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
c7de35cd
RR		 1526 goto err_free_channel_map;
1527 }
534166de 1528 iwlcore_init_hw_rates(priv, priv->ieee_rates);
c7de35cd 1529
c7de35cd
RR		 1530 return 0;
1531
c7de35cd
RR		 1532err_free_channel_map:
1533 iwl_free_channel_map(priv);
1534err:
1535 return ret;
1536}
6ba87956 1537EXPORT_SYMBOL(iwl_init_drv);
c7de35cd 1538
630fe9b6
TW		 1539int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1540{
1541 int ret = 0;
5eadd94b
WYG		 1542 s8 prev_tx_power = priv->tx_power_user_lmt;
1543
630fe9b6 1544 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1545 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1546 tx_power,
1547 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1548 return -EINVAL;
1549 }
1550
dc1b0973 1551 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1552 IWL_WARN(priv,
1553 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1554 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1555 return -EINVAL;
1556 }
1557
1558 if (priv->tx_power_user_lmt != tx_power)
1559 force = true;
1560
019fb97d 1561 /* if nic is not up don't send command */
5eadd94b
WYG		 1562 if (iwl_is_ready_rf(priv)) {
1563 priv->tx_power_user_lmt = tx_power;
1564 if (force && priv->cfg->ops->lib->send_tx_power)
1565 ret = priv->cfg->ops->lib->send_tx_power(priv);
1566 else if (!priv->cfg->ops->lib->send_tx_power)
1567 ret = -EOPNOTSUPP;
1568 /*
1569 * if fail to set tx_power, restore the orig. tx power
1570 */
1571 if (ret)
1572 priv->tx_power_user_lmt = prev_tx_power;
1573 }
630fe9b6 1574
5eadd94b
WYG		 1575 /*
1576 * Even this is an async host command, the command
1577 * will always report success from uCode
1578 * So once driver can placing the command into the queue
1579 * successfully, driver can use priv->tx_power_user_lmt
1580 * to reflect the current tx power
1581 */
630fe9b6
TW		 1582 return ret;
1583}
1584EXPORT_SYMBOL(iwl_set_tx_power);
1585
6ba87956 1586void iwl_uninit_drv(struct iwl_priv *priv)
bf85ea4f 1587{
6e21f2c1 1588 iwl_calib_free_results(priv);
6ba87956
TW		 1589 iwlcore_free_geos(priv);
1590 iwl_free_channel_map(priv);
261415f7 1591 kfree(priv->scan);
bf85ea4f 1592}
6ba87956 1593EXPORT_SYMBOL(iwl_uninit_drv);
bf85ea4f 1594
ef850d7c
MA		 1595#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1596
1597/* Free dram table */
1598void iwl_free_isr_ict(struct iwl_priv *priv)
1599{
1600 if (priv->ict_tbl_vir) {
1601 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1602 PAGE_SIZE, priv->ict_tbl_vir,
1603 priv->ict_tbl_dma);
1604 priv->ict_tbl_vir = NULL;
1605 }
1606}
1607EXPORT_SYMBOL(iwl_free_isr_ict);
1608
1609
1610/* allocate dram shared table it is a PAGE_SIZE aligned
1611 * also reset all data related to ICT table interrupt.
1612 */
1613int iwl_alloc_isr_ict(struct iwl_priv *priv)
1614{
1615
1616 if (priv->cfg->use_isr_legacy)
1617 return 0;
1618 /* allocate shrared data table */
1619 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1620 ICT_COUNT) + PAGE_SIZE,
1621 &priv->ict_tbl_dma);
1622 if (!priv->ict_tbl_vir)
1623 return -ENOMEM;
1624
1625 /* align table to PAGE_SIZE boundry */
1626 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1627
1628 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1629 (unsigned long long)priv->ict_tbl_dma,
1630 (unsigned long long)priv->aligned_ict_tbl_dma,
1631 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1632
1633 priv->ict_tbl = priv->ict_tbl_vir +
1634 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1635
1636 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1637 priv->ict_tbl, priv->ict_tbl_vir,
1638 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1639
1640 /* reset table and index to all 0 */
1641 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1642 priv->ict_index = 0;
1643
40cefda9
MA		 1644 /* add periodic RX interrupt */
1645 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
ef850d7c
MA		 1646 return 0;
1647}
1648EXPORT_SYMBOL(iwl_alloc_isr_ict);
1649
1650/* Device is going up inform it about using ICT interrupt table,
1651 * also we need to tell the driver to start using ICT interrupt.
1652 */
1653int iwl_reset_ict(struct iwl_priv *priv)
1654{
1655 u32 val;
1656 unsigned long flags;
1657
1658 if (!priv->ict_tbl_vir)
1659 return 0;
1660
1661 spin_lock_irqsave(&priv->lock, flags);
1662 iwl_disable_interrupts(priv);
1663
1303dcfd 1664 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
ef850d7c
MA		 1665
1666 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1667
1668 val |= CSR_DRAM_INT_TBL_ENABLE;
1669 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1670
1671 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1672 "aligned dma address %Lx\n",
1673 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1674
1675 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1676 priv->use_ict = true;
1677 priv->ict_index = 0;
40cefda9 1678 iwl_write32(priv, CSR_INT, priv->inta_mask);
ef850d7c
MA		 1679 iwl_enable_interrupts(priv);
1680 spin_unlock_irqrestore(&priv->lock, flags);
1681
1682 return 0;
1683}
1684EXPORT_SYMBOL(iwl_reset_ict);
1685
1686/* Device is going down disable ict interrupt usage */
1687void iwl_disable_ict(struct iwl_priv *priv)
1688{
1689 unsigned long flags;
1690
1691 spin_lock_irqsave(&priv->lock, flags);
1692 priv->use_ict = false;
1693 spin_unlock_irqrestore(&priv->lock, flags);
1694}
1695EXPORT_SYMBOL(iwl_disable_ict);
1696
1697/* interrupt handler using ict table, with this interrupt driver will
1698 * stop using INTA register to get device's interrupt, reading this register
1699 * is expensive, device will write interrupts in ICT dram table, increment
1700 * index then will fire interrupt to driver, driver will OR all ICT table
1701 * entries from current index up to table entry with 0 value. the result is
1702 * the interrupt we need to service, driver will set the entries back to 0 and
1703 * set index.
1704 */
1705irqreturn_t iwl_isr_ict(int irq, void *data)
1706{
1707 struct iwl_priv *priv = data;
1708 u32 inta, inta_mask;
1709 u32 val = 0;
1710
1711 if (!priv)
1712 return IRQ_NONE;
1713
1714 /* dram interrupt table not set yet,
1715 * use legacy interrupt.
1716 */
1717 if (!priv->use_ict)
1718 return iwl_isr(irq, data);
1719
1720 spin_lock(&priv->lock);
1721
1722 /* Disable (but don't clear!) interrupts here to avoid
1723 * back-to-back ISRs and sporadic interrupts from our NIC.
1724 * If we have something to service, the tasklet will re-enable ints.
1725 * If we *don't* have something, we'll re-enable before leaving here.
1726 */
1727 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1728 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1729
1730
1731 /* Ignore interrupt if there's nothing in NIC to service.
1732 * This may be due to IRQ shared with another device,
1733 * or due to sporadic interrupts thrown from our NIC. */
1734 if (!priv->ict_tbl[priv->ict_index]) {
1735 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1736 goto none;
1737 }
1738
1739 /* read all entries that not 0 start with ict_index */
1740 while (priv->ict_tbl[priv->ict_index]) {
1741
1303dcfd 1742 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
ef850d7c 1743 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1303dcfd
JB		 1744 priv->ict_index,
1745 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
ef850d7c
MA		 1746 priv->ict_tbl[priv->ict_index] = 0;
1747 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1303dcfd 1748 ICT_COUNT);
ef850d7c
MA		 1749
1750 }
1751
1752 /* We should not get this value, just ignore it. */
1753 if (val == 0xffffffff)
1754 val = 0;
1755
1756 inta = (0xff & val) | ((0xff00 & val) << 16);
1757 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1758 inta, inta_mask, val);
1759
40cefda9 1760 inta &= priv->inta_mask;
ef850d7c
MA		 1761 priv->inta |= inta;
1762
1763 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1764 if (likely(inta))
1765 tasklet_schedule(&priv->irq_tasklet);
1766 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1767 /* Allow interrupt if was disabled by this handler and
1768 * no tasklet was schedules, We should not enable interrupt,
1769 * tasklet will enable it.
1770 */
1771 iwl_enable_interrupts(priv);
1772 }
1773
1774 spin_unlock(&priv->lock);
1775 return IRQ_HANDLED;
1776
1777 none:
1778 /* re-enable interrupts here since we don't have anything to service.
1779 * only Re-enable if disabled by irq.
1780 */
1781 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1782 iwl_enable_interrupts(priv);
1783
1784 spin_unlock(&priv->lock);
1785 return IRQ_NONE;
1786}
1787EXPORT_SYMBOL(iwl_isr_ict);
1788
1789
1790static irqreturn_t iwl_isr(int irq, void *data)
1791{
1792 struct iwl_priv *priv = data;
1793 u32 inta, inta_mask;
d651ae32 1794#ifdef CONFIG_IWLWIFI_DEBUG
ef850d7c 1795 u32 inta_fh;
d651ae32 1796#endif
ef850d7c
MA		 1797 if (!priv)
1798 return IRQ_NONE;
1799
1800 spin_lock(&priv->lock);
1801
1802 /* Disable (but don't clear!) interrupts here to avoid
1803 * back-to-back ISRs and sporadic interrupts from our NIC.
1804 * If we have something to service, the tasklet will re-enable ints.
1805 * If we *don't* have something, we'll re-enable before leaving here. */
1806 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1807 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1808
1809 /* Discover which interrupts are active/pending */
1810 inta = iwl_read32(priv, CSR_INT);
1811
1812 /* Ignore interrupt if there's nothing in NIC to service.
1813 * This may be due to IRQ shared with another device,
1814 * or due to sporadic interrupts thrown from our NIC. */
1815 if (!inta) {
1816 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1817 goto none;
1818 }
1819
1820 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1821 /* Hardware disappeared. It might have already raised
1822 * an interrupt */
1823 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1824 goto unplugged;
1825 }
1826
1827#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1828 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
ef850d7c
MA		 1829 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1830 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1831 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1832 }
1833#endif
1834
1835 priv->inta |= inta;
1836 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1837 if (likely(inta))
1838 tasklet_schedule(&priv->irq_tasklet);
1839 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1840 iwl_enable_interrupts(priv);
1841
1842 unplugged:
1843 spin_unlock(&priv->lock);
1844 return IRQ_HANDLED;
1845
1846 none:
1847 /* re-enable interrupts here since we don't have anything to service. */
1848 /* only Re-enable if diabled by irq and no schedules tasklet. */
1849 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1850 iwl_enable_interrupts(priv);
1851
1852 spin_unlock(&priv->lock);
1853 return IRQ_NONE;
1854}
1855
1856irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1857{
1858 struct iwl_priv *priv = data;
1859 u32 inta, inta_mask;
1860 u32 inta_fh;
1861 if (!priv)
1862 return IRQ_NONE;
1863
1864 spin_lock(&priv->lock);
1865
1866 /* Disable (but don't clear!) interrupts here to avoid
1867 * back-to-back ISRs and sporadic interrupts from our NIC.
1868 * If we have something to service, the tasklet will re-enable ints.
1869 * If we *don't* have something, we'll re-enable before leaving here. */
1870 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1871 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1872
1873 /* Discover which interrupts are active/pending */
1874 inta = iwl_read32(priv, CSR_INT);
1875 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1876
1877 /* Ignore interrupt if there's nothing in NIC to service.
1878 * This may be due to IRQ shared with another device,
1879 * or due to sporadic interrupts thrown from our NIC. */
1880 if (!inta && !inta_fh) {
1881 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1882 goto none;
1883 }
1884
1885 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1886 /* Hardware disappeared. It might have already raised
1887 * an interrupt */
1888 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1889 goto unplugged;
1890 }
1891
1892 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1893 inta, inta_mask, inta_fh);
1894
1895 inta &= ~CSR_INT_BIT_SCD;
1896
1897 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1898 if (likely(inta || inta_fh))
1899 tasklet_schedule(&priv->irq_tasklet);
1900
1901 unplugged:
1902 spin_unlock(&priv->lock);
1903 return IRQ_HANDLED;
1904
1905 none:
1906 /* re-enable interrupts here since we don't have anything to service. */
1907 /* only Re-enable if diabled by irq */
1908 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1909 iwl_enable_interrupts(priv);
1910 spin_unlock(&priv->lock);
1911 return IRQ_NONE;
1912}
ef850d7c 1913EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1914
17f841cd
SO		 1915int iwl_send_bt_config(struct iwl_priv *priv)
1916{
1917 struct iwl_bt_cmd bt_cmd = {
1918 .flags = 3,
1919 .lead_time = 0xAA,
1920 .max_kill = 1,
1921 .kill_ack_mask = 0,
1922 .kill_cts_mask = 0,
1923 };
1924
1925 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1926 sizeof(struct iwl_bt_cmd), &bt_cmd);
1927}
1928EXPORT_SYMBOL(iwl_send_bt_config);
1929
49ea8596
EG		 1930int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1931{
1932 u32 stat_flags = 0;
1933 struct iwl_host_cmd cmd = {
1934 .id = REPLY_STATISTICS_CMD,
c2acea8e 1935 .flags = flags,
49ea8596
EG		 1936 .len = sizeof(stat_flags),
1937 .data = (u8 *) &stat_flags,
1938 };
1939 return iwl_send_cmd(priv, &cmd);
1940}
1941EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1942
b0692f2f
EG		 1943/**
1944 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1945 * using sample data 100 bytes apart. If these sample points are good,
1946 * it's a pretty good bet that everything between them is good, too.
1947 */
1948static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1949{
1950 u32 val;
1951 int ret = 0;
1952 u32 errcnt = 0;
1953 u32 i;
1954
e1623446 1955 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1956
b0692f2f
EG		 1957 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1958 /* read data comes through single port, auto-incr addr */
1959 /* NOTE: Use the debugless read so we don't flood kernel log
1960 * if IWL_DL_IO is set */
1961 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1962 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1963 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1964 if (val != le32_to_cpu(*image)) {
1965 ret = -EIO;
1966 errcnt++;
1967 if (errcnt >= 3)
1968 break;
1969 }
1970 }
1971
b0692f2f
EG		 1972 return ret;
1973}
1974
1975/**
1976 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1977 * looking at all data.
1978 */
1979static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1980 u32 len)
1981{
1982 u32 val;
1983 u32 save_len = len;
1984 int ret = 0;
1985 u32 errcnt;
1986
e1623446 1987 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1988
250bdd21
SO		 1989 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1990 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1991
1992 errcnt = 0;
1993 for (; len > 0; len -= sizeof(u32), image++) {
1994 /* read data comes through single port, auto-incr addr */
1995 /* NOTE: Use the debugless read so we don't flood kernel log
1996 * if IWL_DL_IO is set */
1997 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1998 if (val != le32_to_cpu(*image)) {
15b1687c 1999 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 2000 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2001 save_len - len, val, le32_to_cpu(*image));
2002 ret = -EIO;
2003 errcnt++;
2004 if (errcnt >= 20)
2005 break;
2006 }
2007 }
2008
b0692f2f 2009 if (!errcnt)
e1623446
TW		 2010 IWL_DEBUG_INFO(priv,
2011 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 2012
2013 return ret;
2014}
2015
2016/**
2017 * iwl_verify_ucode - determine which instruction image is in SRAM,
2018 * and verify its contents
2019 */
2020int iwl_verify_ucode(struct iwl_priv *priv)
2021{
2022 __le32 *image;
2023 u32 len;
2024 int ret;
2025
2026 /* Try bootstrap */
2027 image = (__le32 *)priv->ucode_boot.v_addr;
2028 len = priv->ucode_boot.len;
2029 ret = iwlcore_verify_inst_sparse(priv, image, len);
2030 if (!ret) {
e1623446 2031 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 2032 return 0;
2033 }
2034
2035 /* Try initialize */
2036 image = (__le32 *)priv->ucode_init.v_addr;
2037 len = priv->ucode_init.len;
2038 ret = iwlcore_verify_inst_sparse(priv, image, len);
2039 if (!ret) {
e1623446 2040 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 2041 return 0;
2042 }
2043
2044 /* Try runtime/protocol */
2045 image = (__le32 *)priv->ucode_code.v_addr;
2046 len = priv->ucode_code.len;
2047 ret = iwlcore_verify_inst_sparse(priv, image, len);
2048 if (!ret) {
e1623446 2049 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 2050 return 0;
2051 }
2052
15b1687c 2053 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 2054
2055 /* Since nothing seems to match, show first several data entries in
2056 * instruction SRAM, so maybe visual inspection will give a clue.
2057 * Selection of bootstrap image (vs. other images) is arbitrary. */
2058 image = (__le32 *)priv->ucode_boot.v_addr;
2059 len = priv->ucode_boot.len;
2060 ret = iwl_verify_inst_full(priv, image, len);
2061
2062 return ret;
2063}
2064EXPORT_SYMBOL(iwl_verify_ucode);
2065
56e12615 2066
47f4a587
EG		 2067void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2068{
2069 struct iwl_ct_kill_config cmd;
672639de 2070 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 2071 unsigned long flags;
2072 int ret = 0;
2073
2074 spin_lock_irqsave(&priv->lock, flags);
2075 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2076 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2077 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 2078 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 2079
672639de
WYG		 2080 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
2081 case CSR_HW_REV_TYPE_1000:
2082 case CSR_HW_REV_TYPE_6x00:
2083 case CSR_HW_REV_TYPE_6x50:
2084 adv_cmd.critical_temperature_enter =
2085 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2086 adv_cmd.critical_temperature_exit =
2087 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2088
2089 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2090 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 2091 if (ret)
2092 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2093 else
2094 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2095 "succeeded, "
2096 "critical temperature enter is %d,"
2097 "exit is %d\n",
2098 priv->hw_params.ct_kill_threshold,
2099 priv->hw_params.ct_kill_exit_threshold);
672639de
WYG		 2100 break;
2101 default:
2102 cmd.critical_temperature_R =
2103 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 2104
672639de
WYG		 2105 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2106 sizeof(cmd), &cmd);
d91b1ba3
WYG		 2107 if (ret)
2108 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2109 else
2110 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2111 "succeeded, "
2112 "critical temperature is %d\n",
2113 priv->hw_params.ct_kill_threshold);
672639de
WYG		 2114 break;
2115 }
47f4a587
EG		 2116}
2117EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 2118
0ad91a35 2119
14a08a7f
EG		 2120/*
2121 * CARD_STATE_CMD
2122 *
2123 * Use: Sets the device's internal card state to enable, disable, or halt
2124 *
2125 * When in the 'enable' state the card operates as normal.
2126 * When in the 'disable' state, the card enters into a low power mode.
2127 * When in the 'halt' state, the card is shut down and must be fully
2128 * restarted to come back on.
2129 */
c496294e 2130int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 2131{
2132 struct iwl_host_cmd cmd = {
2133 .id = REPLY_CARD_STATE_CMD,
2134 .len = sizeof(u32),
2135 .data = &flags,
c2acea8e 2136 .flags = meta_flag,
14a08a7f
EG		 2137 };
2138
2139 return iwl_send_cmd(priv, &cmd);
2140}
2141
030f05ed
AK		 2142void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2143 struct iwl_rx_mem_buffer *rxb)
2144{
2145#ifdef CONFIG_IWLWIFI_DEBUG
2146 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2147 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2148 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2149 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2150#endif
2151}
2152EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2153
2154void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2155 struct iwl_rx_mem_buffer *rxb)
2156{
2157 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
396887a2 2158 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 2159 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 2160 "notification for %s:\n", len,
2161 get_cmd_string(pkt->hdr.cmd));
2162 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 2163}
2164EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 2165
2166void iwl_rx_reply_error(struct iwl_priv *priv,
2167 struct iwl_rx_mem_buffer *rxb)
2168{
2169 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2170
2171 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2172 "seq 0x%04X ser 0x%08X\n",
2173 le32_to_cpu(pkt->u.err_resp.error_type),
2174 get_cmd_string(pkt->u.err_resp.cmd_id),
2175 pkt->u.err_resp.cmd_id,
2176 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2177 le32_to_cpu(pkt->u.err_resp.error_info));
2178}
2179EXPORT_SYMBOL(iwl_rx_reply_error);
2180
a83b9141
WYG		 2181void iwl_clear_isr_stats(struct iwl_priv *priv)
2182{
2183 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2184}
a83b9141 2185
488829f1
AK		 2186int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2187 const struct ieee80211_tx_queue_params *params)
2188{
2189 struct iwl_priv *priv = hw->priv;
2190 unsigned long flags;
2191 int q;
2192
2193 IWL_DEBUG_MAC80211(priv, "enter\n");
2194
2195 if (!iwl_is_ready_rf(priv)) {
2196 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2197 return -EIO;
2198 }
2199
2200 if (queue >= AC_NUM) {
2201 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2202 return 0;
2203 }
2204
2205 q = AC_NUM - 1 - queue;
2206
2207 spin_lock_irqsave(&priv->lock, flags);
2208
2209 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2210 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2211 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2212 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2213 cpu_to_le16((params->txop * 32));
2214
2215 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2216 priv->qos_data.qos_active = 1;
2217
2218 if (priv->iw_mode == NL80211_IFTYPE_AP)
2219 iwl_activate_qos(priv, 1);
2220 else if (priv->assoc_id && iwl_is_associated(priv))
2221 iwl_activate_qos(priv, 0);
2222
2223 spin_unlock_irqrestore(&priv->lock, flags);
2224
2225 IWL_DEBUG_MAC80211(priv, "leave\n");
2226 return 0;
2227}
2228EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2229
2230static void iwl_ht_conf(struct iwl_priv *priv,
2231 struct ieee80211_bss_conf *bss_conf)
2232{
2233 struct ieee80211_sta_ht_cap *ht_conf;
2234 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2235 struct ieee80211_sta *sta;
2236
2237 IWL_DEBUG_MAC80211(priv, "enter: \n");
2238
2239 if (!iwl_conf->is_ht)
2240 return;
2241
2242
2243 /*
2244 * It is totally wrong to base global information on something
2245 * that is valid only when associated, alas, this driver works
2246 * that way and I don't know how to fix it.
2247 */
2248
2249 rcu_read_lock();
2250 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2251 if (!sta) {
2252 rcu_read_unlock();
2253 return;
2254 }
2255 ht_conf = &sta->ht_cap;
2256
5bbe233b
AK		 2257 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2258
2259 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2260
5bbe233b 2261 iwl_conf->ht_protection =
9ed6bcce 2262 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5bbe233b 2263 iwl_conf->non_GF_STA_present =
9ed6bcce 2264 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b
AK		 2265
2266 rcu_read_unlock();
2267
2268 IWL_DEBUG_MAC80211(priv, "leave\n");
2269}
2270
2271#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2272void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2273 struct ieee80211_vif *vif,
2274 struct ieee80211_bss_conf *bss_conf,
2275 u32 changes)
5bbe233b
AK		 2276{
2277 struct iwl_priv *priv = hw->priv;
3a650292 2278 int ret;
5bbe233b
AK		 2279
2280 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2281
2d0ddec5
JB		 2282 if (!iwl_is_alive(priv))
2283 return;
2284
2285 mutex_lock(&priv->mutex);
2286
2287 if (changes & BSS_CHANGED_BEACON &&
2288 priv->iw_mode == NL80211_IFTYPE_AP) {
2289 dev_kfree_skb(priv->ibss_beacon);
2290 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2291 }
2292
d7129e19
JB		 2293 if (changes & BSS_CHANGED_BEACON_INT) {
2294 priv->beacon_int = bss_conf->beacon_int;
2295 /* TODO: in AP mode, do something to make this take effect */
2296 }
2297
2298 if (changes & BSS_CHANGED_BSSID) {
2299 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2300
2301 /*
2302 * If there is currently a HW scan going on in the
2303 * background then we need to cancel it else the RXON
2304 * below/in post_associate will fail.
2305 */
2d0ddec5 2306 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 2307 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 2308 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2309 mutex_unlock(&priv->mutex);
2310 return;
2311 }
2d0ddec5 2312
d7129e19
JB		 2313 /* mac80211 only sets assoc when in STATION mode */
2314 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2315 bss_conf->assoc) {
2316 memcpy(priv->staging_rxon.bssid_addr,
2317 bss_conf->bssid, ETH_ALEN);
2d0ddec5 2318
d7129e19
JB		 2319 /* currently needed in a few places */
2320 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2321 } else {
2322 priv->staging_rxon.filter_flags &=
2323 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 2324 }
d7129e19 2325
2d0ddec5
JB		 2326 }
2327
d7129e19
JB		 2328 /*
2329 * This needs to be after setting the BSSID in case
2330 * mac80211 decides to do both changes at once because
2331 * it will invoke post_associate.
2332 */
2d0ddec5
JB		 2333 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2334 changes & BSS_CHANGED_BEACON) {
2335 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2336
2337 if (beacon)
2338 iwl_mac_beacon_update(hw, beacon);
2339 }
2340
5bbe233b
AK		 2341 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2342 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2343 bss_conf->use_short_preamble);
2344 if (bss_conf->use_short_preamble)
2345 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2346 else
2347 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2348 }
2349
2350 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2351 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2352 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2353 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2354 else
2355 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2356 }
2357
d7129e19
JB		 2358 if (changes & BSS_CHANGED_BASIC_RATES) {
2359 /* XXX use this information
2360 *
2361 * To do that, remove code from iwl_set_rate() and put something
2362 * like this here:
2363 *
2364 if (A-band)
2365 priv->staging_rxon.ofdm_basic_rates =
2366 bss_conf->basic_rates;
2367 else
2368 priv->staging_rxon.ofdm_basic_rates =
2369 bss_conf->basic_rates >> 4;
2370 priv->staging_rxon.cck_basic_rates =
2371 bss_conf->basic_rates & 0xF;
2372 */
2373 }
2374
5bbe233b
AK		 2375 if (changes & BSS_CHANGED_HT) {
2376 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2377
2378 if (priv->cfg->ops->hcmd->set_rxon_chain)
2379 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2380 }
2381
2382 if (changes & BSS_CHANGED_ASSOC) {
2383 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 2384 if (bss_conf->assoc) {
2385 priv->assoc_id = bss_conf->aid;
2386 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 2387 priv->timestamp = bss_conf->timestamp;
2388 priv->assoc_capability = bss_conf->assoc_capability;
2389
d7129e19
JB		 2390 /*
2391 * We have just associated, don't start scan too early
2392 * leave time for EAPOL exchange to complete.
2393 *
2394 * XXX: do this in mac80211
5bbe233b
AK		 2395 */
2396 priv->next_scan_jiffies = jiffies +
2397 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
d7129e19
JB		 2398 if (!iwl_is_rfkill(priv))
2399 priv->cfg->ops->lib->post_associate(priv);
2400 } else
5bbe233b 2401 priv->assoc_id = 0;
d7129e19
JB		 2402
2403 }
2404
2405 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2406 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2407 changes);
2408 ret = iwl_send_rxon_assoc(priv);
2409 if (!ret) {
2410 /* Sync active_rxon with latest change. */
2411 memcpy((void *)&priv->active_rxon,
2412 &priv->staging_rxon,
2413 sizeof(struct iwl_rxon_cmd));
5bbe233b 2414 }
5bbe233b 2415 }
d7129e19
JB		 2416
2417 mutex_unlock(&priv->mutex);
2418
2d0ddec5 2419 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2420}
2421EXPORT_SYMBOL(iwl_bss_info_changed);
2422
9944b938
AK		 2423int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2424{
2425 struct iwl_priv *priv = hw->priv;
2426 unsigned long flags;
2427 __le64 timestamp;
2428
2429 IWL_DEBUG_MAC80211(priv, "enter\n");
2430
2431 if (!iwl_is_ready_rf(priv)) {
2432 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2433 return -EIO;
2434 }
2435
2436 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2437 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2438 return -EIO;
2439 }
2440
2441 spin_lock_irqsave(&priv->lock, flags);
2442
2443 if (priv->ibss_beacon)
2444 dev_kfree_skb(priv->ibss_beacon);
2445
2446 priv->ibss_beacon = skb;
2447
2448 priv->assoc_id = 0;
2449 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2450 priv->timestamp = le64_to_cpu(timestamp);
2451
2452 IWL_DEBUG_MAC80211(priv, "leave\n");
2453 spin_unlock_irqrestore(&priv->lock, flags);
2454
2455 iwl_reset_qos(priv);
2456
2457 priv->cfg->ops->lib->post_associate(priv);
2458
2459
2460 return 0;
2461}
2462EXPORT_SYMBOL(iwl_mac_beacon_update);
2463
727882d6
AK		 2464int iwl_set_mode(struct iwl_priv *priv, int mode)
2465{
2466 if (mode == NL80211_IFTYPE_ADHOC) {
2467 const struct iwl_channel_info *ch_info;
2468
2469 ch_info = iwl_get_channel_info(priv,
2470 priv->band,
2471 le16_to_cpu(priv->staging_rxon.channel));
2472
2473 if (!ch_info || !is_channel_ibss(ch_info)) {
2474 IWL_ERR(priv, "channel %d not IBSS channel\n",
2475 le16_to_cpu(priv->staging_rxon.channel));
2476 return -EINVAL;
2477 }
2478 }
2479
2480 iwl_connection_init_rx_config(priv, mode);
2481
2482 if (priv->cfg->ops->hcmd->set_rxon_chain)
2483 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2484
2485 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2486
c587de0b 2487 iwl_clear_stations_table(priv);
727882d6
AK		 2488
2489 /* dont commit rxon if rf-kill is on*/
2490 if (!iwl_is_ready_rf(priv))
2491 return -EAGAIN;
2492
727882d6
AK		 2493 iwlcore_commit_rxon(priv);
2494
2495 return 0;
2496}
2497EXPORT_SYMBOL(iwl_set_mode);
2498
cbb6ab94
AK		 2499int iwl_mac_add_interface(struct ieee80211_hw *hw,
2500 struct ieee80211_if_init_conf *conf)
2501{
2502 struct iwl_priv *priv = hw->priv;
2503 unsigned long flags;
2504
2505 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2506
2507 if (priv->vif) {
2508 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2509 return -EOPNOTSUPP;
2510 }
2511
2512 spin_lock_irqsave(&priv->lock, flags);
2513 priv->vif = conf->vif;
2514 priv->iw_mode = conf->type;
2515
2516 spin_unlock_irqrestore(&priv->lock, flags);
2517
2518 mutex_lock(&priv->mutex);
2519
2520 if (conf->mac_addr) {
2521 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2522 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2523 }
2524
2525 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2526 /* we are not ready, will run again when ready */
2527 set_bit(STATUS_MODE_PENDING, &priv->status);
2528
2529 mutex_unlock(&priv->mutex);
2530
2531 IWL_DEBUG_MAC80211(priv, "leave\n");
2532 return 0;
2533}
2534EXPORT_SYMBOL(iwl_mac_add_interface);
2535
d8052319
AK		 2536void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2537 struct ieee80211_if_init_conf *conf)
2538{
2539 struct iwl_priv *priv = hw->priv;
2540
2541 IWL_DEBUG_MAC80211(priv, "enter\n");
2542
2543 mutex_lock(&priv->mutex);
2544
2545 if (iwl_is_ready_rf(priv)) {
2546 iwl_scan_cancel_timeout(priv, 100);
2547 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2548 iwlcore_commit_rxon(priv);
2549 }
2550 if (priv->vif == conf->vif) {
2551 priv->vif = NULL;
2552 memset(priv->bssid, 0, ETH_ALEN);
2553 }
2554 mutex_unlock(&priv->mutex);
2555
2556 IWL_DEBUG_MAC80211(priv, "leave\n");
2557
2558}
2559EXPORT_SYMBOL(iwl_mac_remove_interface);
2560
4808368d
AK		 2561/**
2562 * iwl_mac_config - mac80211 config callback
2563 *
2564 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2565 * be set inappropriately and the driver currently sets the hardware up to
2566 * use it whenever needed.
2567 */
2568int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2569{
2570 struct iwl_priv *priv = hw->priv;
2571 const struct iwl_channel_info *ch_info;
2572 struct ieee80211_conf *conf = &hw->conf;
28bd723b 2573 struct iwl_ht_info *ht_conf = &priv->current_ht_config;
4808368d
AK		 2574 unsigned long flags = 0;
2575 int ret = 0;
2576 u16 ch;
2577 int scan_active = 0;
2578
2579 mutex_lock(&priv->mutex);
2580
4808368d
AK		 2581 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2582 conf->channel->hw_value, changed);
2583
2584 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2585 test_bit(STATUS_SCANNING, &priv->status))) {
2586 scan_active = 1;
2587 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2588 }
2589
2590
2591 /* during scanning mac80211 will delay channel setting until
2592 * scan finish with changed = 0
2593 */
2594 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2595 if (scan_active)
2596 goto set_ch_out;
2597
2598 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2599 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2600 if (!is_channel_valid(ch_info)) {
2601 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2602 ret = -EINVAL;
2603 goto set_ch_out;
2604 }
2605
2606 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2607 !is_channel_ibss(ch_info)) {
2608 IWL_ERR(priv, "channel %d in band %d not "
2609 "IBSS channel\n",
2610 conf->channel->hw_value, conf->channel->band);
2611 ret = -EINVAL;
2612 goto set_ch_out;
2613 }
2614
4808368d
AK		 2615 spin_lock_irqsave(&priv->lock, flags);
2616
28bd723b
DH		 2617 /* Configure HT40 channels */
2618 ht_conf->is_ht = conf_is_ht(conf);
2619 if (ht_conf->is_ht) {
2620 if (conf_is_ht40_minus(conf)) {
2621 ht_conf->extension_chan_offset =
2622 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2623 ht_conf->supported_chan_width =
2624 IWL_CHANNEL_WIDTH_40MHZ;
2625 } else if (conf_is_ht40_plus(conf)) {
2626 ht_conf->extension_chan_offset =
2627 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2628 ht_conf->supported_chan_width =
2629 IWL_CHANNEL_WIDTH_40MHZ;
2630 } else {
2631 ht_conf->extension_chan_offset =
2632 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2633 ht_conf->supported_chan_width =
2634 IWL_CHANNEL_WIDTH_20MHZ;
2635 }
2636 } else
2637 ht_conf->supported_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
2638 /* Default to no protection. Protection mode will later be set
2639 * from BSS config in iwl_ht_conf */
2640 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2641
2642 /* if we are switching from ht to 2.4 clear flags
2643 * from any ht related info since 2.4 does not
2644 * support ht */
2645 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2646 priv->staging_rxon.flags = 0;
2647
2648 iwl_set_rxon_channel(priv, conf->channel);
2649
2650 iwl_set_flags_for_band(priv, conf->channel->band);
2651 spin_unlock_irqrestore(&priv->lock, flags);
2652 set_ch_out:
2653 /* The list of supported rates and rate mask can be different
2654 * for each band; since the band may have changed, reset
2655 * the rate mask to what mac80211 lists */
2656 iwl_set_rate(priv);
2657 }
2658
e312c24c
JB		 2659 if (changed & IEEE80211_CONF_CHANGE_PS) {
2660 ret = iwl_power_update_mode(priv, false);
4808368d 2661 if (ret)
e312c24c 2662 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2663 }
2664
2665 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2666 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2667 priv->tx_power_user_lmt, conf->power_level);
2668
2669 iwl_set_tx_power(priv, conf->power_level, false);
2670 }
2671
2672 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2673 if (priv->cfg->ops->hcmd->set_rxon_chain)
2674 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2675
0cf4c01e
MA		 2676 if (!iwl_is_ready(priv)) {
2677 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2678 goto out;
2679 }
2680
4808368d
AK		 2681 if (scan_active)
2682 goto out;
2683
2684 if (memcmp(&priv->active_rxon,
2685 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2686 iwlcore_commit_rxon(priv);
2687 else
2688 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2689
2690
2691out:
2692 IWL_DEBUG_MAC80211(priv, "leave\n");
2693 mutex_unlock(&priv->mutex);
2694 return ret;
2695}
2696EXPORT_SYMBOL(iwl_mac_config);
2697
aa89f31e
AK		 2698int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2699 struct ieee80211_tx_queue_stats *stats)
2700{
2701 struct iwl_priv *priv = hw->priv;
2702 int i, avail;
2703 struct iwl_tx_queue *txq;
2704 struct iwl_queue *q;
2705 unsigned long flags;
2706
2707 IWL_DEBUG_MAC80211(priv, "enter\n");
2708
2709 if (!iwl_is_ready_rf(priv)) {
2710 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2711 return -EIO;
2712 }
2713
2714 spin_lock_irqsave(&priv->lock, flags);
2715
2716 for (i = 0; i < AC_NUM; i++) {
2717 txq = &priv->txq[i];
2718 q = &txq->q;
2719 avail = iwl_queue_space(q);
2720
2721 stats[i].len = q->n_window - avail;
2722 stats[i].limit = q->n_window - q->high_mark;
2723 stats[i].count = q->n_window;
2724
2725 }
2726 spin_unlock_irqrestore(&priv->lock, flags);
2727
2728 IWL_DEBUG_MAC80211(priv, "leave\n");
2729
2730 return 0;
2731}
2732EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2733
bd564261
AK		 2734void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2735{
2736 struct iwl_priv *priv = hw->priv;
2737 unsigned long flags;
2738
2739 mutex_lock(&priv->mutex);
2740 IWL_DEBUG_MAC80211(priv, "enter\n");
2741
2742 spin_lock_irqsave(&priv->lock, flags);
2743 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2744 spin_unlock_irqrestore(&priv->lock, flags);
2745
2746 iwl_reset_qos(priv);
2747
2748 spin_lock_irqsave(&priv->lock, flags);
2749 priv->assoc_id = 0;
2750 priv->assoc_capability = 0;
2751 priv->assoc_station_added = 0;
2752
2753 /* new association get rid of ibss beacon skb */
2754 if (priv->ibss_beacon)
2755 dev_kfree_skb(priv->ibss_beacon);
2756
2757 priv->ibss_beacon = NULL;
2758
57c4d7b4 2759 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2760 priv->timestamp = 0;
2761 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2762 priv->beacon_int = 0;
2763
2764 spin_unlock_irqrestore(&priv->lock, flags);
2765
2766 if (!iwl_is_ready_rf(priv)) {
2767 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2768 mutex_unlock(&priv->mutex);
2769 return;
2770 }
2771
2772 /* we are restarting association process
2773 * clear RXON_FILTER_ASSOC_MSK bit
2774 */
2775 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2776 iwl_scan_cancel_timeout(priv, 100);
2777 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2778 iwlcore_commit_rxon(priv);
2779 }
2780
bd564261 2781 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
bd564261
AK		 2782 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2783 mutex_unlock(&priv->mutex);
2784 return;
2785 }
2786
2787 iwl_set_rate(priv);
2788
2789 mutex_unlock(&priv->mutex);
2790
2791 IWL_DEBUG_MAC80211(priv, "leave\n");
2792}
2793EXPORT_SYMBOL(iwl_mac_reset_tsf);
2794
20594eb0
WYG		 2795#ifdef CONFIG_IWLWIFI_DEBUGFS
2796
2797#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2798
2799void iwl_reset_traffic_log(struct iwl_priv *priv)
2800{
2801 priv->tx_traffic_idx = 0;
2802 priv->rx_traffic_idx = 0;
2803 if (priv->tx_traffic)
2804 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2805 if (priv->rx_traffic)
2806 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2807}
2808
2809int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2810{
2811 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2812
2813 if (iwl_debug_level & IWL_DL_TX) {
2814 if (!priv->tx_traffic) {
2815 priv->tx_traffic =
2816 kzalloc(traffic_size, GFP_KERNEL);
2817 if (!priv->tx_traffic)
2818 return -ENOMEM;
2819 }
2820 }
2821 if (iwl_debug_level & IWL_DL_RX) {
2822 if (!priv->rx_traffic) {
2823 priv->rx_traffic =
2824 kzalloc(traffic_size, GFP_KERNEL);
2825 if (!priv->rx_traffic)
2826 return -ENOMEM;
2827 }
2828 }
2829 iwl_reset_traffic_log(priv);
2830 return 0;
2831}
2832EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2833
2834void iwl_free_traffic_mem(struct iwl_priv *priv)
2835{
2836 kfree(priv->tx_traffic);
2837 priv->tx_traffic = NULL;
2838
2839 kfree(priv->rx_traffic);
2840 priv->rx_traffic = NULL;
2841}
2842EXPORT_SYMBOL(iwl_free_traffic_mem);
2843
2844void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2845 u16 length, struct ieee80211_hdr *header)
2846{
2847 __le16 fc;
2848 u16 len;
2849
2850 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2851 return;
2852
2853 if (!priv->tx_traffic)
2854 return;
2855
2856 fc = header->frame_control;
2857 if (ieee80211_is_data(fc)) {
2858 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2859 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2860 memcpy((priv->tx_traffic +
2861 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2862 header, len);
2863 priv->tx_traffic_idx =
2864 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2865 }
2866}
2867EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2868
2869void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2870 u16 length, struct ieee80211_hdr *header)
2871{
2872 __le16 fc;
2873 u16 len;
2874
2875 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2876 return;
2877
2878 if (!priv->rx_traffic)
2879 return;
2880
2881 fc = header->frame_control;
2882 if (ieee80211_is_data(fc)) {
2883 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2884 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2885 memcpy((priv->rx_traffic +
2886 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2887 header, len);
2888 priv->rx_traffic_idx =
2889 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2890 }
2891}
2892EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2893
2894const char *get_mgmt_string(int cmd)
2895{
2896 switch (cmd) {
2897 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2898 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2899 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2900 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2901 IWL_CMD(MANAGEMENT_PROBE_REQ);
2902 IWL_CMD(MANAGEMENT_PROBE_RESP);
2903 IWL_CMD(MANAGEMENT_BEACON);
2904 IWL_CMD(MANAGEMENT_ATIM);
2905 IWL_CMD(MANAGEMENT_DISASSOC);
2906 IWL_CMD(MANAGEMENT_AUTH);
2907 IWL_CMD(MANAGEMENT_DEAUTH);
2908 IWL_CMD(MANAGEMENT_ACTION);
2909 default:
2910 return "UNKNOWN";
2911
2912 }
2913}
2914
2915const char *get_ctrl_string(int cmd)
2916{
2917 switch (cmd) {
2918 IWL_CMD(CONTROL_BACK_REQ);
2919 IWL_CMD(CONTROL_BACK);
2920 IWL_CMD(CONTROL_PSPOLL);
2921 IWL_CMD(CONTROL_RTS);
2922 IWL_CMD(CONTROL_CTS);
2923 IWL_CMD(CONTROL_ACK);
2924 IWL_CMD(CONTROL_CFEND);
2925 IWL_CMD(CONTROL_CFENDACK);
2926 default:
2927 return "UNKNOWN";
2928
2929 }
2930}
2931
2932void iwl_clear_tx_stats(struct iwl_priv *priv)
2933{
2934 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
2935
2936}
2937
2938void iwl_clear_rx_stats(struct iwl_priv *priv)
2939{
2940 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
2941}
2942
2943/*
2944 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2945 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2946 * Use debugFs to display the rx/rx_statistics
2947 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2948 * information will be recorded, but DATA pkt still will be recorded
2949 * for the reason of iwl_led.c need to control the led blinking based on
2950 * number of tx and rx data.
2951 *
2952 */
2953void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2954{
2955 struct traffic_stats *stats;
2956
2957 if (is_tx)
2958 stats = &priv->tx_stats;
2959 else
2960 stats = &priv->rx_stats;
2961
2962 if (ieee80211_is_mgmt(fc)) {
2963 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2964 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2965 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2966 break;
2967 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2968 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2969 break;
2970 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2971 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2972 break;
2973 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2974 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2975 break;
2976 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2977 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2978 break;
2979 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2980 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2981 break;
2982 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2983 stats->mgmt[MANAGEMENT_BEACON]++;
2984 break;
2985 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2986 stats->mgmt[MANAGEMENT_ATIM]++;
2987 break;
2988 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2989 stats->mgmt[MANAGEMENT_DISASSOC]++;
2990 break;
2991 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2992 stats->mgmt[MANAGEMENT_AUTH]++;
2993 break;
2994 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2995 stats->mgmt[MANAGEMENT_DEAUTH]++;
2996 break;
2997 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2998 stats->mgmt[MANAGEMENT_ACTION]++;
2999 break;
3000 }
3001 } else if (ieee80211_is_ctl(fc)) {
3002 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3003 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3004 stats->ctrl[CONTROL_BACK_REQ]++;
3005 break;
3006 case cpu_to_le16(IEEE80211_STYPE_BACK):
3007 stats->ctrl[CONTROL_BACK]++;
3008 break;
3009 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3010 stats->ctrl[CONTROL_PSPOLL]++;
3011 break;
3012 case cpu_to_le16(IEEE80211_STYPE_RTS):
3013 stats->ctrl[CONTROL_RTS]++;
3014 break;
3015 case cpu_to_le16(IEEE80211_STYPE_CTS):
3016 stats->ctrl[CONTROL_CTS]++;
3017 break;
3018 case cpu_to_le16(IEEE80211_STYPE_ACK):
3019 stats->ctrl[CONTROL_ACK]++;
3020 break;
3021 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3022 stats->ctrl[CONTROL_CFEND]++;
3023 break;
3024 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3025 stats->ctrl[CONTROL_CFENDACK]++;
3026 break;
3027 }
3028 } else {
3029 /* data */
3030 stats->data_cnt++;
3031 stats->data_bytes += len;
3032 }
3033}
3034EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 3035#endif
3036
6da3a13e
WYG		 3037#ifdef CONFIG_PM
3038
3039int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3040{
3041 struct iwl_priv *priv = pci_get_drvdata(pdev);
3042
3043 /*
3044 * This function is called when system goes into suspend state
3045 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3046 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3047 * it will not call apm_ops.stop() to stop the DMA operation.
3048 * Calling apm_ops.stop here to make sure we stop the DMA.
3049 */
3050 priv->cfg->ops->lib->apm_ops.stop(priv);
3051
3052 pci_save_state(pdev);
3053 pci_disable_device(pdev);
3054 pci_set_power_state(pdev, PCI_D3hot);
3055
3056 return 0;
3057}
3058EXPORT_SYMBOL(iwl_pci_suspend);
3059
3060int iwl_pci_resume(struct pci_dev *pdev)
3061{
3062 struct iwl_priv *priv = pci_get_drvdata(pdev);
3063 int ret;
3064
3065 pci_set_power_state(pdev, PCI_D0);
3066 ret = pci_enable_device(pdev);
3067 if (ret)
3068 return ret;
3069 pci_restore_state(pdev);
3070 iwl_enable_interrupts(priv);
3071
3072 return 0;
3073}
3074EXPORT_SYMBOL(iwl_pci_resume);
3075
3076#endif /* CONFIG_PM */
Ubuntu Artful kernel mirror