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792bc3cb WYG |
1 | /****************************************************************************** |
2 | * | |
3 | * GPL LICENSE SUMMARY | |
4 | * | |
4e318262 | 5 | * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved. |
792bc3cb WYG |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of version 2 of the GNU General Public License as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
19 | * USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution | |
22 | * in the file called LICENSE.GPL. | |
23 | * | |
24 | * Contact Information: | |
25 | * Intel Linux Wireless <ilw@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
30 | #include <linux/kernel.h> | |
792bc3cb WYG |
31 | #include <linux/init.h> |
32 | ||
33 | #include "iwl-dev.h" | |
81b8176e | 34 | #include "iwl-io.h" |
19e6cda0 | 35 | #include "iwl-agn-hw.h" |
741a6266 | 36 | #include "iwl-agn.h" |
0de76736 | 37 | #include "iwl-agn-calib.h" |
bdfbf092 | 38 | #include "iwl-trans.h" |
dda61a44 | 39 | #include "iwl-fh.h" |
d0f76d68 | 40 | #include "iwl-op-mode.h" |
741a6266 | 41 | |
de7f5f92 DF |
42 | /****************************************************************************** |
43 | * | |
44 | * uCode download functions | |
45 | * | |
46 | ******************************************************************************/ | |
47 | ||
0692fe41 JB |
48 | static inline const struct fw_img * |
49 | iwl_get_ucode_image(struct iwl_priv *priv, enum iwl_ucode_type ucode_type) | |
8929c24b | 50 | { |
6dfa8d01 DS |
51 | if (ucode_type >= IWL_UCODE_TYPE_MAX) |
52 | return NULL; | |
53 | ||
54 | return &priv->fw->img[ucode_type]; | |
8929c24b DF |
55 | } |
56 | ||
741a6266 WYG |
57 | /* |
58 | * Calibration | |
59 | */ | |
e1991885 | 60 | static int iwl_set_Xtal_calib(struct iwl_priv *priv) |
741a6266 WYG |
61 | { |
62 | struct iwl_calib_xtal_freq_cmd cmd; | |
63 | __le16 *xtal_calib = | |
11483b5c | 64 | (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL); |
741a6266 | 65 | |
1f8bf039 | 66 | iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD); |
741a6266 WYG |
67 | cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]); |
68 | cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]); | |
e1991885 | 69 | return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd)); |
741a6266 WYG |
70 | } |
71 | ||
e1991885 | 72 | static int iwl_set_temperature_offset_calib(struct iwl_priv *priv) |
bf53f939 SZ |
73 | { |
74 | struct iwl_calib_temperature_offset_cmd cmd; | |
75 | __le16 *offset_calib = | |
11483b5c | 76 | (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE); |
1f8bf039 WYG |
77 | |
78 | memset(&cmd, 0, sizeof(cmd)); | |
79 | iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); | |
456fc37e | 80 | memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib)); |
bf53f939 SZ |
81 | if (!(cmd.radio_sensor_offset)) |
82 | cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET; | |
1f8bf039 | 83 | |
e1991885 | 84 | IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n", |
2e277996 | 85 | le16_to_cpu(cmd.radio_sensor_offset)); |
e1991885 | 86 | return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd)); |
bf53f939 SZ |
87 | } |
88 | ||
e1991885 | 89 | static int iwl_set_temperature_offset_calib_v2(struct iwl_priv *priv) |
c6f30347 WYG |
90 | { |
91 | struct iwl_calib_temperature_offset_v2_cmd cmd; | |
11483b5c | 92 | __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv, |
c6f30347 WYG |
93 | EEPROM_KELVIN_TEMPERATURE); |
94 | __le16 *offset_calib_low = | |
11483b5c | 95 | (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE); |
7d8f2d50 | 96 | struct iwl_eeprom_calib_hdr *hdr; |
c6f30347 WYG |
97 | |
98 | memset(&cmd, 0, sizeof(cmd)); | |
99 | iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); | |
11483b5c | 100 | hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv, |
7d8f2d50 | 101 | EEPROM_CALIB_ALL); |
c6f30347 | 102 | memcpy(&cmd.radio_sensor_offset_high, offset_calib_high, |
00085006 | 103 | sizeof(*offset_calib_high)); |
c6f30347 | 104 | memcpy(&cmd.radio_sensor_offset_low, offset_calib_low, |
00085006 | 105 | sizeof(*offset_calib_low)); |
c6f30347 | 106 | if (!(cmd.radio_sensor_offset_low)) { |
e1991885 | 107 | IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n"); |
c6f30347 WYG |
108 | cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET; |
109 | cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET; | |
110 | } | |
7d8f2d50 WYG |
111 | memcpy(&cmd.burntVoltageRef, &hdr->voltage, |
112 | sizeof(hdr->voltage)); | |
c6f30347 | 113 | |
e1991885 | 114 | IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n", |
c6f30347 | 115 | le16_to_cpu(cmd.radio_sensor_offset_high)); |
e1991885 | 116 | IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n", |
c6f30347 | 117 | le16_to_cpu(cmd.radio_sensor_offset_low)); |
e1991885 | 118 | IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n", |
c6f30347 WYG |
119 | le16_to_cpu(cmd.burntVoltageRef)); |
120 | ||
e1991885 | 121 | return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd)); |
c6f30347 WYG |
122 | } |
123 | ||
e1991885 | 124 | static int iwl_send_calib_cfg(struct iwl_priv *priv) |
741a6266 WYG |
125 | { |
126 | struct iwl_calib_cfg_cmd calib_cfg_cmd; | |
127 | struct iwl_host_cmd cmd = { | |
128 | .id = CALIBRATION_CFG_CMD, | |
3fa50738 JB |
129 | .len = { sizeof(struct iwl_calib_cfg_cmd), }, |
130 | .data = { &calib_cfg_cmd, }, | |
741a6266 WYG |
131 | }; |
132 | ||
133 | memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd)); | |
134 | calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL; | |
135 | calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL; | |
136 | calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL; | |
df2a4dc8 WYG |
137 | calib_cfg_cmd.ucd_calib_cfg.flags = |
138 | IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK; | |
741a6266 | 139 | |
e10a0533 | 140 | return iwl_dvm_send_cmd(priv, &cmd); |
741a6266 WYG |
141 | } |
142 | ||
e1991885 | 143 | int iwl_init_alive_start(struct iwl_priv *priv) |
741a6266 | 144 | { |
ca7966c8 | 145 | int ret; |
741a6266 | 146 | |
2152268f EG |
147 | if (priv->cfg->bt_params && |
148 | priv->cfg->bt_params->advanced_bt_coexist) { | |
f7322f8f WYG |
149 | /* |
150 | * Tell uCode we are ready to perform calibration | |
151 | * need to perform this before any calibration | |
152 | * no need to close the envlope since we are going | |
153 | * to load the runtime uCode later. | |
154 | */ | |
e1991885 | 155 | ret = iwl_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN, |
f7322f8f | 156 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); |
ca7966c8 JB |
157 | if (ret) |
158 | return ret; | |
f7322f8f WYG |
159 | |
160 | } | |
ca7966c8 | 161 | |
e1991885 | 162 | ret = iwl_send_calib_cfg(priv); |
ca7966c8 JB |
163 | if (ret) |
164 | return ret; | |
bf53f939 SZ |
165 | |
166 | /** | |
167 | * temperature offset calibration is only needed for runtime ucode, | |
168 | * so prepare the value now. | |
169 | */ | |
2152268f EG |
170 | if (priv->cfg->need_temp_offset_calib) { |
171 | if (priv->cfg->temp_offset_v2) | |
e1991885 | 172 | return iwl_set_temperature_offset_calib_v2(priv); |
c6f30347 | 173 | else |
e1991885 | 174 | return iwl_set_temperature_offset_calib(priv); |
c6f30347 | 175 | } |
741a6266 | 176 | |
ca7966c8 | 177 | return 0; |
741a6266 WYG |
178 | } |
179 | ||
aca86268 | 180 | static int iwl_send_wimax_coex(struct iwl_priv *priv) |
f4012413 WYG |
181 | { |
182 | struct iwl_wimax_coex_cmd coex_cmd; | |
183 | ||
85560af3 JB |
184 | /* coexistence is disabled */ |
185 | memset(&coex_cmd, 0, sizeof(coex_cmd)); | |
f4012413 | 186 | |
e10a0533 | 187 | return iwl_dvm_send_cmd_pdu(priv, |
e419d62d | 188 | COEX_PRIORITY_TABLE_CMD, CMD_SYNC, |
f4012413 WYG |
189 | sizeof(coex_cmd), &coex_cmd); |
190 | } | |
191 | ||
66128b14 | 192 | static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = { |
aeb4a2ee WYG |
193 | ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | |
194 | (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
195 | ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
196 | (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
197 | ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
198 | (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
199 | ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
200 | (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
201 | ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
202 | (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
203 | ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
204 | (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
205 | ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
206 | (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
207 | ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
208 | (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
209 | ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | | |
210 | (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), | |
211 | 0, 0, 0, 0, 0, 0, 0 | |
212 | }; | |
213 | ||
e1991885 | 214 | void iwl_send_prio_tbl(struct iwl_priv *priv) |
aeb4a2ee WYG |
215 | { |
216 | struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd; | |
217 | ||
66128b14 DF |
218 | memcpy(prio_tbl_cmd.prio_tbl, iwl_bt_prio_tbl, |
219 | sizeof(iwl_bt_prio_tbl)); | |
e10a0533 | 220 | if (iwl_dvm_send_cmd_pdu(priv, |
e419d62d | 221 | REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC, |
aeb4a2ee | 222 | sizeof(prio_tbl_cmd), &prio_tbl_cmd)) |
e1991885 | 223 | IWL_ERR(priv, "failed to send BT prio tbl command\n"); |
aeb4a2ee WYG |
224 | } |
225 | ||
e1991885 | 226 | int iwl_send_bt_env(struct iwl_priv *priv, u8 action, u8 type) |
aeb4a2ee WYG |
227 | { |
228 | struct iwl_bt_coex_prot_env_cmd env_cmd; | |
ca7966c8 | 229 | int ret; |
aeb4a2ee WYG |
230 | |
231 | env_cmd.action = action; | |
232 | env_cmd.type = type; | |
e10a0533 | 233 | ret = iwl_dvm_send_cmd_pdu(priv, |
e419d62d | 234 | REPLY_BT_COEX_PROT_ENV, CMD_SYNC, |
ca7966c8 JB |
235 | sizeof(env_cmd), &env_cmd); |
236 | if (ret) | |
e1991885 | 237 | IWL_ERR(priv, "failed to send BT env command\n"); |
ca7966c8 | 238 | return ret; |
aeb4a2ee WYG |
239 | } |
240 | ||
241 | ||
e1991885 | 242 | static int iwl_alive_notify(struct iwl_priv *priv) |
741a6266 | 243 | { |
7415952f | 244 | int ret; |
741a6266 | 245 | |
68e8dfda | 246 | iwl_trans_fw_alive(priv->trans); |
e755f882 JB |
247 | |
248 | priv->passive_no_rx = false; | |
249 | priv->transport_queue_stop = 0; | |
e7cad69c | 250 | |
e1991885 | 251 | ret = iwl_send_wimax_coex(priv); |
7415952f WYG |
252 | if (ret) |
253 | return ret; | |
254 | ||
2152268f | 255 | if (!priv->cfg->no_xtal_calib) { |
e1991885 | 256 | ret = iwl_set_Xtal_calib(priv); |
93b64105 JB |
257 | if (ret) |
258 | return ret; | |
259 | } | |
741a6266 | 260 | |
e1991885 | 261 | return iwl_send_calib_results(priv); |
741a6266 | 262 | } |
db41dd27 WYG |
263 | |
264 | ||
265 | /** | |
266 | * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host, | |
267 | * using sample data 100 bytes apart. If these sample points are good, | |
268 | * it's a pretty good bet that everything between them is good, too. | |
269 | */ | |
6dfa8d01 | 270 | static int iwl_verify_sec_sparse(struct iwl_priv *priv, |
0692fe41 | 271 | const struct fw_desc *fw_desc) |
db41dd27 | 272 | { |
35b1d92d JB |
273 | __le32 *image = (__le32 *)fw_desc->v_addr; |
274 | u32 len = fw_desc->len; | |
db41dd27 | 275 | u32 val; |
db41dd27 WYG |
276 | u32 i; |
277 | ||
e1991885 | 278 | IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len); |
db41dd27 WYG |
279 | |
280 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | |
281 | /* read data comes through single port, auto-incr addr */ | |
282 | /* NOTE: Use the debugless read so we don't flood kernel log | |
283 | * if IWL_DL_IO is set */ | |
68e8dfda | 284 | iwl_write_direct32(priv->trans, HBUS_TARG_MEM_RADDR, |
6dfa8d01 | 285 | i + fw_desc->offset); |
68e8dfda | 286 | val = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT); |
fb66216f JB |
287 | if (val != le32_to_cpu(*image)) |
288 | return -EIO; | |
db41dd27 WYG |
289 | } |
290 | ||
fb66216f | 291 | return 0; |
db41dd27 WYG |
292 | } |
293 | ||
6dfa8d01 | 294 | static void iwl_print_mismatch_sec(struct iwl_priv *priv, |
0692fe41 | 295 | const struct fw_desc *fw_desc) |
db41dd27 | 296 | { |
35b1d92d JB |
297 | __le32 *image = (__le32 *)fw_desc->v_addr; |
298 | u32 len = fw_desc->len; | |
db41dd27 | 299 | u32 val; |
fb66216f JB |
300 | u32 offs; |
301 | int errors = 0; | |
db41dd27 | 302 | |
e1991885 | 303 | IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len); |
db41dd27 | 304 | |
68e8dfda | 305 | iwl_write_direct32(priv->trans, HBUS_TARG_MEM_RADDR, |
6dfa8d01 | 306 | fw_desc->offset); |
db41dd27 | 307 | |
fb66216f JB |
308 | for (offs = 0; |
309 | offs < len && errors < 20; | |
310 | offs += sizeof(u32), image++) { | |
db41dd27 | 311 | /* read data comes through single port, auto-incr addr */ |
68e8dfda | 312 | val = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT); |
db41dd27 | 313 | if (val != le32_to_cpu(*image)) { |
e1991885 | 314 | IWL_ERR(priv, "uCode INST section at " |
fb66216f JB |
315 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
316 | offs, val, le32_to_cpu(*image)); | |
317 | errors++; | |
db41dd27 WYG |
318 | } |
319 | } | |
db41dd27 WYG |
320 | } |
321 | ||
322 | /** | |
323 | * iwl_verify_ucode - determine which instruction image is in SRAM, | |
324 | * and verify its contents | |
325 | */ | |
e1991885 | 326 | static int iwl_verify_ucode(struct iwl_priv *priv, |
de7f5f92 | 327 | enum iwl_ucode_type ucode_type) |
db41dd27 | 328 | { |
0692fe41 | 329 | const struct fw_img *img = iwl_get_ucode_image(priv, ucode_type); |
baa00056 DF |
330 | |
331 | if (!img) { | |
e1991885 | 332 | IWL_ERR(priv, "Invalid ucode requested (%d)\n", ucode_type); |
baa00056 DF |
333 | return -EINVAL; |
334 | } | |
335 | ||
6dfa8d01 | 336 | if (!iwl_verify_sec_sparse(priv, &img->sec[IWL_UCODE_SECTION_INST])) { |
e1991885 | 337 | IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n"); |
db41dd27 WYG |
338 | return 0; |
339 | } | |
340 | ||
e1991885 | 341 | IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n"); |
fb66216f | 342 | |
6dfa8d01 | 343 | iwl_print_mismatch_sec(priv, &img->sec[IWL_UCODE_SECTION_INST]); |
fb66216f | 344 | return -EIO; |
db41dd27 | 345 | } |
ca7966c8 | 346 | |
69a679b0 | 347 | struct iwl_alive_data { |
ca7966c8 JB |
348 | bool valid; |
349 | u8 subtype; | |
350 | }; | |
351 | ||
db662d47 JB |
352 | static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, |
353 | struct iwl_rx_packet *pkt, void *data) | |
ca7966c8 | 354 | { |
4bd14dd5 JB |
355 | struct iwl_priv *priv = |
356 | container_of(notif_wait, struct iwl_priv, notif_wait); | |
69a679b0 | 357 | struct iwl_alive_data *alive_data = data; |
ca7966c8 JB |
358 | struct iwl_alive_resp *palive; |
359 | ||
f8d7c1a1 | 360 | palive = (void *)pkt->data; |
ca7966c8 | 361 | |
e1991885 | 362 | IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision " |
ca7966c8 JB |
363 | "0x%01X 0x%01X\n", |
364 | palive->is_valid, palive->ver_type, | |
365 | palive->ver_subtype); | |
366 | ||
2fdfc476 | 367 | priv->device_pointers.error_event_table = |
ca7966c8 | 368 | le32_to_cpu(palive->error_event_table_ptr); |
2fdfc476 | 369 | priv->device_pointers.log_event_table = |
ca7966c8 JB |
370 | le32_to_cpu(palive->log_event_table_ptr); |
371 | ||
372 | alive_data->subtype = palive->ver_subtype; | |
373 | alive_data->valid = palive->is_valid == UCODE_VALID_OK; | |
db662d47 JB |
374 | |
375 | return true; | |
ca7966c8 JB |
376 | } |
377 | ||
378 | #define UCODE_ALIVE_TIMEOUT HZ | |
379 | #define UCODE_CALIB_TIMEOUT (2*HZ) | |
380 | ||
e1991885 | 381 | int iwl_load_ucode_wait_alive(struct iwl_priv *priv, |
de7f5f92 | 382 | enum iwl_ucode_type ucode_type) |
ca7966c8 JB |
383 | { |
384 | struct iwl_notification_wait alive_wait; | |
69a679b0 | 385 | struct iwl_alive_data alive_data; |
0692fe41 | 386 | const struct fw_img *fw; |
ca7966c8 | 387 | int ret; |
de7f5f92 | 388 | enum iwl_ucode_type old_type; |
db662d47 | 389 | static const u8 alive_cmd[] = { REPLY_ALIVE }; |
ca7966c8 | 390 | |
a42506eb MV |
391 | old_type = priv->cur_ucode; |
392 | priv->cur_ucode = ucode_type; | |
e1991885 | 393 | fw = iwl_get_ucode_image(priv, ucode_type); |
ca7966c8 | 394 | |
8f7ffbe2 DS |
395 | priv->ucode_loaded = false; |
396 | ||
cf614297 EG |
397 | if (!fw) |
398 | return -EINVAL; | |
399 | ||
db662d47 JB |
400 | iwl_init_notification_wait(&priv->notif_wait, &alive_wait, |
401 | alive_cmd, ARRAY_SIZE(alive_cmd), | |
402 | iwl_alive_fn, &alive_data); | |
f4720893 | 403 | |
68e8dfda | 404 | ret = iwl_trans_start_fw(priv->trans, fw); |
ca7966c8 | 405 | if (ret) { |
a42506eb | 406 | priv->cur_ucode = old_type; |
4bd14dd5 | 407 | iwl_remove_notification(&priv->notif_wait, &alive_wait); |
ca7966c8 JB |
408 | return ret; |
409 | } | |
410 | ||
ca7966c8 JB |
411 | /* |
412 | * Some things may run in the background now, but we | |
413 | * just wait for the ALIVE notification here. | |
414 | */ | |
4bd14dd5 | 415 | ret = iwl_wait_notification(&priv->notif_wait, &alive_wait, |
dd5fe104 | 416 | UCODE_ALIVE_TIMEOUT); |
ca7966c8 | 417 | if (ret) { |
a42506eb | 418 | priv->cur_ucode = old_type; |
ca7966c8 JB |
419 | return ret; |
420 | } | |
421 | ||
422 | if (!alive_data.valid) { | |
e1991885 | 423 | IWL_ERR(priv, "Loaded ucode is not valid!\n"); |
a42506eb | 424 | priv->cur_ucode = old_type; |
ca7966c8 JB |
425 | return -EIO; |
426 | } | |
427 | ||
c8ac61cf JB |
428 | /* |
429 | * This step takes a long time (60-80ms!!) and | |
430 | * WoWLAN image should be loaded quickly, so | |
431 | * skip it for WoWLAN. | |
432 | */ | |
433 | if (ucode_type != IWL_UCODE_WOWLAN) { | |
e1991885 | 434 | ret = iwl_verify_ucode(priv, ucode_type); |
c8ac61cf | 435 | if (ret) { |
a42506eb | 436 | priv->cur_ucode = old_type; |
c8ac61cf JB |
437 | return ret; |
438 | } | |
ca7966c8 | 439 | |
c8ac61cf JB |
440 | /* delay a bit to give rfkill time to run */ |
441 | msleep(5); | |
442 | } | |
ca7966c8 | 443 | |
e1991885 | 444 | ret = iwl_alive_notify(priv); |
ca7966c8 | 445 | if (ret) { |
e1991885 | 446 | IWL_WARN(priv, |
ca7966c8 | 447 | "Could not complete ALIVE transition: %d\n", ret); |
a42506eb | 448 | priv->cur_ucode = old_type; |
ca7966c8 JB |
449 | return ret; |
450 | } | |
451 | ||
8f7ffbe2 DS |
452 | priv->ucode_loaded = true; |
453 | ||
ca7966c8 JB |
454 | return 0; |
455 | } | |
456 | ||
e1f0c501 JB |
457 | static bool iwlagn_wait_calib(struct iwl_notif_wait_data *notif_wait, |
458 | struct iwl_rx_packet *pkt, void *data) | |
459 | { | |
460 | struct iwl_priv *priv = data; | |
461 | struct iwl_calib_hdr *hdr; | |
462 | int len; | |
463 | ||
464 | if (pkt->hdr.cmd != CALIBRATION_RES_NOTIFICATION) { | |
465 | WARN_ON(pkt->hdr.cmd != CALIBRATION_COMPLETE_NOTIFICATION); | |
466 | return true; | |
467 | } | |
468 | ||
469 | hdr = (struct iwl_calib_hdr *)pkt->data; | |
470 | len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; | |
471 | ||
472 | /* reduce the size by the length field itself */ | |
473 | len -= sizeof(__le32); | |
474 | ||
475 | if (iwl_calib_set(priv, hdr, len)) | |
476 | IWL_ERR(priv, "Failed to record calibration data %d\n", | |
477 | hdr->op_code); | |
478 | ||
479 | return false; | |
480 | } | |
481 | ||
e1991885 | 482 | int iwl_run_init_ucode(struct iwl_priv *priv) |
ca7966c8 JB |
483 | { |
484 | struct iwl_notification_wait calib_wait; | |
db662d47 | 485 | static const u8 calib_complete[] = { |
e1f0c501 | 486 | CALIBRATION_RES_NOTIFICATION, |
db662d47 JB |
487 | CALIBRATION_COMPLETE_NOTIFICATION |
488 | }; | |
ca7966c8 JB |
489 | int ret; |
490 | ||
b1eea297 | 491 | lockdep_assert_held(&priv->mutex); |
ca7966c8 JB |
492 | |
493 | /* No init ucode required? Curious, but maybe ok */ | |
6dfa8d01 | 494 | if (!priv->fw->img[IWL_UCODE_INIT].sec[0].len) |
ca7966c8 JB |
495 | return 0; |
496 | ||
b5ea1624 | 497 | if (priv->init_ucode_run) |
ca7966c8 JB |
498 | return 0; |
499 | ||
4bd14dd5 | 500 | iwl_init_notification_wait(&priv->notif_wait, &calib_wait, |
db662d47 | 501 | calib_complete, ARRAY_SIZE(calib_complete), |
e1f0c501 | 502 | iwlagn_wait_calib, priv); |
ca7966c8 JB |
503 | |
504 | /* Will also start the device */ | |
e1991885 | 505 | ret = iwl_load_ucode_wait_alive(priv, IWL_UCODE_INIT); |
ca7966c8 JB |
506 | if (ret) |
507 | goto error; | |
508 | ||
e1991885 | 509 | ret = iwl_init_alive_start(priv); |
ca7966c8 JB |
510 | if (ret) |
511 | goto error; | |
512 | ||
513 | /* | |
514 | * Some things may run in the background now, but we | |
515 | * just wait for the calibration complete notification. | |
516 | */ | |
4bd14dd5 | 517 | ret = iwl_wait_notification(&priv->notif_wait, &calib_wait, |
dd5fe104 | 518 | UCODE_CALIB_TIMEOUT); |
b5ea1624 DS |
519 | if (!ret) |
520 | priv->init_ucode_run = true; | |
ca7966c8 JB |
521 | |
522 | goto out; | |
523 | ||
524 | error: | |
4bd14dd5 | 525 | iwl_remove_notification(&priv->notif_wait, &calib_wait); |
ca7966c8 JB |
526 | out: |
527 | /* Whatever happened, stop the device */ | |
68e8dfda | 528 | iwl_trans_stop_device(priv->trans); |
8f7ffbe2 DS |
529 | priv->ucode_loaded = false; |
530 | ||
ca7966c8 JB |
531 | return ret; |
532 | } |