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iwlwifi: improve scan support
[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
b481de9c
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
WT
51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
b481de9c
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60/*
61 * module name, copyright, version, etc.
b481de9c
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
df878d8f
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
KA
95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
6440adb5
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105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
f2c7e521
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124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
f2c7e521
AK
134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
6440adb5
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146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
e0158e61 152void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
6440adb5
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
06fd3d86 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e1623446 206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
69946333
TW
219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
c14c521e
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC
228
229 /* Add station to device's station table */
17f841cd
SO
230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
7e4bca5e
SO
236/**
237 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
238 * @priv: eeprom and antenna fields are used to determine antenna flags
239 *
240 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
241 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
242 *
243 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
244 * IWL_ANTENNA_MAIN - Force MAIN antenna
245 * IWL_ANTENNA_AUX - Force AUX antenna
246 */
247__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
248{
249 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
250
251 switch (iwl3945_mod_params.antenna) {
252 case IWL_ANTENNA_DIVERSITY:
253 return 0;
254
255 case IWL_ANTENNA_MAIN:
256 if (eeprom->antenna_switch_type)
257 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
258 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
259
260 case IWL_ANTENNA_AUX:
261 if (eeprom->antenna_switch_type)
262 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
263 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
264 }
265
266 /* bad antenna selector value */
267 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
268 iwl3945_mod_params.antenna);
269
270 return 0; /* "diversity" is default if error */
271}
272
6e21f15c 273static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
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274 struct ieee80211_key_conf *keyconf,
275 u8 sta_id)
276{
277 unsigned long flags;
278 __le16 key_flags = 0;
6e21f15c
AK
279 int ret;
280
281 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
282 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
283
284 if (sta_id == priv->hw_params.bcast_sta_id)
285 key_flags |= STA_KEY_MULTICAST_MSK;
286
287 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
288 keyconf->hw_key_idx = keyconf->keyidx;
289 key_flags &= ~STA_KEY_FLG_INVALID;
b481de9c 290
b481de9c 291 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
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292 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
293 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
294 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
b481de9c
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295 keyconf->keylen);
296
f2c7e521 297 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 298 keyconf->keylen);
6e21f15c 299
43da9192 300 if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
6e21f15c 301 == STA_KEY_FLG_NO_ENC)
43da9192 302 priv->stations_39[sta_id].sta.key.key_offset =
6e21f15c
AK
303 iwl_get_free_ucode_key_index(priv);
304 /* else, we are overriding an existing key => no need to allocated room
305 * in uCode. */
306
43da9192 307 WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
6e21f15c
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308 "no space for a new key");
309
f2c7e521
AK
310 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
311 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
312 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c 313
6e21f15c
AK
314 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
315
316 ret = iwl_send_add_sta(priv,
317 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
318
b481de9c
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319 spin_unlock_irqrestore(&priv->sta_lock, flags);
320
6e21f15c
AK
321 return ret;
322}
323
324static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
325 struct ieee80211_key_conf *keyconf,
326 u8 sta_id)
327{
328 return -EOPNOTSUPP;
329}
330
331static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
332 struct ieee80211_key_conf *keyconf,
333 u8 sta_id)
334{
335 return -EOPNOTSUPP;
b481de9c
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336}
337
4a8a4322 338static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
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339{
340 unsigned long flags;
341
342 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
343 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
344 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 345 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
346 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
347 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
348 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
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349 spin_unlock_irqrestore(&priv->sta_lock, flags);
350
e1623446 351 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
17f841cd
SO
352 iwl_send_add_sta(priv,
353 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
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354 return 0;
355}
356
fa11d525 357static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
6e21f15c
AK
358 struct ieee80211_key_conf *keyconf, u8 sta_id)
359{
360 int ret = 0;
361
362 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
363
364 switch (keyconf->alg) {
365 case ALG_CCMP:
366 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
367 break;
368 case ALG_TKIP:
369 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
370 break;
371 case ALG_WEP:
372 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
373 break;
374 default:
1e680233 375 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
6e21f15c
AK
376 ret = -EINVAL;
377 }
378
379 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
380 keyconf->alg, keyconf->keylen, keyconf->keyidx,
381 sta_id, ret);
382
383 return ret;
384}
385
386static int iwl3945_remove_static_key(struct iwl_priv *priv)
387{
388 int ret = -EOPNOTSUPP;
389
390 return ret;
391}
392
393static int iwl3945_set_static_key(struct iwl_priv *priv,
394 struct ieee80211_key_conf *key)
395{
396 if (key->alg == ALG_WEP)
397 return -EOPNOTSUPP;
398
399 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
400 return -EINVAL;
401}
402
4a8a4322 403static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
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404{
405 struct list_head *element;
406
e1623446 407 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
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408 priv->frames_count);
409
410 while (!list_empty(&priv->free_frames)) {
411 element = priv->free_frames.next;
412 list_del(element);
bb8c093b 413 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
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414 priv->frames_count--;
415 }
416
417 if (priv->frames_count) {
39aadf8c 418 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
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419 priv->frames_count);
420 priv->frames_count = 0;
421 }
422}
423
4a8a4322 424static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 425{
bb8c093b 426 struct iwl3945_frame *frame;
b481de9c
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427 struct list_head *element;
428 if (list_empty(&priv->free_frames)) {
429 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
430 if (!frame) {
15b1687c 431 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
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432 return NULL;
433 }
434
435 priv->frames_count++;
436 return frame;
437 }
438
439 element = priv->free_frames.next;
440 list_del(element);
bb8c093b 441 return list_entry(element, struct iwl3945_frame, list);
b481de9c
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442}
443
4a8a4322 444static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
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445{
446 memset(frame, 0, sizeof(*frame));
447 list_add(&frame->list, &priv->free_frames);
448}
449
4a8a4322 450unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 451 struct ieee80211_hdr *hdr,
73ec1cc2 452 int left)
b481de9c
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453{
454
8ccde88a 455 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
456 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
457 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
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458 return 0;
459
460 if (priv->ibss_beacon->len > left)
461 return 0;
462
463 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
464
465 return priv->ibss_beacon->len;
466}
467
4a8a4322 468static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 469{
bb8c093b 470 struct iwl3945_frame *frame;
b481de9c
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471 unsigned int frame_size;
472 int rc;
473 u8 rate;
474
bb8c093b 475 frame = iwl3945_get_free_frame(priv);
b481de9c
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476
477 if (!frame) {
15b1687c 478 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
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479 "command.\n");
480 return -ENOMEM;
481 }
482
8ccde88a 483 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 484
bb8c093b 485 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 486
518099a8 487 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
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488 &frame->u.cmd[0]);
489
bb8c093b 490 iwl3945_free_frame(priv, frame);
b481de9c
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491
492 return rc;
493}
494
4a8a4322 495static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 496{
3832ec9d 497 if (priv->shared_virt)
b481de9c 498 pci_free_consistent(priv->pci_dev,
bb8c093b 499 sizeof(struct iwl3945_shared),
3832ec9d
AK
500 priv->shared_virt,
501 priv->shared_phys);
b481de9c
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502}
503
b481de9c 504#define MAX_UCODE_BEACON_INTERVAL 1024
c1b4aa3f 505#define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
b481de9c 506
bb8c093b 507static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
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508{
509 u16 new_val = 0;
510 u16 beacon_factor = 0;
511
512 beacon_factor =
513 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
514 / MAX_UCODE_BEACON_INTERVAL;
515 new_val = beacon_val / beacon_factor;
516
517 return cpu_to_le16(new_val);
518}
519
4a8a4322 520static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
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521{
522 u64 interval_tm_unit;
523 u64 tsf, result;
524 unsigned long flags;
525 struct ieee80211_conf *conf = NULL;
526 u16 beacon_int = 0;
527
528 conf = ieee80211_get_hw_conf(priv->hw);
529
530 spin_lock_irqsave(&priv->lock, flags);
28afaf91 531 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
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532 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
533
28afaf91 534 tsf = priv->timestamp;
b481de9c
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535
536 beacon_int = priv->beacon_int;
537 spin_unlock_irqrestore(&priv->lock, flags);
538
05c914fe 539 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
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540 if (beacon_int == 0) {
541 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
542 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
543 } else {
544 priv->rxon_timing.beacon_interval =
545 cpu_to_le16(beacon_int);
546 priv->rxon_timing.beacon_interval =
bb8c093b 547 iwl3945_adjust_beacon_interval(
b481de9c
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548 le16_to_cpu(priv->rxon_timing.beacon_interval));
549 }
550
551 priv->rxon_timing.atim_window = 0;
552 } else {
553 priv->rxon_timing.beacon_interval =
bb8c093b 554 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
555 /* TODO: we need to get atim_window from upper stack
556 * for now we set to 0 */
557 priv->rxon_timing.atim_window = 0;
558 }
559
560 interval_tm_unit =
561 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
562 result = do_div(tsf, interval_tm_unit);
563 priv->rxon_timing.beacon_init_val =
564 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
565
e1623446
TW
566 IWL_DEBUG_ASSOC(priv,
567 "beacon interval %d beacon timer %d beacon tim %d\n",
b481de9c
ZY
568 le16_to_cpu(priv->rxon_timing.beacon_interval),
569 le32_to_cpu(priv->rxon_timing.beacon_init_val),
570 le16_to_cpu(priv->rxon_timing.atim_window));
571}
572
4a8a4322 573static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 574 struct ieee80211_tx_info *info,
c2d79b48 575 struct iwl_cmd *cmd,
b481de9c 576 struct sk_buff *skb_frag,
6e21f15c 577 int sta_id)
b481de9c 578{
e52119c5 579 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 580 struct iwl3945_hw_key *keyinfo =
6e21f15c 581 &priv->stations_39[sta_id].keyinfo;
b481de9c
ZY
582
583 switch (keyinfo->alg) {
584 case ALG_CCMP:
e52119c5
WT
585 tx->sec_ctl = TX_CMD_SEC_CCM;
586 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 587 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
588 break;
589
590 case ALG_TKIP:
b481de9c
ZY
591 break;
592
593 case ALG_WEP:
e52119c5 594 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 595 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
596
597 if (keyinfo->keylen == 13)
e52119c5 598 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 599
e52119c5 600 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 601
e1623446 602 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 603 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
604 break;
605
b481de9c 606 default:
978785a3 607 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
608 break;
609 }
610}
611
612/*
613 * handle build REPLY_TX command notification.
614 */
4a8a4322 615static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 616 struct iwl_cmd *cmd,
e039fa4a 617 struct ieee80211_tx_info *info,
e52119c5 618 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 619{
e52119c5
WT
620 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
621 __le32 tx_flags = tx->tx_flags;
fd7c8a40 622 __le16 fc = hdr->frame_control;
e6a9854b 623 u8 rc_flags = info->control.rates[0].flags;
b481de9c 624
e52119c5 625 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 626 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 627 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 628 if (ieee80211_is_mgmt(fc))
b481de9c 629 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 630 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
631 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
632 tx_flags |= TX_CMD_FLG_TSF_MSK;
633 } else {
634 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
635 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
636 }
637
e52119c5 638 tx->sta_id = std_id;
8b7b1e05 639 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
640 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
641
fd7c8a40
HH
642 if (ieee80211_is_data_qos(fc)) {
643 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 644 tx->tid_tspec = qc[0] & 0xf;
b481de9c 645 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 646 } else {
b481de9c 647 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 648 }
b481de9c 649
e6a9854b 650 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
651 tx_flags |= TX_CMD_FLG_RTS_MSK;
652 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 653 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
654 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
655 tx_flags |= TX_CMD_FLG_CTS_MSK;
656 }
657
658 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
659 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
660
661 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
662 if (ieee80211_is_mgmt(fc)) {
663 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 664 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 665 else
e52119c5 666 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 667 } else {
e52119c5 668 tx->timeout.pm_frame_timeout = 0;
5c8df2d5 669#ifdef CONFIG_IWLWIFI_LEDS
ab53d8af
MA
670 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
671#endif
672 }
b481de9c 673
e52119c5
WT
674 tx->driver_txop = 0;
675 tx->tx_flags = tx_flags;
676 tx->next_frame_len = 0;
b481de9c
ZY
677}
678
b481de9c
ZY
679/*
680 * start REPLY_TX command process
681 */
4a8a4322 682static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
683{
684 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 685 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 686 struct iwl3945_tx_cmd *tx;
188cf6c7 687 struct iwl_tx_queue *txq = NULL;
d20b3c65 688 struct iwl_queue *q = NULL;
e52119c5 689 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
690 dma_addr_t phys_addr;
691 dma_addr_t txcmd_phys;
e52119c5 692 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
693 u16 len, idx, len_org, hdr_len;
694 u8 id;
695 u8 unicast;
b481de9c 696 u8 sta_id;
54dbb525 697 u8 tid = 0;
b481de9c 698 u16 seq_number = 0;
fd7c8a40 699 __le16 fc;
b481de9c 700 u8 wait_write_ptr = 0;
54dbb525 701 u8 *qc = NULL;
b481de9c
ZY
702 unsigned long flags;
703 int rc;
704
705 spin_lock_irqsave(&priv->lock, flags);
775a6e27 706 if (iwl_is_rfkill(priv)) {
e1623446 707 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
708 goto drop_unlock;
709 }
710
e039fa4a 711 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 712 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
713 goto drop_unlock;
714 }
715
716 unicast = !is_multicast_ether_addr(hdr->addr1);
717 id = 0;
718
fd7c8a40 719 fc = hdr->frame_control;
b481de9c 720
d08853a3 721#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 722 if (ieee80211_is_auth(fc))
e1623446 723 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 724 else if (ieee80211_is_assoc_req(fc))
e1623446 725 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 726 else if (ieee80211_is_reassoc_req(fc))
e1623446 727 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
728#endif
729
7878a5a4 730 /* drop all data frame if we are not associated */
914233d6 731 if (ieee80211_is_data(fc) &&
05c914fe 732 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 733 (!iwl_is_associated(priv) ||
05c914fe 734 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 735 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
736 goto drop_unlock;
737 }
738
739 spin_unlock_irqrestore(&priv->lock, flags);
740
7294ec95 741 hdr_len = ieee80211_hdrlen(fc);
6440adb5
BC
742
743 /* Find (or create) index into station table for destination station */
f5d30266 744 sta_id = iwl_get_sta_id(priv, hdr);
b481de9c 745 if (sta_id == IWL_INVALID_STATION) {
e1623446 746 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 747 hdr->addr1);
b481de9c
ZY
748 goto drop;
749 }
750
e1623446 751 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 752
fd7c8a40
HH
753 if (ieee80211_is_data_qos(fc)) {
754 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 755 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 756 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
757 IEEE80211_SCTL_SEQ;
758 hdr->seq_ctrl = cpu_to_le16(seq_number) |
759 (hdr->seq_ctrl &
c1b4aa3f 760 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
761 seq_number += 0x10;
762 }
6440adb5
BC
763
764 /* Descriptor for chosen Tx queue */
188cf6c7 765 txq = &priv->txq[txq_id];
b481de9c
ZY
766 q = &txq->q;
767
768 spin_lock_irqsave(&priv->lock, flags);
769
fc4b6853 770 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 771
6440adb5 772 /* Set up driver data for this TFD */
dbb6654c 773 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 774 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
BC
775
776 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 777 out_cmd = txq->cmd[idx];
e52119c5 778 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 779 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 780 memset(tx, 0, sizeof(*tx));
6440adb5
BC
781
782 /*
783 * Set up the Tx-command (not MAC!) header.
784 * Store the chosen Tx queue and TFD index within the sequence field;
785 * after Tx, uCode's Tx response will return this value so driver can
786 * locate the frame within the tx queue and do post-tx processing.
787 */
b481de9c
ZY
788 out_cmd->hdr.cmd = REPLY_TX;
789 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 790 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC
791
792 /* Copy MAC header from skb into command buffer */
e52119c5 793 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 794
6440adb5
BC
795 /*
796 * Use the first empty entry in this queue's command buffer array
797 * to contain the Tx command and MAC header concatenated together
798 * (payload data will be in another buffer).
799 * Size of this varies, due to varying MAC header length.
800 * If end is not dword aligned, we'll have 2 extra bytes at the end
801 * of the MAC header (device reads on dword boundaries).
802 * We'll tell device about this padding later.
803 */
3832ec9d 804 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 805 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
806
807 len_org = len;
808 len = (len + 3) & ~3;
809
810 if (len_org != len)
811 len_org = 1;
812 else
813 len_org = 0;
814
6440adb5
BC
815 /* Physical address of this Tx command's header (not MAC header!),
816 * within command buffer array. */
188cf6c7
SO
817 txcmd_phys = pci_map_single(priv->pci_dev,
818 out_cmd, sizeof(struct iwl_cmd),
819 PCI_DMA_TODEVICE);
820 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
821 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
822 /* Add buffer containing Tx command and MAC(!) header to TFD's
823 * first entry */
824 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 825
6440adb5
BC
826 /* Add buffer containing Tx command and MAC(!) header to TFD's
827 * first entry */
7aaa1d79
SO
828 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
829 txcmd_phys, len, 1, 0);
b481de9c 830
d0f09804 831 if (info->control.hw_key)
6e21f15c 832 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
b481de9c 833
6440adb5
BC
834 /* Set up TFD's 2nd entry to point directly to remainder of skb,
835 * if any (802.11 null frames have no payload). */
b481de9c
ZY
836 len = skb->len - hdr_len;
837 if (len) {
838 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
839 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
840 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
841 phys_addr, len,
842 0, U32_PAD(len));
b481de9c
ZY
843 }
844
6440adb5 845 /* Total # bytes to be transmitted */
b481de9c 846 len = (u16)skb->len;
e52119c5 847 tx->len = cpu_to_le16(len);
b481de9c
ZY
848
849 /* TODO need this for burst mode later on */
e52119c5 850 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
851
852 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 853 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 854
e52119c5
WT
855 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
856 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 857
8b7b1e05 858 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 859 txq->need_update = 1;
3ac7f146 860 if (qc)
f2c7e521 861 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
862 } else {
863 wait_write_ptr = 1;
864 txq->need_update = 0;
865 }
866
e52119c5 867 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 868
e52119c5 869 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 870 ieee80211_hdrlen(fc));
b481de9c 871
6440adb5 872 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 873 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 874 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
875 spin_unlock_irqrestore(&priv->lock, flags);
876
877 if (rc)
878 return rc;
879
d20b3c65 880 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
881 && priv->mac80211_registered) {
882 if (wait_write_ptr) {
883 spin_lock_irqsave(&priv->lock, flags);
884 txq->need_update = 1;
4f3602c8 885 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
886 spin_unlock_irqrestore(&priv->lock, flags);
887 }
888
e4e72fb4 889 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
b481de9c
ZY
890 }
891
892 return 0;
893
894drop_unlock:
895 spin_unlock_irqrestore(&priv->lock, flags);
896drop:
897 return -1;
898}
899
c8b0e6e1 900#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
901
902#include "iwl-spectrum.h"
903
904#define BEACON_TIME_MASK_LOW 0x00FFFFFF
905#define BEACON_TIME_MASK_HIGH 0xFF000000
906#define TIME_UNIT 1024
907
908/*
909 * extended beacon time format
910 * time in usec will be changed into a 32-bit value in 8:24 format
911 * the high 1 byte is the beacon counts
912 * the lower 3 bytes is the time in usec within one beacon interval
913 */
914
bb8c093b 915static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
916{
917 u32 quot;
918 u32 rem;
919 u32 interval = beacon_interval * 1024;
920
921 if (!interval || !usec)
922 return 0;
923
924 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
925 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
926
927 return (quot << 24) + rem;
928}
929
930/* base is usually what we get from ucode with each received frame,
931 * the same as HW timer counter counting down
932 */
933
bb8c093b 934static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
935{
936 u32 base_low = base & BEACON_TIME_MASK_LOW;
937 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
938 u32 interval = beacon_interval * TIME_UNIT;
939 u32 res = (base & BEACON_TIME_MASK_HIGH) +
940 (addon & BEACON_TIME_MASK_HIGH);
941
942 if (base_low > addon_low)
943 res += base_low - addon_low;
944 else if (base_low < addon_low) {
945 res += interval + base_low - addon_low;
946 res += (1 << 24);
947 } else
948 res += (1 << 24);
949
950 return cpu_to_le32(res);
951}
952
4a8a4322 953static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
954 struct ieee80211_measurement_params *params,
955 u8 type)
956{
600c0e11 957 struct iwl_spectrum_cmd spectrum;
3d24a9f7 958 struct iwl_rx_packet *res;
c2d79b48 959 struct iwl_host_cmd cmd = {
b481de9c
ZY
960 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
961 .data = (void *)&spectrum,
962 .meta.flags = CMD_WANT_SKB,
963 };
964 u32 add_time = le64_to_cpu(params->start_time);
965 int rc;
966 int spectrum_resp_status;
967 int duration = le16_to_cpu(params->duration);
968
8ccde88a 969 if (iwl_is_associated(priv))
b481de9c 970 add_time =
bb8c093b 971 iwl3945_usecs_to_beacons(
b481de9c
ZY
972 le64_to_cpu(params->start_time) - priv->last_tsf,
973 le16_to_cpu(priv->rxon_timing.beacon_interval));
974
975 memset(&spectrum, 0, sizeof(spectrum));
976
977 spectrum.channel_count = cpu_to_le16(1);
978 spectrum.flags =
979 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
980 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
981 cmd.len = sizeof(spectrum);
982 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
983
8ccde88a 984 if (iwl_is_associated(priv))
b481de9c 985 spectrum.start_time =
bb8c093b 986 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
987 add_time,
988 le16_to_cpu(priv->rxon_timing.beacon_interval));
989 else
990 spectrum.start_time = 0;
991
992 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
993 spectrum.channels[0].channel = params->channel;
994 spectrum.channels[0].type = type;
8ccde88a 995 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
996 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
997 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
998
518099a8 999 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1000 if (rc)
1001 return rc;
1002
3d24a9f7 1003 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1004 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1005 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1006 rc = -EIO;
1007 }
1008
1009 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1010 switch (spectrum_resp_status) {
1011 case 0: /* Command will be handled */
1012 if (res->u.spectrum.id != 0xff) {
e1623446 1013 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 1014 res->u.spectrum.id);
b481de9c
ZY
1015 priv->measurement_status &= ~MEASUREMENT_READY;
1016 }
1017 priv->measurement_status |= MEASUREMENT_ACTIVE;
1018 rc = 0;
1019 break;
1020
1021 case 1: /* Command will not be handled */
1022 rc = -EAGAIN;
1023 break;
1024 }
1025
1026 dev_kfree_skb_any(cmd.meta.u.skb);
1027
1028 return rc;
1029}
1030#endif
1031
4a8a4322 1032static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1033 struct iwl_rx_mem_buffer *rxb)
b481de9c 1034{
3d24a9f7
TW
1035 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1036 struct iwl_alive_resp *palive;
b481de9c
ZY
1037 struct delayed_work *pwork;
1038
1039 palive = &pkt->u.alive_frame;
1040
e1623446 1041 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
1042 "0x%01X 0x%01X\n",
1043 palive->is_valid, palive->ver_type,
1044 palive->ver_subtype);
1045
1046 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 1047 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
1048 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1049 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1050 pwork = &priv->init_alive_start;
1051 } else {
e1623446 1052 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 1053 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1054 sizeof(struct iwl_alive_resp));
b481de9c 1055 pwork = &priv->alive_start;
bb8c093b 1056 iwl3945_disable_events(priv);
b481de9c
ZY
1057 }
1058
1059 /* We delay the ALIVE response by 5ms to
1060 * give the HW RF Kill time to activate... */
1061 if (palive->is_valid == UCODE_VALID_OK)
1062 queue_delayed_work(priv->workqueue, pwork,
1063 msecs_to_jiffies(5));
1064 else
39aadf8c 1065 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1066}
1067
4a8a4322 1068static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1069 struct iwl_rx_mem_buffer *rxb)
b481de9c 1070{
c7e035a9 1071#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1072 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1073#endif
b481de9c 1074
e1623446 1075 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
1076 return;
1077}
1078
bb8c093b 1079static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1080{
4a8a4322
AK
1081 struct iwl_priv *priv =
1082 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1083 struct sk_buff *beacon;
1084
1085 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1086 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1087
1088 if (!beacon) {
15b1687c 1089 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1090 return;
1091 }
1092
1093 mutex_lock(&priv->mutex);
1094 /* new beacon skb is allocated every time; dispose previous.*/
1095 if (priv->ibss_beacon)
1096 dev_kfree_skb(priv->ibss_beacon);
1097
1098 priv->ibss_beacon = beacon;
1099 mutex_unlock(&priv->mutex);
1100
bb8c093b 1101 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1102}
1103
4a8a4322 1104static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1105 struct iwl_rx_mem_buffer *rxb)
b481de9c 1106{
d08853a3 1107#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1108 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1109 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1110 u8 rate = beacon->beacon_notify_hdr.rate;
1111
e1623446 1112 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
1113 "tsf %d %d rate %d\n",
1114 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1115 beacon->beacon_notify_hdr.failure_frame,
1116 le32_to_cpu(beacon->ibss_mgr_status),
1117 le32_to_cpu(beacon->high_tsf),
1118 le32_to_cpu(beacon->low_tsf), rate);
1119#endif
1120
05c914fe 1121 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1122 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1123 queue_work(priv->workqueue, &priv->beacon_update);
1124}
1125
b481de9c
ZY
1126/* Handle notification from uCode that card's power state is changing
1127 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1128static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1129 struct iwl_rx_mem_buffer *rxb)
b481de9c 1130{
3d24a9f7 1131 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1132 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1133 unsigned long status = priv->status;
1134
e1623446 1135 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
1136 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1137 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1138
5d49f498 1139 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1140 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1141
1142 if (flags & HW_CARD_DISABLED)
1143 set_bit(STATUS_RF_KILL_HW, &priv->status);
1144 else
1145 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1146
1147
1148 if (flags & SW_CARD_DISABLED)
1149 set_bit(STATUS_RF_KILL_SW, &priv->status);
1150 else
1151 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1152
af0053d6 1153 iwl_scan_cancel(priv);
b481de9c
ZY
1154
1155 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1156 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1157 (test_bit(STATUS_RF_KILL_SW, &status) !=
1158 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1159 queue_work(priv->workqueue, &priv->rf_kill);
1160 else
1161 wake_up_interruptible(&priv->wait_command_queue);
1162}
1163
1164/**
bb8c093b 1165 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1166 *
1167 * Setup the RX handlers for each of the reply types sent from the uCode
1168 * to the host.
1169 *
1170 * This function chains into the hardware specific files for them to setup
1171 * any hardware specific handlers as well.
1172 */
4a8a4322 1173static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1174{
bb8c093b
CH
1175 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1176 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
261b9c33 1177 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
8ccde88a 1178 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
030f05ed 1179 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1180 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
030f05ed 1181 iwl_rx_pm_debug_statistics_notif;
bb8c093b 1182 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1183
9fbab516
BC
1184 /*
1185 * The same handler is used for both the REPLY to a discrete
1186 * statistics request from the host as well as for the periodic
1187 * statistics notifications (after received beacons) from the uCode.
b481de9c 1188 */
bb8c093b
CH
1189 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1190 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1191
261b9c33 1192 iwl_setup_spectrum_handlers(priv);
cade0eb2 1193 iwl_setup_rx_scan_handlers(priv);
bb8c093b 1194 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1195
9fbab516 1196 /* Set up hardware specific Rx handlers */
bb8c093b 1197 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1198}
1199
b481de9c
ZY
1200/************************** RX-FUNCTIONS ****************************/
1201/*
1202 * Rx theory of operation
1203 *
1204 * The host allocates 32 DMA target addresses and passes the host address
1205 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1206 * 0 to 31
1207 *
1208 * Rx Queue Indexes
1209 * The host/firmware share two index registers for managing the Rx buffers.
1210 *
1211 * The READ index maps to the first position that the firmware may be writing
1212 * to -- the driver can read up to (but not including) this position and get
1213 * good data.
1214 * The READ index is managed by the firmware once the card is enabled.
1215 *
1216 * The WRITE index maps to the last position the driver has read from -- the
1217 * position preceding WRITE is the last slot the firmware can place a packet.
1218 *
1219 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1220 * WRITE = READ.
1221 *
9fbab516 1222 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1223 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1224 *
9fbab516 1225 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1226 * and fire the RX interrupt. The driver can then query the READ index and
1227 * process as many packets as possible, moving the WRITE index forward as it
1228 * resets the Rx queue buffers with new memory.
1229 *
1230 * The management in the driver is as follows:
1231 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1232 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1233 * to replenish the iwl->rxq->rx_free.
bb8c093b 1234 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1235 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1236 * 'processed' and 'read' driver indexes as well)
1237 * + A received packet is processed and handed to the kernel network stack,
1238 * detached from the iwl->rxq. The driver 'processed' index is updated.
1239 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1240 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1241 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1242 * were enough free buffers and RX_STALLED is set it is cleared.
1243 *
1244 *
1245 * Driver sequence:
1246 *
9fbab516 1247 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1248 * iwl3945_rx_queue_restock
9fbab516 1249 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1250 * queue, updates firmware pointers, and updates
1251 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1252 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1253 *
1254 * -- enable interrupts --
6100b588 1255 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1256 * READ INDEX, detaching the SKB from the pool.
1257 * Moves the packet buffer from queue to rx_used.
bb8c093b 1258 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1259 * slots.
1260 * ...
1261 *
1262 */
1263
b481de9c 1264/**
9fbab516 1265 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1266 */
4a8a4322 1267static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1268 dma_addr_t dma_addr)
1269{
1270 return cpu_to_le32((u32)dma_addr);
1271}
1272
1273/**
bb8c093b 1274 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1275 *
9fbab516 1276 * If there are slots in the RX queue that need to be restocked,
b481de9c 1277 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1278 * as we can, pulling from rx_free.
b481de9c
ZY
1279 *
1280 * This moves the 'write' index forward to catch up with 'processed', and
1281 * also updates the memory address in the firmware to reference the new
1282 * target buffer.
1283 */
4a8a4322 1284static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1285{
cc2f362c 1286 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1287 struct list_head *element;
6100b588 1288 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1289 unsigned long flags;
1290 int write, rc;
1291
1292 spin_lock_irqsave(&rxq->lock, flags);
1293 write = rxq->write & ~0x7;
37d68317 1294 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1295 /* Get next free Rx buffer, remove from free list */
b481de9c 1296 element = rxq->rx_free.next;
6100b588 1297 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1298 list_del(element);
6440adb5
BC
1299
1300 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1301 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1302 rxq->queue[rxq->write] = rxb;
1303 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1304 rxq->free_count--;
1305 }
1306 spin_unlock_irqrestore(&rxq->lock, flags);
1307 /* If the pre-allocated buffer pool is dropping low, schedule to
1308 * refill it */
1309 if (rxq->free_count <= RX_LOW_WATERMARK)
1310 queue_work(priv->workqueue, &priv->rx_replenish);
1311
1312
6440adb5
BC
1313 /* If we've added more space for the firmware to place data, tell it.
1314 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
1315 if ((write != (rxq->write & ~0x7))
1316 || (abs(rxq->write - rxq->read) > 7)) {
1317 spin_lock_irqsave(&rxq->lock, flags);
1318 rxq->need_update = 1;
1319 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1320 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1321 if (rc)
1322 return rc;
1323 }
1324
1325 return 0;
1326}
1327
1328/**
bb8c093b 1329 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1330 *
1331 * When moving to rx_free an SKB is allocated for the slot.
1332 *
bb8c093b 1333 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1334 * This is called as a scheduled work item (except for during initialization)
b481de9c 1335 */
4a8a4322 1336static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 1337{
cc2f362c 1338 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1339 struct list_head *element;
6100b588 1340 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1341 unsigned long flags;
1342 spin_lock_irqsave(&rxq->lock, flags);
1343 while (!list_empty(&rxq->rx_used)) {
1344 element = rxq->rx_used.next;
6100b588 1345 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
BC
1346
1347 /* Alloc a new receive buffer */
b481de9c 1348 rxb->skb =
1e33dc64
WT
1349 alloc_skb(priv->hw_params.rx_buf_size,
1350 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
1351 if (!rxb->skb) {
1352 if (net_ratelimit())
978785a3 1353 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1354 /* We don't reschedule replenish work here -- we will
1355 * call the restock method and if it still needs
1356 * more buffers it will schedule replenish */
1357 break;
1358 }
12342c47
ZY
1359
1360 /* If radiotap head is required, reserve some headroom here.
1361 * The physical head count is a variable rx_stats->phy_count.
1362 * We reserve 4 bytes here. Plus these extra bytes, the
1363 * headroom of the physical head should be enough for the
1364 * radiotap head that iwl3945 supported. See iwl3945_rt.
1365 */
1366 skb_reserve(rxb->skb, 4);
1367
b481de9c
ZY
1368 priv->alloc_rxb_skb++;
1369 list_del(element);
6440adb5
BC
1370
1371 /* Get physical address of RB/SKB */
1e33dc64
WT
1372 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1373 rxb->skb->data,
1374 priv->hw_params.rx_buf_size,
1375 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1376 list_add_tail(&rxb->list, &rxq->rx_free);
1377 rxq->free_count++;
1378 }
1379 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
1380}
1381
1382/*
1383 * this should be called while priv->lock is locked
1384 */
4fd1f841 1385static void __iwl3945_rx_replenish(void *data)
5c0eef96 1386{
4a8a4322 1387 struct iwl_priv *priv = data;
5c0eef96
MA
1388
1389 iwl3945_rx_allocate(priv);
1390 iwl3945_rx_queue_restock(priv);
1391}
1392
1393
1394void iwl3945_rx_replenish(void *data)
1395{
4a8a4322 1396 struct iwl_priv *priv = data;
5c0eef96
MA
1397 unsigned long flags;
1398
1399 iwl3945_rx_allocate(priv);
b481de9c
ZY
1400
1401 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1402 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1403 spin_unlock_irqrestore(&priv->lock, flags);
1404}
1405
b481de9c
ZY
1406/* Convert linear signal-to-noise ratio into dB */
1407static u8 ratio2dB[100] = {
1408/* 0 1 2 3 4 5 6 7 8 9 */
1409 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1410 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1411 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1412 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1413 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1414 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1415 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1416 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1417 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1418 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1419};
1420
1421/* Calculates a relative dB value from a ratio of linear
1422 * (i.e. not dB) signal levels.
1423 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1424int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1425{
221c80cf
AB
1426 /* 1000:1 or higher just report as 60 dB */
1427 if (sig_ratio >= 1000)
b481de9c
ZY
1428 return 60;
1429
221c80cf 1430 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1431 * add 20 dB to make up for divide by 10 */
221c80cf 1432 if (sig_ratio >= 100)
3ac7f146 1433 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1434
1435 /* We shouldn't see this */
1436 if (sig_ratio < 1)
1437 return 0;
1438
1439 /* Use table for ratios 1:1 - 99:1 */
1440 return (int)ratio2dB[sig_ratio];
1441}
1442
1443#define PERFECT_RSSI (-20) /* dBm */
1444#define WORST_RSSI (-95) /* dBm */
1445#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1446
1447/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1448 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1449 * about formulas used below. */
bb8c093b 1450int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1451{
1452 int sig_qual;
1453 int degradation = PERFECT_RSSI - rssi_dbm;
1454
1455 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1456 * as indicator; formula is (signal dbm - noise dbm).
1457 * SNR at or above 40 is a great signal (100%).
1458 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1459 * Weakest usable signal is usually 10 - 15 dB SNR. */
1460 if (noise_dbm) {
1461 if (rssi_dbm - noise_dbm >= 40)
1462 return 100;
1463 else if (rssi_dbm < noise_dbm)
1464 return 0;
1465 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1466
1467 /* Else use just the signal level.
1468 * This formula is a least squares fit of data points collected and
1469 * compared with a reference system that had a percentage (%) display
1470 * for signal quality. */
1471 } else
1472 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1473 (15 * RSSI_RANGE + 62 * degradation)) /
1474 (RSSI_RANGE * RSSI_RANGE);
1475
1476 if (sig_qual > 100)
1477 sig_qual = 100;
1478 else if (sig_qual < 1)
1479 sig_qual = 0;
1480
1481 return sig_qual;
1482}
1483
1484/**
9fbab516 1485 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1486 *
1487 * Uses the priv->rx_handlers callback function array to invoke
1488 * the appropriate handlers, including command responses,
1489 * frame-received notifications, and other notifications.
1490 */
4a8a4322 1491static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1492{
6100b588 1493 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1494 struct iwl_rx_packet *pkt;
cc2f362c 1495 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1496 u32 r, i;
1497 int reclaim;
1498 unsigned long flags;
5c0eef96 1499 u8 fill_rx = 0;
d68ab680 1500 u32 count = 8;
b481de9c 1501
6440adb5
BC
1502 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1503 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1504 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1505 i = rxq->read;
1506
37d68317 1507 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 1508 fill_rx = 1;
b481de9c
ZY
1509 /* Rx interrupt, but nothing sent from uCode */
1510 if (i == r)
e1623446 1511 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1512
1513 while (i != r) {
1514 rxb = rxq->queue[i];
1515
9fbab516 1516 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1517 * then a bug has been introduced in the queue refilling
1518 * routines -- catch it here */
1519 BUG_ON(rxb == NULL);
1520
1521 rxq->queue[i] = NULL;
1522
6100b588 1523 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 1524 priv->hw_params.rx_buf_size,
b481de9c 1525 PCI_DMA_FROMDEVICE);
3d24a9f7 1526 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1527
1528 /* Reclaim a command buffer only if this packet is a response
1529 * to a (driver-originated) command.
1530 * If the packet (e.g. Rx frame) originated from uCode,
1531 * there is no command buffer to reclaim.
1532 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1533 * but apparently a few don't get set; catch them here. */
1534 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1535 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1536 (pkt->hdr.cmd != REPLY_TX);
1537
1538 /* Based on type of command response or notification,
1539 * handle those that need handling via function in
bb8c093b 1540 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1541 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1542 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1543 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1544 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1545 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1546 } else {
1547 /* No handling needed */
e1623446 1548 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1549 "r %d i %d No handler needed for %s, 0x%02x\n",
1550 r, i, get_cmd_string(pkt->hdr.cmd),
1551 pkt->hdr.cmd);
1552 }
1553
1554 if (reclaim) {
9fbab516 1555 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1556 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1557 * as we reclaim the driver command queue */
1558 if (rxb && rxb->skb)
732587ab 1559 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1560 else
39aadf8c 1561 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1562 }
1563
1564 /* For now we just don't re-use anything. We can tweak this
1565 * later to try and re-use notification packets and SKBs that
1566 * fail to Rx correctly */
1567 if (rxb->skb != NULL) {
1568 priv->alloc_rxb_skb--;
1569 dev_kfree_skb_any(rxb->skb);
1570 rxb->skb = NULL;
1571 }
1572
6100b588 1573 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
1574 priv->hw_params.rx_buf_size,
1575 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1576 spin_lock_irqsave(&rxq->lock, flags);
1577 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1578 spin_unlock_irqrestore(&rxq->lock, flags);
1579 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1580 /* If there are a lot of unused frames,
1581 * restock the Rx queue so ucode won't assert. */
1582 if (fill_rx) {
1583 count++;
1584 if (count >= 8) {
1585 priv->rxq.read = i;
1586 __iwl3945_rx_replenish(priv);
1587 count = 0;
1588 }
1589 }
b481de9c
ZY
1590 }
1591
1592 /* Backtrack one entry */
1593 priv->rxq.read = i;
bb8c093b 1594 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1595}
1596
0359facc 1597/* call this function to flush any scheduled tasklet */
4a8a4322 1598static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 1599{
a96a27f9 1600 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1601 synchronize_irq(priv->pci_dev->irq);
1602 tasklet_kill(&priv->irq_tasklet);
1603}
1604
b481de9c
ZY
1605static const char *desc_lookup(int i)
1606{
1607 switch (i) {
1608 case 1:
1609 return "FAIL";
1610 case 2:
1611 return "BAD_PARAM";
1612 case 3:
1613 return "BAD_CHECKSUM";
1614 case 4:
1615 return "NMI_INTERRUPT";
1616 case 5:
1617 return "SYSASSERT";
1618 case 6:
1619 return "FATAL_ERROR";
1620 }
1621
1622 return "UNKNOWN";
1623}
1624
1625#define ERROR_START_OFFSET (1 * sizeof(u32))
1626#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1627
4a8a4322 1628static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
1629{
1630 u32 i;
1631 u32 desc, time, count, base, data1;
1632 u32 blink1, blink2, ilink1, ilink2;
1633 int rc;
1634
1635 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1636
bb8c093b 1637 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1638 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
1639 return;
1640 }
1641
5d49f498 1642 rc = iwl_grab_nic_access(priv);
b481de9c 1643 if (rc) {
39aadf8c 1644 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
1645 return;
1646 }
1647
5d49f498 1648 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
1649
1650 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
1651 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1652 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1653 priv->status, count);
b481de9c
ZY
1654 }
1655
15b1687c 1656 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
1657 "ilink1 nmiPC Line\n");
1658 for (i = ERROR_START_OFFSET;
1659 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1660 i += ERROR_ELEM_SIZE) {
5d49f498 1661 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 1662 time =
5d49f498 1663 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 1664 blink1 =
5d49f498 1665 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 1666 blink2 =
5d49f498 1667 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 1668 ilink1 =
5d49f498 1669 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 1670 ilink2 =
5d49f498 1671 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 1672 data1 =
5d49f498 1673 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 1674
15b1687c
WT
1675 IWL_ERR(priv,
1676 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1677 desc_lookup(desc), desc, time, blink1, blink2,
1678 ilink1, ilink2, data1);
b481de9c
ZY
1679 }
1680
5d49f498 1681 iwl_release_nic_access(priv);
b481de9c
ZY
1682
1683}
1684
f58177b9 1685#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
1686
1687/**
bb8c093b 1688 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 1689 *
5d49f498 1690 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 1691 */
4a8a4322 1692static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
1693 u32 num_events, u32 mode)
1694{
1695 u32 i;
1696 u32 base; /* SRAM byte address of event log header */
1697 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1698 u32 ptr; /* SRAM byte address of log data */
1699 u32 ev, time, data; /* event log data */
1700
1701 if (num_events == 0)
1702 return;
1703
1704 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1705
1706 if (mode == 0)
1707 event_size = 2 * sizeof(u32);
1708 else
1709 event_size = 3 * sizeof(u32);
1710
1711 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1712
1713 /* "time" is actually "data" for mode 0 (no timestamp).
1714 * place event id # at far right for easier visual parsing. */
1715 for (i = 0; i < num_events; i++) {
5d49f498 1716 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 1717 ptr += sizeof(u32);
5d49f498 1718 time = iwl_read_targ_mem(priv, ptr);
b481de9c 1719 ptr += sizeof(u32);
15b1687c
WT
1720 if (mode == 0) {
1721 /* data, ev */
1722 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1723 } else {
5d49f498 1724 data = iwl_read_targ_mem(priv, ptr);
b481de9c 1725 ptr += sizeof(u32);
15b1687c 1726 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
1727 }
1728 }
1729}
1730
4a8a4322 1731static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
1732{
1733 int rc;
1734 u32 base; /* SRAM byte address of event log header */
1735 u32 capacity; /* event log capacity in # entries */
1736 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1737 u32 num_wraps; /* # times uCode wrapped to top of log */
1738 u32 next_entry; /* index of next entry to be written by uCode */
1739 u32 size; /* # entries that we'll print */
1740
1741 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 1742 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1743 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
1744 return;
1745 }
1746
5d49f498 1747 rc = iwl_grab_nic_access(priv);
b481de9c 1748 if (rc) {
39aadf8c 1749 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
1750 return;
1751 }
1752
1753 /* event log header */
5d49f498
AK
1754 capacity = iwl_read_targ_mem(priv, base);
1755 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1756 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1757 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
1758
1759 size = num_wraps ? capacity : next_entry;
1760
1761 /* bail out if nothing in log */
1762 if (size == 0) {
15b1687c 1763 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 1764 iwl_release_nic_access(priv);
b481de9c
ZY
1765 return;
1766 }
1767
15b1687c 1768 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
1769 size, num_wraps);
1770
1771 /* if uCode has wrapped back to top of log, start at the oldest entry,
1772 * i.e the next one that uCode would fill. */
1773 if (num_wraps)
bb8c093b 1774 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
1775 capacity - next_entry, mode);
1776
1777 /* (then/else) start at top of log */
bb8c093b 1778 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 1779
5d49f498 1780 iwl_release_nic_access(priv);
b481de9c
ZY
1781}
1782
4a8a4322 1783static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1784{
1785 unsigned long flags;
1786
8ccde88a
SO
1787 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1788 sizeof(priv->staging_rxon));
1789 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 1790 iwlcore_commit_rxon(priv);
b481de9c 1791
06fd3d86 1792 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0, NULL);
b481de9c
ZY
1793
1794 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 1795 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
1796 priv->error_recovering = 0;
1797 spin_unlock_irqrestore(&priv->lock, flags);
1798}
1799
4a8a4322 1800static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1801{
1802 u32 inta, handled = 0;
1803 u32 inta_fh;
1804 unsigned long flags;
d08853a3 1805#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1806 u32 inta_mask;
1807#endif
1808
1809 spin_lock_irqsave(&priv->lock, flags);
1810
1811 /* Ack/clear/reset pending uCode interrupts.
1812 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1813 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
1814 inta = iwl_read32(priv, CSR_INT);
1815 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1816
1817 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1818 * Any new interrupts that happen after this, either while we're
1819 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
1820 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1821 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1822
d08853a3 1823#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 1824 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1825 /* just for debug */
5d49f498 1826 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1827 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
1828 inta, inta_mask, inta_fh);
1829 }
1830#endif
1831
1832 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1833 * atomic, make sure that inta covers all the interrupts that
1834 * we've discovered, even if FH interrupt came in just after
1835 * reading CSR_INT. */
6f83eaa1 1836 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 1837 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1838 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
1839 inta |= CSR_INT_BIT_FH_TX;
1840
1841 /* Now service all interrupt bits discovered above. */
1842 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1843 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
1844
1845 /* Tell the device to stop sending interrupts */
ed3b932e 1846 iwl_disable_interrupts(priv);
b481de9c 1847
8ccde88a 1848 iwl_irq_handle_error(priv);
b481de9c
ZY
1849
1850 handled |= CSR_INT_BIT_HW_ERR;
1851
1852 spin_unlock_irqrestore(&priv->lock, flags);
1853
1854 return;
1855 }
1856
d08853a3 1857#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 1858 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1859 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 1860 if (inta & CSR_INT_BIT_SCD)
e1623446 1861 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1862 "the frame/frames.\n");
b481de9c
ZY
1863
1864 /* Alive notification via Rx interrupt will do the real work */
1865 if (inta & CSR_INT_BIT_ALIVE)
e1623446 1866 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
1867 }
1868#endif
1869 /* Safely ignore these bits for debug checks below */
25c03d8e 1870 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1871
b481de9c
ZY
1872 /* Error detected by uCode */
1873 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
1874 IWL_ERR(priv, "Microcode SW error detected. "
1875 "Restarting 0x%X.\n", inta);
8ccde88a 1876 iwl_irq_handle_error(priv);
b481de9c
ZY
1877 handled |= CSR_INT_BIT_SW_ERR;
1878 }
1879
1880 /* uCode wakes up after power-down sleep */
1881 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1882 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 1883 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
1884 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1885 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1886 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1887 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1888 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1889 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1890
1891 handled |= CSR_INT_BIT_WAKEUP;
1892 }
1893
1894 /* All uCode command responses, including Tx command responses,
1895 * Rx "responses" (frame-received notification), and other
1896 * notifications from uCode come through here*/
1897 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 1898 iwl3945_rx_handle(priv);
b481de9c
ZY
1899 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1900 }
1901
1902 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1903 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 1904
5d49f498
AK
1905 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1906 if (!iwl_grab_nic_access(priv)) {
1907 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 1908 (FH39_SRVC_CHNL), 0x0);
5d49f498 1909 iwl_release_nic_access(priv);
b481de9c
ZY
1910 }
1911 handled |= CSR_INT_BIT_FH_TX;
1912 }
1913
1914 if (inta & ~handled)
15b1687c 1915 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
1916
1917 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 1918 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 1919 inta & ~CSR_INI_SET_MASK);
39aadf8c 1920 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
1921 }
1922
1923 /* Re-enable all interrupts */
0359facc
MA
1924 /* only Re-enable if disabled by irq */
1925 if (test_bit(STATUS_INT_ENABLED, &priv->status))
ed3b932e 1926 iwl_enable_interrupts(priv);
b481de9c 1927
d08853a3 1928#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 1929 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
1930 inta = iwl_read32(priv, CSR_INT);
1931 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1932 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 1933 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
1934 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1935 }
1936#endif
1937 spin_unlock_irqrestore(&priv->lock, flags);
1938}
1939
4a8a4322 1940static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 1941 enum ieee80211_band band,
f9340520 1942 u8 is_active, u8 n_probes,
bb8c093b 1943 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
1944{
1945 const struct ieee80211_channel *channels = NULL;
8318d78a 1946 const struct ieee80211_supported_band *sband;
d20b3c65 1947 const struct iwl_channel_info *ch_info;
b481de9c
ZY
1948 u16 passive_dwell = 0;
1949 u16 active_dwell = 0;
1950 int added, i;
1951
cbba18c6 1952 sband = iwl_get_hw_mode(priv, band);
8318d78a 1953 if (!sband)
b481de9c
ZY
1954 return 0;
1955
8318d78a 1956 channels = sband->channels;
b481de9c 1957
77fecfb8
SO
1958 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1959 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 1960
8f4807a1
AK
1961 if (passive_dwell <= active_dwell)
1962 passive_dwell = active_dwell + 1;
1963
8318d78a 1964 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
1965 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
1966 continue;
1967
8318d78a 1968 scan_ch->channel = channels[i].hw_value;
b481de9c 1969
e6148917 1970 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 1971 if (!is_channel_valid(ch_info)) {
e1623446 1972 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
1973 scan_ch->channel);
1974 continue;
1975 }
1976
011a0330
AK
1977 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1978 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1979 /* If passive , set up for auto-switch
1980 * and use long active_dwell time.
1981 */
b481de9c 1982 if (!is_active || is_channel_passive(ch_info) ||
011a0330 1983 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 1984 scan_ch->type = 0; /* passive */
011a0330
AK
1985 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1986 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1987 } else {
b481de9c 1988 scan_ch->type = 1; /* active */
011a0330 1989 }
b481de9c 1990
011a0330
AK
1991 /* Set direct probe bits. These may be used both for active
1992 * scan channels (probes gets sent right away),
1993 * or for passive channels (probes get se sent only after
1994 * hearing clear Rx packet).*/
1995 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1996 if (n_probes)
0d21044e 1997 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
1998 } else {
1999 /* uCode v1 does not allow setting direct probe bits on
2000 * passive channel. */
2001 if ((scan_ch->type & 1) && n_probes)
0d21044e 2002 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2003 }
b481de9c 2004
9fbab516 2005 /* Set txpower levels to defaults */
b481de9c
ZY
2006 scan_ch->tpc.dsp_atten = 110;
2007 /* scan_pwr_info->tpc.dsp_atten; */
2008
2009 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2010 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2011 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2012 else {
2013 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2014 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2015 * power level:
8a1b0245 2016 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2017 */
2018 }
2019
e1623446 2020 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
2021 scan_ch->channel,
2022 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2023 (scan_ch->type & 1) ?
2024 active_dwell : passive_dwell);
2025
2026 scan_ch++;
2027 added++;
2028 }
2029
e1623446 2030 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
2031 return added;
2032}
2033
4a8a4322 2034static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2035 struct ieee80211_rate *rates)
2036{
2037 int i;
2038
2039 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2040 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2041 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2042 rates[i].hw_value_short = i;
2043 rates[i].flags = 0;
d9829a67 2044 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2045 /*
8318d78a 2046 * If CCK != 1M then set short preamble rate flag.
b481de9c 2047 */
bb8c093b 2048 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2049 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2050 }
b481de9c
ZY
2051 }
2052}
2053
b481de9c
ZY
2054/******************************************************************************
2055 *
2056 * uCode download functions
2057 *
2058 ******************************************************************************/
2059
4a8a4322 2060static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2061{
98c92211
TW
2062 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2063 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2064 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2065 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2066 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2067 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2068}
2069
2070/**
bb8c093b 2071 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2072 * looking at all data.
2073 */
4a8a4322 2074static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2075{
2076 u32 val;
2077 u32 save_len = len;
2078 int rc = 0;
2079 u32 errcnt;
2080
e1623446 2081 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2082
5d49f498 2083 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2084 if (rc)
2085 return rc;
2086
5d49f498 2087 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2088 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2089
2090 errcnt = 0;
2091 for (; len > 0; len -= sizeof(u32), image++) {
2092 /* read data comes through single port, auto-incr addr */
2093 /* NOTE: Use the debugless read so we don't flood kernel log
2094 * if IWL_DL_IO is set */
5d49f498 2095 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2096 if (val != le32_to_cpu(*image)) {
15b1687c 2097 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2098 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2099 save_len - len, val, le32_to_cpu(*image));
2100 rc = -EIO;
2101 errcnt++;
2102 if (errcnt >= 20)
2103 break;
2104 }
2105 }
2106
5d49f498 2107 iwl_release_nic_access(priv);
b481de9c
ZY
2108
2109 if (!errcnt)
e1623446
TW
2110 IWL_DEBUG_INFO(priv,
2111 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2112
2113 return rc;
2114}
2115
2116
2117/**
bb8c093b 2118 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2119 * using sample data 100 bytes apart. If these sample points are good,
2120 * it's a pretty good bet that everything between them is good, too.
2121 */
4a8a4322 2122static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2123{
2124 u32 val;
2125 int rc = 0;
2126 u32 errcnt = 0;
2127 u32 i;
2128
e1623446 2129 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2130
5d49f498 2131 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2132 if (rc)
2133 return rc;
2134
2135 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2136 /* read data comes through single port, auto-incr addr */
2137 /* NOTE: Use the debugless read so we don't flood kernel log
2138 * if IWL_DL_IO is set */
5d49f498 2139 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2140 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2141 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2142 if (val != le32_to_cpu(*image)) {
2143#if 0 /* Enable this if you want to see details */
15b1687c 2144 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2145 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2146 i, val, *image);
2147#endif
2148 rc = -EIO;
2149 errcnt++;
2150 if (errcnt >= 3)
2151 break;
2152 }
2153 }
2154
5d49f498 2155 iwl_release_nic_access(priv);
b481de9c
ZY
2156
2157 return rc;
2158}
2159
2160
2161/**
bb8c093b 2162 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2163 * and verify its contents
2164 */
4a8a4322 2165static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
2166{
2167 __le32 *image;
2168 u32 len;
2169 int rc = 0;
2170
2171 /* Try bootstrap */
2172 image = (__le32 *)priv->ucode_boot.v_addr;
2173 len = priv->ucode_boot.len;
bb8c093b 2174 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2175 if (rc == 0) {
e1623446 2176 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2177 return 0;
2178 }
2179
2180 /* Try initialize */
2181 image = (__le32 *)priv->ucode_init.v_addr;
2182 len = priv->ucode_init.len;
bb8c093b 2183 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2184 if (rc == 0) {
e1623446 2185 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2186 return 0;
2187 }
2188
2189 /* Try runtime/protocol */
2190 image = (__le32 *)priv->ucode_code.v_addr;
2191 len = priv->ucode_code.len;
bb8c093b 2192 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2193 if (rc == 0) {
e1623446 2194 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2195 return 0;
2196 }
2197
15b1687c 2198 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2199
9fbab516
BC
2200 /* Since nothing seems to match, show first several data entries in
2201 * instruction SRAM, so maybe visual inspection will give a clue.
2202 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2203 image = (__le32 *)priv->ucode_boot.v_addr;
2204 len = priv->ucode_boot.len;
bb8c093b 2205 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2206
2207 return rc;
2208}
2209
4a8a4322 2210static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2211{
2212 /* Remove all resets to allow NIC to operate */
5d49f498 2213 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2214}
2215
2216/**
bb8c093b 2217 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2218 *
2219 * Copy into buffers for card to fetch via bus-mastering
2220 */
4a8a4322 2221static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2222{
a78fe754 2223 struct iwl_ucode *ucode;
a0987a8d 2224 int ret = -EINVAL, index;
b481de9c
ZY
2225 const struct firmware *ucode_raw;
2226 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2227 const char *name_pre = priv->cfg->fw_name_pre;
2228 const unsigned int api_max = priv->cfg->ucode_api_max;
2229 const unsigned int api_min = priv->cfg->ucode_api_min;
2230 char buf[25];
b481de9c
ZY
2231 u8 *src;
2232 size_t len;
a0987a8d 2233 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2234
2235 /* Ask kernel firmware_class module to get the boot firmware off disk.
2236 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2237 for (index = api_max; index >= api_min; index--) {
2238 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2239 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2240 if (ret < 0) {
15b1687c 2241 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2242 buf, ret);
2243 if (ret == -ENOENT)
2244 continue;
2245 else
2246 goto error;
2247 } else {
2248 if (index < api_max)
15b1687c
WT
2249 IWL_ERR(priv, "Loaded firmware %s, "
2250 "which is deprecated. "
2251 " Please use API v%u instead.\n",
a0987a8d 2252 buf, api_max);
e1623446
TW
2253 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2254 "(%zd bytes) from disk\n",
a0987a8d
RC
2255 buf, ucode_raw->size);
2256 break;
2257 }
b481de9c
ZY
2258 }
2259
a0987a8d
RC
2260 if (ret < 0)
2261 goto error;
b481de9c
ZY
2262
2263 /* Make sure that we got at least our header! */
2264 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 2265 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2266 ret = -EINVAL;
b481de9c
ZY
2267 goto err_release;
2268 }
2269
2270 /* Data from ucode file: header followed by uCode images */
2271 ucode = (void *)ucode_raw->data;
2272
c02b3acd 2273 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2274 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
2275 inst_size = le32_to_cpu(ucode->inst_size);
2276 data_size = le32_to_cpu(ucode->data_size);
2277 init_size = le32_to_cpu(ucode->init_size);
2278 init_data_size = le32_to_cpu(ucode->init_data_size);
2279 boot_size = le32_to_cpu(ucode->boot_size);
2280
a0987a8d
RC
2281 /* api_ver should match the api version forming part of the
2282 * firmware filename ... but we don't check for that and only rely
877d0310 2283 * on the API version read from firmware header from here on forward */
a0987a8d
RC
2284
2285 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2286 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2287 "Driver supports v%u, firmware is v%u.\n",
2288 api_max, api_ver);
2289 priv->ucode_ver = 0;
2290 ret = -EINVAL;
2291 goto err_release;
2292 }
2293 if (api_ver != api_max)
15b1687c 2294 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2295 "got %u. New firmware can be obtained "
2296 "from http://www.intellinuxwireless.org.\n",
2297 api_max, api_ver);
2298
978785a3
TW
2299 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2300 IWL_UCODE_MAJOR(priv->ucode_ver),
2301 IWL_UCODE_MINOR(priv->ucode_ver),
2302 IWL_UCODE_API(priv->ucode_ver),
2303 IWL_UCODE_SERIAL(priv->ucode_ver));
2304
e1623446 2305 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2306 priv->ucode_ver);
e1623446
TW
2307 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2308 inst_size);
2309 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2310 data_size);
2311 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2312 init_size);
2313 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2314 init_data_size);
2315 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2316 boot_size);
b481de9c 2317
a0987a8d 2318
b481de9c
ZY
2319 /* Verify size of file vs. image size info in file's header */
2320 if (ucode_raw->size < sizeof(*ucode) +
2321 inst_size + data_size + init_size +
2322 init_data_size + boot_size) {
2323
e1623446
TW
2324 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2325 ucode_raw->size);
90e759d1 2326 ret = -EINVAL;
b481de9c
ZY
2327 goto err_release;
2328 }
2329
2330 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2331 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2332 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2333 inst_size);
2334 ret = -EINVAL;
b481de9c
ZY
2335 goto err_release;
2336 }
2337
250bdd21 2338 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2339 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2340 data_size);
2341 ret = -EINVAL;
b481de9c
ZY
2342 goto err_release;
2343 }
250bdd21 2344 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2345 IWL_DEBUG_INFO(priv,
2346 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2347 init_size);
2348 ret = -EINVAL;
b481de9c
ZY
2349 goto err_release;
2350 }
250bdd21 2351 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2352 IWL_DEBUG_INFO(priv,
2353 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2354 init_data_size);
2355 ret = -EINVAL;
b481de9c
ZY
2356 goto err_release;
2357 }
250bdd21 2358 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2359 IWL_DEBUG_INFO(priv,
2360 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2361 boot_size);
2362 ret = -EINVAL;
b481de9c
ZY
2363 goto err_release;
2364 }
2365
2366 /* Allocate ucode buffers for card's bus-master loading ... */
2367
2368 /* Runtime instructions and 2 copies of data:
2369 * 1) unmodified from disk
2370 * 2) backup cache for save/restore during power-downs */
2371 priv->ucode_code.len = inst_size;
98c92211 2372 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2373
2374 priv->ucode_data.len = data_size;
98c92211 2375 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2376
2377 priv->ucode_data_backup.len = data_size;
98c92211 2378 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2379
90e759d1
TW
2380 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2381 !priv->ucode_data_backup.v_addr)
2382 goto err_pci_alloc;
b481de9c
ZY
2383
2384 /* Initialization instructions and data */
90e759d1
TW
2385 if (init_size && init_data_size) {
2386 priv->ucode_init.len = init_size;
98c92211 2387 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2388
2389 priv->ucode_init_data.len = init_data_size;
98c92211 2390 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2391
2392 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2393 goto err_pci_alloc;
2394 }
b481de9c
ZY
2395
2396 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2397 if (boot_size) {
2398 priv->ucode_boot.len = boot_size;
98c92211 2399 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2400
90e759d1
TW
2401 if (!priv->ucode_boot.v_addr)
2402 goto err_pci_alloc;
2403 }
b481de9c
ZY
2404
2405 /* Copy images into buffers for card's bus-master reads ... */
2406
2407 /* Runtime instructions (first block of data in file) */
2408 src = &ucode->data[0];
2409 len = priv->ucode_code.len;
e1623446
TW
2410 IWL_DEBUG_INFO(priv,
2411 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2412 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 2413 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2414 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2415
2416 /* Runtime data (2nd block)
bb8c093b 2417 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
2418 src = &ucode->data[inst_size];
2419 len = priv->ucode_data.len;
e1623446
TW
2420 IWL_DEBUG_INFO(priv,
2421 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2422 memcpy(priv->ucode_data.v_addr, src, len);
2423 memcpy(priv->ucode_data_backup.v_addr, src, len);
2424
2425 /* Initialization instructions (3rd block) */
2426 if (init_size) {
2427 src = &ucode->data[inst_size + data_size];
2428 len = priv->ucode_init.len;
e1623446
TW
2429 IWL_DEBUG_INFO(priv,
2430 "Copying (but not loading) init instr len %zd\n", len);
b481de9c
ZY
2431 memcpy(priv->ucode_init.v_addr, src, len);
2432 }
2433
2434 /* Initialization data (4th block) */
2435 if (init_data_size) {
2436 src = &ucode->data[inst_size + data_size + init_size];
2437 len = priv->ucode_init_data.len;
e1623446
TW
2438 IWL_DEBUG_INFO(priv,
2439 "Copying (but not loading) init data len %zd\n", len);
b481de9c
ZY
2440 memcpy(priv->ucode_init_data.v_addr, src, len);
2441 }
2442
2443 /* Bootstrap instructions (5th block) */
2444 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2445 len = priv->ucode_boot.len;
e1623446
TW
2446 IWL_DEBUG_INFO(priv,
2447 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2448 memcpy(priv->ucode_boot.v_addr, src, len);
2449
2450 /* We have our copies now, allow OS release its copies */
2451 release_firmware(ucode_raw);
2452 return 0;
2453
2454 err_pci_alloc:
15b1687c 2455 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2456 ret = -ENOMEM;
bb8c093b 2457 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2458
2459 err_release:
2460 release_firmware(ucode_raw);
2461
2462 error:
90e759d1 2463 return ret;
b481de9c
ZY
2464}
2465
2466
2467/**
bb8c093b 2468 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2469 *
2470 * Tell initialization uCode where to find runtime uCode.
2471 *
2472 * BSM registers initially contain pointers to initialization uCode.
2473 * We need to replace them to load runtime uCode inst and data,
2474 * and to save runtime data when powering down.
2475 */
4a8a4322 2476static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
2477{
2478 dma_addr_t pinst;
2479 dma_addr_t pdata;
2480 int rc = 0;
2481 unsigned long flags;
2482
2483 /* bits 31:0 for 3945 */
2484 pinst = priv->ucode_code.p_addr;
2485 pdata = priv->ucode_data_backup.p_addr;
2486
2487 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2488 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2489 if (rc) {
2490 spin_unlock_irqrestore(&priv->lock, flags);
2491 return rc;
2492 }
2493
2494 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
2495 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2496 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2497 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
2498 priv->ucode_data.len);
2499
a96a27f9 2500 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 2501 * that all new ptr/size info is in place */
5d49f498 2502 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
2503 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2504
5d49f498 2505 iwl_release_nic_access(priv);
b481de9c
ZY
2506
2507 spin_unlock_irqrestore(&priv->lock, flags);
2508
e1623446 2509 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c
ZY
2510
2511 return rc;
2512}
2513
2514/**
bb8c093b 2515 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
2516 *
2517 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2518 *
b481de9c 2519 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 2520 */
4a8a4322 2521static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2522{
2523 /* Check alive response for "valid" sign from uCode */
2524 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2525 /* We had an error bringing up the hardware, so take it
2526 * all the way back down so we can try again */
e1623446 2527 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
2528 goto restart;
2529 }
2530
2531 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2532 * This is a paranoid check, because we would not have gotten the
2533 * "initialize" alive if code weren't properly loaded. */
bb8c093b 2534 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2535 /* Runtime instruction load was bad;
2536 * take it all the way back down so we can try again */
e1623446 2537 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
2538 goto restart;
2539 }
2540
2541 /* Send pointers to protocol/runtime uCode image ... init code will
2542 * load and launch runtime uCode, which will send us another "Alive"
2543 * notification. */
e1623446 2544 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 2545 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
2546 /* Runtime instruction load won't happen;
2547 * take it all the way back down so we can try again */
e1623446 2548 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
2549 goto restart;
2550 }
2551 return;
2552
2553 restart:
2554 queue_work(priv->workqueue, &priv->restart);
2555}
2556
b481de9c 2557/**
bb8c093b 2558 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 2559 * from protocol/runtime uCode (initialization uCode's
bb8c093b 2560 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 2561 */
4a8a4322 2562static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2563{
2564 int rc = 0;
2565 int thermal_spin = 0;
2566 u32 rfkill;
2567
e1623446 2568 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
2569
2570 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2571 /* We had an error bringing up the hardware, so take it
2572 * all the way back down so we can try again */
e1623446 2573 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
2574 goto restart;
2575 }
2576
2577 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2578 * This is a paranoid check, because we would not have gotten the
2579 * "runtime" alive if code weren't properly loaded. */
bb8c093b 2580 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2581 /* Runtime instruction load was bad;
2582 * take it all the way back down so we can try again */
e1623446 2583 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
2584 goto restart;
2585 }
2586
40ace5b3 2587 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c 2588
5d49f498 2589 rc = iwl_grab_nic_access(priv);
b481de9c 2590 if (rc) {
39aadf8c 2591 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
2592 return;
2593 }
2594
5d49f498 2595 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 2596 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
5d49f498 2597 iwl_release_nic_access(priv);
b481de9c
ZY
2598
2599 if (rfkill & 0x1) {
2600 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 2601 /* if RFKILL is not on, then wait for thermal
b481de9c 2602 * sensor in adapter to kick in */
bb8c093b 2603 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
2604 thermal_spin++;
2605 udelay(10);
2606 }
2607
2608 if (thermal_spin)
e1623446 2609 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
2610 thermal_spin * 10);
2611 } else
2612 set_bit(STATUS_RF_KILL_HW, &priv->status);
2613
9fbab516 2614 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
2615 set_bit(STATUS_ALIVE, &priv->status);
2616
2617 /* Clear out the uCode error bit if it is set */
2618 clear_bit(STATUS_FW_ERROR, &priv->status);
2619
775a6e27 2620 if (iwl_is_rfkill(priv))
b481de9c
ZY
2621 return;
2622
36d6825b 2623 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2624
2625 priv->active_rate = priv->rates_mask;
2626 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2627
d25aabb0 2628 iwl_power_update_mode(priv, false);
b481de9c 2629
8ccde88a 2630 if (iwl_is_associated(priv)) {
bb8c093b 2631 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 2632 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 2633
8ccde88a
SO
2634 memcpy(&priv->staging_rxon, &priv->active_rxon,
2635 sizeof(priv->staging_rxon));
b481de9c
ZY
2636 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2637 } else {
2638 /* Initialize our rx_config data */
8ccde88a 2639 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
2640 }
2641
9fbab516 2642 /* Configure Bluetooth device coexistence support */
17f841cd 2643 iwl_send_bt_config(priv);
b481de9c
ZY
2644
2645 /* Configure the adapter for unassociated operation */
e0158e61 2646 iwlcore_commit_rxon(priv);
b481de9c 2647
b481de9c
ZY
2648 iwl3945_reg_txpower_periodic(priv);
2649
fe00b5a5
RC
2650 iwl3945_led_register(priv);
2651
e1623446 2652 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 2653 set_bit(STATUS_READY, &priv->status);
5a66926a 2654 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2655
2656 if (priv->error_recovering)
bb8c093b 2657 iwl3945_error_recovery(priv);
b481de9c 2658
9bdf5eca
MA
2659 /* reassociate for ADHOC mode */
2660 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2661 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2662 priv->vif);
2663 if (beacon)
9944b938 2664 iwl_mac_beacon_update(priv->hw, beacon);
9bdf5eca
MA
2665 }
2666
f45c2714 2667 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
727882d6 2668 iwl_set_mode(priv, priv->iw_mode);
f45c2714 2669
b481de9c
ZY
2670 return;
2671
2672 restart:
2673 queue_work(priv->workqueue, &priv->restart);
2674}
2675
4a8a4322 2676static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2677
4a8a4322 2678static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2679{
2680 unsigned long flags;
2681 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2682 struct ieee80211_conf *conf = NULL;
2683
e1623446 2684 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
2685
2686 conf = ieee80211_get_hw_conf(priv->hw);
2687
2688 if (!exit_pending)
2689 set_bit(STATUS_EXIT_PENDING, &priv->status);
2690
ab53d8af 2691 iwl3945_led_unregister(priv);
40ace5b3 2692 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c
ZY
2693
2694 /* Unblock any waiting calls */
2695 wake_up_interruptible_all(&priv->wait_command_queue);
2696
b481de9c
ZY
2697 /* Wipe out the EXIT_PENDING status bit if we are not actually
2698 * exiting the module */
2699 if (!exit_pending)
2700 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2701
2702 /* stop and reset the on-board processor */
5d49f498 2703 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2704
2705 /* tell the device to stop sending interrupts */
0359facc 2706 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 2707 iwl_disable_interrupts(priv);
0359facc
MA
2708 spin_unlock_irqrestore(&priv->lock, flags);
2709 iwl_synchronize_irq(priv);
b481de9c
ZY
2710
2711 if (priv->mac80211_registered)
2712 ieee80211_stop_queues(priv->hw);
2713
bb8c093b 2714 /* If we have not previously called iwl3945_init() then
6da3a13e 2715 * clear all bits but the RF Kill bits and return */
775a6e27 2716 if (!iwl_is_init(priv)) {
b481de9c
ZY
2717 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2718 STATUS_RF_KILL_HW |
2719 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2720 STATUS_RF_KILL_SW |
9788864e
RC
2721 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2722 STATUS_GEO_CONFIGURED |
ebef2008
AK
2723 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2724 STATUS_EXIT_PENDING;
b481de9c
ZY
2725 goto exit;
2726 }
2727
6da3a13e
WYG
2728 /* ...otherwise clear out all the status bits but the RF Kill
2729 * bits and continue taking the NIC down. */
b481de9c
ZY
2730 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2731 STATUS_RF_KILL_HW |
2732 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2733 STATUS_RF_KILL_SW |
9788864e
RC
2734 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2735 STATUS_GEO_CONFIGURED |
b481de9c 2736 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
2737 STATUS_FW_ERROR |
2738 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2739 STATUS_EXIT_PENDING;
b481de9c 2740
e9414b6b 2741 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2742 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2743 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2744 spin_unlock_irqrestore(&priv->lock, flags);
2745
bb8c093b
CH
2746 iwl3945_hw_txq_ctx_stop(priv);
2747 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
2748
2749 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
2750 if (!iwl_grab_nic_access(priv)) {
2751 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2752 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 2753 iwl_release_nic_access(priv);
b481de9c
ZY
2754 }
2755 spin_unlock_irqrestore(&priv->lock, flags);
2756
2757 udelay(5);
2758
6da3a13e 2759 if (exit_pending)
e9414b6b
AM
2760 priv->cfg->ops->lib->apm_ops.stop(priv);
2761 else
2762 priv->cfg->ops->lib->apm_ops.reset(priv);
2763
b481de9c 2764 exit:
3d24a9f7 2765 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2766
2767 if (priv->ibss_beacon)
2768 dev_kfree_skb(priv->ibss_beacon);
2769 priv->ibss_beacon = NULL;
2770
2771 /* clear out any free frames */
bb8c093b 2772 iwl3945_clear_free_frames(priv);
b481de9c
ZY
2773}
2774
4a8a4322 2775static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2776{
2777 mutex_lock(&priv->mutex);
bb8c093b 2778 __iwl3945_down(priv);
b481de9c 2779 mutex_unlock(&priv->mutex);
b24d22b1 2780
bb8c093b 2781 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
2782}
2783
2784#define MAX_HW_RESTARTS 5
2785
4a8a4322 2786static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
2787{
2788 int rc, i;
2789
2790 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 2791 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
2792 return -EIO;
2793 }
2794
2795 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 2796 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 2797 "parameter)\n");
e655b9f0
ZY
2798 return -ENODEV;
2799 }
2800
e903fbd4 2801 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 2802 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
2803 return -EIO;
2804 }
2805
e655b9f0 2806 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 2807 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
2808 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2809 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2810 else {
2811 set_bit(STATUS_RF_KILL_HW, &priv->status);
6da3a13e
WYG
2812 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2813 return -ENODEV;
b481de9c 2814 }
80fcc9e2 2815
5d49f498 2816 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2817
bb8c093b 2818 rc = iwl3945_hw_nic_init(priv);
b481de9c 2819 if (rc) {
15b1687c 2820 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
2821 return rc;
2822 }
2823
2824 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
2825 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2826 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2827 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2828
2829 /* clear (again), then enable host interrupts */
5d49f498 2830 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
ed3b932e 2831 iwl_enable_interrupts(priv);
b481de9c
ZY
2832
2833 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
2834 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2835 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2836
2837 /* Copy original ucode data image from disk into backup cache.
2838 * This will be used to initialize the on-board processor's
2839 * data SRAM for a clean start when the runtime program first loads. */
2840 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2841 priv->ucode_data.len);
b481de9c 2842
e655b9f0
ZY
2843 /* We return success when we resume from suspend and rf_kill is on. */
2844 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2845 return 0;
2846
b481de9c
ZY
2847 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2848
40ace5b3 2849 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c
ZY
2850
2851 /* load bootstrap state machine,
2852 * load bootstrap program into processor's memory,
2853 * prepare to load the "initialize" uCode */
0164b9b4 2854 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
2855
2856 if (rc) {
15b1687c
WT
2857 IWL_ERR(priv,
2858 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
2859 continue;
2860 }
2861
2862 /* start card; "initialize" will load runtime ucode */
bb8c093b 2863 iwl3945_nic_start(priv);
b481de9c 2864
e1623446 2865 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
2866
2867 return 0;
2868 }
2869
2870 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2871 __iwl3945_down(priv);
ebef2008 2872 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2873
2874 /* tried to restart and config the device for as long as our
2875 * patience could withstand */
15b1687c 2876 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
2877 return -EIO;
2878}
2879
2880
2881/*****************************************************************************
2882 *
2883 * Workqueue callbacks
2884 *
2885 *****************************************************************************/
2886
bb8c093b 2887static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 2888{
4a8a4322
AK
2889 struct iwl_priv *priv =
2890 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2891
2892 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2893 return;
2894
2895 mutex_lock(&priv->mutex);
bb8c093b 2896 iwl3945_init_alive_start(priv);
b481de9c
ZY
2897 mutex_unlock(&priv->mutex);
2898}
2899
bb8c093b 2900static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 2901{
4a8a4322
AK
2902 struct iwl_priv *priv =
2903 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2904
2905 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2906 return;
2907
2908 mutex_lock(&priv->mutex);
bb8c093b 2909 iwl3945_alive_start(priv);
b481de9c
ZY
2910 mutex_unlock(&priv->mutex);
2911}
2912
2663516d
HS
2913static void iwl3945_rfkill_poll(struct work_struct *data)
2914{
2915 struct iwl_priv *priv =
2916 container_of(data, struct iwl_priv, rfkill_poll.work);
2917 unsigned long status = priv->status;
2918
2919 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2920 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2921 else
2922 set_bit(STATUS_RF_KILL_HW, &priv->status);
2923
2924 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
2925 queue_work(priv->workqueue, &priv->rf_kill);
2926
2927 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2928 round_jiffies_relative(2 * HZ));
2929
2930}
2931
b481de9c 2932#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 2933static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 2934{
4a8a4322
AK
2935 struct iwl_priv *priv =
2936 container_of(data, struct iwl_priv, request_scan);
c2d79b48 2937 struct iwl_host_cmd cmd = {
b481de9c 2938 .id = REPLY_SCAN_CMD,
bb8c093b 2939 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
2940 .meta.flags = CMD_SIZE_HUGE,
2941 };
2942 int rc = 0;
bb8c093b 2943 struct iwl3945_scan_cmd *scan;
b481de9c 2944 struct ieee80211_conf *conf = NULL;
1ecf9fc1 2945 u8 n_probes = 0;
8318d78a 2946 enum ieee80211_band band;
1ecf9fc1 2947 bool is_active = false;
b481de9c
ZY
2948
2949 conf = ieee80211_get_hw_conf(priv->hw);
2950
2951 mutex_lock(&priv->mutex);
2952
775a6e27 2953 if (!iwl_is_ready(priv)) {
39aadf8c 2954 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
2955 goto done;
2956 }
2957
a96a27f9 2958 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
2959 * was given the chance to run... */
2960 if (!test_bit(STATUS_SCANNING, &priv->status))
2961 goto done;
2962
2963 /* This should never be called or scheduled if there is currently
2964 * a scan active in the hardware. */
2965 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
2966 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2967 "Ignoring second request.\n");
b481de9c
ZY
2968 rc = -EIO;
2969 goto done;
2970 }
2971
2972 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 2973 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
2974 goto done;
2975 }
2976
2977 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
2978 IWL_DEBUG_HC(priv,
2979 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
2980 goto done;
2981 }
2982
775a6e27 2983 if (iwl_is_rfkill(priv)) {
e1623446 2984 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
2985 goto done;
2986 }
2987
2988 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
2989 IWL_DEBUG_HC(priv,
2990 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
2991 goto done;
2992 }
2993
2994 if (!priv->scan_bands) {
e1623446 2995 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
2996 goto done;
2997 }
2998
805cee5b
WT
2999 if (!priv->scan) {
3000 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3001 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3002 if (!priv->scan) {
b481de9c
ZY
3003 rc = -ENOMEM;
3004 goto done;
3005 }
3006 }
805cee5b 3007 scan = priv->scan;
bb8c093b 3008 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3009
3010 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3011 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3012
8ccde88a 3013 if (iwl_is_associated(priv)) {
b481de9c
ZY
3014 u16 interval = 0;
3015 u32 extra;
3016 u32 suspend_time = 100;
3017 u32 scan_suspend_time = 100;
3018 unsigned long flags;
3019
e1623446 3020 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
3021
3022 spin_lock_irqsave(&priv->lock, flags);
3023 interval = priv->beacon_int;
3024 spin_unlock_irqrestore(&priv->lock, flags);
3025
3026 scan->suspend_time = 0;
15e869d8 3027 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3028 if (!interval)
3029 interval = suspend_time;
3030 /*
3031 * suspend time format:
3032 * 0-19: beacon interval in usec (time before exec.)
3033 * 20-23: 0
3034 * 24-31: number of beacons (suspend between channels)
3035 */
3036
3037 extra = (suspend_time / interval) << 24;
3038 scan_suspend_time = 0xFF0FFFFF &
3039 (extra | ((suspend_time % interval) * 1024));
3040
3041 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 3042 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
3043 scan_suspend_time, interval);
3044 }
3045
1ecf9fc1
JB
3046 if (priv->scan_request->n_ssids) {
3047 int i, p = 0;
3048 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
3049 for (i = 0; i < priv->scan_request->n_ssids; i++) {
3050 /* always does wildcard anyway */
3051 if (!priv->scan_request->ssids[i].ssid_len)
3052 continue;
3053 scan->direct_scan[p].id = WLAN_EID_SSID;
3054 scan->direct_scan[p].len =
3055 priv->scan_request->ssids[i].ssid_len;
3056 memcpy(scan->direct_scan[p].ssid,
3057 priv->scan_request->ssids[i].ssid,
3058 priv->scan_request->ssids[i].ssid_len);
3059 n_probes++;
3060 p++;
3061 }
3062 is_active = true;
f9340520 3063 } else
1ecf9fc1 3064 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
b481de9c
ZY
3065
3066 /* We don't build a direct scan probe request; the uCode will do
3067 * that based on the direct_mask added to each channel entry */
b481de9c 3068 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3069 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3070 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3071
3072 /* flags + rate selection */
3073
66b5004d 3074 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3075 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3076 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3077 scan->good_CRC_th = 0;
8318d78a 3078 band = IEEE80211_BAND_2GHZ;
66b5004d 3079 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3080 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3081 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3082 band = IEEE80211_BAND_5GHZ;
66b5004d 3083 } else {
39aadf8c 3084 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3085 goto done;
3086 }
3087
77fecfb8 3088 scan->tx_cmd.len = cpu_to_le16(
1ecf9fc1
JB
3089 iwl_fill_probe_req(priv,
3090 (struct ieee80211_mgmt *)scan->data,
3091 priv->scan_request->ie,
3092 priv->scan_request->ie_len,
3093 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
77fecfb8 3094
b481de9c
ZY
3095 /* select Rx antennas */
3096 scan->flags |= iwl3945_get_antenna_flags(priv);
3097
05c914fe 3098 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3099 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3100
f9340520 3101 scan->channel_count =
1ecf9fc1 3102 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
f9340520 3103 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3104
14b54336 3105 if (scan->channel_count == 0) {
e1623446 3106 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
3107 goto done;
3108 }
3109
b481de9c 3110 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3111 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3112 cmd.data = scan;
3113 scan->len = cpu_to_le16(cmd.len);
3114
3115 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3116 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3117 if (rc)
3118 goto done;
3119
3120 queue_delayed_work(priv->workqueue, &priv->scan_check,
3121 IWL_SCAN_CHECK_WATCHDOG);
3122
3123 mutex_unlock(&priv->mutex);
3124 return;
3125
3126 done:
2420ebc1
MA
3127 /* can not perform scan make sure we clear scanning
3128 * bits from status so next scan request can be performed.
3129 * if we dont clear scanning status bit here all next scan
3130 * will fail
3131 */
3132 clear_bit(STATUS_SCAN_HW, &priv->status);
3133 clear_bit(STATUS_SCANNING, &priv->status);
3134
01ebd063 3135 /* inform mac80211 scan aborted */
b481de9c
ZY
3136 queue_work(priv->workqueue, &priv->scan_completed);
3137 mutex_unlock(&priv->mutex);
3138}
3139
bb8c093b 3140static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3141{
4a8a4322 3142 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3143
3144 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3145 return;
3146
3147 mutex_lock(&priv->mutex);
bb8c093b 3148 __iwl3945_up(priv);
b481de9c 3149 mutex_unlock(&priv->mutex);
c0af96a6 3150 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3151}
3152
bb8c093b 3153static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3154{
4a8a4322 3155 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3156
3157 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3158 return;
3159
bb8c093b 3160 iwl3945_down(priv);
b481de9c
ZY
3161 queue_work(priv->workqueue, &priv->up);
3162}
3163
bb8c093b 3164static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3165{
4a8a4322
AK
3166 struct iwl_priv *priv =
3167 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3168
3169 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3170 return;
3171
3172 mutex_lock(&priv->mutex);
bb8c093b 3173 iwl3945_rx_replenish(priv);
b481de9c
ZY
3174 mutex_unlock(&priv->mutex);
3175}
3176
7878a5a4
MA
3177#define IWL_DELAY_NEXT_SCAN (HZ*2)
3178
5bbe233b 3179void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 3180{
b481de9c
ZY
3181 int rc = 0;
3182 struct ieee80211_conf *conf = NULL;
3183
05c914fe 3184 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 3185 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
3186 return;
3187 }
3188
3189
e1623446 3190 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 3191 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
3192
3193 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3194 return;
3195
322a9811 3196 if (!priv->vif || !priv->is_open)
6ef89d0a 3197 return;
322a9811 3198
af0053d6 3199 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3200
b481de9c
ZY
3201 conf = ieee80211_get_hw_conf(priv->hw);
3202
8ccde88a 3203 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3204 iwlcore_commit_rxon(priv);
b481de9c 3205
28afaf91 3206 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3207 iwl3945_setup_rxon_timing(priv);
518099a8 3208 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3209 sizeof(priv->rxon_timing), &priv->rxon_timing);
3210 if (rc)
39aadf8c 3211 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3212 "Attempting to continue.\n");
3213
8ccde88a 3214 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3215
8ccde88a 3216 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3217
e1623446 3218 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3219 priv->assoc_id, priv->beacon_int);
3220
3221 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3222 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3223 else
8ccde88a 3224 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3225
8ccde88a 3226 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3227 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3228 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3229 else
8ccde88a 3230 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3231
05c914fe 3232 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3233 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3234
3235 }
3236
e0158e61 3237 iwlcore_commit_rxon(priv);
b481de9c
ZY
3238
3239 switch (priv->iw_mode) {
05c914fe 3240 case NL80211_IFTYPE_STATION:
bb8c093b 3241 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3242 break;
3243
05c914fe 3244 case NL80211_IFTYPE_ADHOC:
b481de9c 3245
ce546fd2 3246 priv->assoc_id = 1;
06fd3d86 3247 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
b481de9c 3248 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3249 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3250 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3251 CMD_ASYNC);
bb8c093b
CH
3252 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3253 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3254
3255 break;
3256
3257 default:
15b1687c 3258 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3259 __func__, priv->iw_mode);
b481de9c
ZY
3260 break;
3261 }
3262
14d2aac5 3263 iwl_activate_qos(priv, 0);
292ae174 3264
7878a5a4
MA
3265 /* we have just associated, don't start scan too early */
3266 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3267}
3268
b481de9c
ZY
3269/*****************************************************************************
3270 *
3271 * mac80211 entry point functions
3272 *
3273 *****************************************************************************/
3274
5a66926a
ZY
3275#define UCODE_READY_TIMEOUT (2 * HZ)
3276
bb8c093b 3277static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3278{
4a8a4322 3279 struct iwl_priv *priv = hw->priv;
5a66926a 3280 int ret;
b481de9c 3281
e1623446 3282 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3283
3284 /* we should be verifying the device is ready to be opened */
3285 mutex_lock(&priv->mutex);
3286
8ccde88a 3287 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
3288 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3289 * ucode filename and max sizes are card-specific. */
3290
3291 if (!priv->ucode_code.len) {
3292 ret = iwl3945_read_ucode(priv);
3293 if (ret) {
15b1687c 3294 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3295 mutex_unlock(&priv->mutex);
3296 goto out_release_irq;
3297 }
3298 }
b481de9c 3299
e655b9f0 3300 ret = __iwl3945_up(priv);
b481de9c
ZY
3301
3302 mutex_unlock(&priv->mutex);
5a66926a 3303
c0af96a6 3304 iwl_rfkill_set_hw_state(priv);
80fcc9e2 3305
e655b9f0
ZY
3306 if (ret)
3307 goto out_release_irq;
3308
e1623446 3309 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0 3310
5a66926a
ZY
3311 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3312 * mac80211 will not be run successfully. */
3313 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3314 test_bit(STATUS_READY, &priv->status),
3315 UCODE_READY_TIMEOUT);
3316 if (!ret) {
3317 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3318 IWL_ERR(priv,
3319 "Wait for START_ALIVE timeout after %dms.\n",
3320 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3321 ret = -ETIMEDOUT;
3322 goto out_release_irq;
3323 }
3324 }
3325
2663516d
HS
3326 /* ucode is running and will send rfkill notifications,
3327 * no need to poll the killswitch state anymore */
3328 cancel_delayed_work(&priv->rfkill_poll);
3329
e655b9f0 3330 priv->is_open = 1;
e1623446 3331 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3332 return 0;
5a66926a
ZY
3333
3334out_release_irq:
e655b9f0 3335 priv->is_open = 0;
e1623446 3336 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3337 return ret;
b481de9c
ZY
3338}
3339
bb8c093b 3340static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3341{
4a8a4322 3342 struct iwl_priv *priv = hw->priv;
b481de9c 3343
e1623446 3344 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3345
e655b9f0 3346 if (!priv->is_open) {
e1623446 3347 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3348 return;
3349 }
3350
b481de9c 3351 priv->is_open = 0;
5a66926a 3352
775a6e27 3353 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3354 /* stop mac, cancel any scan request and clear
3355 * RXON_FILTER_ASSOC_MSK BIT
3356 */
5a66926a 3357 mutex_lock(&priv->mutex);
af0053d6 3358 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3359 mutex_unlock(&priv->mutex);
fde3571f
MA
3360 }
3361
5a66926a
ZY
3362 iwl3945_down(priv);
3363
3364 flush_workqueue(priv->workqueue);
2663516d
HS
3365
3366 /* start polling the killswitch state again */
3367 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3368 round_jiffies_relative(2 * HZ));
6ef89d0a 3369
e1623446 3370 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3371}
3372
e039fa4a 3373static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3374{
4a8a4322 3375 struct iwl_priv *priv = hw->priv;
b481de9c 3376
e1623446 3377 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3378
e1623446 3379 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3380 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3381
e039fa4a 3382 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3383 dev_kfree_skb_any(skb);
3384
e1623446 3385 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3386 return NETDEV_TX_OK;
b481de9c
ZY
3387}
3388
60690a6a 3389void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
3390{
3391 int rc = 0;
3392
d986bcd1 3393 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
3394 return;
3395
3396 /* The following should be done only at AP bring up */
8ccde88a 3397 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
3398
3399 /* RXON - unassoc (to set timing command) */
8ccde88a 3400 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3401 iwlcore_commit_rxon(priv);
b481de9c
ZY
3402
3403 /* RXON Timing */
28afaf91 3404 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3405 iwl3945_setup_rxon_timing(priv);
518099a8
SO
3406 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3407 sizeof(priv->rxon_timing),
3408 &priv->rxon_timing);
b481de9c 3409 if (rc)
39aadf8c 3410 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3411 "Attempting to continue.\n");
3412
3413 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 3414 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3415 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3416 priv->staging_rxon.flags |=
b481de9c
ZY
3417 RXON_FLG_SHORT_PREAMBLE_MSK;
3418 else
8ccde88a 3419 priv->staging_rxon.flags &=
b481de9c
ZY
3420 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3421
8ccde88a 3422 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
3423 if (priv->assoc_capability &
3424 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3425 priv->staging_rxon.flags |=
b481de9c
ZY
3426 RXON_FLG_SHORT_SLOT_MSK;
3427 else
8ccde88a 3428 priv->staging_rxon.flags &=
b481de9c
ZY
3429 ~RXON_FLG_SHORT_SLOT_MSK;
3430
05c914fe 3431 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3432 priv->staging_rxon.flags &=
b481de9c
ZY
3433 ~RXON_FLG_SHORT_SLOT_MSK;
3434 }
3435 /* restore RXON assoc */
8ccde88a 3436 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
e0158e61 3437 iwlcore_commit_rxon(priv);
06fd3d86 3438 priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
556f8db7 3439 }
bb8c093b 3440 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3441
3442 /* FIXME - we need to add code here to detect a totally new
3443 * configuration, reset the AP, unassoc, rxon timing, assoc,
3444 * clear sta table, add BCAST sta... */
3445}
3446
bb8c093b 3447static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
3448 struct ieee80211_vif *vif,
3449 struct ieee80211_sta *sta,
3450 struct ieee80211_key_conf *key)
b481de9c 3451{
4a8a4322 3452 struct iwl_priv *priv = hw->priv;
dc822b5d 3453 const u8 *addr;
6e21f15c
AK
3454 int ret = 0;
3455 u8 sta_id = IWL_INVALID_STATION;
3456 u8 static_key;
b481de9c 3457
e1623446 3458 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3459
df878d8f 3460 if (iwl3945_mod_params.sw_crypto) {
e1623446 3461 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
3462 return -EOPNOTSUPP;
3463 }
3464
42986796 3465 addr = sta ? sta->addr : iwl_bcast_addr;
6e21f15c
AK
3466 static_key = !iwl_is_associated(priv);
3467
3468 if (!static_key) {
40ace5b3 3469 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
6e21f15c 3470 if (sta_id == IWL_INVALID_STATION) {
12514396 3471 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
6e21f15c
AK
3472 addr);
3473 return -EINVAL;
3474 }
b481de9c
ZY
3475 }
3476
3477 mutex_lock(&priv->mutex);
af0053d6 3478 iwl_scan_cancel_timeout(priv, 100);
6e21f15c 3479 mutex_unlock(&priv->mutex);
15e869d8 3480
b481de9c 3481 switch (cmd) {
6e21f15c
AK
3482 case SET_KEY:
3483 if (static_key)
3484 ret = iwl3945_set_static_key(priv, key);
3485 else
3486 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3487 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
3488 break;
3489 case DISABLE_KEY:
6e21f15c
AK
3490 if (static_key)
3491 ret = iwl3945_remove_static_key(priv);
3492 else
3493 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3494 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
3495 break;
3496 default:
42986796 3497 ret = -EINVAL;
b481de9c
ZY
3498 }
3499
e1623446 3500 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3501
42986796 3502 return ret;
b481de9c
ZY
3503}
3504
b481de9c
ZY
3505/*****************************************************************************
3506 *
3507 * sysfs attributes
3508 *
3509 *****************************************************************************/
3510
d08853a3 3511#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3512
3513/*
3514 * The following adds a new attribute to the sysfs representation
3515 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3516 * used for controlling the debug level.
3517 *
3518 * See the level definitions in iwl for details.
3519 */
40b8ec0b
SO
3520static ssize_t show_debug_level(struct device *d,
3521 struct device_attribute *attr, char *buf)
b481de9c 3522{
4a8a4322 3523 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
3524
3525 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3526}
40b8ec0b
SO
3527static ssize_t store_debug_level(struct device *d,
3528 struct device_attribute *attr,
b481de9c
ZY
3529 const char *buf, size_t count)
3530{
4a8a4322 3531 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
3532 unsigned long val;
3533 int ret;
b481de9c 3534
40b8ec0b
SO
3535 ret = strict_strtoul(buf, 0, &val);
3536 if (ret)
978785a3 3537 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 3538 else
40b8ec0b 3539 priv->debug_level = val;
b481de9c
ZY
3540
3541 return strnlen(buf, count);
3542}
3543
40b8ec0b
SO
3544static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3545 show_debug_level, store_debug_level);
b481de9c 3546
d08853a3 3547#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3548
b481de9c
ZY
3549static ssize_t show_temperature(struct device *d,
3550 struct device_attribute *attr, char *buf)
3551{
4a8a4322 3552 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3553
775a6e27 3554 if (!iwl_is_alive(priv))
b481de9c
ZY
3555 return -EAGAIN;
3556
bb8c093b 3557 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
3558}
3559
3560static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3561
b481de9c
ZY
3562static ssize_t show_tx_power(struct device *d,
3563 struct device_attribute *attr, char *buf)
3564{
4a8a4322 3565 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 3566 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3567}
3568
3569static ssize_t store_tx_power(struct device *d,
3570 struct device_attribute *attr,
3571 const char *buf, size_t count)
3572{
4a8a4322 3573 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3574 char *p = (char *)buf;
3575 u32 val;
3576
3577 val = simple_strtoul(p, &p, 10);
3578 if (p == buf)
978785a3 3579 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 3580 else
bb8c093b 3581 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
3582
3583 return count;
3584}
3585
3586static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3587
3588static ssize_t show_flags(struct device *d,
3589 struct device_attribute *attr, char *buf)
3590{
4a8a4322 3591 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3592
8ccde88a 3593 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
3594}
3595
3596static ssize_t store_flags(struct device *d,
3597 struct device_attribute *attr,
3598 const char *buf, size_t count)
3599{
4a8a4322 3600 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3601 u32 flags = simple_strtoul(buf, NULL, 0);
3602
3603 mutex_lock(&priv->mutex);
8ccde88a 3604 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 3605 /* Cancel any currently running scans... */
af0053d6 3606 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3607 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3608 else {
e1623446 3609 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 3610 flags);
8ccde88a 3611 priv->staging_rxon.flags = cpu_to_le32(flags);
e0158e61 3612 iwlcore_commit_rxon(priv);
b481de9c
ZY
3613 }
3614 }
3615 mutex_unlock(&priv->mutex);
3616
3617 return count;
3618}
3619
3620static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3621
3622static ssize_t show_filter_flags(struct device *d,
3623 struct device_attribute *attr, char *buf)
3624{
4a8a4322 3625 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3626
3627 return sprintf(buf, "0x%04X\n",
8ccde88a 3628 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
3629}
3630
3631static ssize_t store_filter_flags(struct device *d,
3632 struct device_attribute *attr,
3633 const char *buf, size_t count)
3634{
4a8a4322 3635 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3636 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3637
3638 mutex_lock(&priv->mutex);
8ccde88a 3639 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 3640 /* Cancel any currently running scans... */
af0053d6 3641 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3642 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3643 else {
e1623446 3644 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 3645 "0x%04X\n", filter_flags);
8ccde88a 3646 priv->staging_rxon.filter_flags =
b481de9c 3647 cpu_to_le32(filter_flags);
e0158e61 3648 iwlcore_commit_rxon(priv);
b481de9c
ZY
3649 }
3650 }
3651 mutex_unlock(&priv->mutex);
3652
3653 return count;
3654}
3655
3656static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3657 store_filter_flags);
3658
c8b0e6e1 3659#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
3660
3661static ssize_t show_measurement(struct device *d,
3662 struct device_attribute *attr, char *buf)
3663{
4a8a4322 3664 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 3665 struct iwl_spectrum_notification measure_report;
b481de9c 3666 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3667 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3668 unsigned long flags;
3669
3670 spin_lock_irqsave(&priv->lock, flags);
3671 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3672 spin_unlock_irqrestore(&priv->lock, flags);
3673 return 0;
3674 }
3675 memcpy(&measure_report, &priv->measure_report, size);
3676 priv->measurement_status = 0;
3677 spin_unlock_irqrestore(&priv->lock, flags);
3678
3679 while (size && (PAGE_SIZE - len)) {
3680 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3681 PAGE_SIZE - len, 1);
3682 len = strlen(buf);
3683 if (PAGE_SIZE - len)
3684 buf[len++] = '\n';
3685
3686 ofs += 16;
3687 size -= min(size, 16U);
3688 }
3689
3690 return len;
3691}
3692
3693static ssize_t store_measurement(struct device *d,
3694 struct device_attribute *attr,
3695 const char *buf, size_t count)
3696{
4a8a4322 3697 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3698 struct ieee80211_measurement_params params = {
8ccde88a 3699 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
3700 .start_time = cpu_to_le64(priv->last_tsf),
3701 .duration = cpu_to_le16(1),
3702 };
3703 u8 type = IWL_MEASURE_BASIC;
3704 u8 buffer[32];
3705 u8 channel;
3706
3707 if (count) {
3708 char *p = buffer;
3709 strncpy(buffer, buf, min(sizeof(buffer), count));
3710 channel = simple_strtoul(p, NULL, 0);
3711 if (channel)
3712 params.channel = channel;
3713
3714 p = buffer;
3715 while (*p && *p != ' ')
3716 p++;
3717 if (*p)
3718 type = simple_strtoul(p + 1, NULL, 0);
3719 }
3720
e1623446 3721 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 3722 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3723 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
3724
3725 return count;
3726}
3727
3728static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3729 show_measurement, store_measurement);
c8b0e6e1 3730#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 3731
b481de9c
ZY
3732static ssize_t store_retry_rate(struct device *d,
3733 struct device_attribute *attr,
3734 const char *buf, size_t count)
3735{
4a8a4322 3736 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3737
3738 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3739 if (priv->retry_rate <= 0)
3740 priv->retry_rate = 1;
3741
3742 return count;
3743}
3744
3745static ssize_t show_retry_rate(struct device *d,
3746 struct device_attribute *attr, char *buf)
3747{
4a8a4322 3748 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3749 return sprintf(buf, "%d", priv->retry_rate);
3750}
3751
3752static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3753 store_retry_rate);
3754
d25aabb0 3755
b481de9c
ZY
3756static ssize_t store_power_level(struct device *d,
3757 struct device_attribute *attr,
3758 const char *buf, size_t count)
3759{
4a8a4322 3760 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
3761 int ret;
3762 unsigned long mode;
3763
b481de9c 3764
b481de9c
ZY
3765 mutex_lock(&priv->mutex);
3766
d25aabb0
WT
3767 ret = strict_strtoul(buf, 10, &mode);
3768 if (ret)
3769 goto out;
b481de9c 3770
d25aabb0
WT
3771 ret = iwl_power_set_user_mode(priv, mode);
3772 if (ret) {
3773 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
3774 goto out;
b481de9c 3775 }
d25aabb0 3776 ret = count;
b481de9c
ZY
3777
3778 out:
3779 mutex_unlock(&priv->mutex);
d25aabb0 3780 return ret;
b481de9c
ZY
3781}
3782
d25aabb0
WT
3783static ssize_t show_power_level(struct device *d,
3784 struct device_attribute *attr, char *buf)
3785{
3786 struct iwl_priv *priv = dev_get_drvdata(d);
3787 int mode = priv->power_data.user_power_setting;
3788 int system = priv->power_data.system_power_setting;
3789 int level = priv->power_data.power_mode;
3790 char *p = buf;
3791
3792 switch (system) {
3793 case IWL_POWER_SYS_AUTO:
3794 p += sprintf(p, "SYSTEM:auto");
3795 break;
3796 case IWL_POWER_SYS_AC:
3797 p += sprintf(p, "SYSTEM:ac");
3798 break;
3799 case IWL_POWER_SYS_BATTERY:
3800 p += sprintf(p, "SYSTEM:battery");
3801 break;
3802 }
3803
3804 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3805 "fixed" : "auto");
3806 p += sprintf(p, "\tINDEX:%d", level);
3807 p += sprintf(p, "\n");
3808 return p - buf + 1;
3809}
3810
3811static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
3812 show_power_level, store_power_level);
3813
b481de9c
ZY
3814#define MAX_WX_STRING 80
3815
3816/* Values are in microsecond */
3817static const s32 timeout_duration[] = {
3818 350000,
3819 250000,
3820 75000,
3821 37000,
3822 25000,
3823};
3824static const s32 period_duration[] = {
3825 400000,
3826 700000,
3827 1000000,
3828 1000000,
3829 1000000
3830};
3831
b481de9c
ZY
3832static ssize_t show_channels(struct device *d,
3833 struct device_attribute *attr, char *buf)
3834{
8318d78a
JB
3835 /* all this shit doesn't belong into sysfs anyway */
3836 return 0;
b481de9c
ZY
3837}
3838
3839static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3840
3841static ssize_t show_statistics(struct device *d,
3842 struct device_attribute *attr, char *buf)
3843{
4a8a4322 3844 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3845 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 3846 u32 len = 0, ofs = 0;
f2c7e521 3847 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
3848 int rc = 0;
3849
775a6e27 3850 if (!iwl_is_alive(priv))
b481de9c
ZY
3851 return -EAGAIN;
3852
3853 mutex_lock(&priv->mutex);
17f841cd 3854 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3855 mutex_unlock(&priv->mutex);
3856
3857 if (rc) {
3858 len = sprintf(buf,
3859 "Error sending statistics request: 0x%08X\n", rc);
3860 return len;
3861 }
3862
3863 while (size && (PAGE_SIZE - len)) {
3864 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3865 PAGE_SIZE - len, 1);
3866 len = strlen(buf);
3867 if (PAGE_SIZE - len)
3868 buf[len++] = '\n';
3869
3870 ofs += 16;
3871 size -= min(size, 16U);
3872 }
3873
3874 return len;
3875}
3876
3877static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3878
3879static ssize_t show_antenna(struct device *d,
3880 struct device_attribute *attr, char *buf)
3881{
4a8a4322 3882 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3883
775a6e27 3884 if (!iwl_is_alive(priv))
b481de9c
ZY
3885 return -EAGAIN;
3886
7e4bca5e 3887 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
3888}
3889
3890static ssize_t store_antenna(struct device *d,
3891 struct device_attribute *attr,
3892 const char *buf, size_t count)
3893{
7530f85f 3894 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 3895 int ant;
b481de9c
ZY
3896
3897 if (count == 0)
3898 return 0;
3899
3900 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 3901 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
3902 return count;
3903 }
3904
3905 if ((ant >= 0) && (ant <= 2)) {
e1623446 3906 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 3907 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 3908 } else
e1623446 3909 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
3910
3911
3912 return count;
3913}
3914
3915static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3916
3917static ssize_t show_status(struct device *d,
3918 struct device_attribute *attr, char *buf)
3919{
4a8a4322 3920 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 3921 if (!iwl_is_alive(priv))
b481de9c
ZY
3922 return -EAGAIN;
3923 return sprintf(buf, "0x%08x\n", (int)priv->status);
3924}
3925
3926static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3927
3928static ssize_t dump_error_log(struct device *d,
3929 struct device_attribute *attr,
3930 const char *buf, size_t count)
3931{
3932 char *p = (char *)buf;
3933
3934 if (p[0] == '1')
4a8a4322 3935 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
3936
3937 return strnlen(buf, count);
3938}
3939
3940static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3941
3942static ssize_t dump_event_log(struct device *d,
3943 struct device_attribute *attr,
3944 const char *buf, size_t count)
3945{
3946 char *p = (char *)buf;
3947
3948 if (p[0] == '1')
4a8a4322 3949 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
3950
3951 return strnlen(buf, count);
3952}
3953
3954static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
3955
3956/*****************************************************************************
3957 *
a96a27f9 3958 * driver setup and tear down
b481de9c
ZY
3959 *
3960 *****************************************************************************/
3961
4a8a4322 3962static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 3963{
d21050c7 3964 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
3965
3966 init_waitqueue_head(&priv->wait_command_queue);
3967
bb8c093b
CH
3968 INIT_WORK(&priv->up, iwl3945_bg_up);
3969 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3970 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 3971 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 3972 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
3973 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3974 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 3975 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
3976 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3977 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3978 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3979 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
3980
3981 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
3982
3983 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 3984 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
3985}
3986
4a8a4322 3987static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3988{
bb8c093b 3989 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 3990
e47eb6ad 3991 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
3992 cancel_delayed_work(&priv->scan_check);
3993 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
3994 cancel_work_sync(&priv->beacon_update);
3995}
3996
bb8c093b 3997static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
3998 &dev_attr_antenna.attr,
3999 &dev_attr_channels.attr,
4000 &dev_attr_dump_errors.attr,
4001 &dev_attr_dump_events.attr,
4002 &dev_attr_flags.attr,
4003 &dev_attr_filter_flags.attr,
c8b0e6e1 4004#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4005 &dev_attr_measurement.attr,
4006#endif
4007 &dev_attr_power_level.attr,
b481de9c 4008 &dev_attr_retry_rate.attr,
b481de9c
ZY
4009 &dev_attr_statistics.attr,
4010 &dev_attr_status.attr,
4011 &dev_attr_temperature.attr,
b481de9c 4012 &dev_attr_tx_power.attr,
d08853a3 4013#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
4014 &dev_attr_debug_level.attr,
4015#endif
b481de9c
ZY
4016 NULL
4017};
4018
bb8c093b 4019static struct attribute_group iwl3945_attribute_group = {
b481de9c 4020 .name = NULL, /* put in device directory */
bb8c093b 4021 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
4022};
4023
bb8c093b
CH
4024static struct ieee80211_ops iwl3945_hw_ops = {
4025 .tx = iwl3945_mac_tx,
4026 .start = iwl3945_mac_start,
4027 .stop = iwl3945_mac_stop,
cbb6ab94 4028 .add_interface = iwl_mac_add_interface,
d8052319 4029 .remove_interface = iwl_mac_remove_interface,
4808368d 4030 .config = iwl_mac_config,
5ee5811e 4031 .config_interface = iwl_mac_config_interface,
8ccde88a 4032 .configure_filter = iwl_configure_filter,
bb8c093b 4033 .set_key = iwl3945_mac_set_key,
aa89f31e 4034 .get_tx_stats = iwl_mac_get_tx_stats,
488829f1 4035 .conf_tx = iwl_mac_conf_tx,
bd564261 4036 .reset_tsf = iwl_mac_reset_tsf,
5bbe233b 4037 .bss_info_changed = iwl_bss_info_changed,
e9dde6f6 4038 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4039};
4040
e52119c5 4041static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
4042{
4043 int ret;
e6148917 4044 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
4045
4046 priv->retry_rate = 1;
4047 priv->ibss_beacon = NULL;
4048
4049 spin_lock_init(&priv->lock);
3dae0c42 4050 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
4051 spin_lock_init(&priv->sta_lock);
4052 spin_lock_init(&priv->hcmd_lock);
4053
4054 INIT_LIST_HEAD(&priv->free_frames);
4055
4056 mutex_init(&priv->mutex);
4057
4058 /* Clear the driver's (not device's) station table */
40ace5b3 4059 priv->cfg->ops->smgmt->clear_station_table(priv);
90a30a02
KA
4060
4061 priv->data_retry_limit = -1;
4062 priv->ieee_channels = NULL;
4063 priv->ieee_rates = NULL;
4064 priv->band = IEEE80211_BAND_2GHZ;
4065
4066 priv->iw_mode = NL80211_IFTYPE_STATION;
4067
4068 iwl_reset_qos(priv);
4069
4070 priv->qos_data.qos_active = 0;
4071 priv->qos_data.qos_cap.val = 0;
4072
4073 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
4074 /* If power management is turned on, default to CAM mode */
4075 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 4076 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 4077
e6148917
SO
4078 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
4079 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4080 eeprom->version);
4081 ret = -EINVAL;
4082 goto err;
4083 }
4084 ret = iwl_init_channel_map(priv);
90a30a02
KA
4085 if (ret) {
4086 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4087 goto err;
4088 }
4089
e6148917
SO
4090 /* Set up txpower settings in driver for all channels */
4091 if (iwl3945_txpower_set_from_eeprom(priv)) {
4092 ret = -EIO;
4093 goto err_free_channel_map;
4094 }
4095
534166de 4096 ret = iwlcore_init_geos(priv);
90a30a02
KA
4097 if (ret) {
4098 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4099 goto err_free_channel_map;
4100 }
534166de
SO
4101 iwl3945_init_hw_rates(priv, priv->ieee_rates);
4102
2a4ddaab
AK
4103 return 0;
4104
4105err_free_channel_map:
4106 iwl_free_channel_map(priv);
4107err:
4108 return ret;
4109}
4110
4111static int iwl3945_setup_mac(struct iwl_priv *priv)
4112{
4113 int ret;
4114 struct ieee80211_hw *hw = priv->hw;
4115
4116 hw->rate_control_algorithm = "iwl-3945-rs";
4117 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
4118
4119 /* Tell mac80211 our characteristics */
4120 hw->flags = IEEE80211_HW_SIGNAL_DBM |
b1c6019b
MA
4121 IEEE80211_HW_NOISE_DBM |
4122 IEEE80211_HW_SPECTRUM_MGMT;
2a4ddaab
AK
4123
4124 hw->wiphy->interface_modes =
4125 BIT(NL80211_IFTYPE_STATION) |
4126 BIT(NL80211_IFTYPE_ADHOC);
4127
4128 hw->wiphy->custom_regulatory = true;
4129
1ecf9fc1
JB
4130 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
4131 /* we create the 802.11 header and a zero-length SSID element */
4132 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
d60cc91a 4133
2a4ddaab
AK
4134 /* Default value; 4 EDCA QOS priorities */
4135 hw->queues = 4;
4136
4137 hw->conf.beacon_int = 100;
4138
534166de
SO
4139 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4140 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4141 &priv->bands[IEEE80211_BAND_2GHZ];
2a4ddaab 4142
534166de
SO
4143 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4144 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4145 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02 4146
2a4ddaab
AK
4147 ret = ieee80211_register_hw(priv->hw);
4148 if (ret) {
4149 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
4150 return ret;
4151 }
4152 priv->mac80211_registered = 1;
90a30a02 4153
2a4ddaab 4154 return 0;
90a30a02
KA
4155}
4156
bb8c093b 4157static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4158{
4159 int err = 0;
4a8a4322 4160 struct iwl_priv *priv;
b481de9c 4161 struct ieee80211_hw *hw;
c0f20d91 4162 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 4163 struct iwl3945_eeprom *eeprom;
0359facc 4164 unsigned long flags;
b481de9c 4165
cee53ddb
KA
4166 /***********************
4167 * 1. Allocating HW data
4168 * ********************/
4169
b481de9c
ZY
4170 /* mac80211 allocates memory for this device instance, including
4171 * space for this driver's private structure */
90a30a02 4172 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 4173 if (hw == NULL) {
a3139c59 4174 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
4175 err = -ENOMEM;
4176 goto out;
4177 }
b481de9c 4178 priv = hw->priv;
90a30a02 4179 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 4180
df878d8f
KA
4181 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
4182 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
4183 IWL_ERR(priv,
4184 "invalid queues_num, should be between %d and %d\n",
4185 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59 4186 err = -EINVAL;
c8f16138 4187 goto out_ieee80211_free_hw;
a3139c59
SO
4188 }
4189
90a30a02
KA
4190 /*
4191 * Disabling hardware scan means that mac80211 will perform scans
4192 * "the hard way", rather than using device's scan.
4193 */
df878d8f 4194 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 4195 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
4196 iwl3945_hw_ops.hw_scan = NULL;
4197 }
4198
90a30a02 4199
e1623446 4200 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
4201 priv->cfg = cfg;
4202 priv->pci_dev = pdev;
cee53ddb 4203
d08853a3 4204#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 4205 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
4206 atomic_set(&priv->restrict_refcnt, 0);
4207#endif
b481de9c 4208
cee53ddb
KA
4209 /***************************
4210 * 2. Initializing PCI bus
4211 * *************************/
b481de9c
ZY
4212 if (pci_enable_device(pdev)) {
4213 err = -ENODEV;
4214 goto out_ieee80211_free_hw;
4215 }
4216
4217 pci_set_master(pdev);
4218
284901a9 4219 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 4220 if (!err)
284901a9 4221 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 4222 if (err) {
978785a3 4223 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
4224 goto out_pci_disable_device;
4225 }
4226
4227 pci_set_drvdata(pdev, priv);
4228 err = pci_request_regions(pdev, DRV_NAME);
4229 if (err)
4230 goto out_pci_disable_device;
6440adb5 4231
cee53ddb
KA
4232 /***********************
4233 * 3. Read REV Register
4234 * ********************/
b481de9c
ZY
4235 priv->hw_base = pci_iomap(pdev, 0, 0);
4236 if (!priv->hw_base) {
4237 err = -ENODEV;
4238 goto out_pci_release_regions;
4239 }
4240
e1623446 4241 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 4242 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 4243 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 4244
cee53ddb
KA
4245 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4246 * PCI Tx retries from interfering with C3 CPU state */
4247 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 4248
90a30a02
KA
4249 /* amp init */
4250 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 4251 if (err < 0) {
d5df2a16 4252 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
90a30a02 4253 goto out_iounmap;
cee53ddb 4254 }
b481de9c 4255
cee53ddb
KA
4256 /***********************
4257 * 4. Read EEPROM
4258 * ********************/
90a30a02 4259
cee53ddb 4260 /* Read the EEPROM */
e6148917 4261 err = iwl_eeprom_init(priv);
cee53ddb 4262 if (err) {
15b1687c 4263 IWL_ERR(priv, "Unable to init EEPROM\n");
c8f16138 4264 goto out_iounmap;
cee53ddb
KA
4265 }
4266 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
4267 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4268 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 4269 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 4270 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 4271
cee53ddb
KA
4272 /***********************
4273 * 5. Setup HW Constants
4274 * ********************/
b481de9c 4275 /* Device-specific setup */
3832ec9d 4276 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 4277 IWL_ERR(priv, "failed to set hw settings\n");
c8f16138 4278 goto out_eeprom_free;
b481de9c
ZY
4279 }
4280
cee53ddb
KA
4281 /***********************
4282 * 6. Setup priv
4283 * ********************/
cee53ddb 4284
90a30a02 4285 err = iwl3945_init_drv(priv);
b481de9c 4286 if (err) {
90a30a02 4287 IWL_ERR(priv, "initializing driver failed\n");
c8f16138 4288 goto out_unset_hw_params;
b481de9c
ZY
4289 }
4290
978785a3
TW
4291 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4292 priv->cfg->name);
cee53ddb
KA
4293
4294 /***********************************
4295 * 7. Initialize Module Parameters
4296 * **********************************/
4297
4298 /* Initialize module parameter values here */
4299 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 4300 if (iwl3945_mod_params.disable) {
cee53ddb 4301 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 4302 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
849e0dce
RC
4303 }
4304
cee53ddb
KA
4305
4306 /***********************
4307 * 8. Setup Services
4308 * ********************/
4309
4310 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4311 iwl_disable_interrupts(priv);
cee53ddb
KA
4312 spin_unlock_irqrestore(&priv->lock, flags);
4313
2663516d
HS
4314 pci_enable_msi(priv->pci_dev);
4315
f17d08a6 4316 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
2663516d
HS
4317 DRV_NAME, priv);
4318 if (err) {
4319 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4320 goto out_disable_msi;
4321 }
4322
cee53ddb 4323 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 4324 if (err) {
15b1687c 4325 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 4326 goto out_release_irq;
849e0dce 4327 }
849e0dce 4328
8ccde88a
SO
4329 iwl_set_rxon_channel(priv,
4330 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
4331 iwl3945_setup_deferred_work(priv);
4332 iwl3945_setup_rx_handlers(priv);
4333
cee53ddb 4334 /*********************************
2663516d 4335 * 9. Setup and Register mac80211
cee53ddb
KA
4336 * *******************************/
4337
2a4ddaab 4338 iwl_enable_interrupts(priv);
b481de9c 4339
2a4ddaab
AK
4340 err = iwl3945_setup_mac(priv);
4341 if (err)
4342 goto out_remove_sysfs;
cee53ddb 4343
c0af96a6 4344 err = iwl_rfkill_init(priv);
ebef2008 4345 if (err)
15b1687c 4346 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008 4347 "Ignoring error: %d\n", err);
2a4ddaab
AK
4348 else
4349 iwl_rfkill_set_hw_state(priv);
ebef2008 4350
2663516d
HS
4351 /* Start monitoring the killswitch */
4352 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4353 2 * HZ);
4354
b481de9c
ZY
4355 return 0;
4356
cee53ddb 4357 out_remove_sysfs:
c8f16138
RC
4358 destroy_workqueue(priv->workqueue);
4359 priv->workqueue = NULL;
cee53ddb 4360 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4361 out_release_irq:
2663516d 4362 free_irq(priv->pci_dev->irq, priv);
2663516d
HS
4363 out_disable_msi:
4364 pci_disable_msi(priv->pci_dev);
c8f16138
RC
4365 iwlcore_free_geos(priv);
4366 iwl_free_channel_map(priv);
4367 out_unset_hw_params:
4368 iwl3945_unset_hw_params(priv);
4369 out_eeprom_free:
4370 iwl_eeprom_free(priv);
b481de9c
ZY
4371 out_iounmap:
4372 pci_iounmap(pdev, priv->hw_base);
4373 out_pci_release_regions:
4374 pci_release_regions(pdev);
4375 out_pci_disable_device:
b481de9c 4376 pci_set_drvdata(pdev, NULL);
623d563e 4377 pci_disable_device(pdev);
b481de9c
ZY
4378 out_ieee80211_free_hw:
4379 ieee80211_free_hw(priv->hw);
4380 out:
4381 return err;
4382}
4383
c83dbf68 4384static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 4385{
4a8a4322 4386 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4387 unsigned long flags;
b481de9c
ZY
4388
4389 if (!priv)
4390 return;
4391
e1623446 4392 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 4393
b481de9c 4394 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4395
d552bfb6
KA
4396 if (priv->mac80211_registered) {
4397 ieee80211_unregister_hw(priv->hw);
4398 priv->mac80211_registered = 0;
4399 } else {
4400 iwl3945_down(priv);
4401 }
b481de9c 4402
0359facc
MA
4403 /* make sure we flush any pending irq or
4404 * tasklet for the driver
4405 */
4406 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4407 iwl_disable_interrupts(priv);
0359facc
MA
4408 spin_unlock_irqrestore(&priv->lock, flags);
4409
4410 iwl_synchronize_irq(priv);
4411
bb8c093b 4412 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4413
c0af96a6 4414 iwl_rfkill_unregister(priv);
2663516d
HS
4415 cancel_delayed_work(&priv->rfkill_poll);
4416
bb8c093b 4417 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
4418
4419 if (priv->rxq.bd)
51af3d3f 4420 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 4421 iwl3945_hw_txq_ctx_free(priv);
b481de9c 4422
3832ec9d 4423 iwl3945_unset_hw_params(priv);
40ace5b3 4424 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c 4425
6ef89d0a
MA
4426 /*netif_stop_queue(dev); */
4427 flush_workqueue(priv->workqueue);
4428
bb8c093b 4429 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
4430 * priv->workqueue... so we can't take down the workqueue
4431 * until now... */
4432 destroy_workqueue(priv->workqueue);
4433 priv->workqueue = NULL;
4434
2663516d
HS
4435 free_irq(pdev->irq, priv);
4436 pci_disable_msi(pdev);
4437
b481de9c
ZY
4438 pci_iounmap(pdev, priv->hw_base);
4439 pci_release_regions(pdev);
4440 pci_disable_device(pdev);
4441 pci_set_drvdata(pdev, NULL);
4442
e6148917 4443 iwl_free_channel_map(priv);
534166de 4444 iwlcore_free_geos(priv);
805cee5b 4445 kfree(priv->scan);
b481de9c
ZY
4446 if (priv->ibss_beacon)
4447 dev_kfree_skb(priv->ibss_beacon);
4448
4449 ieee80211_free_hw(priv->hw);
4450}
4451
b481de9c
ZY
4452
4453/*****************************************************************************
4454 *
4455 * driver and module entry point
4456 *
4457 *****************************************************************************/
4458
bb8c093b 4459static struct pci_driver iwl3945_driver = {
b481de9c 4460 .name = DRV_NAME,
bb8c093b
CH
4461 .id_table = iwl3945_hw_card_ids,
4462 .probe = iwl3945_pci_probe,
4463 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 4464#ifdef CONFIG_PM
6da3a13e
WYG
4465 .suspend = iwl_pci_suspend,
4466 .resume = iwl_pci_resume,
b481de9c
ZY
4467#endif
4468};
4469
bb8c093b 4470static int __init iwl3945_init(void)
b481de9c
ZY
4471{
4472
4473 int ret;
4474 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4475 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
4476
4477 ret = iwl3945_rate_control_register();
4478 if (ret) {
a3139c59
SO
4479 printk(KERN_ERR DRV_NAME
4480 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
4481 return ret;
4482 }
4483
bb8c093b 4484 ret = pci_register_driver(&iwl3945_driver);
b481de9c 4485 if (ret) {
a3139c59 4486 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 4487 goto error_register;
b481de9c 4488 }
b481de9c
ZY
4489
4490 return ret;
897e1cf2 4491
897e1cf2
RC
4492error_register:
4493 iwl3945_rate_control_unregister();
4494 return ret;
b481de9c
ZY
4495}
4496
bb8c093b 4497static void __exit iwl3945_exit(void)
b481de9c 4498{
bb8c093b 4499 pci_unregister_driver(&iwl3945_driver);
897e1cf2 4500 iwl3945_rate_control_unregister();
b481de9c
ZY
4501}
4502
a0987a8d 4503MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 4504
df878d8f 4505module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 4506MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 4507module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 4508MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
4509module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4510MODULE_PARM_DESC(swcrypto,
4511 "using software crypto (default 1 [software])\n");
df878d8f 4512module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 4513MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 4514module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
4515MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4516
df878d8f 4517module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
4518MODULE_PARM_DESC(queues_num, "number of hw queues.");
4519
af48d048
SO
4520module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4521MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4522
bb8c093b
CH
4523module_exit(iwl3945_exit);
4524module_init(iwl3945_init);