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iwl3945: Getting rid of the *39_rxon iwl_priv fields
[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
WT
51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
b481de9c
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60/*
61 * module name, copyright, version, etc.
b481de9c
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
df878d8f
KA
90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
KA
95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
6440adb5
BC
105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
f2c7e521
AK
124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
f2c7e521
AK
134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
6440adb5
BC
146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
4a8a4322 152static void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
6440adb5
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
4a8a4322 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
f2c7e521
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e174961c 206 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
69946333
TW
219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
c14c521e
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC
228
229 /* Add station to device's station table */
17f841cd
SO
230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
4a8a4322 236static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
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237{
238 int rc = 0;
3d24a9f7 239 struct iwl_rx_packet *res = NULL;
bb8c093b 240 struct iwl3945_rxon_assoc_cmd rxon_assoc;
c2d79b48 241 struct iwl_host_cmd cmd = {
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242 .id = REPLY_RXON_ASSOC,
243 .len = sizeof(rxon_assoc),
244 .meta.flags = CMD_WANT_SKB,
245 .data = &rxon_assoc,
246 };
8ccde88a
SO
247 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
248 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
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249
250 if ((rxon1->flags == rxon2->flags) &&
251 (rxon1->filter_flags == rxon2->filter_flags) &&
252 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
253 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
254 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
255 return 0;
256 }
257
8ccde88a
SO
258 rxon_assoc.flags = priv->staging_rxon.flags;
259 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
260 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
261 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
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262 rxon_assoc.reserved = 0;
263
518099a8 264 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
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265 if (rc)
266 return rc;
267
3d24a9f7 268 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 269 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 270 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
b481de9c
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271 rc = -EIO;
272 }
273
274 priv->alloc_rxb_skb--;
275 dev_kfree_skb_any(cmd.meta.u.skb);
276
277 return rc;
278}
279
7e4bca5e
SO
280/**
281 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
282 * @priv: eeprom and antenna fields are used to determine antenna flags
283 *
284 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
285 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
286 *
287 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
288 * IWL_ANTENNA_MAIN - Force MAIN antenna
289 * IWL_ANTENNA_AUX - Force AUX antenna
290 */
291__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
292{
293 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
294
295 switch (iwl3945_mod_params.antenna) {
296 case IWL_ANTENNA_DIVERSITY:
297 return 0;
298
299 case IWL_ANTENNA_MAIN:
300 if (eeprom->antenna_switch_type)
301 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
302 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
303
304 case IWL_ANTENNA_AUX:
305 if (eeprom->antenna_switch_type)
306 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
307 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
308 }
309
310 /* bad antenna selector value */
311 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
312 iwl3945_mod_params.antenna);
313
314 return 0; /* "diversity" is default if error */
315}
316
b481de9c 317/**
bb8c093b 318 * iwl3945_commit_rxon - commit staging_rxon to hardware
b481de9c 319 *
01ebd063 320 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
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321 * the active_rxon structure is updated with the new data. This
322 * function correctly transitions out of the RXON_ASSOC_MSK state if
323 * a HW tune is required based on the RXON structure changes.
324 */
4a8a4322 325static int iwl3945_commit_rxon(struct iwl_priv *priv)
b481de9c
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326{
327 /* cast away the const for active_rxon in this function */
8ccde88a
SO
328 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
329 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
b481de9c
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330 int rc = 0;
331
775a6e27 332 if (!iwl_is_alive(priv))
b481de9c
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333 return -1;
334
335 /* always get timestamp with Rx frame */
8ccde88a 336 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
b481de9c
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337
338 /* select antenna */
8ccde88a 339 staging_rxon->flags &=
b481de9c 340 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
8ccde88a 341 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
b481de9c 342
8ccde88a 343 rc = iwl_check_rxon_cmd(priv);
b481de9c 344 if (rc) {
15b1687c 345 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
b481de9c
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346 return -EINVAL;
347 }
348
349 /* If we don't need to send a full RXON, we can use
bb8c093b 350 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 351 * and other flags for the current radio configuration. */
8ccde88a 352 if (!iwl_full_rxon_required(priv)) {
bb8c093b 353 rc = iwl3945_send_rxon_assoc(priv);
b481de9c 354 if (rc) {
15b1687c 355 IWL_ERR(priv, "Error setting RXON_ASSOC "
b481de9c
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356 "configuration (%d).\n", rc);
357 return rc;
358 }
359
8ccde88a 360 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c
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361
362 return 0;
363 }
364
365 /* If we are currently associated and the new config requires
366 * an RXON_ASSOC and the new config wants the associated mask enabled,
367 * we must clear the associated from the active configuration
368 * before we apply the new config */
8ccde88a
SO
369 if (iwl_is_associated(priv) &&
370 (staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK)) {
b481de9c
ZY
371 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
372 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
373
8ccde88a
SO
374 /*
375 * reserved4 and 5 could have been filled by the iwlcore code.
376 * Let's clear them before pushing to the 3945.
377 */
378 active_rxon->reserved4 = 0;
379 active_rxon->reserved5 = 0;
518099a8 380 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 381 sizeof(struct iwl3945_rxon_cmd),
8ccde88a 382 &priv->active_rxon);
b481de9c
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383
384 /* If the mask clearing failed then we set
385 * active_rxon back to what it was previously */
386 if (rc) {
387 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 388 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
b481de9c
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389 "configuration (%d).\n", rc);
390 return rc;
391 }
b481de9c
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392 }
393
394 IWL_DEBUG_INFO("Sending RXON\n"
395 "* with%s RXON_FILTER_ASSOC_MSK\n"
396 "* channel = %d\n"
e174961c 397 "* bssid = %pM\n",
8ccde88a 398 ((priv->staging_rxon.filter_flags &
b481de9c 399 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
8ccde88a
SO
400 le16_to_cpu(staging_rxon->channel),
401 staging_rxon->bssid_addr);
402
403 /*
404 * reserved4 and 5 could have been filled by the iwlcore code.
405 * Let's clear them before pushing to the 3945.
406 */
407 staging_rxon->reserved4 = 0;
408 staging_rxon->reserved5 = 0;
b481de9c
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409
410 /* Apply the new configuration */
518099a8 411 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
8ccde88a
SO
412 sizeof(struct iwl3945_rxon_cmd),
413 staging_rxon);
b481de9c 414 if (rc) {
15b1687c 415 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
b481de9c
ZY
416 return rc;
417 }
418
8ccde88a 419 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c 420
bb8c093b 421 iwl3945_clear_stations_table(priv);
556f8db7 422
b481de9c
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423 /* If we issue a new RXON command which required a tune then we must
424 * send a new TXPOWER command or we won't be able to Tx any frames */
75bcfae9 425 rc = priv->cfg->ops->lib->send_tx_power(priv);
b481de9c 426 if (rc) {
15b1687c 427 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
b481de9c
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428 return rc;
429 }
430
431 /* Add the broadcast address so we can send broadcast frames */
b5323d36 432 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
b481de9c 433 IWL_INVALID_STATION) {
15b1687c 434 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
b481de9c
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435 return -EIO;
436 }
437
438 /* If we have set the ASSOC_MSK and we are in BSS mode then
439 * add the IWL_AP_ID to the station rate table */
8ccde88a 440 if (iwl_is_associated(priv) &&
05c914fe 441 (priv->iw_mode == NL80211_IFTYPE_STATION))
8ccde88a
SO
442 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
443 1, 0)
b481de9c 444 == IWL_INVALID_STATION) {
15b1687c 445 IWL_ERR(priv, "Error adding AP address for transmit\n");
b481de9c
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446 return -EIO;
447 }
448
8318d78a 449 /* Init the hardware's rate fallback order based on the band */
b481de9c
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450 rc = iwl3945_init_hw_rate_table(priv);
451 if (rc) {
15b1687c 452 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
b481de9c
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453 return -EIO;
454 }
455
456 return 0;
457}
458
4a8a4322 459static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
b481de9c
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460 struct ieee80211_key_conf *keyconf,
461 u8 sta_id)
462{
463 unsigned long flags;
464 __le16 key_flags = 0;
465
466 switch (keyconf->alg) {
467 case ALG_CCMP:
468 key_flags |= STA_KEY_FLG_CCMP;
469 key_flags |= cpu_to_le16(
470 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
471 key_flags &= ~STA_KEY_FLG_INVALID;
472 break;
473 case ALG_TKIP:
474 case ALG_WEP:
b481de9c
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475 default:
476 return -EINVAL;
477 }
478 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
479 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
480 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
481 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
b481de9c
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482 keyconf->keylen);
483
f2c7e521 484 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 485 keyconf->keylen);
f2c7e521
AK
486 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
487 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
488 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
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489
490 spin_unlock_irqrestore(&priv->sta_lock, flags);
491
492 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
17f841cd
SO
493 iwl_send_add_sta(priv,
494 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
ZY
495 return 0;
496}
497
4a8a4322 498static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
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499{
500 unsigned long flags;
501
502 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
503 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
504 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 505 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
506 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
507 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
508 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
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509 spin_unlock_irqrestore(&priv->sta_lock, flags);
510
511 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
17f841cd
SO
512 iwl_send_add_sta(priv,
513 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
ZY
514 return 0;
515}
516
4a8a4322 517static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
518{
519 struct list_head *element;
520
521 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
522 priv->frames_count);
523
524 while (!list_empty(&priv->free_frames)) {
525 element = priv->free_frames.next;
526 list_del(element);
bb8c093b 527 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
ZY
528 priv->frames_count--;
529 }
530
531 if (priv->frames_count) {
39aadf8c 532 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY
533 priv->frames_count);
534 priv->frames_count = 0;
535 }
536}
537
4a8a4322 538static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 539{
bb8c093b 540 struct iwl3945_frame *frame;
b481de9c
ZY
541 struct list_head *element;
542 if (list_empty(&priv->free_frames)) {
543 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
544 if (!frame) {
15b1687c 545 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY
546 return NULL;
547 }
548
549 priv->frames_count++;
550 return frame;
551 }
552
553 element = priv->free_frames.next;
554 list_del(element);
bb8c093b 555 return list_entry(element, struct iwl3945_frame, list);
b481de9c
ZY
556}
557
4a8a4322 558static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
ZY
559{
560 memset(frame, 0, sizeof(*frame));
561 list_add(&frame->list, &priv->free_frames);
562}
563
4a8a4322 564unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 565 struct ieee80211_hdr *hdr,
73ec1cc2 566 int left)
b481de9c
ZY
567{
568
8ccde88a 569 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
570 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
571 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
572 return 0;
573
574 if (priv->ibss_beacon->len > left)
575 return 0;
576
577 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
578
579 return priv->ibss_beacon->len;
580}
581
4a8a4322 582static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 583{
bb8c093b 584 struct iwl3945_frame *frame;
b481de9c
ZY
585 unsigned int frame_size;
586 int rc;
587 u8 rate;
588
bb8c093b 589 frame = iwl3945_get_free_frame(priv);
b481de9c
ZY
590
591 if (!frame) {
15b1687c 592 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY
593 "command.\n");
594 return -ENOMEM;
595 }
596
8ccde88a 597 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 598
bb8c093b 599 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 600
518099a8 601 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
602 &frame->u.cmd[0]);
603
bb8c093b 604 iwl3945_free_frame(priv, frame);
b481de9c
ZY
605
606 return rc;
607}
608
4a8a4322 609static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 610{
3832ec9d 611 if (priv->shared_virt)
b481de9c 612 pci_free_consistent(priv->pci_dev,
bb8c093b 613 sizeof(struct iwl3945_shared),
3832ec9d
AK
614 priv->shared_virt,
615 priv->shared_phys);
b481de9c
ZY
616}
617
b481de9c
ZY
618/*
619 * QoS support
620*/
4a8a4322 621static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
4c897253 622 struct iwl_qosparam_cmd *qos)
b481de9c
ZY
623{
624
518099a8 625 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
4c897253 626 sizeof(struct iwl_qosparam_cmd), qos);
b481de9c
ZY
627}
628
4a8a4322 629static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
630{
631 unsigned long flags;
632
b481de9c
ZY
633 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
634 return;
635
b481de9c
ZY
636 spin_lock_irqsave(&priv->lock, flags);
637 priv->qos_data.def_qos_parm.qos_flags = 0;
638
639 if (priv->qos_data.qos_cap.q_AP.queue_request &&
640 !priv->qos_data.qos_cap.q_AP.txop_request)
641 priv->qos_data.def_qos_parm.qos_flags |=
642 QOS_PARAM_FLG_TXOP_TYPE_MSK;
643
644 if (priv->qos_data.qos_active)
645 priv->qos_data.def_qos_parm.qos_flags |=
646 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
647
648 spin_unlock_irqrestore(&priv->lock, flags);
649
8ccde88a 650 if (force || iwl_is_associated(priv)) {
a96a27f9 651 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
b481de9c
ZY
652 priv->qos_data.qos_active);
653
bb8c093b 654 iwl3945_send_qos_params_command(priv,
b481de9c
ZY
655 &(priv->qos_data.def_qos_parm));
656 }
657}
658
b481de9c
ZY
659/*
660 * Power management (not Tx power!) functions
661 */
662#define MSEC_TO_USEC 1024
663
600c0e11 664
b481de9c 665/* default power management (not Tx power) table values */
a96a27f9 666/* for TIM 0-10 */
3dae0c42
WT
667static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = {
668 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
669 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
670 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
671 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
672 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
673 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
b481de9c
ZY
674};
675
a96a27f9 676/* for TIM > 10 */
3dae0c42
WT
677static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = {
678 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
679 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
680 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
681 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
682 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
683 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
b481de9c
ZY
684};
685
4a8a4322 686int iwl3945_power_init_handle(struct iwl_priv *priv)
b481de9c
ZY
687{
688 int rc = 0, i;
3dae0c42
WT
689 struct iwl_power_mgr *pow_data;
690 int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
b481de9c
ZY
691 u16 pci_pm;
692
693 IWL_DEBUG_POWER("Initialize power \n");
694
3dae0c42 695 pow_data = &priv->power_data;
b481de9c
ZY
696
697 memset(pow_data, 0, sizeof(*pow_data));
698
3dae0c42 699 pow_data->dtim_period = 1;
b481de9c
ZY
700
701 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
702 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
703
704 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
705 if (rc != 0)
706 return 0;
707 else {
600c0e11 708 struct iwl_powertable_cmd *cmd;
b481de9c
ZY
709
710 IWL_DEBUG_POWER("adjust power command flags\n");
711
3dae0c42 712 for (i = 0; i < IWL_POWER_MAX; i++) {
b481de9c
ZY
713 cmd = &pow_data->pwr_range_0[i].cmd;
714
715 if (pci_pm & 0x1)
716 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
717 else
718 cmd->flags |= IWL_POWER_PCI_PM_MSK;
719 }
720 }
721 return rc;
722}
723
4a8a4322 724static int iwl3945_update_power_cmd(struct iwl_priv *priv,
600c0e11 725 struct iwl_powertable_cmd *cmd, u32 mode)
b481de9c 726{
3dae0c42 727 struct iwl_power_mgr *pow_data;
1125eff3 728 struct iwl_power_vec_entry *range;
3dae0c42
WT
729 u32 max_sleep = 0;
730 int i;
b481de9c 731 u8 period = 0;
3dae0c42 732 bool skip;
b481de9c
ZY
733
734 if (mode > IWL_POWER_INDEX_5) {
735 IWL_DEBUG_POWER("Error invalid power mode \n");
3dae0c42 736 return -EINVAL;
b481de9c 737 }
3dae0c42 738 pow_data = &priv->power_data;
b481de9c 739
3dae0c42 740 if (pow_data->dtim_period < 10)
b481de9c
ZY
741 range = &pow_data->pwr_range_0[0];
742 else
743 range = &pow_data->pwr_range_1[1];
744
bb8c093b 745 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
b481de9c 746
b481de9c
ZY
747
748 if (period == 0) {
749 period = 1;
3dae0c42
WT
750 skip = false;
751 } else {
752 skip = !!range[mode].no_dtim;
b481de9c
ZY
753 }
754
3dae0c42 755 if (skip) {
b481de9c
ZY
756 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
757 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
758 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
3dae0c42
WT
759 } else {
760 max_sleep = period;
761 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
b481de9c
ZY
762 }
763
3dae0c42 764 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
b481de9c
ZY
765 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
766 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
b481de9c
ZY
767
768 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
769 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
770 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
771 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
772 le32_to_cpu(cmd->sleep_interval[0]),
773 le32_to_cpu(cmd->sleep_interval[1]),
774 le32_to_cpu(cmd->sleep_interval[2]),
775 le32_to_cpu(cmd->sleep_interval[3]),
776 le32_to_cpu(cmd->sleep_interval[4]));
777
3dae0c42 778 return 0;
b481de9c
ZY
779}
780
4a8a4322 781static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
b481de9c 782{
9a62f73b 783 u32 uninitialized_var(final_mode);
b481de9c 784 int rc;
600c0e11 785 struct iwl_powertable_cmd cmd;
b481de9c
ZY
786
787 /* If on battery, set to 3,
01ebd063 788 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY
789 * else user level */
790 switch (mode) {
1125eff3 791 case IWL39_POWER_BATTERY:
b481de9c
ZY
792 final_mode = IWL_POWER_INDEX_3;
793 break;
1125eff3 794 case IWL39_POWER_AC:
b481de9c
ZY
795 final_mode = IWL_POWER_MODE_CAM;
796 break;
797 default:
798 final_mode = mode;
799 break;
800 }
801
bb8c093b 802 iwl3945_update_power_cmd(priv, &cmd, final_mode);
b481de9c 803
600c0e11 804 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
518099a8
SO
805 rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
806 sizeof(struct iwl3945_powertable_cmd), &cmd);
b481de9c
ZY
807
808 if (final_mode == IWL_POWER_MODE_CAM)
809 clear_bit(STATUS_POWER_PMI, &priv->status);
810 else
811 set_bit(STATUS_POWER_PMI, &priv->status);
812
813 return rc;
814}
815
b481de9c
ZY
816#define MAX_UCODE_BEACON_INTERVAL 1024
817#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
818
bb8c093b 819static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
820{
821 u16 new_val = 0;
822 u16 beacon_factor = 0;
823
824 beacon_factor =
825 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
826 / MAX_UCODE_BEACON_INTERVAL;
827 new_val = beacon_val / beacon_factor;
828
829 return cpu_to_le16(new_val);
830}
831
4a8a4322 832static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
833{
834 u64 interval_tm_unit;
835 u64 tsf, result;
836 unsigned long flags;
837 struct ieee80211_conf *conf = NULL;
838 u16 beacon_int = 0;
839
840 conf = ieee80211_get_hw_conf(priv->hw);
841
842 spin_lock_irqsave(&priv->lock, flags);
28afaf91 843 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
ZY
844 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
845
28afaf91 846 tsf = priv->timestamp;
b481de9c
ZY
847
848 beacon_int = priv->beacon_int;
849 spin_unlock_irqrestore(&priv->lock, flags);
850
05c914fe 851 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
ZY
852 if (beacon_int == 0) {
853 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
854 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
855 } else {
856 priv->rxon_timing.beacon_interval =
857 cpu_to_le16(beacon_int);
858 priv->rxon_timing.beacon_interval =
bb8c093b 859 iwl3945_adjust_beacon_interval(
b481de9c
ZY
860 le16_to_cpu(priv->rxon_timing.beacon_interval));
861 }
862
863 priv->rxon_timing.atim_window = 0;
864 } else {
865 priv->rxon_timing.beacon_interval =
bb8c093b 866 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
867 /* TODO: we need to get atim_window from upper stack
868 * for now we set to 0 */
869 priv->rxon_timing.atim_window = 0;
870 }
871
872 interval_tm_unit =
873 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
874 result = do_div(tsf, interval_tm_unit);
875 priv->rxon_timing.beacon_init_val =
876 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
877
878 IWL_DEBUG_ASSOC
879 ("beacon interval %d beacon timer %d beacon tim %d\n",
880 le16_to_cpu(priv->rxon_timing.beacon_interval),
881 le32_to_cpu(priv->rxon_timing.beacon_init_val),
882 le16_to_cpu(priv->rxon_timing.atim_window));
883}
884
4a8a4322 885static int iwl3945_scan_initiate(struct iwl_priv *priv)
b481de9c 886{
775a6e27 887 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
888 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
889 return -EIO;
890 }
891
892 if (test_bit(STATUS_SCANNING, &priv->status)) {
893 IWL_DEBUG_SCAN("Scan already in progress.\n");
894 return -EAGAIN;
895 }
896
897 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
898 IWL_DEBUG_SCAN("Scan request while abort pending. "
899 "Queuing.\n");
900 return -EAGAIN;
901 }
902
903 IWL_DEBUG_INFO("Starting scan...\n");
66b5004d
RR
904 if (priv->cfg->sku & IWL_SKU_G)
905 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
906 if (priv->cfg->sku & IWL_SKU_A)
907 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
b481de9c
ZY
908 set_bit(STATUS_SCANNING, &priv->status);
909 priv->scan_start = jiffies;
910 priv->scan_pass_start = priv->scan_start;
911
912 queue_work(priv->workqueue, &priv->request_scan);
913
914 return 0;
915}
916
4a8a4322 917static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
b481de9c 918{
05c914fe 919 if (mode == NL80211_IFTYPE_ADHOC) {
d20b3c65 920 const struct iwl_channel_info *ch_info;
b481de9c 921
e6148917 922 ch_info = iwl_get_channel_info(priv,
8318d78a 923 priv->band,
8ccde88a 924 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
925
926 if (!ch_info || !is_channel_ibss(ch_info)) {
15b1687c 927 IWL_ERR(priv, "channel %d not IBSS channel\n",
8ccde88a 928 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
929 return -EINVAL;
930 }
931 }
932
8ccde88a 933 iwl_connection_init_rx_config(priv, mode);
b481de9c 934
bb8c093b 935 iwl3945_clear_stations_table(priv);
b481de9c 936
a96a27f9 937 /* don't commit rxon if rf-kill is on*/
775a6e27 938 if (!iwl_is_ready_rf(priv))
fde3571f
MA
939 return -EAGAIN;
940
941 cancel_delayed_work(&priv->scan_check);
af0053d6 942 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 943 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
fde3571f
MA
944 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
945 return -EAGAIN;
946 }
947
bb8c093b 948 iwl3945_commit_rxon(priv);
b481de9c
ZY
949
950 return 0;
951}
952
4a8a4322 953static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 954 struct ieee80211_tx_info *info,
c2d79b48 955 struct iwl_cmd *cmd,
b481de9c
ZY
956 struct sk_buff *skb_frag,
957 int last_frag)
958{
e52119c5 959 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 960 struct iwl3945_hw_key *keyinfo =
f2c7e521 961 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
b481de9c
ZY
962
963 switch (keyinfo->alg) {
964 case ALG_CCMP:
e52119c5
WT
965 tx->sec_ctl = TX_CMD_SEC_CCM;
966 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
a96a27f9 967 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
b481de9c
ZY
968 break;
969
970 case ALG_TKIP:
971#if 0
e52119c5 972 tx->sec_ctl = TX_CMD_SEC_TKIP;
b481de9c
ZY
973
974 if (last_frag)
e52119c5 975 memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
b481de9c
ZY
976 8);
977 else
e52119c5 978 memset(tx->tkip_mic.byte, 0, 8);
b481de9c
ZY
979#endif
980 break;
981
982 case ALG_WEP:
e52119c5 983 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 984 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
985
986 if (keyinfo->keylen == 13)
e52119c5 987 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 988
e52119c5 989 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c
ZY
990
991 IWL_DEBUG_TX("Configuring packet for WEP encryption "
e039fa4a 992 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
993 break;
994
b481de9c 995 default:
978785a3 996 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
997 break;
998 }
999}
1000
1001/*
1002 * handle build REPLY_TX command notification.
1003 */
4a8a4322 1004static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 1005 struct iwl_cmd *cmd,
e039fa4a 1006 struct ieee80211_tx_info *info,
e52119c5 1007 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 1008{
e52119c5
WT
1009 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1010 __le32 tx_flags = tx->tx_flags;
fd7c8a40 1011 __le16 fc = hdr->frame_control;
e6a9854b 1012 u8 rc_flags = info->control.rates[0].flags;
b481de9c 1013
e52119c5 1014 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 1015 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 1016 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 1017 if (ieee80211_is_mgmt(fc))
b481de9c 1018 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 1019 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
1020 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1021 tx_flags |= TX_CMD_FLG_TSF_MSK;
1022 } else {
1023 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1024 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1025 }
1026
e52119c5 1027 tx->sta_id = std_id;
8b7b1e05 1028 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
1029 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1030
fd7c8a40
HH
1031 if (ieee80211_is_data_qos(fc)) {
1032 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 1033 tx->tid_tspec = qc[0] & 0xf;
b481de9c 1034 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 1035 } else {
b481de9c 1036 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 1037 }
b481de9c 1038
e6a9854b 1039 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
1040 tx_flags |= TX_CMD_FLG_RTS_MSK;
1041 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 1042 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
1043 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1044 tx_flags |= TX_CMD_FLG_CTS_MSK;
1045 }
1046
1047 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
1048 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
1049
1050 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
1051 if (ieee80211_is_mgmt(fc)) {
1052 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 1053 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 1054 else
e52119c5 1055 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 1056 } else {
e52119c5 1057 tx->timeout.pm_frame_timeout = 0;
ab53d8af
MA
1058#ifdef CONFIG_IWL3945_LEDS
1059 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
1060#endif
1061 }
b481de9c 1062
e52119c5
WT
1063 tx->driver_txop = 0;
1064 tx->tx_flags = tx_flags;
1065 tx->next_frame_len = 0;
b481de9c
ZY
1066}
1067
6440adb5
BC
1068/**
1069 * iwl3945_get_sta_id - Find station's index within station table
1070 */
4a8a4322 1071static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
b481de9c
ZY
1072{
1073 int sta_id;
1074 u16 fc = le16_to_cpu(hdr->frame_control);
1075
6440adb5 1076 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
1077 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
1078 is_multicast_ether_addr(hdr->addr1))
3832ec9d 1079 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1080
1081 switch (priv->iw_mode) {
1082
6440adb5
BC
1083 /* If we are a client station in a BSS network, use the special
1084 * AP station entry (that's the only station we communicate with) */
05c914fe 1085 case NL80211_IFTYPE_STATION:
b481de9c
ZY
1086 return IWL_AP_ID;
1087
1088 /* If we are an AP, then find the station, or use BCAST */
05c914fe 1089 case NL80211_IFTYPE_AP:
bb8c093b 1090 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
1091 if (sta_id != IWL_INVALID_STATION)
1092 return sta_id;
3832ec9d 1093 return priv->hw_params.bcast_sta_id;
b481de9c 1094
6440adb5
BC
1095 /* If this frame is going out to an IBSS network, find the station,
1096 * or create a new station table entry */
05c914fe 1097 case NL80211_IFTYPE_ADHOC: {
6440adb5 1098 /* Create new station table entry */
bb8c093b 1099 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
1100 if (sta_id != IWL_INVALID_STATION)
1101 return sta_id;
1102
bb8c093b 1103 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
1104
1105 if (sta_id != IWL_INVALID_STATION)
1106 return sta_id;
1107
e174961c 1108 IWL_DEBUG_DROP("Station %pM not in station map. "
b481de9c 1109 "Defaulting to broadcast...\n",
e174961c 1110 hdr->addr1);
40b8ec0b 1111 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
3832ec9d 1112 return priv->hw_params.bcast_sta_id;
0795af57 1113 }
914233d6
SG
1114 /* If we are in monitor mode, use BCAST. This is required for
1115 * packet injection. */
05c914fe 1116 case NL80211_IFTYPE_MONITOR:
3832ec9d 1117 return priv->hw_params.bcast_sta_id;
914233d6 1118
b481de9c 1119 default:
39aadf8c
WT
1120 IWL_WARN(priv, "Unknown mode of operation: %d\n",
1121 priv->iw_mode);
3832ec9d 1122 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1123 }
1124}
1125
1126/*
1127 * start REPLY_TX command process
1128 */
4a8a4322 1129static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
1130{
1131 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 1132 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 1133 struct iwl3945_tx_cmd *tx;
188cf6c7 1134 struct iwl_tx_queue *txq = NULL;
d20b3c65 1135 struct iwl_queue *q = NULL;
e52119c5 1136 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
1137 dma_addr_t phys_addr;
1138 dma_addr_t txcmd_phys;
e52119c5 1139 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
1140 u16 len, idx, len_org, hdr_len;
1141 u8 id;
1142 u8 unicast;
b481de9c 1143 u8 sta_id;
54dbb525 1144 u8 tid = 0;
b481de9c 1145 u16 seq_number = 0;
fd7c8a40 1146 __le16 fc;
b481de9c 1147 u8 wait_write_ptr = 0;
54dbb525 1148 u8 *qc = NULL;
b481de9c
ZY
1149 unsigned long flags;
1150 int rc;
1151
1152 spin_lock_irqsave(&priv->lock, flags);
775a6e27 1153 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
1154 IWL_DEBUG_DROP("Dropping - RF KILL\n");
1155 goto drop_unlock;
1156 }
1157
e039fa4a 1158 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 1159 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
1160 goto drop_unlock;
1161 }
1162
1163 unicast = !is_multicast_ether_addr(hdr->addr1);
1164 id = 0;
1165
fd7c8a40 1166 fc = hdr->frame_control;
b481de9c 1167
d08853a3 1168#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1169 if (ieee80211_is_auth(fc))
1170 IWL_DEBUG_TX("Sending AUTH frame\n");
fd7c8a40 1171 else if (ieee80211_is_assoc_req(fc))
b481de9c 1172 IWL_DEBUG_TX("Sending ASSOC frame\n");
fd7c8a40 1173 else if (ieee80211_is_reassoc_req(fc))
b481de9c
ZY
1174 IWL_DEBUG_TX("Sending REASSOC frame\n");
1175#endif
1176
7878a5a4 1177 /* drop all data frame if we are not associated */
914233d6 1178 if (ieee80211_is_data(fc) &&
05c914fe 1179 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 1180 (!iwl_is_associated(priv) ||
05c914fe 1181 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
8ccde88a 1182 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY
1183 goto drop_unlock;
1184 }
1185
1186 spin_unlock_irqrestore(&priv->lock, flags);
1187
7294ec95 1188 hdr_len = ieee80211_hdrlen(fc);
6440adb5
BC
1189
1190 /* Find (or create) index into station table for destination station */
bb8c093b 1191 sta_id = iwl3945_get_sta_id(priv, hdr);
b481de9c 1192 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB
1193 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
1194 hdr->addr1);
b481de9c
ZY
1195 goto drop;
1196 }
1197
1198 IWL_DEBUG_RATE("station Id %d\n", sta_id);
1199
fd7c8a40
HH
1200 if (ieee80211_is_data_qos(fc)) {
1201 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 1202 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 1203 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
1204 IEEE80211_SCTL_SEQ;
1205 hdr->seq_ctrl = cpu_to_le16(seq_number) |
1206 (hdr->seq_ctrl &
1207 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
1208 seq_number += 0x10;
1209 }
6440adb5
BC
1210
1211 /* Descriptor for chosen Tx queue */
188cf6c7 1212 txq = &priv->txq[txq_id];
b481de9c
ZY
1213 q = &txq->q;
1214
1215 spin_lock_irqsave(&priv->lock, flags);
1216
fc4b6853 1217 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 1218
6440adb5 1219 /* Set up driver data for this TFD */
dbb6654c 1220 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 1221 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
BC
1222
1223 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 1224 out_cmd = txq->cmd[idx];
e52119c5 1225 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 1226 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 1227 memset(tx, 0, sizeof(*tx));
6440adb5
BC
1228
1229 /*
1230 * Set up the Tx-command (not MAC!) header.
1231 * Store the chosen Tx queue and TFD index within the sequence field;
1232 * after Tx, uCode's Tx response will return this value so driver can
1233 * locate the frame within the tx queue and do post-tx processing.
1234 */
b481de9c
ZY
1235 out_cmd->hdr.cmd = REPLY_TX;
1236 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 1237 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC
1238
1239 /* Copy MAC header from skb into command buffer */
e52119c5 1240 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 1241
6440adb5
BC
1242 /*
1243 * Use the first empty entry in this queue's command buffer array
1244 * to contain the Tx command and MAC header concatenated together
1245 * (payload data will be in another buffer).
1246 * Size of this varies, due to varying MAC header length.
1247 * If end is not dword aligned, we'll have 2 extra bytes at the end
1248 * of the MAC header (device reads on dword boundaries).
1249 * We'll tell device about this padding later.
1250 */
3832ec9d 1251 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 1252 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
1253
1254 len_org = len;
1255 len = (len + 3) & ~3;
1256
1257 if (len_org != len)
1258 len_org = 1;
1259 else
1260 len_org = 0;
1261
6440adb5
BC
1262 /* Physical address of this Tx command's header (not MAC header!),
1263 * within command buffer array. */
188cf6c7
SO
1264 txcmd_phys = pci_map_single(priv->pci_dev,
1265 out_cmd, sizeof(struct iwl_cmd),
1266 PCI_DMA_TODEVICE);
1267 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
1268 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
1269 /* Add buffer containing Tx command and MAC(!) header to TFD's
1270 * first entry */
1271 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 1272
6440adb5
BC
1273 /* Add buffer containing Tx command and MAC(!) header to TFD's
1274 * first entry */
7aaa1d79
SO
1275 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1276 txcmd_phys, len, 1, 0);
b481de9c 1277
d0f09804 1278 if (info->control.hw_key)
e039fa4a 1279 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
b481de9c 1280
6440adb5
BC
1281 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1282 * if any (802.11 null frames have no payload). */
b481de9c
ZY
1283 len = skb->len - hdr_len;
1284 if (len) {
1285 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
1286 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
1287 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1288 phys_addr, len,
1289 0, U32_PAD(len));
b481de9c
ZY
1290 }
1291
6440adb5 1292 /* Total # bytes to be transmitted */
b481de9c 1293 len = (u16)skb->len;
e52119c5 1294 tx->len = cpu_to_le16(len);
b481de9c
ZY
1295
1296 /* TODO need this for burst mode later on */
e52119c5 1297 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
1298
1299 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 1300 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 1301
e52119c5
WT
1302 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
1303 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 1304
8b7b1e05 1305 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 1306 txq->need_update = 1;
3ac7f146 1307 if (qc)
f2c7e521 1308 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
1309 } else {
1310 wait_write_ptr = 1;
1311 txq->need_update = 0;
1312 }
1313
e52119c5 1314 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 1315
e52119c5 1316 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 1317 ieee80211_hdrlen(fc));
b481de9c 1318
6440adb5 1319 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 1320 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 1321 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1322 spin_unlock_irqrestore(&priv->lock, flags);
1323
1324 if (rc)
1325 return rc;
1326
d20b3c65 1327 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
1328 && priv->mac80211_registered) {
1329 if (wait_write_ptr) {
1330 spin_lock_irqsave(&priv->lock, flags);
1331 txq->need_update = 1;
4f3602c8 1332 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1333 spin_unlock_irqrestore(&priv->lock, flags);
1334 }
1335
e2530083 1336 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
b481de9c
ZY
1337 }
1338
1339 return 0;
1340
1341drop_unlock:
1342 spin_unlock_irqrestore(&priv->lock, flags);
1343drop:
1344 return -1;
1345}
1346
4a8a4322 1347static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY
1348{
1349 unsigned long flags;
1350
1351 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
1352 return;
1353
1354 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
1355 disable_radio ? "OFF" : "ON");
1356
1357 if (disable_radio) {
af0053d6 1358 iwl_scan_cancel(priv);
b481de9c 1359 /* FIXME: This is a workaround for AP */
05c914fe 1360 if (priv->iw_mode != NL80211_IFTYPE_AP) {
b481de9c 1361 spin_lock_irqsave(&priv->lock, flags);
5d49f498 1362 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1363 CSR_UCODE_SW_BIT_RFKILL);
1364 spin_unlock_irqrestore(&priv->lock, flags);
c496294e 1365 iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY
1366 set_bit(STATUS_RF_KILL_SW, &priv->status);
1367 }
1368 return;
1369 }
1370
1371 spin_lock_irqsave(&priv->lock, flags);
5d49f498 1372 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
1373
1374 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1375 spin_unlock_irqrestore(&priv->lock, flags);
1376
1377 /* wake up ucode */
1378 msleep(10);
1379
1380 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
1381 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1382 if (!iwl_grab_nic_access(priv))
1383 iwl_release_nic_access(priv);
b481de9c
ZY
1384 spin_unlock_irqrestore(&priv->lock, flags);
1385
1386 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
1387 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
1388 "disabled by HW switch\n");
1389 return;
1390 }
1391
808e72a0
ZY
1392 if (priv->is_open)
1393 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1394 return;
1395}
1396
c8b0e6e1 1397#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
1398
1399#include "iwl-spectrum.h"
1400
1401#define BEACON_TIME_MASK_LOW 0x00FFFFFF
1402#define BEACON_TIME_MASK_HIGH 0xFF000000
1403#define TIME_UNIT 1024
1404
1405/*
1406 * extended beacon time format
1407 * time in usec will be changed into a 32-bit value in 8:24 format
1408 * the high 1 byte is the beacon counts
1409 * the lower 3 bytes is the time in usec within one beacon interval
1410 */
1411
bb8c093b 1412static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
1413{
1414 u32 quot;
1415 u32 rem;
1416 u32 interval = beacon_interval * 1024;
1417
1418 if (!interval || !usec)
1419 return 0;
1420
1421 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
1422 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
1423
1424 return (quot << 24) + rem;
1425}
1426
1427/* base is usually what we get from ucode with each received frame,
1428 * the same as HW timer counter counting down
1429 */
1430
bb8c093b 1431static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
1432{
1433 u32 base_low = base & BEACON_TIME_MASK_LOW;
1434 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
1435 u32 interval = beacon_interval * TIME_UNIT;
1436 u32 res = (base & BEACON_TIME_MASK_HIGH) +
1437 (addon & BEACON_TIME_MASK_HIGH);
1438
1439 if (base_low > addon_low)
1440 res += base_low - addon_low;
1441 else if (base_low < addon_low) {
1442 res += interval + base_low - addon_low;
1443 res += (1 << 24);
1444 } else
1445 res += (1 << 24);
1446
1447 return cpu_to_le32(res);
1448}
1449
4a8a4322 1450static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
1451 struct ieee80211_measurement_params *params,
1452 u8 type)
1453{
600c0e11 1454 struct iwl_spectrum_cmd spectrum;
3d24a9f7 1455 struct iwl_rx_packet *res;
c2d79b48 1456 struct iwl_host_cmd cmd = {
b481de9c
ZY
1457 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
1458 .data = (void *)&spectrum,
1459 .meta.flags = CMD_WANT_SKB,
1460 };
1461 u32 add_time = le64_to_cpu(params->start_time);
1462 int rc;
1463 int spectrum_resp_status;
1464 int duration = le16_to_cpu(params->duration);
1465
8ccde88a 1466 if (iwl_is_associated(priv))
b481de9c 1467 add_time =
bb8c093b 1468 iwl3945_usecs_to_beacons(
b481de9c
ZY
1469 le64_to_cpu(params->start_time) - priv->last_tsf,
1470 le16_to_cpu(priv->rxon_timing.beacon_interval));
1471
1472 memset(&spectrum, 0, sizeof(spectrum));
1473
1474 spectrum.channel_count = cpu_to_le16(1);
1475 spectrum.flags =
1476 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
1477 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
1478 cmd.len = sizeof(spectrum);
1479 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
1480
8ccde88a 1481 if (iwl_is_associated(priv))
b481de9c 1482 spectrum.start_time =
bb8c093b 1483 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
1484 add_time,
1485 le16_to_cpu(priv->rxon_timing.beacon_interval));
1486 else
1487 spectrum.start_time = 0;
1488
1489 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
1490 spectrum.channels[0].channel = params->channel;
1491 spectrum.channels[0].type = type;
8ccde88a 1492 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
1493 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1494 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1495
518099a8 1496 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1497 if (rc)
1498 return rc;
1499
3d24a9f7 1500 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1501 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1502 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1503 rc = -EIO;
1504 }
1505
1506 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1507 switch (spectrum_resp_status) {
1508 case 0: /* Command will be handled */
1509 if (res->u.spectrum.id != 0xff) {
bc434dd2
IS
1510 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
1511 res->u.spectrum.id);
b481de9c
ZY
1512 priv->measurement_status &= ~MEASUREMENT_READY;
1513 }
1514 priv->measurement_status |= MEASUREMENT_ACTIVE;
1515 rc = 0;
1516 break;
1517
1518 case 1: /* Command will not be handled */
1519 rc = -EAGAIN;
1520 break;
1521 }
1522
1523 dev_kfree_skb_any(cmd.meta.u.skb);
1524
1525 return rc;
1526}
1527#endif
1528
4a8a4322 1529static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1530 struct iwl_rx_mem_buffer *rxb)
b481de9c 1531{
3d24a9f7
TW
1532 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1533 struct iwl_alive_resp *palive;
b481de9c
ZY
1534 struct delayed_work *pwork;
1535
1536 palive = &pkt->u.alive_frame;
1537
1538 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1539 "0x%01X 0x%01X\n",
1540 palive->is_valid, palive->ver_type,
1541 palive->ver_subtype);
1542
1543 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1544 IWL_DEBUG_INFO("Initialization Alive received.\n");
3d24a9f7
TW
1545 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1546 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1547 pwork = &priv->init_alive_start;
1548 } else {
1549 IWL_DEBUG_INFO("Runtime Alive received.\n");
1550 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1551 sizeof(struct iwl_alive_resp));
b481de9c 1552 pwork = &priv->alive_start;
bb8c093b 1553 iwl3945_disable_events(priv);
b481de9c
ZY
1554 }
1555
1556 /* We delay the ALIVE response by 5ms to
1557 * give the HW RF Kill time to activate... */
1558 if (palive->is_valid == UCODE_VALID_OK)
1559 queue_delayed_work(priv->workqueue, pwork,
1560 msecs_to_jiffies(5));
1561 else
39aadf8c 1562 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1563}
1564
4a8a4322 1565static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1566 struct iwl_rx_mem_buffer *rxb)
b481de9c 1567{
c7e035a9 1568#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1569 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1570#endif
b481de9c
ZY
1571
1572 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
1573 return;
1574}
1575
4a8a4322 1576static void iwl3945_rx_reply_error(struct iwl_priv *priv,
6100b588 1577 struct iwl_rx_mem_buffer *rxb)
b481de9c 1578{
3d24a9f7 1579 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c 1580
15b1687c 1581 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
b481de9c
ZY
1582 "seq 0x%04X ser 0x%08X\n",
1583 le32_to_cpu(pkt->u.err_resp.error_type),
1584 get_cmd_string(pkt->u.err_resp.cmd_id),
1585 pkt->u.err_resp.cmd_id,
1586 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1587 le32_to_cpu(pkt->u.err_resp.error_info));
1588}
1589
4a8a4322 1590static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
6100b588 1591 struct iwl_rx_mem_buffer *rxb)
b481de9c 1592{
c8b0e6e1 1593#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3d24a9f7 1594 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
600c0e11 1595 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1596
1597 if (!report->state) {
1598 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
1599 "Spectrum Measure Notification: Start\n");
1600 return;
1601 }
1602
1603 memcpy(&priv->measure_report, report, sizeof(*report));
1604 priv->measurement_status |= MEASUREMENT_READY;
1605#endif
1606}
1607
4a8a4322 1608static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
6100b588 1609 struct iwl_rx_mem_buffer *rxb)
b481de9c 1610{
d08853a3 1611#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1612 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
600c0e11 1613 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1614 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1615 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1616#endif
1617}
1618
4a8a4322 1619static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
6100b588 1620 struct iwl_rx_mem_buffer *rxb)
b481de9c 1621{
3d24a9f7 1622 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1623 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1624 "notification for %s:\n",
1625 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
40b8ec0b
SO
1626 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
1627 le32_to_cpu(pkt->len));
b481de9c
ZY
1628}
1629
bb8c093b 1630static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1631{
4a8a4322
AK
1632 struct iwl_priv *priv =
1633 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1634 struct sk_buff *beacon;
1635
1636 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1637 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1638
1639 if (!beacon) {
15b1687c 1640 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1641 return;
1642 }
1643
1644 mutex_lock(&priv->mutex);
1645 /* new beacon skb is allocated every time; dispose previous.*/
1646 if (priv->ibss_beacon)
1647 dev_kfree_skb(priv->ibss_beacon);
1648
1649 priv->ibss_beacon = beacon;
1650 mutex_unlock(&priv->mutex);
1651
bb8c093b 1652 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1653}
1654
4a8a4322 1655static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1656 struct iwl_rx_mem_buffer *rxb)
b481de9c 1657{
d08853a3 1658#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1659 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1660 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1661 u8 rate = beacon->beacon_notify_hdr.rate;
1662
1663 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1664 "tsf %d %d rate %d\n",
1665 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1666 beacon->beacon_notify_hdr.failure_frame,
1667 le32_to_cpu(beacon->ibss_mgr_status),
1668 le32_to_cpu(beacon->high_tsf),
1669 le32_to_cpu(beacon->low_tsf), rate);
1670#endif
1671
05c914fe 1672 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1673 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1674 queue_work(priv->workqueue, &priv->beacon_update);
1675}
1676
1677/* Service response to REPLY_SCAN_CMD (0x80) */
4a8a4322 1678static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
6100b588 1679 struct iwl_rx_mem_buffer *rxb)
b481de9c 1680{
d08853a3 1681#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1682 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253
TW
1683 struct iwl_scanreq_notification *notif =
1684 (struct iwl_scanreq_notification *)pkt->u.raw;
b481de9c
ZY
1685
1686 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
1687#endif
1688}
1689
1690/* Service SCAN_START_NOTIFICATION (0x82) */
4a8a4322 1691static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
6100b588 1692 struct iwl_rx_mem_buffer *rxb)
b481de9c 1693{
3d24a9f7 1694 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253
TW
1695 struct iwl_scanstart_notification *notif =
1696 (struct iwl_scanstart_notification *)pkt->u.raw;
b481de9c
ZY
1697 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1698 IWL_DEBUG_SCAN("Scan start: "
1699 "%d [802.11%s] "
1700 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
1701 notif->channel,
1702 notif->band ? "bg" : "a",
1703 notif->tsf_high,
1704 notif->tsf_low, notif->status, notif->beacon_timer);
1705}
1706
1707/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
4a8a4322 1708static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
6100b588 1709 struct iwl_rx_mem_buffer *rxb)
b481de9c 1710{
c7e035a9 1711#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1712 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253
TW
1713 struct iwl_scanresults_notification *notif =
1714 (struct iwl_scanresults_notification *)pkt->u.raw;
c7e035a9 1715#endif
b481de9c
ZY
1716
1717 IWL_DEBUG_SCAN("Scan ch.res: "
1718 "%d [802.11%s] "
1719 "(TSF: 0x%08X:%08X) - %d "
1720 "elapsed=%lu usec (%dms since last)\n",
1721 notif->channel,
1722 notif->band ? "bg" : "a",
1723 le32_to_cpu(notif->tsf_high),
1724 le32_to_cpu(notif->tsf_low),
1725 le32_to_cpu(notif->statistics[0]),
1726 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
1727 jiffies_to_msecs(elapsed_jiffies
1728 (priv->last_scan_jiffies, jiffies)));
1729
1730 priv->last_scan_jiffies = jiffies;
7878a5a4 1731 priv->next_scan_jiffies = 0;
b481de9c
ZY
1732}
1733
1734/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
4a8a4322 1735static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
6100b588 1736 struct iwl_rx_mem_buffer *rxb)
b481de9c 1737{
c7e035a9 1738#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1739 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253 1740 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
c7e035a9 1741#endif
b481de9c
ZY
1742
1743 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1744 scan_notif->scanned_channels,
1745 scan_notif->tsf_low,
1746 scan_notif->tsf_high, scan_notif->status);
1747
1748 /* The HW is no longer scanning */
1749 clear_bit(STATUS_SCAN_HW, &priv->status);
1750
1751 /* The scan completion notification came in, so kill that timer... */
1752 cancel_delayed_work(&priv->scan_check);
1753
1754 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
66b5004d
RR
1755 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
1756 "2.4" : "5.2",
b481de9c
ZY
1757 jiffies_to_msecs(elapsed_jiffies
1758 (priv->scan_pass_start, jiffies)));
1759
66b5004d
RR
1760 /* Remove this scanned band from the list of pending
1761 * bands to scan, band G precedes A in order of scanning
1762 * as seen in iwl3945_bg_request_scan */
1763 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
1764 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
1765 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
1766 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
b481de9c
ZY
1767
1768 /* If a request to abort was given, or the scan did not succeed
1769 * then we reset the scan state machine and terminate,
1770 * re-queuing another scan if one has been requested */
1771 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1772 IWL_DEBUG_INFO("Aborted scan completed.\n");
1773 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1774 } else {
1775 /* If there are more bands on this scan pass reschedule */
1776 if (priv->scan_bands > 0)
1777 goto reschedule;
1778 }
1779
1780 priv->last_scan_jiffies = jiffies;
7878a5a4 1781 priv->next_scan_jiffies = 0;
b481de9c
ZY
1782 IWL_DEBUG_INFO("Setting scan to off\n");
1783
1784 clear_bit(STATUS_SCANNING, &priv->status);
1785
1786 IWL_DEBUG_INFO("Scan took %dms\n",
1787 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
1788
1789 queue_work(priv->workqueue, &priv->scan_completed);
1790
1791 return;
1792
1793reschedule:
1794 priv->scan_pass_start = jiffies;
1795 queue_work(priv->workqueue, &priv->request_scan);
1796}
1797
1798/* Handle notification from uCode that card's power state is changing
1799 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1800static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1801 struct iwl_rx_mem_buffer *rxb)
b481de9c 1802{
3d24a9f7 1803 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1804 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1805 unsigned long status = priv->status;
1806
1807 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1808 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1809 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1810
5d49f498 1811 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1812 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1813
1814 if (flags & HW_CARD_DISABLED)
1815 set_bit(STATUS_RF_KILL_HW, &priv->status);
1816 else
1817 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1818
1819
1820 if (flags & SW_CARD_DISABLED)
1821 set_bit(STATUS_RF_KILL_SW, &priv->status);
1822 else
1823 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1824
af0053d6 1825 iwl_scan_cancel(priv);
b481de9c
ZY
1826
1827 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1828 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1829 (test_bit(STATUS_RF_KILL_SW, &status) !=
1830 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1831 queue_work(priv->workqueue, &priv->rf_kill);
1832 else
1833 wake_up_interruptible(&priv->wait_command_queue);
1834}
1835
1836/**
bb8c093b 1837 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1838 *
1839 * Setup the RX handlers for each of the reply types sent from the uCode
1840 * to the host.
1841 *
1842 * This function chains into the hardware specific files for them to setup
1843 * any hardware specific handlers as well.
1844 */
4a8a4322 1845static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1846{
bb8c093b
CH
1847 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1848 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
1849 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
8ccde88a 1850 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
b481de9c 1851 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1852 iwl3945_rx_spectrum_measure_notif;
1853 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
b481de9c 1854 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1855 iwl3945_rx_pm_debug_statistics_notif;
1856 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1857
9fbab516
BC
1858 /*
1859 * The same handler is used for both the REPLY to a discrete
1860 * statistics request from the host as well as for the periodic
1861 * statistics notifications (after received beacons) from the uCode.
b481de9c 1862 */
bb8c093b
CH
1863 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1864 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1865
bb8c093b
CH
1866 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
1867 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
b481de9c 1868 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 1869 iwl3945_rx_scan_results_notif;
b481de9c 1870 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH
1871 iwl3945_rx_scan_complete_notif;
1872 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1873
9fbab516 1874 /* Set up hardware specific Rx handlers */
bb8c093b 1875 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1876}
1877
91c066f2
TW
1878/**
1879 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
1880 * When FW advances 'R' index, all entries between old and new 'R' index
1881 * need to be reclaimed.
1882 */
4a8a4322 1883static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
91c066f2
TW
1884 int txq_id, int index)
1885{
188cf6c7 1886 struct iwl_tx_queue *txq = &priv->txq[txq_id];
d20b3c65 1887 struct iwl_queue *q = &txq->q;
91c066f2
TW
1888 int nfreed = 0;
1889
625a381a 1890 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
15b1687c 1891 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
91c066f2
TW
1892 "is out of range [0-%d] %d %d.\n", txq_id,
1893 index, q->n_bd, q->write_ptr, q->read_ptr);
1894 return;
1895 }
1896
1897 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
1898 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1899 if (nfreed > 1) {
15b1687c 1900 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
91c066f2
TW
1901 q->write_ptr, q->read_ptr);
1902 queue_work(priv->workqueue, &priv->restart);
1903 break;
1904 }
1905 nfreed++;
1906 }
1907}
1908
1909
b481de9c 1910/**
bb8c093b 1911 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
1912 * @rxb: Rx buffer to reclaim
1913 *
1914 * If an Rx buffer has an async callback associated with it the callback
1915 * will be executed. The attached skb (if present) will only be freed
1916 * if the callback returns 1
1917 */
4a8a4322 1918static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
6100b588 1919 struct iwl_rx_mem_buffer *rxb)
b481de9c 1920{
3d24a9f7 1921 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1922 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1923 int txq_id = SEQ_TO_QUEUE(sequence);
1924 int index = SEQ_TO_INDEX(sequence);
600c0e11 1925 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
b481de9c 1926 int cmd_index;
c2d79b48 1927 struct iwl_cmd *cmd;
b481de9c 1928
638d0eb9
CR
1929 if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
1930 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
1931 txq_id, sequence,
1932 priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
1933 priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
1934 iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
1935 return;
1936 }
b481de9c 1937
188cf6c7
SO
1938 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
1939 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
b481de9c
ZY
1940
1941 /* Input error checking is done when commands are added to queue. */
1942 if (cmd->meta.flags & CMD_WANT_SKB) {
1943 cmd->meta.source->u.skb = rxb->skb;
1944 rxb->skb = NULL;
1945 } else if (cmd->meta.u.callback &&
1946 !cmd->meta.u.callback(priv, cmd, rxb->skb))
1947 rxb->skb = NULL;
1948
91c066f2 1949 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
1950
1951 if (!(cmd->meta.flags & CMD_ASYNC)) {
1952 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1953 wake_up_interruptible(&priv->wait_command_queue);
1954 }
1955}
1956
1957/************************** RX-FUNCTIONS ****************************/
1958/*
1959 * Rx theory of operation
1960 *
1961 * The host allocates 32 DMA target addresses and passes the host address
1962 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1963 * 0 to 31
1964 *
1965 * Rx Queue Indexes
1966 * The host/firmware share two index registers for managing the Rx buffers.
1967 *
1968 * The READ index maps to the first position that the firmware may be writing
1969 * to -- the driver can read up to (but not including) this position and get
1970 * good data.
1971 * The READ index is managed by the firmware once the card is enabled.
1972 *
1973 * The WRITE index maps to the last position the driver has read from -- the
1974 * position preceding WRITE is the last slot the firmware can place a packet.
1975 *
1976 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1977 * WRITE = READ.
1978 *
9fbab516 1979 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1980 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1981 *
9fbab516 1982 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1983 * and fire the RX interrupt. The driver can then query the READ index and
1984 * process as many packets as possible, moving the WRITE index forward as it
1985 * resets the Rx queue buffers with new memory.
1986 *
1987 * The management in the driver is as follows:
1988 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1989 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1990 * to replenish the iwl->rxq->rx_free.
bb8c093b 1991 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1992 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1993 * 'processed' and 'read' driver indexes as well)
1994 * + A received packet is processed and handed to the kernel network stack,
1995 * detached from the iwl->rxq. The driver 'processed' index is updated.
1996 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1997 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1998 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1999 * were enough free buffers and RX_STALLED is set it is cleared.
2000 *
2001 *
2002 * Driver sequence:
2003 *
9fbab516 2004 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 2005 * iwl3945_rx_queue_restock
9fbab516 2006 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
2007 * queue, updates firmware pointers, and updates
2008 * the WRITE index. If insufficient rx_free buffers
bb8c093b 2009 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
2010 *
2011 * -- enable interrupts --
6100b588 2012 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
2013 * READ INDEX, detaching the SKB from the pool.
2014 * Moves the packet buffer from queue to rx_used.
bb8c093b 2015 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
2016 * slots.
2017 * ...
2018 *
2019 */
2020
b481de9c 2021/**
9fbab516 2022 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 2023 */
4a8a4322 2024static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
2025 dma_addr_t dma_addr)
2026{
2027 return cpu_to_le32((u32)dma_addr);
2028}
2029
2030/**
bb8c093b 2031 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 2032 *
9fbab516 2033 * If there are slots in the RX queue that need to be restocked,
b481de9c 2034 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 2035 * as we can, pulling from rx_free.
b481de9c
ZY
2036 *
2037 * This moves the 'write' index forward to catch up with 'processed', and
2038 * also updates the memory address in the firmware to reference the new
2039 * target buffer.
2040 */
4a8a4322 2041static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 2042{
cc2f362c 2043 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 2044 struct list_head *element;
6100b588 2045 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
2046 unsigned long flags;
2047 int write, rc;
2048
2049 spin_lock_irqsave(&rxq->lock, flags);
2050 write = rxq->write & ~0x7;
37d68317 2051 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 2052 /* Get next free Rx buffer, remove from free list */
b481de9c 2053 element = rxq->rx_free.next;
6100b588 2054 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 2055 list_del(element);
6440adb5
BC
2056
2057 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 2058 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
2059 rxq->queue[rxq->write] = rxb;
2060 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
2061 rxq->free_count--;
2062 }
2063 spin_unlock_irqrestore(&rxq->lock, flags);
2064 /* If the pre-allocated buffer pool is dropping low, schedule to
2065 * refill it */
2066 if (rxq->free_count <= RX_LOW_WATERMARK)
2067 queue_work(priv->workqueue, &priv->rx_replenish);
2068
2069
6440adb5
BC
2070 /* If we've added more space for the firmware to place data, tell it.
2071 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
2072 if ((write != (rxq->write & ~0x7))
2073 || (abs(rxq->write - rxq->read) > 7)) {
2074 spin_lock_irqsave(&rxq->lock, flags);
2075 rxq->need_update = 1;
2076 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 2077 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
2078 if (rc)
2079 return rc;
2080 }
2081
2082 return 0;
2083}
2084
2085/**
bb8c093b 2086 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
2087 *
2088 * When moving to rx_free an SKB is allocated for the slot.
2089 *
bb8c093b 2090 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 2091 * This is called as a scheduled work item (except for during initialization)
b481de9c 2092 */
4a8a4322 2093static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 2094{
cc2f362c 2095 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 2096 struct list_head *element;
6100b588 2097 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
2098 unsigned long flags;
2099 spin_lock_irqsave(&rxq->lock, flags);
2100 while (!list_empty(&rxq->rx_used)) {
2101 element = rxq->rx_used.next;
6100b588 2102 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
BC
2103
2104 /* Alloc a new receive buffer */
b481de9c 2105 rxb->skb =
1e33dc64
WT
2106 alloc_skb(priv->hw_params.rx_buf_size,
2107 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
2108 if (!rxb->skb) {
2109 if (net_ratelimit())
978785a3 2110 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
2111 /* We don't reschedule replenish work here -- we will
2112 * call the restock method and if it still needs
2113 * more buffers it will schedule replenish */
2114 break;
2115 }
12342c47
ZY
2116
2117 /* If radiotap head is required, reserve some headroom here.
2118 * The physical head count is a variable rx_stats->phy_count.
2119 * We reserve 4 bytes here. Plus these extra bytes, the
2120 * headroom of the physical head should be enough for the
2121 * radiotap head that iwl3945 supported. See iwl3945_rt.
2122 */
2123 skb_reserve(rxb->skb, 4);
2124
b481de9c
ZY
2125 priv->alloc_rxb_skb++;
2126 list_del(element);
6440adb5
BC
2127
2128 /* Get physical address of RB/SKB */
1e33dc64
WT
2129 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
2130 rxb->skb->data,
2131 priv->hw_params.rx_buf_size,
2132 PCI_DMA_FROMDEVICE);
b481de9c
ZY
2133 list_add_tail(&rxb->list, &rxq->rx_free);
2134 rxq->free_count++;
2135 }
2136 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
2137}
2138
2139/*
2140 * this should be called while priv->lock is locked
2141 */
4fd1f841 2142static void __iwl3945_rx_replenish(void *data)
5c0eef96 2143{
4a8a4322 2144 struct iwl_priv *priv = data;
5c0eef96
MA
2145
2146 iwl3945_rx_allocate(priv);
2147 iwl3945_rx_queue_restock(priv);
2148}
2149
2150
2151void iwl3945_rx_replenish(void *data)
2152{
4a8a4322 2153 struct iwl_priv *priv = data;
5c0eef96
MA
2154 unsigned long flags;
2155
2156 iwl3945_rx_allocate(priv);
b481de9c
ZY
2157
2158 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2159 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
2160 spin_unlock_irqrestore(&priv->lock, flags);
2161}
2162
b481de9c
ZY
2163/* Convert linear signal-to-noise ratio into dB */
2164static u8 ratio2dB[100] = {
2165/* 0 1 2 3 4 5 6 7 8 9 */
2166 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
2167 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
2168 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
2169 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
2170 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
2171 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
2172 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
2173 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
2174 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
2175 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
2176};
2177
2178/* Calculates a relative dB value from a ratio of linear
2179 * (i.e. not dB) signal levels.
2180 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 2181int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 2182{
221c80cf
AB
2183 /* 1000:1 or higher just report as 60 dB */
2184 if (sig_ratio >= 1000)
b481de9c
ZY
2185 return 60;
2186
221c80cf 2187 /* 100:1 or higher, divide by 10 and use table,
b481de9c 2188 * add 20 dB to make up for divide by 10 */
221c80cf 2189 if (sig_ratio >= 100)
3ac7f146 2190 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
2191
2192 /* We shouldn't see this */
2193 if (sig_ratio < 1)
2194 return 0;
2195
2196 /* Use table for ratios 1:1 - 99:1 */
2197 return (int)ratio2dB[sig_ratio];
2198}
2199
2200#define PERFECT_RSSI (-20) /* dBm */
2201#define WORST_RSSI (-95) /* dBm */
2202#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
2203
2204/* Calculate an indication of rx signal quality (a percentage, not dBm!).
2205 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
2206 * about formulas used below. */
bb8c093b 2207int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
2208{
2209 int sig_qual;
2210 int degradation = PERFECT_RSSI - rssi_dbm;
2211
2212 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
2213 * as indicator; formula is (signal dbm - noise dbm).
2214 * SNR at or above 40 is a great signal (100%).
2215 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
2216 * Weakest usable signal is usually 10 - 15 dB SNR. */
2217 if (noise_dbm) {
2218 if (rssi_dbm - noise_dbm >= 40)
2219 return 100;
2220 else if (rssi_dbm < noise_dbm)
2221 return 0;
2222 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
2223
2224 /* Else use just the signal level.
2225 * This formula is a least squares fit of data points collected and
2226 * compared with a reference system that had a percentage (%) display
2227 * for signal quality. */
2228 } else
2229 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
2230 (15 * RSSI_RANGE + 62 * degradation)) /
2231 (RSSI_RANGE * RSSI_RANGE);
2232
2233 if (sig_qual > 100)
2234 sig_qual = 100;
2235 else if (sig_qual < 1)
2236 sig_qual = 0;
2237
2238 return sig_qual;
2239}
2240
2241/**
9fbab516 2242 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
2243 *
2244 * Uses the priv->rx_handlers callback function array to invoke
2245 * the appropriate handlers, including command responses,
2246 * frame-received notifications, and other notifications.
2247 */
4a8a4322 2248static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 2249{
6100b588 2250 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 2251 struct iwl_rx_packet *pkt;
cc2f362c 2252 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
2253 u32 r, i;
2254 int reclaim;
2255 unsigned long flags;
5c0eef96 2256 u8 fill_rx = 0;
d68ab680 2257 u32 count = 8;
b481de9c 2258
6440adb5
BC
2259 /* uCode's read index (stored in shared DRAM) indicates the last Rx
2260 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 2261 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
2262 i = rxq->read;
2263
37d68317 2264 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 2265 fill_rx = 1;
b481de9c
ZY
2266 /* Rx interrupt, but nothing sent from uCode */
2267 if (i == r)
2268 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
2269
2270 while (i != r) {
2271 rxb = rxq->queue[i];
2272
9fbab516 2273 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
2274 * then a bug has been introduced in the queue refilling
2275 * routines -- catch it here */
2276 BUG_ON(rxb == NULL);
2277
2278 rxq->queue[i] = NULL;
2279
6100b588 2280 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 2281 priv->hw_params.rx_buf_size,
b481de9c 2282 PCI_DMA_FROMDEVICE);
3d24a9f7 2283 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
2284
2285 /* Reclaim a command buffer only if this packet is a response
2286 * to a (driver-originated) command.
2287 * If the packet (e.g. Rx frame) originated from uCode,
2288 * there is no command buffer to reclaim.
2289 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
2290 * but apparently a few don't get set; catch them here. */
2291 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
2292 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
2293 (pkt->hdr.cmd != REPLY_TX);
2294
2295 /* Based on type of command response or notification,
2296 * handle those that need handling via function in
bb8c093b 2297 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 2298 if (priv->rx_handlers[pkt->hdr.cmd]) {
40b8ec0b 2299 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
2300 "r = %d, i = %d, %s, 0x%02x\n", r, i,
2301 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
2302 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
2303 } else {
2304 /* No handling needed */
40b8ec0b 2305 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
2306 "r %d i %d No handler needed for %s, 0x%02x\n",
2307 r, i, get_cmd_string(pkt->hdr.cmd),
2308 pkt->hdr.cmd);
2309 }
2310
2311 if (reclaim) {
9fbab516 2312 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 2313 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
2314 * as we reclaim the driver command queue */
2315 if (rxb && rxb->skb)
bb8c093b 2316 iwl3945_tx_cmd_complete(priv, rxb);
b481de9c 2317 else
39aadf8c 2318 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
2319 }
2320
2321 /* For now we just don't re-use anything. We can tweak this
2322 * later to try and re-use notification packets and SKBs that
2323 * fail to Rx correctly */
2324 if (rxb->skb != NULL) {
2325 priv->alloc_rxb_skb--;
2326 dev_kfree_skb_any(rxb->skb);
2327 rxb->skb = NULL;
2328 }
2329
6100b588 2330 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
2331 priv->hw_params.rx_buf_size,
2332 PCI_DMA_FROMDEVICE);
b481de9c
ZY
2333 spin_lock_irqsave(&rxq->lock, flags);
2334 list_add_tail(&rxb->list, &priv->rxq.rx_used);
2335 spin_unlock_irqrestore(&rxq->lock, flags);
2336 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
2337 /* If there are a lot of unused frames,
2338 * restock the Rx queue so ucode won't assert. */
2339 if (fill_rx) {
2340 count++;
2341 if (count >= 8) {
2342 priv->rxq.read = i;
2343 __iwl3945_rx_replenish(priv);
2344 count = 0;
2345 }
2346 }
b481de9c
ZY
2347 }
2348
2349 /* Backtrack one entry */
2350 priv->rxq.read = i;
bb8c093b 2351 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
2352}
2353
4a8a4322 2354static void iwl3945_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
2355{
2356 IWL_DEBUG_ISR("Enabling interrupts\n");
2357 set_bit(STATUS_INT_ENABLED, &priv->status);
5d49f498 2358 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
2359}
2360
0359facc
MA
2361
2362/* call this function to flush any scheduled tasklet */
4a8a4322 2363static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 2364{
a96a27f9 2365 /* wait to make sure we flush pending tasklet*/
0359facc
MA
2366 synchronize_irq(priv->pci_dev->irq);
2367 tasklet_kill(&priv->irq_tasklet);
2368}
2369
2370
4a8a4322 2371static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
2372{
2373 clear_bit(STATUS_INT_ENABLED, &priv->status);
2374
2375 /* disable interrupts from uCode/NIC to host */
5d49f498 2376 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
2377
2378 /* acknowledge/clear/reset any interrupts still pending
2379 * from uCode or flow handler (Rx/Tx DMA) */
5d49f498
AK
2380 iwl_write32(priv, CSR_INT, 0xffffffff);
2381 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
2382 IWL_DEBUG_ISR("Disabled interrupts\n");
2383}
2384
2385static const char *desc_lookup(int i)
2386{
2387 switch (i) {
2388 case 1:
2389 return "FAIL";
2390 case 2:
2391 return "BAD_PARAM";
2392 case 3:
2393 return "BAD_CHECKSUM";
2394 case 4:
2395 return "NMI_INTERRUPT";
2396 case 5:
2397 return "SYSASSERT";
2398 case 6:
2399 return "FATAL_ERROR";
2400 }
2401
2402 return "UNKNOWN";
2403}
2404
2405#define ERROR_START_OFFSET (1 * sizeof(u32))
2406#define ERROR_ELEM_SIZE (7 * sizeof(u32))
2407
4a8a4322 2408static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
2409{
2410 u32 i;
2411 u32 desc, time, count, base, data1;
2412 u32 blink1, blink2, ilink1, ilink2;
2413 int rc;
2414
2415 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2416
bb8c093b 2417 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2418 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
2419 return;
2420 }
2421
5d49f498 2422 rc = iwl_grab_nic_access(priv);
b481de9c 2423 if (rc) {
39aadf8c 2424 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2425 return;
2426 }
2427
5d49f498 2428 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
2429
2430 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
2431 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2432 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2433 priv->status, count);
b481de9c
ZY
2434 }
2435
15b1687c 2436 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
2437 "ilink1 nmiPC Line\n");
2438 for (i = ERROR_START_OFFSET;
2439 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
2440 i += ERROR_ELEM_SIZE) {
5d49f498 2441 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 2442 time =
5d49f498 2443 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 2444 blink1 =
5d49f498 2445 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 2446 blink2 =
5d49f498 2447 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 2448 ilink1 =
5d49f498 2449 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 2450 ilink2 =
5d49f498 2451 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 2452 data1 =
5d49f498 2453 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 2454
15b1687c
WT
2455 IWL_ERR(priv,
2456 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
2457 desc_lookup(desc), desc, time, blink1, blink2,
2458 ilink1, ilink2, data1);
b481de9c
ZY
2459 }
2460
5d49f498 2461 iwl_release_nic_access(priv);
b481de9c
ZY
2462
2463}
2464
f58177b9 2465#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
2466
2467/**
bb8c093b 2468 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 2469 *
5d49f498 2470 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 2471 */
4a8a4322 2472static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
2473 u32 num_events, u32 mode)
2474{
2475 u32 i;
2476 u32 base; /* SRAM byte address of event log header */
2477 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2478 u32 ptr; /* SRAM byte address of log data */
2479 u32 ev, time, data; /* event log data */
2480
2481 if (num_events == 0)
2482 return;
2483
2484 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2485
2486 if (mode == 0)
2487 event_size = 2 * sizeof(u32);
2488 else
2489 event_size = 3 * sizeof(u32);
2490
2491 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2492
2493 /* "time" is actually "data" for mode 0 (no timestamp).
2494 * place event id # at far right for easier visual parsing. */
2495 for (i = 0; i < num_events; i++) {
5d49f498 2496 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 2497 ptr += sizeof(u32);
5d49f498 2498 time = iwl_read_targ_mem(priv, ptr);
b481de9c 2499 ptr += sizeof(u32);
15b1687c
WT
2500 if (mode == 0) {
2501 /* data, ev */
2502 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
2503 } else {
5d49f498 2504 data = iwl_read_targ_mem(priv, ptr);
b481de9c 2505 ptr += sizeof(u32);
15b1687c 2506 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
2507 }
2508 }
2509}
2510
4a8a4322 2511static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
2512{
2513 int rc;
2514 u32 base; /* SRAM byte address of event log header */
2515 u32 capacity; /* event log capacity in # entries */
2516 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2517 u32 num_wraps; /* # times uCode wrapped to top of log */
2518 u32 next_entry; /* index of next entry to be written by uCode */
2519 u32 size; /* # entries that we'll print */
2520
2521 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 2522 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2523 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
2524 return;
2525 }
2526
5d49f498 2527 rc = iwl_grab_nic_access(priv);
b481de9c 2528 if (rc) {
39aadf8c 2529 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2530 return;
2531 }
2532
2533 /* event log header */
5d49f498
AK
2534 capacity = iwl_read_targ_mem(priv, base);
2535 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2536 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2537 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
2538
2539 size = num_wraps ? capacity : next_entry;
2540
2541 /* bail out if nothing in log */
2542 if (size == 0) {
15b1687c 2543 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 2544 iwl_release_nic_access(priv);
b481de9c
ZY
2545 return;
2546 }
2547
15b1687c 2548 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
2549 size, num_wraps);
2550
2551 /* if uCode has wrapped back to top of log, start at the oldest entry,
2552 * i.e the next one that uCode would fill. */
2553 if (num_wraps)
bb8c093b 2554 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
2555 capacity - next_entry, mode);
2556
2557 /* (then/else) start at top of log */
bb8c093b 2558 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 2559
5d49f498 2560 iwl_release_nic_access(priv);
b481de9c
ZY
2561}
2562
4a8a4322 2563static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
2564{
2565 unsigned long flags;
2566
8ccde88a
SO
2567 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
2568 sizeof(priv->staging_rxon));
2569 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2570 iwl3945_commit_rxon(priv);
b481de9c 2571
bb8c093b 2572 iwl3945_add_station(priv, priv->bssid, 1, 0);
b481de9c
ZY
2573
2574 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 2575 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
2576 priv->error_recovering = 0;
2577 spin_unlock_irqrestore(&priv->lock, flags);
2578}
2579
4a8a4322 2580static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
2581{
2582 u32 inta, handled = 0;
2583 u32 inta_fh;
2584 unsigned long flags;
d08853a3 2585#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2586 u32 inta_mask;
2587#endif
2588
2589 spin_lock_irqsave(&priv->lock, flags);
2590
2591 /* Ack/clear/reset pending uCode interrupts.
2592 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
2593 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
2594 inta = iwl_read32(priv, CSR_INT);
2595 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
2596
2597 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
2598 * Any new interrupts that happen after this, either while we're
2599 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
2600 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2601 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 2602
d08853a3 2603#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2604 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 2605 /* just for debug */
5d49f498 2606 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
2607 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2608 inta, inta_mask, inta_fh);
2609 }
2610#endif
2611
2612 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
2613 * atomic, make sure that inta covers all the interrupts that
2614 * we've discovered, even if FH interrupt came in just after
2615 * reading CSR_INT. */
6f83eaa1 2616 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 2617 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 2618 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
2619 inta |= CSR_INT_BIT_FH_TX;
2620
2621 /* Now service all interrupt bits discovered above. */
2622 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 2623 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
2624
2625 /* Tell the device to stop sending interrupts */
bb8c093b 2626 iwl3945_disable_interrupts(priv);
b481de9c 2627
8ccde88a 2628 iwl_irq_handle_error(priv);
b481de9c
ZY
2629
2630 handled |= CSR_INT_BIT_HW_ERR;
2631
2632 spin_unlock_irqrestore(&priv->lock, flags);
2633
2634 return;
2635 }
2636
d08853a3 2637#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2638 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 2639 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
2640 if (inta & CSR_INT_BIT_SCD)
2641 IWL_DEBUG_ISR("Scheduler finished to transmit "
2642 "the frame/frames.\n");
b481de9c
ZY
2643
2644 /* Alive notification via Rx interrupt will do the real work */
2645 if (inta & CSR_INT_BIT_ALIVE)
2646 IWL_DEBUG_ISR("Alive interrupt\n");
2647 }
2648#endif
2649 /* Safely ignore these bits for debug checks below */
25c03d8e 2650 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 2651
b481de9c
ZY
2652 /* Error detected by uCode */
2653 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
2654 IWL_ERR(priv, "Microcode SW error detected. "
2655 "Restarting 0x%X.\n", inta);
8ccde88a 2656 iwl_irq_handle_error(priv);
b481de9c
ZY
2657 handled |= CSR_INT_BIT_SW_ERR;
2658 }
2659
2660 /* uCode wakes up after power-down sleep */
2661 if (inta & CSR_INT_BIT_WAKEUP) {
2662 IWL_DEBUG_ISR("Wakeup interrupt\n");
141c43a3 2663 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
2664 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
2665 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
2666 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
2667 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
2668 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
2669 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
2670
2671 handled |= CSR_INT_BIT_WAKEUP;
2672 }
2673
2674 /* All uCode command responses, including Tx command responses,
2675 * Rx "responses" (frame-received notification), and other
2676 * notifications from uCode come through here*/
2677 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 2678 iwl3945_rx_handle(priv);
b481de9c
ZY
2679 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
2680 }
2681
2682 if (inta & CSR_INT_BIT_FH_TX) {
2683 IWL_DEBUG_ISR("Tx interrupt\n");
2684
5d49f498
AK
2685 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2686 if (!iwl_grab_nic_access(priv)) {
2687 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 2688 (FH39_SRVC_CHNL), 0x0);
5d49f498 2689 iwl_release_nic_access(priv);
b481de9c
ZY
2690 }
2691 handled |= CSR_INT_BIT_FH_TX;
2692 }
2693
2694 if (inta & ~handled)
15b1687c 2695 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
2696
2697 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 2698 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 2699 inta & ~CSR_INI_SET_MASK);
39aadf8c 2700 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
2701 }
2702
2703 /* Re-enable all interrupts */
0359facc
MA
2704 /* only Re-enable if disabled by irq */
2705 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2706 iwl3945_enable_interrupts(priv);
b481de9c 2707
d08853a3 2708#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2709 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
2710 inta = iwl_read32(priv, CSR_INT);
2711 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2712 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
2713 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
2714 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2715 }
2716#endif
2717 spin_unlock_irqrestore(&priv->lock, flags);
2718}
2719
bb8c093b 2720static irqreturn_t iwl3945_isr(int irq, void *data)
b481de9c 2721{
4a8a4322 2722 struct iwl_priv *priv = data;
b481de9c
ZY
2723 u32 inta, inta_mask;
2724 u32 inta_fh;
2725 if (!priv)
2726 return IRQ_NONE;
2727
2728 spin_lock(&priv->lock);
2729
2730 /* Disable (but don't clear!) interrupts here to avoid
2731 * back-to-back ISRs and sporadic interrupts from our NIC.
2732 * If we have something to service, the tasklet will re-enable ints.
2733 * If we *don't* have something, we'll re-enable before leaving here. */
5d49f498
AK
2734 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
2735 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
2736
2737 /* Discover which interrupts are active/pending */
5d49f498
AK
2738 inta = iwl_read32(priv, CSR_INT);
2739 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
2740
2741 /* Ignore interrupt if there's nothing in NIC to service.
2742 * This may be due to IRQ shared with another device,
2743 * or due to sporadic interrupts thrown from our NIC. */
2744 if (!inta && !inta_fh) {
2745 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
2746 goto none;
2747 }
2748
2749 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2750 /* Hardware disappeared */
39aadf8c 2751 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
cb4da1a3 2752 goto unplugged;
b481de9c
ZY
2753 }
2754
2755 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2756 inta, inta_mask, inta_fh);
2757
25c03d8e
JP
2758 inta &= ~CSR_INT_BIT_SCD;
2759
bb8c093b 2760 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
2761 if (likely(inta || inta_fh))
2762 tasklet_schedule(&priv->irq_tasklet);
cb4da1a3 2763unplugged:
b481de9c
ZY
2764 spin_unlock(&priv->lock);
2765
2766 return IRQ_HANDLED;
2767
2768 none:
2769 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
2770 /* only Re-enable if disabled by irq */
2771 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2772 iwl3945_enable_interrupts(priv);
b481de9c
ZY
2773 spin_unlock(&priv->lock);
2774 return IRQ_NONE;
2775}
2776
4a8a4322 2777static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 2778 enum ieee80211_band band,
f9340520 2779 u8 is_active, u8 n_probes,
bb8c093b 2780 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
2781{
2782 const struct ieee80211_channel *channels = NULL;
8318d78a 2783 const struct ieee80211_supported_band *sband;
d20b3c65 2784 const struct iwl_channel_info *ch_info;
b481de9c
ZY
2785 u16 passive_dwell = 0;
2786 u16 active_dwell = 0;
2787 int added, i;
2788
cbba18c6 2789 sband = iwl_get_hw_mode(priv, band);
8318d78a 2790 if (!sband)
b481de9c
ZY
2791 return 0;
2792
8318d78a 2793 channels = sband->channels;
b481de9c 2794
77fecfb8
SO
2795 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2796 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 2797
8f4807a1
AK
2798 if (passive_dwell <= active_dwell)
2799 passive_dwell = active_dwell + 1;
2800
8318d78a 2801 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
2802 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2803 continue;
2804
8318d78a 2805 scan_ch->channel = channels[i].hw_value;
b481de9c 2806
e6148917 2807 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 2808 if (!is_channel_valid(ch_info)) {
66b5004d 2809 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
b481de9c
ZY
2810 scan_ch->channel);
2811 continue;
2812 }
2813
011a0330
AK
2814 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2815 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2816 /* If passive , set up for auto-switch
2817 * and use long active_dwell time.
2818 */
b481de9c 2819 if (!is_active || is_channel_passive(ch_info) ||
011a0330 2820 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 2821 scan_ch->type = 0; /* passive */
011a0330
AK
2822 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2823 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2824 } else {
b481de9c 2825 scan_ch->type = 1; /* active */
011a0330 2826 }
b481de9c 2827
011a0330
AK
2828 /* Set direct probe bits. These may be used both for active
2829 * scan channels (probes gets sent right away),
2830 * or for passive channels (probes get se sent only after
2831 * hearing clear Rx packet).*/
2832 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2833 if (n_probes)
0d21044e 2834 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
2835 } else {
2836 /* uCode v1 does not allow setting direct probe bits on
2837 * passive channel. */
2838 if ((scan_ch->type & 1) && n_probes)
0d21044e 2839 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2840 }
b481de9c 2841
9fbab516 2842 /* Set txpower levels to defaults */
b481de9c
ZY
2843 scan_ch->tpc.dsp_atten = 110;
2844 /* scan_pwr_info->tpc.dsp_atten; */
2845
2846 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2847 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2848 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2849 else {
2850 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2851 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2852 * power level:
8a1b0245 2853 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2854 */
2855 }
2856
2857 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
2858 scan_ch->channel,
2859 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2860 (scan_ch->type & 1) ?
2861 active_dwell : passive_dwell);
2862
2863 scan_ch++;
2864 added++;
2865 }
2866
2867 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
2868 return added;
2869}
2870
4a8a4322 2871static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2872 struct ieee80211_rate *rates)
2873{
2874 int i;
2875
2876 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2877 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2878 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2879 rates[i].hw_value_short = i;
2880 rates[i].flags = 0;
d9829a67 2881 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2882 /*
8318d78a 2883 * If CCK != 1M then set short preamble rate flag.
b481de9c 2884 */
bb8c093b 2885 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2886 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2887 }
b481de9c
ZY
2888 }
2889}
2890
b481de9c
ZY
2891/******************************************************************************
2892 *
2893 * uCode download functions
2894 *
2895 ******************************************************************************/
2896
4a8a4322 2897static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2898{
98c92211
TW
2899 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2900 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2901 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2902 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2903 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2904 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2905}
2906
2907/**
bb8c093b 2908 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2909 * looking at all data.
2910 */
4a8a4322 2911static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2912{
2913 u32 val;
2914 u32 save_len = len;
2915 int rc = 0;
2916 u32 errcnt;
2917
2918 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
2919
5d49f498 2920 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2921 if (rc)
2922 return rc;
2923
5d49f498 2924 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2925 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2926
2927 errcnt = 0;
2928 for (; len > 0; len -= sizeof(u32), image++) {
2929 /* read data comes through single port, auto-incr addr */
2930 /* NOTE: Use the debugless read so we don't flood kernel log
2931 * if IWL_DL_IO is set */
5d49f498 2932 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2933 if (val != le32_to_cpu(*image)) {
15b1687c 2934 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2935 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2936 save_len - len, val, le32_to_cpu(*image));
2937 rc = -EIO;
2938 errcnt++;
2939 if (errcnt >= 20)
2940 break;
2941 }
2942 }
2943
5d49f498 2944 iwl_release_nic_access(priv);
b481de9c
ZY
2945
2946 if (!errcnt)
bc434dd2 2947 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2948
2949 return rc;
2950}
2951
2952
2953/**
bb8c093b 2954 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2955 * using sample data 100 bytes apart. If these sample points are good,
2956 * it's a pretty good bet that everything between them is good, too.
2957 */
4a8a4322 2958static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2959{
2960 u32 val;
2961 int rc = 0;
2962 u32 errcnt = 0;
2963 u32 i;
2964
2965 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
2966
5d49f498 2967 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2968 if (rc)
2969 return rc;
2970
2971 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2972 /* read data comes through single port, auto-incr addr */
2973 /* NOTE: Use the debugless read so we don't flood kernel log
2974 * if IWL_DL_IO is set */
5d49f498 2975 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2976 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2977 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2978 if (val != le32_to_cpu(*image)) {
2979#if 0 /* Enable this if you want to see details */
15b1687c 2980 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2981 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2982 i, val, *image);
2983#endif
2984 rc = -EIO;
2985 errcnt++;
2986 if (errcnt >= 3)
2987 break;
2988 }
2989 }
2990
5d49f498 2991 iwl_release_nic_access(priv);
b481de9c
ZY
2992
2993 return rc;
2994}
2995
2996
2997/**
bb8c093b 2998 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2999 * and verify its contents
3000 */
4a8a4322 3001static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
3002{
3003 __le32 *image;
3004 u32 len;
3005 int rc = 0;
3006
3007 /* Try bootstrap */
3008 image = (__le32 *)priv->ucode_boot.v_addr;
3009 len = priv->ucode_boot.len;
bb8c093b 3010 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c
ZY
3011 if (rc == 0) {
3012 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
3013 return 0;
3014 }
3015
3016 /* Try initialize */
3017 image = (__le32 *)priv->ucode_init.v_addr;
3018 len = priv->ucode_init.len;
bb8c093b 3019 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c
ZY
3020 if (rc == 0) {
3021 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
3022 return 0;
3023 }
3024
3025 /* Try runtime/protocol */
3026 image = (__le32 *)priv->ucode_code.v_addr;
3027 len = priv->ucode_code.len;
bb8c093b 3028 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c
ZY
3029 if (rc == 0) {
3030 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
3031 return 0;
3032 }
3033
15b1687c 3034 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 3035
9fbab516
BC
3036 /* Since nothing seems to match, show first several data entries in
3037 * instruction SRAM, so maybe visual inspection will give a clue.
3038 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
3039 image = (__le32 *)priv->ucode_boot.v_addr;
3040 len = priv->ucode_boot.len;
bb8c093b 3041 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
3042
3043 return rc;
3044}
3045
4a8a4322 3046static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
3047{
3048 /* Remove all resets to allow NIC to operate */
5d49f498 3049 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
3050}
3051
3052/**
bb8c093b 3053 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
3054 *
3055 * Copy into buffers for card to fetch via bus-mastering
3056 */
4a8a4322 3057static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 3058{
a78fe754 3059 struct iwl_ucode *ucode;
a0987a8d 3060 int ret = -EINVAL, index;
b481de9c
ZY
3061 const struct firmware *ucode_raw;
3062 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
3063 const char *name_pre = priv->cfg->fw_name_pre;
3064 const unsigned int api_max = priv->cfg->ucode_api_max;
3065 const unsigned int api_min = priv->cfg->ucode_api_min;
3066 char buf[25];
b481de9c
ZY
3067 u8 *src;
3068 size_t len;
a0987a8d 3069 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
3070
3071 /* Ask kernel firmware_class module to get the boot firmware off disk.
3072 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
3073 for (index = api_max; index >= api_min; index--) {
3074 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
3075 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
3076 if (ret < 0) {
15b1687c 3077 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
3078 buf, ret);
3079 if (ret == -ENOENT)
3080 continue;
3081 else
3082 goto error;
3083 } else {
3084 if (index < api_max)
15b1687c
WT
3085 IWL_ERR(priv, "Loaded firmware %s, "
3086 "which is deprecated. "
3087 " Please use API v%u instead.\n",
a0987a8d
RC
3088 buf, api_max);
3089 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
3090 buf, ucode_raw->size);
3091 break;
3092 }
b481de9c
ZY
3093 }
3094
a0987a8d
RC
3095 if (ret < 0)
3096 goto error;
b481de9c
ZY
3097
3098 /* Make sure that we got at least our header! */
3099 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 3100 IWL_ERR(priv, "File size way too small!\n");
90e759d1 3101 ret = -EINVAL;
b481de9c
ZY
3102 goto err_release;
3103 }
3104
3105 /* Data from ucode file: header followed by uCode images */
3106 ucode = (void *)ucode_raw->data;
3107
c02b3acd 3108 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 3109 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
3110 inst_size = le32_to_cpu(ucode->inst_size);
3111 data_size = le32_to_cpu(ucode->data_size);
3112 init_size = le32_to_cpu(ucode->init_size);
3113 init_data_size = le32_to_cpu(ucode->init_data_size);
3114 boot_size = le32_to_cpu(ucode->boot_size);
3115
a0987a8d
RC
3116 /* api_ver should match the api version forming part of the
3117 * firmware filename ... but we don't check for that and only rely
3118 * on the API version read from firware header from here on forward */
3119
3120 if (api_ver < api_min || api_ver > api_max) {
15b1687c 3121 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
3122 "Driver supports v%u, firmware is v%u.\n",
3123 api_max, api_ver);
3124 priv->ucode_ver = 0;
3125 ret = -EINVAL;
3126 goto err_release;
3127 }
3128 if (api_ver != api_max)
15b1687c 3129 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
3130 "got %u. New firmware can be obtained "
3131 "from http://www.intellinuxwireless.org.\n",
3132 api_max, api_ver);
3133
978785a3
TW
3134 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
3135 IWL_UCODE_MAJOR(priv->ucode_ver),
3136 IWL_UCODE_MINOR(priv->ucode_ver),
3137 IWL_UCODE_API(priv->ucode_ver),
3138 IWL_UCODE_SERIAL(priv->ucode_ver));
3139
a0987a8d
RC
3140 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
3141 priv->ucode_ver);
bc434dd2
IS
3142 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
3143 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
3144 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
3145 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
3146 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
b481de9c 3147
a0987a8d 3148
b481de9c
ZY
3149 /* Verify size of file vs. image size info in file's header */
3150 if (ucode_raw->size < sizeof(*ucode) +
3151 inst_size + data_size + init_size +
3152 init_data_size + boot_size) {
3153
3154 IWL_DEBUG_INFO("uCode file size %d too small\n",
3155 (int)ucode_raw->size);
90e759d1 3156 ret = -EINVAL;
b481de9c
ZY
3157 goto err_release;
3158 }
3159
3160 /* Verify that uCode images will fit in card's SRAM */
250bdd21 3161 if (inst_size > IWL39_MAX_INST_SIZE) {
90e759d1
TW
3162 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
3163 inst_size);
3164 ret = -EINVAL;
b481de9c
ZY
3165 goto err_release;
3166 }
3167
250bdd21 3168 if (data_size > IWL39_MAX_DATA_SIZE) {
90e759d1
TW
3169 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
3170 data_size);
3171 ret = -EINVAL;
b481de9c
ZY
3172 goto err_release;
3173 }
250bdd21 3174 if (init_size > IWL39_MAX_INST_SIZE) {
90e759d1
TW
3175 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
3176 init_size);
3177 ret = -EINVAL;
b481de9c
ZY
3178 goto err_release;
3179 }
250bdd21 3180 if (init_data_size > IWL39_MAX_DATA_SIZE) {
90e759d1
TW
3181 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
3182 init_data_size);
3183 ret = -EINVAL;
b481de9c
ZY
3184 goto err_release;
3185 }
250bdd21 3186 if (boot_size > IWL39_MAX_BSM_SIZE) {
90e759d1
TW
3187 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
3188 boot_size);
3189 ret = -EINVAL;
b481de9c
ZY
3190 goto err_release;
3191 }
3192
3193 /* Allocate ucode buffers for card's bus-master loading ... */
3194
3195 /* Runtime instructions and 2 copies of data:
3196 * 1) unmodified from disk
3197 * 2) backup cache for save/restore during power-downs */
3198 priv->ucode_code.len = inst_size;
98c92211 3199 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
3200
3201 priv->ucode_data.len = data_size;
98c92211 3202 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
3203
3204 priv->ucode_data_backup.len = data_size;
98c92211 3205 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 3206
90e759d1
TW
3207 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
3208 !priv->ucode_data_backup.v_addr)
3209 goto err_pci_alloc;
b481de9c
ZY
3210
3211 /* Initialization instructions and data */
90e759d1
TW
3212 if (init_size && init_data_size) {
3213 priv->ucode_init.len = init_size;
98c92211 3214 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
3215
3216 priv->ucode_init_data.len = init_data_size;
98c92211 3217 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
3218
3219 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
3220 goto err_pci_alloc;
3221 }
b481de9c
ZY
3222
3223 /* Bootstrap (instructions only, no data) */
90e759d1
TW
3224 if (boot_size) {
3225 priv->ucode_boot.len = boot_size;
98c92211 3226 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 3227
90e759d1
TW
3228 if (!priv->ucode_boot.v_addr)
3229 goto err_pci_alloc;
3230 }
b481de9c
ZY
3231
3232 /* Copy images into buffers for card's bus-master reads ... */
3233
3234 /* Runtime instructions (first block of data in file) */
3235 src = &ucode->data[0];
3236 len = priv->ucode_code.len;
90e759d1 3237 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
3238 memcpy(priv->ucode_code.v_addr, src, len);
3239 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
3240 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
3241
3242 /* Runtime data (2nd block)
bb8c093b 3243 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
3244 src = &ucode->data[inst_size];
3245 len = priv->ucode_data.len;
90e759d1 3246 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
3247 memcpy(priv->ucode_data.v_addr, src, len);
3248 memcpy(priv->ucode_data_backup.v_addr, src, len);
3249
3250 /* Initialization instructions (3rd block) */
3251 if (init_size) {
3252 src = &ucode->data[inst_size + data_size];
3253 len = priv->ucode_init.len;
90e759d1
TW
3254 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
3255 len);
b481de9c
ZY
3256 memcpy(priv->ucode_init.v_addr, src, len);
3257 }
3258
3259 /* Initialization data (4th block) */
3260 if (init_data_size) {
3261 src = &ucode->data[inst_size + data_size + init_size];
3262 len = priv->ucode_init_data.len;
3263 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
3264 (int)len);
3265 memcpy(priv->ucode_init_data.v_addr, src, len);
3266 }
3267
3268 /* Bootstrap instructions (5th block) */
3269 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
3270 len = priv->ucode_boot.len;
3271 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
3272 (int)len);
3273 memcpy(priv->ucode_boot.v_addr, src, len);
3274
3275 /* We have our copies now, allow OS release its copies */
3276 release_firmware(ucode_raw);
3277 return 0;
3278
3279 err_pci_alloc:
15b1687c 3280 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 3281 ret = -ENOMEM;
bb8c093b 3282 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
3283
3284 err_release:
3285 release_firmware(ucode_raw);
3286
3287 error:
90e759d1 3288 return ret;
b481de9c
ZY
3289}
3290
3291
3292/**
bb8c093b 3293 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
3294 *
3295 * Tell initialization uCode where to find runtime uCode.
3296 *
3297 * BSM registers initially contain pointers to initialization uCode.
3298 * We need to replace them to load runtime uCode inst and data,
3299 * and to save runtime data when powering down.
3300 */
4a8a4322 3301static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
3302{
3303 dma_addr_t pinst;
3304 dma_addr_t pdata;
3305 int rc = 0;
3306 unsigned long flags;
3307
3308 /* bits 31:0 for 3945 */
3309 pinst = priv->ucode_code.p_addr;
3310 pdata = priv->ucode_data_backup.p_addr;
3311
3312 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3313 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3314 if (rc) {
3315 spin_unlock_irqrestore(&priv->lock, flags);
3316 return rc;
3317 }
3318
3319 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
3320 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
3321 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
3322 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
3323 priv->ucode_data.len);
3324
a96a27f9 3325 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 3326 * that all new ptr/size info is in place */
5d49f498 3327 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
3328 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
3329
5d49f498 3330 iwl_release_nic_access(priv);
b481de9c
ZY
3331
3332 spin_unlock_irqrestore(&priv->lock, flags);
3333
3334 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
3335
3336 return rc;
3337}
3338
3339/**
bb8c093b 3340 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
3341 *
3342 * Called after REPLY_ALIVE notification received from "initialize" uCode.
3343 *
b481de9c 3344 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 3345 */
4a8a4322 3346static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
3347{
3348 /* Check alive response for "valid" sign from uCode */
3349 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
3350 /* We had an error bringing up the hardware, so take it
3351 * all the way back down so we can try again */
3352 IWL_DEBUG_INFO("Initialize Alive failed.\n");
3353 goto restart;
3354 }
3355
3356 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
3357 * This is a paranoid check, because we would not have gotten the
3358 * "initialize" alive if code weren't properly loaded. */
bb8c093b 3359 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
3360 /* Runtime instruction load was bad;
3361 * take it all the way back down so we can try again */
3362 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
3363 goto restart;
3364 }
3365
3366 /* Send pointers to protocol/runtime uCode image ... init code will
3367 * load and launch runtime uCode, which will send us another "Alive"
3368 * notification. */
3369 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 3370 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
3371 /* Runtime instruction load won't happen;
3372 * take it all the way back down so we can try again */
3373 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
3374 goto restart;
3375 }
3376 return;
3377
3378 restart:
3379 queue_work(priv->workqueue, &priv->restart);
3380}
3381
3382
9bdf5eca
MA
3383/* temporary */
3384static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
3385 struct sk_buff *skb);
3386
b481de9c 3387/**
bb8c093b 3388 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 3389 * from protocol/runtime uCode (initialization uCode's
bb8c093b 3390 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 3391 */
4a8a4322 3392static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
3393{
3394 int rc = 0;
3395 int thermal_spin = 0;
3396 u32 rfkill;
3397
3398 IWL_DEBUG_INFO("Runtime Alive received.\n");
3399
3400 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
3401 /* We had an error bringing up the hardware, so take it
3402 * all the way back down so we can try again */
3403 IWL_DEBUG_INFO("Alive failed.\n");
3404 goto restart;
3405 }
3406
3407 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
3408 * This is a paranoid check, because we would not have gotten the
3409 * "runtime" alive if code weren't properly loaded. */
bb8c093b 3410 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
3411 /* Runtime instruction load was bad;
3412 * take it all the way back down so we can try again */
3413 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
3414 goto restart;
3415 }
3416
bb8c093b 3417 iwl3945_clear_stations_table(priv);
b481de9c 3418
5d49f498 3419 rc = iwl_grab_nic_access(priv);
b481de9c 3420 if (rc) {
39aadf8c 3421 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
3422 return;
3423 }
3424
5d49f498 3425 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
b481de9c 3426 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5d49f498 3427 iwl_release_nic_access(priv);
b481de9c
ZY
3428
3429 if (rfkill & 0x1) {
3430 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 3431 /* if RFKILL is not on, then wait for thermal
b481de9c 3432 * sensor in adapter to kick in */
bb8c093b 3433 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
3434 thermal_spin++;
3435 udelay(10);
3436 }
3437
3438 if (thermal_spin)
3439 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
3440 thermal_spin * 10);
3441 } else
3442 set_bit(STATUS_RF_KILL_HW, &priv->status);
3443
9fbab516 3444 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
3445 set_bit(STATUS_ALIVE, &priv->status);
3446
3447 /* Clear out the uCode error bit if it is set */
3448 clear_bit(STATUS_FW_ERROR, &priv->status);
3449
775a6e27 3450 if (iwl_is_rfkill(priv))
b481de9c
ZY
3451 return;
3452
36d6825b 3453 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
3454
3455 priv->active_rate = priv->rates_mask;
3456 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
3457
bb8c093b 3458 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 3459
8ccde88a 3460 if (iwl_is_associated(priv)) {
bb8c093b 3461 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 3462 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 3463
8ccde88a
SO
3464 memcpy(&priv->staging_rxon, &priv->active_rxon,
3465 sizeof(priv->staging_rxon));
b481de9c
ZY
3466 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3467 } else {
3468 /* Initialize our rx_config data */
8ccde88a 3469 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
3470 }
3471
9fbab516 3472 /* Configure Bluetooth device coexistence support */
17f841cd 3473 iwl_send_bt_config(priv);
b481de9c
ZY
3474
3475 /* Configure the adapter for unassociated operation */
bb8c093b 3476 iwl3945_commit_rxon(priv);
b481de9c 3477
b481de9c
ZY
3478 iwl3945_reg_txpower_periodic(priv);
3479
fe00b5a5
RC
3480 iwl3945_led_register(priv);
3481
b481de9c 3482 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 3483 set_bit(STATUS_READY, &priv->status);
5a66926a 3484 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
3485
3486 if (priv->error_recovering)
bb8c093b 3487 iwl3945_error_recovery(priv);
b481de9c 3488
9bdf5eca
MA
3489 /* reassociate for ADHOC mode */
3490 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
3491 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
3492 priv->vif);
3493 if (beacon)
3494 iwl3945_mac_beacon_update(priv->hw, beacon);
3495 }
3496
b481de9c
ZY
3497 return;
3498
3499 restart:
3500 queue_work(priv->workqueue, &priv->restart);
3501}
3502
4a8a4322 3503static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 3504
4a8a4322 3505static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3506{
3507 unsigned long flags;
3508 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
3509 struct ieee80211_conf *conf = NULL;
3510
3511 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
3512
3513 conf = ieee80211_get_hw_conf(priv->hw);
3514
3515 if (!exit_pending)
3516 set_bit(STATUS_EXIT_PENDING, &priv->status);
3517
ab53d8af 3518 iwl3945_led_unregister(priv);
bb8c093b 3519 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3520
3521 /* Unblock any waiting calls */
3522 wake_up_interruptible_all(&priv->wait_command_queue);
3523
b481de9c
ZY
3524 /* Wipe out the EXIT_PENDING status bit if we are not actually
3525 * exiting the module */
3526 if (!exit_pending)
3527 clear_bit(STATUS_EXIT_PENDING, &priv->status);
3528
3529 /* stop and reset the on-board processor */
5d49f498 3530 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
3531
3532 /* tell the device to stop sending interrupts */
0359facc 3533 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3534 iwl3945_disable_interrupts(priv);
0359facc
MA
3535 spin_unlock_irqrestore(&priv->lock, flags);
3536 iwl_synchronize_irq(priv);
b481de9c
ZY
3537
3538 if (priv->mac80211_registered)
3539 ieee80211_stop_queues(priv->hw);
3540
bb8c093b 3541 /* If we have not previously called iwl3945_init() then
b481de9c 3542 * clear all bits but the RF Kill and SUSPEND bits and return */
775a6e27 3543 if (!iwl_is_init(priv)) {
b481de9c
ZY
3544 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3545 STATUS_RF_KILL_HW |
3546 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3547 STATUS_RF_KILL_SW |
9788864e
RC
3548 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3549 STATUS_GEO_CONFIGURED |
b481de9c 3550 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
ebef2008
AK
3551 STATUS_IN_SUSPEND |
3552 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3553 STATUS_EXIT_PENDING;
b481de9c
ZY
3554 goto exit;
3555 }
3556
3557 /* ...otherwise clear out all the status bits but the RF Kill and
3558 * SUSPEND bits and continue taking the NIC down. */
3559 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3560 STATUS_RF_KILL_HW |
3561 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3562 STATUS_RF_KILL_SW |
9788864e
RC
3563 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3564 STATUS_GEO_CONFIGURED |
b481de9c
ZY
3565 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3566 STATUS_IN_SUSPEND |
3567 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
3568 STATUS_FW_ERROR |
3569 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3570 STATUS_EXIT_PENDING;
b481de9c 3571
e9414b6b 3572 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 3573 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3574 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
3575 spin_unlock_irqrestore(&priv->lock, flags);
3576
bb8c093b
CH
3577 iwl3945_hw_txq_ctx_stop(priv);
3578 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
3579
3580 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
3581 if (!iwl_grab_nic_access(priv)) {
3582 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 3583 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 3584 iwl_release_nic_access(priv);
b481de9c
ZY
3585 }
3586 spin_unlock_irqrestore(&priv->lock, flags);
3587
3588 udelay(5);
3589
e9414b6b
AM
3590 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
3591 priv->cfg->ops->lib->apm_ops.stop(priv);
3592 else
3593 priv->cfg->ops->lib->apm_ops.reset(priv);
3594
b481de9c 3595 exit:
3d24a9f7 3596 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
3597
3598 if (priv->ibss_beacon)
3599 dev_kfree_skb(priv->ibss_beacon);
3600 priv->ibss_beacon = NULL;
3601
3602 /* clear out any free frames */
bb8c093b 3603 iwl3945_clear_free_frames(priv);
b481de9c
ZY
3604}
3605
4a8a4322 3606static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3607{
3608 mutex_lock(&priv->mutex);
bb8c093b 3609 __iwl3945_down(priv);
b481de9c 3610 mutex_unlock(&priv->mutex);
b24d22b1 3611
bb8c093b 3612 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
3613}
3614
3615#define MAX_HW_RESTARTS 5
3616
4a8a4322 3617static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
3618{
3619 int rc, i;
3620
3621 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 3622 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
3623 return -EIO;
3624 }
3625
3626 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 3627 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 3628 "parameter)\n");
e655b9f0
ZY
3629 return -ENODEV;
3630 }
3631
e903fbd4 3632 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 3633 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
3634 return -EIO;
3635 }
3636
e655b9f0 3637 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 3638 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
3639 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3640 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3641 else {
3642 set_bit(STATUS_RF_KILL_HW, &priv->status);
3643 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
39aadf8c 3644 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
e655b9f0
ZY
3645 return -ENODEV;
3646 }
b481de9c 3647 }
80fcc9e2 3648
5d49f498 3649 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 3650
bb8c093b 3651 rc = iwl3945_hw_nic_init(priv);
b481de9c 3652 if (rc) {
15b1687c 3653 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
3654 return rc;
3655 }
3656
3657 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
3658 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3659 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
3660 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3661
3662 /* clear (again), then enable host interrupts */
5d49f498 3663 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 3664 iwl3945_enable_interrupts(priv);
b481de9c
ZY
3665
3666 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
3667 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3668 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
3669
3670 /* Copy original ucode data image from disk into backup cache.
3671 * This will be used to initialize the on-board processor's
3672 * data SRAM for a clean start when the runtime program first loads. */
3673 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 3674 priv->ucode_data.len);
b481de9c 3675
e655b9f0
ZY
3676 /* We return success when we resume from suspend and rf_kill is on. */
3677 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
3678 return 0;
3679
b481de9c
ZY
3680 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3681
bb8c093b 3682 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3683
3684 /* load bootstrap state machine,
3685 * load bootstrap program into processor's memory,
3686 * prepare to load the "initialize" uCode */
0164b9b4 3687 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
3688
3689 if (rc) {
15b1687c
WT
3690 IWL_ERR(priv,
3691 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
3692 continue;
3693 }
3694
3695 /* start card; "initialize" will load runtime ucode */
bb8c093b 3696 iwl3945_nic_start(priv);
b481de9c 3697
b481de9c
ZY
3698 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
3699
3700 return 0;
3701 }
3702
3703 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 3704 __iwl3945_down(priv);
ebef2008 3705 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
3706
3707 /* tried to restart and config the device for as long as our
3708 * patience could withstand */
15b1687c 3709 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
3710 return -EIO;
3711}
3712
3713
3714/*****************************************************************************
3715 *
3716 * Workqueue callbacks
3717 *
3718 *****************************************************************************/
3719
bb8c093b 3720static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 3721{
4a8a4322
AK
3722 struct iwl_priv *priv =
3723 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
3724
3725 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3726 return;
3727
3728 mutex_lock(&priv->mutex);
bb8c093b 3729 iwl3945_init_alive_start(priv);
b481de9c
ZY
3730 mutex_unlock(&priv->mutex);
3731}
3732
bb8c093b 3733static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 3734{
4a8a4322
AK
3735 struct iwl_priv *priv =
3736 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
3737
3738 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3739 return;
3740
3741 mutex_lock(&priv->mutex);
bb8c093b 3742 iwl3945_alive_start(priv);
b481de9c
ZY
3743 mutex_unlock(&priv->mutex);
3744}
3745
2663516d
HS
3746static void iwl3945_rfkill_poll(struct work_struct *data)
3747{
3748 struct iwl_priv *priv =
3749 container_of(data, struct iwl_priv, rfkill_poll.work);
3750 unsigned long status = priv->status;
3751
3752 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3753 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3754 else
3755 set_bit(STATUS_RF_KILL_HW, &priv->status);
3756
3757 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
3758 queue_work(priv->workqueue, &priv->rf_kill);
3759
3760 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3761 round_jiffies_relative(2 * HZ));
3762
3763}
3764
b481de9c 3765#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 3766static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 3767{
4a8a4322
AK
3768 struct iwl_priv *priv =
3769 container_of(data, struct iwl_priv, request_scan);
c2d79b48 3770 struct iwl_host_cmd cmd = {
b481de9c 3771 .id = REPLY_SCAN_CMD,
bb8c093b 3772 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
3773 .meta.flags = CMD_SIZE_HUGE,
3774 };
3775 int rc = 0;
bb8c093b 3776 struct iwl3945_scan_cmd *scan;
b481de9c 3777 struct ieee80211_conf *conf = NULL;
f9340520 3778 u8 n_probes = 2;
8318d78a 3779 enum ieee80211_band band;
9387b7ca 3780 DECLARE_SSID_BUF(ssid);
b481de9c
ZY
3781
3782 conf = ieee80211_get_hw_conf(priv->hw);
3783
3784 mutex_lock(&priv->mutex);
3785
775a6e27 3786 if (!iwl_is_ready(priv)) {
39aadf8c 3787 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
3788 goto done;
3789 }
3790
a96a27f9 3791 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
3792 * was given the chance to run... */
3793 if (!test_bit(STATUS_SCANNING, &priv->status))
3794 goto done;
3795
3796 /* This should never be called or scheduled if there is currently
3797 * a scan active in the hardware. */
3798 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
3799 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
3800 "Ignoring second request.\n");
3801 rc = -EIO;
3802 goto done;
3803 }
3804
3805 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3806 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
3807 goto done;
3808 }
3809
3810 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3811 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
3812 goto done;
3813 }
3814
775a6e27 3815 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
3816 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
3817 goto done;
3818 }
3819
3820 if (!test_bit(STATUS_READY, &priv->status)) {
3821 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
3822 goto done;
3823 }
3824
3825 if (!priv->scan_bands) {
3826 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
3827 goto done;
3828 }
3829
805cee5b
WT
3830 if (!priv->scan) {
3831 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3832 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3833 if (!priv->scan) {
b481de9c
ZY
3834 rc = -ENOMEM;
3835 goto done;
3836 }
3837 }
805cee5b 3838 scan = priv->scan;
bb8c093b 3839 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3840
3841 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3842 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3843
8ccde88a 3844 if (iwl_is_associated(priv)) {
b481de9c
ZY
3845 u16 interval = 0;
3846 u32 extra;
3847 u32 suspend_time = 100;
3848 u32 scan_suspend_time = 100;
3849 unsigned long flags;
3850
3851 IWL_DEBUG_INFO("Scanning while associated...\n");
3852
3853 spin_lock_irqsave(&priv->lock, flags);
3854 interval = priv->beacon_int;
3855 spin_unlock_irqrestore(&priv->lock, flags);
3856
3857 scan->suspend_time = 0;
15e869d8 3858 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3859 if (!interval)
3860 interval = suspend_time;
3861 /*
3862 * suspend time format:
3863 * 0-19: beacon interval in usec (time before exec.)
3864 * 20-23: 0
3865 * 24-31: number of beacons (suspend between channels)
3866 */
3867
3868 extra = (suspend_time / interval) << 24;
3869 scan_suspend_time = 0xFF0FFFFF &
3870 (extra | ((suspend_time % interval) * 1024));
3871
3872 scan->suspend_time = cpu_to_le32(scan_suspend_time);
3873 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
3874 scan_suspend_time, interval);
3875 }
3876
3877 /* We should add the ability for user to lock to PASSIVE ONLY */
3878 if (priv->one_direct_scan) {
3879 IWL_DEBUG_SCAN
3880 ("Kicking off one direct scan for '%s'\n",
9387b7ca
JL
3881 print_ssid(ssid, priv->direct_ssid,
3882 priv->direct_ssid_len));
b481de9c
ZY
3883 scan->direct_scan[0].id = WLAN_EID_SSID;
3884 scan->direct_scan[0].len = priv->direct_ssid_len;
3885 memcpy(scan->direct_scan[0].ssid,
3886 priv->direct_ssid, priv->direct_ssid_len);
f9340520 3887 n_probes++;
f9340520 3888 } else
786b4557 3889 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
b481de9c
ZY
3890
3891 /* We don't build a direct scan probe request; the uCode will do
3892 * that based on the direct_mask added to each channel entry */
b481de9c 3893 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3894 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3895 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3896
3897 /* flags + rate selection */
3898
66b5004d 3899 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3900 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3901 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3902 scan->good_CRC_th = 0;
8318d78a 3903 band = IEEE80211_BAND_2GHZ;
66b5004d 3904 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3905 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3906 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3907 band = IEEE80211_BAND_5GHZ;
66b5004d 3908 } else {
39aadf8c 3909 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3910 goto done;
3911 }
3912
77fecfb8
SO
3913 scan->tx_cmd.len = cpu_to_le16(
3914 iwl_fill_probe_req(priv, band,
3915 (struct ieee80211_mgmt *)scan->data,
3916 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3917
b481de9c
ZY
3918 /* select Rx antennas */
3919 scan->flags |= iwl3945_get_antenna_flags(priv);
3920
05c914fe 3921 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3922 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3923
f9340520
AK
3924 scan->channel_count =
3925 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
3926 n_probes,
3927 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3928
14b54336
RC
3929 if (scan->channel_count == 0) {
3930 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
3931 goto done;
3932 }
3933
b481de9c 3934 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3935 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3936 cmd.data = scan;
3937 scan->len = cpu_to_le16(cmd.len);
3938
3939 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3940 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3941 if (rc)
3942 goto done;
3943
3944 queue_delayed_work(priv->workqueue, &priv->scan_check,
3945 IWL_SCAN_CHECK_WATCHDOG);
3946
3947 mutex_unlock(&priv->mutex);
3948 return;
3949
3950 done:
2420ebc1
MA
3951 /* can not perform scan make sure we clear scanning
3952 * bits from status so next scan request can be performed.
3953 * if we dont clear scanning status bit here all next scan
3954 * will fail
3955 */
3956 clear_bit(STATUS_SCAN_HW, &priv->status);
3957 clear_bit(STATUS_SCANNING, &priv->status);
3958
01ebd063 3959 /* inform mac80211 scan aborted */
b481de9c
ZY
3960 queue_work(priv->workqueue, &priv->scan_completed);
3961 mutex_unlock(&priv->mutex);
3962}
3963
bb8c093b 3964static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3965{
4a8a4322 3966 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3967
3968 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3969 return;
3970
3971 mutex_lock(&priv->mutex);
bb8c093b 3972 __iwl3945_up(priv);
b481de9c 3973 mutex_unlock(&priv->mutex);
c0af96a6 3974 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3975}
3976
bb8c093b 3977static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3978{
4a8a4322 3979 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3980
3981 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3982 return;
3983
bb8c093b 3984 iwl3945_down(priv);
b481de9c
ZY
3985 queue_work(priv->workqueue, &priv->up);
3986}
3987
bb8c093b 3988static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3989{
4a8a4322
AK
3990 struct iwl_priv *priv =
3991 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3992
3993 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3994 return;
3995
3996 mutex_lock(&priv->mutex);
bb8c093b 3997 iwl3945_rx_replenish(priv);
b481de9c
ZY
3998 mutex_unlock(&priv->mutex);
3999}
4000
7878a5a4
MA
4001#define IWL_DELAY_NEXT_SCAN (HZ*2)
4002
4a8a4322 4003static void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 4004{
b481de9c
ZY
4005 int rc = 0;
4006 struct ieee80211_conf *conf = NULL;
4007
05c914fe 4008 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 4009 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
4010 return;
4011 }
4012
4013
e174961c 4014 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
8ccde88a 4015 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
4016
4017 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
4018 return;
4019
322a9811 4020 if (!priv->vif || !priv->is_open)
6ef89d0a 4021 return;
322a9811 4022
af0053d6 4023 iwl_scan_cancel_timeout(priv, 200);
15e869d8 4024
b481de9c
ZY
4025 conf = ieee80211_get_hw_conf(priv->hw);
4026
8ccde88a 4027 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4028 iwl3945_commit_rxon(priv);
b481de9c 4029
28afaf91 4030 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 4031 iwl3945_setup_rxon_timing(priv);
518099a8 4032 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
4033 sizeof(priv->rxon_timing), &priv->rxon_timing);
4034 if (rc)
39aadf8c 4035 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
4036 "Attempting to continue.\n");
4037
8ccde88a 4038 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 4039
8ccde88a 4040 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c
ZY
4041
4042 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
4043 priv->assoc_id, priv->beacon_int);
4044
4045 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 4046 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 4047 else
8ccde88a 4048 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 4049
8ccde88a 4050 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 4051 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 4052 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 4053 else
8ccde88a 4054 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 4055
05c914fe 4056 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 4057 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
4058
4059 }
4060
bb8c093b 4061 iwl3945_commit_rxon(priv);
b481de9c
ZY
4062
4063 switch (priv->iw_mode) {
05c914fe 4064 case NL80211_IFTYPE_STATION:
bb8c093b 4065 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
4066 break;
4067
05c914fe 4068 case NL80211_IFTYPE_ADHOC:
b481de9c 4069
ce546fd2 4070 priv->assoc_id = 1;
bb8c093b 4071 iwl3945_add_station(priv, priv->bssid, 0, 0);
b481de9c 4072 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 4073 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
4074 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
4075 CMD_ASYNC);
bb8c093b
CH
4076 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
4077 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
4078
4079 break;
4080
4081 default:
15b1687c 4082 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 4083 __func__, priv->iw_mode);
b481de9c
ZY
4084 break;
4085 }
4086
bb8c093b 4087 iwl3945_activate_qos(priv, 0);
292ae174 4088
7878a5a4
MA
4089 /* we have just associated, don't start scan too early */
4090 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
4091}
4092
e8975581 4093static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
76bb77e0 4094
b481de9c
ZY
4095/*****************************************************************************
4096 *
4097 * mac80211 entry point functions
4098 *
4099 *****************************************************************************/
4100
5a66926a
ZY
4101#define UCODE_READY_TIMEOUT (2 * HZ)
4102
bb8c093b 4103static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 4104{
4a8a4322 4105 struct iwl_priv *priv = hw->priv;
5a66926a 4106 int ret;
b481de9c
ZY
4107
4108 IWL_DEBUG_MAC80211("enter\n");
4109
4110 /* we should be verifying the device is ready to be opened */
4111 mutex_lock(&priv->mutex);
4112
8ccde88a 4113 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
4114 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
4115 * ucode filename and max sizes are card-specific. */
4116
4117 if (!priv->ucode_code.len) {
4118 ret = iwl3945_read_ucode(priv);
4119 if (ret) {
15b1687c 4120 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
4121 mutex_unlock(&priv->mutex);
4122 goto out_release_irq;
4123 }
4124 }
b481de9c 4125
e655b9f0 4126 ret = __iwl3945_up(priv);
b481de9c
ZY
4127
4128 mutex_unlock(&priv->mutex);
5a66926a 4129
c0af96a6 4130 iwl_rfkill_set_hw_state(priv);
80fcc9e2 4131
e655b9f0
ZY
4132 if (ret)
4133 goto out_release_irq;
4134
4135 IWL_DEBUG_INFO("Start UP work.\n");
4136
4137 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
4138 return 0;
4139
5a66926a
ZY
4140 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
4141 * mac80211 will not be run successfully. */
4142 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
4143 test_bit(STATUS_READY, &priv->status),
4144 UCODE_READY_TIMEOUT);
4145 if (!ret) {
4146 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
4147 IWL_ERR(priv,
4148 "Wait for START_ALIVE timeout after %dms.\n",
4149 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
4150 ret = -ETIMEDOUT;
4151 goto out_release_irq;
4152 }
4153 }
4154
2663516d
HS
4155 /* ucode is running and will send rfkill notifications,
4156 * no need to poll the killswitch state anymore */
4157 cancel_delayed_work(&priv->rfkill_poll);
4158
e655b9f0 4159 priv->is_open = 1;
b481de9c
ZY
4160 IWL_DEBUG_MAC80211("leave\n");
4161 return 0;
5a66926a
ZY
4162
4163out_release_irq:
e655b9f0
ZY
4164 priv->is_open = 0;
4165 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 4166 return ret;
b481de9c
ZY
4167}
4168
bb8c093b 4169static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 4170{
4a8a4322 4171 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4172
4173 IWL_DEBUG_MAC80211("enter\n");
6ef89d0a 4174
e655b9f0
ZY
4175 if (!priv->is_open) {
4176 IWL_DEBUG_MAC80211("leave - skip\n");
4177 return;
4178 }
4179
b481de9c 4180 priv->is_open = 0;
5a66926a 4181
775a6e27 4182 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
4183 /* stop mac, cancel any scan request and clear
4184 * RXON_FILTER_ASSOC_MSK BIT
4185 */
5a66926a 4186 mutex_lock(&priv->mutex);
af0053d6 4187 iwl_scan_cancel_timeout(priv, 100);
fde3571f 4188 mutex_unlock(&priv->mutex);
fde3571f
MA
4189 }
4190
5a66926a
ZY
4191 iwl3945_down(priv);
4192
4193 flush_workqueue(priv->workqueue);
2663516d
HS
4194
4195 /* start polling the killswitch state again */
4196 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4197 round_jiffies_relative(2 * HZ));
6ef89d0a 4198
b481de9c 4199 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
4200}
4201
e039fa4a 4202static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4203{
4a8a4322 4204 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4205
4206 IWL_DEBUG_MAC80211("enter\n");
4207
b481de9c 4208 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 4209 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 4210
e039fa4a 4211 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
4212 dev_kfree_skb_any(skb);
4213
4214 IWL_DEBUG_MAC80211("leave\n");
637f8837 4215 return NETDEV_TX_OK;
b481de9c
ZY
4216}
4217
bb8c093b 4218static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
4219 struct ieee80211_if_init_conf *conf)
4220{
4a8a4322 4221 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4222 unsigned long flags;
4223
32bfd35d 4224 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 4225
32bfd35d
JB
4226 if (priv->vif) {
4227 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
864792e3 4228 return -EOPNOTSUPP;
b481de9c
ZY
4229 }
4230
4231 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 4232 priv->vif = conf->vif;
60294de3 4233 priv->iw_mode = conf->type;
b481de9c
ZY
4234
4235 spin_unlock_irqrestore(&priv->lock, flags);
4236
4237 mutex_lock(&priv->mutex);
864792e3
TW
4238
4239 if (conf->mac_addr) {
e174961c 4240 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
864792e3
TW
4241 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
4242 }
4243
775a6e27 4244 if (iwl_is_ready(priv))
5a66926a 4245 iwl3945_set_mode(priv, conf->type);
b481de9c 4246
b481de9c
ZY
4247 mutex_unlock(&priv->mutex);
4248
5a66926a 4249 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
4250 return 0;
4251}
4252
4253/**
bb8c093b 4254 * iwl3945_mac_config - mac80211 config callback
b481de9c
ZY
4255 *
4256 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
4257 * be set inappropriately and the driver currently sets the hardware up to
4258 * use it whenever needed.
4259 */
e8975581 4260static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 4261{
4a8a4322 4262 struct iwl_priv *priv = hw->priv;
d20b3c65 4263 const struct iwl_channel_info *ch_info;
e8975581 4264 struct ieee80211_conf *conf = &hw->conf;
b481de9c 4265 unsigned long flags;
76bb77e0 4266 int ret = 0;
b481de9c
ZY
4267
4268 mutex_lock(&priv->mutex);
8318d78a 4269 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 4270
775a6e27 4271 if (!iwl_is_ready(priv)) {
b481de9c 4272 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
4273 ret = -EIO;
4274 goto out;
b481de9c
ZY
4275 }
4276
df878d8f 4277 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
b481de9c 4278 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
4279 IWL_DEBUG_MAC80211("leave - scanning\n");
4280 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 4281 mutex_unlock(&priv->mutex);
a0646470 4282 return 0;
b481de9c
ZY
4283 }
4284
4285 spin_lock_irqsave(&priv->lock, flags);
4286
e6148917
SO
4287 ch_info = iwl_get_channel_info(priv, conf->channel->band,
4288 conf->channel->hw_value);
b481de9c 4289 if (!is_channel_valid(ch_info)) {
66b5004d 4290 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
8318d78a 4291 conf->channel->hw_value, conf->channel->band);
b481de9c
ZY
4292 IWL_DEBUG_MAC80211("leave - invalid channel\n");
4293 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
4294 ret = -EINVAL;
4295 goto out;
b481de9c
ZY
4296 }
4297
8ccde88a 4298 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 4299
8ccde88a 4300 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
4301
4302 /* The list of supported rates and rate mask can be different
4303 * for each phymode; since the phymode may have changed, reset
4304 * the rate mask to what mac80211 lists */
8ccde88a 4305 iwl_set_rate(priv);
b481de9c
ZY
4306
4307 spin_unlock_irqrestore(&priv->lock, flags);
4308
4309#ifdef IEEE80211_CONF_CHANNEL_SWITCH
4310 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 4311 iwl3945_hw_channel_switch(priv, conf->channel);
76bb77e0 4312 goto out;
b481de9c
ZY
4313 }
4314#endif
4315
bb8c093b 4316 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
4317
4318 if (!conf->radio_enabled) {
4319 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 4320 goto out;
b481de9c
ZY
4321 }
4322
775a6e27 4323 if (iwl_is_rfkill(priv)) {
b481de9c 4324 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
4325 ret = -EIO;
4326 goto out;
b481de9c
ZY
4327 }
4328
8ccde88a 4329 iwl_set_rate(priv);
b481de9c 4330
8ccde88a
SO
4331 if (memcmp(&priv->active_rxon,
4332 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 4333 iwl3945_commit_rxon(priv);
b481de9c
ZY
4334 else
4335 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
4336
4337 IWL_DEBUG_MAC80211("leave\n");
4338
76bb77e0 4339out:
a0646470 4340 clear_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 4341 mutex_unlock(&priv->mutex);
76bb77e0 4342 return ret;
b481de9c
ZY
4343}
4344
4a8a4322 4345static void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
4346{
4347 int rc = 0;
4348
d986bcd1 4349 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
4350 return;
4351
4352 /* The following should be done only at AP bring up */
8ccde88a 4353 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
4354
4355 /* RXON - unassoc (to set timing command) */
8ccde88a 4356 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4357 iwl3945_commit_rxon(priv);
b481de9c
ZY
4358
4359 /* RXON Timing */
28afaf91 4360 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 4361 iwl3945_setup_rxon_timing(priv);
518099a8
SO
4362 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
4363 sizeof(priv->rxon_timing),
4364 &priv->rxon_timing);
b481de9c 4365 if (rc)
39aadf8c 4366 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
4367 "Attempting to continue.\n");
4368
4369 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 4370 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 4371 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 4372 priv->staging_rxon.flags |=
b481de9c
ZY
4373 RXON_FLG_SHORT_PREAMBLE_MSK;
4374 else
8ccde88a 4375 priv->staging_rxon.flags &=
b481de9c
ZY
4376 ~RXON_FLG_SHORT_PREAMBLE_MSK;
4377
8ccde88a 4378 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
4379 if (priv->assoc_capability &
4380 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 4381 priv->staging_rxon.flags |=
b481de9c
ZY
4382 RXON_FLG_SHORT_SLOT_MSK;
4383 else
8ccde88a 4384 priv->staging_rxon.flags &=
b481de9c
ZY
4385 ~RXON_FLG_SHORT_SLOT_MSK;
4386
05c914fe 4387 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 4388 priv->staging_rxon.flags &=
b481de9c
ZY
4389 ~RXON_FLG_SHORT_SLOT_MSK;
4390 }
4391 /* restore RXON assoc */
8ccde88a 4392 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 4393 iwl3945_commit_rxon(priv);
b5323d36 4394 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
556f8db7 4395 }
bb8c093b 4396 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
4397
4398 /* FIXME - we need to add code here to detect a totally new
4399 * configuration, reset the AP, unassoc, rxon timing, assoc,
4400 * clear sta table, add BCAST sta... */
4401}
4402
32bfd35d
JB
4403static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
4404 struct ieee80211_vif *vif,
4a8a4322 4405 struct ieee80211_if_conf *conf)
b481de9c 4406{
4a8a4322 4407 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4408 int rc;
4409
4410 if (conf == NULL)
4411 return -EIO;
4412
b716bb91
EG
4413 if (priv->vif != vif) {
4414 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
4415 return 0;
4416 }
4417
9d139c81 4418 /* handle this temporarily here */
05c914fe 4419 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
4420 conf->changed & IEEE80211_IFCC_BEACON) {
4421 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
4422 if (!beacon)
4423 return -ENOMEM;
9bdf5eca 4424 mutex_lock(&priv->mutex);
9d139c81 4425 rc = iwl3945_mac_beacon_update(hw, beacon);
9bdf5eca 4426 mutex_unlock(&priv->mutex);
9d139c81
JB
4427 if (rc)
4428 return rc;
4429 }
4430
775a6e27 4431 if (!iwl_is_alive(priv))
5a66926a
ZY
4432 return -EAGAIN;
4433
b481de9c
ZY
4434 mutex_lock(&priv->mutex);
4435
b481de9c 4436 if (conf->bssid)
e174961c 4437 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 4438
4150c572
JB
4439/*
4440 * very dubious code was here; the probe filtering flag is never set:
4441 *
b481de9c
ZY
4442 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
4443 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 4444 */
b481de9c 4445
05c914fe 4446 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
4447 if (!conf->bssid) {
4448 conf->bssid = priv->mac_addr;
4449 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB
4450 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
4451 conf->bssid);
b481de9c
ZY
4452 }
4453 if (priv->ibss_beacon)
4454 dev_kfree_skb(priv->ibss_beacon);
4455
9d139c81 4456 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
4457 }
4458
775a6e27 4459 if (iwl_is_rfkill(priv))
fde3571f
MA
4460 goto done;
4461
b481de9c
ZY
4462 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
4463 !is_multicast_ether_addr(conf->bssid)) {
4464 /* If there is currently a HW scan going on in the background
4465 * then we need to cancel it else the RXON below will fail. */
af0053d6 4466 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 4467 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c
ZY
4468 "after 100ms\n");
4469 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
4470 mutex_unlock(&priv->mutex);
4471 return -EAGAIN;
4472 }
8ccde88a 4473 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
b481de9c
ZY
4474
4475 /* TODO: Audit driver for usage of these members and see
4476 * if mac80211 deprecates them (priv->bssid looks like it
4477 * shouldn't be there, but I haven't scanned the IBSS code
4478 * to verify) - jpk */
4479 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
4480
05c914fe 4481 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4482 iwl3945_config_ap(priv);
b481de9c 4483 else {
bb8c093b 4484 rc = iwl3945_commit_rxon(priv);
05c914fe 4485 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
bb8c093b 4486 iwl3945_add_station(priv,
8ccde88a 4487 priv->active_rxon.bssid_addr, 1, 0);
b481de9c
ZY
4488 }
4489
4490 } else {
af0053d6 4491 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4492 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4493 iwl3945_commit_rxon(priv);
b481de9c
ZY
4494 }
4495
fde3571f 4496 done:
b481de9c
ZY
4497 IWL_DEBUG_MAC80211("leave\n");
4498 mutex_unlock(&priv->mutex);
4499
4500 return 0;
4501}
4502
bb8c093b 4503static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
4504 struct ieee80211_if_init_conf *conf)
4505{
4a8a4322 4506 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4507
4508 IWL_DEBUG_MAC80211("enter\n");
4509
4510 mutex_lock(&priv->mutex);
6ef89d0a 4511
775a6e27 4512 if (iwl_is_ready_rf(priv)) {
af0053d6 4513 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4514 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
fde3571f
MA
4515 iwl3945_commit_rxon(priv);
4516 }
32bfd35d
JB
4517 if (priv->vif == conf->vif) {
4518 priv->vif = NULL;
b481de9c 4519 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
4520 }
4521 mutex_unlock(&priv->mutex);
4522
4523 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
4524}
4525
cd56d331
AK
4526#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
4527
4528static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
4529 struct ieee80211_vif *vif,
4530 struct ieee80211_bss_conf *bss_conf,
4531 u32 changes)
4532{
4a8a4322 4533 struct iwl_priv *priv = hw->priv;
cd56d331
AK
4534
4535 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
4536
4537 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
4538 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
4539 bss_conf->use_short_preamble);
4540 if (bss_conf->use_short_preamble)
8ccde88a 4541 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331 4542 else
8ccde88a
SO
4543 priv->staging_rxon.flags &=
4544 ~RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331
AK
4545 }
4546
4547 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
4548 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
4549 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
8ccde88a 4550 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
cd56d331 4551 else
8ccde88a 4552 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
cd56d331
AK
4553 }
4554
4555 if (changes & BSS_CHANGED_ASSOC) {
4556 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
4557 /* This should never happen as this function should
4558 * never be called from interrupt context. */
4559 if (WARN_ON_ONCE(in_interrupt()))
4560 return;
4561 if (bss_conf->assoc) {
4562 priv->assoc_id = bss_conf->aid;
4563 priv->beacon_int = bss_conf->beacon_int;
28afaf91 4564 priv->timestamp = bss_conf->timestamp;
cd56d331 4565 priv->assoc_capability = bss_conf->assoc_capability;
3dae0c42 4566 priv->power_data.dtim_period = bss_conf->dtim_period;
cd56d331
AK
4567 priv->next_scan_jiffies = jiffies +
4568 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4569 mutex_lock(&priv->mutex);
4570 iwl3945_post_associate(priv);
4571 mutex_unlock(&priv->mutex);
4572 } else {
4573 priv->assoc_id = 0;
4574 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
4575 }
8ccde88a 4576 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
cd56d331
AK
4577 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
4578 iwl3945_send_rxon_assoc(priv);
4579 }
4580
4581}
4582
bb8c093b 4583static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
4584{
4585 int rc = 0;
4586 unsigned long flags;
4a8a4322 4587 struct iwl_priv *priv = hw->priv;
9387b7ca 4588 DECLARE_SSID_BUF(ssid_buf);
b481de9c
ZY
4589
4590 IWL_DEBUG_MAC80211("enter\n");
4591
15e869d8 4592 mutex_lock(&priv->mutex);
b481de9c
ZY
4593 spin_lock_irqsave(&priv->lock, flags);
4594
775a6e27 4595 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
4596 rc = -EIO;
4597 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
4598 goto out_unlock;
4599 }
4600
7878a5a4
MA
4601 /* we don't schedule scan within next_scan_jiffies period */
4602 if (priv->next_scan_jiffies &&
4603 time_after(priv->next_scan_jiffies, jiffies)) {
4604 rc = -EAGAIN;
4605 goto out_unlock;
4606 }
15dbf1b7
BM
4607 /* if we just finished scan ask for delay for a broadcast scan */
4608 if ((len == 0) && priv->last_scan_jiffies &&
4609 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
4610 jiffies)) {
b481de9c
ZY
4611 rc = -EAGAIN;
4612 goto out_unlock;
4613 }
4614 if (len) {
7878a5a4 4615 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
9387b7ca 4616 print_ssid(ssid_buf, ssid, len), (int)len);
b481de9c
ZY
4617
4618 priv->one_direct_scan = 1;
4619 priv->direct_ssid_len = (u8)
4620 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
4621 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6ef89d0a
MA
4622 } else
4623 priv->one_direct_scan = 0;
b481de9c 4624
bb8c093b 4625 rc = iwl3945_scan_initiate(priv);
b481de9c
ZY
4626
4627 IWL_DEBUG_MAC80211("leave\n");
4628
4629out_unlock:
4630 spin_unlock_irqrestore(&priv->lock, flags);
15e869d8 4631 mutex_unlock(&priv->mutex);
b481de9c
ZY
4632
4633 return rc;
4634}
4635
bb8c093b 4636static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
4637 struct ieee80211_vif *vif,
4638 struct ieee80211_sta *sta,
4639 struct ieee80211_key_conf *key)
b481de9c 4640{
4a8a4322 4641 struct iwl_priv *priv = hw->priv;
dc822b5d 4642 const u8 *addr;
42986796 4643 int ret;
b481de9c
ZY
4644 u8 sta_id;
4645
4646 IWL_DEBUG_MAC80211("enter\n");
4647
df878d8f 4648 if (iwl3945_mod_params.sw_crypto) {
b481de9c
ZY
4649 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
4650 return -EOPNOTSUPP;
4651 }
4652
42986796 4653 addr = sta ? sta->addr : iwl_bcast_addr;
bb8c093b 4654 sta_id = iwl3945_hw_find_station(priv, addr);
b481de9c 4655 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB
4656 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
4657 addr);
b481de9c
ZY
4658 return -EINVAL;
4659 }
4660
4661 mutex_lock(&priv->mutex);
4662
af0053d6 4663 iwl_scan_cancel_timeout(priv, 100);
15e869d8 4664
b481de9c
ZY
4665 switch (cmd) {
4666 case SET_KEY:
42986796
WT
4667 ret = iwl3945_update_sta_key_info(priv, key, sta_id);
4668 if (!ret) {
8ccde88a 4669 iwl_set_rxon_hwcrypto(priv, 1);
bb8c093b 4670 iwl3945_commit_rxon(priv);
b481de9c
ZY
4671 key->hw_key_idx = sta_id;
4672 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
4673 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4674 }
4675 break;
4676 case DISABLE_KEY:
42986796
WT
4677 ret = iwl3945_clear_sta_key_info(priv, sta_id);
4678 if (!ret) {
8ccde88a 4679 iwl_set_rxon_hwcrypto(priv, 0);
bb8c093b 4680 iwl3945_commit_rxon(priv);
b481de9c
ZY
4681 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
4682 }
4683 break;
4684 default:
42986796 4685 ret = -EINVAL;
b481de9c
ZY
4686 }
4687
4688 IWL_DEBUG_MAC80211("leave\n");
4689 mutex_unlock(&priv->mutex);
4690
42986796 4691 return ret;
b481de9c
ZY
4692}
4693
e100bb64 4694static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
4695 const struct ieee80211_tx_queue_params *params)
4696{
4a8a4322 4697 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4698 unsigned long flags;
4699 int q;
b481de9c
ZY
4700
4701 IWL_DEBUG_MAC80211("enter\n");
4702
775a6e27 4703 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
4704 IWL_DEBUG_MAC80211("leave - RF not ready\n");
4705 return -EIO;
4706 }
4707
4708 if (queue >= AC_NUM) {
4709 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
4710 return 0;
4711 }
4712
b481de9c
ZY
4713 q = AC_NUM - 1 - queue;
4714
4715 spin_lock_irqsave(&priv->lock, flags);
4716
4717 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
4718 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
4719 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4720 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 4721 cpu_to_le16((params->txop * 32));
b481de9c
ZY
4722
4723 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4724 priv->qos_data.qos_active = 1;
4725
4726 spin_unlock_irqrestore(&priv->lock, flags);
4727
4728 mutex_lock(&priv->mutex);
05c914fe 4729 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4730 iwl3945_activate_qos(priv, 1);
8ccde88a 4731 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 4732 iwl3945_activate_qos(priv, 0);
b481de9c
ZY
4733
4734 mutex_unlock(&priv->mutex);
4735
b481de9c
ZY
4736 IWL_DEBUG_MAC80211("leave\n");
4737 return 0;
4738}
4739
bb8c093b 4740static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
4741 struct ieee80211_tx_queue_stats *stats)
4742{
4a8a4322 4743 struct iwl_priv *priv = hw->priv;
b481de9c 4744 int i, avail;
188cf6c7 4745 struct iwl_tx_queue *txq;
d20b3c65 4746 struct iwl_queue *q;
b481de9c
ZY
4747 unsigned long flags;
4748
4749 IWL_DEBUG_MAC80211("enter\n");
4750
775a6e27 4751 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
4752 IWL_DEBUG_MAC80211("leave - RF not ready\n");
4753 return -EIO;
4754 }
4755
4756 spin_lock_irqsave(&priv->lock, flags);
4757
4758 for (i = 0; i < AC_NUM; i++) {
188cf6c7 4759 txq = &priv->txq[i];
b481de9c 4760 q = &txq->q;
d20b3c65 4761 avail = iwl_queue_space(q);
b481de9c 4762
57ffc589
JB
4763 stats[i].len = q->n_window - avail;
4764 stats[i].limit = q->n_window - q->high_mark;
4765 stats[i].count = q->n_window;
b481de9c
ZY
4766
4767 }
4768 spin_unlock_irqrestore(&priv->lock, flags);
4769
4770 IWL_DEBUG_MAC80211("leave\n");
4771
4772 return 0;
4773}
4774
bb8c093b 4775static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 4776{
4a8a4322 4777 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4778 unsigned long flags;
4779
4780 mutex_lock(&priv->mutex);
4781 IWL_DEBUG_MAC80211("enter\n");
4782
775a6e27 4783 iwl_reset_qos(priv);
292ae174 4784
b481de9c
ZY
4785 spin_lock_irqsave(&priv->lock, flags);
4786 priv->assoc_id = 0;
4787 priv->assoc_capability = 0;
b481de9c
ZY
4788
4789 /* new association get rid of ibss beacon skb */
4790 if (priv->ibss_beacon)
4791 dev_kfree_skb(priv->ibss_beacon);
4792
4793 priv->ibss_beacon = NULL;
4794
4795 priv->beacon_int = priv->hw->conf.beacon_int;
28afaf91 4796 priv->timestamp = 0;
05c914fe 4797 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
4798 priv->beacon_int = 0;
4799
4800 spin_unlock_irqrestore(&priv->lock, flags);
4801
775a6e27 4802 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
4803 IWL_DEBUG_MAC80211("leave - not ready\n");
4804 mutex_unlock(&priv->mutex);
4805 return;
4806 }
4807
15e869d8
MA
4808 /* we are restarting association process
4809 * clear RXON_FILTER_ASSOC_MSK bit
4810 */
05c914fe 4811 if (priv->iw_mode != NL80211_IFTYPE_AP) {
af0053d6 4812 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4813 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4814 iwl3945_commit_rxon(priv);
15e869d8
MA
4815 }
4816
b481de9c 4817 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 4818 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
15e869d8 4819
b481de9c
ZY
4820 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
4821 mutex_unlock(&priv->mutex);
4822 return;
b481de9c
ZY
4823 }
4824
8ccde88a 4825 iwl_set_rate(priv);
b481de9c
ZY
4826
4827 mutex_unlock(&priv->mutex);
4828
4829 IWL_DEBUG_MAC80211("leave\n");
4830
4831}
4832
e039fa4a 4833static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4834{
4a8a4322 4835 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4836 unsigned long flags;
4837
b481de9c
ZY
4838 IWL_DEBUG_MAC80211("enter\n");
4839
775a6e27 4840 if (!iwl_is_ready_rf(priv)) {
b481de9c 4841 IWL_DEBUG_MAC80211("leave - RF not ready\n");
b481de9c
ZY
4842 return -EIO;
4843 }
4844
05c914fe 4845 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c 4846 IWL_DEBUG_MAC80211("leave - not IBSS\n");
b481de9c
ZY
4847 return -EIO;
4848 }
4849
4850 spin_lock_irqsave(&priv->lock, flags);
4851
4852 if (priv->ibss_beacon)
4853 dev_kfree_skb(priv->ibss_beacon);
4854
4855 priv->ibss_beacon = skb;
4856
4857 priv->assoc_id = 0;
4858
4859 IWL_DEBUG_MAC80211("leave\n");
4860 spin_unlock_irqrestore(&priv->lock, flags);
4861
775a6e27 4862 iwl_reset_qos(priv);
b481de9c 4863
dc4b1e7d 4864 iwl3945_post_associate(priv);
b481de9c 4865
b481de9c
ZY
4866
4867 return 0;
4868}
4869
4870/*****************************************************************************
4871 *
4872 * sysfs attributes
4873 *
4874 *****************************************************************************/
4875
d08853a3 4876#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4877
4878/*
4879 * The following adds a new attribute to the sysfs representation
4880 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
4881 * used for controlling the debug level.
4882 *
4883 * See the level definitions in iwl for details.
4884 */
40b8ec0b
SO
4885static ssize_t show_debug_level(struct device *d,
4886 struct device_attribute *attr, char *buf)
b481de9c 4887{
4a8a4322 4888 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4889
4890 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 4891}
40b8ec0b
SO
4892static ssize_t store_debug_level(struct device *d,
4893 struct device_attribute *attr,
b481de9c
ZY
4894 const char *buf, size_t count)
4895{
4a8a4322 4896 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4897 unsigned long val;
4898 int ret;
b481de9c 4899
40b8ec0b
SO
4900 ret = strict_strtoul(buf, 0, &val);
4901 if (ret)
978785a3 4902 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 4903 else
40b8ec0b 4904 priv->debug_level = val;
b481de9c
ZY
4905
4906 return strnlen(buf, count);
4907}
4908
40b8ec0b
SO
4909static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
4910 show_debug_level, store_debug_level);
b481de9c 4911
d08853a3 4912#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 4913
b481de9c
ZY
4914static ssize_t show_temperature(struct device *d,
4915 struct device_attribute *attr, char *buf)
4916{
4a8a4322 4917 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4918
775a6e27 4919 if (!iwl_is_alive(priv))
b481de9c
ZY
4920 return -EAGAIN;
4921
bb8c093b 4922 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
4923}
4924
4925static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4926
b481de9c
ZY
4927static ssize_t show_tx_power(struct device *d,
4928 struct device_attribute *attr, char *buf)
4929{
4a8a4322 4930 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 4931 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
4932}
4933
4934static ssize_t store_tx_power(struct device *d,
4935 struct device_attribute *attr,
4936 const char *buf, size_t count)
4937{
4a8a4322 4938 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4939 char *p = (char *)buf;
4940 u32 val;
4941
4942 val = simple_strtoul(p, &p, 10);
4943 if (p == buf)
978785a3 4944 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 4945 else
bb8c093b 4946 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
4947
4948 return count;
4949}
4950
4951static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4952
4953static ssize_t show_flags(struct device *d,
4954 struct device_attribute *attr, char *buf)
4955{
4a8a4322 4956 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4957
8ccde88a 4958 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
4959}
4960
4961static ssize_t store_flags(struct device *d,
4962 struct device_attribute *attr,
4963 const char *buf, size_t count)
4964{
4a8a4322 4965 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4966 u32 flags = simple_strtoul(buf, NULL, 0);
4967
4968 mutex_lock(&priv->mutex);
8ccde88a 4969 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 4970 /* Cancel any currently running scans... */
af0053d6 4971 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4972 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c
ZY
4973 else {
4974 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
4975 flags);
8ccde88a 4976 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 4977 iwl3945_commit_rxon(priv);
b481de9c
ZY
4978 }
4979 }
4980 mutex_unlock(&priv->mutex);
4981
4982 return count;
4983}
4984
4985static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4986
4987static ssize_t show_filter_flags(struct device *d,
4988 struct device_attribute *attr, char *buf)
4989{
4a8a4322 4990 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4991
4992 return sprintf(buf, "0x%04X\n",
8ccde88a 4993 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
4994}
4995
4996static ssize_t store_filter_flags(struct device *d,
4997 struct device_attribute *attr,
4998 const char *buf, size_t count)
4999{
4a8a4322 5000 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
5001 u32 filter_flags = simple_strtoul(buf, NULL, 0);
5002
5003 mutex_lock(&priv->mutex);
8ccde88a 5004 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 5005 /* Cancel any currently running scans... */
af0053d6 5006 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 5007 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c
ZY
5008 else {
5009 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
5010 "0x%04X\n", filter_flags);
8ccde88a 5011 priv->staging_rxon.filter_flags =
b481de9c 5012 cpu_to_le32(filter_flags);
bb8c093b 5013 iwl3945_commit_rxon(priv);
b481de9c
ZY
5014 }
5015 }
5016 mutex_unlock(&priv->mutex);
5017
5018 return count;
5019}
5020
5021static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
5022 store_filter_flags);
5023
c8b0e6e1 5024#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
5025
5026static ssize_t show_measurement(struct device *d,
5027 struct device_attribute *attr, char *buf)
5028{
4a8a4322 5029 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 5030 struct iwl_spectrum_notification measure_report;
b481de9c 5031 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 5032 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
5033 unsigned long flags;
5034
5035 spin_lock_irqsave(&priv->lock, flags);
5036 if (!(priv->measurement_status & MEASUREMENT_READY)) {
5037 spin_unlock_irqrestore(&priv->lock, flags);
5038 return 0;
5039 }
5040 memcpy(&measure_report, &priv->measure_report, size);
5041 priv->measurement_status = 0;
5042 spin_unlock_irqrestore(&priv->lock, flags);
5043
5044 while (size && (PAGE_SIZE - len)) {
5045 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
5046 PAGE_SIZE - len, 1);
5047 len = strlen(buf);
5048 if (PAGE_SIZE - len)
5049 buf[len++] = '\n';
5050
5051 ofs += 16;
5052 size -= min(size, 16U);
5053 }
5054
5055 return len;
5056}
5057
5058static ssize_t store_measurement(struct device *d,
5059 struct device_attribute *attr,
5060 const char *buf, size_t count)
5061{
4a8a4322 5062 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 5063 struct ieee80211_measurement_params params = {
8ccde88a 5064 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
5065 .start_time = cpu_to_le64(priv->last_tsf),
5066 .duration = cpu_to_le16(1),
5067 };
5068 u8 type = IWL_MEASURE_BASIC;
5069 u8 buffer[32];
5070 u8 channel;
5071
5072 if (count) {
5073 char *p = buffer;
5074 strncpy(buffer, buf, min(sizeof(buffer), count));
5075 channel = simple_strtoul(p, NULL, 0);
5076 if (channel)
5077 params.channel = channel;
5078
5079 p = buffer;
5080 while (*p && *p != ' ')
5081 p++;
5082 if (*p)
5083 type = simple_strtoul(p + 1, NULL, 0);
5084 }
5085
5086 IWL_DEBUG_INFO("Invoking measurement of type %d on "
5087 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 5088 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
5089
5090 return count;
5091}
5092
5093static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
5094 show_measurement, store_measurement);
c8b0e6e1 5095#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 5096
b481de9c
ZY
5097static ssize_t store_retry_rate(struct device *d,
5098 struct device_attribute *attr,
5099 const char *buf, size_t count)
5100{
4a8a4322 5101 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
5102
5103 priv->retry_rate = simple_strtoul(buf, NULL, 0);
5104 if (priv->retry_rate <= 0)
5105 priv->retry_rate = 1;
5106
5107 return count;
5108}
5109
5110static ssize_t show_retry_rate(struct device *d,
5111 struct device_attribute *attr, char *buf)
5112{
4a8a4322 5113 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
5114 return sprintf(buf, "%d", priv->retry_rate);
5115}
5116
5117static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
5118 store_retry_rate);
5119
5120static ssize_t store_power_level(struct device *d,
5121 struct device_attribute *attr,
5122 const char *buf, size_t count)
5123{
4a8a4322 5124 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
5125 int rc;
5126 int mode;
5127
5128 mode = simple_strtoul(buf, NULL, 0);
5129 mutex_lock(&priv->mutex);
5130
775a6e27 5131 if (!iwl_is_ready(priv)) {
b481de9c
ZY
5132 rc = -EAGAIN;
5133 goto out;
5134 }
5135
1125eff3
SO
5136 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
5137 (mode == IWL39_POWER_AC))
5138 mode = IWL39_POWER_AC;
b481de9c
ZY
5139 else
5140 mode |= IWL_POWER_ENABLED;
5141
5142 if (mode != priv->power_mode) {
bb8c093b 5143 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY
5144 if (rc) {
5145 IWL_DEBUG_MAC80211("failed setting power mode.\n");
5146 goto out;
5147 }
5148 priv->power_mode = mode;
5149 }
5150
5151 rc = count;
5152
5153 out:
5154 mutex_unlock(&priv->mutex);
5155 return rc;
5156}
5157
5158#define MAX_WX_STRING 80
5159
5160/* Values are in microsecond */
5161static const s32 timeout_duration[] = {
5162 350000,
5163 250000,
5164 75000,
5165 37000,
5166 25000,
5167};
5168static const s32 period_duration[] = {
5169 400000,
5170 700000,
5171 1000000,
5172 1000000,
5173 1000000
5174};
5175
5176static ssize_t show_power_level(struct device *d,
5177 struct device_attribute *attr, char *buf)
5178{
4a8a4322 5179 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
5180 int level = IWL_POWER_LEVEL(priv->power_mode);
5181 char *p = buf;
5182
5183 p += sprintf(p, "%d ", level);
5184 switch (level) {
5185 case IWL_POWER_MODE_CAM:
1125eff3 5186 case IWL39_POWER_AC:
b481de9c
ZY
5187 p += sprintf(p, "(AC)");
5188 break;
1125eff3 5189 case IWL39_POWER_BATTERY:
b481de9c
ZY
5190 p += sprintf(p, "(BATTERY)");
5191 break;
5192 default:
5193 p += sprintf(p,
5194 "(Timeout %dms, Period %dms)",
5195 timeout_duration[level - 1] / 1000,
5196 period_duration[level - 1] / 1000);
5197 }
5198
5199 if (!(priv->power_mode & IWL_POWER_ENABLED))
5200 p += sprintf(p, " OFF\n");
5201 else
5202 p += sprintf(p, " \n");
5203
3ac7f146 5204 return p - buf + 1;
b481de9c
ZY
5205
5206}
5207
5208static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
5209 store_power_level);
5210
5211static ssize_t show_channels(struct device *d,
5212 struct device_attribute *attr, char *buf)
5213{
8318d78a
JB
5214 /* all this shit doesn't belong into sysfs anyway */
5215 return 0;
b481de9c
ZY
5216}
5217
5218static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
5219
5220static ssize_t show_statistics(struct device *d,
5221 struct device_attribute *attr, char *buf)
5222{
4a8a4322 5223 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 5224 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 5225 u32 len = 0, ofs = 0;
f2c7e521 5226 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
5227 int rc = 0;
5228
775a6e27 5229 if (!iwl_is_alive(priv))
b481de9c
ZY
5230 return -EAGAIN;
5231
5232 mutex_lock(&priv->mutex);
17f841cd 5233 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
5234 mutex_unlock(&priv->mutex);
5235
5236 if (rc) {
5237 len = sprintf(buf,
5238 "Error sending statistics request: 0x%08X\n", rc);
5239 return len;
5240 }
5241
5242 while (size && (PAGE_SIZE - len)) {
5243 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
5244 PAGE_SIZE - len, 1);
5245 len = strlen(buf);
5246 if (PAGE_SIZE - len)
5247 buf[len++] = '\n';
5248
5249 ofs += 16;
5250 size -= min(size, 16U);
5251 }
5252
5253 return len;
5254}
5255
5256static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
5257
5258static ssize_t show_antenna(struct device *d,
5259 struct device_attribute *attr, char *buf)
5260{
4a8a4322 5261 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 5262
775a6e27 5263 if (!iwl_is_alive(priv))
b481de9c
ZY
5264 return -EAGAIN;
5265
7e4bca5e 5266 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
5267}
5268
5269static ssize_t store_antenna(struct device *d,
5270 struct device_attribute *attr,
5271 const char *buf, size_t count)
5272{
5273 int ant;
4a8a4322 5274 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
5275
5276 if (count == 0)
5277 return 0;
5278
5279 if (sscanf(buf, "%1i", &ant) != 1) {
5280 IWL_DEBUG_INFO("not in hex or decimal form.\n");
5281 return count;
5282 }
5283
5284 if ((ant >= 0) && (ant <= 2)) {
5285 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7e4bca5e 5286 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c
ZY
5287 } else
5288 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
5289
5290
5291 return count;
5292}
5293
5294static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
5295
5296static ssize_t show_status(struct device *d,
5297 struct device_attribute *attr, char *buf)
5298{
4a8a4322 5299 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 5300 if (!iwl_is_alive(priv))
b481de9c
ZY
5301 return -EAGAIN;
5302 return sprintf(buf, "0x%08x\n", (int)priv->status);
5303}
5304
5305static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
5306
5307static ssize_t dump_error_log(struct device *d,
5308 struct device_attribute *attr,
5309 const char *buf, size_t count)
5310{
5311 char *p = (char *)buf;
5312
5313 if (p[0] == '1')
4a8a4322 5314 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
5315
5316 return strnlen(buf, count);
5317}
5318
5319static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
5320
5321static ssize_t dump_event_log(struct device *d,
5322 struct device_attribute *attr,
5323 const char *buf, size_t count)
5324{
5325 char *p = (char *)buf;
5326
5327 if (p[0] == '1')
4a8a4322 5328 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
5329
5330 return strnlen(buf, count);
5331}
5332
5333static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
5334
5335/*****************************************************************************
5336 *
a96a27f9 5337 * driver setup and tear down
b481de9c
ZY
5338 *
5339 *****************************************************************************/
5340
4a8a4322 5341static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
5342{
5343 priv->workqueue = create_workqueue(DRV_NAME);
5344
5345 init_waitqueue_head(&priv->wait_command_queue);
5346
bb8c093b
CH
5347 INIT_WORK(&priv->up, iwl3945_bg_up);
5348 INIT_WORK(&priv->restart, iwl3945_bg_restart);
5349 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 5350 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 5351 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
5352 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
5353 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 5354 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
5355 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
5356 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
5357 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
5358 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
5359
5360 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
5361
5362 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 5363 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
5364}
5365
4a8a4322 5366static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 5367{
bb8c093b 5368 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 5369
e47eb6ad 5370 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
5371 cancel_delayed_work(&priv->scan_check);
5372 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
5373 cancel_work_sync(&priv->beacon_update);
5374}
5375
bb8c093b 5376static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
5377 &dev_attr_antenna.attr,
5378 &dev_attr_channels.attr,
5379 &dev_attr_dump_errors.attr,
5380 &dev_attr_dump_events.attr,
5381 &dev_attr_flags.attr,
5382 &dev_attr_filter_flags.attr,
c8b0e6e1 5383#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
5384 &dev_attr_measurement.attr,
5385#endif
5386 &dev_attr_power_level.attr,
b481de9c 5387 &dev_attr_retry_rate.attr,
b481de9c
ZY
5388 &dev_attr_statistics.attr,
5389 &dev_attr_status.attr,
5390 &dev_attr_temperature.attr,
b481de9c 5391 &dev_attr_tx_power.attr,
d08853a3 5392#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
5393 &dev_attr_debug_level.attr,
5394#endif
b481de9c
ZY
5395 NULL
5396};
5397
bb8c093b 5398static struct attribute_group iwl3945_attribute_group = {
b481de9c 5399 .name = NULL, /* put in device directory */
bb8c093b 5400 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
5401};
5402
bb8c093b
CH
5403static struct ieee80211_ops iwl3945_hw_ops = {
5404 .tx = iwl3945_mac_tx,
5405 .start = iwl3945_mac_start,
5406 .stop = iwl3945_mac_stop,
5407 .add_interface = iwl3945_mac_add_interface,
5408 .remove_interface = iwl3945_mac_remove_interface,
5409 .config = iwl3945_mac_config,
5410 .config_interface = iwl3945_mac_config_interface,
8ccde88a 5411 .configure_filter = iwl_configure_filter,
bb8c093b 5412 .set_key = iwl3945_mac_set_key,
bb8c093b
CH
5413 .get_tx_stats = iwl3945_mac_get_tx_stats,
5414 .conf_tx = iwl3945_mac_conf_tx,
bb8c093b 5415 .reset_tsf = iwl3945_mac_reset_tsf,
cd56d331 5416 .bss_info_changed = iwl3945_bss_info_changed,
bb8c093b 5417 .hw_scan = iwl3945_mac_hw_scan
b481de9c
ZY
5418};
5419
e52119c5 5420static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
5421{
5422 int ret;
e6148917 5423 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
5424
5425 priv->retry_rate = 1;
5426 priv->ibss_beacon = NULL;
5427
5428 spin_lock_init(&priv->lock);
3dae0c42 5429 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
5430 spin_lock_init(&priv->sta_lock);
5431 spin_lock_init(&priv->hcmd_lock);
5432
5433 INIT_LIST_HEAD(&priv->free_frames);
5434
5435 mutex_init(&priv->mutex);
5436
5437 /* Clear the driver's (not device's) station table */
5438 iwl3945_clear_stations_table(priv);
5439
5440 priv->data_retry_limit = -1;
5441 priv->ieee_channels = NULL;
5442 priv->ieee_rates = NULL;
5443 priv->band = IEEE80211_BAND_2GHZ;
5444
5445 priv->iw_mode = NL80211_IFTYPE_STATION;
5446
5447 iwl_reset_qos(priv);
5448
5449 priv->qos_data.qos_active = 0;
5450 priv->qos_data.qos_cap.val = 0;
5451
5452 priv->rates_mask = IWL_RATES_MASK;
5453 /* If power management is turned on, default to AC mode */
c7a7c8ec 5454 priv->power_mode = IWL39_POWER_AC;
62ea9c5b 5455 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 5456
e6148917
SO
5457 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
5458 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
5459 eeprom->version);
5460 ret = -EINVAL;
5461 goto err;
5462 }
5463 ret = iwl_init_channel_map(priv);
90a30a02
KA
5464 if (ret) {
5465 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
5466 goto err;
5467 }
5468
e6148917
SO
5469 /* Set up txpower settings in driver for all channels */
5470 if (iwl3945_txpower_set_from_eeprom(priv)) {
5471 ret = -EIO;
5472 goto err_free_channel_map;
5473 }
5474
534166de 5475 ret = iwlcore_init_geos(priv);
90a30a02
KA
5476 if (ret) {
5477 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
5478 goto err_free_channel_map;
5479 }
534166de
SO
5480 iwl3945_init_hw_rates(priv, priv->ieee_rates);
5481
5482 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5483 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5484 &priv->bands[IEEE80211_BAND_2GHZ];
5485 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5486 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5487 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02
KA
5488
5489 return 0;
5490
5491err_free_channel_map:
e6148917 5492 iwl_free_channel_map(priv);
90a30a02
KA
5493err:
5494 return ret;
5495}
5496
bb8c093b 5497static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
5498{
5499 int err = 0;
4a8a4322 5500 struct iwl_priv *priv;
b481de9c 5501 struct ieee80211_hw *hw;
c0f20d91 5502 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 5503 struct iwl3945_eeprom *eeprom;
0359facc 5504 unsigned long flags;
b481de9c 5505
cee53ddb
KA
5506 /***********************
5507 * 1. Allocating HW data
5508 * ********************/
5509
b481de9c
ZY
5510 /* mac80211 allocates memory for this device instance, including
5511 * space for this driver's private structure */
90a30a02 5512 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 5513 if (hw == NULL) {
a3139c59 5514 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
5515 err = -ENOMEM;
5516 goto out;
5517 }
b481de9c 5518 priv = hw->priv;
90a30a02 5519 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 5520
df878d8f
KA
5521 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
5522 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
5523 IWL_ERR(priv,
5524 "invalid queues_num, should be between %d and %d\n",
5525 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59
SO
5526 err = -EINVAL;
5527 goto out;
5528 }
5529
90a30a02
KA
5530 /*
5531 * Disabling hardware scan means that mac80211 will perform scans
5532 * "the hard way", rather than using device's scan.
5533 */
df878d8f 5534 if (iwl3945_mod_params.disable_hw_scan) {
40b8ec0b
SO
5535 IWL_DEBUG_INFO("Disabling hw_scan\n");
5536 iwl3945_hw_ops.hw_scan = NULL;
5537 }
5538
90a30a02 5539
cee53ddb 5540 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
90a30a02
KA
5541 priv->cfg = cfg;
5542 priv->pci_dev = pdev;
cee53ddb 5543
d08853a3 5544#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 5545 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
5546 atomic_set(&priv->restrict_refcnt, 0);
5547#endif
90a30a02
KA
5548 hw->rate_control_algorithm = "iwl-3945-rs";
5549 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
5550
566bfe5a 5551 /* Tell mac80211 our characteristics */
605a0bd6 5552 hw->flags = IEEE80211_HW_SIGNAL_DBM |
566bfe5a 5553 IEEE80211_HW_NOISE_DBM;
b481de9c 5554
f59ac048 5555 hw->wiphy->interface_modes =
f59ac048
LR
5556 BIT(NL80211_IFTYPE_STATION) |
5557 BIT(NL80211_IFTYPE_ADHOC);
5558
2a44f911 5559 hw->wiphy->custom_regulatory = true;
ea4a82dc 5560
6440adb5 5561 /* 4 EDCA QOS priorities */
b481de9c
ZY
5562 hw->queues = 4;
5563
cee53ddb
KA
5564 /***************************
5565 * 2. Initializing PCI bus
5566 * *************************/
b481de9c
ZY
5567 if (pci_enable_device(pdev)) {
5568 err = -ENODEV;
5569 goto out_ieee80211_free_hw;
5570 }
5571
5572 pci_set_master(pdev);
5573
b481de9c
ZY
5574 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
5575 if (!err)
5576 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
5577 if (err) {
978785a3 5578 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
5579 goto out_pci_disable_device;
5580 }
5581
5582 pci_set_drvdata(pdev, priv);
5583 err = pci_request_regions(pdev, DRV_NAME);
5584 if (err)
5585 goto out_pci_disable_device;
6440adb5 5586
cee53ddb
KA
5587 /***********************
5588 * 3. Read REV Register
5589 * ********************/
b481de9c
ZY
5590 priv->hw_base = pci_iomap(pdev, 0, 0);
5591 if (!priv->hw_base) {
5592 err = -ENODEV;
5593 goto out_pci_release_regions;
5594 }
5595
5596 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
5597 (unsigned long long) pci_resource_len(pdev, 0));
5598 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
5599
cee53ddb
KA
5600 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5601 * PCI Tx retries from interfering with C3 CPU state */
5602 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 5603
90a30a02
KA
5604 /* amp init */
5605 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 5606 if (err < 0) {
90a30a02
KA
5607 IWL_DEBUG_INFO("Failed to init APMG\n");
5608 goto out_iounmap;
cee53ddb 5609 }
b481de9c 5610
cee53ddb
KA
5611 /***********************
5612 * 4. Read EEPROM
5613 * ********************/
90a30a02 5614
cee53ddb 5615 /* Read the EEPROM */
e6148917 5616 err = iwl_eeprom_init(priv);
cee53ddb 5617 if (err) {
15b1687c 5618 IWL_ERR(priv, "Unable to init EEPROM\n");
cee53ddb
KA
5619 goto out_remove_sysfs;
5620 }
5621 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
5622 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
5623 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
cee53ddb
KA
5624 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
5625 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 5626
cee53ddb
KA
5627 /***********************
5628 * 5. Setup HW Constants
5629 * ********************/
b481de9c 5630 /* Device-specific setup */
3832ec9d 5631 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 5632 IWL_ERR(priv, "failed to set hw settings\n");
b481de9c
ZY
5633 goto out_iounmap;
5634 }
5635
cee53ddb
KA
5636 /***********************
5637 * 6. Setup priv
5638 * ********************/
cee53ddb 5639
90a30a02 5640 err = iwl3945_init_drv(priv);
b481de9c 5641 if (err) {
90a30a02
KA
5642 IWL_ERR(priv, "initializing driver failed\n");
5643 goto out_free_geos;
b481de9c
ZY
5644 }
5645
978785a3
TW
5646 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
5647 priv->cfg->name);
cee53ddb
KA
5648
5649 /***********************************
5650 * 7. Initialize Module Parameters
5651 * **********************************/
5652
5653 /* Initialize module parameter values here */
5654 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 5655 if (iwl3945_mod_params.disable) {
cee53ddb
KA
5656 set_bit(STATUS_RF_KILL_SW, &priv->status);
5657 IWL_DEBUG_INFO("Radio disabled.\n");
849e0dce
RC
5658 }
5659
cee53ddb
KA
5660
5661 /***********************
5662 * 8. Setup Services
5663 * ********************/
5664
5665 spin_lock_irqsave(&priv->lock, flags);
5666 iwl3945_disable_interrupts(priv);
5667 spin_unlock_irqrestore(&priv->lock, flags);
5668
2663516d
HS
5669 pci_enable_msi(priv->pci_dev);
5670
5671 err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
5672 DRV_NAME, priv);
5673 if (err) {
5674 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5675 goto out_disable_msi;
5676 }
5677
cee53ddb 5678 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5679 if (err) {
15b1687c 5680 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 5681 goto out_release_irq;
849e0dce 5682 }
849e0dce 5683
8ccde88a
SO
5684 iwl_set_rxon_channel(priv,
5685 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
5686 iwl3945_setup_deferred_work(priv);
5687 iwl3945_setup_rx_handlers(priv);
5688
cee53ddb 5689 /*********************************
2663516d 5690 * 9. Setup and Register mac80211
cee53ddb
KA
5691 * *******************************/
5692
5a66926a
ZY
5693 err = ieee80211_register_hw(priv->hw);
5694 if (err) {
15b1687c 5695 IWL_ERR(priv, "Failed to register network device: %d\n", err);
cee53ddb 5696 goto out_remove_sysfs;
5a66926a 5697 }
b481de9c 5698
5a66926a
ZY
5699 priv->hw->conf.beacon_int = 100;
5700 priv->mac80211_registered = 1;
cee53ddb 5701
c0af96a6 5702 err = iwl_rfkill_init(priv);
ebef2008 5703 if (err)
15b1687c 5704 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008
AK
5705 "Ignoring error: %d\n", err);
5706
2663516d
HS
5707 /* Start monitoring the killswitch */
5708 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5709 2 * HZ);
5710
b481de9c
ZY
5711 return 0;
5712
cee53ddb
KA
5713 out_remove_sysfs:
5714 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5715 out_free_geos:
534166de 5716 iwlcore_free_geos(priv);
b481de9c
ZY
5717
5718 out_release_irq:
2663516d 5719 free_irq(priv->pci_dev->irq, priv);
b481de9c
ZY
5720 destroy_workqueue(priv->workqueue);
5721 priv->workqueue = NULL;
3832ec9d 5722 iwl3945_unset_hw_params(priv);
2663516d
HS
5723 out_disable_msi:
5724 pci_disable_msi(priv->pci_dev);
b481de9c
ZY
5725 out_iounmap:
5726 pci_iounmap(pdev, priv->hw_base);
5727 out_pci_release_regions:
5728 pci_release_regions(pdev);
5729 out_pci_disable_device:
5730 pci_disable_device(pdev);
5731 pci_set_drvdata(pdev, NULL);
5732 out_ieee80211_free_hw:
5733 ieee80211_free_hw(priv->hw);
5734 out:
5735 return err;
5736}
5737
c83dbf68 5738static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 5739{
4a8a4322 5740 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 5741 unsigned long flags;
b481de9c
ZY
5742
5743 if (!priv)
5744 return;
5745
5746 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
5747
b481de9c 5748 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 5749
d552bfb6
KA
5750 if (priv->mac80211_registered) {
5751 ieee80211_unregister_hw(priv->hw);
5752 priv->mac80211_registered = 0;
5753 } else {
5754 iwl3945_down(priv);
5755 }
b481de9c 5756
0359facc
MA
5757 /* make sure we flush any pending irq or
5758 * tasklet for the driver
5759 */
5760 spin_lock_irqsave(&priv->lock, flags);
5761 iwl3945_disable_interrupts(priv);
5762 spin_unlock_irqrestore(&priv->lock, flags);
5763
5764 iwl_synchronize_irq(priv);
5765
bb8c093b 5766 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5767
c0af96a6 5768 iwl_rfkill_unregister(priv);
2663516d
HS
5769 cancel_delayed_work(&priv->rfkill_poll);
5770
bb8c093b 5771 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
5772
5773 if (priv->rxq.bd)
51af3d3f 5774 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 5775 iwl3945_hw_txq_ctx_free(priv);
b481de9c 5776
3832ec9d 5777 iwl3945_unset_hw_params(priv);
bb8c093b 5778 iwl3945_clear_stations_table(priv);
b481de9c 5779
6ef89d0a
MA
5780 /*netif_stop_queue(dev); */
5781 flush_workqueue(priv->workqueue);
5782
bb8c093b 5783 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
5784 * priv->workqueue... so we can't take down the workqueue
5785 * until now... */
5786 destroy_workqueue(priv->workqueue);
5787 priv->workqueue = NULL;
5788
2663516d
HS
5789 free_irq(pdev->irq, priv);
5790 pci_disable_msi(pdev);
5791
b481de9c
ZY
5792 pci_iounmap(pdev, priv->hw_base);
5793 pci_release_regions(pdev);
5794 pci_disable_device(pdev);
5795 pci_set_drvdata(pdev, NULL);
5796
e6148917 5797 iwl_free_channel_map(priv);
534166de 5798 iwlcore_free_geos(priv);
805cee5b 5799 kfree(priv->scan);
b481de9c
ZY
5800 if (priv->ibss_beacon)
5801 dev_kfree_skb(priv->ibss_beacon);
5802
5803 ieee80211_free_hw(priv->hw);
5804}
5805
5806#ifdef CONFIG_PM
5807
bb8c093b 5808static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 5809{
4a8a4322 5810 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 5811
e655b9f0
ZY
5812 if (priv->is_open) {
5813 set_bit(STATUS_IN_SUSPEND, &priv->status);
5814 iwl3945_mac_stop(priv->hw);
5815 priv->is_open = 1;
5816 }
2663516d
HS
5817 pci_save_state(pdev);
5818 pci_disable_device(pdev);
b481de9c
ZY
5819 pci_set_power_state(pdev, PCI_D3hot);
5820
b481de9c
ZY
5821 return 0;
5822}
5823
bb8c093b 5824static int iwl3945_pci_resume(struct pci_dev *pdev)
b481de9c 5825{
4a8a4322 5826 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 5827
b481de9c 5828 pci_set_power_state(pdev, PCI_D0);
2663516d
HS
5829 pci_enable_device(pdev);
5830 pci_restore_state(pdev);
b481de9c 5831
e655b9f0
ZY
5832 if (priv->is_open)
5833 iwl3945_mac_start(priv->hw);
b481de9c 5834
e655b9f0 5835 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
5836 return 0;
5837}
5838
5839#endif /* CONFIG_PM */
5840
5841/*****************************************************************************
5842 *
5843 * driver and module entry point
5844 *
5845 *****************************************************************************/
5846
bb8c093b 5847static struct pci_driver iwl3945_driver = {
b481de9c 5848 .name = DRV_NAME,
bb8c093b
CH
5849 .id_table = iwl3945_hw_card_ids,
5850 .probe = iwl3945_pci_probe,
5851 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 5852#ifdef CONFIG_PM
bb8c093b
CH
5853 .suspend = iwl3945_pci_suspend,
5854 .resume = iwl3945_pci_resume,
b481de9c
ZY
5855#endif
5856};
5857
bb8c093b 5858static int __init iwl3945_init(void)
b481de9c
ZY
5859{
5860
5861 int ret;
5862 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
5863 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
5864
5865 ret = iwl3945_rate_control_register();
5866 if (ret) {
a3139c59
SO
5867 printk(KERN_ERR DRV_NAME
5868 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
5869 return ret;
5870 }
5871
bb8c093b 5872 ret = pci_register_driver(&iwl3945_driver);
b481de9c 5873 if (ret) {
a3139c59 5874 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 5875 goto error_register;
b481de9c 5876 }
b481de9c
ZY
5877
5878 return ret;
897e1cf2 5879
897e1cf2
RC
5880error_register:
5881 iwl3945_rate_control_unregister();
5882 return ret;
b481de9c
ZY
5883}
5884
bb8c093b 5885static void __exit iwl3945_exit(void)
b481de9c 5886{
bb8c093b 5887 pci_unregister_driver(&iwl3945_driver);
897e1cf2 5888 iwl3945_rate_control_unregister();
b481de9c
ZY
5889}
5890
a0987a8d 5891MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 5892
df878d8f 5893module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 5894MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 5895module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 5896MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
5897module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
5898MODULE_PARM_DESC(swcrypto,
5899 "using software crypto (default 1 [software])\n");
df878d8f 5900module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 5901MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 5902module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
5903MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
5904
df878d8f 5905module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
5906MODULE_PARM_DESC(queues_num, "number of hw queues.");
5907
af48d048
SO
5908module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
5909MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
5910
bb8c093b
CH
5911module_exit(iwl3945_exit);
5912module_init(iwl3945_init);