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CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
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30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
b481de9c
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
WT
51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
b481de9c
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
b481de9c
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60/*
61 * module name, copyright, version, etc.
b481de9c
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
b481de9c
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c
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88MODULE_LICENSE("GPL");
89
df878d8f
KA
90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
5905a1aa 92 .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
KA
95 /* the rest are 0 by default */
96};
97
7e4bca5e
SO
98/**
99 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
100 * @priv: eeprom and antenna fields are used to determine antenna flags
101 *
102 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
103 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
104 *
105 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
106 * IWL_ANTENNA_MAIN - Force MAIN antenna
107 * IWL_ANTENNA_AUX - Force AUX antenna
108 */
109__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
110{
111 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
112
113 switch (iwl3945_mod_params.antenna) {
114 case IWL_ANTENNA_DIVERSITY:
115 return 0;
116
117 case IWL_ANTENNA_MAIN:
118 if (eeprom->antenna_switch_type)
119 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
121
122 case IWL_ANTENNA_AUX:
123 if (eeprom->antenna_switch_type)
124 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
126 }
127
128 /* bad antenna selector value */
129 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
130 iwl3945_mod_params.antenna);
131
132 return 0; /* "diversity" is default if error */
133}
134
6e21f15c 135static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
b481de9c
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136 struct ieee80211_key_conf *keyconf,
137 u8 sta_id)
138{
139 unsigned long flags;
140 __le16 key_flags = 0;
6e21f15c
AK
141 int ret;
142
143 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
144 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
145
146 if (sta_id == priv->hw_params.bcast_sta_id)
147 key_flags |= STA_KEY_MULTICAST_MSK;
148
149 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
150 keyconf->hw_key_idx = keyconf->keyidx;
151 key_flags &= ~STA_KEY_FLG_INVALID;
b481de9c 152
b481de9c 153 spin_lock_irqsave(&priv->sta_lock, flags);
c587de0b
TW
154 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
155 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
156 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
b481de9c
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157 keyconf->keylen);
158
c587de0b 159 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
b481de9c 160 keyconf->keylen);
6e21f15c 161
c587de0b 162 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
6e21f15c 163 == STA_KEY_FLG_NO_ENC)
c587de0b 164 priv->stations[sta_id].sta.key.key_offset =
6e21f15c
AK
165 iwl_get_free_ucode_key_index(priv);
166 /* else, we are overriding an existing key => no need to allocated room
167 * in uCode. */
168
c587de0b 169 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
6e21f15c
AK
170 "no space for a new key");
171
c587de0b
TW
172 priv->stations[sta_id].sta.key.key_flags = key_flags;
173 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
174 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c 175
6e21f15c
AK
176 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
177
c587de0b 178 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6e21f15c 179
b481de9c
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180 spin_unlock_irqrestore(&priv->sta_lock, flags);
181
6e21f15c
AK
182 return ret;
183}
184
185static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
186 struct ieee80211_key_conf *keyconf,
187 u8 sta_id)
188{
189 return -EOPNOTSUPP;
190}
191
192static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
193 struct ieee80211_key_conf *keyconf,
194 u8 sta_id)
195{
196 return -EOPNOTSUPP;
b481de9c
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197}
198
4a8a4322 199static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
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200{
201 unsigned long flags;
202
203 spin_lock_irqsave(&priv->sta_lock, flags);
c587de0b
TW
204 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
205 memset(&priv->stations[sta_id].sta.key, 0,
4c897253 206 sizeof(struct iwl4965_keyinfo));
c587de0b
TW
207 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
208 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
209 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
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210 spin_unlock_irqrestore(&priv->sta_lock, flags);
211
e1623446 212 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
c587de0b 213 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
b481de9c
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214 return 0;
215}
216
fa11d525 217static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
6e21f15c
AK
218 struct ieee80211_key_conf *keyconf, u8 sta_id)
219{
220 int ret = 0;
221
222 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
223
224 switch (keyconf->alg) {
225 case ALG_CCMP:
226 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
227 break;
228 case ALG_TKIP:
229 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
230 break;
231 case ALG_WEP:
232 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
233 break;
234 default:
1e680233 235 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
6e21f15c
AK
236 ret = -EINVAL;
237 }
238
239 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
240 keyconf->alg, keyconf->keylen, keyconf->keyidx,
241 sta_id, ret);
242
243 return ret;
244}
245
246static int iwl3945_remove_static_key(struct iwl_priv *priv)
247{
248 int ret = -EOPNOTSUPP;
249
250 return ret;
251}
252
253static int iwl3945_set_static_key(struct iwl_priv *priv,
254 struct ieee80211_key_conf *key)
255{
256 if (key->alg == ALG_WEP)
257 return -EOPNOTSUPP;
258
259 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
260 return -EINVAL;
261}
262
4a8a4322 263static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
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264{
265 struct list_head *element;
266
e1623446 267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
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268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
bb8c093b 273 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
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274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
39aadf8c 278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
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279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282}
283
4a8a4322 284static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 285{
bb8c093b 286 struct iwl3945_frame *frame;
b481de9c
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287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
15b1687c 291 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
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292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
bb8c093b 301 return list_entry(element, struct iwl3945_frame, list);
b481de9c
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302}
303
4a8a4322 304static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
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305{
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308}
309
4a8a4322 310unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 311 struct ieee80211_hdr *hdr,
73ec1cc2 312 int left)
b481de9c
ZY
313{
314
8ccde88a 315 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
316 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
317 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
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318 return 0;
319
320 if (priv->ibss_beacon->len > left)
321 return 0;
322
323 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
324
325 return priv->ibss_beacon->len;
326}
327
4a8a4322 328static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 329{
bb8c093b 330 struct iwl3945_frame *frame;
b481de9c
ZY
331 unsigned int frame_size;
332 int rc;
333 u8 rate;
334
bb8c093b 335 frame = iwl3945_get_free_frame(priv);
b481de9c
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336
337 if (!frame) {
15b1687c 338 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
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339 "command.\n");
340 return -ENOMEM;
341 }
342
8ccde88a 343 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 344
bb8c093b 345 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 346
518099a8 347 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
348 &frame->u.cmd[0]);
349
bb8c093b 350 iwl3945_free_frame(priv, frame);
b481de9c
ZY
351
352 return rc;
353}
354
4a8a4322 355static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 356{
3832ec9d 357 if (priv->shared_virt)
b481de9c 358 pci_free_consistent(priv->pci_dev,
bb8c093b 359 sizeof(struct iwl3945_shared),
3832ec9d
AK
360 priv->shared_virt,
361 priv->shared_phys);
b481de9c
ZY
362}
363
4a8a4322 364static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 365 struct ieee80211_tx_info *info,
c2acea8e 366 struct iwl_device_cmd *cmd,
b481de9c 367 struct sk_buff *skb_frag,
6e21f15c 368 int sta_id)
b481de9c 369{
e52119c5 370 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
c587de0b 371 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
b481de9c
ZY
372
373 switch (keyinfo->alg) {
374 case ALG_CCMP:
e52119c5
WT
375 tx->sec_ctl = TX_CMD_SEC_CCM;
376 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 377 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
378 break;
379
380 case ALG_TKIP:
b481de9c
ZY
381 break;
382
383 case ALG_WEP:
e52119c5 384 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 385 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
386
387 if (keyinfo->keylen == 13)
e52119c5 388 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 389
e52119c5 390 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 391
e1623446 392 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 393 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
394 break;
395
b481de9c 396 default:
978785a3 397 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
398 break;
399 }
400}
401
402/*
403 * handle build REPLY_TX command notification.
404 */
4a8a4322 405static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2acea8e 406 struct iwl_device_cmd *cmd,
e039fa4a 407 struct ieee80211_tx_info *info,
e52119c5 408 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 409{
e52119c5
WT
410 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
411 __le32 tx_flags = tx->tx_flags;
fd7c8a40 412 __le16 fc = hdr->frame_control;
e6a9854b 413 u8 rc_flags = info->control.rates[0].flags;
b481de9c 414
e52119c5 415 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 416 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 417 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 418 if (ieee80211_is_mgmt(fc))
b481de9c 419 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 420 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
421 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
422 tx_flags |= TX_CMD_FLG_TSF_MSK;
423 } else {
424 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
425 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
426 }
427
e52119c5 428 tx->sta_id = std_id;
8b7b1e05 429 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
430 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
431
fd7c8a40
HH
432 if (ieee80211_is_data_qos(fc)) {
433 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 434 tx->tid_tspec = qc[0] & 0xf;
b481de9c 435 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 436 } else {
b481de9c 437 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 438 }
b481de9c 439
e6a9854b 440 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
441 tx_flags |= TX_CMD_FLG_RTS_MSK;
442 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 443 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
444 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
445 tx_flags |= TX_CMD_FLG_CTS_MSK;
446 }
447
448 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
449 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
450
451 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
452 if (ieee80211_is_mgmt(fc)) {
453 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 454 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 455 else
e52119c5 456 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 457 } else {
e52119c5 458 tx->timeout.pm_frame_timeout = 0;
5c8df2d5 459#ifdef CONFIG_IWLWIFI_LEDS
ab53d8af
MA
460 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
461#endif
462 }
b481de9c 463
e52119c5
WT
464 tx->driver_txop = 0;
465 tx->tx_flags = tx_flags;
466 tx->next_frame_len = 0;
b481de9c
ZY
467}
468
b481de9c
ZY
469/*
470 * start REPLY_TX command process
471 */
4a8a4322 472static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
473{
474 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 475 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 476 struct iwl3945_tx_cmd *tx;
188cf6c7 477 struct iwl_tx_queue *txq = NULL;
d20b3c65 478 struct iwl_queue *q = NULL;
c2acea8e
JB
479 struct iwl_device_cmd *out_cmd;
480 struct iwl_cmd_meta *out_meta;
b481de9c
ZY
481 dma_addr_t phys_addr;
482 dma_addr_t txcmd_phys;
e52119c5 483 int txq_id = skb_get_queue_mapping(skb);
df833b1d 484 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
54dbb525
TW
485 u8 id;
486 u8 unicast;
b481de9c 487 u8 sta_id;
54dbb525 488 u8 tid = 0;
b481de9c 489 u16 seq_number = 0;
fd7c8a40 490 __le16 fc;
b481de9c 491 u8 wait_write_ptr = 0;
54dbb525 492 u8 *qc = NULL;
b481de9c
ZY
493 unsigned long flags;
494 int rc;
495
496 spin_lock_irqsave(&priv->lock, flags);
775a6e27 497 if (iwl_is_rfkill(priv)) {
e1623446 498 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
499 goto drop_unlock;
500 }
501
e039fa4a 502 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 503 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
504 goto drop_unlock;
505 }
506
507 unicast = !is_multicast_ether_addr(hdr->addr1);
508 id = 0;
509
fd7c8a40 510 fc = hdr->frame_control;
b481de9c 511
d08853a3 512#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 513 if (ieee80211_is_auth(fc))
e1623446 514 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 515 else if (ieee80211_is_assoc_req(fc))
e1623446 516 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 517 else if (ieee80211_is_reassoc_req(fc))
e1623446 518 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
519#endif
520
7878a5a4 521 /* drop all data frame if we are not associated */
914233d6 522 if (ieee80211_is_data(fc) &&
279b05d4 523 (!iwl_is_monitor_mode(priv)) && /* packet injection */
8ccde88a 524 (!iwl_is_associated(priv) ||
05c914fe 525 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 526 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
527 goto drop_unlock;
528 }
529
530 spin_unlock_irqrestore(&priv->lock, flags);
531
7294ec95 532 hdr_len = ieee80211_hdrlen(fc);
6440adb5
BC
533
534 /* Find (or create) index into station table for destination station */
f5d30266 535 sta_id = iwl_get_sta_id(priv, hdr);
b481de9c 536 if (sta_id == IWL_INVALID_STATION) {
e1623446 537 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 538 hdr->addr1);
b481de9c
ZY
539 goto drop;
540 }
541
e1623446 542 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 543
fd7c8a40
HH
544 if (ieee80211_is_data_qos(fc)) {
545 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 546 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
e6a6cf4c
RC
547 if (unlikely(tid >= MAX_TID_COUNT))
548 goto drop;
c587de0b 549 seq_number = priv->stations[sta_id].tid[tid].seq_number &
b481de9c
ZY
550 IEEE80211_SCTL_SEQ;
551 hdr->seq_ctrl = cpu_to_le16(seq_number) |
552 (hdr->seq_ctrl &
c1b4aa3f 553 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
554 seq_number += 0x10;
555 }
6440adb5
BC
556
557 /* Descriptor for chosen Tx queue */
188cf6c7 558 txq = &priv->txq[txq_id];
b481de9c
ZY
559 q = &txq->q;
560
561 spin_lock_irqsave(&priv->lock, flags);
562
fc4b6853 563 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 564
6440adb5 565 /* Set up driver data for this TFD */
dbb6654c 566 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 567 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
BC
568
569 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 570 out_cmd = txq->cmd[idx];
c2acea8e 571 out_meta = &txq->meta[idx];
e52119c5 572 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 573 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 574 memset(tx, 0, sizeof(*tx));
6440adb5
BC
575
576 /*
577 * Set up the Tx-command (not MAC!) header.
578 * Store the chosen Tx queue and TFD index within the sequence field;
579 * after Tx, uCode's Tx response will return this value so driver can
580 * locate the frame within the tx queue and do post-tx processing.
581 */
b481de9c
ZY
582 out_cmd->hdr.cmd = REPLY_TX;
583 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 584 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC
585
586 /* Copy MAC header from skb into command buffer */
e52119c5 587 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 588
df833b1d
RC
589
590 if (info->control.hw_key)
591 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
592
593 /* TODO need this for burst mode later on */
594 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
595
596 /* set is_hcca to 0; it probably will never be implemented */
597 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
598
599 /* Total # bytes to be transmitted */
600 len = (u16)skb->len;
601 tx->len = cpu_to_le16(len);
602
20594eb0 603 iwl_dbg_log_tx_data_frame(priv, len, hdr);
22fdf3c9 604 iwl_update_stats(priv, true, fc, len);
df833b1d
RC
605 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
606 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
607
608 if (!ieee80211_has_morefrags(hdr->frame_control)) {
609 txq->need_update = 1;
610 if (qc)
c587de0b 611 priv->stations[sta_id].tid[tid].seq_number = seq_number;
df833b1d
RC
612 } else {
613 wait_write_ptr = 1;
614 txq->need_update = 0;
615 }
616
617 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
618 le16_to_cpu(out_cmd->hdr.sequence));
619 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
3d816c77
RC
620 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
621 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
df833b1d
RC
622 ieee80211_hdrlen(fc));
623
6440adb5
BC
624 /*
625 * Use the first empty entry in this queue's command buffer array
626 * to contain the Tx command and MAC header concatenated together
627 * (payload data will be in another buffer).
628 * Size of this varies, due to varying MAC header length.
629 * If end is not dword aligned, we'll have 2 extra bytes at the end
630 * of the MAC header (device reads on dword boundaries).
631 * We'll tell device about this padding later.
632 */
3832ec9d 633 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 634 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
635
636 len_org = len;
637 len = (len + 3) & ~3;
638
639 if (len_org != len)
640 len_org = 1;
641 else
642 len_org = 0;
643
6440adb5
BC
644 /* Physical address of this Tx command's header (not MAC header!),
645 * within command buffer array. */
df833b1d
RC
646 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
647 len, PCI_DMA_TODEVICE);
648 /* we do not map meta data ... so we can safely access address to
649 * provide to unmap command*/
c2acea8e
JB
650 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
651 pci_unmap_len_set(out_meta, len, len);
b481de9c 652
6440adb5
BC
653 /* Add buffer containing Tx command and MAC(!) header to TFD's
654 * first entry */
7aaa1d79
SO
655 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
656 txcmd_phys, len, 1, 0);
b481de9c 657
b481de9c 658
6440adb5
BC
659 /* Set up TFD's 2nd entry to point directly to remainder of skb,
660 * if any (802.11 null frames have no payload). */
b481de9c
ZY
661 len = skb->len - hdr_len;
662 if (len) {
663 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
664 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
665 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
666 phys_addr, len,
667 0, U32_PAD(len));
b481de9c
ZY
668 }
669
b481de9c 670
6440adb5 671 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 672 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 673 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
674 spin_unlock_irqrestore(&priv->lock, flags);
675
676 if (rc)
677 return rc;
678
d20b3c65 679 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
680 && priv->mac80211_registered) {
681 if (wait_write_ptr) {
682 spin_lock_irqsave(&priv->lock, flags);
683 txq->need_update = 1;
4f3602c8 684 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
685 spin_unlock_irqrestore(&priv->lock, flags);
686 }
687
e4e72fb4 688 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
b481de9c
ZY
689 }
690
691 return 0;
692
693drop_unlock:
694 spin_unlock_irqrestore(&priv->lock, flags);
695drop:
696 return -1;
697}
698
c8b0e6e1 699#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
700
701#include "iwl-spectrum.h"
702
703#define BEACON_TIME_MASK_LOW 0x00FFFFFF
704#define BEACON_TIME_MASK_HIGH 0xFF000000
705#define TIME_UNIT 1024
706
707/*
708 * extended beacon time format
709 * time in usec will be changed into a 32-bit value in 8:24 format
710 * the high 1 byte is the beacon counts
711 * the lower 3 bytes is the time in usec within one beacon interval
712 */
713
bb8c093b 714static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
715{
716 u32 quot;
717 u32 rem;
718 u32 interval = beacon_interval * 1024;
719
720 if (!interval || !usec)
721 return 0;
722
723 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
724 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
725
726 return (quot << 24) + rem;
727}
728
729/* base is usually what we get from ucode with each received frame,
730 * the same as HW timer counter counting down
731 */
732
bb8c093b 733static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
734{
735 u32 base_low = base & BEACON_TIME_MASK_LOW;
736 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
737 u32 interval = beacon_interval * TIME_UNIT;
738 u32 res = (base & BEACON_TIME_MASK_HIGH) +
739 (addon & BEACON_TIME_MASK_HIGH);
740
741 if (base_low > addon_low)
742 res += base_low - addon_low;
743 else if (base_low < addon_low) {
744 res += interval + base_low - addon_low;
745 res += (1 << 24);
746 } else
747 res += (1 << 24);
748
749 return cpu_to_le32(res);
750}
751
4a8a4322 752static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
753 struct ieee80211_measurement_params *params,
754 u8 type)
755{
600c0e11 756 struct iwl_spectrum_cmd spectrum;
3d24a9f7 757 struct iwl_rx_packet *res;
c2d79b48 758 struct iwl_host_cmd cmd = {
b481de9c
ZY
759 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
760 .data = (void *)&spectrum,
c2acea8e 761 .flags = CMD_WANT_SKB,
b481de9c
ZY
762 };
763 u32 add_time = le64_to_cpu(params->start_time);
764 int rc;
765 int spectrum_resp_status;
766 int duration = le16_to_cpu(params->duration);
767
8ccde88a 768 if (iwl_is_associated(priv))
b481de9c 769 add_time =
bb8c093b 770 iwl3945_usecs_to_beacons(
b481de9c
ZY
771 le64_to_cpu(params->start_time) - priv->last_tsf,
772 le16_to_cpu(priv->rxon_timing.beacon_interval));
773
774 memset(&spectrum, 0, sizeof(spectrum));
775
776 spectrum.channel_count = cpu_to_le16(1);
777 spectrum.flags =
778 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
779 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
780 cmd.len = sizeof(spectrum);
781 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
782
8ccde88a 783 if (iwl_is_associated(priv))
b481de9c 784 spectrum.start_time =
bb8c093b 785 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
786 add_time,
787 le16_to_cpu(priv->rxon_timing.beacon_interval));
788 else
789 spectrum.start_time = 0;
790
791 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
792 spectrum.channels[0].channel = params->channel;
793 spectrum.channels[0].type = type;
8ccde88a 794 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
795 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
796 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
797
518099a8 798 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
799 if (rc)
800 return rc;
801
c2acea8e 802 res = (struct iwl_rx_packet *)cmd.reply_skb->data;
b481de9c 803 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 804 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
805 rc = -EIO;
806 }
807
808 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
809 switch (spectrum_resp_status) {
810 case 0: /* Command will be handled */
811 if (res->u.spectrum.id != 0xff) {
e1623446 812 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 813 res->u.spectrum.id);
b481de9c
ZY
814 priv->measurement_status &= ~MEASUREMENT_READY;
815 }
816 priv->measurement_status |= MEASUREMENT_ACTIVE;
817 rc = 0;
818 break;
819
820 case 1: /* Command will not be handled */
821 rc = -EAGAIN;
822 break;
823 }
824
c2acea8e 825 dev_kfree_skb_any(cmd.reply_skb);
b481de9c
ZY
826
827 return rc;
828}
829#endif
830
4a8a4322 831static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 832 struct iwl_rx_mem_buffer *rxb)
b481de9c 833{
3d24a9f7
TW
834 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
835 struct iwl_alive_resp *palive;
b481de9c
ZY
836 struct delayed_work *pwork;
837
838 palive = &pkt->u.alive_frame;
839
e1623446 840 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
841 "0x%01X 0x%01X\n",
842 palive->is_valid, palive->ver_type,
843 palive->ver_subtype);
844
845 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 846 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
847 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
848 sizeof(struct iwl_alive_resp));
b481de9c
ZY
849 pwork = &priv->init_alive_start;
850 } else {
e1623446 851 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 852 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 853 sizeof(struct iwl_alive_resp));
b481de9c 854 pwork = &priv->alive_start;
bb8c093b 855 iwl3945_disable_events(priv);
b481de9c
ZY
856 }
857
858 /* We delay the ALIVE response by 5ms to
859 * give the HW RF Kill time to activate... */
860 if (palive->is_valid == UCODE_VALID_OK)
861 queue_delayed_work(priv->workqueue, pwork,
862 msecs_to_jiffies(5));
863 else
39aadf8c 864 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
865}
866
4a8a4322 867static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 868 struct iwl_rx_mem_buffer *rxb)
b481de9c 869{
c7e035a9 870#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 871 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 872#endif
b481de9c 873
e1623446 874 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
875 return;
876}
877
bb8c093b 878static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 879{
4a8a4322
AK
880 struct iwl_priv *priv =
881 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
882 struct sk_buff *beacon;
883
884 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 885 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
886
887 if (!beacon) {
15b1687c 888 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
889 return;
890 }
891
892 mutex_lock(&priv->mutex);
893 /* new beacon skb is allocated every time; dispose previous.*/
894 if (priv->ibss_beacon)
895 dev_kfree_skb(priv->ibss_beacon);
896
897 priv->ibss_beacon = beacon;
898 mutex_unlock(&priv->mutex);
899
bb8c093b 900 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
901}
902
4a8a4322 903static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 904 struct iwl_rx_mem_buffer *rxb)
b481de9c 905{
d08853a3 906#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 907 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 908 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
909 u8 rate = beacon->beacon_notify_hdr.rate;
910
e1623446 911 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
912 "tsf %d %d rate %d\n",
913 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
914 beacon->beacon_notify_hdr.failure_frame,
915 le32_to_cpu(beacon->ibss_mgr_status),
916 le32_to_cpu(beacon->high_tsf),
917 le32_to_cpu(beacon->low_tsf), rate);
918#endif
919
05c914fe 920 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
921 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
922 queue_work(priv->workqueue, &priv->beacon_update);
923}
924
b481de9c
ZY
925/* Handle notification from uCode that card's power state is changing
926 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 927static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 928 struct iwl_rx_mem_buffer *rxb)
b481de9c 929{
3d24a9f7 930 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
931 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
932 unsigned long status = priv->status;
933
4c423a2b 934 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
935 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
936 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
937
5d49f498 938 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
939 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
940
941 if (flags & HW_CARD_DISABLED)
942 set_bit(STATUS_RF_KILL_HW, &priv->status);
943 else
944 clear_bit(STATUS_RF_KILL_HW, &priv->status);
945
946
af0053d6 947 iwl_scan_cancel(priv);
b481de9c
ZY
948
949 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
a60e77e5
JB
950 test_bit(STATUS_RF_KILL_HW, &priv->status)))
951 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
952 test_bit(STATUS_RF_KILL_HW, &priv->status));
b481de9c
ZY
953 else
954 wake_up_interruptible(&priv->wait_command_queue);
955}
956
957/**
bb8c093b 958 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
959 *
960 * Setup the RX handlers for each of the reply types sent from the uCode
961 * to the host.
962 *
963 * This function chains into the hardware specific files for them to setup
964 * any hardware specific handlers as well.
965 */
4a8a4322 966static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 967{
bb8c093b
CH
968 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
969 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
261b9c33 970 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
8ccde88a 971 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
030f05ed 972 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 973 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
030f05ed 974 iwl_rx_pm_debug_statistics_notif;
bb8c093b 975 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 976
9fbab516
BC
977 /*
978 * The same handler is used for both the REPLY to a discrete
979 * statistics request from the host as well as for the periodic
980 * statistics notifications (after received beacons) from the uCode.
b481de9c 981 */
bb8c093b
CH
982 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
983 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 984
261b9c33 985 iwl_setup_spectrum_handlers(priv);
cade0eb2 986 iwl_setup_rx_scan_handlers(priv);
bb8c093b 987 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 988
9fbab516 989 /* Set up hardware specific Rx handlers */
bb8c093b 990 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
991}
992
b481de9c
ZY
993/************************** RX-FUNCTIONS ****************************/
994/*
995 * Rx theory of operation
996 *
997 * The host allocates 32 DMA target addresses and passes the host address
998 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
999 * 0 to 31
1000 *
1001 * Rx Queue Indexes
1002 * The host/firmware share two index registers for managing the Rx buffers.
1003 *
1004 * The READ index maps to the first position that the firmware may be writing
1005 * to -- the driver can read up to (but not including) this position and get
1006 * good data.
1007 * The READ index is managed by the firmware once the card is enabled.
1008 *
1009 * The WRITE index maps to the last position the driver has read from -- the
1010 * position preceding WRITE is the last slot the firmware can place a packet.
1011 *
1012 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1013 * WRITE = READ.
1014 *
9fbab516 1015 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1016 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1017 *
9fbab516 1018 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1019 * and fire the RX interrupt. The driver can then query the READ index and
1020 * process as many packets as possible, moving the WRITE index forward as it
1021 * resets the Rx queue buffers with new memory.
1022 *
1023 * The management in the driver is as follows:
1024 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1025 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1026 * to replenish the iwl->rxq->rx_free.
bb8c093b 1027 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1028 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1029 * 'processed' and 'read' driver indexes as well)
1030 * + A received packet is processed and handed to the kernel network stack,
1031 * detached from the iwl->rxq. The driver 'processed' index is updated.
1032 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1033 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1034 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1035 * were enough free buffers and RX_STALLED is set it is cleared.
1036 *
1037 *
1038 * Driver sequence:
1039 *
9fbab516 1040 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1041 * iwl3945_rx_queue_restock
9fbab516 1042 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1043 * queue, updates firmware pointers, and updates
1044 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1045 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1046 *
1047 * -- enable interrupts --
6100b588 1048 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1049 * READ INDEX, detaching the SKB from the pool.
1050 * Moves the packet buffer from queue to rx_used.
bb8c093b 1051 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1052 * slots.
1053 * ...
1054 *
1055 */
1056
b481de9c 1057/**
9fbab516 1058 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1059 */
4a8a4322 1060static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1061 dma_addr_t dma_addr)
1062{
1063 return cpu_to_le32((u32)dma_addr);
1064}
1065
1066/**
bb8c093b 1067 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1068 *
9fbab516 1069 * If there are slots in the RX queue that need to be restocked,
b481de9c 1070 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1071 * as we can, pulling from rx_free.
b481de9c
ZY
1072 *
1073 * This moves the 'write' index forward to catch up with 'processed', and
1074 * also updates the memory address in the firmware to reference the new
1075 * target buffer.
1076 */
4a8a4322 1077static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1078{
cc2f362c 1079 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1080 struct list_head *element;
6100b588 1081 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1082 unsigned long flags;
1083 int write, rc;
1084
1085 spin_lock_irqsave(&rxq->lock, flags);
1086 write = rxq->write & ~0x7;
37d68317 1087 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1088 /* Get next free Rx buffer, remove from free list */
b481de9c 1089 element = rxq->rx_free.next;
6100b588 1090 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1091 list_del(element);
6440adb5
BC
1092
1093 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1094 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1095 rxq->queue[rxq->write] = rxb;
1096 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1097 rxq->free_count--;
1098 }
1099 spin_unlock_irqrestore(&rxq->lock, flags);
1100 /* If the pre-allocated buffer pool is dropping low, schedule to
1101 * refill it */
1102 if (rxq->free_count <= RX_LOW_WATERMARK)
1103 queue_work(priv->workqueue, &priv->rx_replenish);
1104
1105
6440adb5
BC
1106 /* If we've added more space for the firmware to place data, tell it.
1107 * Increment device's write pointer in multiples of 8. */
d14d4440 1108 if ((rxq->write_actual != (rxq->write & ~0x7))
b481de9c
ZY
1109 || (abs(rxq->write - rxq->read) > 7)) {
1110 spin_lock_irqsave(&rxq->lock, flags);
1111 rxq->need_update = 1;
1112 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1113 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1114 if (rc)
1115 return rc;
1116 }
1117
1118 return 0;
1119}
1120
1121/**
bb8c093b 1122 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1123 *
1124 * When moving to rx_free an SKB is allocated for the slot.
1125 *
bb8c093b 1126 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1127 * This is called as a scheduled work item (except for during initialization)
b481de9c 1128 */
d14d4440 1129static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
b481de9c 1130{
cc2f362c 1131 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1132 struct list_head *element;
6100b588 1133 struct iwl_rx_mem_buffer *rxb;
b481de9c 1134 unsigned long flags;
72240498
AK
1135
1136 while (1) {
1137 spin_lock_irqsave(&rxq->lock, flags);
1138
1139 if (list_empty(&rxq->rx_used)) {
1140 spin_unlock_irqrestore(&rxq->lock, flags);
1141 return;
1142 }
1143
b481de9c 1144 element = rxq->rx_used.next;
6100b588 1145 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
72240498
AK
1146 list_del(element);
1147 spin_unlock_irqrestore(&rxq->lock, flags);
6440adb5
BC
1148
1149 /* Alloc a new receive buffer */
b481de9c 1150 rxb->skb =
1e33dc64 1151 alloc_skb(priv->hw_params.rx_buf_size,
d14d4440 1152 priority);
b481de9c
ZY
1153 if (!rxb->skb) {
1154 if (net_ratelimit())
978785a3 1155 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1156 /* We don't reschedule replenish work here -- we will
1157 * call the restock method and if it still needs
1158 * more buffers it will schedule replenish */
1159 break;
1160 }
12342c47
ZY
1161
1162 /* If radiotap head is required, reserve some headroom here.
1163 * The physical head count is a variable rx_stats->phy_count.
1164 * We reserve 4 bytes here. Plus these extra bytes, the
1165 * headroom of the physical head should be enough for the
1166 * radiotap head that iwl3945 supported. See iwl3945_rt.
1167 */
1168 skb_reserve(rxb->skb, 4);
1169
6440adb5 1170 /* Get physical address of RB/SKB */
1e33dc64
WT
1171 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1172 rxb->skb->data,
1173 priv->hw_params.rx_buf_size,
1174 PCI_DMA_FROMDEVICE);
72240498
AK
1175
1176 spin_lock_irqsave(&rxq->lock, flags);
b481de9c 1177 list_add_tail(&rxb->list, &rxq->rx_free);
72240498 1178 priv->alloc_rxb_skb++;
b481de9c 1179 rxq->free_count++;
72240498 1180 spin_unlock_irqrestore(&rxq->lock, flags);
b481de9c 1181 }
5c0eef96
MA
1182}
1183
df833b1d
RC
1184void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1185{
1186 unsigned long flags;
1187 int i;
1188 spin_lock_irqsave(&rxq->lock, flags);
1189 INIT_LIST_HEAD(&rxq->rx_free);
1190 INIT_LIST_HEAD(&rxq->rx_used);
1191 /* Fill the rx_used queue with _all_ of the Rx buffers */
1192 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1193 /* In the reset function, these buffers may have been allocated
1194 * to an SKB, so we need to unmap and free potential storage */
1195 if (rxq->pool[i].skb != NULL) {
1196 pci_unmap_single(priv->pci_dev,
1197 rxq->pool[i].real_dma_addr,
1198 priv->hw_params.rx_buf_size,
1199 PCI_DMA_FROMDEVICE);
1200 priv->alloc_rxb_skb--;
1201 dev_kfree_skb(rxq->pool[i].skb);
1202 rxq->pool[i].skb = NULL;
1203 }
1204 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1205 }
1206
1207 /* Set us so that we have processed and used all buffers, but have
1208 * not restocked the Rx queue with fresh buffers */
1209 rxq->read = rxq->write = 0;
1210 rxq->free_count = 0;
d14d4440 1211 rxq->write_actual = 0;
df833b1d
RC
1212 spin_unlock_irqrestore(&rxq->lock, flags);
1213}
df833b1d 1214
5c0eef96
MA
1215void iwl3945_rx_replenish(void *data)
1216{
4a8a4322 1217 struct iwl_priv *priv = data;
5c0eef96
MA
1218 unsigned long flags;
1219
d14d4440 1220 iwl3945_rx_allocate(priv, GFP_KERNEL);
b481de9c
ZY
1221
1222 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1223 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1224 spin_unlock_irqrestore(&priv->lock, flags);
1225}
1226
d14d4440
AK
1227static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1228{
1229 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1230
1231 iwl3945_rx_queue_restock(priv);
1232}
1233
1234
df833b1d
RC
1235/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1236 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1237 * This free routine walks the list of POOL entries and if SKB is set to
1238 * non NULL it is unmapped and freed
1239 */
1240static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1241{
1242 int i;
1243 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1244 if (rxq->pool[i].skb != NULL) {
1245 pci_unmap_single(priv->pci_dev,
1246 rxq->pool[i].real_dma_addr,
1247 priv->hw_params.rx_buf_size,
1248 PCI_DMA_FROMDEVICE);
1249 dev_kfree_skb(rxq->pool[i].skb);
1250 }
1251 }
1252
1253 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1254 rxq->dma_addr);
1255 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1256 rxq->rb_stts, rxq->rb_stts_dma);
1257 rxq->bd = NULL;
1258 rxq->rb_stts = NULL;
1259}
df833b1d
RC
1260
1261
b481de9c
ZY
1262/* Convert linear signal-to-noise ratio into dB */
1263static u8 ratio2dB[100] = {
1264/* 0 1 2 3 4 5 6 7 8 9 */
1265 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1266 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1267 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1268 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1269 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1270 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1271 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1272 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1273 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1274 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1275};
1276
1277/* Calculates a relative dB value from a ratio of linear
1278 * (i.e. not dB) signal levels.
1279 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1280int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1281{
221c80cf
AB
1282 /* 1000:1 or higher just report as 60 dB */
1283 if (sig_ratio >= 1000)
b481de9c
ZY
1284 return 60;
1285
221c80cf 1286 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1287 * add 20 dB to make up for divide by 10 */
221c80cf 1288 if (sig_ratio >= 100)
3ac7f146 1289 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1290
1291 /* We shouldn't see this */
1292 if (sig_ratio < 1)
1293 return 0;
1294
1295 /* Use table for ratios 1:1 - 99:1 */
1296 return (int)ratio2dB[sig_ratio];
1297}
1298
1299#define PERFECT_RSSI (-20) /* dBm */
1300#define WORST_RSSI (-95) /* dBm */
1301#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1302
1303/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1304 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1305 * about formulas used below. */
bb8c093b 1306int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1307{
1308 int sig_qual;
1309 int degradation = PERFECT_RSSI - rssi_dbm;
1310
1311 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1312 * as indicator; formula is (signal dbm - noise dbm).
1313 * SNR at or above 40 is a great signal (100%).
1314 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1315 * Weakest usable signal is usually 10 - 15 dB SNR. */
1316 if (noise_dbm) {
1317 if (rssi_dbm - noise_dbm >= 40)
1318 return 100;
1319 else if (rssi_dbm < noise_dbm)
1320 return 0;
1321 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1322
1323 /* Else use just the signal level.
1324 * This formula is a least squares fit of data points collected and
1325 * compared with a reference system that had a percentage (%) display
1326 * for signal quality. */
1327 } else
1328 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1329 (15 * RSSI_RANGE + 62 * degradation)) /
1330 (RSSI_RANGE * RSSI_RANGE);
1331
1332 if (sig_qual > 100)
1333 sig_qual = 100;
1334 else if (sig_qual < 1)
1335 sig_qual = 0;
1336
1337 return sig_qual;
1338}
1339
1340/**
9fbab516 1341 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1342 *
1343 * Uses the priv->rx_handlers callback function array to invoke
1344 * the appropriate handlers, including command responses,
1345 * frame-received notifications, and other notifications.
1346 */
4a8a4322 1347static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1348{
6100b588 1349 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1350 struct iwl_rx_packet *pkt;
cc2f362c 1351 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1352 u32 r, i;
1353 int reclaim;
1354 unsigned long flags;
5c0eef96 1355 u8 fill_rx = 0;
d68ab680 1356 u32 count = 8;
d14d4440 1357 int total_empty = 0;
b481de9c 1358
6440adb5
BC
1359 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1360 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1361 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1362 i = rxq->read;
1363
d14d4440
AK
1364 /* calculate total frames need to be restock after handling RX */
1365 total_empty = r - priv->rxq.write_actual;
1366 if (total_empty < 0)
1367 total_empty += RX_QUEUE_SIZE;
1368
1369 if (total_empty > (RX_QUEUE_SIZE / 2))
5c0eef96 1370 fill_rx = 1;
b481de9c
ZY
1371 /* Rx interrupt, but nothing sent from uCode */
1372 if (i == r)
e1623446 1373 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1374
1375 while (i != r) {
1376 rxb = rxq->queue[i];
1377
9fbab516 1378 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1379 * then a bug has been introduced in the queue refilling
1380 * routines -- catch it here */
1381 BUG_ON(rxb == NULL);
1382
1383 rxq->queue[i] = NULL;
1384
df833b1d
RC
1385 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1386 priv->hw_params.rx_buf_size,
1387 PCI_DMA_FROMDEVICE);
3d24a9f7 1388 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1389
1390 /* Reclaim a command buffer only if this packet is a response
1391 * to a (driver-originated) command.
1392 * If the packet (e.g. Rx frame) originated from uCode,
1393 * there is no command buffer to reclaim.
1394 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1395 * but apparently a few don't get set; catch them here. */
1396 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1397 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1398 (pkt->hdr.cmd != REPLY_TX);
1399
1400 /* Based on type of command response or notification,
1401 * handle those that need handling via function in
bb8c093b 1402 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1403 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1404 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1405 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1406 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1407 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
86ddbf62 1408 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
b481de9c
ZY
1409 } else {
1410 /* No handling needed */
e1623446 1411 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1412 "r %d i %d No handler needed for %s, 0x%02x\n",
1413 r, i, get_cmd_string(pkt->hdr.cmd),
1414 pkt->hdr.cmd);
1415 }
1416
1417 if (reclaim) {
9fbab516 1418 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1419 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1420 * as we reclaim the driver command queue */
1421 if (rxb && rxb->skb)
732587ab 1422 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1423 else
39aadf8c 1424 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1425 }
1426
1427 /* For now we just don't re-use anything. We can tweak this
1428 * later to try and re-use notification packets and SKBs that
1429 * fail to Rx correctly */
1430 if (rxb->skb != NULL) {
1431 priv->alloc_rxb_skb--;
1432 dev_kfree_skb_any(rxb->skb);
1433 rxb->skb = NULL;
1434 }
1435
b481de9c
ZY
1436 spin_lock_irqsave(&rxq->lock, flags);
1437 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1438 spin_unlock_irqrestore(&rxq->lock, flags);
1439 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1440 /* If there are a lot of unused frames,
1441 * restock the Rx queue so ucode won't assert. */
1442 if (fill_rx) {
1443 count++;
1444 if (count >= 8) {
1445 priv->rxq.read = i;
d14d4440 1446 iwl3945_rx_replenish_now(priv);
5c0eef96
MA
1447 count = 0;
1448 }
1449 }
b481de9c
ZY
1450 }
1451
1452 /* Backtrack one entry */
1453 priv->rxq.read = i;
d14d4440
AK
1454 if (fill_rx)
1455 iwl3945_rx_replenish_now(priv);
1456 else
1457 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1458}
1459
0359facc 1460/* call this function to flush any scheduled tasklet */
4a8a4322 1461static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 1462{
a96a27f9 1463 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1464 synchronize_irq(priv->pci_dev->irq);
1465 tasklet_kill(&priv->irq_tasklet);
1466}
1467
b481de9c
ZY
1468static const char *desc_lookup(int i)
1469{
1470 switch (i) {
1471 case 1:
1472 return "FAIL";
1473 case 2:
1474 return "BAD_PARAM";
1475 case 3:
1476 return "BAD_CHECKSUM";
1477 case 4:
1478 return "NMI_INTERRUPT";
1479 case 5:
1480 return "SYSASSERT";
1481 case 6:
1482 return "FATAL_ERROR";
1483 }
1484
1485 return "UNKNOWN";
1486}
1487
1488#define ERROR_START_OFFSET (1 * sizeof(u32))
1489#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1490
4a8a4322 1491static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
1492{
1493 u32 i;
1494 u32 desc, time, count, base, data1;
1495 u32 blink1, blink2, ilink1, ilink2;
b481de9c
ZY
1496
1497 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1498
bb8c093b 1499 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1500 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
1501 return;
1502 }
1503
b481de9c 1504
5d49f498 1505 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
1506
1507 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
1508 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1509 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1510 priv->status, count);
b481de9c
ZY
1511 }
1512
15b1687c 1513 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
1514 "ilink1 nmiPC Line\n");
1515 for (i = ERROR_START_OFFSET;
1516 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1517 i += ERROR_ELEM_SIZE) {
5d49f498 1518 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 1519 time =
5d49f498 1520 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 1521 blink1 =
5d49f498 1522 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 1523 blink2 =
5d49f498 1524 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 1525 ilink1 =
5d49f498 1526 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 1527 ilink2 =
5d49f498 1528 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 1529 data1 =
5d49f498 1530 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 1531
15b1687c
WT
1532 IWL_ERR(priv,
1533 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1534 desc_lookup(desc), desc, time, blink1, blink2,
1535 ilink1, ilink2, data1);
b481de9c
ZY
1536 }
1537
b481de9c
ZY
1538}
1539
f58177b9 1540#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
1541
1542/**
bb8c093b 1543 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 1544 *
b481de9c 1545 */
4a8a4322 1546static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
1547 u32 num_events, u32 mode)
1548{
1549 u32 i;
1550 u32 base; /* SRAM byte address of event log header */
1551 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1552 u32 ptr; /* SRAM byte address of log data */
1553 u32 ev, time, data; /* event log data */
1554
1555 if (num_events == 0)
1556 return;
1557
1558 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1559
1560 if (mode == 0)
1561 event_size = 2 * sizeof(u32);
1562 else
1563 event_size = 3 * sizeof(u32);
1564
1565 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1566
1567 /* "time" is actually "data" for mode 0 (no timestamp).
1568 * place event id # at far right for easier visual parsing. */
1569 for (i = 0; i < num_events; i++) {
5d49f498 1570 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 1571 ptr += sizeof(u32);
5d49f498 1572 time = iwl_read_targ_mem(priv, ptr);
b481de9c 1573 ptr += sizeof(u32);
15b1687c
WT
1574 if (mode == 0) {
1575 /* data, ev */
1576 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1577 } else {
5d49f498 1578 data = iwl_read_targ_mem(priv, ptr);
b481de9c 1579 ptr += sizeof(u32);
15b1687c 1580 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
1581 }
1582 }
1583}
1584
4a8a4322 1585static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c 1586{
b481de9c
ZY
1587 u32 base; /* SRAM byte address of event log header */
1588 u32 capacity; /* event log capacity in # entries */
1589 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1590 u32 num_wraps; /* # times uCode wrapped to top of log */
1591 u32 next_entry; /* index of next entry to be written by uCode */
1592 u32 size; /* # entries that we'll print */
1593
1594 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 1595 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1596 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
1597 return;
1598 }
1599
b481de9c 1600 /* event log header */
5d49f498
AK
1601 capacity = iwl_read_targ_mem(priv, base);
1602 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1603 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1604 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
1605
1606 size = num_wraps ? capacity : next_entry;
1607
1608 /* bail out if nothing in log */
1609 if (size == 0) {
15b1687c 1610 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
b481de9c
ZY
1611 return;
1612 }
1613
15b1687c 1614 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
1615 size, num_wraps);
1616
1617 /* if uCode has wrapped back to top of log, start at the oldest entry,
1618 * i.e the next one that uCode would fill. */
1619 if (num_wraps)
bb8c093b 1620 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
1621 capacity - next_entry, mode);
1622
1623 /* (then/else) start at top of log */
bb8c093b 1624 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 1625
b481de9c
ZY
1626}
1627
4a8a4322 1628static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1629{
1630 u32 inta, handled = 0;
1631 u32 inta_fh;
1632 unsigned long flags;
d08853a3 1633#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1634 u32 inta_mask;
1635#endif
1636
1637 spin_lock_irqsave(&priv->lock, flags);
1638
1639 /* Ack/clear/reset pending uCode interrupts.
1640 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1641 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
1642 inta = iwl_read32(priv, CSR_INT);
1643 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1644
1645 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1646 * Any new interrupts that happen after this, either while we're
1647 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
1648 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1649 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1650
d08853a3 1651#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1652 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
9fbab516 1653 /* just for debug */
5d49f498 1654 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1655 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
1656 inta, inta_mask, inta_fh);
1657 }
1658#endif
1659
1660 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1661 * atomic, make sure that inta covers all the interrupts that
1662 * we've discovered, even if FH interrupt came in just after
1663 * reading CSR_INT. */
6f83eaa1 1664 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 1665 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1666 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
1667 inta |= CSR_INT_BIT_FH_TX;
1668
1669 /* Now service all interrupt bits discovered above. */
1670 if (inta & CSR_INT_BIT_HW_ERR) {
58dba728 1671 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
b481de9c
ZY
1672
1673 /* Tell the device to stop sending interrupts */
ed3b932e 1674 iwl_disable_interrupts(priv);
b481de9c 1675
86ddbf62 1676 priv->isr_stats.hw++;
8ccde88a 1677 iwl_irq_handle_error(priv);
b481de9c
ZY
1678
1679 handled |= CSR_INT_BIT_HW_ERR;
1680
1681 spin_unlock_irqrestore(&priv->lock, flags);
1682
1683 return;
1684 }
1685
d08853a3 1686#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1687 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
b481de9c 1688 /* NIC fires this, but we don't use it, redundant with WAKEUP */
86ddbf62 1689 if (inta & CSR_INT_BIT_SCD) {
e1623446 1690 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1691 "the frame/frames.\n");
86ddbf62
AK
1692 priv->isr_stats.sch++;
1693 }
b481de9c
ZY
1694
1695 /* Alive notification via Rx interrupt will do the real work */
86ddbf62 1696 if (inta & CSR_INT_BIT_ALIVE) {
e1623446 1697 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
86ddbf62
AK
1698 priv->isr_stats.alive++;
1699 }
b481de9c
ZY
1700 }
1701#endif
1702 /* Safely ignore these bits for debug checks below */
25c03d8e 1703 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1704
b481de9c
ZY
1705 /* Error detected by uCode */
1706 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
1707 IWL_ERR(priv, "Microcode SW error detected. "
1708 "Restarting 0x%X.\n", inta);
86ddbf62
AK
1709 priv->isr_stats.sw++;
1710 priv->isr_stats.sw_err = inta;
8ccde88a 1711 iwl_irq_handle_error(priv);
b481de9c
ZY
1712 handled |= CSR_INT_BIT_SW_ERR;
1713 }
1714
1715 /* uCode wakes up after power-down sleep */
1716 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1717 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 1718 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
1719 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1720 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1721 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1722 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1723 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1724 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c 1725
86ddbf62 1726 priv->isr_stats.wakeup++;
b481de9c
ZY
1727 handled |= CSR_INT_BIT_WAKEUP;
1728 }
1729
1730 /* All uCode command responses, including Tx command responses,
1731 * Rx "responses" (frame-received notification), and other
1732 * notifications from uCode come through here*/
1733 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 1734 iwl3945_rx_handle(priv);
86ddbf62 1735 priv->isr_stats.rx++;
b481de9c
ZY
1736 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1737 }
1738
1739 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1740 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
86ddbf62 1741 priv->isr_stats.tx++;
b481de9c 1742
5d49f498 1743 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
a8b50a0a
MA
1744 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1745 (FH39_SRVC_CHNL), 0x0);
b481de9c
ZY
1746 handled |= CSR_INT_BIT_FH_TX;
1747 }
1748
86ddbf62 1749 if (inta & ~handled) {
15b1687c 1750 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
86ddbf62
AK
1751 priv->isr_stats.unhandled++;
1752 }
b481de9c 1753
40cefda9 1754 if (inta & ~priv->inta_mask) {
39aadf8c 1755 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
40cefda9 1756 inta & ~priv->inta_mask);
39aadf8c 1757 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
1758 }
1759
1760 /* Re-enable all interrupts */
0359facc
MA
1761 /* only Re-enable if disabled by irq */
1762 if (test_bit(STATUS_INT_ENABLED, &priv->status))
ed3b932e 1763 iwl_enable_interrupts(priv);
b481de9c 1764
d08853a3 1765#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1766 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
5d49f498
AK
1767 inta = iwl_read32(priv, CSR_INT);
1768 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1769 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 1770 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
1771 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1772 }
1773#endif
1774 spin_unlock_irqrestore(&priv->lock, flags);
1775}
1776
4a8a4322 1777static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 1778 enum ieee80211_band band,
f9340520 1779 u8 is_active, u8 n_probes,
bb8c093b 1780 struct iwl3945_scan_channel *scan_ch)
b481de9c 1781{
4e05c234 1782 struct ieee80211_channel *chan;
8318d78a 1783 const struct ieee80211_supported_band *sband;
d20b3c65 1784 const struct iwl_channel_info *ch_info;
b481de9c
ZY
1785 u16 passive_dwell = 0;
1786 u16 active_dwell = 0;
1787 int added, i;
1788
cbba18c6 1789 sband = iwl_get_hw_mode(priv, band);
8318d78a 1790 if (!sband)
b481de9c
ZY
1791 return 0;
1792
77fecfb8
SO
1793 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1794 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 1795
8f4807a1
AK
1796 if (passive_dwell <= active_dwell)
1797 passive_dwell = active_dwell + 1;
1798
4e05c234
JB
1799 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1800 chan = priv->scan_request->channels[i];
1801
1802 if (chan->band != band)
182e2e66
JB
1803 continue;
1804
4e05c234 1805 scan_ch->channel = chan->hw_value;
b481de9c 1806
e6148917 1807 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 1808 if (!is_channel_valid(ch_info)) {
e1623446 1809 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
1810 scan_ch->channel);
1811 continue;
1812 }
1813
011a0330
AK
1814 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1815 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1816 /* If passive , set up for auto-switch
1817 * and use long active_dwell time.
1818 */
b481de9c 1819 if (!is_active || is_channel_passive(ch_info) ||
4e05c234 1820 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 1821 scan_ch->type = 0; /* passive */
011a0330
AK
1822 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1823 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1824 } else {
b481de9c 1825 scan_ch->type = 1; /* active */
011a0330 1826 }
b481de9c 1827
011a0330
AK
1828 /* Set direct probe bits. These may be used both for active
1829 * scan channels (probes gets sent right away),
1830 * or for passive channels (probes get se sent only after
1831 * hearing clear Rx packet).*/
1832 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1833 if (n_probes)
0d21044e 1834 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
1835 } else {
1836 /* uCode v1 does not allow setting direct probe bits on
1837 * passive channel. */
1838 if ((scan_ch->type & 1) && n_probes)
0d21044e 1839 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 1840 }
b481de9c 1841
9fbab516 1842 /* Set txpower levels to defaults */
b481de9c
ZY
1843 scan_ch->tpc.dsp_atten = 110;
1844 /* scan_pwr_info->tpc.dsp_atten; */
1845
1846 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 1847 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
1848 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1849 else {
1850 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1851 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 1852 * power level:
8a1b0245 1853 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
1854 */
1855 }
1856
e1623446 1857 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
1858 scan_ch->channel,
1859 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1860 (scan_ch->type & 1) ?
1861 active_dwell : passive_dwell);
1862
1863 scan_ch++;
1864 added++;
1865 }
1866
e1623446 1867 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
1868 return added;
1869}
1870
4a8a4322 1871static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
1872 struct ieee80211_rate *rates)
1873{
1874 int i;
1875
1876 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
1877 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1878 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1879 rates[i].hw_value_short = i;
1880 rates[i].flags = 0;
d9829a67 1881 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 1882 /*
8318d78a 1883 * If CCK != 1M then set short preamble rate flag.
b481de9c 1884 */
bb8c093b 1885 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 1886 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 1887 }
b481de9c
ZY
1888 }
1889}
1890
b481de9c
ZY
1891/******************************************************************************
1892 *
1893 * uCode download functions
1894 *
1895 ******************************************************************************/
1896
4a8a4322 1897static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1898{
98c92211
TW
1899 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1900 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1901 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1902 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1903 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1904 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1905}
1906
1907/**
bb8c093b 1908 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
1909 * looking at all data.
1910 */
4a8a4322 1911static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
1912{
1913 u32 val;
1914 u32 save_len = len;
1915 int rc = 0;
1916 u32 errcnt;
1917
e1623446 1918 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 1919
5d49f498 1920 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1921 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
1922
1923 errcnt = 0;
1924 for (; len > 0; len -= sizeof(u32), image++) {
1925 /* read data comes through single port, auto-incr addr */
1926 /* NOTE: Use the debugless read so we don't flood kernel log
1927 * if IWL_DL_IO is set */
5d49f498 1928 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 1929 if (val != le32_to_cpu(*image)) {
15b1687c 1930 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
1931 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1932 save_len - len, val, le32_to_cpu(*image));
1933 rc = -EIO;
1934 errcnt++;
1935 if (errcnt >= 20)
1936 break;
1937 }
1938 }
1939
b481de9c
ZY
1940
1941 if (!errcnt)
e1623446
TW
1942 IWL_DEBUG_INFO(priv,
1943 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
1944
1945 return rc;
1946}
1947
1948
1949/**
bb8c093b 1950 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
1951 * using sample data 100 bytes apart. If these sample points are good,
1952 * it's a pretty good bet that everything between them is good, too.
1953 */
4a8a4322 1954static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
1955{
1956 u32 val;
1957 int rc = 0;
1958 u32 errcnt = 0;
1959 u32 i;
1960
e1623446 1961 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 1962
b481de9c
ZY
1963 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1964 /* read data comes through single port, auto-incr addr */
1965 /* NOTE: Use the debugless read so we don't flood kernel log
1966 * if IWL_DL_IO is set */
5d49f498 1967 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1968 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 1969 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
1970 if (val != le32_to_cpu(*image)) {
1971#if 0 /* Enable this if you want to see details */
15b1687c 1972 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
1973 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1974 i, val, *image);
1975#endif
1976 rc = -EIO;
1977 errcnt++;
1978 if (errcnt >= 3)
1979 break;
1980 }
1981 }
1982
b481de9c
ZY
1983 return rc;
1984}
1985
1986
1987/**
bb8c093b 1988 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
1989 * and verify its contents
1990 */
4a8a4322 1991static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
1992{
1993 __le32 *image;
1994 u32 len;
1995 int rc = 0;
1996
1997 /* Try bootstrap */
1998 image = (__le32 *)priv->ucode_boot.v_addr;
1999 len = priv->ucode_boot.len;
bb8c093b 2000 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2001 if (rc == 0) {
e1623446 2002 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2003 return 0;
2004 }
2005
2006 /* Try initialize */
2007 image = (__le32 *)priv->ucode_init.v_addr;
2008 len = priv->ucode_init.len;
bb8c093b 2009 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2010 if (rc == 0) {
e1623446 2011 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2012 return 0;
2013 }
2014
2015 /* Try runtime/protocol */
2016 image = (__le32 *)priv->ucode_code.v_addr;
2017 len = priv->ucode_code.len;
bb8c093b 2018 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2019 if (rc == 0) {
e1623446 2020 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2021 return 0;
2022 }
2023
15b1687c 2024 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2025
9fbab516
BC
2026 /* Since nothing seems to match, show first several data entries in
2027 * instruction SRAM, so maybe visual inspection will give a clue.
2028 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2029 image = (__le32 *)priv->ucode_boot.v_addr;
2030 len = priv->ucode_boot.len;
bb8c093b 2031 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2032
2033 return rc;
2034}
2035
4a8a4322 2036static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2037{
2038 /* Remove all resets to allow NIC to operate */
5d49f498 2039 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2040}
2041
2042/**
bb8c093b 2043 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2044 *
2045 * Copy into buffers for card to fetch via bus-mastering
2046 */
4a8a4322 2047static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2048{
cc0f555d 2049 const struct iwl_ucode_header *ucode;
a0987a8d 2050 int ret = -EINVAL, index;
b481de9c
ZY
2051 const struct firmware *ucode_raw;
2052 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2053 const char *name_pre = priv->cfg->fw_name_pre;
2054 const unsigned int api_max = priv->cfg->ucode_api_max;
2055 const unsigned int api_min = priv->cfg->ucode_api_min;
2056 char buf[25];
b481de9c
ZY
2057 u8 *src;
2058 size_t len;
a0987a8d 2059 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2060
2061 /* Ask kernel firmware_class module to get the boot firmware off disk.
2062 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2063 for (index = api_max; index >= api_min; index--) {
2064 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2065 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2066 if (ret < 0) {
15b1687c 2067 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2068 buf, ret);
2069 if (ret == -ENOENT)
2070 continue;
2071 else
2072 goto error;
2073 } else {
2074 if (index < api_max)
15b1687c
WT
2075 IWL_ERR(priv, "Loaded firmware %s, "
2076 "which is deprecated. "
2077 " Please use API v%u instead.\n",
a0987a8d 2078 buf, api_max);
e1623446
TW
2079 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2080 "(%zd bytes) from disk\n",
a0987a8d
RC
2081 buf, ucode_raw->size);
2082 break;
2083 }
b481de9c
ZY
2084 }
2085
a0987a8d
RC
2086 if (ret < 0)
2087 goto error;
b481de9c
ZY
2088
2089 /* Make sure that we got at least our header! */
cc0f555d 2090 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
15b1687c 2091 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2092 ret = -EINVAL;
b481de9c
ZY
2093 goto err_release;
2094 }
2095
2096 /* Data from ucode file: header followed by uCode images */
cc0f555d 2097 ucode = (struct iwl_ucode_header *)ucode_raw->data;
b481de9c 2098
c02b3acd 2099 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2100 api_ver = IWL_UCODE_API(priv->ucode_ver);
cc0f555d
JS
2101 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2102 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2103 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2104 init_data_size =
2105 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2106 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2107 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
b481de9c 2108
a0987a8d
RC
2109 /* api_ver should match the api version forming part of the
2110 * firmware filename ... but we don't check for that and only rely
877d0310 2111 * on the API version read from firmware header from here on forward */
a0987a8d
RC
2112
2113 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2114 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2115 "Driver supports v%u, firmware is v%u.\n",
2116 api_max, api_ver);
2117 priv->ucode_ver = 0;
2118 ret = -EINVAL;
2119 goto err_release;
2120 }
2121 if (api_ver != api_max)
15b1687c 2122 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2123 "got %u. New firmware can be obtained "
2124 "from http://www.intellinuxwireless.org.\n",
2125 api_max, api_ver);
2126
978785a3
TW
2127 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2128 IWL_UCODE_MAJOR(priv->ucode_ver),
2129 IWL_UCODE_MINOR(priv->ucode_ver),
2130 IWL_UCODE_API(priv->ucode_ver),
2131 IWL_UCODE_SERIAL(priv->ucode_ver));
2132
e1623446 2133 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2134 priv->ucode_ver);
e1623446
TW
2135 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2136 inst_size);
2137 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2138 data_size);
2139 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2140 init_size);
2141 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2142 init_data_size);
2143 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2144 boot_size);
b481de9c 2145
a0987a8d 2146
b481de9c 2147 /* Verify size of file vs. image size info in file's header */
cc0f555d 2148 if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
b481de9c
ZY
2149 inst_size + data_size + init_size +
2150 init_data_size + boot_size) {
2151
cc0f555d
JS
2152 IWL_DEBUG_INFO(priv,
2153 "uCode file size %zd does not match expected size\n",
2154 ucode_raw->size);
90e759d1 2155 ret = -EINVAL;
b481de9c
ZY
2156 goto err_release;
2157 }
2158
2159 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2160 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2161 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2162 inst_size);
2163 ret = -EINVAL;
b481de9c
ZY
2164 goto err_release;
2165 }
2166
250bdd21 2167 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2168 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2169 data_size);
2170 ret = -EINVAL;
b481de9c
ZY
2171 goto err_release;
2172 }
250bdd21 2173 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2174 IWL_DEBUG_INFO(priv,
2175 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2176 init_size);
2177 ret = -EINVAL;
b481de9c
ZY
2178 goto err_release;
2179 }
250bdd21 2180 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2181 IWL_DEBUG_INFO(priv,
2182 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2183 init_data_size);
2184 ret = -EINVAL;
b481de9c
ZY
2185 goto err_release;
2186 }
250bdd21 2187 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2188 IWL_DEBUG_INFO(priv,
2189 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2190 boot_size);
2191 ret = -EINVAL;
b481de9c
ZY
2192 goto err_release;
2193 }
2194
2195 /* Allocate ucode buffers for card's bus-master loading ... */
2196
2197 /* Runtime instructions and 2 copies of data:
2198 * 1) unmodified from disk
2199 * 2) backup cache for save/restore during power-downs */
2200 priv->ucode_code.len = inst_size;
98c92211 2201 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2202
2203 priv->ucode_data.len = data_size;
98c92211 2204 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2205
2206 priv->ucode_data_backup.len = data_size;
98c92211 2207 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2208
90e759d1
TW
2209 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2210 !priv->ucode_data_backup.v_addr)
2211 goto err_pci_alloc;
b481de9c
ZY
2212
2213 /* Initialization instructions and data */
90e759d1
TW
2214 if (init_size && init_data_size) {
2215 priv->ucode_init.len = init_size;
98c92211 2216 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2217
2218 priv->ucode_init_data.len = init_data_size;
98c92211 2219 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2220
2221 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2222 goto err_pci_alloc;
2223 }
b481de9c
ZY
2224
2225 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2226 if (boot_size) {
2227 priv->ucode_boot.len = boot_size;
98c92211 2228 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2229
90e759d1
TW
2230 if (!priv->ucode_boot.v_addr)
2231 goto err_pci_alloc;
2232 }
b481de9c
ZY
2233
2234 /* Copy images into buffers for card's bus-master reads ... */
2235
2236 /* Runtime instructions (first block of data in file) */
cc0f555d 2237 len = inst_size;
e1623446
TW
2238 IWL_DEBUG_INFO(priv,
2239 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2240 memcpy(priv->ucode_code.v_addr, src, len);
cc0f555d
JS
2241 src += len;
2242
e1623446 2243 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2244 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2245
2246 /* Runtime data (2nd block)
bb8c093b 2247 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
cc0f555d 2248 len = data_size;
e1623446
TW
2249 IWL_DEBUG_INFO(priv,
2250 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2251 memcpy(priv->ucode_data.v_addr, src, len);
2252 memcpy(priv->ucode_data_backup.v_addr, src, len);
cc0f555d 2253 src += len;
b481de9c
ZY
2254
2255 /* Initialization instructions (3rd block) */
2256 if (init_size) {
cc0f555d 2257 len = init_size;
e1623446
TW
2258 IWL_DEBUG_INFO(priv,
2259 "Copying (but not loading) init instr len %zd\n", len);
b481de9c 2260 memcpy(priv->ucode_init.v_addr, src, len);
cc0f555d 2261 src += len;
b481de9c
ZY
2262 }
2263
2264 /* Initialization data (4th block) */
2265 if (init_data_size) {
cc0f555d 2266 len = init_data_size;
e1623446
TW
2267 IWL_DEBUG_INFO(priv,
2268 "Copying (but not loading) init data len %zd\n", len);
b481de9c 2269 memcpy(priv->ucode_init_data.v_addr, src, len);
cc0f555d 2270 src += len;
b481de9c
ZY
2271 }
2272
2273 /* Bootstrap instructions (5th block) */
cc0f555d 2274 len = boot_size;
e1623446
TW
2275 IWL_DEBUG_INFO(priv,
2276 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2277 memcpy(priv->ucode_boot.v_addr, src, len);
2278
2279 /* We have our copies now, allow OS release its copies */
2280 release_firmware(ucode_raw);
2281 return 0;
2282
2283 err_pci_alloc:
15b1687c 2284 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2285 ret = -ENOMEM;
bb8c093b 2286 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2287
2288 err_release:
2289 release_firmware(ucode_raw);
2290
2291 error:
90e759d1 2292 return ret;
b481de9c
ZY
2293}
2294
2295
2296/**
bb8c093b 2297 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2298 *
2299 * Tell initialization uCode where to find runtime uCode.
2300 *
2301 * BSM registers initially contain pointers to initialization uCode.
2302 * We need to replace them to load runtime uCode inst and data,
2303 * and to save runtime data when powering down.
2304 */
4a8a4322 2305static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
2306{
2307 dma_addr_t pinst;
2308 dma_addr_t pdata;
b481de9c
ZY
2309
2310 /* bits 31:0 for 3945 */
2311 pinst = priv->ucode_code.p_addr;
2312 pdata = priv->ucode_data_backup.p_addr;
2313
b481de9c 2314 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
2315 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2316 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2317 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
2318 priv->ucode_data.len);
2319
a96a27f9 2320 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 2321 * that all new ptr/size info is in place */
5d49f498 2322 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
2323 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2324
e1623446 2325 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c 2326
a8b50a0a 2327 return 0;
b481de9c
ZY
2328}
2329
2330/**
bb8c093b 2331 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
2332 *
2333 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2334 *
b481de9c 2335 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 2336 */
4a8a4322 2337static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2338{
2339 /* Check alive response for "valid" sign from uCode */
2340 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2341 /* We had an error bringing up the hardware, so take it
2342 * all the way back down so we can try again */
e1623446 2343 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
2344 goto restart;
2345 }
2346
2347 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2348 * This is a paranoid check, because we would not have gotten the
2349 * "initialize" alive if code weren't properly loaded. */
bb8c093b 2350 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2351 /* Runtime instruction load was bad;
2352 * take it all the way back down so we can try again */
e1623446 2353 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
2354 goto restart;
2355 }
2356
2357 /* Send pointers to protocol/runtime uCode image ... init code will
2358 * load and launch runtime uCode, which will send us another "Alive"
2359 * notification. */
e1623446 2360 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 2361 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
2362 /* Runtime instruction load won't happen;
2363 * take it all the way back down so we can try again */
e1623446 2364 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
2365 goto restart;
2366 }
2367 return;
2368
2369 restart:
2370 queue_work(priv->workqueue, &priv->restart);
2371}
2372
b481de9c 2373/**
bb8c093b 2374 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 2375 * from protocol/runtime uCode (initialization uCode's
bb8c093b 2376 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 2377 */
4a8a4322 2378static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c 2379{
b481de9c
ZY
2380 int thermal_spin = 0;
2381 u32 rfkill;
2382
e1623446 2383 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
2384
2385 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2386 /* We had an error bringing up the hardware, so take it
2387 * all the way back down so we can try again */
e1623446 2388 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
2389 goto restart;
2390 }
2391
2392 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2393 * This is a paranoid check, because we would not have gotten the
2394 * "runtime" alive if code weren't properly loaded. */
bb8c093b 2395 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2396 /* Runtime instruction load was bad;
2397 * take it all the way back down so we can try again */
e1623446 2398 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
2399 goto restart;
2400 }
2401
c587de0b 2402 iwl_clear_stations_table(priv);
b481de9c 2403
5d49f498 2404 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 2405 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
b481de9c
ZY
2406
2407 if (rfkill & 0x1) {
2408 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 2409 /* if RFKILL is not on, then wait for thermal
b481de9c 2410 * sensor in adapter to kick in */
bb8c093b 2411 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
2412 thermal_spin++;
2413 udelay(10);
2414 }
2415
2416 if (thermal_spin)
e1623446 2417 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
2418 thermal_spin * 10);
2419 } else
2420 set_bit(STATUS_RF_KILL_HW, &priv->status);
2421
9fbab516 2422 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
2423 set_bit(STATUS_ALIVE, &priv->status);
2424
775a6e27 2425 if (iwl_is_rfkill(priv))
b481de9c
ZY
2426 return;
2427
36d6825b 2428 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2429
2430 priv->active_rate = priv->rates_mask;
2431 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2432
d25aabb0 2433 iwl_power_update_mode(priv, false);
b481de9c 2434
8ccde88a 2435 if (iwl_is_associated(priv)) {
bb8c093b 2436 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 2437 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 2438
8a9b9926 2439 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c
ZY
2440 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2441 } else {
2442 /* Initialize our rx_config data */
8ccde88a 2443 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
2444 }
2445
9fbab516 2446 /* Configure Bluetooth device coexistence support */
17f841cd 2447 iwl_send_bt_config(priv);
b481de9c
ZY
2448
2449 /* Configure the adapter for unassociated operation */
e0158e61 2450 iwlcore_commit_rxon(priv);
b481de9c 2451
b481de9c
ZY
2452 iwl3945_reg_txpower_periodic(priv);
2453
fe00b5a5
RC
2454 iwl3945_led_register(priv);
2455
e1623446 2456 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 2457 set_bit(STATUS_READY, &priv->status);
5a66926a 2458 wake_up_interruptible(&priv->wait_command_queue);
b481de9c 2459
9bdf5eca
MA
2460 /* reassociate for ADHOC mode */
2461 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2462 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2463 priv->vif);
2464 if (beacon)
9944b938 2465 iwl_mac_beacon_update(priv->hw, beacon);
9bdf5eca
MA
2466 }
2467
f45c2714 2468 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
727882d6 2469 iwl_set_mode(priv, priv->iw_mode);
f45c2714 2470
b481de9c
ZY
2471 return;
2472
2473 restart:
2474 queue_work(priv->workqueue, &priv->restart);
2475}
2476
4a8a4322 2477static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2478
4a8a4322 2479static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2480{
2481 unsigned long flags;
2482 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2483 struct ieee80211_conf *conf = NULL;
2484
e1623446 2485 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
2486
2487 conf = ieee80211_get_hw_conf(priv->hw);
2488
2489 if (!exit_pending)
2490 set_bit(STATUS_EXIT_PENDING, &priv->status);
2491
ab53d8af 2492 iwl3945_led_unregister(priv);
c587de0b 2493 iwl_clear_stations_table(priv);
b481de9c
ZY
2494
2495 /* Unblock any waiting calls */
2496 wake_up_interruptible_all(&priv->wait_command_queue);
2497
b481de9c
ZY
2498 /* Wipe out the EXIT_PENDING status bit if we are not actually
2499 * exiting the module */
2500 if (!exit_pending)
2501 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2502
2503 /* stop and reset the on-board processor */
5d49f498 2504 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2505
2506 /* tell the device to stop sending interrupts */
0359facc 2507 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 2508 iwl_disable_interrupts(priv);
0359facc
MA
2509 spin_unlock_irqrestore(&priv->lock, flags);
2510 iwl_synchronize_irq(priv);
b481de9c
ZY
2511
2512 if (priv->mac80211_registered)
2513 ieee80211_stop_queues(priv->hw);
2514
bb8c093b 2515 /* If we have not previously called iwl3945_init() then
6da3a13e 2516 * clear all bits but the RF Kill bits and return */
775a6e27 2517 if (!iwl_is_init(priv)) {
b481de9c
ZY
2518 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2519 STATUS_RF_KILL_HW |
9788864e
RC
2520 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2521 STATUS_GEO_CONFIGURED |
ebef2008
AK
2522 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2523 STATUS_EXIT_PENDING;
b481de9c
ZY
2524 goto exit;
2525 }
2526
6da3a13e 2527 /* ...otherwise clear out all the status bits but the RF Kill
a60e77e5 2528 * bit and continue taking the NIC down. */
b481de9c
ZY
2529 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2530 STATUS_RF_KILL_HW |
9788864e
RC
2531 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2532 STATUS_GEO_CONFIGURED |
b481de9c 2533 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
2534 STATUS_FW_ERROR |
2535 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2536 STATUS_EXIT_PENDING;
b481de9c 2537
e9414b6b 2538 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2539 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2540 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2541 spin_unlock_irqrestore(&priv->lock, flags);
2542
bb8c093b
CH
2543 iwl3945_hw_txq_ctx_stop(priv);
2544 iwl3945_hw_rxq_stop(priv);
b481de9c 2545
a8b50a0a
MA
2546 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2547 APMG_CLK_VAL_DMA_CLK_RQT);
b481de9c
ZY
2548
2549 udelay(5);
2550
6da3a13e 2551 if (exit_pending)
e9414b6b
AM
2552 priv->cfg->ops->lib->apm_ops.stop(priv);
2553 else
2554 priv->cfg->ops->lib->apm_ops.reset(priv);
2555
b481de9c 2556 exit:
3d24a9f7 2557 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2558
2559 if (priv->ibss_beacon)
2560 dev_kfree_skb(priv->ibss_beacon);
2561 priv->ibss_beacon = NULL;
2562
2563 /* clear out any free frames */
bb8c093b 2564 iwl3945_clear_free_frames(priv);
b481de9c
ZY
2565}
2566
4a8a4322 2567static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2568{
2569 mutex_lock(&priv->mutex);
bb8c093b 2570 __iwl3945_down(priv);
b481de9c 2571 mutex_unlock(&priv->mutex);
b24d22b1 2572
bb8c093b 2573 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
2574}
2575
2576#define MAX_HW_RESTARTS 5
2577
4a8a4322 2578static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
2579{
2580 int rc, i;
2581
2582 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 2583 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
2584 return -EIO;
2585 }
2586
e903fbd4 2587 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 2588 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
2589 return -EIO;
2590 }
2591
e655b9f0 2592 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 2593 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
2594 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2595 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2596 else {
2597 set_bit(STATUS_RF_KILL_HW, &priv->status);
6da3a13e
WYG
2598 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2599 return -ENODEV;
b481de9c 2600 }
80fcc9e2 2601
5d49f498 2602 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2603
bb8c093b 2604 rc = iwl3945_hw_nic_init(priv);
b481de9c 2605 if (rc) {
15b1687c 2606 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
2607 return rc;
2608 }
2609
2610 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
2611 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2612 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2613 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2614
2615 /* clear (again), then enable host interrupts */
5d49f498 2616 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
ed3b932e 2617 iwl_enable_interrupts(priv);
b481de9c
ZY
2618
2619 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
2620 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2621 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2622
2623 /* Copy original ucode data image from disk into backup cache.
2624 * This will be used to initialize the on-board processor's
2625 * data SRAM for a clean start when the runtime program first loads. */
2626 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2627 priv->ucode_data.len);
b481de9c 2628
e655b9f0
ZY
2629 /* We return success when we resume from suspend and rf_kill is on. */
2630 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2631 return 0;
2632
b481de9c
ZY
2633 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2634
c587de0b 2635 iwl_clear_stations_table(priv);
b481de9c
ZY
2636
2637 /* load bootstrap state machine,
2638 * load bootstrap program into processor's memory,
2639 * prepare to load the "initialize" uCode */
0164b9b4 2640 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
2641
2642 if (rc) {
15b1687c
WT
2643 IWL_ERR(priv,
2644 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
2645 continue;
2646 }
2647
2648 /* start card; "initialize" will load runtime ucode */
bb8c093b 2649 iwl3945_nic_start(priv);
b481de9c 2650
e1623446 2651 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
2652
2653 return 0;
2654 }
2655
2656 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2657 __iwl3945_down(priv);
ebef2008 2658 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2659
2660 /* tried to restart and config the device for as long as our
2661 * patience could withstand */
15b1687c 2662 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
2663 return -EIO;
2664}
2665
2666
2667/*****************************************************************************
2668 *
2669 * Workqueue callbacks
2670 *
2671 *****************************************************************************/
2672
bb8c093b 2673static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 2674{
4a8a4322
AK
2675 struct iwl_priv *priv =
2676 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2677
2678 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2679 return;
2680
2681 mutex_lock(&priv->mutex);
bb8c093b 2682 iwl3945_init_alive_start(priv);
b481de9c
ZY
2683 mutex_unlock(&priv->mutex);
2684}
2685
bb8c093b 2686static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 2687{
4a8a4322
AK
2688 struct iwl_priv *priv =
2689 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2690
2691 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2692 return;
2693
2694 mutex_lock(&priv->mutex);
bb8c093b 2695 iwl3945_alive_start(priv);
b481de9c
ZY
2696 mutex_unlock(&priv->mutex);
2697}
2698
2663516d
HS
2699static void iwl3945_rfkill_poll(struct work_struct *data)
2700{
2701 struct iwl_priv *priv =
2702 container_of(data, struct iwl_priv, rfkill_poll.work);
2663516d
HS
2703
2704 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2705 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2706 else
2707 set_bit(STATUS_RF_KILL_HW, &priv->status);
2708
a60e77e5
JB
2709 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2710 test_bit(STATUS_RF_KILL_HW, &priv->status));
2663516d
HS
2711
2712 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2713 round_jiffies_relative(2 * HZ));
2714
2715}
2716
b481de9c 2717#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 2718static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 2719{
4a8a4322
AK
2720 struct iwl_priv *priv =
2721 container_of(data, struct iwl_priv, request_scan);
c2d79b48 2722 struct iwl_host_cmd cmd = {
b481de9c 2723 .id = REPLY_SCAN_CMD,
bb8c093b 2724 .len = sizeof(struct iwl3945_scan_cmd),
c2acea8e 2725 .flags = CMD_SIZE_HUGE,
b481de9c
ZY
2726 };
2727 int rc = 0;
bb8c093b 2728 struct iwl3945_scan_cmd *scan;
b481de9c 2729 struct ieee80211_conf *conf = NULL;
1ecf9fc1 2730 u8 n_probes = 0;
8318d78a 2731 enum ieee80211_band band;
1ecf9fc1 2732 bool is_active = false;
b481de9c
ZY
2733
2734 conf = ieee80211_get_hw_conf(priv->hw);
2735
2736 mutex_lock(&priv->mutex);
2737
fbc9f97b
RC
2738 cancel_delayed_work(&priv->scan_check);
2739
775a6e27 2740 if (!iwl_is_ready(priv)) {
39aadf8c 2741 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
2742 goto done;
2743 }
2744
a96a27f9 2745 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
2746 * was given the chance to run... */
2747 if (!test_bit(STATUS_SCANNING, &priv->status))
2748 goto done;
2749
2750 /* This should never be called or scheduled if there is currently
2751 * a scan active in the hardware. */
2752 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
2753 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2754 "Ignoring second request.\n");
b481de9c
ZY
2755 rc = -EIO;
2756 goto done;
2757 }
2758
2759 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 2760 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
2761 goto done;
2762 }
2763
2764 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
2765 IWL_DEBUG_HC(priv,
2766 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
2767 goto done;
2768 }
2769
775a6e27 2770 if (iwl_is_rfkill(priv)) {
e1623446 2771 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
2772 goto done;
2773 }
2774
2775 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
2776 IWL_DEBUG_HC(priv,
2777 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
2778 goto done;
2779 }
2780
2781 if (!priv->scan_bands) {
e1623446 2782 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
2783 goto done;
2784 }
2785
805cee5b
WT
2786 if (!priv->scan) {
2787 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 2788 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 2789 if (!priv->scan) {
b481de9c
ZY
2790 rc = -ENOMEM;
2791 goto done;
2792 }
2793 }
805cee5b 2794 scan = priv->scan;
bb8c093b 2795 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
2796
2797 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2798 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2799
8ccde88a 2800 if (iwl_is_associated(priv)) {
b481de9c
ZY
2801 u16 interval = 0;
2802 u32 extra;
2803 u32 suspend_time = 100;
2804 u32 scan_suspend_time = 100;
2805 unsigned long flags;
2806
e1623446 2807 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
2808
2809 spin_lock_irqsave(&priv->lock, flags);
2810 interval = priv->beacon_int;
2811 spin_unlock_irqrestore(&priv->lock, flags);
2812
2813 scan->suspend_time = 0;
15e869d8 2814 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
2815 if (!interval)
2816 interval = suspend_time;
2817 /*
2818 * suspend time format:
2819 * 0-19: beacon interval in usec (time before exec.)
2820 * 20-23: 0
2821 * 24-31: number of beacons (suspend between channels)
2822 */
2823
2824 extra = (suspend_time / interval) << 24;
2825 scan_suspend_time = 0xFF0FFFFF &
2826 (extra | ((suspend_time % interval) * 1024));
2827
2828 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 2829 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
2830 scan_suspend_time, interval);
2831 }
2832
1ecf9fc1
JB
2833 if (priv->scan_request->n_ssids) {
2834 int i, p = 0;
2835 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2836 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2837 /* always does wildcard anyway */
2838 if (!priv->scan_request->ssids[i].ssid_len)
2839 continue;
2840 scan->direct_scan[p].id = WLAN_EID_SSID;
2841 scan->direct_scan[p].len =
2842 priv->scan_request->ssids[i].ssid_len;
2843 memcpy(scan->direct_scan[p].ssid,
2844 priv->scan_request->ssids[i].ssid,
2845 priv->scan_request->ssids[i].ssid_len);
2846 n_probes++;
2847 p++;
2848 }
2849 is_active = true;
f9340520 2850 } else
1ecf9fc1 2851 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
b481de9c
ZY
2852
2853 /* We don't build a direct scan probe request; the uCode will do
2854 * that based on the direct_mask added to each channel entry */
b481de9c 2855 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 2856 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
2857 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2858
2859 /* flags + rate selection */
2860
66b5004d 2861 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
2862 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2863 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2864 scan->good_CRC_th = 0;
8318d78a 2865 band = IEEE80211_BAND_2GHZ;
66b5004d 2866 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c 2867 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
b097ad29
JB
2868 /*
2869 * If active scaning is requested but a certain channel
2870 * is marked passive, we can do active scanning if we
2871 * detect transmissions.
2872 */
2873 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
8318d78a 2874 band = IEEE80211_BAND_5GHZ;
66b5004d 2875 } else {
39aadf8c 2876 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
2877 goto done;
2878 }
2879
77fecfb8 2880 scan->tx_cmd.len = cpu_to_le16(
1ecf9fc1
JB
2881 iwl_fill_probe_req(priv,
2882 (struct ieee80211_mgmt *)scan->data,
2883 priv->scan_request->ie,
2884 priv->scan_request->ie_len,
2885 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
77fecfb8 2886
b481de9c
ZY
2887 /* select Rx antennas */
2888 scan->flags |= iwl3945_get_antenna_flags(priv);
2889
279b05d4 2890 if (iwl_is_monitor_mode(priv))
b481de9c
ZY
2891 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2892
f9340520 2893 scan->channel_count =
1ecf9fc1 2894 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
f9340520 2895 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 2896
14b54336 2897 if (scan->channel_count == 0) {
e1623446 2898 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
2899 goto done;
2900 }
2901
b481de9c 2902 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 2903 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
2904 cmd.data = scan;
2905 scan->len = cpu_to_le16(cmd.len);
2906
2907 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 2908 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
2909 if (rc)
2910 goto done;
2911
2912 queue_delayed_work(priv->workqueue, &priv->scan_check,
2913 IWL_SCAN_CHECK_WATCHDOG);
2914
2915 mutex_unlock(&priv->mutex);
2916 return;
2917
2918 done:
2420ebc1
MA
2919 /* can not perform scan make sure we clear scanning
2920 * bits from status so next scan request can be performed.
2921 * if we dont clear scanning status bit here all next scan
2922 * will fail
2923 */
2924 clear_bit(STATUS_SCAN_HW, &priv->status);
2925 clear_bit(STATUS_SCANNING, &priv->status);
2926
01ebd063 2927 /* inform mac80211 scan aborted */
b481de9c
ZY
2928 queue_work(priv->workqueue, &priv->scan_completed);
2929 mutex_unlock(&priv->mutex);
2930}
2931
bb8c093b 2932static void iwl3945_bg_up(struct work_struct *data)
b481de9c 2933{
4a8a4322 2934 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2935
2936 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2937 return;
2938
2939 mutex_lock(&priv->mutex);
bb8c093b 2940 __iwl3945_up(priv);
b481de9c
ZY
2941 mutex_unlock(&priv->mutex);
2942}
2943
bb8c093b 2944static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 2945{
4a8a4322 2946 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2947
2948 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2949 return;
2950
19cc1087
JB
2951 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2952 mutex_lock(&priv->mutex);
2953 priv->vif = NULL;
2954 priv->is_open = 0;
2955 mutex_unlock(&priv->mutex);
2956 iwl3945_down(priv);
2957 ieee80211_restart_hw(priv->hw);
2958 } else {
2959 iwl3945_down(priv);
2960 queue_work(priv->workqueue, &priv->up);
2961 }
b481de9c
ZY
2962}
2963
bb8c093b 2964static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 2965{
4a8a4322
AK
2966 struct iwl_priv *priv =
2967 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2968
2969 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2970 return;
2971
2972 mutex_lock(&priv->mutex);
bb8c093b 2973 iwl3945_rx_replenish(priv);
b481de9c
ZY
2974 mutex_unlock(&priv->mutex);
2975}
2976
7878a5a4
MA
2977#define IWL_DELAY_NEXT_SCAN (HZ*2)
2978
5bbe233b 2979void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 2980{
b481de9c
ZY
2981 int rc = 0;
2982 struct ieee80211_conf *conf = NULL;
2983
05c914fe 2984 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 2985 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2986 return;
2987 }
2988
2989
e1623446 2990 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 2991 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
2992
2993 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2994 return;
2995
322a9811 2996 if (!priv->vif || !priv->is_open)
6ef89d0a 2997 return;
322a9811 2998
af0053d6 2999 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3000
b481de9c
ZY
3001 conf = ieee80211_get_hw_conf(priv->hw);
3002
8ccde88a 3003 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3004 iwlcore_commit_rxon(priv);
b481de9c 3005
28afaf91 3006 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
2c2f3b33 3007 iwl_setup_rxon_timing(priv);
518099a8 3008 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3009 sizeof(priv->rxon_timing), &priv->rxon_timing);
3010 if (rc)
39aadf8c 3011 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3012 "Attempting to continue.\n");
3013
8ccde88a 3014 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3015
8ccde88a 3016 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3017
e1623446 3018 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3019 priv->assoc_id, priv->beacon_int);
3020
3021 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3022 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3023 else
8ccde88a 3024 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3025
8ccde88a 3026 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3027 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3028 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3029 else
8ccde88a 3030 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3031
05c914fe 3032 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3033 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3034
3035 }
3036
e0158e61 3037 iwlcore_commit_rxon(priv);
b481de9c
ZY
3038
3039 switch (priv->iw_mode) {
05c914fe 3040 case NL80211_IFTYPE_STATION:
bb8c093b 3041 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3042 break;
3043
05c914fe 3044 case NL80211_IFTYPE_ADHOC:
b481de9c 3045
ce546fd2 3046 priv->assoc_id = 1;
c587de0b 3047 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
b481de9c 3048 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3049 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3050 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3051 CMD_ASYNC);
bb8c093b
CH
3052 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3053 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3054
3055 break;
3056
3057 default:
15b1687c 3058 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3059 __func__, priv->iw_mode);
b481de9c
ZY
3060 break;
3061 }
3062
14d2aac5 3063 iwl_activate_qos(priv, 0);
292ae174 3064
7878a5a4
MA
3065 /* we have just associated, don't start scan too early */
3066 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3067}
3068
b481de9c
ZY
3069/*****************************************************************************
3070 *
3071 * mac80211 entry point functions
3072 *
3073 *****************************************************************************/
3074
5a66926a
ZY
3075#define UCODE_READY_TIMEOUT (2 * HZ)
3076
bb8c093b 3077static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3078{
4a8a4322 3079 struct iwl_priv *priv = hw->priv;
5a66926a 3080 int ret;
b481de9c 3081
e1623446 3082 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3083
3084 /* we should be verifying the device is ready to be opened */
3085 mutex_lock(&priv->mutex);
3086
5a66926a
ZY
3087 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3088 * ucode filename and max sizes are card-specific. */
3089
3090 if (!priv->ucode_code.len) {
3091 ret = iwl3945_read_ucode(priv);
3092 if (ret) {
15b1687c 3093 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3094 mutex_unlock(&priv->mutex);
3095 goto out_release_irq;
3096 }
3097 }
b481de9c 3098
e655b9f0 3099 ret = __iwl3945_up(priv);
b481de9c
ZY
3100
3101 mutex_unlock(&priv->mutex);
5a66926a 3102
e655b9f0
ZY
3103 if (ret)
3104 goto out_release_irq;
3105
e1623446 3106 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0 3107
5a66926a
ZY
3108 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3109 * mac80211 will not be run successfully. */
3110 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3111 test_bit(STATUS_READY, &priv->status),
3112 UCODE_READY_TIMEOUT);
3113 if (!ret) {
3114 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3115 IWL_ERR(priv,
3116 "Wait for START_ALIVE timeout after %dms.\n",
3117 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3118 ret = -ETIMEDOUT;
3119 goto out_release_irq;
3120 }
3121 }
3122
2663516d
HS
3123 /* ucode is running and will send rfkill notifications,
3124 * no need to poll the killswitch state anymore */
3125 cancel_delayed_work(&priv->rfkill_poll);
3126
e655b9f0 3127 priv->is_open = 1;
e1623446 3128 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3129 return 0;
5a66926a
ZY
3130
3131out_release_irq:
e655b9f0 3132 priv->is_open = 0;
e1623446 3133 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3134 return ret;
b481de9c
ZY
3135}
3136
bb8c093b 3137static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3138{
4a8a4322 3139 struct iwl_priv *priv = hw->priv;
b481de9c 3140
e1623446 3141 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3142
e655b9f0 3143 if (!priv->is_open) {
e1623446 3144 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3145 return;
3146 }
3147
b481de9c 3148 priv->is_open = 0;
5a66926a 3149
775a6e27 3150 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3151 /* stop mac, cancel any scan request and clear
3152 * RXON_FILTER_ASSOC_MSK BIT
3153 */
5a66926a 3154 mutex_lock(&priv->mutex);
af0053d6 3155 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3156 mutex_unlock(&priv->mutex);
fde3571f
MA
3157 }
3158
5a66926a
ZY
3159 iwl3945_down(priv);
3160
3161 flush_workqueue(priv->workqueue);
2663516d
HS
3162
3163 /* start polling the killswitch state again */
3164 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3165 round_jiffies_relative(2 * HZ));
6ef89d0a 3166
e1623446 3167 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3168}
3169
e039fa4a 3170static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3171{
4a8a4322 3172 struct iwl_priv *priv = hw->priv;
b481de9c 3173
e1623446 3174 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3175
e1623446 3176 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3177 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3178
e039fa4a 3179 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3180 dev_kfree_skb_any(skb);
3181
e1623446 3182 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3183 return NETDEV_TX_OK;
b481de9c
ZY
3184}
3185
60690a6a 3186void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
3187{
3188 int rc = 0;
3189
d986bcd1 3190 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
3191 return;
3192
3193 /* The following should be done only at AP bring up */
8ccde88a 3194 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
3195
3196 /* RXON - unassoc (to set timing command) */
8ccde88a 3197 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3198 iwlcore_commit_rxon(priv);
b481de9c
ZY
3199
3200 /* RXON Timing */
28afaf91 3201 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
2c2f3b33 3202 iwl_setup_rxon_timing(priv);
518099a8
SO
3203 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3204 sizeof(priv->rxon_timing),
3205 &priv->rxon_timing);
b481de9c 3206 if (rc)
39aadf8c 3207 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3208 "Attempting to continue.\n");
3209
3210 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 3211 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3212 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3213 priv->staging_rxon.flags |=
b481de9c
ZY
3214 RXON_FLG_SHORT_PREAMBLE_MSK;
3215 else
8ccde88a 3216 priv->staging_rxon.flags &=
b481de9c
ZY
3217 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3218
8ccde88a 3219 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
3220 if (priv->assoc_capability &
3221 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3222 priv->staging_rxon.flags |=
b481de9c
ZY
3223 RXON_FLG_SHORT_SLOT_MSK;
3224 else
8ccde88a 3225 priv->staging_rxon.flags &=
b481de9c
ZY
3226 ~RXON_FLG_SHORT_SLOT_MSK;
3227
05c914fe 3228 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3229 priv->staging_rxon.flags &=
b481de9c
ZY
3230 ~RXON_FLG_SHORT_SLOT_MSK;
3231 }
3232 /* restore RXON assoc */
8ccde88a 3233 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
e0158e61 3234 iwlcore_commit_rxon(priv);
c587de0b 3235 iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
556f8db7 3236 }
bb8c093b 3237 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3238
3239 /* FIXME - we need to add code here to detect a totally new
3240 * configuration, reset the AP, unassoc, rxon timing, assoc,
3241 * clear sta table, add BCAST sta... */
3242}
3243
bb8c093b 3244static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
3245 struct ieee80211_vif *vif,
3246 struct ieee80211_sta *sta,
3247 struct ieee80211_key_conf *key)
b481de9c 3248{
4a8a4322 3249 struct iwl_priv *priv = hw->priv;
dc822b5d 3250 const u8 *addr;
6e21f15c
AK
3251 int ret = 0;
3252 u8 sta_id = IWL_INVALID_STATION;
3253 u8 static_key;
b481de9c 3254
e1623446 3255 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3256
df878d8f 3257 if (iwl3945_mod_params.sw_crypto) {
e1623446 3258 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
3259 return -EOPNOTSUPP;
3260 }
3261
42986796 3262 addr = sta ? sta->addr : iwl_bcast_addr;
6e21f15c
AK
3263 static_key = !iwl_is_associated(priv);
3264
3265 if (!static_key) {
c587de0b 3266 sta_id = iwl_find_station(priv, addr);
6e21f15c 3267 if (sta_id == IWL_INVALID_STATION) {
12514396 3268 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
6e21f15c
AK
3269 addr);
3270 return -EINVAL;
3271 }
b481de9c
ZY
3272 }
3273
3274 mutex_lock(&priv->mutex);
af0053d6 3275 iwl_scan_cancel_timeout(priv, 100);
6e21f15c 3276 mutex_unlock(&priv->mutex);
15e869d8 3277
b481de9c 3278 switch (cmd) {
6e21f15c
AK
3279 case SET_KEY:
3280 if (static_key)
3281 ret = iwl3945_set_static_key(priv, key);
3282 else
3283 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3284 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
3285 break;
3286 case DISABLE_KEY:
6e21f15c
AK
3287 if (static_key)
3288 ret = iwl3945_remove_static_key(priv);
3289 else
3290 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3291 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
3292 break;
3293 default:
42986796 3294 ret = -EINVAL;
b481de9c
ZY
3295 }
3296
e1623446 3297 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3298
42986796 3299 return ret;
b481de9c
ZY
3300}
3301
b481de9c
ZY
3302/*****************************************************************************
3303 *
3304 * sysfs attributes
3305 *
3306 *****************************************************************************/
3307
d08853a3 3308#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3309
3310/*
3311 * The following adds a new attribute to the sysfs representation
3312 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3313 * used for controlling the debug level.
3314 *
3315 * See the level definitions in iwl for details.
a562a9dd 3316 *
3d816c77
RC
3317 * The debug_level being managed using sysfs below is a per device debug
3318 * level that is used instead of the global debug level if it (the per
3319 * device debug level) is set.
b481de9c 3320 */
40b8ec0b
SO
3321static ssize_t show_debug_level(struct device *d,
3322 struct device_attribute *attr, char *buf)
b481de9c 3323{
3d816c77
RC
3324 struct iwl_priv *priv = dev_get_drvdata(d);
3325 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
b481de9c 3326}
40b8ec0b
SO
3327static ssize_t store_debug_level(struct device *d,
3328 struct device_attribute *attr,
b481de9c
ZY
3329 const char *buf, size_t count)
3330{
928841b1 3331 struct iwl_priv *priv = dev_get_drvdata(d);
40b8ec0b
SO
3332 unsigned long val;
3333 int ret;
b481de9c 3334
40b8ec0b
SO
3335 ret = strict_strtoul(buf, 0, &val);
3336 if (ret)
978785a3 3337 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
20594eb0 3338 else {
3d816c77 3339 priv->debug_level = val;
20594eb0
WYG
3340 if (iwl_alloc_traffic_mem(priv))
3341 IWL_ERR(priv,
3342 "Not enough memory to generate traffic log\n");
3343 }
b481de9c
ZY
3344 return strnlen(buf, count);
3345}
3346
40b8ec0b
SO
3347static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3348 show_debug_level, store_debug_level);
b481de9c 3349
d08853a3 3350#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3351
b481de9c
ZY
3352static ssize_t show_temperature(struct device *d,
3353 struct device_attribute *attr, char *buf)
3354{
928841b1 3355 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3356
775a6e27 3357 if (!iwl_is_alive(priv))
b481de9c
ZY
3358 return -EAGAIN;
3359
bb8c093b 3360 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
3361}
3362
3363static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3364
b481de9c
ZY
3365static ssize_t show_tx_power(struct device *d,
3366 struct device_attribute *attr, char *buf)
3367{
928841b1 3368 struct iwl_priv *priv = dev_get_drvdata(d);
62ea9c5b 3369 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3370}
3371
3372static ssize_t store_tx_power(struct device *d,
3373 struct device_attribute *attr,
3374 const char *buf, size_t count)
3375{
928841b1 3376 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3377 char *p = (char *)buf;
3378 u32 val;
3379
3380 val = simple_strtoul(p, &p, 10);
3381 if (p == buf)
978785a3 3382 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 3383 else
bb8c093b 3384 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
3385
3386 return count;
3387}
3388
3389static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3390
3391static ssize_t show_flags(struct device *d,
3392 struct device_attribute *attr, char *buf)
3393{
928841b1 3394 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3395
8ccde88a 3396 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
3397}
3398
3399static ssize_t store_flags(struct device *d,
3400 struct device_attribute *attr,
3401 const char *buf, size_t count)
3402{
928841b1 3403 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3404 u32 flags = simple_strtoul(buf, NULL, 0);
3405
3406 mutex_lock(&priv->mutex);
8ccde88a 3407 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 3408 /* Cancel any currently running scans... */
af0053d6 3409 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3410 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3411 else {
e1623446 3412 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 3413 flags);
8ccde88a 3414 priv->staging_rxon.flags = cpu_to_le32(flags);
e0158e61 3415 iwlcore_commit_rxon(priv);
b481de9c
ZY
3416 }
3417 }
3418 mutex_unlock(&priv->mutex);
3419
3420 return count;
3421}
3422
3423static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3424
3425static ssize_t show_filter_flags(struct device *d,
3426 struct device_attribute *attr, char *buf)
3427{
928841b1 3428 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3429
3430 return sprintf(buf, "0x%04X\n",
8ccde88a 3431 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
3432}
3433
3434static ssize_t store_filter_flags(struct device *d,
3435 struct device_attribute *attr,
3436 const char *buf, size_t count)
3437{
928841b1 3438 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3439 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3440
3441 mutex_lock(&priv->mutex);
8ccde88a 3442 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 3443 /* Cancel any currently running scans... */
af0053d6 3444 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3445 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3446 else {
e1623446 3447 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 3448 "0x%04X\n", filter_flags);
8ccde88a 3449 priv->staging_rxon.filter_flags =
b481de9c 3450 cpu_to_le32(filter_flags);
e0158e61 3451 iwlcore_commit_rxon(priv);
b481de9c
ZY
3452 }
3453 }
3454 mutex_unlock(&priv->mutex);
3455
3456 return count;
3457}
3458
3459static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3460 store_filter_flags);
3461
c8b0e6e1 3462#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
3463
3464static ssize_t show_measurement(struct device *d,
3465 struct device_attribute *attr, char *buf)
3466{
4a8a4322 3467 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 3468 struct iwl_spectrum_notification measure_report;
b481de9c 3469 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3470 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3471 unsigned long flags;
3472
3473 spin_lock_irqsave(&priv->lock, flags);
3474 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3475 spin_unlock_irqrestore(&priv->lock, flags);
3476 return 0;
3477 }
3478 memcpy(&measure_report, &priv->measure_report, size);
3479 priv->measurement_status = 0;
3480 spin_unlock_irqrestore(&priv->lock, flags);
3481
3482 while (size && (PAGE_SIZE - len)) {
3483 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3484 PAGE_SIZE - len, 1);
3485 len = strlen(buf);
3486 if (PAGE_SIZE - len)
3487 buf[len++] = '\n';
3488
3489 ofs += 16;
3490 size -= min(size, 16U);
3491 }
3492
3493 return len;
3494}
3495
3496static ssize_t store_measurement(struct device *d,
3497 struct device_attribute *attr,
3498 const char *buf, size_t count)
3499{
4a8a4322 3500 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3501 struct ieee80211_measurement_params params = {
8ccde88a 3502 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
3503 .start_time = cpu_to_le64(priv->last_tsf),
3504 .duration = cpu_to_le16(1),
3505 };
3506 u8 type = IWL_MEASURE_BASIC;
3507 u8 buffer[32];
3508 u8 channel;
3509
3510 if (count) {
3511 char *p = buffer;
3512 strncpy(buffer, buf, min(sizeof(buffer), count));
3513 channel = simple_strtoul(p, NULL, 0);
3514 if (channel)
3515 params.channel = channel;
3516
3517 p = buffer;
3518 while (*p && *p != ' ')
3519 p++;
3520 if (*p)
3521 type = simple_strtoul(p + 1, NULL, 0);
3522 }
3523
e1623446 3524 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 3525 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3526 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
3527
3528 return count;
3529}
3530
3531static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3532 show_measurement, store_measurement);
c8b0e6e1 3533#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 3534
b481de9c
ZY
3535static ssize_t store_retry_rate(struct device *d,
3536 struct device_attribute *attr,
3537 const char *buf, size_t count)
3538{
4a8a4322 3539 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3540
3541 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3542 if (priv->retry_rate <= 0)
3543 priv->retry_rate = 1;
3544
3545 return count;
3546}
3547
3548static ssize_t show_retry_rate(struct device *d,
3549 struct device_attribute *attr, char *buf)
3550{
4a8a4322 3551 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3552 return sprintf(buf, "%d", priv->retry_rate);
3553}
3554
3555static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3556 store_retry_rate);
3557
d25aabb0 3558
b481de9c
ZY
3559static ssize_t show_channels(struct device *d,
3560 struct device_attribute *attr, char *buf)
3561{
8318d78a
JB
3562 /* all this shit doesn't belong into sysfs anyway */
3563 return 0;
b481de9c
ZY
3564}
3565
3566static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3567
3568static ssize_t show_statistics(struct device *d,
3569 struct device_attribute *attr, char *buf)
3570{
4a8a4322 3571 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3572 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 3573 u32 len = 0, ofs = 0;
f2c7e521 3574 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
3575 int rc = 0;
3576
775a6e27 3577 if (!iwl_is_alive(priv))
b481de9c
ZY
3578 return -EAGAIN;
3579
3580 mutex_lock(&priv->mutex);
17f841cd 3581 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3582 mutex_unlock(&priv->mutex);
3583
3584 if (rc) {
3585 len = sprintf(buf,
3586 "Error sending statistics request: 0x%08X\n", rc);
3587 return len;
3588 }
3589
3590 while (size && (PAGE_SIZE - len)) {
3591 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3592 PAGE_SIZE - len, 1);
3593 len = strlen(buf);
3594 if (PAGE_SIZE - len)
3595 buf[len++] = '\n';
3596
3597 ofs += 16;
3598 size -= min(size, 16U);
3599 }
3600
3601 return len;
3602}
3603
3604static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3605
3606static ssize_t show_antenna(struct device *d,
3607 struct device_attribute *attr, char *buf)
3608{
4a8a4322 3609 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3610
775a6e27 3611 if (!iwl_is_alive(priv))
b481de9c
ZY
3612 return -EAGAIN;
3613
7e4bca5e 3614 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
3615}
3616
3617static ssize_t store_antenna(struct device *d,
3618 struct device_attribute *attr,
3619 const char *buf, size_t count)
3620{
7530f85f 3621 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 3622 int ant;
b481de9c
ZY
3623
3624 if (count == 0)
3625 return 0;
3626
3627 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 3628 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
3629 return count;
3630 }
3631
3632 if ((ant >= 0) && (ant <= 2)) {
e1623446 3633 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 3634 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 3635 } else
e1623446 3636 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
3637
3638
3639 return count;
3640}
3641
3642static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3643
3644static ssize_t show_status(struct device *d,
3645 struct device_attribute *attr, char *buf)
3646{
928841b1 3647 struct iwl_priv *priv = dev_get_drvdata(d);
775a6e27 3648 if (!iwl_is_alive(priv))
b481de9c
ZY
3649 return -EAGAIN;
3650 return sprintf(buf, "0x%08x\n", (int)priv->status);
3651}
3652
3653static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3654
3655static ssize_t dump_error_log(struct device *d,
3656 struct device_attribute *attr,
3657 const char *buf, size_t count)
3658{
928841b1 3659 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3660 char *p = (char *)buf;
3661
3662 if (p[0] == '1')
928841b1 3663 iwl3945_dump_nic_error_log(priv);
b481de9c
ZY
3664
3665 return strnlen(buf, count);
3666}
3667
3668static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3669
3670static ssize_t dump_event_log(struct device *d,
3671 struct device_attribute *attr,
3672 const char *buf, size_t count)
3673{
928841b1 3674 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3675 char *p = (char *)buf;
3676
3677 if (p[0] == '1')
928841b1 3678 iwl3945_dump_nic_event_log(priv);
b481de9c
ZY
3679
3680 return strnlen(buf, count);
3681}
3682
3683static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
3684
3685/*****************************************************************************
3686 *
a96a27f9 3687 * driver setup and tear down
b481de9c
ZY
3688 *
3689 *****************************************************************************/
3690
4a8a4322 3691static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 3692{
d21050c7 3693 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
3694
3695 init_waitqueue_head(&priv->wait_command_queue);
3696
bb8c093b
CH
3697 INIT_WORK(&priv->up, iwl3945_bg_up);
3698 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3699 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
bb8c093b 3700 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
3701 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3702 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 3703 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
3704 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3705 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3706 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3707 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
3708
3709 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
3710
3711 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 3712 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
3713}
3714
4a8a4322 3715static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3716{
bb8c093b 3717 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 3718
e47eb6ad 3719 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
3720 cancel_delayed_work(&priv->scan_check);
3721 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
3722 cancel_work_sync(&priv->beacon_update);
3723}
3724
bb8c093b 3725static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
3726 &dev_attr_antenna.attr,
3727 &dev_attr_channels.attr,
3728 &dev_attr_dump_errors.attr,
3729 &dev_attr_dump_events.attr,
3730 &dev_attr_flags.attr,
3731 &dev_attr_filter_flags.attr,
c8b0e6e1 3732#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
3733 &dev_attr_measurement.attr,
3734#endif
b481de9c 3735 &dev_attr_retry_rate.attr,
b481de9c
ZY
3736 &dev_attr_statistics.attr,
3737 &dev_attr_status.attr,
3738 &dev_attr_temperature.attr,
b481de9c 3739 &dev_attr_tx_power.attr,
d08853a3 3740#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
3741 &dev_attr_debug_level.attr,
3742#endif
b481de9c
ZY
3743 NULL
3744};
3745
bb8c093b 3746static struct attribute_group iwl3945_attribute_group = {
b481de9c 3747 .name = NULL, /* put in device directory */
bb8c093b 3748 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
3749};
3750
bb8c093b
CH
3751static struct ieee80211_ops iwl3945_hw_ops = {
3752 .tx = iwl3945_mac_tx,
3753 .start = iwl3945_mac_start,
3754 .stop = iwl3945_mac_stop,
cbb6ab94 3755 .add_interface = iwl_mac_add_interface,
d8052319 3756 .remove_interface = iwl_mac_remove_interface,
4808368d 3757 .config = iwl_mac_config,
8ccde88a 3758 .configure_filter = iwl_configure_filter,
bb8c093b 3759 .set_key = iwl3945_mac_set_key,
aa89f31e 3760 .get_tx_stats = iwl_mac_get_tx_stats,
488829f1 3761 .conf_tx = iwl_mac_conf_tx,
bd564261 3762 .reset_tsf = iwl_mac_reset_tsf,
5bbe233b 3763 .bss_info_changed = iwl_bss_info_changed,
e9dde6f6 3764 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
3765};
3766
e52119c5 3767static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
3768{
3769 int ret;
e6148917 3770 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
3771
3772 priv->retry_rate = 1;
3773 priv->ibss_beacon = NULL;
3774
3775 spin_lock_init(&priv->lock);
90a30a02
KA
3776 spin_lock_init(&priv->sta_lock);
3777 spin_lock_init(&priv->hcmd_lock);
3778
3779 INIT_LIST_HEAD(&priv->free_frames);
3780
3781 mutex_init(&priv->mutex);
3782
3783 /* Clear the driver's (not device's) station table */
c587de0b 3784 iwl_clear_stations_table(priv);
90a30a02
KA
3785
3786 priv->data_retry_limit = -1;
3787 priv->ieee_channels = NULL;
3788 priv->ieee_rates = NULL;
3789 priv->band = IEEE80211_BAND_2GHZ;
3790
3791 priv->iw_mode = NL80211_IFTYPE_STATION;
3792
3793 iwl_reset_qos(priv);
3794
3795 priv->qos_data.qos_active = 0;
3796 priv->qos_data.qos_cap.val = 0;
3797
3798 priv->rates_mask = IWL_RATES_MASK;
62ea9c5b 3799 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 3800
e6148917
SO
3801 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3802 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3803 eeprom->version);
3804 ret = -EINVAL;
3805 goto err;
3806 }
3807 ret = iwl_init_channel_map(priv);
90a30a02
KA
3808 if (ret) {
3809 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3810 goto err;
3811 }
3812
e6148917
SO
3813 /* Set up txpower settings in driver for all channels */
3814 if (iwl3945_txpower_set_from_eeprom(priv)) {
3815 ret = -EIO;
3816 goto err_free_channel_map;
3817 }
3818
534166de 3819 ret = iwlcore_init_geos(priv);
90a30a02
KA
3820 if (ret) {
3821 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3822 goto err_free_channel_map;
3823 }
534166de
SO
3824 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3825
2a4ddaab
AK
3826 return 0;
3827
3828err_free_channel_map:
3829 iwl_free_channel_map(priv);
3830err:
3831 return ret;
3832}
3833
3834static int iwl3945_setup_mac(struct iwl_priv *priv)
3835{
3836 int ret;
3837 struct ieee80211_hw *hw = priv->hw;
3838
3839 hw->rate_control_algorithm = "iwl-3945-rs";
3840 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3841
3842 /* Tell mac80211 our characteristics */
3843 hw->flags = IEEE80211_HW_SIGNAL_DBM |
b1c6019b 3844 IEEE80211_HW_NOISE_DBM |
e312c24c
JB
3845 IEEE80211_HW_SPECTRUM_MGMT |
3846 IEEE80211_HW_SUPPORTS_PS |
3847 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2a4ddaab
AK
3848
3849 hw->wiphy->interface_modes =
3850 BIT(NL80211_IFTYPE_STATION) |
3851 BIT(NL80211_IFTYPE_ADHOC);
3852
3853 hw->wiphy->custom_regulatory = true;
3854
37184244
LR
3855 /* Firmware does not support this */
3856 hw->wiphy->disable_beacon_hints = true;
3857
1ecf9fc1
JB
3858 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3859 /* we create the 802.11 header and a zero-length SSID element */
3860 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
d60cc91a 3861
2a4ddaab
AK
3862 /* Default value; 4 EDCA QOS priorities */
3863 hw->queues = 4;
3864
534166de
SO
3865 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3866 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3867 &priv->bands[IEEE80211_BAND_2GHZ];
2a4ddaab 3868
534166de
SO
3869 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3870 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3871 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02 3872
2a4ddaab
AK
3873 ret = ieee80211_register_hw(priv->hw);
3874 if (ret) {
3875 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3876 return ret;
3877 }
3878 priv->mac80211_registered = 1;
90a30a02 3879
2a4ddaab 3880 return 0;
90a30a02
KA
3881}
3882
bb8c093b 3883static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
3884{
3885 int err = 0;
4a8a4322 3886 struct iwl_priv *priv;
b481de9c 3887 struct ieee80211_hw *hw;
c0f20d91 3888 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 3889 struct iwl3945_eeprom *eeprom;
0359facc 3890 unsigned long flags;
b481de9c 3891
cee53ddb
KA
3892 /***********************
3893 * 1. Allocating HW data
3894 * ********************/
3895
b481de9c
ZY
3896 /* mac80211 allocates memory for this device instance, including
3897 * space for this driver's private structure */
90a30a02 3898 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 3899 if (hw == NULL) {
a3139c59 3900 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
3901 err = -ENOMEM;
3902 goto out;
3903 }
b481de9c 3904 priv = hw->priv;
90a30a02 3905 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 3906
90a30a02
KA
3907 /*
3908 * Disabling hardware scan means that mac80211 will perform scans
3909 * "the hard way", rather than using device's scan.
3910 */
df878d8f 3911 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 3912 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
3913 iwl3945_hw_ops.hw_scan = NULL;
3914 }
3915
90a30a02 3916
e1623446 3917 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
3918 priv->cfg = cfg;
3919 priv->pci_dev = pdev;
40cefda9 3920 priv->inta_mask = CSR_INI_SET_MASK;
cee53ddb 3921
d08853a3 3922#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3923 atomic_set(&priv->restrict_refcnt, 0);
3924#endif
20594eb0
WYG
3925 if (iwl_alloc_traffic_mem(priv))
3926 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
b481de9c 3927
cee53ddb
KA
3928 /***************************
3929 * 2. Initializing PCI bus
3930 * *************************/
b481de9c
ZY
3931 if (pci_enable_device(pdev)) {
3932 err = -ENODEV;
3933 goto out_ieee80211_free_hw;
3934 }
3935
3936 pci_set_master(pdev);
3937
284901a9 3938 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 3939 if (!err)
284901a9 3940 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 3941 if (err) {
978785a3 3942 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
3943 goto out_pci_disable_device;
3944 }
3945
3946 pci_set_drvdata(pdev, priv);
3947 err = pci_request_regions(pdev, DRV_NAME);
3948 if (err)
3949 goto out_pci_disable_device;
6440adb5 3950
cee53ddb
KA
3951 /***********************
3952 * 3. Read REV Register
3953 * ********************/
b481de9c
ZY
3954 priv->hw_base = pci_iomap(pdev, 0, 0);
3955 if (!priv->hw_base) {
3956 err = -ENODEV;
3957 goto out_pci_release_regions;
3958 }
3959
e1623446 3960 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 3961 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 3962 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 3963
cee53ddb
KA
3964 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3965 * PCI Tx retries from interfering with C3 CPU state */
3966 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 3967
a8b50a0a
MA
3968 /* this spin lock will be used in apm_ops.init and EEPROM access
3969 * we should init now
3970 */
3971 spin_lock_init(&priv->reg_lock);
3972
90a30a02
KA
3973 /* amp init */
3974 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 3975 if (err < 0) {
d5df2a16 3976 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
90a30a02 3977 goto out_iounmap;
cee53ddb 3978 }
b481de9c 3979
cee53ddb
KA
3980 /***********************
3981 * 4. Read EEPROM
3982 * ********************/
90a30a02 3983
cee53ddb 3984 /* Read the EEPROM */
e6148917 3985 err = iwl_eeprom_init(priv);
cee53ddb 3986 if (err) {
15b1687c 3987 IWL_ERR(priv, "Unable to init EEPROM\n");
c8f16138 3988 goto out_iounmap;
cee53ddb
KA
3989 }
3990 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
3991 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3992 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 3993 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 3994 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 3995
cee53ddb
KA
3996 /***********************
3997 * 5. Setup HW Constants
3998 * ********************/
b481de9c 3999 /* Device-specific setup */
3832ec9d 4000 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 4001 IWL_ERR(priv, "failed to set hw settings\n");
c8f16138 4002 goto out_eeprom_free;
b481de9c
ZY
4003 }
4004
cee53ddb
KA
4005 /***********************
4006 * 6. Setup priv
4007 * ********************/
cee53ddb 4008
90a30a02 4009 err = iwl3945_init_drv(priv);
b481de9c 4010 if (err) {
90a30a02 4011 IWL_ERR(priv, "initializing driver failed\n");
c8f16138 4012 goto out_unset_hw_params;
b481de9c
ZY
4013 }
4014
978785a3
TW
4015 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4016 priv->cfg->name);
cee53ddb 4017
cee53ddb 4018 /***********************
09f9bf79 4019 * 7. Setup Services
cee53ddb
KA
4020 * ********************/
4021
4022 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4023 iwl_disable_interrupts(priv);
cee53ddb
KA
4024 spin_unlock_irqrestore(&priv->lock, flags);
4025
2663516d
HS
4026 pci_enable_msi(priv->pci_dev);
4027
ef850d7c
MA
4028 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4029 IRQF_SHARED, DRV_NAME, priv);
2663516d
HS
4030 if (err) {
4031 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4032 goto out_disable_msi;
4033 }
4034
cee53ddb 4035 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 4036 if (err) {
15b1687c 4037 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 4038 goto out_release_irq;
849e0dce 4039 }
849e0dce 4040
8ccde88a
SO
4041 iwl_set_rxon_channel(priv,
4042 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
4043 iwl3945_setup_deferred_work(priv);
4044 iwl3945_setup_rx_handlers(priv);
4045
cee53ddb 4046 /*********************************
09f9bf79 4047 * 8. Setup and Register mac80211
cee53ddb
KA
4048 * *******************************/
4049
2a4ddaab 4050 iwl_enable_interrupts(priv);
b481de9c 4051
2a4ddaab
AK
4052 err = iwl3945_setup_mac(priv);
4053 if (err)
4054 goto out_remove_sysfs;
cee53ddb 4055
a75fbe8d
AK
4056 err = iwl_dbgfs_register(priv, DRV_NAME);
4057 if (err)
4058 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4059
2663516d
HS
4060 /* Start monitoring the killswitch */
4061 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4062 2 * HZ);
4063
b481de9c
ZY
4064 return 0;
4065
cee53ddb 4066 out_remove_sysfs:
c8f16138
RC
4067 destroy_workqueue(priv->workqueue);
4068 priv->workqueue = NULL;
cee53ddb 4069 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4070 out_release_irq:
2663516d 4071 free_irq(priv->pci_dev->irq, priv);
2663516d
HS
4072 out_disable_msi:
4073 pci_disable_msi(priv->pci_dev);
c8f16138
RC
4074 iwlcore_free_geos(priv);
4075 iwl_free_channel_map(priv);
4076 out_unset_hw_params:
4077 iwl3945_unset_hw_params(priv);
4078 out_eeprom_free:
4079 iwl_eeprom_free(priv);
b481de9c
ZY
4080 out_iounmap:
4081 pci_iounmap(pdev, priv->hw_base);
4082 out_pci_release_regions:
4083 pci_release_regions(pdev);
4084 out_pci_disable_device:
b481de9c 4085 pci_set_drvdata(pdev, NULL);
623d563e 4086 pci_disable_device(pdev);
b481de9c
ZY
4087 out_ieee80211_free_hw:
4088 ieee80211_free_hw(priv->hw);
20594eb0 4089 iwl_free_traffic_mem(priv);
b481de9c
ZY
4090 out:
4091 return err;
4092}
4093
c83dbf68 4094static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 4095{
4a8a4322 4096 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4097 unsigned long flags;
b481de9c
ZY
4098
4099 if (!priv)
4100 return;
4101
e1623446 4102 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 4103
a75fbe8d
AK
4104 iwl_dbgfs_unregister(priv);
4105
b481de9c 4106 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4107
d552bfb6
KA
4108 if (priv->mac80211_registered) {
4109 ieee80211_unregister_hw(priv->hw);
4110 priv->mac80211_registered = 0;
4111 } else {
4112 iwl3945_down(priv);
4113 }
b481de9c 4114
0359facc
MA
4115 /* make sure we flush any pending irq or
4116 * tasklet for the driver
4117 */
4118 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4119 iwl_disable_interrupts(priv);
0359facc
MA
4120 spin_unlock_irqrestore(&priv->lock, flags);
4121
4122 iwl_synchronize_irq(priv);
4123
bb8c093b 4124 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4125
71d449b5 4126 cancel_delayed_work_sync(&priv->rfkill_poll);
2663516d 4127
bb8c093b 4128 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
4129
4130 if (priv->rxq.bd)
df833b1d 4131 iwl3945_rx_queue_free(priv, &priv->rxq);
bb8c093b 4132 iwl3945_hw_txq_ctx_free(priv);
b481de9c 4133
3832ec9d 4134 iwl3945_unset_hw_params(priv);
c587de0b 4135 iwl_clear_stations_table(priv);
b481de9c 4136
6ef89d0a
MA
4137 /*netif_stop_queue(dev); */
4138 flush_workqueue(priv->workqueue);
4139
bb8c093b 4140 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
4141 * priv->workqueue... so we can't take down the workqueue
4142 * until now... */
4143 destroy_workqueue(priv->workqueue);
4144 priv->workqueue = NULL;
20594eb0 4145 iwl_free_traffic_mem(priv);
b481de9c 4146
2663516d
HS
4147 free_irq(pdev->irq, priv);
4148 pci_disable_msi(pdev);
4149
b481de9c
ZY
4150 pci_iounmap(pdev, priv->hw_base);
4151 pci_release_regions(pdev);
4152 pci_disable_device(pdev);
4153 pci_set_drvdata(pdev, NULL);
4154
e6148917 4155 iwl_free_channel_map(priv);
534166de 4156 iwlcore_free_geos(priv);
805cee5b 4157 kfree(priv->scan);
b481de9c
ZY
4158 if (priv->ibss_beacon)
4159 dev_kfree_skb(priv->ibss_beacon);
4160
4161 ieee80211_free_hw(priv->hw);
4162}
4163
b481de9c
ZY
4164
4165/*****************************************************************************
4166 *
4167 * driver and module entry point
4168 *
4169 *****************************************************************************/
4170
bb8c093b 4171static struct pci_driver iwl3945_driver = {
b481de9c 4172 .name = DRV_NAME,
bb8c093b
CH
4173 .id_table = iwl3945_hw_card_ids,
4174 .probe = iwl3945_pci_probe,
4175 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 4176#ifdef CONFIG_PM
6da3a13e
WYG
4177 .suspend = iwl_pci_suspend,
4178 .resume = iwl_pci_resume,
b481de9c
ZY
4179#endif
4180};
4181
bb8c093b 4182static int __init iwl3945_init(void)
b481de9c
ZY
4183{
4184
4185 int ret;
4186 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4187 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
4188
4189 ret = iwl3945_rate_control_register();
4190 if (ret) {
a3139c59
SO
4191 printk(KERN_ERR DRV_NAME
4192 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
4193 return ret;
4194 }
4195
bb8c093b 4196 ret = pci_register_driver(&iwl3945_driver);
b481de9c 4197 if (ret) {
a3139c59 4198 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 4199 goto error_register;
b481de9c 4200 }
b481de9c
ZY
4201
4202 return ret;
897e1cf2 4203
897e1cf2
RC
4204error_register:
4205 iwl3945_rate_control_unregister();
4206 return ret;
b481de9c
ZY
4207}
4208
bb8c093b 4209static void __exit iwl3945_exit(void)
b481de9c 4210{
bb8c093b 4211 pci_unregister_driver(&iwl3945_driver);
897e1cf2 4212 iwl3945_rate_control_unregister();
b481de9c
ZY
4213}
4214
a0987a8d 4215MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 4216
df878d8f 4217module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 4218MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
9c74d9fb
SO
4219module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4220MODULE_PARM_DESC(swcrypto,
4221 "using software crypto (default 1 [software])\n");
a562a9dd
RC
4222#ifdef CONFIG_IWLWIFI_DEBUG
4223module_param_named(debug, iwl_debug_level, uint, 0644);
b481de9c 4224MODULE_PARM_DESC(debug, "debug output mask");
a562a9dd 4225#endif
df878d8f 4226module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c 4227MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
af48d048
SO
4228module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4229MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4230
bb8c093b
CH
4231module_exit(iwl3945_exit);
4232module_init(iwl3945_init);