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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
WT
51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
b481de9c
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60/*
61 * module name, copyright, version, etc.
b481de9c
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
df878d8f
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
KA
95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
6440adb5
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105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
f2c7e521
AK
124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
f2c7e521
AK
134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
6440adb5
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146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
4a8a4322 152static void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
4a8a4322 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
f2c7e521
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e1623446 206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
69946333
TW
219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
c14c521e
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC
228
229 /* Add station to device's station table */
17f841cd
SO
230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
4a8a4322 236static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
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237{
238 int rc = 0;
3d24a9f7 239 struct iwl_rx_packet *res = NULL;
bb8c093b 240 struct iwl3945_rxon_assoc_cmd rxon_assoc;
c2d79b48 241 struct iwl_host_cmd cmd = {
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242 .id = REPLY_RXON_ASSOC,
243 .len = sizeof(rxon_assoc),
244 .meta.flags = CMD_WANT_SKB,
245 .data = &rxon_assoc,
246 };
8ccde88a
SO
247 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
248 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
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249
250 if ((rxon1->flags == rxon2->flags) &&
251 (rxon1->filter_flags == rxon2->filter_flags) &&
252 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
253 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
e1623446 254 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
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255 return 0;
256 }
257
8ccde88a
SO
258 rxon_assoc.flags = priv->staging_rxon.flags;
259 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
260 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
261 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
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262 rxon_assoc.reserved = 0;
263
518099a8 264 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
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265 if (rc)
266 return rc;
267
3d24a9f7 268 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 269 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 270 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
b481de9c
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271 rc = -EIO;
272 }
273
274 priv->alloc_rxb_skb--;
275 dev_kfree_skb_any(cmd.meta.u.skb);
276
277 return rc;
278}
279
7e4bca5e
SO
280/**
281 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
282 * @priv: eeprom and antenna fields are used to determine antenna flags
283 *
284 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
285 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
286 *
287 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
288 * IWL_ANTENNA_MAIN - Force MAIN antenna
289 * IWL_ANTENNA_AUX - Force AUX antenna
290 */
291__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
292{
293 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
294
295 switch (iwl3945_mod_params.antenna) {
296 case IWL_ANTENNA_DIVERSITY:
297 return 0;
298
299 case IWL_ANTENNA_MAIN:
300 if (eeprom->antenna_switch_type)
301 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
302 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
303
304 case IWL_ANTENNA_AUX:
305 if (eeprom->antenna_switch_type)
306 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
307 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
308 }
309
310 /* bad antenna selector value */
311 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
312 iwl3945_mod_params.antenna);
313
314 return 0; /* "diversity" is default if error */
315}
316
b481de9c 317/**
bb8c093b 318 * iwl3945_commit_rxon - commit staging_rxon to hardware
b481de9c 319 *
01ebd063 320 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
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321 * the active_rxon structure is updated with the new data. This
322 * function correctly transitions out of the RXON_ASSOC_MSK state if
323 * a HW tune is required based on the RXON structure changes.
324 */
4a8a4322 325static int iwl3945_commit_rxon(struct iwl_priv *priv)
b481de9c
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326{
327 /* cast away the const for active_rxon in this function */
8ccde88a
SO
328 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
329 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
b481de9c
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330 int rc = 0;
331
775a6e27 332 if (!iwl_is_alive(priv))
b481de9c
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333 return -1;
334
335 /* always get timestamp with Rx frame */
8ccde88a 336 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
b481de9c
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337
338 /* select antenna */
8ccde88a 339 staging_rxon->flags &=
b481de9c 340 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
8ccde88a 341 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
b481de9c 342
8ccde88a 343 rc = iwl_check_rxon_cmd(priv);
b481de9c 344 if (rc) {
15b1687c 345 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
b481de9c
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346 return -EINVAL;
347 }
348
349 /* If we don't need to send a full RXON, we can use
bb8c093b 350 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 351 * and other flags for the current radio configuration. */
8ccde88a 352 if (!iwl_full_rxon_required(priv)) {
bb8c093b 353 rc = iwl3945_send_rxon_assoc(priv);
b481de9c 354 if (rc) {
15b1687c 355 IWL_ERR(priv, "Error setting RXON_ASSOC "
b481de9c
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356 "configuration (%d).\n", rc);
357 return rc;
358 }
359
8ccde88a 360 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c
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361
362 return 0;
363 }
364
365 /* If we are currently associated and the new config requires
366 * an RXON_ASSOC and the new config wants the associated mask enabled,
367 * we must clear the associated from the active configuration
368 * before we apply the new config */
8ccde88a
SO
369 if (iwl_is_associated(priv) &&
370 (staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK)) {
e1623446 371 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
b481de9c
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372 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
373
8ccde88a
SO
374 /*
375 * reserved4 and 5 could have been filled by the iwlcore code.
376 * Let's clear them before pushing to the 3945.
377 */
378 active_rxon->reserved4 = 0;
379 active_rxon->reserved5 = 0;
518099a8 380 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 381 sizeof(struct iwl3945_rxon_cmd),
8ccde88a 382 &priv->active_rxon);
b481de9c
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383
384 /* If the mask clearing failed then we set
385 * active_rxon back to what it was previously */
386 if (rc) {
387 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 388 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
b481de9c
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389 "configuration (%d).\n", rc);
390 return rc;
391 }
b481de9c
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392 }
393
e1623446 394 IWL_DEBUG_INFO(priv, "Sending RXON\n"
b481de9c
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395 "* with%s RXON_FILTER_ASSOC_MSK\n"
396 "* channel = %d\n"
e174961c 397 "* bssid = %pM\n",
8ccde88a 398 ((priv->staging_rxon.filter_flags &
b481de9c 399 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
8ccde88a
SO
400 le16_to_cpu(staging_rxon->channel),
401 staging_rxon->bssid_addr);
402
403 /*
404 * reserved4 and 5 could have been filled by the iwlcore code.
405 * Let's clear them before pushing to the 3945.
406 */
407 staging_rxon->reserved4 = 0;
408 staging_rxon->reserved5 = 0;
b481de9c
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409
410 /* Apply the new configuration */
518099a8 411 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
8ccde88a
SO
412 sizeof(struct iwl3945_rxon_cmd),
413 staging_rxon);
b481de9c 414 if (rc) {
15b1687c 415 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
b481de9c
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416 return rc;
417 }
418
8ccde88a 419 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c 420
bb8c093b 421 iwl3945_clear_stations_table(priv);
556f8db7 422
b481de9c
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423 /* If we issue a new RXON command which required a tune then we must
424 * send a new TXPOWER command or we won't be able to Tx any frames */
75bcfae9 425 rc = priv->cfg->ops->lib->send_tx_power(priv);
b481de9c 426 if (rc) {
15b1687c 427 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
b481de9c
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428 return rc;
429 }
430
431 /* Add the broadcast address so we can send broadcast frames */
b5323d36 432 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
b481de9c 433 IWL_INVALID_STATION) {
15b1687c 434 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
b481de9c
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435 return -EIO;
436 }
437
438 /* If we have set the ASSOC_MSK and we are in BSS mode then
439 * add the IWL_AP_ID to the station rate table */
8ccde88a 440 if (iwl_is_associated(priv) &&
05c914fe 441 (priv->iw_mode == NL80211_IFTYPE_STATION))
8ccde88a
SO
442 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
443 1, 0)
b481de9c 444 == IWL_INVALID_STATION) {
15b1687c 445 IWL_ERR(priv, "Error adding AP address for transmit\n");
b481de9c
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446 return -EIO;
447 }
448
8318d78a 449 /* Init the hardware's rate fallback order based on the band */
b481de9c
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450 rc = iwl3945_init_hw_rate_table(priv);
451 if (rc) {
15b1687c 452 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
b481de9c
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453 return -EIO;
454 }
455
456 return 0;
457}
458
4a8a4322 459static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
b481de9c
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460 struct ieee80211_key_conf *keyconf,
461 u8 sta_id)
462{
463 unsigned long flags;
464 __le16 key_flags = 0;
465
466 switch (keyconf->alg) {
467 case ALG_CCMP:
468 key_flags |= STA_KEY_FLG_CCMP;
469 key_flags |= cpu_to_le16(
470 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
471 key_flags &= ~STA_KEY_FLG_INVALID;
472 break;
473 case ALG_TKIP:
474 case ALG_WEP:
b481de9c
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475 default:
476 return -EINVAL;
477 }
478 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
479 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
480 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
481 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
b481de9c
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482 keyconf->keylen);
483
f2c7e521 484 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 485 keyconf->keylen);
f2c7e521
AK
486 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
487 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
488 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
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489
490 spin_unlock_irqrestore(&priv->sta_lock, flags);
491
e1623446 492 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
17f841cd
SO
493 iwl_send_add_sta(priv,
494 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
ZY
495 return 0;
496}
497
4a8a4322 498static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
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499{
500 unsigned long flags;
501
502 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
503 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
504 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 505 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
506 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
507 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
508 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
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509 spin_unlock_irqrestore(&priv->sta_lock, flags);
510
e1623446 511 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
17f841cd
SO
512 iwl_send_add_sta(priv,
513 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
ZY
514 return 0;
515}
516
4a8a4322 517static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
518{
519 struct list_head *element;
520
e1623446 521 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
ZY
522 priv->frames_count);
523
524 while (!list_empty(&priv->free_frames)) {
525 element = priv->free_frames.next;
526 list_del(element);
bb8c093b 527 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
ZY
528 priv->frames_count--;
529 }
530
531 if (priv->frames_count) {
39aadf8c 532 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY
533 priv->frames_count);
534 priv->frames_count = 0;
535 }
536}
537
4a8a4322 538static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 539{
bb8c093b 540 struct iwl3945_frame *frame;
b481de9c
ZY
541 struct list_head *element;
542 if (list_empty(&priv->free_frames)) {
543 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
544 if (!frame) {
15b1687c 545 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY
546 return NULL;
547 }
548
549 priv->frames_count++;
550 return frame;
551 }
552
553 element = priv->free_frames.next;
554 list_del(element);
bb8c093b 555 return list_entry(element, struct iwl3945_frame, list);
b481de9c
ZY
556}
557
4a8a4322 558static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
ZY
559{
560 memset(frame, 0, sizeof(*frame));
561 list_add(&frame->list, &priv->free_frames);
562}
563
4a8a4322 564unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 565 struct ieee80211_hdr *hdr,
73ec1cc2 566 int left)
b481de9c
ZY
567{
568
8ccde88a 569 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
570 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
571 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
572 return 0;
573
574 if (priv->ibss_beacon->len > left)
575 return 0;
576
577 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
578
579 return priv->ibss_beacon->len;
580}
581
4a8a4322 582static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 583{
bb8c093b 584 struct iwl3945_frame *frame;
b481de9c
ZY
585 unsigned int frame_size;
586 int rc;
587 u8 rate;
588
bb8c093b 589 frame = iwl3945_get_free_frame(priv);
b481de9c
ZY
590
591 if (!frame) {
15b1687c 592 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY
593 "command.\n");
594 return -ENOMEM;
595 }
596
8ccde88a 597 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 598
bb8c093b 599 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 600
518099a8 601 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
602 &frame->u.cmd[0]);
603
bb8c093b 604 iwl3945_free_frame(priv, frame);
b481de9c
ZY
605
606 return rc;
607}
608
4a8a4322 609static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 610{
3832ec9d 611 if (priv->shared_virt)
b481de9c 612 pci_free_consistent(priv->pci_dev,
bb8c093b 613 sizeof(struct iwl3945_shared),
3832ec9d
AK
614 priv->shared_virt,
615 priv->shared_phys);
b481de9c
ZY
616}
617
b481de9c
ZY
618/*
619 * QoS support
620*/
4a8a4322 621static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
4c897253 622 struct iwl_qosparam_cmd *qos)
b481de9c
ZY
623{
624
518099a8 625 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
4c897253 626 sizeof(struct iwl_qosparam_cmd), qos);
b481de9c
ZY
627}
628
4a8a4322 629static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
630{
631 unsigned long flags;
632
b481de9c
ZY
633 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
634 return;
635
b481de9c
ZY
636 spin_lock_irqsave(&priv->lock, flags);
637 priv->qos_data.def_qos_parm.qos_flags = 0;
638
639 if (priv->qos_data.qos_cap.q_AP.queue_request &&
640 !priv->qos_data.qos_cap.q_AP.txop_request)
641 priv->qos_data.def_qos_parm.qos_flags |=
642 QOS_PARAM_FLG_TXOP_TYPE_MSK;
643
644 if (priv->qos_data.qos_active)
645 priv->qos_data.def_qos_parm.qos_flags |=
646 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
647
648 spin_unlock_irqrestore(&priv->lock, flags);
649
8ccde88a 650 if (force || iwl_is_associated(priv)) {
e1623446 651 IWL_DEBUG_QOS(priv, "send QoS cmd with QoS active %d \n",
b481de9c
ZY
652 priv->qos_data.qos_active);
653
bb8c093b 654 iwl3945_send_qos_params_command(priv,
b481de9c
ZY
655 &(priv->qos_data.def_qos_parm));
656 }
657}
658
b481de9c 659
b481de9c
ZY
660#define MAX_UCODE_BEACON_INTERVAL 1024
661#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
662
bb8c093b 663static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
664{
665 u16 new_val = 0;
666 u16 beacon_factor = 0;
667
668 beacon_factor =
669 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
670 / MAX_UCODE_BEACON_INTERVAL;
671 new_val = beacon_val / beacon_factor;
672
673 return cpu_to_le16(new_val);
674}
675
4a8a4322 676static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
677{
678 u64 interval_tm_unit;
679 u64 tsf, result;
680 unsigned long flags;
681 struct ieee80211_conf *conf = NULL;
682 u16 beacon_int = 0;
683
684 conf = ieee80211_get_hw_conf(priv->hw);
685
686 spin_lock_irqsave(&priv->lock, flags);
28afaf91 687 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
ZY
688 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
689
28afaf91 690 tsf = priv->timestamp;
b481de9c
ZY
691
692 beacon_int = priv->beacon_int;
693 spin_unlock_irqrestore(&priv->lock, flags);
694
05c914fe 695 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
ZY
696 if (beacon_int == 0) {
697 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
698 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
699 } else {
700 priv->rxon_timing.beacon_interval =
701 cpu_to_le16(beacon_int);
702 priv->rxon_timing.beacon_interval =
bb8c093b 703 iwl3945_adjust_beacon_interval(
b481de9c
ZY
704 le16_to_cpu(priv->rxon_timing.beacon_interval));
705 }
706
707 priv->rxon_timing.atim_window = 0;
708 } else {
709 priv->rxon_timing.beacon_interval =
bb8c093b 710 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
711 /* TODO: we need to get atim_window from upper stack
712 * for now we set to 0 */
713 priv->rxon_timing.atim_window = 0;
714 }
715
716 interval_tm_unit =
717 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
718 result = do_div(tsf, interval_tm_unit);
719 priv->rxon_timing.beacon_init_val =
720 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
721
e1623446
TW
722 IWL_DEBUG_ASSOC(priv,
723 "beacon interval %d beacon timer %d beacon tim %d\n",
b481de9c
ZY
724 le16_to_cpu(priv->rxon_timing.beacon_interval),
725 le32_to_cpu(priv->rxon_timing.beacon_init_val),
726 le16_to_cpu(priv->rxon_timing.atim_window));
727}
728
4a8a4322 729static int iwl3945_scan_initiate(struct iwl_priv *priv)
b481de9c 730{
775a6e27 731 if (!iwl_is_ready_rf(priv)) {
e1623446 732 IWL_DEBUG_SCAN(priv, "Aborting scan due to not ready.\n");
b481de9c
ZY
733 return -EIO;
734 }
735
736 if (test_bit(STATUS_SCANNING, &priv->status)) {
e1623446 737 IWL_DEBUG_SCAN(priv, "Scan already in progress.\n");
b481de9c
ZY
738 return -EAGAIN;
739 }
740
741 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446 742 IWL_DEBUG_SCAN(priv, "Scan request while abort pending. "
b481de9c
ZY
743 "Queuing.\n");
744 return -EAGAIN;
745 }
746
e1623446 747 IWL_DEBUG_INFO(priv, "Starting scan...\n");
66b5004d
RR
748 if (priv->cfg->sku & IWL_SKU_G)
749 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
750 if (priv->cfg->sku & IWL_SKU_A)
751 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
b481de9c
ZY
752 set_bit(STATUS_SCANNING, &priv->status);
753 priv->scan_start = jiffies;
754 priv->scan_pass_start = priv->scan_start;
755
756 queue_work(priv->workqueue, &priv->request_scan);
757
758 return 0;
759}
760
4a8a4322 761static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
b481de9c 762{
05c914fe 763 if (mode == NL80211_IFTYPE_ADHOC) {
d20b3c65 764 const struct iwl_channel_info *ch_info;
b481de9c 765
e6148917 766 ch_info = iwl_get_channel_info(priv,
8318d78a 767 priv->band,
8ccde88a 768 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
769
770 if (!ch_info || !is_channel_ibss(ch_info)) {
15b1687c 771 IWL_ERR(priv, "channel %d not IBSS channel\n",
8ccde88a 772 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
773 return -EINVAL;
774 }
775 }
776
8ccde88a 777 iwl_connection_init_rx_config(priv, mode);
b481de9c 778
bb8c093b 779 iwl3945_clear_stations_table(priv);
b481de9c 780
a96a27f9 781 /* don't commit rxon if rf-kill is on*/
775a6e27 782 if (!iwl_is_ready_rf(priv))
fde3571f
MA
783 return -EAGAIN;
784
785 cancel_delayed_work(&priv->scan_check);
af0053d6 786 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 787 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 788 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA
789 return -EAGAIN;
790 }
791
bb8c093b 792 iwl3945_commit_rxon(priv);
b481de9c
ZY
793
794 return 0;
795}
796
4a8a4322 797static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 798 struct ieee80211_tx_info *info,
c2d79b48 799 struct iwl_cmd *cmd,
b481de9c
ZY
800 struct sk_buff *skb_frag,
801 int last_frag)
802{
e52119c5 803 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 804 struct iwl3945_hw_key *keyinfo =
f2c7e521 805 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
b481de9c
ZY
806
807 switch (keyinfo->alg) {
808 case ALG_CCMP:
e52119c5
WT
809 tx->sec_ctl = TX_CMD_SEC_CCM;
810 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 811 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
812 break;
813
814 case ALG_TKIP:
815#if 0
e52119c5 816 tx->sec_ctl = TX_CMD_SEC_TKIP;
b481de9c
ZY
817
818 if (last_frag)
e52119c5 819 memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
b481de9c
ZY
820 8);
821 else
e52119c5 822 memset(tx->tkip_mic.byte, 0, 8);
b481de9c
ZY
823#endif
824 break;
825
826 case ALG_WEP:
e52119c5 827 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 828 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
829
830 if (keyinfo->keylen == 13)
e52119c5 831 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 832
e52119c5 833 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 834
e1623446 835 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 836 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
837 break;
838
b481de9c 839 default:
978785a3 840 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
841 break;
842 }
843}
844
845/*
846 * handle build REPLY_TX command notification.
847 */
4a8a4322 848static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 849 struct iwl_cmd *cmd,
e039fa4a 850 struct ieee80211_tx_info *info,
e52119c5 851 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 852{
e52119c5
WT
853 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
854 __le32 tx_flags = tx->tx_flags;
fd7c8a40 855 __le16 fc = hdr->frame_control;
e6a9854b 856 u8 rc_flags = info->control.rates[0].flags;
b481de9c 857
e52119c5 858 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 859 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 860 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 861 if (ieee80211_is_mgmt(fc))
b481de9c 862 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 863 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
864 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
865 tx_flags |= TX_CMD_FLG_TSF_MSK;
866 } else {
867 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
868 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
869 }
870
e52119c5 871 tx->sta_id = std_id;
8b7b1e05 872 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
873 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
874
fd7c8a40
HH
875 if (ieee80211_is_data_qos(fc)) {
876 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 877 tx->tid_tspec = qc[0] & 0xf;
b481de9c 878 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 879 } else {
b481de9c 880 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 881 }
b481de9c 882
e6a9854b 883 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
884 tx_flags |= TX_CMD_FLG_RTS_MSK;
885 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 886 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
887 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
888 tx_flags |= TX_CMD_FLG_CTS_MSK;
889 }
890
891 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
892 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
893
894 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
895 if (ieee80211_is_mgmt(fc)) {
896 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 897 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 898 else
e52119c5 899 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 900 } else {
e52119c5 901 tx->timeout.pm_frame_timeout = 0;
ab53d8af
MA
902#ifdef CONFIG_IWL3945_LEDS
903 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
904#endif
905 }
b481de9c 906
e52119c5
WT
907 tx->driver_txop = 0;
908 tx->tx_flags = tx_flags;
909 tx->next_frame_len = 0;
b481de9c
ZY
910}
911
6440adb5
BC
912/**
913 * iwl3945_get_sta_id - Find station's index within station table
914 */
4a8a4322 915static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
b481de9c
ZY
916{
917 int sta_id;
918 u16 fc = le16_to_cpu(hdr->frame_control);
919
6440adb5 920 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
921 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
922 is_multicast_ether_addr(hdr->addr1))
3832ec9d 923 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
924
925 switch (priv->iw_mode) {
926
6440adb5
BC
927 /* If we are a client station in a BSS network, use the special
928 * AP station entry (that's the only station we communicate with) */
05c914fe 929 case NL80211_IFTYPE_STATION:
b481de9c
ZY
930 return IWL_AP_ID;
931
932 /* If we are an AP, then find the station, or use BCAST */
05c914fe 933 case NL80211_IFTYPE_AP:
bb8c093b 934 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
935 if (sta_id != IWL_INVALID_STATION)
936 return sta_id;
3832ec9d 937 return priv->hw_params.bcast_sta_id;
b481de9c 938
6440adb5
BC
939 /* If this frame is going out to an IBSS network, find the station,
940 * or create a new station table entry */
05c914fe 941 case NL80211_IFTYPE_ADHOC: {
6440adb5 942 /* Create new station table entry */
bb8c093b 943 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
944 if (sta_id != IWL_INVALID_STATION)
945 return sta_id;
946
bb8c093b 947 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
948
949 if (sta_id != IWL_INVALID_STATION)
950 return sta_id;
951
e1623446 952 IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
b481de9c 953 "Defaulting to broadcast...\n",
e174961c 954 hdr->addr1);
40b8ec0b 955 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
3832ec9d 956 return priv->hw_params.bcast_sta_id;
0795af57 957 }
914233d6
SG
958 /* If we are in monitor mode, use BCAST. This is required for
959 * packet injection. */
05c914fe 960 case NL80211_IFTYPE_MONITOR:
3832ec9d 961 return priv->hw_params.bcast_sta_id;
914233d6 962
b481de9c 963 default:
39aadf8c
WT
964 IWL_WARN(priv, "Unknown mode of operation: %d\n",
965 priv->iw_mode);
3832ec9d 966 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
967 }
968}
969
970/*
971 * start REPLY_TX command process
972 */
4a8a4322 973static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
974{
975 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 976 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 977 struct iwl3945_tx_cmd *tx;
188cf6c7 978 struct iwl_tx_queue *txq = NULL;
d20b3c65 979 struct iwl_queue *q = NULL;
e52119c5 980 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
981 dma_addr_t phys_addr;
982 dma_addr_t txcmd_phys;
e52119c5 983 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
984 u16 len, idx, len_org, hdr_len;
985 u8 id;
986 u8 unicast;
b481de9c 987 u8 sta_id;
54dbb525 988 u8 tid = 0;
b481de9c 989 u16 seq_number = 0;
fd7c8a40 990 __le16 fc;
b481de9c 991 u8 wait_write_ptr = 0;
54dbb525 992 u8 *qc = NULL;
b481de9c
ZY
993 unsigned long flags;
994 int rc;
995
996 spin_lock_irqsave(&priv->lock, flags);
775a6e27 997 if (iwl_is_rfkill(priv)) {
e1623446 998 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
999 goto drop_unlock;
1000 }
1001
e039fa4a 1002 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 1003 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
1004 goto drop_unlock;
1005 }
1006
1007 unicast = !is_multicast_ether_addr(hdr->addr1);
1008 id = 0;
1009
fd7c8a40 1010 fc = hdr->frame_control;
b481de9c 1011
d08853a3 1012#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 1013 if (ieee80211_is_auth(fc))
e1623446 1014 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 1015 else if (ieee80211_is_assoc_req(fc))
e1623446 1016 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 1017 else if (ieee80211_is_reassoc_req(fc))
e1623446 1018 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
1019#endif
1020
7878a5a4 1021 /* drop all data frame if we are not associated */
914233d6 1022 if (ieee80211_is_data(fc) &&
05c914fe 1023 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 1024 (!iwl_is_associated(priv) ||
05c914fe 1025 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 1026 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
1027 goto drop_unlock;
1028 }
1029
1030 spin_unlock_irqrestore(&priv->lock, flags);
1031
7294ec95 1032 hdr_len = ieee80211_hdrlen(fc);
6440adb5
BC
1033
1034 /* Find (or create) index into station table for destination station */
bb8c093b 1035 sta_id = iwl3945_get_sta_id(priv, hdr);
b481de9c 1036 if (sta_id == IWL_INVALID_STATION) {
e1623446 1037 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 1038 hdr->addr1);
b481de9c
ZY
1039 goto drop;
1040 }
1041
e1623446 1042 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 1043
fd7c8a40
HH
1044 if (ieee80211_is_data_qos(fc)) {
1045 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 1046 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 1047 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
1048 IEEE80211_SCTL_SEQ;
1049 hdr->seq_ctrl = cpu_to_le16(seq_number) |
1050 (hdr->seq_ctrl &
1051 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
1052 seq_number += 0x10;
1053 }
6440adb5
BC
1054
1055 /* Descriptor for chosen Tx queue */
188cf6c7 1056 txq = &priv->txq[txq_id];
b481de9c
ZY
1057 q = &txq->q;
1058
1059 spin_lock_irqsave(&priv->lock, flags);
1060
fc4b6853 1061 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 1062
6440adb5 1063 /* Set up driver data for this TFD */
dbb6654c 1064 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 1065 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
BC
1066
1067 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 1068 out_cmd = txq->cmd[idx];
e52119c5 1069 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 1070 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 1071 memset(tx, 0, sizeof(*tx));
6440adb5
BC
1072
1073 /*
1074 * Set up the Tx-command (not MAC!) header.
1075 * Store the chosen Tx queue and TFD index within the sequence field;
1076 * after Tx, uCode's Tx response will return this value so driver can
1077 * locate the frame within the tx queue and do post-tx processing.
1078 */
b481de9c
ZY
1079 out_cmd->hdr.cmd = REPLY_TX;
1080 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 1081 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC
1082
1083 /* Copy MAC header from skb into command buffer */
e52119c5 1084 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 1085
6440adb5
BC
1086 /*
1087 * Use the first empty entry in this queue's command buffer array
1088 * to contain the Tx command and MAC header concatenated together
1089 * (payload data will be in another buffer).
1090 * Size of this varies, due to varying MAC header length.
1091 * If end is not dword aligned, we'll have 2 extra bytes at the end
1092 * of the MAC header (device reads on dword boundaries).
1093 * We'll tell device about this padding later.
1094 */
3832ec9d 1095 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 1096 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
1097
1098 len_org = len;
1099 len = (len + 3) & ~3;
1100
1101 if (len_org != len)
1102 len_org = 1;
1103 else
1104 len_org = 0;
1105
6440adb5
BC
1106 /* Physical address of this Tx command's header (not MAC header!),
1107 * within command buffer array. */
188cf6c7
SO
1108 txcmd_phys = pci_map_single(priv->pci_dev,
1109 out_cmd, sizeof(struct iwl_cmd),
1110 PCI_DMA_TODEVICE);
1111 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
1112 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
1113 /* Add buffer containing Tx command and MAC(!) header to TFD's
1114 * first entry */
1115 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 1116
6440adb5
BC
1117 /* Add buffer containing Tx command and MAC(!) header to TFD's
1118 * first entry */
7aaa1d79
SO
1119 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1120 txcmd_phys, len, 1, 0);
b481de9c 1121
d0f09804 1122 if (info->control.hw_key)
e039fa4a 1123 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
b481de9c 1124
6440adb5
BC
1125 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1126 * if any (802.11 null frames have no payload). */
b481de9c
ZY
1127 len = skb->len - hdr_len;
1128 if (len) {
1129 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
1130 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
1131 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1132 phys_addr, len,
1133 0, U32_PAD(len));
b481de9c
ZY
1134 }
1135
6440adb5 1136 /* Total # bytes to be transmitted */
b481de9c 1137 len = (u16)skb->len;
e52119c5 1138 tx->len = cpu_to_le16(len);
b481de9c
ZY
1139
1140 /* TODO need this for burst mode later on */
e52119c5 1141 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
1142
1143 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 1144 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 1145
e52119c5
WT
1146 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
1147 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 1148
8b7b1e05 1149 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 1150 txq->need_update = 1;
3ac7f146 1151 if (qc)
f2c7e521 1152 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
1153 } else {
1154 wait_write_ptr = 1;
1155 txq->need_update = 0;
1156 }
1157
e52119c5 1158 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 1159
e52119c5 1160 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 1161 ieee80211_hdrlen(fc));
b481de9c 1162
6440adb5 1163 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 1164 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 1165 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1166 spin_unlock_irqrestore(&priv->lock, flags);
1167
1168 if (rc)
1169 return rc;
1170
d20b3c65 1171 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
1172 && priv->mac80211_registered) {
1173 if (wait_write_ptr) {
1174 spin_lock_irqsave(&priv->lock, flags);
1175 txq->need_update = 1;
4f3602c8 1176 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1177 spin_unlock_irqrestore(&priv->lock, flags);
1178 }
1179
e2530083 1180 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
b481de9c
ZY
1181 }
1182
1183 return 0;
1184
1185drop_unlock:
1186 spin_unlock_irqrestore(&priv->lock, flags);
1187drop:
1188 return -1;
1189}
1190
4a8a4322 1191static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY
1192{
1193 unsigned long flags;
1194
1195 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
1196 return;
1197
e1623446 1198 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO %s\n",
b481de9c
ZY
1199 disable_radio ? "OFF" : "ON");
1200
1201 if (disable_radio) {
af0053d6 1202 iwl_scan_cancel(priv);
b481de9c 1203 /* FIXME: This is a workaround for AP */
05c914fe 1204 if (priv->iw_mode != NL80211_IFTYPE_AP) {
b481de9c 1205 spin_lock_irqsave(&priv->lock, flags);
5d49f498 1206 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1207 CSR_UCODE_SW_BIT_RFKILL);
1208 spin_unlock_irqrestore(&priv->lock, flags);
c496294e 1209 iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY
1210 set_bit(STATUS_RF_KILL_SW, &priv->status);
1211 }
1212 return;
1213 }
1214
1215 spin_lock_irqsave(&priv->lock, flags);
5d49f498 1216 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
1217
1218 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1219 spin_unlock_irqrestore(&priv->lock, flags);
1220
1221 /* wake up ucode */
1222 msleep(10);
1223
1224 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
1225 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1226 if (!iwl_grab_nic_access(priv))
1227 iwl_release_nic_access(priv);
b481de9c
ZY
1228 spin_unlock_irqrestore(&priv->lock, flags);
1229
1230 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
e1623446 1231 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
b481de9c
ZY
1232 "disabled by HW switch\n");
1233 return;
1234 }
1235
808e72a0
ZY
1236 if (priv->is_open)
1237 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1238 return;
1239}
1240
c8b0e6e1 1241#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
1242
1243#include "iwl-spectrum.h"
1244
1245#define BEACON_TIME_MASK_LOW 0x00FFFFFF
1246#define BEACON_TIME_MASK_HIGH 0xFF000000
1247#define TIME_UNIT 1024
1248
1249/*
1250 * extended beacon time format
1251 * time in usec will be changed into a 32-bit value in 8:24 format
1252 * the high 1 byte is the beacon counts
1253 * the lower 3 bytes is the time in usec within one beacon interval
1254 */
1255
bb8c093b 1256static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
1257{
1258 u32 quot;
1259 u32 rem;
1260 u32 interval = beacon_interval * 1024;
1261
1262 if (!interval || !usec)
1263 return 0;
1264
1265 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
1266 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
1267
1268 return (quot << 24) + rem;
1269}
1270
1271/* base is usually what we get from ucode with each received frame,
1272 * the same as HW timer counter counting down
1273 */
1274
bb8c093b 1275static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
1276{
1277 u32 base_low = base & BEACON_TIME_MASK_LOW;
1278 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
1279 u32 interval = beacon_interval * TIME_UNIT;
1280 u32 res = (base & BEACON_TIME_MASK_HIGH) +
1281 (addon & BEACON_TIME_MASK_HIGH);
1282
1283 if (base_low > addon_low)
1284 res += base_low - addon_low;
1285 else if (base_low < addon_low) {
1286 res += interval + base_low - addon_low;
1287 res += (1 << 24);
1288 } else
1289 res += (1 << 24);
1290
1291 return cpu_to_le32(res);
1292}
1293
4a8a4322 1294static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
1295 struct ieee80211_measurement_params *params,
1296 u8 type)
1297{
600c0e11 1298 struct iwl_spectrum_cmd spectrum;
3d24a9f7 1299 struct iwl_rx_packet *res;
c2d79b48 1300 struct iwl_host_cmd cmd = {
b481de9c
ZY
1301 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
1302 .data = (void *)&spectrum,
1303 .meta.flags = CMD_WANT_SKB,
1304 };
1305 u32 add_time = le64_to_cpu(params->start_time);
1306 int rc;
1307 int spectrum_resp_status;
1308 int duration = le16_to_cpu(params->duration);
1309
8ccde88a 1310 if (iwl_is_associated(priv))
b481de9c 1311 add_time =
bb8c093b 1312 iwl3945_usecs_to_beacons(
b481de9c
ZY
1313 le64_to_cpu(params->start_time) - priv->last_tsf,
1314 le16_to_cpu(priv->rxon_timing.beacon_interval));
1315
1316 memset(&spectrum, 0, sizeof(spectrum));
1317
1318 spectrum.channel_count = cpu_to_le16(1);
1319 spectrum.flags =
1320 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
1321 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
1322 cmd.len = sizeof(spectrum);
1323 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
1324
8ccde88a 1325 if (iwl_is_associated(priv))
b481de9c 1326 spectrum.start_time =
bb8c093b 1327 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
1328 add_time,
1329 le16_to_cpu(priv->rxon_timing.beacon_interval));
1330 else
1331 spectrum.start_time = 0;
1332
1333 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
1334 spectrum.channels[0].channel = params->channel;
1335 spectrum.channels[0].type = type;
8ccde88a 1336 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
1337 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1338 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1339
518099a8 1340 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1341 if (rc)
1342 return rc;
1343
3d24a9f7 1344 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1345 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1346 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1347 rc = -EIO;
1348 }
1349
1350 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1351 switch (spectrum_resp_status) {
1352 case 0: /* Command will be handled */
1353 if (res->u.spectrum.id != 0xff) {
e1623446 1354 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 1355 res->u.spectrum.id);
b481de9c
ZY
1356 priv->measurement_status &= ~MEASUREMENT_READY;
1357 }
1358 priv->measurement_status |= MEASUREMENT_ACTIVE;
1359 rc = 0;
1360 break;
1361
1362 case 1: /* Command will not be handled */
1363 rc = -EAGAIN;
1364 break;
1365 }
1366
1367 dev_kfree_skb_any(cmd.meta.u.skb);
1368
1369 return rc;
1370}
1371#endif
1372
4a8a4322 1373static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1374 struct iwl_rx_mem_buffer *rxb)
b481de9c 1375{
3d24a9f7
TW
1376 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1377 struct iwl_alive_resp *palive;
b481de9c
ZY
1378 struct delayed_work *pwork;
1379
1380 palive = &pkt->u.alive_frame;
1381
e1623446 1382 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
1383 "0x%01X 0x%01X\n",
1384 palive->is_valid, palive->ver_type,
1385 palive->ver_subtype);
1386
1387 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 1388 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
1389 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1390 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1391 pwork = &priv->init_alive_start;
1392 } else {
e1623446 1393 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 1394 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1395 sizeof(struct iwl_alive_resp));
b481de9c 1396 pwork = &priv->alive_start;
bb8c093b 1397 iwl3945_disable_events(priv);
b481de9c
ZY
1398 }
1399
1400 /* We delay the ALIVE response by 5ms to
1401 * give the HW RF Kill time to activate... */
1402 if (palive->is_valid == UCODE_VALID_OK)
1403 queue_delayed_work(priv->workqueue, pwork,
1404 msecs_to_jiffies(5));
1405 else
39aadf8c 1406 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1407}
1408
4a8a4322 1409static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1410 struct iwl_rx_mem_buffer *rxb)
b481de9c 1411{
c7e035a9 1412#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1413 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1414#endif
b481de9c 1415
e1623446 1416 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
1417 return;
1418}
1419
4a8a4322 1420static void iwl3945_rx_reply_error(struct iwl_priv *priv,
6100b588 1421 struct iwl_rx_mem_buffer *rxb)
b481de9c 1422{
3d24a9f7 1423 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c 1424
15b1687c 1425 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
b481de9c
ZY
1426 "seq 0x%04X ser 0x%08X\n",
1427 le32_to_cpu(pkt->u.err_resp.error_type),
1428 get_cmd_string(pkt->u.err_resp.cmd_id),
1429 pkt->u.err_resp.cmd_id,
1430 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1431 le32_to_cpu(pkt->u.err_resp.error_info));
1432}
1433
4a8a4322 1434static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
6100b588 1435 struct iwl_rx_mem_buffer *rxb)
b481de9c 1436{
c8b0e6e1 1437#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3d24a9f7 1438 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
600c0e11 1439 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1440
1441 if (!report->state) {
e1623446 1442 IWL_DEBUG(priv, IWL_DL_11H | IWL_DL_INFO,
b481de9c
ZY
1443 "Spectrum Measure Notification: Start\n");
1444 return;
1445 }
1446
1447 memcpy(&priv->measure_report, report, sizeof(*report));
1448 priv->measurement_status |= MEASUREMENT_READY;
1449#endif
1450}
1451
4a8a4322 1452static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
6100b588 1453 struct iwl_rx_mem_buffer *rxb)
b481de9c 1454{
d08853a3 1455#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1456 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
600c0e11 1457 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
e1623446 1458 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
b481de9c
ZY
1459 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1460#endif
1461}
1462
4a8a4322 1463static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
6100b588 1464 struct iwl_rx_mem_buffer *rxb)
b481de9c 1465{
3d24a9f7 1466 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
e1623446 1467 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
b481de9c
ZY
1468 "notification for %s:\n",
1469 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
40b8ec0b
SO
1470 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
1471 le32_to_cpu(pkt->len));
b481de9c
ZY
1472}
1473
bb8c093b 1474static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1475{
4a8a4322
AK
1476 struct iwl_priv *priv =
1477 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1478 struct sk_buff *beacon;
1479
1480 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1481 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1482
1483 if (!beacon) {
15b1687c 1484 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1485 return;
1486 }
1487
1488 mutex_lock(&priv->mutex);
1489 /* new beacon skb is allocated every time; dispose previous.*/
1490 if (priv->ibss_beacon)
1491 dev_kfree_skb(priv->ibss_beacon);
1492
1493 priv->ibss_beacon = beacon;
1494 mutex_unlock(&priv->mutex);
1495
bb8c093b 1496 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1497}
1498
4a8a4322 1499static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1500 struct iwl_rx_mem_buffer *rxb)
b481de9c 1501{
d08853a3 1502#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1503 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1504 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1505 u8 rate = beacon->beacon_notify_hdr.rate;
1506
e1623446 1507 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
1508 "tsf %d %d rate %d\n",
1509 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1510 beacon->beacon_notify_hdr.failure_frame,
1511 le32_to_cpu(beacon->ibss_mgr_status),
1512 le32_to_cpu(beacon->high_tsf),
1513 le32_to_cpu(beacon->low_tsf), rate);
1514#endif
1515
05c914fe 1516 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1517 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1518 queue_work(priv->workqueue, &priv->beacon_update);
1519}
1520
1521/* Service response to REPLY_SCAN_CMD (0x80) */
4a8a4322 1522static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
6100b588 1523 struct iwl_rx_mem_buffer *rxb)
b481de9c 1524{
d08853a3 1525#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1526 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253
TW
1527 struct iwl_scanreq_notification *notif =
1528 (struct iwl_scanreq_notification *)pkt->u.raw;
b481de9c 1529
e1623446 1530 IWL_DEBUG_RX(priv, "Scan request status = 0x%x\n", notif->status);
b481de9c
ZY
1531#endif
1532}
1533
1534/* Service SCAN_START_NOTIFICATION (0x82) */
4a8a4322 1535static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
6100b588 1536 struct iwl_rx_mem_buffer *rxb)
b481de9c 1537{
3d24a9f7 1538 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253
TW
1539 struct iwl_scanstart_notification *notif =
1540 (struct iwl_scanstart_notification *)pkt->u.raw;
b481de9c 1541 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
e1623446 1542 IWL_DEBUG_SCAN(priv, "Scan start: "
b481de9c
ZY
1543 "%d [802.11%s] "
1544 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
1545 notif->channel,
1546 notif->band ? "bg" : "a",
1547 notif->tsf_high,
1548 notif->tsf_low, notif->status, notif->beacon_timer);
1549}
1550
1551/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
4a8a4322 1552static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
6100b588 1553 struct iwl_rx_mem_buffer *rxb)
b481de9c 1554{
c7e035a9 1555#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1556 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253
TW
1557 struct iwl_scanresults_notification *notif =
1558 (struct iwl_scanresults_notification *)pkt->u.raw;
c7e035a9 1559#endif
b481de9c 1560
e1623446 1561 IWL_DEBUG_SCAN(priv, "Scan ch.res: "
b481de9c
ZY
1562 "%d [802.11%s] "
1563 "(TSF: 0x%08X:%08X) - %d "
1564 "elapsed=%lu usec (%dms since last)\n",
1565 notif->channel,
1566 notif->band ? "bg" : "a",
1567 le32_to_cpu(notif->tsf_high),
1568 le32_to_cpu(notif->tsf_low),
1569 le32_to_cpu(notif->statistics[0]),
1570 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
1571 jiffies_to_msecs(elapsed_jiffies
1572 (priv->last_scan_jiffies, jiffies)));
1573
1574 priv->last_scan_jiffies = jiffies;
7878a5a4 1575 priv->next_scan_jiffies = 0;
b481de9c
ZY
1576}
1577
1578/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
4a8a4322 1579static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
6100b588 1580 struct iwl_rx_mem_buffer *rxb)
b481de9c 1581{
c7e035a9 1582#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1583 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4c897253 1584 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
c7e035a9 1585#endif
b481de9c 1586
e1623446 1587 IWL_DEBUG_SCAN(priv, "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
b481de9c
ZY
1588 scan_notif->scanned_channels,
1589 scan_notif->tsf_low,
1590 scan_notif->tsf_high, scan_notif->status);
1591
1592 /* The HW is no longer scanning */
1593 clear_bit(STATUS_SCAN_HW, &priv->status);
1594
1595 /* The scan completion notification came in, so kill that timer... */
1596 cancel_delayed_work(&priv->scan_check);
1597
e1623446 1598 IWL_DEBUG_INFO(priv, "Scan pass on %sGHz took %dms\n",
66b5004d
RR
1599 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
1600 "2.4" : "5.2",
b481de9c
ZY
1601 jiffies_to_msecs(elapsed_jiffies
1602 (priv->scan_pass_start, jiffies)));
1603
66b5004d
RR
1604 /* Remove this scanned band from the list of pending
1605 * bands to scan, band G precedes A in order of scanning
1606 * as seen in iwl3945_bg_request_scan */
1607 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
1608 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
1609 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
1610 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
b481de9c
ZY
1611
1612 /* If a request to abort was given, or the scan did not succeed
1613 * then we reset the scan state machine and terminate,
1614 * re-queuing another scan if one has been requested */
1615 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446 1616 IWL_DEBUG_INFO(priv, "Aborted scan completed.\n");
b481de9c
ZY
1617 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1618 } else {
1619 /* If there are more bands on this scan pass reschedule */
1620 if (priv->scan_bands > 0)
1621 goto reschedule;
1622 }
1623
1624 priv->last_scan_jiffies = jiffies;
7878a5a4 1625 priv->next_scan_jiffies = 0;
e1623446 1626 IWL_DEBUG_INFO(priv, "Setting scan to off\n");
b481de9c
ZY
1627
1628 clear_bit(STATUS_SCANNING, &priv->status);
1629
e1623446 1630 IWL_DEBUG_INFO(priv, "Scan took %dms\n",
b481de9c
ZY
1631 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
1632
1633 queue_work(priv->workqueue, &priv->scan_completed);
1634
1635 return;
1636
1637reschedule:
1638 priv->scan_pass_start = jiffies;
1639 queue_work(priv->workqueue, &priv->request_scan);
1640}
1641
1642/* Handle notification from uCode that card's power state is changing
1643 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1644static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1645 struct iwl_rx_mem_buffer *rxb)
b481de9c 1646{
3d24a9f7 1647 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1648 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1649 unsigned long status = priv->status;
1650
e1623446 1651 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
1652 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1653 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1654
5d49f498 1655 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1656 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1657
1658 if (flags & HW_CARD_DISABLED)
1659 set_bit(STATUS_RF_KILL_HW, &priv->status);
1660 else
1661 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1662
1663
1664 if (flags & SW_CARD_DISABLED)
1665 set_bit(STATUS_RF_KILL_SW, &priv->status);
1666 else
1667 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1668
af0053d6 1669 iwl_scan_cancel(priv);
b481de9c
ZY
1670
1671 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1672 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1673 (test_bit(STATUS_RF_KILL_SW, &status) !=
1674 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1675 queue_work(priv->workqueue, &priv->rf_kill);
1676 else
1677 wake_up_interruptible(&priv->wait_command_queue);
1678}
1679
1680/**
bb8c093b 1681 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1682 *
1683 * Setup the RX handlers for each of the reply types sent from the uCode
1684 * to the host.
1685 *
1686 * This function chains into the hardware specific files for them to setup
1687 * any hardware specific handlers as well.
1688 */
4a8a4322 1689static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1690{
bb8c093b
CH
1691 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1692 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
1693 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
8ccde88a 1694 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
b481de9c 1695 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1696 iwl3945_rx_spectrum_measure_notif;
1697 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
b481de9c 1698 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1699 iwl3945_rx_pm_debug_statistics_notif;
1700 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1701
9fbab516
BC
1702 /*
1703 * The same handler is used for both the REPLY to a discrete
1704 * statistics request from the host as well as for the periodic
1705 * statistics notifications (after received beacons) from the uCode.
b481de9c 1706 */
bb8c093b
CH
1707 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1708 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1709
bb8c093b
CH
1710 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
1711 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
b481de9c 1712 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 1713 iwl3945_rx_scan_results_notif;
b481de9c 1714 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH
1715 iwl3945_rx_scan_complete_notif;
1716 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1717
9fbab516 1718 /* Set up hardware specific Rx handlers */
bb8c093b 1719 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1720}
1721
91c066f2
TW
1722/**
1723 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
1724 * When FW advances 'R' index, all entries between old and new 'R' index
1725 * need to be reclaimed.
1726 */
4a8a4322 1727static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
91c066f2
TW
1728 int txq_id, int index)
1729{
188cf6c7 1730 struct iwl_tx_queue *txq = &priv->txq[txq_id];
d20b3c65 1731 struct iwl_queue *q = &txq->q;
91c066f2
TW
1732 int nfreed = 0;
1733
625a381a 1734 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
15b1687c 1735 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
91c066f2
TW
1736 "is out of range [0-%d] %d %d.\n", txq_id,
1737 index, q->n_bd, q->write_ptr, q->read_ptr);
1738 return;
1739 }
1740
1741 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
1742 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1743 if (nfreed > 1) {
15b1687c 1744 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
91c066f2
TW
1745 q->write_ptr, q->read_ptr);
1746 queue_work(priv->workqueue, &priv->restart);
1747 break;
1748 }
1749 nfreed++;
1750 }
1751}
1752
1753
b481de9c 1754/**
bb8c093b 1755 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
1756 * @rxb: Rx buffer to reclaim
1757 *
1758 * If an Rx buffer has an async callback associated with it the callback
1759 * will be executed. The attached skb (if present) will only be freed
1760 * if the callback returns 1
1761 */
4a8a4322 1762static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
6100b588 1763 struct iwl_rx_mem_buffer *rxb)
b481de9c 1764{
3d24a9f7 1765 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1766 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1767 int txq_id = SEQ_TO_QUEUE(sequence);
1768 int index = SEQ_TO_INDEX(sequence);
600c0e11 1769 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
b481de9c 1770 int cmd_index;
c2d79b48 1771 struct iwl_cmd *cmd;
b481de9c 1772
638d0eb9
CR
1773 if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
1774 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
1775 txq_id, sequence,
1776 priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
1777 priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
1778 iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
1779 return;
1780 }
b481de9c 1781
188cf6c7
SO
1782 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
1783 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
b481de9c
ZY
1784
1785 /* Input error checking is done when commands are added to queue. */
1786 if (cmd->meta.flags & CMD_WANT_SKB) {
1787 cmd->meta.source->u.skb = rxb->skb;
1788 rxb->skb = NULL;
1789 } else if (cmd->meta.u.callback &&
1790 !cmd->meta.u.callback(priv, cmd, rxb->skb))
1791 rxb->skb = NULL;
1792
91c066f2 1793 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
1794
1795 if (!(cmd->meta.flags & CMD_ASYNC)) {
1796 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1797 wake_up_interruptible(&priv->wait_command_queue);
1798 }
1799}
1800
1801/************************** RX-FUNCTIONS ****************************/
1802/*
1803 * Rx theory of operation
1804 *
1805 * The host allocates 32 DMA target addresses and passes the host address
1806 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1807 * 0 to 31
1808 *
1809 * Rx Queue Indexes
1810 * The host/firmware share two index registers for managing the Rx buffers.
1811 *
1812 * The READ index maps to the first position that the firmware may be writing
1813 * to -- the driver can read up to (but not including) this position and get
1814 * good data.
1815 * The READ index is managed by the firmware once the card is enabled.
1816 *
1817 * The WRITE index maps to the last position the driver has read from -- the
1818 * position preceding WRITE is the last slot the firmware can place a packet.
1819 *
1820 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1821 * WRITE = READ.
1822 *
9fbab516 1823 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1824 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1825 *
9fbab516 1826 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1827 * and fire the RX interrupt. The driver can then query the READ index and
1828 * process as many packets as possible, moving the WRITE index forward as it
1829 * resets the Rx queue buffers with new memory.
1830 *
1831 * The management in the driver is as follows:
1832 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1833 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1834 * to replenish the iwl->rxq->rx_free.
bb8c093b 1835 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1836 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1837 * 'processed' and 'read' driver indexes as well)
1838 * + A received packet is processed and handed to the kernel network stack,
1839 * detached from the iwl->rxq. The driver 'processed' index is updated.
1840 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1841 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1842 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1843 * were enough free buffers and RX_STALLED is set it is cleared.
1844 *
1845 *
1846 * Driver sequence:
1847 *
9fbab516 1848 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1849 * iwl3945_rx_queue_restock
9fbab516 1850 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1851 * queue, updates firmware pointers, and updates
1852 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1853 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1854 *
1855 * -- enable interrupts --
6100b588 1856 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1857 * READ INDEX, detaching the SKB from the pool.
1858 * Moves the packet buffer from queue to rx_used.
bb8c093b 1859 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1860 * slots.
1861 * ...
1862 *
1863 */
1864
b481de9c 1865/**
9fbab516 1866 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1867 */
4a8a4322 1868static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1869 dma_addr_t dma_addr)
1870{
1871 return cpu_to_le32((u32)dma_addr);
1872}
1873
1874/**
bb8c093b 1875 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1876 *
9fbab516 1877 * If there are slots in the RX queue that need to be restocked,
b481de9c 1878 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1879 * as we can, pulling from rx_free.
b481de9c
ZY
1880 *
1881 * This moves the 'write' index forward to catch up with 'processed', and
1882 * also updates the memory address in the firmware to reference the new
1883 * target buffer.
1884 */
4a8a4322 1885static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1886{
cc2f362c 1887 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1888 struct list_head *element;
6100b588 1889 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1890 unsigned long flags;
1891 int write, rc;
1892
1893 spin_lock_irqsave(&rxq->lock, flags);
1894 write = rxq->write & ~0x7;
37d68317 1895 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1896 /* Get next free Rx buffer, remove from free list */
b481de9c 1897 element = rxq->rx_free.next;
6100b588 1898 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1899 list_del(element);
6440adb5
BC
1900
1901 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1902 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1903 rxq->queue[rxq->write] = rxb;
1904 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1905 rxq->free_count--;
1906 }
1907 spin_unlock_irqrestore(&rxq->lock, flags);
1908 /* If the pre-allocated buffer pool is dropping low, schedule to
1909 * refill it */
1910 if (rxq->free_count <= RX_LOW_WATERMARK)
1911 queue_work(priv->workqueue, &priv->rx_replenish);
1912
1913
6440adb5
BC
1914 /* If we've added more space for the firmware to place data, tell it.
1915 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
1916 if ((write != (rxq->write & ~0x7))
1917 || (abs(rxq->write - rxq->read) > 7)) {
1918 spin_lock_irqsave(&rxq->lock, flags);
1919 rxq->need_update = 1;
1920 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1921 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1922 if (rc)
1923 return rc;
1924 }
1925
1926 return 0;
1927}
1928
1929/**
bb8c093b 1930 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1931 *
1932 * When moving to rx_free an SKB is allocated for the slot.
1933 *
bb8c093b 1934 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1935 * This is called as a scheduled work item (except for during initialization)
b481de9c 1936 */
4a8a4322 1937static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 1938{
cc2f362c 1939 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1940 struct list_head *element;
6100b588 1941 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1942 unsigned long flags;
1943 spin_lock_irqsave(&rxq->lock, flags);
1944 while (!list_empty(&rxq->rx_used)) {
1945 element = rxq->rx_used.next;
6100b588 1946 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
BC
1947
1948 /* Alloc a new receive buffer */
b481de9c 1949 rxb->skb =
1e33dc64
WT
1950 alloc_skb(priv->hw_params.rx_buf_size,
1951 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
1952 if (!rxb->skb) {
1953 if (net_ratelimit())
978785a3 1954 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1955 /* We don't reschedule replenish work here -- we will
1956 * call the restock method and if it still needs
1957 * more buffers it will schedule replenish */
1958 break;
1959 }
12342c47
ZY
1960
1961 /* If radiotap head is required, reserve some headroom here.
1962 * The physical head count is a variable rx_stats->phy_count.
1963 * We reserve 4 bytes here. Plus these extra bytes, the
1964 * headroom of the physical head should be enough for the
1965 * radiotap head that iwl3945 supported. See iwl3945_rt.
1966 */
1967 skb_reserve(rxb->skb, 4);
1968
b481de9c
ZY
1969 priv->alloc_rxb_skb++;
1970 list_del(element);
6440adb5
BC
1971
1972 /* Get physical address of RB/SKB */
1e33dc64
WT
1973 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1974 rxb->skb->data,
1975 priv->hw_params.rx_buf_size,
1976 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1977 list_add_tail(&rxb->list, &rxq->rx_free);
1978 rxq->free_count++;
1979 }
1980 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
1981}
1982
1983/*
1984 * this should be called while priv->lock is locked
1985 */
4fd1f841 1986static void __iwl3945_rx_replenish(void *data)
5c0eef96 1987{
4a8a4322 1988 struct iwl_priv *priv = data;
5c0eef96
MA
1989
1990 iwl3945_rx_allocate(priv);
1991 iwl3945_rx_queue_restock(priv);
1992}
1993
1994
1995void iwl3945_rx_replenish(void *data)
1996{
4a8a4322 1997 struct iwl_priv *priv = data;
5c0eef96
MA
1998 unsigned long flags;
1999
2000 iwl3945_rx_allocate(priv);
b481de9c
ZY
2001
2002 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2003 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
2004 spin_unlock_irqrestore(&priv->lock, flags);
2005}
2006
b481de9c
ZY
2007/* Convert linear signal-to-noise ratio into dB */
2008static u8 ratio2dB[100] = {
2009/* 0 1 2 3 4 5 6 7 8 9 */
2010 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
2011 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
2012 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
2013 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
2014 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
2015 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
2016 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
2017 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
2018 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
2019 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
2020};
2021
2022/* Calculates a relative dB value from a ratio of linear
2023 * (i.e. not dB) signal levels.
2024 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 2025int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 2026{
221c80cf
AB
2027 /* 1000:1 or higher just report as 60 dB */
2028 if (sig_ratio >= 1000)
b481de9c
ZY
2029 return 60;
2030
221c80cf 2031 /* 100:1 or higher, divide by 10 and use table,
b481de9c 2032 * add 20 dB to make up for divide by 10 */
221c80cf 2033 if (sig_ratio >= 100)
3ac7f146 2034 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
2035
2036 /* We shouldn't see this */
2037 if (sig_ratio < 1)
2038 return 0;
2039
2040 /* Use table for ratios 1:1 - 99:1 */
2041 return (int)ratio2dB[sig_ratio];
2042}
2043
2044#define PERFECT_RSSI (-20) /* dBm */
2045#define WORST_RSSI (-95) /* dBm */
2046#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
2047
2048/* Calculate an indication of rx signal quality (a percentage, not dBm!).
2049 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
2050 * about formulas used below. */
bb8c093b 2051int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
2052{
2053 int sig_qual;
2054 int degradation = PERFECT_RSSI - rssi_dbm;
2055
2056 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
2057 * as indicator; formula is (signal dbm - noise dbm).
2058 * SNR at or above 40 is a great signal (100%).
2059 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
2060 * Weakest usable signal is usually 10 - 15 dB SNR. */
2061 if (noise_dbm) {
2062 if (rssi_dbm - noise_dbm >= 40)
2063 return 100;
2064 else if (rssi_dbm < noise_dbm)
2065 return 0;
2066 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
2067
2068 /* Else use just the signal level.
2069 * This formula is a least squares fit of data points collected and
2070 * compared with a reference system that had a percentage (%) display
2071 * for signal quality. */
2072 } else
2073 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
2074 (15 * RSSI_RANGE + 62 * degradation)) /
2075 (RSSI_RANGE * RSSI_RANGE);
2076
2077 if (sig_qual > 100)
2078 sig_qual = 100;
2079 else if (sig_qual < 1)
2080 sig_qual = 0;
2081
2082 return sig_qual;
2083}
2084
2085/**
9fbab516 2086 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
2087 *
2088 * Uses the priv->rx_handlers callback function array to invoke
2089 * the appropriate handlers, including command responses,
2090 * frame-received notifications, and other notifications.
2091 */
4a8a4322 2092static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 2093{
6100b588 2094 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 2095 struct iwl_rx_packet *pkt;
cc2f362c 2096 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
2097 u32 r, i;
2098 int reclaim;
2099 unsigned long flags;
5c0eef96 2100 u8 fill_rx = 0;
d68ab680 2101 u32 count = 8;
b481de9c 2102
6440adb5
BC
2103 /* uCode's read index (stored in shared DRAM) indicates the last Rx
2104 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 2105 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
2106 i = rxq->read;
2107
37d68317 2108 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 2109 fill_rx = 1;
b481de9c
ZY
2110 /* Rx interrupt, but nothing sent from uCode */
2111 if (i == r)
e1623446 2112 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
2113
2114 while (i != r) {
2115 rxb = rxq->queue[i];
2116
9fbab516 2117 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
2118 * then a bug has been introduced in the queue refilling
2119 * routines -- catch it here */
2120 BUG_ON(rxb == NULL);
2121
2122 rxq->queue[i] = NULL;
2123
6100b588 2124 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 2125 priv->hw_params.rx_buf_size,
b481de9c 2126 PCI_DMA_FROMDEVICE);
3d24a9f7 2127 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
2128
2129 /* Reclaim a command buffer only if this packet is a response
2130 * to a (driver-originated) command.
2131 * If the packet (e.g. Rx frame) originated from uCode,
2132 * there is no command buffer to reclaim.
2133 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
2134 * but apparently a few don't get set; catch them here. */
2135 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
2136 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
2137 (pkt->hdr.cmd != REPLY_TX);
2138
2139 /* Based on type of command response or notification,
2140 * handle those that need handling via function in
bb8c093b 2141 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 2142 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 2143 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
2144 "r = %d, i = %d, %s, 0x%02x\n", r, i,
2145 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
2146 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
2147 } else {
2148 /* No handling needed */
e1623446 2149 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
2150 "r %d i %d No handler needed for %s, 0x%02x\n",
2151 r, i, get_cmd_string(pkt->hdr.cmd),
2152 pkt->hdr.cmd);
2153 }
2154
2155 if (reclaim) {
9fbab516 2156 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 2157 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
2158 * as we reclaim the driver command queue */
2159 if (rxb && rxb->skb)
bb8c093b 2160 iwl3945_tx_cmd_complete(priv, rxb);
b481de9c 2161 else
39aadf8c 2162 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
2163 }
2164
2165 /* For now we just don't re-use anything. We can tweak this
2166 * later to try and re-use notification packets and SKBs that
2167 * fail to Rx correctly */
2168 if (rxb->skb != NULL) {
2169 priv->alloc_rxb_skb--;
2170 dev_kfree_skb_any(rxb->skb);
2171 rxb->skb = NULL;
2172 }
2173
6100b588 2174 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
2175 priv->hw_params.rx_buf_size,
2176 PCI_DMA_FROMDEVICE);
b481de9c
ZY
2177 spin_lock_irqsave(&rxq->lock, flags);
2178 list_add_tail(&rxb->list, &priv->rxq.rx_used);
2179 spin_unlock_irqrestore(&rxq->lock, flags);
2180 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
2181 /* If there are a lot of unused frames,
2182 * restock the Rx queue so ucode won't assert. */
2183 if (fill_rx) {
2184 count++;
2185 if (count >= 8) {
2186 priv->rxq.read = i;
2187 __iwl3945_rx_replenish(priv);
2188 count = 0;
2189 }
2190 }
b481de9c
ZY
2191 }
2192
2193 /* Backtrack one entry */
2194 priv->rxq.read = i;
bb8c093b 2195 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
2196}
2197
4a8a4322 2198static void iwl3945_enable_interrupts(struct iwl_priv *priv)
b481de9c 2199{
e1623446 2200 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
b481de9c 2201 set_bit(STATUS_INT_ENABLED, &priv->status);
5d49f498 2202 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
2203}
2204
0359facc
MA
2205
2206/* call this function to flush any scheduled tasklet */
4a8a4322 2207static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 2208{
a96a27f9 2209 /* wait to make sure we flush pending tasklet*/
0359facc
MA
2210 synchronize_irq(priv->pci_dev->irq);
2211 tasklet_kill(&priv->irq_tasklet);
2212}
2213
2214
4a8a4322 2215static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
2216{
2217 clear_bit(STATUS_INT_ENABLED, &priv->status);
2218
2219 /* disable interrupts from uCode/NIC to host */
5d49f498 2220 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
2221
2222 /* acknowledge/clear/reset any interrupts still pending
2223 * from uCode or flow handler (Rx/Tx DMA) */
5d49f498
AK
2224 iwl_write32(priv, CSR_INT, 0xffffffff);
2225 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
e1623446 2226 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
b481de9c
ZY
2227}
2228
2229static const char *desc_lookup(int i)
2230{
2231 switch (i) {
2232 case 1:
2233 return "FAIL";
2234 case 2:
2235 return "BAD_PARAM";
2236 case 3:
2237 return "BAD_CHECKSUM";
2238 case 4:
2239 return "NMI_INTERRUPT";
2240 case 5:
2241 return "SYSASSERT";
2242 case 6:
2243 return "FATAL_ERROR";
2244 }
2245
2246 return "UNKNOWN";
2247}
2248
2249#define ERROR_START_OFFSET (1 * sizeof(u32))
2250#define ERROR_ELEM_SIZE (7 * sizeof(u32))
2251
4a8a4322 2252static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
2253{
2254 u32 i;
2255 u32 desc, time, count, base, data1;
2256 u32 blink1, blink2, ilink1, ilink2;
2257 int rc;
2258
2259 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2260
bb8c093b 2261 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2262 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
2263 return;
2264 }
2265
5d49f498 2266 rc = iwl_grab_nic_access(priv);
b481de9c 2267 if (rc) {
39aadf8c 2268 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2269 return;
2270 }
2271
5d49f498 2272 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
2273
2274 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
2275 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2276 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2277 priv->status, count);
b481de9c
ZY
2278 }
2279
15b1687c 2280 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
2281 "ilink1 nmiPC Line\n");
2282 for (i = ERROR_START_OFFSET;
2283 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
2284 i += ERROR_ELEM_SIZE) {
5d49f498 2285 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 2286 time =
5d49f498 2287 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 2288 blink1 =
5d49f498 2289 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 2290 blink2 =
5d49f498 2291 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 2292 ilink1 =
5d49f498 2293 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 2294 ilink2 =
5d49f498 2295 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 2296 data1 =
5d49f498 2297 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 2298
15b1687c
WT
2299 IWL_ERR(priv,
2300 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
2301 desc_lookup(desc), desc, time, blink1, blink2,
2302 ilink1, ilink2, data1);
b481de9c
ZY
2303 }
2304
5d49f498 2305 iwl_release_nic_access(priv);
b481de9c
ZY
2306
2307}
2308
f58177b9 2309#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
2310
2311/**
bb8c093b 2312 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 2313 *
5d49f498 2314 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 2315 */
4a8a4322 2316static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
2317 u32 num_events, u32 mode)
2318{
2319 u32 i;
2320 u32 base; /* SRAM byte address of event log header */
2321 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2322 u32 ptr; /* SRAM byte address of log data */
2323 u32 ev, time, data; /* event log data */
2324
2325 if (num_events == 0)
2326 return;
2327
2328 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2329
2330 if (mode == 0)
2331 event_size = 2 * sizeof(u32);
2332 else
2333 event_size = 3 * sizeof(u32);
2334
2335 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2336
2337 /* "time" is actually "data" for mode 0 (no timestamp).
2338 * place event id # at far right for easier visual parsing. */
2339 for (i = 0; i < num_events; i++) {
5d49f498 2340 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 2341 ptr += sizeof(u32);
5d49f498 2342 time = iwl_read_targ_mem(priv, ptr);
b481de9c 2343 ptr += sizeof(u32);
15b1687c
WT
2344 if (mode == 0) {
2345 /* data, ev */
2346 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
2347 } else {
5d49f498 2348 data = iwl_read_targ_mem(priv, ptr);
b481de9c 2349 ptr += sizeof(u32);
15b1687c 2350 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
2351 }
2352 }
2353}
2354
4a8a4322 2355static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
2356{
2357 int rc;
2358 u32 base; /* SRAM byte address of event log header */
2359 u32 capacity; /* event log capacity in # entries */
2360 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2361 u32 num_wraps; /* # times uCode wrapped to top of log */
2362 u32 next_entry; /* index of next entry to be written by uCode */
2363 u32 size; /* # entries that we'll print */
2364
2365 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 2366 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2367 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
2368 return;
2369 }
2370
5d49f498 2371 rc = iwl_grab_nic_access(priv);
b481de9c 2372 if (rc) {
39aadf8c 2373 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2374 return;
2375 }
2376
2377 /* event log header */
5d49f498
AK
2378 capacity = iwl_read_targ_mem(priv, base);
2379 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2380 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2381 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
2382
2383 size = num_wraps ? capacity : next_entry;
2384
2385 /* bail out if nothing in log */
2386 if (size == 0) {
15b1687c 2387 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 2388 iwl_release_nic_access(priv);
b481de9c
ZY
2389 return;
2390 }
2391
15b1687c 2392 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
2393 size, num_wraps);
2394
2395 /* if uCode has wrapped back to top of log, start at the oldest entry,
2396 * i.e the next one that uCode would fill. */
2397 if (num_wraps)
bb8c093b 2398 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
2399 capacity - next_entry, mode);
2400
2401 /* (then/else) start at top of log */
bb8c093b 2402 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 2403
5d49f498 2404 iwl_release_nic_access(priv);
b481de9c
ZY
2405}
2406
4a8a4322 2407static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
2408{
2409 unsigned long flags;
2410
8ccde88a
SO
2411 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
2412 sizeof(priv->staging_rxon));
2413 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2414 iwl3945_commit_rxon(priv);
b481de9c 2415
bb8c093b 2416 iwl3945_add_station(priv, priv->bssid, 1, 0);
b481de9c
ZY
2417
2418 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 2419 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
2420 priv->error_recovering = 0;
2421 spin_unlock_irqrestore(&priv->lock, flags);
2422}
2423
4a8a4322 2424static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
2425{
2426 u32 inta, handled = 0;
2427 u32 inta_fh;
2428 unsigned long flags;
d08853a3 2429#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2430 u32 inta_mask;
2431#endif
2432
2433 spin_lock_irqsave(&priv->lock, flags);
2434
2435 /* Ack/clear/reset pending uCode interrupts.
2436 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
2437 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
2438 inta = iwl_read32(priv, CSR_INT);
2439 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
2440
2441 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
2442 * Any new interrupts that happen after this, either while we're
2443 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
2444 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2445 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 2446
d08853a3 2447#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2448 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 2449 /* just for debug */
5d49f498 2450 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 2451 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
2452 inta, inta_mask, inta_fh);
2453 }
2454#endif
2455
2456 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
2457 * atomic, make sure that inta covers all the interrupts that
2458 * we've discovered, even if FH interrupt came in just after
2459 * reading CSR_INT. */
6f83eaa1 2460 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 2461 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 2462 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
2463 inta |= CSR_INT_BIT_FH_TX;
2464
2465 /* Now service all interrupt bits discovered above. */
2466 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 2467 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
2468
2469 /* Tell the device to stop sending interrupts */
bb8c093b 2470 iwl3945_disable_interrupts(priv);
b481de9c 2471
8ccde88a 2472 iwl_irq_handle_error(priv);
b481de9c
ZY
2473
2474 handled |= CSR_INT_BIT_HW_ERR;
2475
2476 spin_unlock_irqrestore(&priv->lock, flags);
2477
2478 return;
2479 }
2480
d08853a3 2481#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2482 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 2483 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 2484 if (inta & CSR_INT_BIT_SCD)
e1623446 2485 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 2486 "the frame/frames.\n");
b481de9c
ZY
2487
2488 /* Alive notification via Rx interrupt will do the real work */
2489 if (inta & CSR_INT_BIT_ALIVE)
e1623446 2490 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
2491 }
2492#endif
2493 /* Safely ignore these bits for debug checks below */
25c03d8e 2494 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 2495
b481de9c
ZY
2496 /* Error detected by uCode */
2497 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
2498 IWL_ERR(priv, "Microcode SW error detected. "
2499 "Restarting 0x%X.\n", inta);
8ccde88a 2500 iwl_irq_handle_error(priv);
b481de9c
ZY
2501 handled |= CSR_INT_BIT_SW_ERR;
2502 }
2503
2504 /* uCode wakes up after power-down sleep */
2505 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 2506 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 2507 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
2508 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
2509 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
2510 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
2511 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
2512 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
2513 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
2514
2515 handled |= CSR_INT_BIT_WAKEUP;
2516 }
2517
2518 /* All uCode command responses, including Tx command responses,
2519 * Rx "responses" (frame-received notification), and other
2520 * notifications from uCode come through here*/
2521 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 2522 iwl3945_rx_handle(priv);
b481de9c
ZY
2523 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
2524 }
2525
2526 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 2527 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 2528
5d49f498
AK
2529 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2530 if (!iwl_grab_nic_access(priv)) {
2531 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 2532 (FH39_SRVC_CHNL), 0x0);
5d49f498 2533 iwl_release_nic_access(priv);
b481de9c
ZY
2534 }
2535 handled |= CSR_INT_BIT_FH_TX;
2536 }
2537
2538 if (inta & ~handled)
15b1687c 2539 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
2540
2541 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 2542 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 2543 inta & ~CSR_INI_SET_MASK);
39aadf8c 2544 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
2545 }
2546
2547 /* Re-enable all interrupts */
0359facc
MA
2548 /* only Re-enable if disabled by irq */
2549 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2550 iwl3945_enable_interrupts(priv);
b481de9c 2551
d08853a3 2552#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2553 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
2554 inta = iwl_read32(priv, CSR_INT);
2555 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2556 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 2557 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
2558 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2559 }
2560#endif
2561 spin_unlock_irqrestore(&priv->lock, flags);
2562}
2563
bb8c093b 2564static irqreturn_t iwl3945_isr(int irq, void *data)
b481de9c 2565{
4a8a4322 2566 struct iwl_priv *priv = data;
b481de9c
ZY
2567 u32 inta, inta_mask;
2568 u32 inta_fh;
2569 if (!priv)
2570 return IRQ_NONE;
2571
2572 spin_lock(&priv->lock);
2573
2574 /* Disable (but don't clear!) interrupts here to avoid
2575 * back-to-back ISRs and sporadic interrupts from our NIC.
2576 * If we have something to service, the tasklet will re-enable ints.
2577 * If we *don't* have something, we'll re-enable before leaving here. */
5d49f498
AK
2578 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
2579 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
2580
2581 /* Discover which interrupts are active/pending */
5d49f498
AK
2582 inta = iwl_read32(priv, CSR_INT);
2583 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
2584
2585 /* Ignore interrupt if there's nothing in NIC to service.
2586 * This may be due to IRQ shared with another device,
2587 * or due to sporadic interrupts thrown from our NIC. */
2588 if (!inta && !inta_fh) {
e1623446 2589 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
b481de9c
ZY
2590 goto none;
2591 }
2592
2593 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2594 /* Hardware disappeared */
39aadf8c 2595 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
cb4da1a3 2596 goto unplugged;
b481de9c
ZY
2597 }
2598
e1623446 2599 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
2600 inta, inta_mask, inta_fh);
2601
25c03d8e
JP
2602 inta &= ~CSR_INT_BIT_SCD;
2603
bb8c093b 2604 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
2605 if (likely(inta || inta_fh))
2606 tasklet_schedule(&priv->irq_tasklet);
cb4da1a3 2607unplugged:
b481de9c
ZY
2608 spin_unlock(&priv->lock);
2609
2610 return IRQ_HANDLED;
2611
2612 none:
2613 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
2614 /* only Re-enable if disabled by irq */
2615 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2616 iwl3945_enable_interrupts(priv);
b481de9c
ZY
2617 spin_unlock(&priv->lock);
2618 return IRQ_NONE;
2619}
2620
4a8a4322 2621static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 2622 enum ieee80211_band band,
f9340520 2623 u8 is_active, u8 n_probes,
bb8c093b 2624 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
2625{
2626 const struct ieee80211_channel *channels = NULL;
8318d78a 2627 const struct ieee80211_supported_band *sband;
d20b3c65 2628 const struct iwl_channel_info *ch_info;
b481de9c
ZY
2629 u16 passive_dwell = 0;
2630 u16 active_dwell = 0;
2631 int added, i;
2632
cbba18c6 2633 sband = iwl_get_hw_mode(priv, band);
8318d78a 2634 if (!sband)
b481de9c
ZY
2635 return 0;
2636
8318d78a 2637 channels = sband->channels;
b481de9c 2638
77fecfb8
SO
2639 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2640 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 2641
8f4807a1
AK
2642 if (passive_dwell <= active_dwell)
2643 passive_dwell = active_dwell + 1;
2644
8318d78a 2645 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
2646 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2647 continue;
2648
8318d78a 2649 scan_ch->channel = channels[i].hw_value;
b481de9c 2650
e6148917 2651 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 2652 if (!is_channel_valid(ch_info)) {
e1623446 2653 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
2654 scan_ch->channel);
2655 continue;
2656 }
2657
011a0330
AK
2658 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2659 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2660 /* If passive , set up for auto-switch
2661 * and use long active_dwell time.
2662 */
b481de9c 2663 if (!is_active || is_channel_passive(ch_info) ||
011a0330 2664 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 2665 scan_ch->type = 0; /* passive */
011a0330
AK
2666 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2667 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2668 } else {
b481de9c 2669 scan_ch->type = 1; /* active */
011a0330 2670 }
b481de9c 2671
011a0330
AK
2672 /* Set direct probe bits. These may be used both for active
2673 * scan channels (probes gets sent right away),
2674 * or for passive channels (probes get se sent only after
2675 * hearing clear Rx packet).*/
2676 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2677 if (n_probes)
0d21044e 2678 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
2679 } else {
2680 /* uCode v1 does not allow setting direct probe bits on
2681 * passive channel. */
2682 if ((scan_ch->type & 1) && n_probes)
0d21044e 2683 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2684 }
b481de9c 2685
9fbab516 2686 /* Set txpower levels to defaults */
b481de9c
ZY
2687 scan_ch->tpc.dsp_atten = 110;
2688 /* scan_pwr_info->tpc.dsp_atten; */
2689
2690 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2691 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2692 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2693 else {
2694 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2695 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2696 * power level:
8a1b0245 2697 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2698 */
2699 }
2700
e1623446 2701 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
2702 scan_ch->channel,
2703 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2704 (scan_ch->type & 1) ?
2705 active_dwell : passive_dwell);
2706
2707 scan_ch++;
2708 added++;
2709 }
2710
e1623446 2711 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
2712 return added;
2713}
2714
4a8a4322 2715static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2716 struct ieee80211_rate *rates)
2717{
2718 int i;
2719
2720 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2721 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2722 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2723 rates[i].hw_value_short = i;
2724 rates[i].flags = 0;
d9829a67 2725 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2726 /*
8318d78a 2727 * If CCK != 1M then set short preamble rate flag.
b481de9c 2728 */
bb8c093b 2729 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2730 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2731 }
b481de9c
ZY
2732 }
2733}
2734
b481de9c
ZY
2735/******************************************************************************
2736 *
2737 * uCode download functions
2738 *
2739 ******************************************************************************/
2740
4a8a4322 2741static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2742{
98c92211
TW
2743 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2744 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2745 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2746 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2747 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2748 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2749}
2750
2751/**
bb8c093b 2752 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2753 * looking at all data.
2754 */
4a8a4322 2755static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2756{
2757 u32 val;
2758 u32 save_len = len;
2759 int rc = 0;
2760 u32 errcnt;
2761
e1623446 2762 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2763
5d49f498 2764 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2765 if (rc)
2766 return rc;
2767
5d49f498 2768 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2769 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2770
2771 errcnt = 0;
2772 for (; len > 0; len -= sizeof(u32), image++) {
2773 /* read data comes through single port, auto-incr addr */
2774 /* NOTE: Use the debugless read so we don't flood kernel log
2775 * if IWL_DL_IO is set */
5d49f498 2776 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2777 if (val != le32_to_cpu(*image)) {
15b1687c 2778 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2779 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2780 save_len - len, val, le32_to_cpu(*image));
2781 rc = -EIO;
2782 errcnt++;
2783 if (errcnt >= 20)
2784 break;
2785 }
2786 }
2787
5d49f498 2788 iwl_release_nic_access(priv);
b481de9c
ZY
2789
2790 if (!errcnt)
e1623446
TW
2791 IWL_DEBUG_INFO(priv,
2792 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2793
2794 return rc;
2795}
2796
2797
2798/**
bb8c093b 2799 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2800 * using sample data 100 bytes apart. If these sample points are good,
2801 * it's a pretty good bet that everything between them is good, too.
2802 */
4a8a4322 2803static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2804{
2805 u32 val;
2806 int rc = 0;
2807 u32 errcnt = 0;
2808 u32 i;
2809
e1623446 2810 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2811
5d49f498 2812 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2813 if (rc)
2814 return rc;
2815
2816 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2817 /* read data comes through single port, auto-incr addr */
2818 /* NOTE: Use the debugless read so we don't flood kernel log
2819 * if IWL_DL_IO is set */
5d49f498 2820 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2821 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2822 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2823 if (val != le32_to_cpu(*image)) {
2824#if 0 /* Enable this if you want to see details */
15b1687c 2825 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2826 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2827 i, val, *image);
2828#endif
2829 rc = -EIO;
2830 errcnt++;
2831 if (errcnt >= 3)
2832 break;
2833 }
2834 }
2835
5d49f498 2836 iwl_release_nic_access(priv);
b481de9c
ZY
2837
2838 return rc;
2839}
2840
2841
2842/**
bb8c093b 2843 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2844 * and verify its contents
2845 */
4a8a4322 2846static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
2847{
2848 __le32 *image;
2849 u32 len;
2850 int rc = 0;
2851
2852 /* Try bootstrap */
2853 image = (__le32 *)priv->ucode_boot.v_addr;
2854 len = priv->ucode_boot.len;
bb8c093b 2855 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2856 if (rc == 0) {
e1623446 2857 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2858 return 0;
2859 }
2860
2861 /* Try initialize */
2862 image = (__le32 *)priv->ucode_init.v_addr;
2863 len = priv->ucode_init.len;
bb8c093b 2864 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2865 if (rc == 0) {
e1623446 2866 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2867 return 0;
2868 }
2869
2870 /* Try runtime/protocol */
2871 image = (__le32 *)priv->ucode_code.v_addr;
2872 len = priv->ucode_code.len;
bb8c093b 2873 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2874 if (rc == 0) {
e1623446 2875 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2876 return 0;
2877 }
2878
15b1687c 2879 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2880
9fbab516
BC
2881 /* Since nothing seems to match, show first several data entries in
2882 * instruction SRAM, so maybe visual inspection will give a clue.
2883 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2884 image = (__le32 *)priv->ucode_boot.v_addr;
2885 len = priv->ucode_boot.len;
bb8c093b 2886 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2887
2888 return rc;
2889}
2890
4a8a4322 2891static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2892{
2893 /* Remove all resets to allow NIC to operate */
5d49f498 2894 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2895}
2896
2897/**
bb8c093b 2898 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2899 *
2900 * Copy into buffers for card to fetch via bus-mastering
2901 */
4a8a4322 2902static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2903{
a78fe754 2904 struct iwl_ucode *ucode;
a0987a8d 2905 int ret = -EINVAL, index;
b481de9c
ZY
2906 const struct firmware *ucode_raw;
2907 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2908 const char *name_pre = priv->cfg->fw_name_pre;
2909 const unsigned int api_max = priv->cfg->ucode_api_max;
2910 const unsigned int api_min = priv->cfg->ucode_api_min;
2911 char buf[25];
b481de9c
ZY
2912 u8 *src;
2913 size_t len;
a0987a8d 2914 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2915
2916 /* Ask kernel firmware_class module to get the boot firmware off disk.
2917 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2918 for (index = api_max; index >= api_min; index--) {
2919 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2920 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2921 if (ret < 0) {
15b1687c 2922 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2923 buf, ret);
2924 if (ret == -ENOENT)
2925 continue;
2926 else
2927 goto error;
2928 } else {
2929 if (index < api_max)
15b1687c
WT
2930 IWL_ERR(priv, "Loaded firmware %s, "
2931 "which is deprecated. "
2932 " Please use API v%u instead.\n",
a0987a8d 2933 buf, api_max);
e1623446
TW
2934 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2935 "(%zd bytes) from disk\n",
a0987a8d
RC
2936 buf, ucode_raw->size);
2937 break;
2938 }
b481de9c
ZY
2939 }
2940
a0987a8d
RC
2941 if (ret < 0)
2942 goto error;
b481de9c
ZY
2943
2944 /* Make sure that we got at least our header! */
2945 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 2946 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2947 ret = -EINVAL;
b481de9c
ZY
2948 goto err_release;
2949 }
2950
2951 /* Data from ucode file: header followed by uCode images */
2952 ucode = (void *)ucode_raw->data;
2953
c02b3acd 2954 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2955 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
2956 inst_size = le32_to_cpu(ucode->inst_size);
2957 data_size = le32_to_cpu(ucode->data_size);
2958 init_size = le32_to_cpu(ucode->init_size);
2959 init_data_size = le32_to_cpu(ucode->init_data_size);
2960 boot_size = le32_to_cpu(ucode->boot_size);
2961
a0987a8d
RC
2962 /* api_ver should match the api version forming part of the
2963 * firmware filename ... but we don't check for that and only rely
2964 * on the API version read from firware header from here on forward */
2965
2966 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2967 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2968 "Driver supports v%u, firmware is v%u.\n",
2969 api_max, api_ver);
2970 priv->ucode_ver = 0;
2971 ret = -EINVAL;
2972 goto err_release;
2973 }
2974 if (api_ver != api_max)
15b1687c 2975 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2976 "got %u. New firmware can be obtained "
2977 "from http://www.intellinuxwireless.org.\n",
2978 api_max, api_ver);
2979
978785a3
TW
2980 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2981 IWL_UCODE_MAJOR(priv->ucode_ver),
2982 IWL_UCODE_MINOR(priv->ucode_ver),
2983 IWL_UCODE_API(priv->ucode_ver),
2984 IWL_UCODE_SERIAL(priv->ucode_ver));
2985
e1623446 2986 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2987 priv->ucode_ver);
e1623446
TW
2988 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2989 inst_size);
2990 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2991 data_size);
2992 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2993 init_size);
2994 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2995 init_data_size);
2996 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2997 boot_size);
b481de9c 2998
a0987a8d 2999
b481de9c
ZY
3000 /* Verify size of file vs. image size info in file's header */
3001 if (ucode_raw->size < sizeof(*ucode) +
3002 inst_size + data_size + init_size +
3003 init_data_size + boot_size) {
3004
e1623446
TW
3005 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
3006 ucode_raw->size);
90e759d1 3007 ret = -EINVAL;
b481de9c
ZY
3008 goto err_release;
3009 }
3010
3011 /* Verify that uCode images will fit in card's SRAM */
250bdd21 3012 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 3013 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
3014 inst_size);
3015 ret = -EINVAL;
b481de9c
ZY
3016 goto err_release;
3017 }
3018
250bdd21 3019 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 3020 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
3021 data_size);
3022 ret = -EINVAL;
b481de9c
ZY
3023 goto err_release;
3024 }
250bdd21 3025 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
3026 IWL_DEBUG_INFO(priv,
3027 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
3028 init_size);
3029 ret = -EINVAL;
b481de9c
ZY
3030 goto err_release;
3031 }
250bdd21 3032 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
3033 IWL_DEBUG_INFO(priv,
3034 "uCode init data len %d too large to fit in\n",
90e759d1
TW
3035 init_data_size);
3036 ret = -EINVAL;
b481de9c
ZY
3037 goto err_release;
3038 }
250bdd21 3039 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
3040 IWL_DEBUG_INFO(priv,
3041 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
3042 boot_size);
3043 ret = -EINVAL;
b481de9c
ZY
3044 goto err_release;
3045 }
3046
3047 /* Allocate ucode buffers for card's bus-master loading ... */
3048
3049 /* Runtime instructions and 2 copies of data:
3050 * 1) unmodified from disk
3051 * 2) backup cache for save/restore during power-downs */
3052 priv->ucode_code.len = inst_size;
98c92211 3053 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
3054
3055 priv->ucode_data.len = data_size;
98c92211 3056 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
3057
3058 priv->ucode_data_backup.len = data_size;
98c92211 3059 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 3060
90e759d1
TW
3061 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
3062 !priv->ucode_data_backup.v_addr)
3063 goto err_pci_alloc;
b481de9c
ZY
3064
3065 /* Initialization instructions and data */
90e759d1
TW
3066 if (init_size && init_data_size) {
3067 priv->ucode_init.len = init_size;
98c92211 3068 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
3069
3070 priv->ucode_init_data.len = init_data_size;
98c92211 3071 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
3072
3073 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
3074 goto err_pci_alloc;
3075 }
b481de9c
ZY
3076
3077 /* Bootstrap (instructions only, no data) */
90e759d1
TW
3078 if (boot_size) {
3079 priv->ucode_boot.len = boot_size;
98c92211 3080 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 3081
90e759d1
TW
3082 if (!priv->ucode_boot.v_addr)
3083 goto err_pci_alloc;
3084 }
b481de9c
ZY
3085
3086 /* Copy images into buffers for card's bus-master reads ... */
3087
3088 /* Runtime instructions (first block of data in file) */
3089 src = &ucode->data[0];
3090 len = priv->ucode_code.len;
e1623446
TW
3091 IWL_DEBUG_INFO(priv,
3092 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 3093 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 3094 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
3095 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
3096
3097 /* Runtime data (2nd block)
bb8c093b 3098 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
3099 src = &ucode->data[inst_size];
3100 len = priv->ucode_data.len;
e1623446
TW
3101 IWL_DEBUG_INFO(priv,
3102 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
3103 memcpy(priv->ucode_data.v_addr, src, len);
3104 memcpy(priv->ucode_data_backup.v_addr, src, len);
3105
3106 /* Initialization instructions (3rd block) */
3107 if (init_size) {
3108 src = &ucode->data[inst_size + data_size];
3109 len = priv->ucode_init.len;
e1623446
TW
3110 IWL_DEBUG_INFO(priv,
3111 "Copying (but not loading) init instr len %zd\n", len);
b481de9c
ZY
3112 memcpy(priv->ucode_init.v_addr, src, len);
3113 }
3114
3115 /* Initialization data (4th block) */
3116 if (init_data_size) {
3117 src = &ucode->data[inst_size + data_size + init_size];
3118 len = priv->ucode_init_data.len;
e1623446
TW
3119 IWL_DEBUG_INFO(priv,
3120 "Copying (but not loading) init data len %zd\n", len);
b481de9c
ZY
3121 memcpy(priv->ucode_init_data.v_addr, src, len);
3122 }
3123
3124 /* Bootstrap instructions (5th block) */
3125 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
3126 len = priv->ucode_boot.len;
e1623446
TW
3127 IWL_DEBUG_INFO(priv,
3128 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
3129 memcpy(priv->ucode_boot.v_addr, src, len);
3130
3131 /* We have our copies now, allow OS release its copies */
3132 release_firmware(ucode_raw);
3133 return 0;
3134
3135 err_pci_alloc:
15b1687c 3136 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 3137 ret = -ENOMEM;
bb8c093b 3138 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
3139
3140 err_release:
3141 release_firmware(ucode_raw);
3142
3143 error:
90e759d1 3144 return ret;
b481de9c
ZY
3145}
3146
3147
3148/**
bb8c093b 3149 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
3150 *
3151 * Tell initialization uCode where to find runtime uCode.
3152 *
3153 * BSM registers initially contain pointers to initialization uCode.
3154 * We need to replace them to load runtime uCode inst and data,
3155 * and to save runtime data when powering down.
3156 */
4a8a4322 3157static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
3158{
3159 dma_addr_t pinst;
3160 dma_addr_t pdata;
3161 int rc = 0;
3162 unsigned long flags;
3163
3164 /* bits 31:0 for 3945 */
3165 pinst = priv->ucode_code.p_addr;
3166 pdata = priv->ucode_data_backup.p_addr;
3167
3168 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3169 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3170 if (rc) {
3171 spin_unlock_irqrestore(&priv->lock, flags);
3172 return rc;
3173 }
3174
3175 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
3176 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
3177 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
3178 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
3179 priv->ucode_data.len);
3180
a96a27f9 3181 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 3182 * that all new ptr/size info is in place */
5d49f498 3183 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
3184 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
3185
5d49f498 3186 iwl_release_nic_access(priv);
b481de9c
ZY
3187
3188 spin_unlock_irqrestore(&priv->lock, flags);
3189
e1623446 3190 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c
ZY
3191
3192 return rc;
3193}
3194
3195/**
bb8c093b 3196 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
3197 *
3198 * Called after REPLY_ALIVE notification received from "initialize" uCode.
3199 *
b481de9c 3200 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 3201 */
4a8a4322 3202static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
3203{
3204 /* Check alive response for "valid" sign from uCode */
3205 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
3206 /* We had an error bringing up the hardware, so take it
3207 * all the way back down so we can try again */
e1623446 3208 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
3209 goto restart;
3210 }
3211
3212 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
3213 * This is a paranoid check, because we would not have gotten the
3214 * "initialize" alive if code weren't properly loaded. */
bb8c093b 3215 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
3216 /* Runtime instruction load was bad;
3217 * take it all the way back down so we can try again */
e1623446 3218 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
3219 goto restart;
3220 }
3221
3222 /* Send pointers to protocol/runtime uCode image ... init code will
3223 * load and launch runtime uCode, which will send us another "Alive"
3224 * notification. */
e1623446 3225 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 3226 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
3227 /* Runtime instruction load won't happen;
3228 * take it all the way back down so we can try again */
e1623446 3229 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
3230 goto restart;
3231 }
3232 return;
3233
3234 restart:
3235 queue_work(priv->workqueue, &priv->restart);
3236}
3237
3238
9bdf5eca
MA
3239/* temporary */
3240static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
3241 struct sk_buff *skb);
3242
b481de9c 3243/**
bb8c093b 3244 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 3245 * from protocol/runtime uCode (initialization uCode's
bb8c093b 3246 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 3247 */
4a8a4322 3248static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
3249{
3250 int rc = 0;
3251 int thermal_spin = 0;
3252 u32 rfkill;
3253
e1623446 3254 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
3255
3256 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
3257 /* We had an error bringing up the hardware, so take it
3258 * all the way back down so we can try again */
e1623446 3259 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
3260 goto restart;
3261 }
3262
3263 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
3264 * This is a paranoid check, because we would not have gotten the
3265 * "runtime" alive if code weren't properly loaded. */
bb8c093b 3266 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
3267 /* Runtime instruction load was bad;
3268 * take it all the way back down so we can try again */
e1623446 3269 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
3270 goto restart;
3271 }
3272
bb8c093b 3273 iwl3945_clear_stations_table(priv);
b481de9c 3274
5d49f498 3275 rc = iwl_grab_nic_access(priv);
b481de9c 3276 if (rc) {
39aadf8c 3277 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
3278 return;
3279 }
3280
5d49f498 3281 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 3282 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
5d49f498 3283 iwl_release_nic_access(priv);
b481de9c
ZY
3284
3285 if (rfkill & 0x1) {
3286 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 3287 /* if RFKILL is not on, then wait for thermal
b481de9c 3288 * sensor in adapter to kick in */
bb8c093b 3289 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
3290 thermal_spin++;
3291 udelay(10);
3292 }
3293
3294 if (thermal_spin)
e1623446 3295 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
3296 thermal_spin * 10);
3297 } else
3298 set_bit(STATUS_RF_KILL_HW, &priv->status);
3299
9fbab516 3300 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
3301 set_bit(STATUS_ALIVE, &priv->status);
3302
3303 /* Clear out the uCode error bit if it is set */
3304 clear_bit(STATUS_FW_ERROR, &priv->status);
3305
775a6e27 3306 if (iwl_is_rfkill(priv))
b481de9c
ZY
3307 return;
3308
36d6825b 3309 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
3310
3311 priv->active_rate = priv->rates_mask;
3312 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
3313
d25aabb0 3314 iwl_power_update_mode(priv, false);
b481de9c 3315
8ccde88a 3316 if (iwl_is_associated(priv)) {
bb8c093b 3317 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 3318 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 3319
8ccde88a
SO
3320 memcpy(&priv->staging_rxon, &priv->active_rxon,
3321 sizeof(priv->staging_rxon));
b481de9c
ZY
3322 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3323 } else {
3324 /* Initialize our rx_config data */
8ccde88a 3325 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
3326 }
3327
9fbab516 3328 /* Configure Bluetooth device coexistence support */
17f841cd 3329 iwl_send_bt_config(priv);
b481de9c
ZY
3330
3331 /* Configure the adapter for unassociated operation */
bb8c093b 3332 iwl3945_commit_rxon(priv);
b481de9c 3333
b481de9c
ZY
3334 iwl3945_reg_txpower_periodic(priv);
3335
fe00b5a5
RC
3336 iwl3945_led_register(priv);
3337
e1623446 3338 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 3339 set_bit(STATUS_READY, &priv->status);
5a66926a 3340 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
3341
3342 if (priv->error_recovering)
bb8c093b 3343 iwl3945_error_recovery(priv);
b481de9c 3344
9bdf5eca
MA
3345 /* reassociate for ADHOC mode */
3346 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
3347 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
3348 priv->vif);
3349 if (beacon)
3350 iwl3945_mac_beacon_update(priv->hw, beacon);
3351 }
3352
b481de9c
ZY
3353 return;
3354
3355 restart:
3356 queue_work(priv->workqueue, &priv->restart);
3357}
3358
4a8a4322 3359static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 3360
4a8a4322 3361static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3362{
3363 unsigned long flags;
3364 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
3365 struct ieee80211_conf *conf = NULL;
3366
e1623446 3367 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
3368
3369 conf = ieee80211_get_hw_conf(priv->hw);
3370
3371 if (!exit_pending)
3372 set_bit(STATUS_EXIT_PENDING, &priv->status);
3373
ab53d8af 3374 iwl3945_led_unregister(priv);
bb8c093b 3375 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3376
3377 /* Unblock any waiting calls */
3378 wake_up_interruptible_all(&priv->wait_command_queue);
3379
b481de9c
ZY
3380 /* Wipe out the EXIT_PENDING status bit if we are not actually
3381 * exiting the module */
3382 if (!exit_pending)
3383 clear_bit(STATUS_EXIT_PENDING, &priv->status);
3384
3385 /* stop and reset the on-board processor */
5d49f498 3386 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
3387
3388 /* tell the device to stop sending interrupts */
0359facc 3389 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3390 iwl3945_disable_interrupts(priv);
0359facc
MA
3391 spin_unlock_irqrestore(&priv->lock, flags);
3392 iwl_synchronize_irq(priv);
b481de9c
ZY
3393
3394 if (priv->mac80211_registered)
3395 ieee80211_stop_queues(priv->hw);
3396
bb8c093b 3397 /* If we have not previously called iwl3945_init() then
b481de9c 3398 * clear all bits but the RF Kill and SUSPEND bits and return */
775a6e27 3399 if (!iwl_is_init(priv)) {
b481de9c
ZY
3400 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3401 STATUS_RF_KILL_HW |
3402 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3403 STATUS_RF_KILL_SW |
9788864e
RC
3404 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3405 STATUS_GEO_CONFIGURED |
b481de9c 3406 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
ebef2008
AK
3407 STATUS_IN_SUSPEND |
3408 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3409 STATUS_EXIT_PENDING;
b481de9c
ZY
3410 goto exit;
3411 }
3412
3413 /* ...otherwise clear out all the status bits but the RF Kill and
3414 * SUSPEND bits and continue taking the NIC down. */
3415 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3416 STATUS_RF_KILL_HW |
3417 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3418 STATUS_RF_KILL_SW |
9788864e
RC
3419 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3420 STATUS_GEO_CONFIGURED |
b481de9c
ZY
3421 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3422 STATUS_IN_SUSPEND |
3423 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
3424 STATUS_FW_ERROR |
3425 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3426 STATUS_EXIT_PENDING;
b481de9c 3427
e9414b6b 3428 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 3429 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3430 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
3431 spin_unlock_irqrestore(&priv->lock, flags);
3432
bb8c093b
CH
3433 iwl3945_hw_txq_ctx_stop(priv);
3434 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
3435
3436 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
3437 if (!iwl_grab_nic_access(priv)) {
3438 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 3439 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 3440 iwl_release_nic_access(priv);
b481de9c
ZY
3441 }
3442 spin_unlock_irqrestore(&priv->lock, flags);
3443
3444 udelay(5);
3445
e9414b6b
AM
3446 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
3447 priv->cfg->ops->lib->apm_ops.stop(priv);
3448 else
3449 priv->cfg->ops->lib->apm_ops.reset(priv);
3450
b481de9c 3451 exit:
3d24a9f7 3452 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
3453
3454 if (priv->ibss_beacon)
3455 dev_kfree_skb(priv->ibss_beacon);
3456 priv->ibss_beacon = NULL;
3457
3458 /* clear out any free frames */
bb8c093b 3459 iwl3945_clear_free_frames(priv);
b481de9c
ZY
3460}
3461
4a8a4322 3462static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3463{
3464 mutex_lock(&priv->mutex);
bb8c093b 3465 __iwl3945_down(priv);
b481de9c 3466 mutex_unlock(&priv->mutex);
b24d22b1 3467
bb8c093b 3468 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
3469}
3470
3471#define MAX_HW_RESTARTS 5
3472
4a8a4322 3473static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
3474{
3475 int rc, i;
3476
3477 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 3478 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
3479 return -EIO;
3480 }
3481
3482 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 3483 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 3484 "parameter)\n");
e655b9f0
ZY
3485 return -ENODEV;
3486 }
3487
e903fbd4 3488 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 3489 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
3490 return -EIO;
3491 }
3492
e655b9f0 3493 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 3494 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
3495 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3496 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3497 else {
3498 set_bit(STATUS_RF_KILL_HW, &priv->status);
3499 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
39aadf8c 3500 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
e655b9f0
ZY
3501 return -ENODEV;
3502 }
b481de9c 3503 }
80fcc9e2 3504
5d49f498 3505 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 3506
bb8c093b 3507 rc = iwl3945_hw_nic_init(priv);
b481de9c 3508 if (rc) {
15b1687c 3509 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
3510 return rc;
3511 }
3512
3513 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
3514 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3515 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
3516 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3517
3518 /* clear (again), then enable host interrupts */
5d49f498 3519 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 3520 iwl3945_enable_interrupts(priv);
b481de9c
ZY
3521
3522 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
3523 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3524 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
3525
3526 /* Copy original ucode data image from disk into backup cache.
3527 * This will be used to initialize the on-board processor's
3528 * data SRAM for a clean start when the runtime program first loads. */
3529 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 3530 priv->ucode_data.len);
b481de9c 3531
e655b9f0
ZY
3532 /* We return success when we resume from suspend and rf_kill is on. */
3533 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
3534 return 0;
3535
b481de9c
ZY
3536 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3537
bb8c093b 3538 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3539
3540 /* load bootstrap state machine,
3541 * load bootstrap program into processor's memory,
3542 * prepare to load the "initialize" uCode */
0164b9b4 3543 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
3544
3545 if (rc) {
15b1687c
WT
3546 IWL_ERR(priv,
3547 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
3548 continue;
3549 }
3550
3551 /* start card; "initialize" will load runtime ucode */
bb8c093b 3552 iwl3945_nic_start(priv);
b481de9c 3553
e1623446 3554 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
3555
3556 return 0;
3557 }
3558
3559 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 3560 __iwl3945_down(priv);
ebef2008 3561 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
3562
3563 /* tried to restart and config the device for as long as our
3564 * patience could withstand */
15b1687c 3565 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
3566 return -EIO;
3567}
3568
3569
3570/*****************************************************************************
3571 *
3572 * Workqueue callbacks
3573 *
3574 *****************************************************************************/
3575
bb8c093b 3576static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 3577{
4a8a4322
AK
3578 struct iwl_priv *priv =
3579 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
3580
3581 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3582 return;
3583
3584 mutex_lock(&priv->mutex);
bb8c093b 3585 iwl3945_init_alive_start(priv);
b481de9c
ZY
3586 mutex_unlock(&priv->mutex);
3587}
3588
bb8c093b 3589static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 3590{
4a8a4322
AK
3591 struct iwl_priv *priv =
3592 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
3593
3594 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3595 return;
3596
3597 mutex_lock(&priv->mutex);
bb8c093b 3598 iwl3945_alive_start(priv);
b481de9c
ZY
3599 mutex_unlock(&priv->mutex);
3600}
3601
2663516d
HS
3602static void iwl3945_rfkill_poll(struct work_struct *data)
3603{
3604 struct iwl_priv *priv =
3605 container_of(data, struct iwl_priv, rfkill_poll.work);
3606 unsigned long status = priv->status;
3607
3608 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3609 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3610 else
3611 set_bit(STATUS_RF_KILL_HW, &priv->status);
3612
3613 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
3614 queue_work(priv->workqueue, &priv->rf_kill);
3615
3616 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3617 round_jiffies_relative(2 * HZ));
3618
3619}
3620
b481de9c 3621#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 3622static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 3623{
4a8a4322
AK
3624 struct iwl_priv *priv =
3625 container_of(data, struct iwl_priv, request_scan);
c2d79b48 3626 struct iwl_host_cmd cmd = {
b481de9c 3627 .id = REPLY_SCAN_CMD,
bb8c093b 3628 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
3629 .meta.flags = CMD_SIZE_HUGE,
3630 };
3631 int rc = 0;
bb8c093b 3632 struct iwl3945_scan_cmd *scan;
b481de9c 3633 struct ieee80211_conf *conf = NULL;
f9340520 3634 u8 n_probes = 2;
8318d78a 3635 enum ieee80211_band band;
9387b7ca 3636 DECLARE_SSID_BUF(ssid);
b481de9c
ZY
3637
3638 conf = ieee80211_get_hw_conf(priv->hw);
3639
3640 mutex_lock(&priv->mutex);
3641
775a6e27 3642 if (!iwl_is_ready(priv)) {
39aadf8c 3643 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
3644 goto done;
3645 }
3646
a96a27f9 3647 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
3648 * was given the chance to run... */
3649 if (!test_bit(STATUS_SCANNING, &priv->status))
3650 goto done;
3651
3652 /* This should never be called or scheduled if there is currently
3653 * a scan active in the hardware. */
3654 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
3655 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
3656 "Ignoring second request.\n");
b481de9c
ZY
3657 rc = -EIO;
3658 goto done;
3659 }
3660
3661 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 3662 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
3663 goto done;
3664 }
3665
3666 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
3667 IWL_DEBUG_HC(priv,
3668 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
3669 goto done;
3670 }
3671
775a6e27 3672 if (iwl_is_rfkill(priv)) {
e1623446 3673 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
3674 goto done;
3675 }
3676
3677 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
3678 IWL_DEBUG_HC(priv,
3679 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
3680 goto done;
3681 }
3682
3683 if (!priv->scan_bands) {
e1623446 3684 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
3685 goto done;
3686 }
3687
805cee5b
WT
3688 if (!priv->scan) {
3689 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3690 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3691 if (!priv->scan) {
b481de9c
ZY
3692 rc = -ENOMEM;
3693 goto done;
3694 }
3695 }
805cee5b 3696 scan = priv->scan;
bb8c093b 3697 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3698
3699 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3700 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3701
8ccde88a 3702 if (iwl_is_associated(priv)) {
b481de9c
ZY
3703 u16 interval = 0;
3704 u32 extra;
3705 u32 suspend_time = 100;
3706 u32 scan_suspend_time = 100;
3707 unsigned long flags;
3708
e1623446 3709 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
3710
3711 spin_lock_irqsave(&priv->lock, flags);
3712 interval = priv->beacon_int;
3713 spin_unlock_irqrestore(&priv->lock, flags);
3714
3715 scan->suspend_time = 0;
15e869d8 3716 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3717 if (!interval)
3718 interval = suspend_time;
3719 /*
3720 * suspend time format:
3721 * 0-19: beacon interval in usec (time before exec.)
3722 * 20-23: 0
3723 * 24-31: number of beacons (suspend between channels)
3724 */
3725
3726 extra = (suspend_time / interval) << 24;
3727 scan_suspend_time = 0xFF0FFFFF &
3728 (extra | ((suspend_time % interval) * 1024));
3729
3730 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 3731 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
3732 scan_suspend_time, interval);
3733 }
3734
3735 /* We should add the ability for user to lock to PASSIVE ONLY */
3736 if (priv->one_direct_scan) {
e1623446
TW
3737 IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
3738 print_ssid(ssid, priv->direct_ssid,
9387b7ca 3739 priv->direct_ssid_len));
b481de9c
ZY
3740 scan->direct_scan[0].id = WLAN_EID_SSID;
3741 scan->direct_scan[0].len = priv->direct_ssid_len;
3742 memcpy(scan->direct_scan[0].ssid,
3743 priv->direct_ssid, priv->direct_ssid_len);
f9340520 3744 n_probes++;
f9340520 3745 } else
e1623446 3746 IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
b481de9c
ZY
3747
3748 /* We don't build a direct scan probe request; the uCode will do
3749 * that based on the direct_mask added to each channel entry */
b481de9c 3750 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3751 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3752 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3753
3754 /* flags + rate selection */
3755
66b5004d 3756 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3757 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3758 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3759 scan->good_CRC_th = 0;
8318d78a 3760 band = IEEE80211_BAND_2GHZ;
66b5004d 3761 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3762 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3763 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3764 band = IEEE80211_BAND_5GHZ;
66b5004d 3765 } else {
39aadf8c 3766 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3767 goto done;
3768 }
3769
77fecfb8
SO
3770 scan->tx_cmd.len = cpu_to_le16(
3771 iwl_fill_probe_req(priv, band,
3772 (struct ieee80211_mgmt *)scan->data,
3773 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3774
b481de9c
ZY
3775 /* select Rx antennas */
3776 scan->flags |= iwl3945_get_antenna_flags(priv);
3777
05c914fe 3778 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3779 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3780
f9340520
AK
3781 scan->channel_count =
3782 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
3783 n_probes,
3784 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3785
14b54336 3786 if (scan->channel_count == 0) {
e1623446 3787 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
3788 goto done;
3789 }
3790
b481de9c 3791 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3792 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3793 cmd.data = scan;
3794 scan->len = cpu_to_le16(cmd.len);
3795
3796 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3797 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3798 if (rc)
3799 goto done;
3800
3801 queue_delayed_work(priv->workqueue, &priv->scan_check,
3802 IWL_SCAN_CHECK_WATCHDOG);
3803
3804 mutex_unlock(&priv->mutex);
3805 return;
3806
3807 done:
2420ebc1
MA
3808 /* can not perform scan make sure we clear scanning
3809 * bits from status so next scan request can be performed.
3810 * if we dont clear scanning status bit here all next scan
3811 * will fail
3812 */
3813 clear_bit(STATUS_SCAN_HW, &priv->status);
3814 clear_bit(STATUS_SCANNING, &priv->status);
3815
01ebd063 3816 /* inform mac80211 scan aborted */
b481de9c
ZY
3817 queue_work(priv->workqueue, &priv->scan_completed);
3818 mutex_unlock(&priv->mutex);
3819}
3820
bb8c093b 3821static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3822{
4a8a4322 3823 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3824
3825 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3826 return;
3827
3828 mutex_lock(&priv->mutex);
bb8c093b 3829 __iwl3945_up(priv);
b481de9c 3830 mutex_unlock(&priv->mutex);
c0af96a6 3831 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3832}
3833
bb8c093b 3834static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3835{
4a8a4322 3836 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3837
3838 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3839 return;
3840
bb8c093b 3841 iwl3945_down(priv);
b481de9c
ZY
3842 queue_work(priv->workqueue, &priv->up);
3843}
3844
bb8c093b 3845static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3846{
4a8a4322
AK
3847 struct iwl_priv *priv =
3848 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3849
3850 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3851 return;
3852
3853 mutex_lock(&priv->mutex);
bb8c093b 3854 iwl3945_rx_replenish(priv);
b481de9c
ZY
3855 mutex_unlock(&priv->mutex);
3856}
3857
7878a5a4
MA
3858#define IWL_DELAY_NEXT_SCAN (HZ*2)
3859
4a8a4322 3860static void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 3861{
b481de9c
ZY
3862 int rc = 0;
3863 struct ieee80211_conf *conf = NULL;
3864
05c914fe 3865 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 3866 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
3867 return;
3868 }
3869
3870
e1623446 3871 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 3872 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
3873
3874 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3875 return;
3876
322a9811 3877 if (!priv->vif || !priv->is_open)
6ef89d0a 3878 return;
322a9811 3879
af0053d6 3880 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3881
b481de9c
ZY
3882 conf = ieee80211_get_hw_conf(priv->hw);
3883
8ccde88a 3884 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3885 iwl3945_commit_rxon(priv);
b481de9c 3886
28afaf91 3887 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3888 iwl3945_setup_rxon_timing(priv);
518099a8 3889 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3890 sizeof(priv->rxon_timing), &priv->rxon_timing);
3891 if (rc)
39aadf8c 3892 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3893 "Attempting to continue.\n");
3894
8ccde88a 3895 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3896
8ccde88a 3897 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3898
e1623446 3899 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3900 priv->assoc_id, priv->beacon_int);
3901
3902 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3903 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3904 else
8ccde88a 3905 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3906
8ccde88a 3907 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3908 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3909 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3910 else
8ccde88a 3911 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3912
05c914fe 3913 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3914 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3915
3916 }
3917
bb8c093b 3918 iwl3945_commit_rxon(priv);
b481de9c
ZY
3919
3920 switch (priv->iw_mode) {
05c914fe 3921 case NL80211_IFTYPE_STATION:
bb8c093b 3922 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3923 break;
3924
05c914fe 3925 case NL80211_IFTYPE_ADHOC:
b481de9c 3926
ce546fd2 3927 priv->assoc_id = 1;
bb8c093b 3928 iwl3945_add_station(priv, priv->bssid, 0, 0);
b481de9c 3929 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3930 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3931 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3932 CMD_ASYNC);
bb8c093b
CH
3933 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3934 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3935
3936 break;
3937
3938 default:
15b1687c 3939 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3940 __func__, priv->iw_mode);
b481de9c
ZY
3941 break;
3942 }
3943
bb8c093b 3944 iwl3945_activate_qos(priv, 0);
292ae174 3945
7878a5a4
MA
3946 /* we have just associated, don't start scan too early */
3947 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3948}
3949
e8975581 3950static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
76bb77e0 3951
b481de9c
ZY
3952/*****************************************************************************
3953 *
3954 * mac80211 entry point functions
3955 *
3956 *****************************************************************************/
3957
5a66926a
ZY
3958#define UCODE_READY_TIMEOUT (2 * HZ)
3959
bb8c093b 3960static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3961{
4a8a4322 3962 struct iwl_priv *priv = hw->priv;
5a66926a 3963 int ret;
b481de9c 3964
e1623446 3965 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3966
3967 /* we should be verifying the device is ready to be opened */
3968 mutex_lock(&priv->mutex);
3969
8ccde88a 3970 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
3971 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3972 * ucode filename and max sizes are card-specific. */
3973
3974 if (!priv->ucode_code.len) {
3975 ret = iwl3945_read_ucode(priv);
3976 if (ret) {
15b1687c 3977 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3978 mutex_unlock(&priv->mutex);
3979 goto out_release_irq;
3980 }
3981 }
b481de9c 3982
e655b9f0 3983 ret = __iwl3945_up(priv);
b481de9c
ZY
3984
3985 mutex_unlock(&priv->mutex);
5a66926a 3986
c0af96a6 3987 iwl_rfkill_set_hw_state(priv);
80fcc9e2 3988
e655b9f0
ZY
3989 if (ret)
3990 goto out_release_irq;
3991
e1623446 3992 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0
ZY
3993
3994 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
3995 return 0;
3996
5a66926a
ZY
3997 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3998 * mac80211 will not be run successfully. */
3999 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
4000 test_bit(STATUS_READY, &priv->status),
4001 UCODE_READY_TIMEOUT);
4002 if (!ret) {
4003 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
4004 IWL_ERR(priv,
4005 "Wait for START_ALIVE timeout after %dms.\n",
4006 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
4007 ret = -ETIMEDOUT;
4008 goto out_release_irq;
4009 }
4010 }
4011
2663516d
HS
4012 /* ucode is running and will send rfkill notifications,
4013 * no need to poll the killswitch state anymore */
4014 cancel_delayed_work(&priv->rfkill_poll);
4015
e655b9f0 4016 priv->is_open = 1;
e1623446 4017 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 4018 return 0;
5a66926a
ZY
4019
4020out_release_irq:
e655b9f0 4021 priv->is_open = 0;
e1623446 4022 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 4023 return ret;
b481de9c
ZY
4024}
4025
bb8c093b 4026static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 4027{
4a8a4322 4028 struct iwl_priv *priv = hw->priv;
b481de9c 4029
e1623446 4030 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 4031
e655b9f0 4032 if (!priv->is_open) {
e1623446 4033 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
4034 return;
4035 }
4036
b481de9c 4037 priv->is_open = 0;
5a66926a 4038
775a6e27 4039 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
4040 /* stop mac, cancel any scan request and clear
4041 * RXON_FILTER_ASSOC_MSK BIT
4042 */
5a66926a 4043 mutex_lock(&priv->mutex);
af0053d6 4044 iwl_scan_cancel_timeout(priv, 100);
fde3571f 4045 mutex_unlock(&priv->mutex);
fde3571f
MA
4046 }
4047
5a66926a
ZY
4048 iwl3945_down(priv);
4049
4050 flush_workqueue(priv->workqueue);
2663516d
HS
4051
4052 /* start polling the killswitch state again */
4053 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4054 round_jiffies_relative(2 * HZ));
6ef89d0a 4055
e1623446 4056 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4057}
4058
e039fa4a 4059static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4060{
4a8a4322 4061 struct iwl_priv *priv = hw->priv;
b481de9c 4062
e1623446 4063 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4064
e1623446 4065 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 4066 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 4067
e039fa4a 4068 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
4069 dev_kfree_skb_any(skb);
4070
e1623446 4071 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 4072 return NETDEV_TX_OK;
b481de9c
ZY
4073}
4074
bb8c093b 4075static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
4076 struct ieee80211_if_init_conf *conf)
4077{
4a8a4322 4078 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4079 unsigned long flags;
4080
e1623446 4081 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 4082
32bfd35d 4083 if (priv->vif) {
e1623446 4084 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
864792e3 4085 return -EOPNOTSUPP;
b481de9c
ZY
4086 }
4087
4088 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 4089 priv->vif = conf->vif;
60294de3 4090 priv->iw_mode = conf->type;
b481de9c
ZY
4091
4092 spin_unlock_irqrestore(&priv->lock, flags);
4093
4094 mutex_lock(&priv->mutex);
864792e3
TW
4095
4096 if (conf->mac_addr) {
e1623446 4097 IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
864792e3
TW
4098 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
4099 }
4100
775a6e27 4101 if (iwl_is_ready(priv))
5a66926a 4102 iwl3945_set_mode(priv, conf->type);
b481de9c 4103
b481de9c
ZY
4104 mutex_unlock(&priv->mutex);
4105
e1623446 4106 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4107 return 0;
4108}
4109
4110/**
bb8c093b 4111 * iwl3945_mac_config - mac80211 config callback
b481de9c
ZY
4112 *
4113 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
4114 * be set inappropriately and the driver currently sets the hardware up to
4115 * use it whenever needed.
4116 */
e8975581 4117static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 4118{
4a8a4322 4119 struct iwl_priv *priv = hw->priv;
d20b3c65 4120 const struct iwl_channel_info *ch_info;
e8975581 4121 struct ieee80211_conf *conf = &hw->conf;
b481de9c 4122 unsigned long flags;
76bb77e0 4123 int ret = 0;
b481de9c
ZY
4124
4125 mutex_lock(&priv->mutex);
e1623446
TW
4126 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
4127 conf->channel->hw_value);
b481de9c 4128
775a6e27 4129 if (!iwl_is_ready(priv)) {
e1623446 4130 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY
4131 ret = -EIO;
4132 goto out;
b481de9c
ZY
4133 }
4134
df878d8f 4135 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
b481de9c 4136 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 4137 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
a0646470 4138 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 4139 mutex_unlock(&priv->mutex);
a0646470 4140 return 0;
b481de9c
ZY
4141 }
4142
4143 spin_lock_irqsave(&priv->lock, flags);
4144
e6148917
SO
4145 ch_info = iwl_get_channel_info(priv, conf->channel->band,
4146 conf->channel->hw_value);
b481de9c 4147 if (!is_channel_valid(ch_info)) {
e1623446
TW
4148 IWL_DEBUG_SCAN(priv,
4149 "Channel %d [%d] is INVALID for this band.\n",
4150 conf->channel->hw_value, conf->channel->band);
4151 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
b481de9c 4152 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
4153 ret = -EINVAL;
4154 goto out;
b481de9c
ZY
4155 }
4156
8ccde88a 4157 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 4158
8ccde88a 4159 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
4160
4161 /* The list of supported rates and rate mask can be different
4162 * for each phymode; since the phymode may have changed, reset
4163 * the rate mask to what mac80211 lists */
8ccde88a 4164 iwl_set_rate(priv);
b481de9c
ZY
4165
4166 spin_unlock_irqrestore(&priv->lock, flags);
4167
4168#ifdef IEEE80211_CONF_CHANNEL_SWITCH
4169 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 4170 iwl3945_hw_channel_switch(priv, conf->channel);
76bb77e0 4171 goto out;
b481de9c
ZY
4172 }
4173#endif
4174
bb8c093b 4175 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
4176
4177 if (!conf->radio_enabled) {
e1623446 4178 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
76bb77e0 4179 goto out;
b481de9c
ZY
4180 }
4181
775a6e27 4182 if (iwl_is_rfkill(priv)) {
e1623446 4183 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY
4184 ret = -EIO;
4185 goto out;
b481de9c
ZY
4186 }
4187
8ccde88a 4188 iwl_set_rate(priv);
b481de9c 4189
8ccde88a
SO
4190 if (memcmp(&priv->active_rxon,
4191 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 4192 iwl3945_commit_rxon(priv);
b481de9c 4193 else
e1623446 4194 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
b481de9c 4195
e1623446 4196 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 4197
76bb77e0 4198out:
a0646470 4199 clear_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 4200 mutex_unlock(&priv->mutex);
76bb77e0 4201 return ret;
b481de9c
ZY
4202}
4203
4a8a4322 4204static void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
4205{
4206 int rc = 0;
4207
d986bcd1 4208 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
4209 return;
4210
4211 /* The following should be done only at AP bring up */
8ccde88a 4212 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
4213
4214 /* RXON - unassoc (to set timing command) */
8ccde88a 4215 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4216 iwl3945_commit_rxon(priv);
b481de9c
ZY
4217
4218 /* RXON Timing */
28afaf91 4219 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 4220 iwl3945_setup_rxon_timing(priv);
518099a8
SO
4221 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
4222 sizeof(priv->rxon_timing),
4223 &priv->rxon_timing);
b481de9c 4224 if (rc)
39aadf8c 4225 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
4226 "Attempting to continue.\n");
4227
4228 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 4229 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 4230 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 4231 priv->staging_rxon.flags |=
b481de9c
ZY
4232 RXON_FLG_SHORT_PREAMBLE_MSK;
4233 else
8ccde88a 4234 priv->staging_rxon.flags &=
b481de9c
ZY
4235 ~RXON_FLG_SHORT_PREAMBLE_MSK;
4236
8ccde88a 4237 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
4238 if (priv->assoc_capability &
4239 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 4240 priv->staging_rxon.flags |=
b481de9c
ZY
4241 RXON_FLG_SHORT_SLOT_MSK;
4242 else
8ccde88a 4243 priv->staging_rxon.flags &=
b481de9c
ZY
4244 ~RXON_FLG_SHORT_SLOT_MSK;
4245
05c914fe 4246 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 4247 priv->staging_rxon.flags &=
b481de9c
ZY
4248 ~RXON_FLG_SHORT_SLOT_MSK;
4249 }
4250 /* restore RXON assoc */
8ccde88a 4251 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 4252 iwl3945_commit_rxon(priv);
b5323d36 4253 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
556f8db7 4254 }
bb8c093b 4255 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
4256
4257 /* FIXME - we need to add code here to detect a totally new
4258 * configuration, reset the AP, unassoc, rxon timing, assoc,
4259 * clear sta table, add BCAST sta... */
4260}
4261
32bfd35d
JB
4262static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
4263 struct ieee80211_vif *vif,
4a8a4322 4264 struct ieee80211_if_conf *conf)
b481de9c 4265{
4a8a4322 4266 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4267 int rc;
4268
4269 if (conf == NULL)
4270 return -EIO;
4271
b716bb91 4272 if (priv->vif != vif) {
e1623446 4273 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG
4274 return 0;
4275 }
4276
9d139c81 4277 /* handle this temporarily here */
05c914fe 4278 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
4279 conf->changed & IEEE80211_IFCC_BEACON) {
4280 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
4281 if (!beacon)
4282 return -ENOMEM;
9bdf5eca 4283 mutex_lock(&priv->mutex);
9d139c81 4284 rc = iwl3945_mac_beacon_update(hw, beacon);
9bdf5eca 4285 mutex_unlock(&priv->mutex);
9d139c81
JB
4286 if (rc)
4287 return rc;
4288 }
4289
775a6e27 4290 if (!iwl_is_alive(priv))
5a66926a
ZY
4291 return -EAGAIN;
4292
b481de9c
ZY
4293 mutex_lock(&priv->mutex);
4294
b481de9c 4295 if (conf->bssid)
e1623446 4296 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 4297
4150c572
JB
4298/*
4299 * very dubious code was here; the probe filtering flag is never set:
4300 *
b481de9c
ZY
4301 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
4302 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 4303 */
b481de9c 4304
05c914fe 4305 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
4306 if (!conf->bssid) {
4307 conf->bssid = priv->mac_addr;
4308 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 4309 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 4310 conf->bssid);
b481de9c
ZY
4311 }
4312 if (priv->ibss_beacon)
4313 dev_kfree_skb(priv->ibss_beacon);
4314
9d139c81 4315 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
4316 }
4317
775a6e27 4318 if (iwl_is_rfkill(priv))
fde3571f
MA
4319 goto done;
4320
b481de9c
ZY
4321 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
4322 !is_multicast_ether_addr(conf->bssid)) {
4323 /* If there is currently a HW scan going on in the background
4324 * then we need to cancel it else the RXON below will fail. */
af0053d6 4325 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 4326 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 4327 "after 100ms\n");
e1623446 4328 IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
b481de9c
ZY
4329 mutex_unlock(&priv->mutex);
4330 return -EAGAIN;
4331 }
8ccde88a 4332 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
b481de9c
ZY
4333
4334 /* TODO: Audit driver for usage of these members and see
4335 * if mac80211 deprecates them (priv->bssid looks like it
4336 * shouldn't be there, but I haven't scanned the IBSS code
4337 * to verify) - jpk */
4338 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
4339
05c914fe 4340 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4341 iwl3945_config_ap(priv);
b481de9c 4342 else {
bb8c093b 4343 rc = iwl3945_commit_rxon(priv);
05c914fe 4344 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
bb8c093b 4345 iwl3945_add_station(priv,
8ccde88a 4346 priv->active_rxon.bssid_addr, 1, 0);
b481de9c
ZY
4347 }
4348
4349 } else {
af0053d6 4350 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4351 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4352 iwl3945_commit_rxon(priv);
b481de9c
ZY
4353 }
4354
fde3571f 4355 done:
e1623446 4356 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4357 mutex_unlock(&priv->mutex);
4358
4359 return 0;
4360}
4361
bb8c093b 4362static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
4363 struct ieee80211_if_init_conf *conf)
4364{
4a8a4322 4365 struct iwl_priv *priv = hw->priv;
b481de9c 4366
e1623446 4367 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
4368
4369 mutex_lock(&priv->mutex);
6ef89d0a 4370
775a6e27 4371 if (iwl_is_ready_rf(priv)) {
af0053d6 4372 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4373 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
fde3571f
MA
4374 iwl3945_commit_rxon(priv);
4375 }
32bfd35d
JB
4376 if (priv->vif == conf->vif) {
4377 priv->vif = NULL;
b481de9c 4378 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
4379 }
4380 mutex_unlock(&priv->mutex);
4381
e1623446 4382 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4383}
4384
cd56d331
AK
4385#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
4386
4387static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
4388 struct ieee80211_vif *vif,
4389 struct ieee80211_bss_conf *bss_conf,
4390 u32 changes)
4391{
4a8a4322 4392 struct iwl_priv *priv = hw->priv;
cd56d331 4393
e1623446 4394 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
cd56d331
AK
4395
4396 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 4397 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
cd56d331
AK
4398 bss_conf->use_short_preamble);
4399 if (bss_conf->use_short_preamble)
8ccde88a 4400 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331 4401 else
8ccde88a
SO
4402 priv->staging_rxon.flags &=
4403 ~RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331
AK
4404 }
4405
4406 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446
TW
4407 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n",
4408 bss_conf->use_cts_prot);
cd56d331 4409 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
8ccde88a 4410 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
cd56d331 4411 else
8ccde88a 4412 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
cd56d331
AK
4413 }
4414
4415 if (changes & BSS_CHANGED_ASSOC) {
e1623446 4416 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
cd56d331
AK
4417 /* This should never happen as this function should
4418 * never be called from interrupt context. */
4419 if (WARN_ON_ONCE(in_interrupt()))
4420 return;
4421 if (bss_conf->assoc) {
4422 priv->assoc_id = bss_conf->aid;
4423 priv->beacon_int = bss_conf->beacon_int;
28afaf91 4424 priv->timestamp = bss_conf->timestamp;
cd56d331 4425 priv->assoc_capability = bss_conf->assoc_capability;
3dae0c42 4426 priv->power_data.dtim_period = bss_conf->dtim_period;
cd56d331
AK
4427 priv->next_scan_jiffies = jiffies +
4428 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4429 mutex_lock(&priv->mutex);
4430 iwl3945_post_associate(priv);
4431 mutex_unlock(&priv->mutex);
4432 } else {
4433 priv->assoc_id = 0;
e1623446
TW
4434 IWL_DEBUG_MAC80211(priv,
4435 "DISASSOC %d\n", bss_conf->assoc);
cd56d331 4436 }
8ccde88a 4437 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446
TW
4438 IWL_DEBUG_MAC80211(priv,
4439 "Associated Changes %d\n", changes);
cd56d331
AK
4440 iwl3945_send_rxon_assoc(priv);
4441 }
4442
4443}
4444
bb8c093b 4445static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
4446{
4447 int rc = 0;
4448 unsigned long flags;
4a8a4322 4449 struct iwl_priv *priv = hw->priv;
9387b7ca 4450 DECLARE_SSID_BUF(ssid_buf);
b481de9c 4451
e1623446 4452 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4453
15e869d8 4454 mutex_lock(&priv->mutex);
b481de9c
ZY
4455 spin_lock_irqsave(&priv->lock, flags);
4456
775a6e27 4457 if (!iwl_is_ready_rf(priv)) {
b481de9c 4458 rc = -EIO;
e1623446 4459 IWL_DEBUG_MAC80211(priv, "leave - not ready or exit pending\n");
b481de9c
ZY
4460 goto out_unlock;
4461 }
4462
7878a5a4
MA
4463 /* we don't schedule scan within next_scan_jiffies period */
4464 if (priv->next_scan_jiffies &&
4465 time_after(priv->next_scan_jiffies, jiffies)) {
4466 rc = -EAGAIN;
4467 goto out_unlock;
4468 }
15dbf1b7
BM
4469 /* if we just finished scan ask for delay for a broadcast scan */
4470 if ((len == 0) && priv->last_scan_jiffies &&
4471 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
4472 jiffies)) {
b481de9c
ZY
4473 rc = -EAGAIN;
4474 goto out_unlock;
4475 }
4476 if (len) {
e1623446
TW
4477 IWL_DEBUG_SCAN(priv, "direct scan for %s [%zd]\n ",
4478 print_ssid(ssid_buf, ssid, len), len);
b481de9c
ZY
4479
4480 priv->one_direct_scan = 1;
4481 priv->direct_ssid_len = (u8)
4482 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
4483 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6ef89d0a
MA
4484 } else
4485 priv->one_direct_scan = 0;
b481de9c 4486
bb8c093b 4487 rc = iwl3945_scan_initiate(priv);
b481de9c 4488
e1623446 4489 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4490
4491out_unlock:
4492 spin_unlock_irqrestore(&priv->lock, flags);
15e869d8 4493 mutex_unlock(&priv->mutex);
b481de9c
ZY
4494
4495 return rc;
4496}
4497
bb8c093b 4498static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
4499 struct ieee80211_vif *vif,
4500 struct ieee80211_sta *sta,
4501 struct ieee80211_key_conf *key)
b481de9c 4502{
4a8a4322 4503 struct iwl_priv *priv = hw->priv;
dc822b5d 4504 const u8 *addr;
42986796 4505 int ret;
b481de9c
ZY
4506 u8 sta_id;
4507
e1623446 4508 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4509
df878d8f 4510 if (iwl3945_mod_params.sw_crypto) {
e1623446 4511 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
4512 return -EOPNOTSUPP;
4513 }
4514
42986796 4515 addr = sta ? sta->addr : iwl_bcast_addr;
bb8c093b 4516 sta_id = iwl3945_hw_find_station(priv, addr);
b481de9c 4517 if (sta_id == IWL_INVALID_STATION) {
e1623446 4518 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
e174961c 4519 addr);
b481de9c
ZY
4520 return -EINVAL;
4521 }
4522
4523 mutex_lock(&priv->mutex);
4524
af0053d6 4525 iwl_scan_cancel_timeout(priv, 100);
15e869d8 4526
b481de9c
ZY
4527 switch (cmd) {
4528 case SET_KEY:
42986796
WT
4529 ret = iwl3945_update_sta_key_info(priv, key, sta_id);
4530 if (!ret) {
8ccde88a 4531 iwl_set_rxon_hwcrypto(priv, 1);
bb8c093b 4532 iwl3945_commit_rxon(priv);
b481de9c 4533 key->hw_key_idx = sta_id;
e1623446
TW
4534 IWL_DEBUG_MAC80211(priv,
4535 "set_key success, using hwcrypto\n");
b481de9c
ZY
4536 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4537 }
4538 break;
4539 case DISABLE_KEY:
42986796
WT
4540 ret = iwl3945_clear_sta_key_info(priv, sta_id);
4541 if (!ret) {
8ccde88a 4542 iwl_set_rxon_hwcrypto(priv, 0);
bb8c093b 4543 iwl3945_commit_rxon(priv);
e1623446 4544 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
4545 }
4546 break;
4547 default:
42986796 4548 ret = -EINVAL;
b481de9c
ZY
4549 }
4550
e1623446 4551 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4552 mutex_unlock(&priv->mutex);
4553
42986796 4554 return ret;
b481de9c
ZY
4555}
4556
e100bb64 4557static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
4558 const struct ieee80211_tx_queue_params *params)
4559{
4a8a4322 4560 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4561 unsigned long flags;
4562 int q;
b481de9c 4563
e1623446 4564 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4565
775a6e27 4566 if (!iwl_is_ready_rf(priv)) {
e1623446 4567 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4568 return -EIO;
4569 }
4570
4571 if (queue >= AC_NUM) {
e1623446 4572 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY
4573 return 0;
4574 }
4575
b481de9c
ZY
4576 q = AC_NUM - 1 - queue;
4577
4578 spin_lock_irqsave(&priv->lock, flags);
4579
4580 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
4581 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
4582 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4583 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 4584 cpu_to_le16((params->txop * 32));
b481de9c
ZY
4585
4586 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4587 priv->qos_data.qos_active = 1;
4588
4589 spin_unlock_irqrestore(&priv->lock, flags);
4590
4591 mutex_lock(&priv->mutex);
05c914fe 4592 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4593 iwl3945_activate_qos(priv, 1);
8ccde88a 4594 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 4595 iwl3945_activate_qos(priv, 0);
b481de9c
ZY
4596
4597 mutex_unlock(&priv->mutex);
4598
e1623446 4599 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4600 return 0;
4601}
4602
bb8c093b 4603static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
4604 struct ieee80211_tx_queue_stats *stats)
4605{
4a8a4322 4606 struct iwl_priv *priv = hw->priv;
b481de9c 4607 int i, avail;
188cf6c7 4608 struct iwl_tx_queue *txq;
d20b3c65 4609 struct iwl_queue *q;
b481de9c
ZY
4610 unsigned long flags;
4611
e1623446 4612 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4613
775a6e27 4614 if (!iwl_is_ready_rf(priv)) {
e1623446 4615 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4616 return -EIO;
4617 }
4618
4619 spin_lock_irqsave(&priv->lock, flags);
4620
4621 for (i = 0; i < AC_NUM; i++) {
188cf6c7 4622 txq = &priv->txq[i];
b481de9c 4623 q = &txq->q;
d20b3c65 4624 avail = iwl_queue_space(q);
b481de9c 4625
57ffc589
JB
4626 stats[i].len = q->n_window - avail;
4627 stats[i].limit = q->n_window - q->high_mark;
4628 stats[i].count = q->n_window;
b481de9c
ZY
4629
4630 }
4631 spin_unlock_irqrestore(&priv->lock, flags);
4632
e1623446 4633 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4634
4635 return 0;
4636}
4637
bb8c093b 4638static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 4639{
4a8a4322 4640 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4641 unsigned long flags;
4642
4643 mutex_lock(&priv->mutex);
e1623446 4644 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4645
775a6e27 4646 iwl_reset_qos(priv);
292ae174 4647
b481de9c
ZY
4648 spin_lock_irqsave(&priv->lock, flags);
4649 priv->assoc_id = 0;
4650 priv->assoc_capability = 0;
b481de9c
ZY
4651
4652 /* new association get rid of ibss beacon skb */
4653 if (priv->ibss_beacon)
4654 dev_kfree_skb(priv->ibss_beacon);
4655
4656 priv->ibss_beacon = NULL;
4657
4658 priv->beacon_int = priv->hw->conf.beacon_int;
28afaf91 4659 priv->timestamp = 0;
05c914fe 4660 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
4661 priv->beacon_int = 0;
4662
4663 spin_unlock_irqrestore(&priv->lock, flags);
4664
775a6e27 4665 if (!iwl_is_ready_rf(priv)) {
e1623446 4666 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA
4667 mutex_unlock(&priv->mutex);
4668 return;
4669 }
4670
15e869d8
MA
4671 /* we are restarting association process
4672 * clear RXON_FILTER_ASSOC_MSK bit
4673 */
05c914fe 4674 if (priv->iw_mode != NL80211_IFTYPE_AP) {
af0053d6 4675 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4676 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4677 iwl3945_commit_rxon(priv);
15e869d8
MA
4678 }
4679
b481de9c 4680 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 4681 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
15e869d8 4682
e1623446 4683 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY
4684 mutex_unlock(&priv->mutex);
4685 return;
b481de9c
ZY
4686 }
4687
8ccde88a 4688 iwl_set_rate(priv);
b481de9c
ZY
4689
4690 mutex_unlock(&priv->mutex);
4691
e1623446 4692 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4693
4694}
4695
e039fa4a 4696static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4697{
4a8a4322 4698 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4699 unsigned long flags;
4700
e1623446 4701 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4702
775a6e27 4703 if (!iwl_is_ready_rf(priv)) {
e1623446 4704 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4705 return -EIO;
4706 }
4707
05c914fe 4708 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 4709 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY
4710 return -EIO;
4711 }
4712
4713 spin_lock_irqsave(&priv->lock, flags);
4714
4715 if (priv->ibss_beacon)
4716 dev_kfree_skb(priv->ibss_beacon);
4717
4718 priv->ibss_beacon = skb;
4719
4720 priv->assoc_id = 0;
4721
e1623446 4722 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4723 spin_unlock_irqrestore(&priv->lock, flags);
4724
775a6e27 4725 iwl_reset_qos(priv);
b481de9c 4726
dc4b1e7d 4727 iwl3945_post_associate(priv);
b481de9c 4728
b481de9c
ZY
4729
4730 return 0;
4731}
4732
4733/*****************************************************************************
4734 *
4735 * sysfs attributes
4736 *
4737 *****************************************************************************/
4738
d08853a3 4739#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4740
4741/*
4742 * The following adds a new attribute to the sysfs representation
4743 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
4744 * used for controlling the debug level.
4745 *
4746 * See the level definitions in iwl for details.
4747 */
40b8ec0b
SO
4748static ssize_t show_debug_level(struct device *d,
4749 struct device_attribute *attr, char *buf)
b481de9c 4750{
4a8a4322 4751 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4752
4753 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 4754}
40b8ec0b
SO
4755static ssize_t store_debug_level(struct device *d,
4756 struct device_attribute *attr,
b481de9c
ZY
4757 const char *buf, size_t count)
4758{
4a8a4322 4759 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4760 unsigned long val;
4761 int ret;
b481de9c 4762
40b8ec0b
SO
4763 ret = strict_strtoul(buf, 0, &val);
4764 if (ret)
978785a3 4765 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 4766 else
40b8ec0b 4767 priv->debug_level = val;
b481de9c
ZY
4768
4769 return strnlen(buf, count);
4770}
4771
40b8ec0b
SO
4772static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
4773 show_debug_level, store_debug_level);
b481de9c 4774
d08853a3 4775#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 4776
b481de9c
ZY
4777static ssize_t show_temperature(struct device *d,
4778 struct device_attribute *attr, char *buf)
4779{
4a8a4322 4780 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4781
775a6e27 4782 if (!iwl_is_alive(priv))
b481de9c
ZY
4783 return -EAGAIN;
4784
bb8c093b 4785 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
4786}
4787
4788static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4789
b481de9c
ZY
4790static ssize_t show_tx_power(struct device *d,
4791 struct device_attribute *attr, char *buf)
4792{
4a8a4322 4793 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 4794 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
4795}
4796
4797static ssize_t store_tx_power(struct device *d,
4798 struct device_attribute *attr,
4799 const char *buf, size_t count)
4800{
4a8a4322 4801 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4802 char *p = (char *)buf;
4803 u32 val;
4804
4805 val = simple_strtoul(p, &p, 10);
4806 if (p == buf)
978785a3 4807 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 4808 else
bb8c093b 4809 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
4810
4811 return count;
4812}
4813
4814static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4815
4816static ssize_t show_flags(struct device *d,
4817 struct device_attribute *attr, char *buf)
4818{
4a8a4322 4819 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4820
8ccde88a 4821 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
4822}
4823
4824static ssize_t store_flags(struct device *d,
4825 struct device_attribute *attr,
4826 const char *buf, size_t count)
4827{
4a8a4322 4828 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4829 u32 flags = simple_strtoul(buf, NULL, 0);
4830
4831 mutex_lock(&priv->mutex);
8ccde88a 4832 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 4833 /* Cancel any currently running scans... */
af0053d6 4834 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4835 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4836 else {
e1623446 4837 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 4838 flags);
8ccde88a 4839 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 4840 iwl3945_commit_rxon(priv);
b481de9c
ZY
4841 }
4842 }
4843 mutex_unlock(&priv->mutex);
4844
4845 return count;
4846}
4847
4848static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4849
4850static ssize_t show_filter_flags(struct device *d,
4851 struct device_attribute *attr, char *buf)
4852{
4a8a4322 4853 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4854
4855 return sprintf(buf, "0x%04X\n",
8ccde88a 4856 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
4857}
4858
4859static ssize_t store_filter_flags(struct device *d,
4860 struct device_attribute *attr,
4861 const char *buf, size_t count)
4862{
4a8a4322 4863 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4864 u32 filter_flags = simple_strtoul(buf, NULL, 0);
4865
4866 mutex_lock(&priv->mutex);
8ccde88a 4867 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 4868 /* Cancel any currently running scans... */
af0053d6 4869 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4870 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4871 else {
e1623446 4872 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 4873 "0x%04X\n", filter_flags);
8ccde88a 4874 priv->staging_rxon.filter_flags =
b481de9c 4875 cpu_to_le32(filter_flags);
bb8c093b 4876 iwl3945_commit_rxon(priv);
b481de9c
ZY
4877 }
4878 }
4879 mutex_unlock(&priv->mutex);
4880
4881 return count;
4882}
4883
4884static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
4885 store_filter_flags);
4886
c8b0e6e1 4887#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4888
4889static ssize_t show_measurement(struct device *d,
4890 struct device_attribute *attr, char *buf)
4891{
4a8a4322 4892 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 4893 struct iwl_spectrum_notification measure_report;
b481de9c 4894 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 4895 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
4896 unsigned long flags;
4897
4898 spin_lock_irqsave(&priv->lock, flags);
4899 if (!(priv->measurement_status & MEASUREMENT_READY)) {
4900 spin_unlock_irqrestore(&priv->lock, flags);
4901 return 0;
4902 }
4903 memcpy(&measure_report, &priv->measure_report, size);
4904 priv->measurement_status = 0;
4905 spin_unlock_irqrestore(&priv->lock, flags);
4906
4907 while (size && (PAGE_SIZE - len)) {
4908 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4909 PAGE_SIZE - len, 1);
4910 len = strlen(buf);
4911 if (PAGE_SIZE - len)
4912 buf[len++] = '\n';
4913
4914 ofs += 16;
4915 size -= min(size, 16U);
4916 }
4917
4918 return len;
4919}
4920
4921static ssize_t store_measurement(struct device *d,
4922 struct device_attribute *attr,
4923 const char *buf, size_t count)
4924{
4a8a4322 4925 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4926 struct ieee80211_measurement_params params = {
8ccde88a 4927 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
4928 .start_time = cpu_to_le64(priv->last_tsf),
4929 .duration = cpu_to_le16(1),
4930 };
4931 u8 type = IWL_MEASURE_BASIC;
4932 u8 buffer[32];
4933 u8 channel;
4934
4935 if (count) {
4936 char *p = buffer;
4937 strncpy(buffer, buf, min(sizeof(buffer), count));
4938 channel = simple_strtoul(p, NULL, 0);
4939 if (channel)
4940 params.channel = channel;
4941
4942 p = buffer;
4943 while (*p && *p != ' ')
4944 p++;
4945 if (*p)
4946 type = simple_strtoul(p + 1, NULL, 0);
4947 }
4948
e1623446 4949 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 4950 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 4951 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
4952
4953 return count;
4954}
4955
4956static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
4957 show_measurement, store_measurement);
c8b0e6e1 4958#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 4959
b481de9c
ZY
4960static ssize_t store_retry_rate(struct device *d,
4961 struct device_attribute *attr,
4962 const char *buf, size_t count)
4963{
4a8a4322 4964 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4965
4966 priv->retry_rate = simple_strtoul(buf, NULL, 0);
4967 if (priv->retry_rate <= 0)
4968 priv->retry_rate = 1;
4969
4970 return count;
4971}
4972
4973static ssize_t show_retry_rate(struct device *d,
4974 struct device_attribute *attr, char *buf)
4975{
4a8a4322 4976 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4977 return sprintf(buf, "%d", priv->retry_rate);
4978}
4979
4980static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
4981 store_retry_rate);
4982
d25aabb0 4983
b481de9c
ZY
4984static ssize_t store_power_level(struct device *d,
4985 struct device_attribute *attr,
4986 const char *buf, size_t count)
4987{
4a8a4322 4988 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
4989 int ret;
4990 unsigned long mode;
4991
b481de9c 4992
b481de9c
ZY
4993 mutex_lock(&priv->mutex);
4994
775a6e27 4995 if (!iwl_is_ready(priv)) {
d25aabb0 4996 ret = -EAGAIN;
b481de9c
ZY
4997 goto out;
4998 }
4999
d25aabb0
WT
5000 ret = strict_strtoul(buf, 10, &mode);
5001 if (ret)
5002 goto out;
b481de9c 5003
d25aabb0
WT
5004 ret = iwl_power_set_user_mode(priv, mode);
5005 if (ret) {
5006 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
5007 goto out;
b481de9c 5008 }
d25aabb0 5009 ret = count;
b481de9c
ZY
5010
5011 out:
5012 mutex_unlock(&priv->mutex);
d25aabb0 5013 return ret;
b481de9c
ZY
5014}
5015
d25aabb0
WT
5016static ssize_t show_power_level(struct device *d,
5017 struct device_attribute *attr, char *buf)
5018{
5019 struct iwl_priv *priv = dev_get_drvdata(d);
5020 int mode = priv->power_data.user_power_setting;
5021 int system = priv->power_data.system_power_setting;
5022 int level = priv->power_data.power_mode;
5023 char *p = buf;
5024
5025 switch (system) {
5026 case IWL_POWER_SYS_AUTO:
5027 p += sprintf(p, "SYSTEM:auto");
5028 break;
5029 case IWL_POWER_SYS_AC:
5030 p += sprintf(p, "SYSTEM:ac");
5031 break;
5032 case IWL_POWER_SYS_BATTERY:
5033 p += sprintf(p, "SYSTEM:battery");
5034 break;
5035 }
5036
5037 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
5038 "fixed" : "auto");
5039 p += sprintf(p, "\tINDEX:%d", level);
5040 p += sprintf(p, "\n");
5041 return p - buf + 1;
5042}
5043
5044static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
5045 show_power_level, store_power_level);
5046
b481de9c
ZY
5047#define MAX_WX_STRING 80
5048
5049/* Values are in microsecond */
5050static const s32 timeout_duration[] = {
5051 350000,
5052 250000,
5053 75000,
5054 37000,
5055 25000,
5056};
5057static const s32 period_duration[] = {
5058 400000,
5059 700000,
5060 1000000,
5061 1000000,
5062 1000000
5063};
5064
b481de9c
ZY
5065static ssize_t show_channels(struct device *d,
5066 struct device_attribute *attr, char *buf)
5067{
8318d78a
JB
5068 /* all this shit doesn't belong into sysfs anyway */
5069 return 0;
b481de9c
ZY
5070}
5071
5072static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
5073
5074static ssize_t show_statistics(struct device *d,
5075 struct device_attribute *attr, char *buf)
5076{
4a8a4322 5077 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 5078 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 5079 u32 len = 0, ofs = 0;
f2c7e521 5080 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
5081 int rc = 0;
5082
775a6e27 5083 if (!iwl_is_alive(priv))
b481de9c
ZY
5084 return -EAGAIN;
5085
5086 mutex_lock(&priv->mutex);
17f841cd 5087 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
5088 mutex_unlock(&priv->mutex);
5089
5090 if (rc) {
5091 len = sprintf(buf,
5092 "Error sending statistics request: 0x%08X\n", rc);
5093 return len;
5094 }
5095
5096 while (size && (PAGE_SIZE - len)) {
5097 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
5098 PAGE_SIZE - len, 1);
5099 len = strlen(buf);
5100 if (PAGE_SIZE - len)
5101 buf[len++] = '\n';
5102
5103 ofs += 16;
5104 size -= min(size, 16U);
5105 }
5106
5107 return len;
5108}
5109
5110static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
5111
5112static ssize_t show_antenna(struct device *d,
5113 struct device_attribute *attr, char *buf)
5114{
4a8a4322 5115 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 5116
775a6e27 5117 if (!iwl_is_alive(priv))
b481de9c
ZY
5118 return -EAGAIN;
5119
7e4bca5e 5120 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
5121}
5122
5123static ssize_t store_antenna(struct device *d,
5124 struct device_attribute *attr,
5125 const char *buf, size_t count)
5126{
7530f85f 5127 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 5128 int ant;
b481de9c
ZY
5129
5130 if (count == 0)
5131 return 0;
5132
5133 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 5134 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
5135 return count;
5136 }
5137
5138 if ((ant >= 0) && (ant <= 2)) {
e1623446 5139 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 5140 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 5141 } else
e1623446 5142 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
5143
5144
5145 return count;
5146}
5147
5148static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
5149
5150static ssize_t show_status(struct device *d,
5151 struct device_attribute *attr, char *buf)
5152{
4a8a4322 5153 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 5154 if (!iwl_is_alive(priv))
b481de9c
ZY
5155 return -EAGAIN;
5156 return sprintf(buf, "0x%08x\n", (int)priv->status);
5157}
5158
5159static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
5160
5161static ssize_t dump_error_log(struct device *d,
5162 struct device_attribute *attr,
5163 const char *buf, size_t count)
5164{
5165 char *p = (char *)buf;
5166
5167 if (p[0] == '1')
4a8a4322 5168 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
5169
5170 return strnlen(buf, count);
5171}
5172
5173static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
5174
5175static ssize_t dump_event_log(struct device *d,
5176 struct device_attribute *attr,
5177 const char *buf, size_t count)
5178{
5179 char *p = (char *)buf;
5180
5181 if (p[0] == '1')
4a8a4322 5182 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
5183
5184 return strnlen(buf, count);
5185}
5186
5187static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
5188
5189/*****************************************************************************
5190 *
a96a27f9 5191 * driver setup and tear down
b481de9c
ZY
5192 *
5193 *****************************************************************************/
5194
4a8a4322 5195static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
5196{
5197 priv->workqueue = create_workqueue(DRV_NAME);
5198
5199 init_waitqueue_head(&priv->wait_command_queue);
5200
bb8c093b
CH
5201 INIT_WORK(&priv->up, iwl3945_bg_up);
5202 INIT_WORK(&priv->restart, iwl3945_bg_restart);
5203 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 5204 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 5205 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
5206 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
5207 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 5208 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
5209 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
5210 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
5211 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
5212 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
5213
5214 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
5215
5216 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 5217 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
5218}
5219
4a8a4322 5220static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 5221{
bb8c093b 5222 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 5223
e47eb6ad 5224 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
5225 cancel_delayed_work(&priv->scan_check);
5226 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
5227 cancel_work_sync(&priv->beacon_update);
5228}
5229
bb8c093b 5230static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
5231 &dev_attr_antenna.attr,
5232 &dev_attr_channels.attr,
5233 &dev_attr_dump_errors.attr,
5234 &dev_attr_dump_events.attr,
5235 &dev_attr_flags.attr,
5236 &dev_attr_filter_flags.attr,
c8b0e6e1 5237#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
5238 &dev_attr_measurement.attr,
5239#endif
5240 &dev_attr_power_level.attr,
b481de9c 5241 &dev_attr_retry_rate.attr,
b481de9c
ZY
5242 &dev_attr_statistics.attr,
5243 &dev_attr_status.attr,
5244 &dev_attr_temperature.attr,
b481de9c 5245 &dev_attr_tx_power.attr,
d08853a3 5246#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
5247 &dev_attr_debug_level.attr,
5248#endif
b481de9c
ZY
5249 NULL
5250};
5251
bb8c093b 5252static struct attribute_group iwl3945_attribute_group = {
b481de9c 5253 .name = NULL, /* put in device directory */
bb8c093b 5254 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
5255};
5256
bb8c093b
CH
5257static struct ieee80211_ops iwl3945_hw_ops = {
5258 .tx = iwl3945_mac_tx,
5259 .start = iwl3945_mac_start,
5260 .stop = iwl3945_mac_stop,
5261 .add_interface = iwl3945_mac_add_interface,
5262 .remove_interface = iwl3945_mac_remove_interface,
5263 .config = iwl3945_mac_config,
5264 .config_interface = iwl3945_mac_config_interface,
8ccde88a 5265 .configure_filter = iwl_configure_filter,
bb8c093b 5266 .set_key = iwl3945_mac_set_key,
bb8c093b
CH
5267 .get_tx_stats = iwl3945_mac_get_tx_stats,
5268 .conf_tx = iwl3945_mac_conf_tx,
bb8c093b 5269 .reset_tsf = iwl3945_mac_reset_tsf,
cd56d331 5270 .bss_info_changed = iwl3945_bss_info_changed,
bb8c093b 5271 .hw_scan = iwl3945_mac_hw_scan
b481de9c
ZY
5272};
5273
e52119c5 5274static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
5275{
5276 int ret;
e6148917 5277 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
5278
5279 priv->retry_rate = 1;
5280 priv->ibss_beacon = NULL;
5281
5282 spin_lock_init(&priv->lock);
3dae0c42 5283 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
5284 spin_lock_init(&priv->sta_lock);
5285 spin_lock_init(&priv->hcmd_lock);
5286
5287 INIT_LIST_HEAD(&priv->free_frames);
5288
5289 mutex_init(&priv->mutex);
5290
5291 /* Clear the driver's (not device's) station table */
5292 iwl3945_clear_stations_table(priv);
5293
5294 priv->data_retry_limit = -1;
5295 priv->ieee_channels = NULL;
5296 priv->ieee_rates = NULL;
5297 priv->band = IEEE80211_BAND_2GHZ;
5298
5299 priv->iw_mode = NL80211_IFTYPE_STATION;
5300
5301 iwl_reset_qos(priv);
5302
5303 priv->qos_data.qos_active = 0;
5304 priv->qos_data.qos_cap.val = 0;
5305
5306 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
5307 /* If power management is turned on, default to CAM mode */
5308 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 5309 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 5310
e6148917
SO
5311 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
5312 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
5313 eeprom->version);
5314 ret = -EINVAL;
5315 goto err;
5316 }
5317 ret = iwl_init_channel_map(priv);
90a30a02
KA
5318 if (ret) {
5319 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
5320 goto err;
5321 }
5322
e6148917
SO
5323 /* Set up txpower settings in driver for all channels */
5324 if (iwl3945_txpower_set_from_eeprom(priv)) {
5325 ret = -EIO;
5326 goto err_free_channel_map;
5327 }
5328
534166de 5329 ret = iwlcore_init_geos(priv);
90a30a02
KA
5330 if (ret) {
5331 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
5332 goto err_free_channel_map;
5333 }
534166de
SO
5334 iwl3945_init_hw_rates(priv, priv->ieee_rates);
5335
5336 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5337 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5338 &priv->bands[IEEE80211_BAND_2GHZ];
5339 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5340 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5341 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02
KA
5342
5343 return 0;
5344
5345err_free_channel_map:
e6148917 5346 iwl_free_channel_map(priv);
90a30a02
KA
5347err:
5348 return ret;
5349}
5350
bb8c093b 5351static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
5352{
5353 int err = 0;
4a8a4322 5354 struct iwl_priv *priv;
b481de9c 5355 struct ieee80211_hw *hw;
c0f20d91 5356 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 5357 struct iwl3945_eeprom *eeprom;
0359facc 5358 unsigned long flags;
b481de9c 5359
cee53ddb
KA
5360 /***********************
5361 * 1. Allocating HW data
5362 * ********************/
5363
b481de9c
ZY
5364 /* mac80211 allocates memory for this device instance, including
5365 * space for this driver's private structure */
90a30a02 5366 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 5367 if (hw == NULL) {
a3139c59 5368 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
5369 err = -ENOMEM;
5370 goto out;
5371 }
b481de9c 5372 priv = hw->priv;
90a30a02 5373 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 5374
df878d8f
KA
5375 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
5376 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
5377 IWL_ERR(priv,
5378 "invalid queues_num, should be between %d and %d\n",
5379 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59
SO
5380 err = -EINVAL;
5381 goto out;
5382 }
5383
90a30a02
KA
5384 /*
5385 * Disabling hardware scan means that mac80211 will perform scans
5386 * "the hard way", rather than using device's scan.
5387 */
df878d8f 5388 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 5389 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
5390 iwl3945_hw_ops.hw_scan = NULL;
5391 }
5392
90a30a02 5393
e1623446 5394 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
5395 priv->cfg = cfg;
5396 priv->pci_dev = pdev;
cee53ddb 5397
d08853a3 5398#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 5399 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
5400 atomic_set(&priv->restrict_refcnt, 0);
5401#endif
90a30a02
KA
5402 hw->rate_control_algorithm = "iwl-3945-rs";
5403 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
5404
566bfe5a 5405 /* Tell mac80211 our characteristics */
605a0bd6 5406 hw->flags = IEEE80211_HW_SIGNAL_DBM |
566bfe5a 5407 IEEE80211_HW_NOISE_DBM;
b481de9c 5408
f59ac048 5409 hw->wiphy->interface_modes =
f59ac048
LR
5410 BIT(NL80211_IFTYPE_STATION) |
5411 BIT(NL80211_IFTYPE_ADHOC);
5412
2a44f911 5413 hw->wiphy->custom_regulatory = true;
ea4a82dc 5414
6440adb5 5415 /* 4 EDCA QOS priorities */
b481de9c
ZY
5416 hw->queues = 4;
5417
cee53ddb
KA
5418 /***************************
5419 * 2. Initializing PCI bus
5420 * *************************/
b481de9c
ZY
5421 if (pci_enable_device(pdev)) {
5422 err = -ENODEV;
5423 goto out_ieee80211_free_hw;
5424 }
5425
5426 pci_set_master(pdev);
5427
b481de9c
ZY
5428 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
5429 if (!err)
5430 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
5431 if (err) {
978785a3 5432 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
5433 goto out_pci_disable_device;
5434 }
5435
5436 pci_set_drvdata(pdev, priv);
5437 err = pci_request_regions(pdev, DRV_NAME);
5438 if (err)
5439 goto out_pci_disable_device;
6440adb5 5440
cee53ddb
KA
5441 /***********************
5442 * 3. Read REV Register
5443 * ********************/
b481de9c
ZY
5444 priv->hw_base = pci_iomap(pdev, 0, 0);
5445 if (!priv->hw_base) {
5446 err = -ENODEV;
5447 goto out_pci_release_regions;
5448 }
5449
e1623446 5450 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 5451 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 5452 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 5453
cee53ddb
KA
5454 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5455 * PCI Tx retries from interfering with C3 CPU state */
5456 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 5457
90a30a02
KA
5458 /* amp init */
5459 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 5460 if (err < 0) {
e1623446 5461 IWL_DEBUG_INFO(priv, "Failed to init APMG\n");
90a30a02 5462 goto out_iounmap;
cee53ddb 5463 }
b481de9c 5464
cee53ddb
KA
5465 /***********************
5466 * 4. Read EEPROM
5467 * ********************/
90a30a02 5468
cee53ddb 5469 /* Read the EEPROM */
e6148917 5470 err = iwl_eeprom_init(priv);
cee53ddb 5471 if (err) {
15b1687c 5472 IWL_ERR(priv, "Unable to init EEPROM\n");
cee53ddb
KA
5473 goto out_remove_sysfs;
5474 }
5475 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
5476 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
5477 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 5478 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 5479 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 5480
cee53ddb
KA
5481 /***********************
5482 * 5. Setup HW Constants
5483 * ********************/
b481de9c 5484 /* Device-specific setup */
3832ec9d 5485 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 5486 IWL_ERR(priv, "failed to set hw settings\n");
b481de9c
ZY
5487 goto out_iounmap;
5488 }
5489
cee53ddb
KA
5490 /***********************
5491 * 6. Setup priv
5492 * ********************/
cee53ddb 5493
90a30a02 5494 err = iwl3945_init_drv(priv);
b481de9c 5495 if (err) {
90a30a02
KA
5496 IWL_ERR(priv, "initializing driver failed\n");
5497 goto out_free_geos;
b481de9c
ZY
5498 }
5499
978785a3
TW
5500 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
5501 priv->cfg->name);
cee53ddb
KA
5502
5503 /***********************************
5504 * 7. Initialize Module Parameters
5505 * **********************************/
5506
5507 /* Initialize module parameter values here */
5508 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 5509 if (iwl3945_mod_params.disable) {
cee53ddb 5510 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 5511 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
849e0dce
RC
5512 }
5513
cee53ddb
KA
5514
5515 /***********************
5516 * 8. Setup Services
5517 * ********************/
5518
5519 spin_lock_irqsave(&priv->lock, flags);
5520 iwl3945_disable_interrupts(priv);
5521 spin_unlock_irqrestore(&priv->lock, flags);
5522
2663516d
HS
5523 pci_enable_msi(priv->pci_dev);
5524
5525 err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
5526 DRV_NAME, priv);
5527 if (err) {
5528 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5529 goto out_disable_msi;
5530 }
5531
cee53ddb 5532 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5533 if (err) {
15b1687c 5534 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 5535 goto out_release_irq;
849e0dce 5536 }
849e0dce 5537
8ccde88a
SO
5538 iwl_set_rxon_channel(priv,
5539 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
5540 iwl3945_setup_deferred_work(priv);
5541 iwl3945_setup_rx_handlers(priv);
5542
cee53ddb 5543 /*********************************
2663516d 5544 * 9. Setup and Register mac80211
cee53ddb
KA
5545 * *******************************/
5546
5a66926a
ZY
5547 err = ieee80211_register_hw(priv->hw);
5548 if (err) {
15b1687c 5549 IWL_ERR(priv, "Failed to register network device: %d\n", err);
cee53ddb 5550 goto out_remove_sysfs;
5a66926a 5551 }
b481de9c 5552
5a66926a
ZY
5553 priv->hw->conf.beacon_int = 100;
5554 priv->mac80211_registered = 1;
cee53ddb 5555
c0af96a6 5556 err = iwl_rfkill_init(priv);
ebef2008 5557 if (err)
15b1687c 5558 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008
AK
5559 "Ignoring error: %d\n", err);
5560
2663516d
HS
5561 /* Start monitoring the killswitch */
5562 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5563 2 * HZ);
5564
b481de9c
ZY
5565 return 0;
5566
cee53ddb
KA
5567 out_remove_sysfs:
5568 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5569 out_free_geos:
534166de 5570 iwlcore_free_geos(priv);
b481de9c
ZY
5571
5572 out_release_irq:
2663516d 5573 free_irq(priv->pci_dev->irq, priv);
b481de9c
ZY
5574 destroy_workqueue(priv->workqueue);
5575 priv->workqueue = NULL;
3832ec9d 5576 iwl3945_unset_hw_params(priv);
2663516d
HS
5577 out_disable_msi:
5578 pci_disable_msi(priv->pci_dev);
b481de9c
ZY
5579 out_iounmap:
5580 pci_iounmap(pdev, priv->hw_base);
5581 out_pci_release_regions:
5582 pci_release_regions(pdev);
5583 out_pci_disable_device:
5584 pci_disable_device(pdev);
5585 pci_set_drvdata(pdev, NULL);
5586 out_ieee80211_free_hw:
5587 ieee80211_free_hw(priv->hw);
5588 out:
5589 return err;
5590}
5591
c83dbf68 5592static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 5593{
4a8a4322 5594 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 5595 unsigned long flags;
b481de9c
ZY
5596
5597 if (!priv)
5598 return;
5599
e1623446 5600 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 5601
b481de9c 5602 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 5603
d552bfb6
KA
5604 if (priv->mac80211_registered) {
5605 ieee80211_unregister_hw(priv->hw);
5606 priv->mac80211_registered = 0;
5607 } else {
5608 iwl3945_down(priv);
5609 }
b481de9c 5610
0359facc
MA
5611 /* make sure we flush any pending irq or
5612 * tasklet for the driver
5613 */
5614 spin_lock_irqsave(&priv->lock, flags);
5615 iwl3945_disable_interrupts(priv);
5616 spin_unlock_irqrestore(&priv->lock, flags);
5617
5618 iwl_synchronize_irq(priv);
5619
bb8c093b 5620 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5621
c0af96a6 5622 iwl_rfkill_unregister(priv);
2663516d
HS
5623 cancel_delayed_work(&priv->rfkill_poll);
5624
bb8c093b 5625 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
5626
5627 if (priv->rxq.bd)
51af3d3f 5628 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 5629 iwl3945_hw_txq_ctx_free(priv);
b481de9c 5630
3832ec9d 5631 iwl3945_unset_hw_params(priv);
bb8c093b 5632 iwl3945_clear_stations_table(priv);
b481de9c 5633
6ef89d0a
MA
5634 /*netif_stop_queue(dev); */
5635 flush_workqueue(priv->workqueue);
5636
bb8c093b 5637 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
5638 * priv->workqueue... so we can't take down the workqueue
5639 * until now... */
5640 destroy_workqueue(priv->workqueue);
5641 priv->workqueue = NULL;
5642
2663516d
HS
5643 free_irq(pdev->irq, priv);
5644 pci_disable_msi(pdev);
5645
b481de9c
ZY
5646 pci_iounmap(pdev, priv->hw_base);
5647 pci_release_regions(pdev);
5648 pci_disable_device(pdev);
5649 pci_set_drvdata(pdev, NULL);
5650
e6148917 5651 iwl_free_channel_map(priv);
534166de 5652 iwlcore_free_geos(priv);
805cee5b 5653 kfree(priv->scan);
b481de9c
ZY
5654 if (priv->ibss_beacon)
5655 dev_kfree_skb(priv->ibss_beacon);
5656
5657 ieee80211_free_hw(priv->hw);
5658}
5659
5660#ifdef CONFIG_PM
5661
bb8c093b 5662static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 5663{
4a8a4322 5664 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 5665
e655b9f0
ZY
5666 if (priv->is_open) {
5667 set_bit(STATUS_IN_SUSPEND, &priv->status);
5668 iwl3945_mac_stop(priv->hw);
5669 priv->is_open = 1;
5670 }
2663516d
HS
5671 pci_save_state(pdev);
5672 pci_disable_device(pdev);
b481de9c
ZY
5673 pci_set_power_state(pdev, PCI_D3hot);
5674
b481de9c
ZY
5675 return 0;
5676}
5677
bb8c093b 5678static int iwl3945_pci_resume(struct pci_dev *pdev)
b481de9c 5679{
4a8a4322 5680 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 5681 int ret;
b481de9c 5682
b481de9c 5683 pci_set_power_state(pdev, PCI_D0);
450154e4
WT
5684 ret = pci_enable_device(pdev);
5685 if (ret)
5686 return ret;
2663516d 5687 pci_restore_state(pdev);
b481de9c 5688
e655b9f0
ZY
5689 if (priv->is_open)
5690 iwl3945_mac_start(priv->hw);
b481de9c 5691
e655b9f0 5692 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
5693 return 0;
5694}
5695
5696#endif /* CONFIG_PM */
5697
5698/*****************************************************************************
5699 *
5700 * driver and module entry point
5701 *
5702 *****************************************************************************/
5703
bb8c093b 5704static struct pci_driver iwl3945_driver = {
b481de9c 5705 .name = DRV_NAME,
bb8c093b
CH
5706 .id_table = iwl3945_hw_card_ids,
5707 .probe = iwl3945_pci_probe,
5708 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 5709#ifdef CONFIG_PM
bb8c093b
CH
5710 .suspend = iwl3945_pci_suspend,
5711 .resume = iwl3945_pci_resume,
b481de9c
ZY
5712#endif
5713};
5714
bb8c093b 5715static int __init iwl3945_init(void)
b481de9c
ZY
5716{
5717
5718 int ret;
5719 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
5720 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
5721
5722 ret = iwl3945_rate_control_register();
5723 if (ret) {
a3139c59
SO
5724 printk(KERN_ERR DRV_NAME
5725 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
5726 return ret;
5727 }
5728
bb8c093b 5729 ret = pci_register_driver(&iwl3945_driver);
b481de9c 5730 if (ret) {
a3139c59 5731 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 5732 goto error_register;
b481de9c 5733 }
b481de9c
ZY
5734
5735 return ret;
897e1cf2 5736
897e1cf2
RC
5737error_register:
5738 iwl3945_rate_control_unregister();
5739 return ret;
b481de9c
ZY
5740}
5741
bb8c093b 5742static void __exit iwl3945_exit(void)
b481de9c 5743{
bb8c093b 5744 pci_unregister_driver(&iwl3945_driver);
897e1cf2 5745 iwl3945_rate_control_unregister();
b481de9c
ZY
5746}
5747
a0987a8d 5748MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 5749
df878d8f 5750module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 5751MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 5752module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 5753MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
5754module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
5755MODULE_PARM_DESC(swcrypto,
5756 "using software crypto (default 1 [software])\n");
df878d8f 5757module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 5758MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 5759module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
5760MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
5761
df878d8f 5762module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
5763MODULE_PARM_DESC(queues_num, "number of hw queues.");
5764
af48d048
SO
5765module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
5766MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
5767
bb8c093b
CH
5768module_exit(iwl3945_exit);
5769module_init(iwl3945_init);