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iwlwifi: handle shared memory
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
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44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
b481de9c 49#include "iwl-4965.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
c79dd5b5 56static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 57 struct iwl4965_tx_queue *txq);
416e1438 58
b481de9c
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59/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
b481de9c
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65/*
66 * module name, copyright, version, etc.
67 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
68 */
69
70#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
71
0a6857e7 72#ifdef CONFIG_IWLWIFI_DEBUG
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73#define VD "d"
74#else
75#define VD
76#endif
77
c8b0e6e1 78#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
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79#define VS "s"
80#else
81#define VS
82#endif
83
df48c323 84#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 85
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86
87MODULE_DESCRIPTION(DRV_DESCRIPTION);
88MODULE_VERSION(DRV_VERSION);
89MODULE_AUTHOR(DRV_COPYRIGHT);
90MODULE_LICENSE("GPL");
91
92__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
93{
94 u16 fc = le16_to_cpu(hdr->frame_control);
95 int hdr_len = ieee80211_get_hdrlen(fc);
96
97 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
98 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
99 return NULL;
100}
101
d1141dfb 102static const struct ieee80211_supported_band *iwl_get_hw_mode(
c79dd5b5 103 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 104{
8318d78a 105 return priv->hw->wiphy->bands[band];
b481de9c
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106}
107
bb8c093b 108static int iwl4965_is_empty_essid(const char *essid, int essid_len)
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109{
110 /* Single white space is for Linksys APs */
111 if (essid_len == 1 && essid[0] == ' ')
112 return 1;
113
114 /* Otherwise, if the entire essid is 0, we assume it is hidden */
115 while (essid_len) {
116 essid_len--;
117 if (essid[essid_len] != '\0')
118 return 0;
119 }
120
121 return 1;
122}
123
bb8c093b 124static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
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125{
126 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
127 const char *s = essid;
128 char *d = escaped;
129
bb8c093b 130 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
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131 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
132 return escaped;
133 }
134
135 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
136 while (essid_len--) {
137 if (*s == '\0') {
138 *d++ = '\\';
139 *d++ = '0';
140 s++;
141 } else
142 *d++ = *s++;
143 }
144 *d = '\0';
145 return escaped;
146}
147
b481de9c
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148/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
149 * DMA services
150 *
151 * Theory of operation
152 *
6440adb5
BC
153 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
154 * of buffer descriptors, each of which points to one or more data buffers for
155 * the device to read from or fill. Driver and device exchange status of each
156 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
157 * entries in each circular buffer, to protect against confusing empty and full
158 * queue states.
159 *
160 * The device reads or writes the data in the queues via the device's several
161 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
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162 *
163 * For Tx queue, there are low mark and high mark limits. If, after queuing
164 * the packet for Tx, free space become < low mark, Tx queue stopped. When
165 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
166 * Tx queue resumed.
167 *
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168 * The 4965 operates with up to 17 queues: One receive queue, one transmit
169 * queue (#4) for sending commands to the device firmware, and 15 other
170 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC
171 *
172 * See more detailed info in iwl-4965-hw.h.
b481de9c
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173 ***************************************************/
174
fe01b477 175int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 176{
fc4b6853 177 int s = q->read_ptr - q->write_ptr;
b481de9c 178
fc4b6853 179 if (q->read_ptr > q->write_ptr)
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180 s -= q->n_bd;
181
182 if (s <= 0)
183 s += q->n_window;
184 /* keep some reserve to not confuse empty and full situations */
185 s -= 2;
186 if (s < 0)
187 s = 0;
188 return s;
189}
190
b481de9c 191
bb8c093b 192static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 193{
fc4b6853
TW
194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
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197}
198
bb8c093b 199static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 200{
6440adb5 201 /* This is for scan command, the big buffer at end of command array */
b481de9c 202 if (is_huge)
6440adb5 203 return q->n_window; /* must be power of 2 */
b481de9c 204
6440adb5 205 /* Otherwise, use normal size buffers */
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206 return index & (q->n_window - 1);
207}
208
6440adb5
BC
209/**
210 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
211 */
c79dd5b5 212static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
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213 int count, int slots_num, u32 id)
214{
215 q->n_bd = count;
216 q->n_window = slots_num;
217 q->id = id;
218
c54b679d
TW
219 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
220 * and iwl_queue_dec_wrap are broken. */
b481de9c
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221 BUG_ON(!is_power_of_2(count));
222
223 /* slots_num must be power-of-two size, otherwise
224 * get_cmd_index is broken. */
225 BUG_ON(!is_power_of_2(slots_num));
226
227 q->low_mark = q->n_window / 4;
228 if (q->low_mark < 4)
229 q->low_mark = 4;
230
231 q->high_mark = q->n_window / 8;
232 if (q->high_mark < 2)
233 q->high_mark = 2;
234
fc4b6853 235 q->write_ptr = q->read_ptr = 0;
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236
237 return 0;
238}
239
6440adb5
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240/**
241 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
242 */
c79dd5b5 243static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 244 struct iwl4965_tx_queue *txq, u32 id)
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245{
246 struct pci_dev *dev = priv->pci_dev;
247
6440adb5
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248 /* Driver private data, only for Tx (not command) queues,
249 * not shared with device. */
b481de9c
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250 if (id != IWL_CMD_QUEUE_NUM) {
251 txq->txb = kmalloc(sizeof(txq->txb[0]) *
252 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
253 if (!txq->txb) {
01ebd063 254 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
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255 "structures failed\n");
256 goto error;
257 }
258 } else
259 txq->txb = NULL;
260
6440adb5
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261 /* Circular buffer of transmit frame descriptors (TFDs),
262 * shared with device */
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263 txq->bd = pci_alloc_consistent(dev,
264 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
265 &txq->q.dma_addr);
266
267 if (!txq->bd) {
268 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
269 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
270 goto error;
271 }
272 txq->q.id = id;
273
274 return 0;
275
276 error:
277 if (txq->txb) {
278 kfree(txq->txb);
279 txq->txb = NULL;
280 }
281
282 return -ENOMEM;
283}
284
8b6eaea8
BC
285/**
286 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
287 */
c79dd5b5 288int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 289 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
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290{
291 struct pci_dev *dev = priv->pci_dev;
292 int len;
293 int rc = 0;
294
8b6eaea8
BC
295 /*
296 * Alloc buffer array for commands (Tx or other types of commands).
297 * For the command queue (#4), allocate command space + one big
298 * command for scan, since scan command is very huge; the system will
299 * not have two scans at the same time, so only one is needed.
bb54244b 300 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
BC
301 * space is needed.
302 */
857485c0 303 len = sizeof(struct iwl_cmd) * slots_num;
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304 if (txq_id == IWL_CMD_QUEUE_NUM)
305 len += IWL_MAX_SCAN_SIZE;
306 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
307 if (!txq->cmd)
308 return -ENOMEM;
309
8b6eaea8 310 /* Alloc driver data array and TFD circular buffer */
bb8c093b 311 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
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312 if (rc) {
313 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
314
315 return -ENOMEM;
316 }
317 txq->need_update = 0;
318
319 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 320 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 321 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
BC
322
323 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 324 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 325
8b6eaea8 326 /* Tell device where to find queue */
bb8c093b 327 iwl4965_hw_tx_queue_init(priv, txq);
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328
329 return 0;
330}
331
332/**
bb8c093b 333 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
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334 * @txq: Transmit queue to deallocate.
335 *
336 * Empty queue by removing and destroying all BD's.
6440adb5
BC
337 * Free all buffers.
338 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 339 */
c79dd5b5 340void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 341{
bb8c093b 342 struct iwl4965_queue *q = &txq->q;
b481de9c
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343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345
346 if (q->n_bd == 0)
347 return;
348
349 /* first, empty all BD's */
fc4b6853 350 for (; q->write_ptr != q->read_ptr;
c54b679d 351 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 352 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 353
857485c0 354 len = sizeof(struct iwl_cmd) * q->n_window;
b481de9c
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355 if (q->id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357
6440adb5 358 /* De-alloc array of command/tx buffers */
b481de9c
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359 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
360
6440adb5 361 /* De-alloc circular buffer of TFDs */
b481de9c 362 if (txq->q.n_bd)
bb8c093b 363 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
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364 txq->q.n_bd, txq->bd, txq->q.dma_addr);
365
6440adb5 366 /* De-alloc array of per-TFD driver data */
b481de9c
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367 if (txq->txb) {
368 kfree(txq->txb);
369 txq->txb = NULL;
370 }
371
6440adb5 372 /* 0-fill queue descriptor structure */
b481de9c
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373 memset(txq, 0, sizeof(*txq));
374}
375
bb8c093b 376const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
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377
378/*************** STATION TABLE MANAGEMENT ****
9fbab516 379 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
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380 * the functionality provided here
381 */
382
383/**************************************************************/
384
01ebd063 385#if 0 /* temporary disable till we add real remove station */
6440adb5
BC
386/**
387 * iwl4965_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
c79dd5b5 391static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
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392{
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
5425e490 402 index = priv->hw_params.bcast_sta_id;
b481de9c 403 else
5425e490 404 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
b481de9c
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405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425}
556f8db7 426#endif
b481de9c 427
6440adb5
BC
428/**
429 * iwl4965_add_station_flags - Add station to tables in driver and device
430 */
c79dd5b5 431u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 432 int is_ap, u8 flags, void *ht_data)
b481de9c
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433{
434 int i;
435 int index = IWL_INVALID_STATION;
bb8c093b 436 struct iwl4965_station_entry *station;
b481de9c 437 unsigned long flags_spin;
0795af57 438 DECLARE_MAC_BUF(mac);
b481de9c
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439
440 spin_lock_irqsave(&priv->sta_lock, flags_spin);
441 if (is_ap)
442 index = IWL_AP_ID;
443 else if (is_broadcast_ether_addr(addr))
5425e490 444 index = priv->hw_params.bcast_sta_id;
b481de9c 445 else
5425e490 446 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
b481de9c
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447 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
448 addr)) {
449 index = i;
450 break;
451 }
452
453 if (!priv->stations[i].used &&
454 index == IWL_INVALID_STATION)
455 index = i;
456 }
457
458
9fbab516
BC
459 /* These two conditions have the same outcome, but keep them separate
460 since they have different meanings */
b481de9c
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461 if (unlikely(index == IWL_INVALID_STATION)) {
462 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
463 return index;
464 }
465
466 if (priv->stations[index].used &&
467 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
468 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
469 return index;
470 }
471
472
0795af57 473 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
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474 station = &priv->stations[index];
475 station->used = 1;
476 priv->num_stations++;
477
6440adb5 478 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 479 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
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480 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
481 station->sta.mode = 0;
482 station->sta.sta.sta_id = index;
483 station->sta.station_flags = 0;
484
c8b0e6e1 485#ifdef CONFIG_IWL4965_HT
b481de9c 486 /* BCAST station and IBSS stations do not work in HT mode */
5425e490 487 if (index != priv->hw_params.bcast_sta_id &&
b481de9c 488 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR
489 iwl4965_set_ht_add_station(priv, index,
490 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 491#endif /*CONFIG_IWL4965_HT*/
b481de9c
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492
493 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC
494
495 /* Add station to device's station table */
bb8c093b 496 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
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497 return index;
498
499}
500
b481de9c 501
b481de9c
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502
503/*************** HOST COMMAND QUEUE FUNCTIONS *****/
504
b481de9c 505/**
bb8c093b 506 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
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507 * @priv: device private data point
508 * @cmd: a point to the ucode command structure
509 *
510 * The function returns < 0 values to indicate the operation is
511 * failed. On success, it turns the index (> 0) of command in the
512 * command queue.
513 */
857485c0 514int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 515{
bb8c093b
CH
516 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
517 struct iwl4965_queue *q = &txq->q;
518 struct iwl4965_tfd_frame *tfd;
b481de9c 519 u32 *control_flags;
857485c0 520 struct iwl_cmd *out_cmd;
b481de9c
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521 u32 idx;
522 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
523 dma_addr_t phys_addr;
524 int ret;
525 unsigned long flags;
526
527 /* If any of the command structures end up being larger than
528 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
529 * we will need to increase the size of the TFD entries */
530 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
531 !(cmd->meta.flags & CMD_SIZE_HUGE));
532
fee1247a 533 if (iwl_is_rfkill(priv)) {
c342a1b9
GG
534 IWL_DEBUG_INFO("Not sending command - RF KILL");
535 return -EIO;
536 }
537
bb8c093b 538 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
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539 IWL_ERROR("No space for Tx\n");
540 return -ENOSPC;
541 }
542
543 spin_lock_irqsave(&priv->hcmd_lock, flags);
544
fc4b6853 545 tfd = &txq->bd[q->write_ptr];
b481de9c
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546 memset(tfd, 0, sizeof(*tfd));
547
548 control_flags = (u32 *) tfd;
549
fc4b6853 550 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
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551 out_cmd = &txq->cmd[idx];
552
553 out_cmd->hdr.cmd = cmd->id;
554 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
555 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
556
557 /* At this point, the out_cmd now has all of the incoming cmd
558 * information */
559
560 out_cmd->hdr.flags = 0;
561 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 562 INDEX_TO_SEQ(q->write_ptr));
b481de9c
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563 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
564 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
565
566 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 567 offsetof(struct iwl_cmd, hdr);
bb8c093b 568 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY
569
570 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
571 "%d bytes at %d[%d]:%d\n",
572 get_cmd_string(out_cmd->hdr.cmd),
573 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 574 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY
575
576 txq->need_update = 1;
6440adb5
BC
577
578 /* Set up entry in queue's byte count circular buffer */
e2a722eb 579 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
6440adb5
BC
580
581 /* Increment and update queue's write index */
c54b679d 582 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
e2a722eb 583 ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
584
585 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
586 return ret ? ret : idx;
587}
588
deb09c43
EG
589static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
590{
591 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
592
593 if (hw_decrypt)
594 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
595 else
596 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
597
598}
599
b481de9c 600/**
bb8c093b 601 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY
602 *
603 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC
604 * NOTE: mutex must be held before calling this fnction
605 */
c79dd5b5 606static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY
607 const u8 *addr, int is_ap)
608{
556f8db7 609 u8 sta_id;
b481de9c 610
6440adb5 611 /* Add station to device's station table */
67d62035
RR
612#ifdef CONFIG_IWL4965_HT
613 struct ieee80211_conf *conf = &priv->hw->conf;
614 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
615
616 if ((is_ap) &&
617 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
618 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
619 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
620 0, cur_ht_config);
621 else
622#endif /* CONFIG_IWL4965_HT */
623 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
624 0, NULL);
6440adb5
BC
625
626 /* Set up default rate scaling table in device's station table */
b481de9c
ZY
627 iwl4965_add_station(priv, addr, is_ap);
628
556f8db7 629 return sta_id;
b481de9c
ZY
630}
631
b481de9c 632/**
bb8c093b 633 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY
634 *
635 * NOTE: This is really only useful during development and can eventually
636 * be #ifdef'd out once the driver is stable and folks aren't actively
637 * making changes
638 */
bb8c093b 639static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY
640{
641 int error = 0;
642 int counter = 1;
643
644 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
645 error |= le32_to_cpu(rxon->flags &
646 (RXON_FLG_TGJ_NARROW_BAND_MSK |
647 RXON_FLG_RADAR_DETECT_MSK));
648 if (error)
649 IWL_WARNING("check 24G fields %d | %d\n",
650 counter++, error);
651 } else {
652 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
653 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
654 if (error)
655 IWL_WARNING("check 52 fields %d | %d\n",
656 counter++, error);
657 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
658 if (error)
659 IWL_WARNING("check 52 CCK %d | %d\n",
660 counter++, error);
661 }
662 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
663 if (error)
664 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
665
666 /* make sure basic rates 6Mbps and 1Mbps are supported */
667 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
668 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
669 if (error)
670 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
671
672 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
673 if (error)
674 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
675
676 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
677 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
678 if (error)
679 IWL_WARNING("check CCK and short slot %d | %d\n",
680 counter++, error);
681
682 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
683 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
684 if (error)
685 IWL_WARNING("check CCK & auto detect %d | %d\n",
686 counter++, error);
687
688 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
689 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
690 if (error)
691 IWL_WARNING("check TGG and auto detect %d | %d\n",
692 counter++, error);
693
694 if (error)
695 IWL_WARNING("Tuning to channel %d\n",
696 le16_to_cpu(rxon->channel));
697
698 if (error) {
bb8c093b 699 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY
700 return -1;
701 }
702 return 0;
703}
704
705/**
9fbab516 706 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 707 * @priv: staging_rxon is compared to active_rxon
b481de9c 708 *
9fbab516
BC
709 * If the RXON structure is changing enough to require a new tune,
710 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
711 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 712 */
c79dd5b5 713static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY
714{
715
716 /* These items are only settable from the full RXON command */
717 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
718 compare_ether_addr(priv->staging_rxon.bssid_addr,
719 priv->active_rxon.bssid_addr) ||
720 compare_ether_addr(priv->staging_rxon.node_addr,
721 priv->active_rxon.node_addr) ||
722 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
723 priv->active_rxon.wlap_bssid_addr) ||
724 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
725 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
726 (priv->staging_rxon.air_propagation !=
727 priv->active_rxon.air_propagation) ||
728 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
729 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
730 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
731 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
732 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
733 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
734 return 1;
735
736 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
737 * be updated with the RXON_ASSOC command -- however only some
738 * flag transitions are allowed using RXON_ASSOC */
739
740 /* Check if we are not switching bands */
741 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
742 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
743 return 1;
744
745 /* Check if we are switching association toggle */
746 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
747 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
748 return 1;
749
750 return 0;
751}
752
b481de9c 753/**
bb8c093b 754 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 755 *
01ebd063 756 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY
757 * the active_rxon structure is updated with the new data. This
758 * function correctly transitions out of the RXON_ASSOC_MSK state if
759 * a HW tune is required based on the RXON structure changes.
760 */
c79dd5b5 761static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY
762{
763 /* cast away the const for active_rxon in this function */
bb8c093b 764 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 765 DECLARE_MAC_BUF(mac);
b481de9c
ZY
766 int rc = 0;
767
fee1247a 768 if (!iwl_is_alive(priv))
b481de9c
ZY
769 return -1;
770
771 /* always get timestamp with Rx frame */
772 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
773
bb8c093b 774 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY
775 if (rc) {
776 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
777 return -EINVAL;
778 }
779
780 /* If we don't need to send a full RXON, we can use
bb8c093b 781 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 782 * and other flags for the current radio configuration. */
bb8c093b 783 if (!iwl4965_full_rxon_required(priv)) {
7e8c519e 784 rc = iwl_send_rxon_assoc(priv);
b481de9c
ZY
785 if (rc) {
786 IWL_ERROR("Error setting RXON_ASSOC "
787 "configuration (%d).\n", rc);
788 return rc;
789 }
790
791 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
792
793 return 0;
794 }
795
796 /* station table will be cleared */
797 priv->assoc_station_added = 0;
798
b481de9c
ZY
799 /* If we are currently associated and the new config requires
800 * an RXON_ASSOC and the new config wants the associated mask enabled,
801 * we must clear the associated from the active configuration
802 * before we apply the new config */
3109ece1 803 if (iwl_is_associated(priv) &&
b481de9c
ZY
804 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
805 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
806 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
807
857485c0 808 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 809 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY
810 &priv->active_rxon);
811
812 /* If the mask clearing failed then we set
813 * active_rxon back to what it was previously */
814 if (rc) {
815 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
816 IWL_ERROR("Error clearing ASSOC_MSK on current "
817 "configuration (%d).\n", rc);
818 return rc;
819 }
b481de9c
ZY
820 }
821
822 IWL_DEBUG_INFO("Sending RXON\n"
823 "* with%s RXON_FILTER_ASSOC_MSK\n"
824 "* channel = %d\n"
0795af57 825 "* bssid = %s\n",
b481de9c
ZY
826 ((priv->staging_rxon.filter_flags &
827 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
828 le16_to_cpu(priv->staging_rxon.channel),
0795af57 829 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 830
099b40b7 831 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
b481de9c 832 /* Apply the new configuration */
857485c0 833 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 834 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY
835 if (rc) {
836 IWL_ERROR("Error setting new configuration (%d).\n", rc);
837 return rc;
838 }
839
bf85ea4f 840 iwlcore_clear_stations_table(priv);
556f8db7 841
b481de9c
ZY
842 if (!priv->error_recovering)
843 priv->start_calib = 0;
844
f0832f13 845 iwl_init_sensitivity(priv);
b481de9c
ZY
846
847 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
848
849 /* If we issue a new RXON command which required a tune then we must
850 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 851 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
852 if (rc) {
853 IWL_ERROR("Error setting Tx power (%d).\n", rc);
854 return rc;
855 }
856
857 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 858 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY
859 IWL_INVALID_STATION) {
860 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
861 return -EIO;
862 }
863
864 /* If we have set the ASSOC_MSK and we are in BSS mode then
865 * add the IWL_AP_ID to the station rate table */
3109ece1 866 if (iwl_is_associated(priv) &&
b481de9c 867 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 868 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY
869 == IWL_INVALID_STATION) {
870 IWL_ERROR("Error adding AP address for transmit.\n");
871 return -EIO;
872 }
873 priv->assoc_station_added = 1;
6974e363
EG
874 if (priv->default_wep_key &&
875 iwl_send_static_wepkey_cmd(priv, 0))
876 IWL_ERROR("Could not send WEP static key.\n");
b481de9c
ZY
877 }
878
879 return 0;
880}
881
5da4b55f
MA
882void iwl4965_update_chain_flags(struct iwl_priv *priv)
883{
884
885 iwl4965_set_rxon_chain(priv);
886 iwl4965_commit_rxon(priv);
887}
888
c79dd5b5 889static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 890{
bb8c093b 891 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY
892 .flags = 3,
893 .lead_time = 0xAA,
894 .max_kill = 1,
895 .kill_ack_mask = 0,
896 .kill_cts_mask = 0,
897 };
898
857485c0 899 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 900 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY
901}
902
c79dd5b5 903static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY
904{
905 int rc = 0;
bb8c093b 906 struct iwl4965_rx_packet *res;
857485c0 907 struct iwl_host_cmd cmd = {
b481de9c
ZY
908 .id = REPLY_SCAN_ABORT_CMD,
909 .meta.flags = CMD_WANT_SKB,
910 };
911
912 /* If there isn't a scan actively going on in the hardware
913 * then we are in between scan bands and not actually
914 * actively scanning, so don't send the abort command */
915 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
916 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
917 return 0;
918 }
919
857485c0 920 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
921 if (rc) {
922 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
923 return rc;
924 }
925
bb8c093b 926 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
927 if (res->u.status != CAN_ABORT_STATUS) {
928 /* The scan abort will return 1 for success or
929 * 2 for "failure". A failure condition can be
930 * due to simply not being in an active scan which
931 * can occur if we send the scan abort before we
932 * the microcode has notified us that a scan is
933 * completed. */
934 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
935 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
936 clear_bit(STATUS_SCAN_HW, &priv->status);
937 }
938
939 dev_kfree_skb_any(cmd.meta.u.skb);
940
941 return rc;
942}
943
b481de9c
ZY
944/*
945 * CARD_STATE_CMD
946 *
9fbab516 947 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY
948 *
949 * When in the 'enable' state the card operates as normal.
950 * When in the 'disable' state, the card enters into a low power mode.
951 * When in the 'halt' state, the card is shut down and must be fully
952 * restarted to come back on.
953 */
c79dd5b5 954static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 955{
857485c0 956 struct iwl_host_cmd cmd = {
b481de9c
ZY
957 .id = REPLY_CARD_STATE_CMD,
958 .len = sizeof(u32),
959 .data = &flags,
960 .meta.flags = meta_flag,
961 };
962
857485c0 963 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY
964}
965
c79dd5b5 966int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 967 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 968{
bb8c093b 969 struct iwl4965_rx_packet *res = NULL;
b481de9c 970 int rc = 0;
857485c0 971 struct iwl_host_cmd cmd = {
b481de9c 972 .id = REPLY_ADD_STA,
bb8c093b 973 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY
974 .meta.flags = flags,
975 .data = sta,
976 };
977
9e5b806c 978 if (!(flags & CMD_ASYNC))
b481de9c
ZY
979 cmd.meta.flags |= CMD_WANT_SKB;
980
857485c0 981 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY
982
983 if (rc || (flags & CMD_ASYNC))
984 return rc;
985
bb8c093b 986 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
987 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
988 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
989 res->hdr.flags);
990 rc = -EIO;
991 }
992
993 if (rc == 0) {
994 switch (res->u.add_sta.status) {
995 case ADD_STA_SUCCESS_MSK:
996 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
997 break;
998 default:
999 rc = -EIO;
1000 IWL_WARNING("REPLY_ADD_STA failed\n");
1001 break;
1002 }
1003 }
1004
1005 priv->alloc_rxb_skb--;
1006 dev_kfree_skb_any(cmd.meta.u.skb);
1007
1008 return rc;
1009}
1010
c79dd5b5 1011static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
1012{
1013 struct list_head *element;
1014
1015 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1016 priv->frames_count);
1017
1018 while (!list_empty(&priv->free_frames)) {
1019 element = priv->free_frames.next;
1020 list_del(element);
bb8c093b 1021 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY
1022 priv->frames_count--;
1023 }
1024
1025 if (priv->frames_count) {
1026 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1027 priv->frames_count);
1028 priv->frames_count = 0;
1029 }
1030}
1031
c79dd5b5 1032static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1033{
bb8c093b 1034 struct iwl4965_frame *frame;
b481de9c
ZY
1035 struct list_head *element;
1036 if (list_empty(&priv->free_frames)) {
1037 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1038 if (!frame) {
1039 IWL_ERROR("Could not allocate frame!\n");
1040 return NULL;
1041 }
1042
1043 priv->frames_count++;
1044 return frame;
1045 }
1046
1047 element = priv->free_frames.next;
1048 list_del(element);
bb8c093b 1049 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY
1050}
1051
c79dd5b5 1052static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY
1053{
1054 memset(frame, 0, sizeof(*frame));
1055 list_add(&frame->list, &priv->free_frames);
1056}
1057
c79dd5b5 1058unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY
1059 struct ieee80211_hdr *hdr,
1060 const u8 *dest, int left)
1061{
1062
3109ece1 1063 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY
1064 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1065 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1066 return 0;
1067
1068 if (priv->ibss_beacon->len > left)
1069 return 0;
1070
1071 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1072
1073 return priv->ibss_beacon->len;
1074}
1075
bb8c093b 1076static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY
1077{
1078 u8 i;
1079
1080 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1081 i = iwl4965_rates[i].next_ieee) {
b481de9c 1082 if (rate_mask & (1 << i))
bb8c093b 1083 return iwl4965_rates[i].plcp;
b481de9c
ZY
1084 }
1085
1086 return IWL_RATE_INVALID;
1087}
1088
c79dd5b5 1089static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1090{
bb8c093b 1091 struct iwl4965_frame *frame;
b481de9c
ZY
1092 unsigned int frame_size;
1093 int rc;
1094 u8 rate;
1095
bb8c093b 1096 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY
1097
1098 if (!frame) {
1099 IWL_ERROR("Could not obtain free frame buffer for beacon "
1100 "command.\n");
1101 return -ENOMEM;
1102 }
1103
1104 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1105 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY
1106 0xFF0);
1107 if (rate == IWL_INVALID_RATE)
1108 rate = IWL_RATE_6M_PLCP;
1109 } else {
bb8c093b 1110 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY
1111 if (rate == IWL_INVALID_RATE)
1112 rate = IWL_RATE_1M_PLCP;
1113 }
1114
bb8c093b 1115 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1116
857485c0 1117 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
1118 &frame->u.cmd[0]);
1119
bb8c093b 1120 iwl4965_free_frame(priv, frame);
b481de9c
ZY
1121
1122 return rc;
1123}
1124
b481de9c
ZY
1125/******************************************************************************
1126 *
1127 * Misc. internal state and helper functions
1128 *
1129 ******************************************************************************/
b481de9c 1130
b481de9c 1131/**
bb8c093b 1132 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY
1133 *
1134 * return : set the bit for each supported rate insert in ie
1135 */
bb8c093b 1136static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1137 u16 basic_rate, int *left)
b481de9c
ZY
1138{
1139 u16 ret_rates = 0, bit;
1140 int i;
c7c46676
TW
1141 u8 *cnt = ie;
1142 u8 *rates = ie + 1;
b481de9c
ZY
1143
1144 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1145 if (bit & supported_rate) {
1146 ret_rates |= bit;
bb8c093b 1147 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW
1148 ((bit & basic_rate) ? 0x80 : 0x00);
1149 (*cnt)++;
1150 (*left)--;
1151 if ((*left <= 0) ||
1152 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY
1153 break;
1154 }
1155 }
1156
1157 return ret_rates;
1158}
1159
d1141dfb
EG
1160#ifdef CONFIG_IWL4965_HT
1161static void iwl4965_ht_conf(struct iwl_priv *priv,
1162 struct ieee80211_bss_conf *bss_conf)
1163{
1164 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
1165 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
1166 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
1167
1168 IWL_DEBUG_MAC80211("enter: \n");
1169
1170 iwl_conf->is_ht = bss_conf->assoc_ht;
1171
1172 if (!iwl_conf->is_ht)
1173 return;
1174
1175 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1176
1177 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
1178 iwl_conf->sgf |= 0x1;
1179 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
1180 iwl_conf->sgf |= 0x2;
1181
1182 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
1183 iwl_conf->max_amsdu_size =
1184 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
1185
1186 iwl_conf->supported_chan_width =
1187 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
1188 iwl_conf->extension_chan_offset =
1189 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
1190 /* If no above or below channel supplied disable FAT channel */
1191 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
1192 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
1193 iwl_conf->supported_chan_width = 0;
1194
1195 iwl_conf->tx_mimo_ps_mode =
1196 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1197 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
1198
1199 iwl_conf->control_channel = ht_bss_conf->primary_channel;
1200 iwl_conf->tx_chan_width =
1201 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
1202 iwl_conf->ht_protection =
1203 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
1204 iwl_conf->non_GF_STA_present =
1205 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
1206
1207 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
1208 IWL_DEBUG_MAC80211("leave\n");
1209}
1210
1211static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1212 u8 *pos, int *left)
1213{
1214 struct ieee80211_ht_cap *ht_cap;
1215
1216 if (!sband || !sband->ht_info.ht_supported)
1217 return;
1218
1219 if (*left < sizeof(struct ieee80211_ht_cap))
1220 return;
1221
1222 *pos++ = sizeof(struct ieee80211_ht_cap);
1223 ht_cap = (struct ieee80211_ht_cap *) pos;
1224
1225 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1226 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1227 ht_cap->ampdu_params_info =
1228 (sband->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
1229 ((sband->ht_info.ampdu_density << 2) &
1230 IEEE80211_HT_CAP_AMPDU_DENSITY);
1231 *left -= sizeof(struct ieee80211_ht_cap);
1232}
1233#else
1234static inline void iwl4965_ht_conf(struct iwl_priv *priv,
1235 struct ieee80211_bss_conf *bss_conf)
1236{
1237}
1238static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1239 u8 *pos, int *left)
1240{
1241}
1242#endif
1243
1244
b481de9c 1245/**
bb8c093b 1246 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1247 */
c79dd5b5 1248static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW
1249 enum ieee80211_band band,
1250 struct ieee80211_mgmt *frame,
1251 int left, int is_direct)
b481de9c
ZY
1252{
1253 int len = 0;
1254 u8 *pos = NULL;
bee488db 1255 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
78330fdd 1256 const struct ieee80211_supported_band *sband =
d1141dfb 1257 iwl_get_hw_mode(priv, band);
b481de9c
ZY
1258
1259 /* Make sure there is enough space for the probe request,
1260 * two mandatory IEs and the data */
1261 left -= 24;
1262 if (left < 0)
1263 return 0;
1264 len += 24;
1265
1266 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1267 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1268 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1269 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY
1270 frame->seq_ctrl = 0;
1271
1272 /* fill in our indirect SSID IE */
1273 /* ...next IE... */
1274
1275 left -= 2;
1276 if (left < 0)
1277 return 0;
1278 len += 2;
1279 pos = &(frame->u.probe_req.variable[0]);
1280 *pos++ = WLAN_EID_SSID;
1281 *pos++ = 0;
1282
1283 /* fill in our direct SSID IE... */
1284 if (is_direct) {
1285 /* ...next IE... */
1286 left -= 2 + priv->essid_len;
1287 if (left < 0)
1288 return 0;
1289 /* ... fill it in... */
1290 *pos++ = WLAN_EID_SSID;
1291 *pos++ = priv->essid_len;
1292 memcpy(pos, priv->essid, priv->essid_len);
1293 pos += priv->essid_len;
1294 len += 2 + priv->essid_len;
1295 }
1296
1297 /* fill in supported rate */
1298 /* ...next IE... */
1299 left -= 2;
1300 if (left < 0)
1301 return 0;
c7c46676 1302
b481de9c
ZY
1303 /* ... fill it in... */
1304 *pos++ = WLAN_EID_SUPP_RATES;
1305 *pos = 0;
c7c46676 1306
bee488db 1307 /* exclude 60M rate */
1308 active_rates = priv->rates_mask;
1309 active_rates &= ~IWL_RATE_60M_MASK;
1310
1311 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1312
c7c46676 1313 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1314 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1315 active_rate_basic, &left);
c7c46676
TW
1316 active_rates &= ~ret_rates;
1317
bb8c093b 1318 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1319 active_rate_basic, &left);
c7c46676
TW
1320 active_rates &= ~ret_rates;
1321
b481de9c
ZY
1322 len += 2 + *pos;
1323 pos += (*pos) + 1;
c7c46676 1324 if (active_rates == 0)
b481de9c
ZY
1325 goto fill_end;
1326
1327 /* fill in supported extended rate */
1328 /* ...next IE... */
1329 left -= 2;
1330 if (left < 0)
1331 return 0;
1332 /* ... fill it in... */
1333 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1334 *pos = 0;
bb8c093b 1335 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1336 active_rate_basic, &left);
b481de9c
ZY
1337 if (*pos > 0)
1338 len += 2 + *pos;
1339
b481de9c 1340 fill_end:
d1141dfb
EG
1341 /* fill in HT IE */
1342 left -= 2;
1343 if (left < 0)
1344 return 0;
1345
1346 *pos++ = WLAN_EID_HT_CAPABILITY;
1347 *pos = 0;
1348
1349 iwl_ht_cap_to_ie(sband, pos, &left);
1350
1351 if (*pos > 0)
1352 len += 2 + *pos;
b481de9c
ZY
1353 return (u16)len;
1354}
1355
1356/*
1357 * QoS support
1358*/
c79dd5b5 1359static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1360 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY
1361{
1362
857485c0 1363 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1364 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY
1365}
1366
c79dd5b5 1367static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
1368{
1369 unsigned long flags;
1370
b481de9c
ZY
1371 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1372 return;
1373
1374 if (!priv->qos_data.qos_enable)
1375 return;
1376
1377 spin_lock_irqsave(&priv->lock, flags);
1378 priv->qos_data.def_qos_parm.qos_flags = 0;
1379
1380 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1381 !priv->qos_data.qos_cap.q_AP.txop_request)
1382 priv->qos_data.def_qos_parm.qos_flags |=
1383 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
1384 if (priv->qos_data.qos_active)
1385 priv->qos_data.def_qos_parm.qos_flags |=
1386 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1387
c8b0e6e1 1388#ifdef CONFIG_IWL4965_HT
fd105e79 1389 if (priv->current_ht_config.is_ht)
f1f1f5c7 1390 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1391#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1392
b481de9c
ZY
1393 spin_unlock_irqrestore(&priv->lock, flags);
1394
3109ece1 1395 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
1396 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1397 priv->qos_data.qos_active,
1398 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1399
bb8c093b 1400 iwl4965_send_qos_params_command(priv,
b481de9c
ZY
1401 &(priv->qos_data.def_qos_parm));
1402 }
1403}
1404
c79dd5b5 1405int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
1406{
1407 /* Filter incoming packets to determine if they are targeted toward
1408 * this network, discarding packets coming from ourselves */
1409 switch (priv->iw_mode) {
1410 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1411 /* packets from our adapter are dropped (echo) */
1412 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1413 return 0;
1414 /* {broad,multi}cast packets to our IBSS go through */
1415 if (is_multicast_ether_addr(header->addr1))
1416 return !compare_ether_addr(header->addr3, priv->bssid);
1417 /* packets to our adapter go through */
1418 return !compare_ether_addr(header->addr1, priv->mac_addr);
1419 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1420 /* packets from our adapter are dropped (echo) */
1421 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1422 return 0;
1423 /* {broad,multi}cast packets to our BSS go through */
1424 if (is_multicast_ether_addr(header->addr1))
1425 return !compare_ether_addr(header->addr2, priv->bssid);
1426 /* packets to our adapter go through */
1427 return !compare_ether_addr(header->addr1, priv->mac_addr);
69dc5d9d
TW
1428 default:
1429 break;
b481de9c
ZY
1430 }
1431
1432 return 1;
1433}
1434
1435#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1436
bb8c093b 1437static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY
1438{
1439 switch (status & TX_STATUS_MSK) {
1440 case TX_STATUS_SUCCESS:
1441 return "SUCCESS";
1442 TX_STATUS_ENTRY(SHORT_LIMIT);
1443 TX_STATUS_ENTRY(LONG_LIMIT);
1444 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1445 TX_STATUS_ENTRY(MGMNT_ABORT);
1446 TX_STATUS_ENTRY(NEXT_FRAG);
1447 TX_STATUS_ENTRY(LIFE_EXPIRE);
1448 TX_STATUS_ENTRY(DEST_PS);
1449 TX_STATUS_ENTRY(ABORTED);
1450 TX_STATUS_ENTRY(BT_RETRY);
1451 TX_STATUS_ENTRY(STA_INVALID);
1452 TX_STATUS_ENTRY(FRAG_DROPPED);
1453 TX_STATUS_ENTRY(TID_DISABLE);
1454 TX_STATUS_ENTRY(FRAME_FLUSHED);
1455 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1456 TX_STATUS_ENTRY(TX_LOCKED);
1457 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1458 }
1459
1460 return "UNKNOWN";
1461}
1462
1463/**
bb8c093b 1464 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY
1465 *
1466 * NOTE: priv->mutex is not required before calling this function
1467 */
c79dd5b5 1468static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY
1469{
1470 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1471 clear_bit(STATUS_SCANNING, &priv->status);
1472 return 0;
1473 }
1474
1475 if (test_bit(STATUS_SCANNING, &priv->status)) {
1476 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1477 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1478 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1479 queue_work(priv->workqueue, &priv->abort_scan);
1480
1481 } else
1482 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1483
1484 return test_bit(STATUS_SCANNING, &priv->status);
1485 }
1486
1487 return 0;
1488}
1489
1490/**
bb8c093b 1491 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY
1492 * @ms: amount of time to wait (in milliseconds) for scan to abort
1493 *
1494 * NOTE: priv->mutex must be held before calling this function
1495 */
c79dd5b5 1496static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY
1497{
1498 unsigned long now = jiffies;
1499 int ret;
1500
bb8c093b 1501 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY
1502 if (ret && ms) {
1503 mutex_unlock(&priv->mutex);
1504 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1505 test_bit(STATUS_SCANNING, &priv->status))
1506 msleep(1);
1507 mutex_lock(&priv->mutex);
1508
1509 return test_bit(STATUS_SCANNING, &priv->status);
1510 }
1511
1512 return ret;
1513}
1514
c79dd5b5 1515static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY
1516{
1517 /* Reset ieee stats */
1518
1519 /* We don't reset the net_device_stats (ieee->stats) on
1520 * re-association */
1521
1522 priv->last_seq_num = -1;
1523 priv->last_frag_num = -1;
1524 priv->last_packet_time = 0;
1525
bb8c093b 1526 iwl4965_scan_cancel(priv);
b481de9c
ZY
1527}
1528
1529#define MAX_UCODE_BEACON_INTERVAL 4096
1530#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1531
bb8c093b 1532static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
1533{
1534 u16 new_val = 0;
1535 u16 beacon_factor = 0;
1536
1537 beacon_factor =
1538 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1539 / MAX_UCODE_BEACON_INTERVAL;
1540 new_val = beacon_val / beacon_factor;
1541
1542 return cpu_to_le16(new_val);
1543}
1544
c79dd5b5 1545static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
1546{
1547 u64 interval_tm_unit;
1548 u64 tsf, result;
1549 unsigned long flags;
1550 struct ieee80211_conf *conf = NULL;
1551 u16 beacon_int = 0;
1552
1553 conf = ieee80211_get_hw_conf(priv->hw);
1554
1555 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
1556 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
1557 priv->rxon_timing.timestamp.dw[0] =
1558 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY
1559
1560 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1561
3109ece1 1562 tsf = priv->timestamp;
b481de9c
ZY
1563
1564 beacon_int = priv->beacon_int;
1565 spin_unlock_irqrestore(&priv->lock, flags);
1566
1567 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1568 if (beacon_int == 0) {
1569 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1570 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1571 } else {
1572 priv->rxon_timing.beacon_interval =
1573 cpu_to_le16(beacon_int);
1574 priv->rxon_timing.beacon_interval =
bb8c093b 1575 iwl4965_adjust_beacon_interval(
b481de9c
ZY
1576 le16_to_cpu(priv->rxon_timing.beacon_interval));
1577 }
1578
1579 priv->rxon_timing.atim_window = 0;
1580 } else {
1581 priv->rxon_timing.beacon_interval =
bb8c093b 1582 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
1583 /* TODO: we need to get atim_window from upper stack
1584 * for now we set to 0 */
1585 priv->rxon_timing.atim_window = 0;
1586 }
1587
1588 interval_tm_unit =
1589 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1590 result = do_div(tsf, interval_tm_unit);
1591 priv->rxon_timing.beacon_init_val =
1592 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1593
1594 IWL_DEBUG_ASSOC
1595 ("beacon interval %d beacon timer %d beacon tim %d\n",
1596 le16_to_cpu(priv->rxon_timing.beacon_interval),
1597 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1598 le16_to_cpu(priv->rxon_timing.atim_window));
1599}
1600
c79dd5b5 1601static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY
1602{
1603 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1604 IWL_ERROR("APs don't scan.\n");
1605 return 0;
1606 }
1607
fee1247a 1608 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
1609 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1610 return -EIO;
1611 }
1612
1613 if (test_bit(STATUS_SCANNING, &priv->status)) {
1614 IWL_DEBUG_SCAN("Scan already in progress.\n");
1615 return -EAGAIN;
1616 }
1617
1618 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1619 IWL_DEBUG_SCAN("Scan request while abort pending. "
1620 "Queuing.\n");
1621 return -EAGAIN;
1622 }
1623
1624 IWL_DEBUG_INFO("Starting scan...\n");
1625 priv->scan_bands = 2;
1626 set_bit(STATUS_SCANNING, &priv->status);
1627 priv->scan_start = jiffies;
1628 priv->scan_pass_start = priv->scan_start;
1629
1630 queue_work(priv->workqueue, &priv->request_scan);
1631
1632 return 0;
1633}
1634
b481de9c 1635
c79dd5b5 1636static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 1637 enum ieee80211_band band)
b481de9c 1638{
8318d78a 1639 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
1640 priv->staging_rxon.flags &=
1641 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1642 | RXON_FLG_CCK_MSK);
1643 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1644 } else {
508e32e1 1645 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
1646 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1647 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1648 else
1649 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1650
1651 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
1652 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1653
1654 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1655 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1656 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1657 }
1658}
1659
1660/*
01ebd063 1661 * initialize rxon structure with default values from eeprom
b481de9c 1662 */
c79dd5b5 1663static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 1664{
bf85ea4f 1665 const struct iwl_channel_info *ch_info;
b481de9c
ZY
1666
1667 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1668
1669 switch (priv->iw_mode) {
1670 case IEEE80211_IF_TYPE_AP:
1671 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1672 break;
1673
1674 case IEEE80211_IF_TYPE_STA:
1675 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1676 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1677 break;
1678
1679 case IEEE80211_IF_TYPE_IBSS:
1680 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1681 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1682 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1683 RXON_FILTER_ACCEPT_GRP_MSK;
1684 break;
1685
1686 case IEEE80211_IF_TYPE_MNTR:
1687 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1688 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1689 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1690 break;
69dc5d9d
TW
1691 default:
1692 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
1693 break;
b481de9c
ZY
1694 }
1695
1696#if 0
1697 /* TODO: Figure out when short_preamble would be set and cache from
1698 * that */
1699 if (!hw_to_local(priv->hw)->short_preamble)
1700 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1701 else
1702 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1703#endif
1704
8622e705 1705 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY
1706 le16_to_cpu(priv->staging_rxon.channel));
1707
1708 if (!ch_info)
1709 ch_info = &priv->channel_info[0];
1710
1711 /*
1712 * in some case A channels are all non IBSS
1713 * in this case force B/G channel
1714 */
1715 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
1716 !(is_channel_ibss(ch_info)))
1717 ch_info = &priv->channel_info[0];
1718
1719 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 1720 priv->band = ch_info->band;
b481de9c 1721
8318d78a 1722 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY
1723
1724 priv->staging_rxon.ofdm_basic_rates =
1725 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1726 priv->staging_rxon.cck_basic_rates =
1727 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1728
1729 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1730 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1731 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1732 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1733 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1734 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1735 iwl4965_set_rxon_chain(priv);
1736}
1737
c79dd5b5 1738static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 1739{
b481de9c 1740 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 1741 const struct iwl_channel_info *ch_info;
b481de9c 1742
8622e705 1743 ch_info = iwl_get_channel_info(priv,
8318d78a 1744 priv->band,
b481de9c
ZY
1745 le16_to_cpu(priv->staging_rxon.channel));
1746
1747 if (!ch_info || !is_channel_ibss(ch_info)) {
1748 IWL_ERROR("channel %d not IBSS channel\n",
1749 le16_to_cpu(priv->staging_rxon.channel));
1750 return -EINVAL;
1751 }
1752 }
1753
b481de9c
ZY
1754 priv->iw_mode = mode;
1755
bb8c093b 1756 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
1757 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1758
bf85ea4f 1759 iwlcore_clear_stations_table(priv);
b481de9c 1760
fde3571f 1761 /* dont commit rxon if rf-kill is on*/
fee1247a 1762 if (!iwl_is_ready_rf(priv))
fde3571f
MA
1763 return -EAGAIN;
1764
1765 cancel_delayed_work(&priv->scan_check);
1766 if (iwl4965_scan_cancel_timeout(priv, 100)) {
1767 IWL_WARNING("Aborted scan still in progress after 100ms\n");
1768 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
1769 return -EAGAIN;
1770 }
1771
bb8c093b 1772 iwl4965_commit_rxon(priv);
b481de9c
ZY
1773
1774 return 0;
1775}
1776
c79dd5b5 1777static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 1778 struct ieee80211_tx_control *ctl,
857485c0 1779 struct iwl_cmd *cmd,
b481de9c 1780 struct sk_buff *skb_frag,
deb09c43 1781 int sta_id)
b481de9c 1782{
deb09c43 1783 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
6974e363
EG
1784 struct iwl_wep_key *wepkey;
1785 int keyidx = 0;
1786
1c014420 1787 BUG_ON(ctl->hw_key->hw_key_idx > 3);
b481de9c
ZY
1788
1789 switch (keyinfo->alg) {
1790 case ALG_CCMP:
1791 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
1792 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS
1793 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
1794 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY
1795 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
1796 break;
1797
1798 case ALG_TKIP:
b481de9c 1799 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG
1800 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
1801 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
1802 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY
1803 break;
1804
1805 case ALG_WEP:
1c014420 1806 wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx];
6974e363
EG
1807 cmd->cmd.tx.sec_ctl = 0;
1808 if (priv->default_wep_key) {
1809 /* the WEP key was sent as static */
1c014420 1810 keyidx = ctl->hw_key->hw_key_idx;
6974e363
EG
1811 memcpy(&cmd->cmd.tx.key[3], wepkey->key,
1812 wepkey->key_size);
1813 if (wepkey->key_size == WEP_KEY_LEN_128)
1814 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
1815 } else {
0211ddda
EG
1816 /* the WEP key was sent as dynamic */
1817 keyidx = keyinfo->keyidx;
1818 memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
1819 keyinfo->keylen);
1820 if (keyinfo->keylen == WEP_KEY_LEN_128)
1821 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
6974e363 1822 }
b481de9c 1823
6974e363
EG
1824 cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
1825 (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
b481de9c
ZY
1826
1827 IWL_DEBUG_TX("Configuring packet for WEP encryption "
6974e363 1828 "with key %d\n", keyidx);
b481de9c
ZY
1829 break;
1830
b481de9c
ZY
1831 default:
1832 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
1833 break;
1834 }
1835}
1836
1837/*
1838 * handle build REPLY_TX command notification.
1839 */
c79dd5b5 1840static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 1841 struct iwl_cmd *cmd,
b481de9c
ZY
1842 struct ieee80211_tx_control *ctrl,
1843 struct ieee80211_hdr *hdr,
1844 int is_unicast, u8 std_id)
1845{
1846 __le16 *qc;
1847 u16 fc = le16_to_cpu(hdr->frame_control);
1848 __le32 tx_flags = cmd->cmd.tx.tx_flags;
1849
1850 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1851 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
1852 tx_flags |= TX_CMD_FLG_ACK_MSK;
1853 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
1854 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1855 if (ieee80211_is_probe_response(fc) &&
1856 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1857 tx_flags |= TX_CMD_FLG_TSF_MSK;
1858 } else {
1859 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1860 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1861 }
1862
87e4f7df
TW
1863 if (ieee80211_is_back_request(fc))
1864 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1865
1866
b481de9c
ZY
1867 cmd->cmd.tx.sta_id = std_id;
1868 if (ieee80211_get_morefrag(hdr))
1869 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1870
1871 qc = ieee80211_get_qos_ctrl(hdr);
1872 if (qc) {
1873 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
1874 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1875 } else
1876 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1877
1878 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
1879 tx_flags |= TX_CMD_FLG_RTS_MSK;
1880 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
1881 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
1882 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1883 tx_flags |= TX_CMD_FLG_CTS_MSK;
1884 }
1885
1886 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
1887 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
1888
1889 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1890 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1891 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
1892 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 1893 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 1894 else
bc434dd2 1895 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 1896 } else {
b481de9c 1897 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
ab53d8af 1898 }
b481de9c
ZY
1899
1900 cmd->cmd.tx.driver_txop = 0;
1901 cmd->cmd.tx.tx_flags = tx_flags;
1902 cmd->cmd.tx.next_frame_len = 0;
1903}
19758bef
TW
1904static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
1905{
1906 /* 0 - mgmt, 1 - cnt, 2 - data */
1907 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
1908 priv->tx_stats[idx].cnt++;
1909 priv->tx_stats[idx].bytes += len;
1910}
6440adb5
BC
1911/**
1912 * iwl4965_get_sta_id - Find station's index within station table
1913 *
1914 * If new IBSS station, create new entry in station table
1915 */
c79dd5b5 1916static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 1917 struct ieee80211_hdr *hdr)
b481de9c
ZY
1918{
1919 int sta_id;
1920 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 1921 DECLARE_MAC_BUF(mac);
b481de9c 1922
6440adb5 1923 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
1924 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
1925 is_multicast_ether_addr(hdr->addr1))
5425e490 1926 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1927
1928 switch (priv->iw_mode) {
1929
6440adb5
BC
1930 /* If we are a client station in a BSS network, use the special
1931 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY
1932 case IEEE80211_IF_TYPE_STA:
1933 return IWL_AP_ID;
1934
1935 /* If we are an AP, then find the station, or use BCAST */
1936 case IEEE80211_IF_TYPE_AP:
947b13a7 1937 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY
1938 if (sta_id != IWL_INVALID_STATION)
1939 return sta_id;
5425e490 1940 return priv->hw_params.bcast_sta_id;
b481de9c 1941
6440adb5
BC
1942 /* If this frame is going out to an IBSS network, find the station,
1943 * or create a new station table entry */
b481de9c 1944 case IEEE80211_IF_TYPE_IBSS:
947b13a7 1945 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY
1946 if (sta_id != IWL_INVALID_STATION)
1947 return sta_id;
1948
6440adb5 1949 /* Create new station table entry */
67d62035
RR
1950 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
1951 0, CMD_ASYNC, NULL);
b481de9c
ZY
1952
1953 if (sta_id != IWL_INVALID_STATION)
1954 return sta_id;
1955
0795af57 1956 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 1957 "Defaulting to broadcast...\n",
0795af57 1958 print_mac(mac, hdr->addr1));
0a6857e7 1959 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
5425e490 1960 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1961
1962 default:
01ebd063 1963 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
5425e490 1964 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1965 }
1966}
1967
1968/*
1969 * start REPLY_TX command process
1970 */
c79dd5b5 1971static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY
1972 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
1973{
1974 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 1975 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY
1976 u32 *control_flags;
1977 int txq_id = ctl->queue;
bb8c093b
CH
1978 struct iwl4965_tx_queue *txq = NULL;
1979 struct iwl4965_queue *q = NULL;
b481de9c
ZY
1980 dma_addr_t phys_addr;
1981 dma_addr_t txcmd_phys;
87e4f7df 1982 dma_addr_t scratch_phys;
857485c0 1983 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
1984 u16 len, idx, len_org;
1985 u8 id, hdr_len, unicast;
1986 u8 sta_id;
1987 u16 seq_number = 0;
1988 u16 fc;
1989 __le16 *qc;
1990 u8 wait_write_ptr = 0;
1991 unsigned long flags;
1992 int rc;
1993
1994 spin_lock_irqsave(&priv->lock, flags);
fee1247a 1995 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
1996 IWL_DEBUG_DROP("Dropping - RF KILL\n");
1997 goto drop_unlock;
1998 }
1999
32bfd35d
JB
2000 if (!priv->vif) {
2001 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY
2002 goto drop_unlock;
2003 }
2004
8318d78a 2005 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY
2006 IWL_ERROR("ERROR: No TX rate available.\n");
2007 goto drop_unlock;
2008 }
2009
2010 unicast = !is_multicast_ether_addr(hdr->addr1);
2011 id = 0;
2012
2013 fc = le16_to_cpu(hdr->frame_control);
2014
0a6857e7 2015#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2016 if (ieee80211_is_auth(fc))
2017 IWL_DEBUG_TX("Sending AUTH frame\n");
2018 else if (ieee80211_is_assoc_request(fc))
2019 IWL_DEBUG_TX("Sending ASSOC frame\n");
2020 else if (ieee80211_is_reassoc_request(fc))
2021 IWL_DEBUG_TX("Sending REASSOC frame\n");
2022#endif
2023
7878a5a4 2024 /* drop all data frame if we are not associated */
76f3915b 2025 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
3109ece1 2026 (!iwl_is_associated(priv) ||
a6477249 2027 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2028 !priv->assoc_station_added)) {
3109ece1 2029 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY
2030 goto drop_unlock;
2031 }
2032
2033 spin_unlock_irqrestore(&priv->lock, flags);
2034
2035 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
BC
2036
2037 /* Find (or create) index into station table for destination station */
bb8c093b 2038 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2039 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP
2040 DECLARE_MAC_BUF(mac);
2041
2042 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2043 print_mac(mac, hdr->addr1));
b481de9c
ZY
2044 goto drop;
2045 }
2046
2047 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2048
2049 qc = ieee80211_get_qos_ctrl(hdr);
2050 if (qc) {
2051 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2052 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2053 IEEE80211_SCTL_SEQ;
2054 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2055 (hdr->seq_ctrl &
2056 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2057 seq_number += 0x10;
c8b0e6e1 2058#ifdef CONFIG_IWL4965_HT
b481de9c 2059 /* aggregation is on for this <sta,tid> */
fe01b477 2060 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2061 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2062 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2063#endif /* CONFIG_IWL4965_HT */
b481de9c 2064 }
6440adb5
BC
2065
2066 /* Descriptor for chosen Tx queue */
b481de9c
ZY
2067 txq = &priv->txq[txq_id];
2068 q = &txq->q;
2069
2070 spin_lock_irqsave(&priv->lock, flags);
2071
6440adb5 2072 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2073 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY
2074 memset(tfd, 0, sizeof(*tfd));
2075 control_flags = (u32 *) tfd;
fc4b6853 2076 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2077
6440adb5 2078 /* Set up driver data for this TFD */
bb8c093b 2079 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW
2080 txq->txb[q->write_ptr].skb[0] = skb;
2081 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2082 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
BC
2083
2084 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY
2085 out_cmd = &txq->cmd[idx];
2086 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2087 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
BC
2088
2089 /*
2090 * Set up the Tx-command (not MAC!) header.
2091 * Store the chosen Tx queue and TFD index within the sequence field;
2092 * after Tx, uCode's Tx response will return this value so driver can
2093 * locate the frame within the tx queue and do post-tx processing.
2094 */
b481de9c
ZY
2095 out_cmd->hdr.cmd = REPLY_TX;
2096 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2097 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC
2098
2099 /* Copy MAC header from skb into command buffer */
b481de9c
ZY
2100 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2101
6440adb5
BC
2102 /*
2103 * Use the first empty entry in this queue's command buffer array
2104 * to contain the Tx command and MAC header concatenated together
2105 * (payload data will be in another buffer).
2106 * Size of this varies, due to varying MAC header length.
2107 * If end is not dword aligned, we'll have 2 extra bytes at the end
2108 * of the MAC header (device reads on dword boundaries).
2109 * We'll tell device about this padding later.
2110 */
5425e490 2111 len = priv->hw_params.tx_cmd_len +
857485c0 2112 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
2113
2114 len_org = len;
2115 len = (len + 3) & ~3;
2116
2117 if (len_org != len)
2118 len_org = 1;
2119 else
2120 len_org = 0;
2121
6440adb5
BC
2122 /* Physical address of this Tx command's header (not MAC header!),
2123 * within command buffer array. */
857485c0
TW
2124 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2125 offsetof(struct iwl_cmd, hdr);
b481de9c 2126
6440adb5
BC
2127 /* Add buffer containing Tx command and MAC(!) header to TFD's
2128 * first entry */
bb8c093b 2129 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY
2130
2131 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2132 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2133
6440adb5
BC
2134 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2135 * if any (802.11 null frames have no payload). */
b481de9c
ZY
2136 len = skb->len - hdr_len;
2137 if (len) {
2138 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2139 len, PCI_DMA_TODEVICE);
bb8c093b 2140 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY
2141 }
2142
6440adb5 2143 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY
2144 if (len_org)
2145 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2146
6440adb5 2147 /* Total # bytes to be transmitted */
b481de9c
ZY
2148 len = (u16)skb->len;
2149 out_cmd->cmd.tx.len = cpu_to_le16(len);
2150
2151 /* TODO need this for burst mode later on */
bb8c093b 2152 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY
2153
2154 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2155 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2156
19758bef
TW
2157 iwl_update_tx_stats(priv, fc, len);
2158
857485c0 2159 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW
2160 offsetof(struct iwl4965_tx_cmd, scratch);
2161 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2162 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2163
b481de9c
ZY
2164 if (!ieee80211_get_morefrag(hdr)) {
2165 txq->need_update = 1;
2166 if (qc) {
2167 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2168 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2169 }
2170 } else {
2171 wait_write_ptr = 1;
2172 txq->need_update = 0;
2173 }
2174
0a6857e7 2175 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY
2176 sizeof(out_cmd->cmd.tx));
2177
0a6857e7 2178 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY
2179 ieee80211_get_hdrlen(fc));
2180
6440adb5 2181 /* Set up entry for this TFD in Tx byte-count array */
e2a722eb 2182 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
b481de9c 2183
6440adb5 2184 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2185 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2186 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
2187 spin_unlock_irqrestore(&priv->lock, flags);
2188
2189 if (rc)
2190 return rc;
2191
bb8c093b 2192 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY
2193 && priv->mac80211_registered) {
2194 if (wait_write_ptr) {
2195 spin_lock_irqsave(&priv->lock, flags);
2196 txq->need_update = 1;
bb8c093b 2197 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
2198 spin_unlock_irqrestore(&priv->lock, flags);
2199 }
2200
2201 ieee80211_stop_queue(priv->hw, ctl->queue);
2202 }
2203
2204 return 0;
2205
2206drop_unlock:
2207 spin_unlock_irqrestore(&priv->lock, flags);
2208drop:
2209 return -1;
2210}
2211
c79dd5b5 2212static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2213{
8318d78a 2214 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
2215 struct ieee80211_rate *rate;
2216 int i;
2217
d1141dfb 2218 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
2219 if (!hw) {
2220 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2221 return;
2222 }
b481de9c
ZY
2223
2224 priv->active_rate = 0;
2225 priv->active_rate_basic = 0;
2226
8318d78a
JB
2227 for (i = 0; i < hw->n_bitrates; i++) {
2228 rate = &(hw->bitrates[i]);
2229 if (rate->hw_value < IWL_RATE_COUNT)
2230 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
2231 }
2232
2233 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2234 priv->active_rate, priv->active_rate_basic);
2235
2236 /*
2237 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2238 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2239 * OFDM
2240 */
2241 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2242 priv->staging_rxon.cck_basic_rates =
2243 ((priv->active_rate_basic &
2244 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2245 else
2246 priv->staging_rxon.cck_basic_rates =
2247 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2248
2249 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2250 priv->staging_rxon.ofdm_basic_rates =
2251 ((priv->active_rate_basic &
2252 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2253 IWL_FIRST_OFDM_RATE) & 0xFF;
2254 else
2255 priv->staging_rxon.ofdm_basic_rates =
2256 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2257}
2258
ad97edd2 2259void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY
2260{
2261 unsigned long flags;
2262
2263 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2264 return;
2265
2266 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2267 disable_radio ? "OFF" : "ON");
2268
2269 if (disable_radio) {
bb8c093b 2270 iwl4965_scan_cancel(priv);
b481de9c
ZY
2271 /* FIXME: This is a workaround for AP */
2272 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2273 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2274 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
2275 CSR_UCODE_SW_BIT_RFKILL);
2276 spin_unlock_irqrestore(&priv->lock, flags);
ad97edd2 2277 /* call the host command only if no hw rf-kill set */
59003835
MA
2278 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
2279 iwl_is_ready(priv))
ad97edd2
MA
2280 iwl4965_send_card_state(priv,
2281 CARD_STATE_CMD_DISABLE,
2282 0);
b481de9c 2283 set_bit(STATUS_RF_KILL_SW, &priv->status);
ad97edd2
MA
2284
2285 /* make sure mac80211 stop sending Tx frame */
2286 if (priv->mac80211_registered)
2287 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2288 }
2289 return;
2290 }
2291
2292 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2293 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2294
2295 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2296 spin_unlock_irqrestore(&priv->lock, flags);
2297
2298 /* wake up ucode */
2299 msleep(10);
2300
2301 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2302 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2303 if (!iwl_grab_nic_access(priv))
2304 iwl_release_nic_access(priv);
b481de9c
ZY
2305 spin_unlock_irqrestore(&priv->lock, flags);
2306
2307 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2308 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2309 "disabled by HW switch\n");
2310 return;
2311 }
2312
2313 queue_work(priv->workqueue, &priv->restart);
2314 return;
2315}
2316
b481de9c
ZY
2317#define IWL_PACKET_RETRY_TIME HZ
2318
c79dd5b5 2319int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
2320{
2321 u16 sc = le16_to_cpu(header->seq_ctrl);
2322 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2323 u16 frag = sc & IEEE80211_SCTL_FRAG;
2324 u16 *last_seq, *last_frag;
2325 unsigned long *last_time;
2326
2327 switch (priv->iw_mode) {
2328 case IEEE80211_IF_TYPE_IBSS:{
2329 struct list_head *p;
bb8c093b 2330 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY
2331 u8 *mac = header->addr2;
2332 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2333
2334 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2335 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY
2336 if (!compare_ether_addr(entry->mac, mac))
2337 break;
2338 }
2339 if (p == &priv->ibss_mac_hash[index]) {
2340 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2341 if (!entry) {
bc434dd2 2342 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY
2343 return 0;
2344 }
2345 memcpy(entry->mac, mac, ETH_ALEN);
2346 entry->seq_num = seq;
2347 entry->frag_num = frag;
2348 entry->packet_time = jiffies;
bc434dd2 2349 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY
2350 return 0;
2351 }
2352 last_seq = &entry->seq_num;
2353 last_frag = &entry->frag_num;
2354 last_time = &entry->packet_time;
2355 break;
2356 }
2357 case IEEE80211_IF_TYPE_STA:
2358 last_seq = &priv->last_seq_num;
2359 last_frag = &priv->last_frag_num;
2360 last_time = &priv->last_packet_time;
2361 break;
2362 default:
2363 return 0;
2364 }
2365 if ((*last_seq == seq) &&
2366 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2367 if (*last_frag == frag)
2368 goto drop;
2369 if (*last_frag + 1 != frag)
2370 /* out-of-order fragment */
2371 goto drop;
2372 } else
2373 *last_seq = seq;
2374
2375 *last_frag = frag;
2376 *last_time = jiffies;
2377 return 0;
2378
2379 drop:
2380 return 1;
2381}
2382
c8b0e6e1 2383#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
2384
2385#include "iwl-spectrum.h"
2386
2387#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2388#define BEACON_TIME_MASK_HIGH 0xFF000000
2389#define TIME_UNIT 1024
2390
2391/*
2392 * extended beacon time format
2393 * time in usec will be changed into a 32-bit value in 8:24 format
2394 * the high 1 byte is the beacon counts
2395 * the lower 3 bytes is the time in usec within one beacon interval
2396 */
2397
bb8c093b 2398static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
2399{
2400 u32 quot;
2401 u32 rem;
2402 u32 interval = beacon_interval * 1024;
2403
2404 if (!interval || !usec)
2405 return 0;
2406
2407 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2408 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2409
2410 return (quot << 24) + rem;
2411}
2412
2413/* base is usually what we get from ucode with each received frame,
2414 * the same as HW timer counter counting down
2415 */
2416
bb8c093b 2417static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
2418{
2419 u32 base_low = base & BEACON_TIME_MASK_LOW;
2420 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2421 u32 interval = beacon_interval * TIME_UNIT;
2422 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2423 (addon & BEACON_TIME_MASK_HIGH);
2424
2425 if (base_low > addon_low)
2426 res += base_low - addon_low;
2427 else if (base_low < addon_low) {
2428 res += interval + base_low - addon_low;
2429 res += (1 << 24);
2430 } else
2431 res += (1 << 24);
2432
2433 return cpu_to_le32(res);
2434}
2435
c79dd5b5 2436static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
2437 struct ieee80211_measurement_params *params,
2438 u8 type)
2439{
bb8c093b
CH
2440 struct iwl4965_spectrum_cmd spectrum;
2441 struct iwl4965_rx_packet *res;
857485c0 2442 struct iwl_host_cmd cmd = {
b481de9c
ZY
2443 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2444 .data = (void *)&spectrum,
2445 .meta.flags = CMD_WANT_SKB,
2446 };
2447 u32 add_time = le64_to_cpu(params->start_time);
2448 int rc;
2449 int spectrum_resp_status;
2450 int duration = le16_to_cpu(params->duration);
2451
3109ece1 2452 if (iwl_is_associated(priv))
b481de9c 2453 add_time =
bb8c093b 2454 iwl4965_usecs_to_beacons(
b481de9c
ZY
2455 le64_to_cpu(params->start_time) - priv->last_tsf,
2456 le16_to_cpu(priv->rxon_timing.beacon_interval));
2457
2458 memset(&spectrum, 0, sizeof(spectrum));
2459
2460 spectrum.channel_count = cpu_to_le16(1);
2461 spectrum.flags =
2462 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2463 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2464 cmd.len = sizeof(spectrum);
2465 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2466
3109ece1 2467 if (iwl_is_associated(priv))
b481de9c 2468 spectrum.start_time =
bb8c093b 2469 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
2470 add_time,
2471 le16_to_cpu(priv->rxon_timing.beacon_interval));
2472 else
2473 spectrum.start_time = 0;
2474
2475 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2476 spectrum.channels[0].channel = params->channel;
2477 spectrum.channels[0].type = type;
2478 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2479 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2480 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2481
857485c0 2482 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
2483 if (rc)
2484 return rc;
2485
bb8c093b 2486 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
2487 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2488 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2489 rc = -EIO;
2490 }
2491
2492 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2493 switch (spectrum_resp_status) {
2494 case 0: /* Command will be handled */
2495 if (res->u.spectrum.id != 0xff) {
2496 IWL_DEBUG_INFO
2497 ("Replaced existing measurement: %d\n",
2498 res->u.spectrum.id);
2499 priv->measurement_status &= ~MEASUREMENT_READY;
2500 }
2501 priv->measurement_status |= MEASUREMENT_ACTIVE;
2502 rc = 0;
2503 break;
2504
2505 case 1: /* Command will not be handled */
2506 rc = -EAGAIN;
2507 break;
2508 }
2509
2510 dev_kfree_skb_any(cmd.meta.u.skb);
2511
2512 return rc;
2513}
2514#endif
2515
c79dd5b5 2516static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2517 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY
2518{
2519
2520 tx_sta->status.ack_signal = 0;
2521 tx_sta->status.excessive_retries = 0;
2522 tx_sta->status.queue_length = 0;
2523 tx_sta->status.queue_number = 0;
2524
2525 if (in_interrupt())
2526 ieee80211_tx_status_irqsafe(priv->hw,
2527 tx_sta->skb[0], &(tx_sta->status));
2528 else
2529 ieee80211_tx_status(priv->hw,
2530 tx_sta->skb[0], &(tx_sta->status));
2531
2532 tx_sta->skb[0] = NULL;
2533}
2534
2535/**
6440adb5 2536 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2537 *
6440adb5
BC
2538 * When FW advances 'R' index, all entries between old and new 'R' index
2539 * need to be reclaimed. As result, some free space forms. If there is
2540 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2541 */
c79dd5b5 2542int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2543{
bb8c093b
CH
2544 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2545 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY
2546 int nfreed = 0;
2547
2548 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2549 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2550 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2551 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY
2552 return 0;
2553 }
2554
c54b679d 2555 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2556 q->read_ptr != index;
c54b679d 2557 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2558 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2559 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2560 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2561 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY
2562 } else if (nfreed > 1) {
2563 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2564 q->write_ptr, q->read_ptr);
b481de9c
ZY
2565 queue_work(priv->workqueue, &priv->restart);
2566 }
2567 nfreed++;
2568 }
2569
fe01b477 2570/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY
2571 (txq_id != IWL_CMD_QUEUE_NUM) &&
2572 priv->mac80211_registered)
fe01b477 2573 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY
2574
2575
2576 return nfreed;
2577}
2578
bb8c093b 2579static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY
2580{
2581 status &= TX_STATUS_MSK;
2582 return (status == TX_STATUS_SUCCESS)
2583 || (status == TX_STATUS_DIRECT_DONE);
2584}
2585
2586/******************************************************************************
2587 *
2588 * Generic RX handler implementations
2589 *
2590 ******************************************************************************/
c8b0e6e1 2591#ifdef CONFIG_IWL4965_HT
b481de9c 2592
c79dd5b5 2593static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY
2594 struct ieee80211_hdr *hdr)
2595{
2596 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2597 return IWL_AP_ID;
2598 else {
2599 u8 *da = ieee80211_get_DA(hdr);
947b13a7 2600 return iwl_find_station(priv, da);
b481de9c
ZY
2601 }
2602}
2603
bb8c093b 2604static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2605 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY
2606{
2607 if (priv->txq[txq_id].txb[idx].skb[0])
2608 return (struct ieee80211_hdr *)priv->txq[txq_id].
2609 txb[idx].skb[0]->data;
2610 return NULL;
2611}
2612
bb8c093b 2613static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY
2614{
2615 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2616 tx_resp->frame_count);
2617 return le32_to_cpu(*scd_ssn) & MAX_SN;
2618
2619}
6440adb5
BC
2620
2621/**
2622 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2623 */
c79dd5b5 2624static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2625 struct iwl4965_ht_agg *agg,
fe01b477 2626 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY
2627 u16 start_idx)
2628{
fe01b477
RR
2629 u16 status;
2630 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY
2631 struct ieee80211_tx_status *tx_status = NULL;
2632 struct ieee80211_hdr *hdr = NULL;
2633 int i, sh;
2634 int txq_id, idx;
2635 u16 seq;
2636
2637 if (agg->wait_for_ba)
6440adb5 2638 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY
2639
2640 agg->frame_count = tx_resp->frame_count;
2641 agg->start_idx = start_idx;
2642 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2643 agg->bitmap = 0;
b481de9c 2644
6440adb5 2645 /* # frames attempted by Tx command */
b481de9c 2646 if (agg->frame_count == 1) {
6440adb5 2647 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR
2648 status = le16_to_cpu(frame_status[0].status);
2649 seq = le16_to_cpu(frame_status[0].sequence);
2650 idx = SEQ_TO_INDEX(seq);
2651 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 2652
b481de9c 2653 /* FIXME: code repetition */
fe01b477
RR
2654 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2655 agg->frame_count, agg->start_idx, idx);
b481de9c 2656
fe01b477 2657 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY
2658 tx_status->retry_count = tx_resp->failure_frame;
2659 tx_status->queue_number = status & 0xff;
fe01b477
RR
2660 tx_status->queue_length = tx_resp->failure_rts;
2661 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 2662 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 2663 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR
2664 iwl4965_hwrate_to_tx_control(priv,
2665 le32_to_cpu(tx_resp->rate_n_flags),
2666 &tx_status->control);
b481de9c
ZY
2667 /* FIXME: code repetition end */
2668
2669 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2670 status & 0xff, tx_resp->failure_frame);
2671 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 2672 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY
2673
2674 agg->wait_for_ba = 0;
2675 } else {
6440adb5 2676 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY
2677 u64 bitmap = 0;
2678 int start = agg->start_idx;
2679
6440adb5 2680 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY
2681 for (i = 0; i < agg->frame_count; i++) {
2682 u16 sc;
fe01b477
RR
2683 status = le16_to_cpu(frame_status[i].status);
2684 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY
2685 idx = SEQ_TO_INDEX(seq);
2686 txq_id = SEQ_TO_QUEUE(seq);
2687
2688 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2689 AGG_TX_STATE_ABORT_MSK))
2690 continue;
2691
2692 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2693 agg->frame_count, txq_id, idx);
2694
bb8c093b 2695 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY
2696
2697 sc = le16_to_cpu(hdr->seq_ctrl);
2698 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2699 IWL_ERROR("BUG_ON idx doesn't match seq control"
2700 " idx=%d, seq_idx=%d, seq=%d\n",
2701 idx, SEQ_TO_SN(sc),
2702 hdr->seq_ctrl);
2703 return -1;
2704 }
2705
2706 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2707 i, idx, SEQ_TO_SN(sc));
2708
2709 sh = idx - start;
2710 if (sh > 64) {
2711 sh = (start - idx) + 0xff;
2712 bitmap = bitmap << sh;
2713 sh = 0;
2714 start = idx;
2715 } else if (sh < -64)
2716 sh = 0xff - (start - idx);
2717 else if (sh < 0) {
2718 sh = start - idx;
2719 start = idx;
2720 bitmap = bitmap << sh;
2721 sh = 0;
2722 }
2723 bitmap |= (1 << sh);
2724 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2725 start, (u32)(bitmap & 0xFFFFFFFF));
2726 }
2727
fe01b477 2728 agg->bitmap = bitmap;
b481de9c
ZY
2729 agg->start_idx = start;
2730 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2731 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 2732 agg->frame_count, agg->start_idx,
06501d29 2733 (unsigned long long)agg->bitmap);
b481de9c
ZY
2734
2735 if (bitmap)
2736 agg->wait_for_ba = 1;
2737 }
2738 return 0;
2739}
2740#endif
b481de9c 2741
6440adb5
BC
2742/**
2743 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2744 */
c79dd5b5 2745static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 2746 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2747{
bb8c093b 2748 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2749 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2750 int txq_id = SEQ_TO_QUEUE(sequence);
2751 int index = SEQ_TO_INDEX(sequence);
bb8c093b 2752 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 2753 struct ieee80211_tx_status *tx_status;
bb8c093b 2754 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 2755 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 2756#ifdef CONFIG_IWL4965_HT
fe01b477
RR
2757 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2758 struct ieee80211_hdr *hdr;
2759 __le16 *qc;
b481de9c
ZY
2760#endif
2761
2762 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
2763 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2764 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW
2765 index, txq->q.n_bd, txq->q.write_ptr,
2766 txq->q.read_ptr);
b481de9c
ZY
2767 return;
2768 }
2769
c8b0e6e1 2770#ifdef CONFIG_IWL4965_HT
fe01b477
RR
2771 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
2772 qc = ieee80211_get_qos_ctrl(hdr);
2773
2774 if (qc)
2775 tid = le16_to_cpu(*qc) & 0xf;
2776
2777 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
2778 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2779 IWL_ERROR("Station not known\n");
2780 return;
2781 }
2782
b481de9c 2783 if (txq->sched_retry) {
bb8c093b 2784 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 2785 struct iwl4965_ht_agg *agg = NULL;
b481de9c 2786
fe01b477 2787 if (!qc)
b481de9c 2788 return;
b481de9c
ZY
2789
2790 agg = &priv->stations[sta_id].tid[tid].agg;
2791
fe01b477
RR
2792 iwl4965_tx_status_reply_tx(priv, agg,
2793 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY
2794
2795 if ((tx_resp->frame_count == 1) &&
bb8c093b 2796 !iwl4965_is_tx_success(status)) {
b481de9c
ZY
2797 /* TODO: send BAR */
2798 }
2799
fe01b477
RR
2800 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2801 int freed;
c54b679d 2802 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY
2803 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2804 "%d index %d\n", scd_ssn , index);
fe01b477
RR
2805 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2806 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2807
2808 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2809 txq_id >= 0 && priv->mac80211_registered &&
2810 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
2811 ieee80211_wake_queue(priv->hw, txq_id);
2812
2813 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY
2814 }
2815 } else {
c8b0e6e1 2816#endif /* CONFIG_IWL4965_HT */
fc4b6853 2817 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY
2818
2819 tx_status->retry_count = tx_resp->failure_frame;
2820 tx_status->queue_number = status;
2821 tx_status->queue_length = tx_resp->bt_kill_count;
2822 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 2823 tx_status->flags =
bb8c093b 2824 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR
2825 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
2826 &tx_status->control);
b481de9c 2827
b481de9c 2828 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 2829 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY
2830 status, le32_to_cpu(tx_resp->rate_n_flags),
2831 tx_resp->failure_frame);
2832
2833 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR
2834 if (index != -1) {
2835 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2836#ifdef CONFIG_IWL4965_HT
2837 if (tid != MAX_TID_COUNT)
2838 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2839 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2840 (txq_id >= 0) &&
2841 priv->mac80211_registered)
2842 ieee80211_wake_queue(priv->hw, txq_id);
2843 if (tid != MAX_TID_COUNT)
2844 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
2845#endif
2846 }
c8b0e6e1 2847#ifdef CONFIG_IWL4965_HT
b481de9c 2848 }
c8b0e6e1 2849#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY
2850
2851 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2852 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2853}
2854
2855
c79dd5b5 2856static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 2857 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2858{
bb8c093b
CH
2859 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2860 struct iwl4965_alive_resp *palive;
b481de9c
ZY
2861 struct delayed_work *pwork;
2862
2863 palive = &pkt->u.alive_frame;
2864
2865 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2866 "0x%01X 0x%01X\n",
2867 palive->is_valid, palive->ver_type,
2868 palive->ver_subtype);
2869
2870 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2871 IWL_DEBUG_INFO("Initialization Alive received.\n");
2872 memcpy(&priv->card_alive_init,
2873 &pkt->u.alive_frame,
bb8c093b 2874 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY
2875 pwork = &priv->init_alive_start;
2876 } else {
2877 IWL_DEBUG_INFO("Runtime Alive received.\n");
2878 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 2879 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
2880 pwork = &priv->alive_start;
2881 }
2882
2883 /* We delay the ALIVE response by 5ms to
2884 * give the HW RF Kill time to activate... */
2885 if (palive->is_valid == UCODE_VALID_OK)
2886 queue_delayed_work(priv->workqueue, pwork,
2887 msecs_to_jiffies(5));
2888 else
2889 IWL_WARNING("uCode did not respond OK.\n");
2890}
2891
c79dd5b5 2892static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 2893 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2894{
bb8c093b 2895 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2896
2897 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2898 return;
2899}
2900
c79dd5b5 2901static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 2902 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2903{
bb8c093b 2904 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2905
2906 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2907 "seq 0x%04X ser 0x%08X\n",
2908 le32_to_cpu(pkt->u.err_resp.error_type),
2909 get_cmd_string(pkt->u.err_resp.cmd_id),
2910 pkt->u.err_resp.cmd_id,
2911 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2912 le32_to_cpu(pkt->u.err_resp.error_info));
2913}
2914
2915#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2916
c79dd5b5 2917static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2918{
bb8c093b
CH
2919 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2920 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
2921 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
2922 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2923 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2924 rxon->channel = csa->channel;
2925 priv->staging_rxon.channel = csa->channel;
2926}
2927
c79dd5b5 2928static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 2929 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2930{
c8b0e6e1 2931#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH
2932 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2933 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
2934
2935 if (!report->state) {
2936 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2937 "Spectrum Measure Notification: Start\n");
2938 return;
2939 }
2940
2941 memcpy(&priv->measure_report, report, sizeof(*report));
2942 priv->measurement_status |= MEASUREMENT_READY;
2943#endif
2944}
2945
c79dd5b5 2946static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 2947 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2948{
0a6857e7 2949#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
2950 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2951 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
2952 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2953 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2954#endif
2955}
2956
c79dd5b5 2957static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 2958 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2959{
bb8c093b 2960 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2961 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2962 "notification for %s:\n",
2963 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 2964 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
2965}
2966
bb8c093b 2967static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 2968{
c79dd5b5
TW
2969 struct iwl_priv *priv =
2970 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
2971 struct sk_buff *beacon;
2972
2973 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 2974 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY
2975
2976 if (!beacon) {
2977 IWL_ERROR("update beacon failed\n");
2978 return;
2979 }
2980
2981 mutex_lock(&priv->mutex);
2982 /* new beacon skb is allocated every time; dispose previous.*/
2983 if (priv->ibss_beacon)
2984 dev_kfree_skb(priv->ibss_beacon);
2985
2986 priv->ibss_beacon = beacon;
2987 mutex_unlock(&priv->mutex);
2988
bb8c093b 2989 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2990}
2991
c79dd5b5 2992static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 2993 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2994{
0a6857e7 2995#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
2996 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2997 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
2998 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
2999
3000 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3001 "tsf %d %d rate %d\n",
3002 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3003 beacon->beacon_notify_hdr.failure_frame,
3004 le32_to_cpu(beacon->ibss_mgr_status),
3005 le32_to_cpu(beacon->high_tsf),
3006 le32_to_cpu(beacon->low_tsf), rate);
3007#endif
3008
3009 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3010 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3011 queue_work(priv->workqueue, &priv->beacon_update);
3012}
3013
3014/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3015static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3016 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3017{
0a6857e7 3018#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
3019 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3020 struct iwl4965_scanreq_notification *notif =
3021 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY
3022
3023 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3024#endif
3025}
3026
3027/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3028static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3029 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3030{
bb8c093b
CH
3031 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3032 struct iwl4965_scanstart_notification *notif =
3033 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY
3034 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3035 IWL_DEBUG_SCAN("Scan start: "
3036 "%d [802.11%s] "
3037 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3038 notif->channel,
3039 notif->band ? "bg" : "a",
3040 notif->tsf_high,
3041 notif->tsf_low, notif->status, notif->beacon_timer);
3042}
3043
3044/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3045static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3046 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3047{
bb8c093b
CH
3048 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3049 struct iwl4965_scanresults_notification *notif =
3050 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY
3051
3052 IWL_DEBUG_SCAN("Scan ch.res: "
3053 "%d [802.11%s] "
3054 "(TSF: 0x%08X:%08X) - %d "
3055 "elapsed=%lu usec (%dms since last)\n",
3056 notif->channel,
3057 notif->band ? "bg" : "a",
3058 le32_to_cpu(notif->tsf_high),
3059 le32_to_cpu(notif->tsf_low),
3060 le32_to_cpu(notif->statistics[0]),
3061 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3062 jiffies_to_msecs(elapsed_jiffies
3063 (priv->last_scan_jiffies, jiffies)));
3064
3065 priv->last_scan_jiffies = jiffies;
7878a5a4 3066 priv->next_scan_jiffies = 0;
b481de9c
ZY
3067}
3068
3069/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3070static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3071 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3072{
bb8c093b
CH
3073 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3074 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY
3075
3076 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3077 scan_notif->scanned_channels,
3078 scan_notif->tsf_low,
3079 scan_notif->tsf_high, scan_notif->status);
3080
3081 /* The HW is no longer scanning */
3082 clear_bit(STATUS_SCAN_HW, &priv->status);
3083
3084 /* The scan completion notification came in, so kill that timer... */
3085 cancel_delayed_work(&priv->scan_check);
3086
3087 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3088 (priv->scan_bands == 2) ? "2.4" : "5.2",
3089 jiffies_to_msecs(elapsed_jiffies
3090 (priv->scan_pass_start, jiffies)));
3091
3092 /* Remove this scanned band from the list
3093 * of pending bands to scan */
3094 priv->scan_bands--;
3095
3096 /* If a request to abort was given, or the scan did not succeed
3097 * then we reset the scan state machine and terminate,
3098 * re-queuing another scan if one has been requested */
3099 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3100 IWL_DEBUG_INFO("Aborted scan completed.\n");
3101 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3102 } else {
3103 /* If there are more bands on this scan pass reschedule */
3104 if (priv->scan_bands > 0)
3105 goto reschedule;
3106 }
3107
3108 priv->last_scan_jiffies = jiffies;
7878a5a4 3109 priv->next_scan_jiffies = 0;
b481de9c
ZY
3110 IWL_DEBUG_INFO("Setting scan to off\n");
3111
3112 clear_bit(STATUS_SCANNING, &priv->status);
3113
3114 IWL_DEBUG_INFO("Scan took %dms\n",
3115 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3116
3117 queue_work(priv->workqueue, &priv->scan_completed);
3118
3119 return;
3120
3121reschedule:
3122 priv->scan_pass_start = jiffies;
3123 queue_work(priv->workqueue, &priv->request_scan);
3124}
3125
3126/* Handle notification from uCode that card's power state is changing
3127 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3128static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3129 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3130{
bb8c093b 3131 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3132 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3133 unsigned long status = priv->status;
3134
3135 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3136 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3137 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3138
3139 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3140 RF_CARD_DISABLED)) {
3141
3395f6e9 3142 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
3143 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3144
3395f6e9
TW
3145 if (!iwl_grab_nic_access(priv)) {
3146 iwl_write_direct32(
b481de9c
ZY
3147 priv, HBUS_TARG_MBX_C,
3148 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3149
3395f6e9 3150 iwl_release_nic_access(priv);
b481de9c
ZY
3151 }
3152
3153 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 3154 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3155 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
3156 if (!iwl_grab_nic_access(priv)) {
3157 iwl_write_direct32(
b481de9c
ZY
3158 priv, HBUS_TARG_MBX_C,
3159 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3160
3395f6e9 3161 iwl_release_nic_access(priv);
b481de9c
ZY
3162 }
3163 }
3164
3165 if (flags & RF_CARD_DISABLED) {
3395f6e9 3166 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3167 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
3168 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3169 if (!iwl_grab_nic_access(priv))
3170 iwl_release_nic_access(priv);
b481de9c
ZY
3171 }
3172 }
3173
3174 if (flags & HW_CARD_DISABLED)
3175 set_bit(STATUS_RF_KILL_HW, &priv->status);
3176 else
3177 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3178
3179
3180 if (flags & SW_CARD_DISABLED)
3181 set_bit(STATUS_RF_KILL_SW, &priv->status);
3182 else
3183 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3184
3185 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3186 iwl4965_scan_cancel(priv);
b481de9c
ZY
3187
3188 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3189 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3190 (test_bit(STATUS_RF_KILL_SW, &status) !=
3191 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3192 queue_work(priv->workqueue, &priv->rf_kill);
3193 else
3194 wake_up_interruptible(&priv->wait_command_queue);
3195}
3196
3197/**
bb8c093b 3198 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
3199 *
3200 * Setup the RX handlers for each of the reply types sent from the uCode
3201 * to the host.
3202 *
3203 * This function chains into the hardware specific files for them to setup
3204 * any hardware specific handlers as well.
3205 */
c79dd5b5 3206static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3207{
bb8c093b
CH
3208 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3209 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3210 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3211 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3212 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
3213 iwl4965_rx_spectrum_measure_notif;
3214 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3215 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
3216 iwl4965_rx_pm_debug_statistics_notif;
3217 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3218
9fbab516
BC
3219 /*
3220 * The same handler is used for both the REPLY to a discrete
3221 * statistics request from the host as well as for the periodic
3222 * statistics notifications (after received beacons) from the uCode.
b481de9c 3223 */
bb8c093b
CH
3224 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3225 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3226
bb8c093b
CH
3227 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3228 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3229 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3230 iwl4965_rx_scan_results_notif;
b481de9c 3231 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH
3232 iwl4965_rx_scan_complete_notif;
3233 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3234 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3235
9fbab516 3236 /* Set up hardware specific Rx handlers */
bb8c093b 3237 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY
3238}
3239
3240/**
bb8c093b 3241 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
3242 * @rxb: Rx buffer to reclaim
3243 *
3244 * If an Rx buffer has an async callback associated with it the callback
3245 * will be executed. The attached skb (if present) will only be freed
3246 * if the callback returns 1
3247 */
c79dd5b5 3248static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3249 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3250{
bb8c093b 3251 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
3252 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3253 int txq_id = SEQ_TO_QUEUE(sequence);
3254 int index = SEQ_TO_INDEX(sequence);
3255 int huge = sequence & SEQ_HUGE_FRAME;
3256 int cmd_index;
857485c0 3257 struct iwl_cmd *cmd;
b481de9c
ZY
3258
3259 /* If a Tx command is being handled and it isn't in the actual
3260 * command queue then there a command routing bug has been introduced
3261 * in the queue management code. */
3262 if (txq_id != IWL_CMD_QUEUE_NUM)
3263 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3264 txq_id, pkt->hdr.cmd);
3265 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3266
3267 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3268 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3269
3270 /* Input error checking is done when commands are added to queue. */
3271 if (cmd->meta.flags & CMD_WANT_SKB) {
3272 cmd->meta.source->u.skb = rxb->skb;
3273 rxb->skb = NULL;
3274 } else if (cmd->meta.u.callback &&
3275 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3276 rxb->skb = NULL;
3277
bb8c093b 3278 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
3279
3280 if (!(cmd->meta.flags & CMD_ASYNC)) {
3281 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3282 wake_up_interruptible(&priv->wait_command_queue);
3283 }
3284}
3285
3286/************************** RX-FUNCTIONS ****************************/
3287/*
3288 * Rx theory of operation
3289 *
9fbab516
BC
3290 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3291 * each of which point to Receive Buffers to be filled by 4965. These get
3292 * used not only for Rx frames, but for any command response or notification
3293 * from the 4965. The driver and 4965 manage the Rx buffers by means
3294 * of indexes into the circular buffer.
b481de9c
ZY
3295 *
3296 * Rx Queue Indexes
3297 * The host/firmware share two index registers for managing the Rx buffers.
3298 *
3299 * The READ index maps to the first position that the firmware may be writing
3300 * to -- the driver can read up to (but not including) this position and get
3301 * good data.
3302 * The READ index is managed by the firmware once the card is enabled.
3303 *
3304 * The WRITE index maps to the last position the driver has read from -- the
3305 * position preceding WRITE is the last slot the firmware can place a packet.
3306 *
3307 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3308 * WRITE = READ.
3309 *
9fbab516 3310 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
3311 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3312 *
9fbab516 3313 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
3314 * and fire the RX interrupt. The driver can then query the READ index and
3315 * process as many packets as possible, moving the WRITE index forward as it
3316 * resets the Rx queue buffers with new memory.
3317 *
3318 * The management in the driver is as follows:
3319 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3320 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3321 * to replenish the iwl->rxq->rx_free.
bb8c093b 3322 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
3323 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3324 * 'processed' and 'read' driver indexes as well)
3325 * + A received packet is processed and handed to the kernel network stack,
3326 * detached from the iwl->rxq. The driver 'processed' index is updated.
3327 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3328 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3329 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3330 * were enough free buffers and RX_STALLED is set it is cleared.
3331 *
3332 *
3333 * Driver sequence:
3334 *
9fbab516
BC
3335 * iwl4965_rx_queue_alloc() Allocates rx_free
3336 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3337 * iwl4965_rx_queue_restock
9fbab516 3338 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
3339 * queue, updates firmware pointers, and updates
3340 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3341 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY
3342 *
3343 * -- enable interrupts --
9fbab516 3344 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY
3345 * READ INDEX, detaching the SKB from the pool.
3346 * Moves the packet buffer from queue to rx_used.
bb8c093b 3347 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY
3348 * slots.
3349 * ...
3350 *
3351 */
3352
3353/**
bb8c093b 3354 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3355 */
bb8c093b 3356static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY
3357{
3358 int s = q->read - q->write;
3359 if (s <= 0)
3360 s += RX_QUEUE_SIZE;
3361 /* keep some buffer to not confuse full and empty queue */
3362 s -= 2;
3363 if (s < 0)
3364 s = 0;
3365 return s;
3366}
3367
3368/**
bb8c093b 3369 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3370 */
c79dd5b5 3371int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY
3372{
3373 u32 reg = 0;
3374 int rc = 0;
3375 unsigned long flags;
3376
3377 spin_lock_irqsave(&q->lock, flags);
3378
3379 if (q->need_update == 0)
3380 goto exit_unlock;
3381
6440adb5 3382 /* If power-saving is in use, make sure device is awake */
b481de9c 3383 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395f6e9 3384 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
3385
3386 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3395f6e9 3387 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
3388 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3389 goto exit_unlock;
3390 }
3391
3395f6e9 3392 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3393 if (rc)
3394 goto exit_unlock;
3395
6440adb5 3396 /* Device expects a multiple of 8 */
3395f6e9 3397 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3398 q->write & ~0x7);
3395f6e9 3399 iwl_release_nic_access(priv);
6440adb5
BC
3400
3401 /* Else device is assumed to be awake */
b481de9c 3402 } else
6440adb5 3403 /* Device expects a multiple of 8 */
3395f6e9 3404 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY
3405
3406
3407 q->need_update = 0;
3408
3409 exit_unlock:
3410 spin_unlock_irqrestore(&q->lock, flags);
3411 return rc;
3412}
3413
3414/**
9fbab516 3415 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3416 */
c79dd5b5 3417static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
3418 dma_addr_t dma_addr)
3419{
3420 return cpu_to_le32((u32)(dma_addr >> 8));
3421}
3422
3423
3424/**
bb8c093b 3425 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3426 *
9fbab516 3427 * If there are slots in the RX queue that need to be restocked,
b481de9c 3428 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3429 * as we can, pulling from rx_free.
b481de9c
ZY
3430 *
3431 * This moves the 'write' index forward to catch up with 'processed', and
3432 * also updates the memory address in the firmware to reference the new
3433 * target buffer.
3434 */
c79dd5b5 3435static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3436{
bb8c093b 3437 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3438 struct list_head *element;
bb8c093b 3439 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
3440 unsigned long flags;
3441 int write, rc;
3442
3443 spin_lock_irqsave(&rxq->lock, flags);
3444 write = rxq->write & ~0x7;
bb8c093b 3445 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3446 /* Get next free Rx buffer, remove from free list */
b481de9c 3447 element = rxq->rx_free.next;
bb8c093b 3448 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3449 list_del(element);
6440adb5
BC
3450
3451 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3452 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY
3453 rxq->queue[rxq->write] = rxb;
3454 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3455 rxq->free_count--;
3456 }
3457 spin_unlock_irqrestore(&rxq->lock, flags);
3458 /* If the pre-allocated buffer pool is dropping low, schedule to
3459 * refill it */
3460 if (rxq->free_count <= RX_LOW_WATERMARK)
3461 queue_work(priv->workqueue, &priv->rx_replenish);
3462
3463
6440adb5
BC
3464 /* If we've added more space for the firmware to place data, tell it.
3465 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
3466 if ((write != (rxq->write & ~0x7))
3467 || (abs(rxq->write - rxq->read) > 7)) {
3468 spin_lock_irqsave(&rxq->lock, flags);
3469 rxq->need_update = 1;
3470 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3471 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
3472 if (rc)
3473 return rc;
3474 }
3475
3476 return 0;
3477}
3478
3479/**
bb8c093b 3480 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
3481 *
3482 * When moving to rx_free an SKB is allocated for the slot.
3483 *
bb8c093b 3484 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3485 * This is called as a scheduled work item (except for during initialization)
b481de9c 3486 */
c79dd5b5 3487static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3488{
bb8c093b 3489 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3490 struct list_head *element;
bb8c093b 3491 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
3492 unsigned long flags;
3493 spin_lock_irqsave(&rxq->lock, flags);
3494 while (!list_empty(&rxq->rx_used)) {
3495 element = rxq->rx_used.next;
bb8c093b 3496 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
BC
3497
3498 /* Alloc a new receive buffer */
b481de9c 3499 rxb->skb =
5425e490 3500 alloc_skb(priv->hw_params.rx_buf_size,
9ee1ba47 3501 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
3502 if (!rxb->skb) {
3503 if (net_ratelimit())
3504 printk(KERN_CRIT DRV_NAME
3505 ": Can not allocate SKB buffers\n");
3506 /* We don't reschedule replenish work here -- we will
3507 * call the restock method and if it still needs
3508 * more buffers it will schedule replenish */
3509 break;
3510 }
3511 priv->alloc_rxb_skb++;
3512 list_del(element);
6440adb5
BC
3513
3514 /* Get physical address of RB/SKB */
b481de9c
ZY
3515 rxb->dma_addr =
3516 pci_map_single(priv->pci_dev, rxb->skb->data,
5425e490 3517 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY
3518 list_add_tail(&rxb->list, &rxq->rx_free);
3519 rxq->free_count++;
3520 }
3521 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
3522}
3523
3524/*
3525 * this should be called while priv->lock is locked
3526*/
4fd1f841 3527static void __iwl4965_rx_replenish(void *data)
5c0eef96 3528{
c79dd5b5 3529 struct iwl_priv *priv = data;
5c0eef96
MA
3530
3531 iwl4965_rx_allocate(priv);
3532 iwl4965_rx_queue_restock(priv);
3533}
3534
3535
3536void iwl4965_rx_replenish(void *data)
3537{
c79dd5b5 3538 struct iwl_priv *priv = data;
5c0eef96
MA
3539 unsigned long flags;
3540
3541 iwl4965_rx_allocate(priv);
b481de9c
ZY
3542
3543 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3544 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
3545 spin_unlock_irqrestore(&priv->lock, flags);
3546}
3547
3548/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3549 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY
3550 * This free routine walks the list of POOL entries and if SKB is set to
3551 * non NULL it is unmapped and freed
3552 */
c79dd5b5 3553static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
3554{
3555 int i;
3556 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3557 if (rxq->pool[i].skb != NULL) {
3558 pci_unmap_single(priv->pci_dev,
3559 rxq->pool[i].dma_addr,
5425e490 3560 priv->hw_params.rx_buf_size,
9ee1ba47 3561 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3562 dev_kfree_skb(rxq->pool[i].skb);
3563 }
3564 }
3565
3566 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3567 rxq->dma_addr);
3568 rxq->bd = NULL;
3569}
3570
c79dd5b5 3571int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3572{
bb8c093b 3573 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
3574 struct pci_dev *dev = priv->pci_dev;
3575 int i;
3576
3577 spin_lock_init(&rxq->lock);
3578 INIT_LIST_HEAD(&rxq->rx_free);
3579 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
BC
3580
3581 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY
3582 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3583 if (!rxq->bd)
3584 return -ENOMEM;
6440adb5 3585
b481de9c
ZY
3586 /* Fill the rx_used queue with _all_ of the Rx buffers */
3587 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3588 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3589
b481de9c
ZY
3590 /* Set us so that we have processed and used all buffers, but have
3591 * not restocked the Rx queue with fresh buffers */
3592 rxq->read = rxq->write = 0;
3593 rxq->free_count = 0;
3594 rxq->need_update = 0;
3595 return 0;
3596}
3597
c79dd5b5 3598void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
3599{
3600 unsigned long flags;
3601 int i;
3602 spin_lock_irqsave(&rxq->lock, flags);
3603 INIT_LIST_HEAD(&rxq->rx_free);
3604 INIT_LIST_HEAD(&rxq->rx_used);
3605 /* Fill the rx_used queue with _all_ of the Rx buffers */
3606 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3607 /* In the reset function, these buffers may have been allocated
3608 * to an SKB, so we need to unmap and free potential storage */
3609 if (rxq->pool[i].skb != NULL) {
3610 pci_unmap_single(priv->pci_dev,
3611 rxq->pool[i].dma_addr,
5425e490 3612 priv->hw_params.rx_buf_size,
9ee1ba47 3613 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3614 priv->alloc_rxb_skb--;
3615 dev_kfree_skb(rxq->pool[i].skb);
3616 rxq->pool[i].skb = NULL;
3617 }
3618 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3619 }
3620
3621 /* Set us so that we have processed and used all buffers, but have
3622 * not restocked the Rx queue with fresh buffers */
3623 rxq->read = rxq->write = 0;
3624 rxq->free_count = 0;
3625 spin_unlock_irqrestore(&rxq->lock, flags);
3626}
3627
3628/* Convert linear signal-to-noise ratio into dB */
3629static u8 ratio2dB[100] = {
3630/* 0 1 2 3 4 5 6 7 8 9 */
3631 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3632 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3633 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3634 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3635 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3636 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3637 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3638 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3639 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3640 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3641};
3642
3643/* Calculates a relative dB value from a ratio of linear
3644 * (i.e. not dB) signal levels.
3645 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 3646int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 3647{
c899a575
AB
3648 /* 1000:1 or higher just report as 60 dB */
3649 if (sig_ratio >= 1000)
b481de9c
ZY
3650 return 60;
3651
c899a575 3652 /* 100:1 or higher, divide by 10 and use table,
b481de9c 3653 * add 20 dB to make up for divide by 10 */
c899a575 3654 if (sig_ratio >= 100)
b481de9c
ZY
3655 return (20 + (int)ratio2dB[sig_ratio/10]);
3656
3657 /* We shouldn't see this */
3658 if (sig_ratio < 1)
3659 return 0;
3660
3661 /* Use table for ratios 1:1 - 99:1 */
3662 return (int)ratio2dB[sig_ratio];
3663}
3664
3665#define PERFECT_RSSI (-20) /* dBm */
3666#define WORST_RSSI (-95) /* dBm */
3667#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3668
3669/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3670 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3671 * about formulas used below. */
bb8c093b 3672int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
3673{
3674 int sig_qual;
3675 int degradation = PERFECT_RSSI - rssi_dbm;
3676
3677 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3678 * as indicator; formula is (signal dbm - noise dbm).
3679 * SNR at or above 40 is a great signal (100%).
3680 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3681 * Weakest usable signal is usually 10 - 15 dB SNR. */
3682 if (noise_dbm) {
3683 if (rssi_dbm - noise_dbm >= 40)
3684 return 100;
3685 else if (rssi_dbm < noise_dbm)
3686 return 0;
3687 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3688
3689 /* Else use just the signal level.
3690 * This formula is a least squares fit of data points collected and
3691 * compared with a reference system that had a percentage (%) display
3692 * for signal quality. */
3693 } else
3694 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3695 (15 * RSSI_RANGE + 62 * degradation)) /
3696 (RSSI_RANGE * RSSI_RANGE);
3697
3698 if (sig_qual > 100)
3699 sig_qual = 100;
3700 else if (sig_qual < 1)
3701 sig_qual = 0;
3702
3703 return sig_qual;
3704}
3705
3706/**
9fbab516 3707 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
3708 *
3709 * Uses the priv->rx_handlers callback function array to invoke
3710 * the appropriate handlers, including command responses,
3711 * frame-received notifications, and other notifications.
3712 */
c79dd5b5 3713static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 3714{
bb8c093b
CH
3715 struct iwl4965_rx_mem_buffer *rxb;
3716 struct iwl4965_rx_packet *pkt;
3717 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
3718 u32 r, i;
3719 int reclaim;
3720 unsigned long flags;
5c0eef96 3721 u8 fill_rx = 0;
d68ab680 3722 u32 count = 8;
b481de9c 3723
6440adb5
BC
3724 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3725 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 3726 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY
3727 i = rxq->read;
3728
3729 /* Rx interrupt, but nothing sent from uCode */
3730 if (i == r)
3731 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3732
5c0eef96
MA
3733 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3734 fill_rx = 1;
3735
b481de9c
ZY
3736 while (i != r) {
3737 rxb = rxq->queue[i];
3738
9fbab516 3739 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
3740 * then a bug has been introduced in the queue refilling
3741 * routines -- catch it here */
3742 BUG_ON(rxb == NULL);
3743
3744 rxq->queue[i] = NULL;
3745
3746 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 3747 priv->hw_params.rx_buf_size,
b481de9c 3748 PCI_DMA_FROMDEVICE);
bb8c093b 3749 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
3750
3751 /* Reclaim a command buffer only if this packet is a response
3752 * to a (driver-originated) command.
3753 * If the packet (e.g. Rx frame) originated from uCode,
3754 * there is no command buffer to reclaim.
3755 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3756 * but apparently a few don't get set; catch them here. */
3757 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3758 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 3759 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 3760 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
3761 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3762 (pkt->hdr.cmd != REPLY_TX);
3763
3764 /* Based on type of command response or notification,
3765 * handle those that need handling via function in
bb8c093b 3766 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY
3767 if (priv->rx_handlers[pkt->hdr.cmd]) {
3768 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3769 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3770 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3771 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3772 } else {
3773 /* No handling needed */
3774 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3775 "r %d i %d No handler needed for %s, 0x%02x\n",
3776 r, i, get_cmd_string(pkt->hdr.cmd),
3777 pkt->hdr.cmd);
3778 }
3779
3780 if (reclaim) {
9fbab516 3781 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 3782 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
3783 * as we reclaim the driver command queue */
3784 if (rxb && rxb->skb)
bb8c093b 3785 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY
3786 else
3787 IWL_WARNING("Claim null rxb?\n");
3788 }
3789
3790 /* For now we just don't re-use anything. We can tweak this
3791 * later to try and re-use notification packets and SKBs that
3792 * fail to Rx correctly */
3793 if (rxb->skb != NULL) {
3794 priv->alloc_rxb_skb--;
3795 dev_kfree_skb_any(rxb->skb);
3796 rxb->skb = NULL;
3797 }
3798
3799 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 3800 priv->hw_params.rx_buf_size,
9ee1ba47 3801 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3802 spin_lock_irqsave(&rxq->lock, flags);
3803 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3804 spin_unlock_irqrestore(&rxq->lock, flags);
3805 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
3806 /* If there are a lot of unused frames,
3807 * restock the Rx queue so ucode wont assert. */
3808 if (fill_rx) {
3809 count++;
3810 if (count >= 8) {
3811 priv->rxq.read = i;
3812 __iwl4965_rx_replenish(priv);
3813 count = 0;
3814 }
3815 }
b481de9c
ZY
3816 }
3817
3818 /* Backtrack one entry */
3819 priv->rxq.read = i;
bb8c093b 3820 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
3821}
3822
6440adb5
BC
3823/**
3824 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
3825 */
c79dd5b5 3826static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 3827 struct iwl4965_tx_queue *txq)
b481de9c
ZY
3828{
3829 u32 reg = 0;
3830 int rc = 0;
3831 int txq_id = txq->q.id;
3832
3833 if (txq->need_update == 0)
3834 return rc;
3835
3836 /* if we're trying to save power */
3837 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3838 /* wake up nic if it's powered down ...
3839 * uCode will wake up, and interrupt us again, so next
3840 * time we'll skip this part. */
3395f6e9 3841 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
3842
3843 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3844 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3395f6e9 3845 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
3846 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3847 return rc;
3848 }
3849
3850 /* restore this queue's parameters in nic hardware. */
3395f6e9 3851 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3852 if (rc)
3853 return rc;
3395f6e9 3854 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 3855 txq->q.write_ptr | (txq_id << 8));
3395f6e9 3856 iwl_release_nic_access(priv);
b481de9c
ZY
3857
3858 /* else not in power-save mode, uCode will never sleep when we're
3859 * trying to tx (during RFKILL, we're not trying to tx). */
3860 } else
3395f6e9 3861 iwl_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 3862 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY
3863
3864 txq->need_update = 0;
3865
3866 return rc;
3867}
3868
0a6857e7 3869#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 3870static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 3871{
0795af57
JP
3872 DECLARE_MAC_BUF(mac);
3873
b481de9c 3874 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 3875 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
3876 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3877 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3878 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3879 le32_to_cpu(rxon->filter_flags));
3880 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3881 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3882 rxon->ofdm_basic_rates);
3883 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
3884 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
3885 print_mac(mac, rxon->node_addr));
3886 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
3887 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
3888 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3889}
3890#endif
3891
c79dd5b5 3892static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
3893{
3894 IWL_DEBUG_ISR("Enabling interrupts\n");
3895 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 3896 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
3897}
3898
0359facc
MA
3899/* call this function to flush any scheduled tasklet */
3900static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3901{
3902 /* wait to make sure we flush pedding tasklet*/
3903 synchronize_irq(priv->pci_dev->irq);
3904 tasklet_kill(&priv->irq_tasklet);
3905}
3906
c79dd5b5 3907static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
3908{
3909 clear_bit(STATUS_INT_ENABLED, &priv->status);
3910
3911 /* disable interrupts from uCode/NIC to host */
3395f6e9 3912 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
3913
3914 /* acknowledge/clear/reset any interrupts still pending
3915 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
3916 iwl_write32(priv, CSR_INT, 0xffffffff);
3917 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
3918 IWL_DEBUG_ISR("Disabled interrupts\n");
3919}
3920
3921static const char *desc_lookup(int i)
3922{
3923 switch (i) {
3924 case 1:
3925 return "FAIL";
3926 case 2:
3927 return "BAD_PARAM";
3928 case 3:
3929 return "BAD_CHECKSUM";
3930 case 4:
3931 return "NMI_INTERRUPT";
3932 case 5:
3933 return "SYSASSERT";
3934 case 6:
3935 return "FATAL_ERROR";
3936 }
3937
3938 return "UNKNOWN";
3939}
3940
3941#define ERROR_START_OFFSET (1 * sizeof(u32))
3942#define ERROR_ELEM_SIZE (7 * sizeof(u32))
3943
c79dd5b5 3944static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
3945{
3946 u32 data2, line;
3947 u32 desc, time, count, base, data1;
3948 u32 blink1, blink2, ilink1, ilink2;
3949 int rc;
3950
3951 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3952
57aab75a 3953 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY
3954 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
3955 return;
3956 }
3957
3395f6e9 3958 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3959 if (rc) {
3960 IWL_WARNING("Can not read from adapter at this time.\n");
3961 return;
3962 }
3963
3395f6e9 3964 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
3965
3966 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3967 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 3968 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY
3969 }
3970
3395f6e9
TW
3971 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
3972 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
3973 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
3974 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
3975 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
3976 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
3977 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
3978 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
3979 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY
3980
3981 IWL_ERROR("Desc Time "
3982 "data1 data2 line\n");
3983 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
3984 desc_lookup(desc), desc, time, data1, data2, line);
3985 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
3986 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
3987 ilink1, ilink2);
3988
3395f6e9 3989 iwl_release_nic_access(priv);
b481de9c
ZY
3990}
3991
3992#define EVENT_START_OFFSET (4 * sizeof(u32))
3993
3994/**
bb8c093b 3995 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 3996 *
3395f6e9 3997 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 3998 */
c79dd5b5 3999static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
4000 u32 num_events, u32 mode)
4001{
4002 u32 i;
4003 u32 base; /* SRAM byte address of event log header */
4004 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4005 u32 ptr; /* SRAM byte address of log data */
4006 u32 ev, time, data; /* event log data */
4007
4008 if (num_events == 0)
4009 return;
4010
4011 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4012
4013 if (mode == 0)
4014 event_size = 2 * sizeof(u32);
4015 else
4016 event_size = 3 * sizeof(u32);
4017
4018 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4019
4020 /* "time" is actually "data" for mode 0 (no timestamp).
4021 * place event id # at far right for easier visual parsing. */
4022 for (i = 0; i < num_events; i++) {
3395f6e9 4023 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 4024 ptr += sizeof(u32);
3395f6e9 4025 time = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY
4026 ptr += sizeof(u32);
4027 if (mode == 0)
4028 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4029 else {
3395f6e9 4030 data = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY
4031 ptr += sizeof(u32);
4032 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4033 }
4034 }
4035}
4036
c79dd5b5 4037static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
4038{
4039 int rc;
4040 u32 base; /* SRAM byte address of event log header */
4041 u32 capacity; /* event log capacity in # entries */
4042 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4043 u32 num_wraps; /* # times uCode wrapped to top of log */
4044 u32 next_entry; /* index of next entry to be written by uCode */
4045 u32 size; /* # entries that we'll print */
4046
4047 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
57aab75a 4048 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY
4049 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4050 return;
4051 }
4052
3395f6e9 4053 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4054 if (rc) {
4055 IWL_WARNING("Can not read from adapter at this time.\n");
4056 return;
4057 }
4058
4059 /* event log header */
3395f6e9
TW
4060 capacity = iwl_read_targ_mem(priv, base);
4061 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4062 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4063 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
4064
4065 size = num_wraps ? capacity : next_entry;
4066
4067 /* bail out if nothing in log */
4068 if (size == 0) {
583fab37 4069 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
3395f6e9 4070 iwl_release_nic_access(priv);
b481de9c
ZY
4071 return;
4072 }
4073
583fab37 4074 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
4075 size, num_wraps);
4076
4077 /* if uCode has wrapped back to top of log, start at the oldest entry,
4078 * i.e the next one that uCode would fill. */
4079 if (num_wraps)
bb8c093b 4080 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY
4081 capacity - next_entry, mode);
4082
4083 /* (then/else) start at top of log */
bb8c093b 4084 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4085
3395f6e9 4086 iwl_release_nic_access(priv);
b481de9c
ZY
4087}
4088
4089/**
bb8c093b 4090 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4091 */
c79dd5b5 4092static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4093{
bb8c093b 4094 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
4095 set_bit(STATUS_FW_ERROR, &priv->status);
4096
4097 /* Cancel currently queued command. */
4098 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4099
0a6857e7
TW
4100#ifdef CONFIG_IWLWIFI_DEBUG
4101 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH
4102 iwl4965_dump_nic_error_log(priv);
4103 iwl4965_dump_nic_event_log(priv);
4104 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY
4105 }
4106#endif
4107
4108 wake_up_interruptible(&priv->wait_command_queue);
4109
4110 /* Keep the restart process from trying to send host
4111 * commands by clearing the INIT status bit */
4112 clear_bit(STATUS_READY, &priv->status);
4113
4114 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4115 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4116 "Restarting adapter due to uCode error.\n");
4117
3109ece1 4118 if (iwl_is_associated(priv)) {
b481de9c
ZY
4119 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4120 sizeof(priv->recovery_rxon));
4121 priv->error_recovering = 1;
4122 }
4123 queue_work(priv->workqueue, &priv->restart);
4124 }
4125}
4126
c79dd5b5 4127static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
4128{
4129 unsigned long flags;
4130
4131 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4132 sizeof(priv->staging_rxon));
4133 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4134 iwl4965_commit_rxon(priv);
b481de9c 4135
bb8c093b 4136 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
4137
4138 spin_lock_irqsave(&priv->lock, flags);
4139 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4140 priv->error_recovering = 0;
4141 spin_unlock_irqrestore(&priv->lock, flags);
4142}
4143
c79dd5b5 4144static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
4145{
4146 u32 inta, handled = 0;
4147 u32 inta_fh;
4148 unsigned long flags;
0a6857e7 4149#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4150 u32 inta_mask;
4151#endif
4152
4153 spin_lock_irqsave(&priv->lock, flags);
4154
4155 /* Ack/clear/reset pending uCode interrupts.
4156 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4157 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
4158 inta = iwl_read32(priv, CSR_INT);
4159 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
4160
4161 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4162 * Any new interrupts that happen after this, either while we're
4163 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
4164 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4165 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4166
0a6857e7
TW
4167#ifdef CONFIG_IWLWIFI_DEBUG
4168 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 4169 /* just for debug */
3395f6e9 4170 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
4171 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4172 inta, inta_mask, inta_fh);
4173 }
4174#endif
4175
4176 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4177 * atomic, make sure that inta covers all the interrupts that
4178 * we've discovered, even if FH interrupt came in just after
4179 * reading CSR_INT. */
6f83eaa1 4180 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4181 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4182 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
4183 inta |= CSR_INT_BIT_FH_TX;
4184
4185 /* Now service all interrupt bits discovered above. */
4186 if (inta & CSR_INT_BIT_HW_ERR) {
4187 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4188
4189 /* Tell the device to stop sending interrupts */
bb8c093b 4190 iwl4965_disable_interrupts(priv);
b481de9c 4191
bb8c093b 4192 iwl4965_irq_handle_error(priv);
b481de9c
ZY
4193
4194 handled |= CSR_INT_BIT_HW_ERR;
4195
4196 spin_unlock_irqrestore(&priv->lock, flags);
4197
4198 return;
4199 }
4200
0a6857e7
TW
4201#ifdef CONFIG_IWLWIFI_DEBUG
4202 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4203 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
4204 if (inta & CSR_INT_BIT_SCD)
4205 IWL_DEBUG_ISR("Scheduler finished to transmit "
4206 "the frame/frames.\n");
b481de9c
ZY
4207
4208 /* Alive notification via Rx interrupt will do the real work */
4209 if (inta & CSR_INT_BIT_ALIVE)
4210 IWL_DEBUG_ISR("Alive interrupt\n");
4211 }
4212#endif
4213 /* Safely ignore these bits for debug checks below */
25c03d8e 4214 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4215
9fbab516 4216 /* HW RF KILL switch toggled */
b481de9c
ZY
4217 if (inta & CSR_INT_BIT_RF_KILL) {
4218 int hw_rf_kill = 0;
3395f6e9 4219 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
4220 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4221 hw_rf_kill = 1;
4222
4223 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4224 "RF_KILL bit toggled to %s.\n",
4225 hw_rf_kill ? "disable radio":"enable radio");
4226
4227 /* Queue restart only if RF_KILL switch was set to "kill"
4228 * when we loaded driver, and is now set to "enable".
4229 * After we're Alive, RF_KILL gets handled by
3230455d 4230 * iwl4965_rx_card_state_notif() */
53e49093
ZY
4231 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4232 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4233 queue_work(priv->workqueue, &priv->restart);
53e49093 4234 }
b481de9c
ZY
4235
4236 handled |= CSR_INT_BIT_RF_KILL;
4237 }
4238
9fbab516 4239 /* Chip got too hot and stopped itself */
b481de9c
ZY
4240 if (inta & CSR_INT_BIT_CT_KILL) {
4241 IWL_ERROR("Microcode CT kill error detected.\n");
4242 handled |= CSR_INT_BIT_CT_KILL;
4243 }
4244
4245 /* Error detected by uCode */
4246 if (inta & CSR_INT_BIT_SW_ERR) {
4247 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4248 inta);
bb8c093b 4249 iwl4965_irq_handle_error(priv);
b481de9c
ZY
4250 handled |= CSR_INT_BIT_SW_ERR;
4251 }
4252
4253 /* uCode wakes up after power-down sleep */
4254 if (inta & CSR_INT_BIT_WAKEUP) {
4255 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH
4256 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4257 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4258 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4259 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4260 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4261 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4262 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
4263
4264 handled |= CSR_INT_BIT_WAKEUP;
4265 }
4266
4267 /* All uCode command responses, including Tx command responses,
4268 * Rx "responses" (frame-received notification), and other
4269 * notifications from uCode come through here*/
4270 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4271 iwl4965_rx_handle(priv);
b481de9c
ZY
4272 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4273 }
4274
4275 if (inta & CSR_INT_BIT_FH_TX) {
4276 IWL_DEBUG_ISR("Tx interrupt\n");
4277 handled |= CSR_INT_BIT_FH_TX;
4278 }
4279
4280 if (inta & ~handled)
4281 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4282
4283 if (inta & ~CSR_INI_SET_MASK) {
4284 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4285 inta & ~CSR_INI_SET_MASK);
4286 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4287 }
4288
4289 /* Re-enable all interrupts */
0359facc
MA
4290 /* only Re-enable if diabled by irq */
4291 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4292 iwl4965_enable_interrupts(priv);
b481de9c 4293
0a6857e7
TW
4294#ifdef CONFIG_IWLWIFI_DEBUG
4295 if (iwl_debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
4296 inta = iwl_read32(priv, CSR_INT);
4297 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4298 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
4299 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4300 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4301 }
4302#endif
4303 spin_unlock_irqrestore(&priv->lock, flags);
4304}
4305
bb8c093b 4306static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4307{
c79dd5b5 4308 struct iwl_priv *priv = data;
b481de9c
ZY
4309 u32 inta, inta_mask;
4310 u32 inta_fh;
4311 if (!priv)
4312 return IRQ_NONE;
4313
4314 spin_lock(&priv->lock);
4315
4316 /* Disable (but don't clear!) interrupts here to avoid
4317 * back-to-back ISRs and sporadic interrupts from our NIC.
4318 * If we have something to service, the tasklet will re-enable ints.
4319 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
4320 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4321 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
4322
4323 /* Discover which interrupts are active/pending */
3395f6e9
TW
4324 inta = iwl_read32(priv, CSR_INT);
4325 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
4326
4327 /* Ignore interrupt if there's nothing in NIC to service.
4328 * This may be due to IRQ shared with another device,
4329 * or due to sporadic interrupts thrown from our NIC. */
4330 if (!inta && !inta_fh) {
4331 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4332 goto none;
4333 }
4334
4335 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
4336 /* Hardware disappeared. It might have already raised
4337 * an interrupt */
b481de9c 4338 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4339 goto unplugged;
b481de9c
ZY
4340 }
4341
4342 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4343 inta, inta_mask, inta_fh);
4344
25c03d8e
JP
4345 inta &= ~CSR_INT_BIT_SCD;
4346
bb8c093b 4347 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
4348 if (likely(inta || inta_fh))
4349 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4350
66fbb541
ON
4351 unplugged:
4352 spin_unlock(&priv->lock);
b481de9c
ZY
4353 return IRQ_HANDLED;
4354
4355 none:
4356 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
4357 /* only Re-enable if diabled by irq */
4358 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4359 iwl4965_enable_interrupts(priv);
b481de9c
ZY
4360 spin_unlock(&priv->lock);
4361 return IRQ_NONE;
4362}
4363
b481de9c
ZY
4364/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4365 * sending probe req. This should be set long enough to hear probe responses
4366 * from more than one AP. */
4367#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4368#define IWL_ACTIVE_DWELL_TIME_52 (10)
4369
4370/* For faster active scanning, scan will move to the next channel if fewer than
4371 * PLCP_QUIET_THRESH packets are heard on this channel within
4372 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4373 * time if it's a quiet channel (nothing responded to our probe, and there's
4374 * no other traffic).
4375 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4376#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4377#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4378
4379/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4380 * Must be set longer than active dwell time.
4381 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4382#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4383#define IWL_PASSIVE_DWELL_TIME_52 (10)
4384#define IWL_PASSIVE_DWELL_BASE (100)
4385#define IWL_CHANNEL_TUNE_TIME 5
4386
c79dd5b5 4387static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4388 enum ieee80211_band band)
b481de9c 4389{
8318d78a 4390 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
4391 return IWL_ACTIVE_DWELL_TIME_52;
4392 else
4393 return IWL_ACTIVE_DWELL_TIME_24;
4394}
4395
c79dd5b5 4396static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4397 enum ieee80211_band band)
b481de9c 4398{
8318d78a
JB
4399 u16 active = iwl4965_get_active_dwell_time(priv, band);
4400 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
4401 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4402 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4403
3109ece1 4404 if (iwl_is_associated(priv)) {
b481de9c
ZY
4405 /* If we're associated, we clamp the maximum passive
4406 * dwell time to be 98% of the beacon interval (minus
4407 * 2 * channel tune time) */
4408 passive = priv->beacon_int;
4409 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4410 passive = IWL_PASSIVE_DWELL_BASE;
4411 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4412 }
4413
4414 if (passive <= active)
4415 passive = active + 1;
4416
4417 return passive;
4418}
4419
c79dd5b5 4420static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4421 enum ieee80211_band band,
b481de9c 4422 u8 is_active, u8 direct_mask,
bb8c093b 4423 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY
4424{
4425 const struct ieee80211_channel *channels = NULL;
8318d78a 4426 const struct ieee80211_supported_band *sband;
bf85ea4f 4427 const struct iwl_channel_info *ch_info;
b481de9c
ZY
4428 u16 passive_dwell = 0;
4429 u16 active_dwell = 0;
4430 int added, i;
4431
d1141dfb 4432 sband = iwl_get_hw_mode(priv, band);
8318d78a 4433 if (!sband)
b481de9c
ZY
4434 return 0;
4435
8318d78a 4436 channels = sband->channels;
b481de9c 4437
8318d78a
JB
4438 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4439 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4440
8318d78a 4441 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
4442 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4443 continue;
4444
8318d78a 4445 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4446
8622e705 4447 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4448 scan_ch->channel);
b481de9c
ZY
4449 if (!is_channel_valid(ch_info)) {
4450 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4451 scan_ch->channel);
4452 continue;
4453 }
4454
4455 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4456 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY
4457 scan_ch->type = 0; /* passive */
4458 else
4459 scan_ch->type = 1; /* active */
4460
4461 if (scan_ch->type & 1)
4462 scan_ch->type |= (direct_mask << 1);
4463
b481de9c
ZY
4464 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4465 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4466
9fbab516 4467 /* Set txpower levels to defaults */
b481de9c
ZY
4468 scan_ch->tpc.dsp_atten = 110;
4469 /* scan_pwr_info->tpc.dsp_atten; */
4470
4471 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4472 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
4473 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4474 else {
4475 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4476 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4477 * power level:
8a1b0245 4478 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
4479 */
4480 }
4481
4482 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4483 scan_ch->channel,
4484 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4485 (scan_ch->type & 1) ?
4486 active_dwell : passive_dwell);
4487
4488 scan_ch++;
4489 added++;
4490 }
4491
4492 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4493 return added;
4494}
4495
c79dd5b5 4496static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
4497 struct ieee80211_rate *rates)
4498{
4499 int i;
4500
4501 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
4502 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
4503 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4504 rates[i].hw_value_short = i;
4505 rates[i].flags = 0;
4506 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 4507 /*
8318d78a 4508 * If CCK != 1M then set short preamble rate flag.
b481de9c 4509 */
35cdeaf4
TW
4510 rates[i].flags |=
4511 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4512 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 4513 }
b481de9c 4514 }
b481de9c
ZY
4515}
4516
4517/**
bb8c093b 4518 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 4519 */
bf85ea4f 4520int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 4521{
bf85ea4f 4522 struct iwl_channel_info *ch;
8211ef78 4523 struct ieee80211_supported_band *sband;
b481de9c
ZY
4524 struct ieee80211_channel *channels;
4525 struct ieee80211_channel *geo_ch;
4526 struct ieee80211_rate *rates;
4527 int i = 0;
b481de9c 4528
8318d78a
JB
4529 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4530 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY
4531 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4532 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4533 return 0;
4534 }
4535
b481de9c
ZY
4536 channels = kzalloc(sizeof(struct ieee80211_channel) *
4537 priv->channel_count, GFP_KERNEL);
8318d78a 4538 if (!channels)
b481de9c 4539 return -ENOMEM;
b481de9c 4540
8211ef78 4541 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY
4542 GFP_KERNEL);
4543 if (!rates) {
b481de9c
ZY
4544 kfree(channels);
4545 return -ENOMEM;
4546 }
4547
b481de9c 4548 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78 4549 sband = &priv->bands[IEEE80211_BAND_5GHZ];
bf85ea4f 4550 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
8211ef78
TW
4551 /* just OFDM */
4552 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4553 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 4554
1ea87396 4555 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 4556
8211ef78
TW
4557 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4558 sband->channels = channels;
4559 /* OFDM & CCK */
4560 sband->bitrates = rates;
4561 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 4562
1ea87396 4563 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 4564
b481de9c
ZY
4565 priv->ieee_channels = channels;
4566 priv->ieee_rates = rates;
4567
bb8c093b 4568 iwl4965_init_hw_rates(priv, rates);
b481de9c 4569
8211ef78 4570 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY
4571 ch = &priv->channel_info[i];
4572
8211ef78
TW
4573 /* FIXME: might be removed if scan is OK */
4574 if (!is_channel_valid(ch))
b481de9c 4575 continue;
b481de9c 4576
8211ef78
TW
4577 if (is_channel_a_band(ch))
4578 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4579 else
4580 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 4581
8211ef78
TW
4582 geo_ch = &sband->channels[sband->n_channels++];
4583
4584 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB
4585 geo_ch->max_power = ch->max_power_avg;
4586 geo_ch->max_antenna_gain = 0xff;
7b72304d 4587 geo_ch->hw_value = ch->channel;
b481de9c
ZY
4588
4589 if (is_channel_valid(ch)) {
8318d78a
JB
4590 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4591 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 4592
8318d78a
JB
4593 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4594 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY
4595
4596 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 4597 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY
4598
4599 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4600 priv->max_channel_txpower_limit =
4601 ch->max_power_avg;
8211ef78 4602 } else {
8318d78a 4603 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW
4604 }
4605
4606 /* Save flags for reg domain usage */
4607 geo_ch->orig_flags = geo_ch->flags;
4608
4609 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4610 ch->channel, geo_ch->center_freq,
4611 is_channel_a_band(ch) ? "5.2" : "2.4",
4612 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4613 "restricted" : "valid",
4614 geo_ch->flags);
b481de9c
ZY
4615 }
4616
82b9a121
TW
4617 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4618 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY
4619 printk(KERN_INFO DRV_NAME
4620 ": Incorrectly detected BG card as ABG. Please send "
4621 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4622 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 4623 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY
4624 }
4625
4626 printk(KERN_INFO DRV_NAME
4627 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB
4628 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4629 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 4630
e0e0a67e
JL
4631 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4632 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4633 &priv->bands[IEEE80211_BAND_2GHZ];
4634 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4635 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4636 &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 4637
b481de9c
ZY
4638 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4639
4640 return 0;
4641}
4642
849e0dce
RC
4643/*
4644 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
4645 */
bf85ea4f 4646void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 4647{
849e0dce
RC
4648 kfree(priv->ieee_channels);
4649 kfree(priv->ieee_rates);
4650 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4651}
4652
b481de9c
ZY
4653/******************************************************************************
4654 *
4655 * uCode download functions
4656 *
4657 ******************************************************************************/
4658
c79dd5b5 4659static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 4660{
98c92211
TW
4661 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4662 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4663 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4664 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4665 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4666 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
4667}
4668
4669/**
bb8c093b 4670 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
4671 * looking at all data.
4672 */
c79dd5b5 4673static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 4674 u32 len)
b481de9c
ZY
4675{
4676 u32 val;
4677 u32 save_len = len;
4678 int rc = 0;
4679 u32 errcnt;
4680
4681 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4682
3395f6e9 4683 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4684 if (rc)
4685 return rc;
4686
3395f6e9 4687 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY
4688
4689 errcnt = 0;
4690 for (; len > 0; len -= sizeof(u32), image++) {
4691 /* read data comes through single port, auto-incr addr */
4692 /* NOTE: Use the debugless read so we don't flood kernel log
4693 * if IWL_DL_IO is set */
3395f6e9 4694 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
4695 if (val != le32_to_cpu(*image)) {
4696 IWL_ERROR("uCode INST section is invalid at "
4697 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4698 save_len - len, val, le32_to_cpu(*image));
4699 rc = -EIO;
4700 errcnt++;
4701 if (errcnt >= 20)
4702 break;
4703 }
4704 }
4705
3395f6e9 4706 iwl_release_nic_access(priv);
b481de9c
ZY
4707
4708 if (!errcnt)
4709 IWL_DEBUG_INFO
4710 ("ucode image in INSTRUCTION memory is good\n");
4711
4712 return rc;
4713}
4714
4715
4716/**
bb8c093b 4717 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
4718 * using sample data 100 bytes apart. If these sample points are good,
4719 * it's a pretty good bet that everything between them is good, too.
4720 */
c79dd5b5 4721static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
4722{
4723 u32 val;
4724 int rc = 0;
4725 u32 errcnt = 0;
4726 u32 i;
4727
4728 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4729
3395f6e9 4730 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4731 if (rc)
4732 return rc;
4733
4734 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4735 /* read data comes through single port, auto-incr addr */
4736 /* NOTE: Use the debugless read so we don't flood kernel log
4737 * if IWL_DL_IO is set */
3395f6e9 4738 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 4739 i + RTC_INST_LOWER_BOUND);
3395f6e9 4740 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
4741 if (val != le32_to_cpu(*image)) {
4742#if 0 /* Enable this if you want to see details */
4743 IWL_ERROR("uCode INST section is invalid at "
4744 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4745 i, val, *image);
4746#endif
4747 rc = -EIO;
4748 errcnt++;
4749 if (errcnt >= 3)
4750 break;
4751 }
4752 }
4753
3395f6e9 4754 iwl_release_nic_access(priv);
b481de9c
ZY
4755
4756 return rc;
4757}
4758
4759
4760/**
bb8c093b 4761 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
4762 * and verify its contents
4763 */
c79dd5b5 4764static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
4765{
4766 __le32 *image;
4767 u32 len;
4768 int rc = 0;
4769
4770 /* Try bootstrap */
4771 image = (__le32 *)priv->ucode_boot.v_addr;
4772 len = priv->ucode_boot.len;
bb8c093b 4773 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4774 if (rc == 0) {
4775 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4776 return 0;
4777 }
4778
4779 /* Try initialize */
4780 image = (__le32 *)priv->ucode_init.v_addr;
4781 len = priv->ucode_init.len;
bb8c093b 4782 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4783 if (rc == 0) {
4784 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4785 return 0;
4786 }
4787
4788 /* Try runtime/protocol */
4789 image = (__le32 *)priv->ucode_code.v_addr;
4790 len = priv->ucode_code.len;
bb8c093b 4791 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4792 if (rc == 0) {
4793 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4794 return 0;
4795 }
4796
4797 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4798
9fbab516
BC
4799 /* Since nothing seems to match, show first several data entries in
4800 * instruction SRAM, so maybe visual inspection will give a clue.
4801 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
4802 image = (__le32 *)priv->ucode_boot.v_addr;
4803 len = priv->ucode_boot.len;
bb8c093b 4804 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY
4805
4806 return rc;
4807}
4808
c79dd5b5 4809static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY
4810{
4811 /* Remove all resets to allow NIC to operate */
3395f6e9 4812 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
4813}
4814
90e759d1 4815
b481de9c 4816/**
bb8c093b 4817 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
4818 *
4819 * Copy into buffers for card to fetch via bus-mastering
4820 */
c79dd5b5 4821static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 4822{
bb8c093b 4823 struct iwl4965_ucode *ucode;
90e759d1 4824 int ret;
b481de9c 4825 const struct firmware *ucode_raw;
4bf775cd 4826 const char *name = priv->cfg->fw_name;
b481de9c
ZY
4827 u8 *src;
4828 size_t len;
4829 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
4830
4831 /* Ask kernel firmware_class module to get the boot firmware off disk.
4832 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
4833 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
4834 if (ret < 0) {
4835 IWL_ERROR("%s firmware file req failed: Reason %d\n",
4836 name, ret);
b481de9c
ZY
4837 goto error;
4838 }
4839
4840 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4841 name, ucode_raw->size);
4842
4843 /* Make sure that we got at least our header! */
4844 if (ucode_raw->size < sizeof(*ucode)) {
4845 IWL_ERROR("File size way too small!\n");
90e759d1 4846 ret = -EINVAL;
b481de9c
ZY
4847 goto err_release;
4848 }
4849
4850 /* Data from ucode file: header followed by uCode images */
4851 ucode = (void *)ucode_raw->data;
4852
4853 ver = le32_to_cpu(ucode->ver);
4854 inst_size = le32_to_cpu(ucode->inst_size);
4855 data_size = le32_to_cpu(ucode->data_size);
4856 init_size = le32_to_cpu(ucode->init_size);
4857 init_data_size = le32_to_cpu(ucode->init_data_size);
4858 boot_size = le32_to_cpu(ucode->boot_size);
4859
4860 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
4861 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
4862 inst_size);
4863 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
4864 data_size);
4865 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
4866 init_size);
4867 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
4868 init_data_size);
4869 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
4870 boot_size);
4871
4872 /* Verify size of file vs. image size info in file's header */
4873 if (ucode_raw->size < sizeof(*ucode) +
4874 inst_size + data_size + init_size +
4875 init_data_size + boot_size) {
4876
4877 IWL_DEBUG_INFO("uCode file size %d too small\n",
4878 (int)ucode_raw->size);
90e759d1 4879 ret = -EINVAL;
b481de9c
ZY
4880 goto err_release;
4881 }
4882
4883 /* Verify that uCode images will fit in card's SRAM */
099b40b7 4884 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
4885 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
4886 inst_size);
4887 ret = -EINVAL;
b481de9c
ZY
4888 goto err_release;
4889 }
4890
099b40b7 4891 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
4892 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
4893 data_size);
4894 ret = -EINVAL;
b481de9c
ZY
4895 goto err_release;
4896 }
099b40b7 4897 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 4898 IWL_DEBUG_INFO
90e759d1
TW
4899 ("uCode init instr len %d too large to fit in\n",
4900 init_size);
4901 ret = -EINVAL;
b481de9c
ZY
4902 goto err_release;
4903 }
099b40b7 4904 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 4905 IWL_DEBUG_INFO
90e759d1
TW
4906 ("uCode init data len %d too large to fit in\n",
4907 init_data_size);
4908 ret = -EINVAL;
b481de9c
ZY
4909 goto err_release;
4910 }
099b40b7 4911 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 4912 IWL_DEBUG_INFO
90e759d1
TW
4913 ("uCode boot instr len %d too large to fit in\n",
4914 boot_size);
4915 ret = -EINVAL;
b481de9c
ZY
4916 goto err_release;
4917 }
4918
4919 /* Allocate ucode buffers for card's bus-master loading ... */
4920
4921 /* Runtime instructions and 2 copies of data:
4922 * 1) unmodified from disk
4923 * 2) backup cache for save/restore during power-downs */
4924 priv->ucode_code.len = inst_size;
98c92211 4925 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
4926
4927 priv->ucode_data.len = data_size;
98c92211 4928 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
4929
4930 priv->ucode_data_backup.len = data_size;
98c92211 4931 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
4932
4933 /* Initialization instructions and data */
90e759d1
TW
4934 if (init_size && init_data_size) {
4935 priv->ucode_init.len = init_size;
98c92211 4936 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
4937
4938 priv->ucode_init_data.len = init_data_size;
98c92211 4939 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
4940
4941 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
4942 goto err_pci_alloc;
4943 }
b481de9c
ZY
4944
4945 /* Bootstrap (instructions only, no data) */
90e759d1
TW
4946 if (boot_size) {
4947 priv->ucode_boot.len = boot_size;
98c92211 4948 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 4949
90e759d1
TW
4950 if (!priv->ucode_boot.v_addr)
4951 goto err_pci_alloc;
4952 }
b481de9c
ZY
4953
4954 /* Copy images into buffers for card's bus-master reads ... */
4955
4956 /* Runtime instructions (first block of data in file) */
4957 src = &ucode->data[0];
4958 len = priv->ucode_code.len;
90e759d1 4959 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
4960 memcpy(priv->ucode_code.v_addr, src, len);
4961 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4962 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
4963
4964 /* Runtime data (2nd block)
bb8c093b 4965 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
4966 src = &ucode->data[inst_size];
4967 len = priv->ucode_data.len;
90e759d1 4968 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
4969 memcpy(priv->ucode_data.v_addr, src, len);
4970 memcpy(priv->ucode_data_backup.v_addr, src, len);
4971
4972 /* Initialization instructions (3rd block) */
4973 if (init_size) {
4974 src = &ucode->data[inst_size + data_size];
4975 len = priv->ucode_init.len;
90e759d1
TW
4976 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
4977 len);
b481de9c
ZY
4978 memcpy(priv->ucode_init.v_addr, src, len);
4979 }
4980
4981 /* Initialization data (4th block) */
4982 if (init_data_size) {
4983 src = &ucode->data[inst_size + data_size + init_size];
4984 len = priv->ucode_init_data.len;
90e759d1
TW
4985 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
4986 len);
b481de9c
ZY
4987 memcpy(priv->ucode_init_data.v_addr, src, len);
4988 }
4989
4990 /* Bootstrap instructions (5th block) */
4991 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
4992 len = priv->ucode_boot.len;
90e759d1 4993 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
4994 memcpy(priv->ucode_boot.v_addr, src, len);
4995
4996 /* We have our copies now, allow OS release its copies */
4997 release_firmware(ucode_raw);
4998 return 0;
4999
5000 err_pci_alloc:
5001 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 5002 ret = -ENOMEM;
bb8c093b 5003 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
5004
5005 err_release:
5006 release_firmware(ucode_raw);
5007
5008 error:
90e759d1 5009 return ret;
b481de9c
ZY
5010}
5011
5012
5013/**
bb8c093b 5014 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
5015 *
5016 * Tell initialization uCode where to find runtime uCode.
5017 *
5018 * BSM registers initially contain pointers to initialization uCode.
5019 * We need to replace them to load runtime uCode inst and data,
5020 * and to save runtime data when powering down.
5021 */
c79dd5b5 5022static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
5023{
5024 dma_addr_t pinst;
5025 dma_addr_t pdata;
5026 int rc = 0;
5027 unsigned long flags;
5028
5029 /* bits 35:4 for 4965 */
5030 pinst = priv->ucode_code.p_addr >> 4;
5031 pdata = priv->ucode_data_backup.p_addr >> 4;
5032
5033 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5034 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
5035 if (rc) {
5036 spin_unlock_irqrestore(&priv->lock, flags);
5037 return rc;
5038 }
5039
5040 /* Tell bootstrap uCode where to find image to load */
3395f6e9
TW
5041 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5042 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5043 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
5044 priv->ucode_data.len);
5045
5046 /* Inst bytecount must be last to set up, bit 31 signals uCode
5047 * that all new ptr/size info is in place */
3395f6e9 5048 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
5049 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5050
3395f6e9 5051 iwl_release_nic_access(priv);
b481de9c
ZY
5052
5053 spin_unlock_irqrestore(&priv->lock, flags);
5054
5055 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5056
5057 return rc;
5058}
5059
5060/**
bb8c093b 5061 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
5062 *
5063 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5064 *
5065 * The 4965 "initialize" ALIVE reply contains calibration data for:
5066 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
5067 * (3945 does not contain this data).
5068 *
5069 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5070*/
c79dd5b5 5071static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
5072{
5073 /* Check alive response for "valid" sign from uCode */
5074 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5075 /* We had an error bringing up the hardware, so take it
5076 * all the way back down so we can try again */
5077 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5078 goto restart;
5079 }
5080
5081 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5082 * This is a paranoid check, because we would not have gotten the
5083 * "initialize" alive if code weren't properly loaded. */
bb8c093b 5084 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
5085 /* Runtime instruction load was bad;
5086 * take it all the way back down so we can try again */
5087 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5088 goto restart;
5089 }
5090
5091 /* Calculate temperature */
5092 priv->temperature = iwl4965_get_temperature(priv);
5093
5094 /* Send pointers to protocol/runtime uCode image ... init code will
5095 * load and launch runtime uCode, which will send us another "Alive"
5096 * notification. */
5097 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 5098 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY
5099 /* Runtime instruction load won't happen;
5100 * take it all the way back down so we can try again */
5101 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5102 goto restart;
5103 }
5104 return;
5105
5106 restart:
5107 queue_work(priv->workqueue, &priv->restart);
5108}
5109
5110
5111/**
bb8c093b 5112 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 5113 * from protocol/runtime uCode (initialization uCode's
bb8c093b 5114 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 5115 */
c79dd5b5 5116static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c 5117{
57aab75a 5118 int ret = 0;
b481de9c
ZY
5119
5120 IWL_DEBUG_INFO("Runtime Alive received.\n");
5121
5122 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5123 /* We had an error bringing up the hardware, so take it
5124 * all the way back down so we can try again */
5125 IWL_DEBUG_INFO("Alive failed.\n");
5126 goto restart;
5127 }
5128
5129 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5130 * This is a paranoid check, because we would not have gotten the
5131 * "runtime" alive if code weren't properly loaded. */
bb8c093b 5132 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
5133 /* Runtime instruction load was bad;
5134 * take it all the way back down so we can try again */
5135 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5136 goto restart;
5137 }
5138
bf85ea4f 5139 iwlcore_clear_stations_table(priv);
b481de9c 5140
57aab75a
TW
5141 ret = priv->cfg->ops->lib->alive_notify(priv);
5142 if (ret) {
b481de9c 5143 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 5144 ret);
b481de9c
ZY
5145 goto restart;
5146 }
5147
9fbab516 5148 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
5149 set_bit(STATUS_ALIVE, &priv->status);
5150
5151 /* Clear out the uCode error bit if it is set */
5152 clear_bit(STATUS_FW_ERROR, &priv->status);
5153
fee1247a 5154 if (iwl_is_rfkill(priv))
b481de9c
ZY
5155 return;
5156
5a66926a 5157 ieee80211_start_queues(priv->hw);
b481de9c
ZY
5158
5159 priv->active_rate = priv->rates_mask;
5160 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5161
3109ece1 5162 if (iwl_is_associated(priv)) {
bb8c093b
CH
5163 struct iwl4965_rxon_cmd *active_rxon =
5164 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY
5165
5166 memcpy(&priv->staging_rxon, &priv->active_rxon,
5167 sizeof(priv->staging_rxon));
5168 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5169 } else {
5170 /* Initialize our rx_config data */
bb8c093b 5171 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
5172 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5173 }
5174
9fbab516 5175 /* Configure Bluetooth device coexistence support */
bb8c093b 5176 iwl4965_send_bt_config(priv);
b481de9c
ZY
5177
5178 /* Configure the adapter for unassociated operation */
bb8c093b 5179 iwl4965_commit_rxon(priv);
b481de9c
ZY
5180
5181 /* At this point, the NIC is initialized and operational */
5182 priv->notif_missed_beacons = 0;
b481de9c
ZY
5183
5184 iwl4965_rf_kill_ct_config(priv);
5a66926a 5185
fe00b5a5
RC
5186 iwl_leds_register(priv);
5187
b481de9c 5188 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 5189 set_bit(STATUS_READY, &priv->status);
5a66926a 5190 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
5191
5192 if (priv->error_recovering)
bb8c093b 5193 iwl4965_error_recovery(priv);
b481de9c 5194
c8381fdc 5195 iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
84363e6e 5196 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY
5197 return;
5198
5199 restart:
5200 queue_work(priv->workqueue, &priv->restart);
5201}
5202
c79dd5b5 5203static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 5204
c79dd5b5 5205static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
5206{
5207 unsigned long flags;
5208 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5209 struct ieee80211_conf *conf = NULL;
5210
5211 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5212
5213 conf = ieee80211_get_hw_conf(priv->hw);
5214
5215 if (!exit_pending)
5216 set_bit(STATUS_EXIT_PENDING, &priv->status);
5217
ab53d8af
MA
5218 iwl_leds_unregister(priv);
5219
c8381fdc
MA
5220 iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
5221
bf85ea4f 5222 iwlcore_clear_stations_table(priv);
b481de9c
ZY
5223
5224 /* Unblock any waiting calls */
5225 wake_up_interruptible_all(&priv->wait_command_queue);
5226
b481de9c
ZY
5227 /* Wipe out the EXIT_PENDING status bit if we are not actually
5228 * exiting the module */
5229 if (!exit_pending)
5230 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5231
5232 /* stop and reset the on-board processor */
3395f6e9 5233 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
5234
5235 /* tell the device to stop sending interrupts */
0359facc 5236 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 5237 iwl4965_disable_interrupts(priv);
0359facc
MA
5238 spin_unlock_irqrestore(&priv->lock, flags);
5239 iwl_synchronize_irq(priv);
b481de9c
ZY
5240
5241 if (priv->mac80211_registered)
5242 ieee80211_stop_queues(priv->hw);
5243
bb8c093b 5244 /* If we have not previously called iwl4965_init() then
b481de9c 5245 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 5246 if (!iwl_is_init(priv)) {
b481de9c
ZY
5247 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5248 STATUS_RF_KILL_HW |
5249 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5250 STATUS_RF_KILL_SW |
9788864e
RC
5251 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5252 STATUS_GEO_CONFIGURED |
b481de9c
ZY
5253 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5254 STATUS_IN_SUSPEND;
5255 goto exit;
5256 }
5257
5258 /* ...otherwise clear out all the status bits but the RF Kill and
5259 * SUSPEND bits and continue taking the NIC down. */
5260 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5261 STATUS_RF_KILL_HW |
5262 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5263 STATUS_RF_KILL_SW |
9788864e
RC
5264 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5265 STATUS_GEO_CONFIGURED |
b481de9c
ZY
5266 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5267 STATUS_IN_SUSPEND |
5268 test_bit(STATUS_FW_ERROR, &priv->status) <<
5269 STATUS_FW_ERROR;
5270
5271 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5272 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 5273 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
5274 spin_unlock_irqrestore(&priv->lock, flags);
5275
bb8c093b
CH
5276 iwl4965_hw_txq_ctx_stop(priv);
5277 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY
5278
5279 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
5280 if (!iwl_grab_nic_access(priv)) {
5281 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 5282 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 5283 iwl_release_nic_access(priv);
b481de9c
ZY
5284 }
5285 spin_unlock_irqrestore(&priv->lock, flags);
5286
5287 udelay(5);
5288
bb8c093b 5289 iwl4965_hw_nic_stop_master(priv);
3395f6e9 5290 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
bb8c093b 5291 iwl4965_hw_nic_reset(priv);
399f4900 5292 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
5293
5294 exit:
bb8c093b 5295 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
5296
5297 if (priv->ibss_beacon)
5298 dev_kfree_skb(priv->ibss_beacon);
5299 priv->ibss_beacon = NULL;
5300
5301 /* clear out any free frames */
bb8c093b 5302 iwl4965_clear_free_frames(priv);
b481de9c
ZY
5303}
5304
c79dd5b5 5305static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
5306{
5307 mutex_lock(&priv->mutex);
bb8c093b 5308 __iwl4965_down(priv);
b481de9c 5309 mutex_unlock(&priv->mutex);
b24d22b1 5310
bb8c093b 5311 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY
5312}
5313
5314#define MAX_HW_RESTARTS 5
5315
c79dd5b5 5316static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 5317{
57aab75a
TW
5318 int i;
5319 int ret;
b481de9c
ZY
5320
5321 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5322 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5323 return -EIO;
5324 }
5325
5326 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5327 IWL_WARNING("Radio disabled by SW RF kill (module "
5328 "parameter)\n");
ad97edd2 5329 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
5330 return -ENODEV;
5331 }
5332
e903fbd4
RC
5333 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5334 IWL_ERROR("ucode not available for device bringup\n");
5335 return -EIO;
5336 }
5337
e655b9f0 5338 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 5339 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
5340 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5341 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5342 else {
5343 set_bit(STATUS_RF_KILL_HW, &priv->status);
5344 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 5345 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
5346 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5347 return -ENODEV;
5348 }
b481de9c
ZY
5349 }
5350
ad97edd2 5351 iwl_rfkill_set_hw_state(priv);
3395f6e9 5352 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5353
399f4900
RR
5354 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
5355 if (ret) {
5356 IWL_ERROR("Unable to allocate shared memory\n");
5357 return ret;
5358 }
5359
57aab75a
TW
5360 ret = priv->cfg->ops->lib->hw_nic_init(priv);
5361 if (ret) {
5362 IWL_ERROR("Unable to init nic\n");
5363 return ret;
b481de9c
ZY
5364 }
5365
5366 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
5367 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5368 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
5369 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5370
5371 /* clear (again), then enable host interrupts */
3395f6e9 5372 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 5373 iwl4965_enable_interrupts(priv);
b481de9c
ZY
5374
5375 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
5376 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5377 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
5378
5379 /* Copy original ucode data image from disk into backup cache.
5380 * This will be used to initialize the on-board processor's
5381 * data SRAM for a clean start when the runtime program first loads. */
5382 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5383 priv->ucode_data.len);
b481de9c 5384
e655b9f0
ZY
5385 /* We return success when we resume from suspend and rf_kill is on. */
5386 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5387 return 0;
b481de9c
ZY
5388
5389 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5390
bf85ea4f 5391 iwlcore_clear_stations_table(priv);
b481de9c
ZY
5392
5393 /* load bootstrap state machine,
5394 * load bootstrap program into processor's memory,
5395 * prepare to load the "initialize" uCode */
57aab75a 5396 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 5397
57aab75a
TW
5398 if (ret) {
5399 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
5400 continue;
5401 }
5402
5403 /* start card; "initialize" will load runtime ucode */
bb8c093b 5404 iwl4965_nic_start(priv);
b481de9c 5405
b481de9c
ZY
5406 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5407
5408 return 0;
5409 }
5410
5411 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5412 __iwl4965_down(priv);
b481de9c
ZY
5413
5414 /* tried to restart and config the device for as long as our
5415 * patience could withstand */
5416 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5417 return -EIO;
5418}
5419
5420
5421/*****************************************************************************
5422 *
5423 * Workqueue callbacks
5424 *
5425 *****************************************************************************/
5426
bb8c093b 5427static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5428{
c79dd5b5
TW
5429 struct iwl_priv *priv =
5430 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
5431
5432 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5433 return;
5434
5435 mutex_lock(&priv->mutex);
bb8c093b 5436 iwl4965_init_alive_start(priv);
b481de9c
ZY
5437 mutex_unlock(&priv->mutex);
5438}
5439
bb8c093b 5440static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5441{
c79dd5b5
TW
5442 struct iwl_priv *priv =
5443 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
5444
5445 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5446 return;
5447
5448 mutex_lock(&priv->mutex);
bb8c093b 5449 iwl4965_alive_start(priv);
b481de9c
ZY
5450 mutex_unlock(&priv->mutex);
5451}
5452
bb8c093b 5453static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5454{
c79dd5b5 5455 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
5456
5457 wake_up_interruptible(&priv->wait_command_queue);
5458
5459 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5460 return;
5461
5462 mutex_lock(&priv->mutex);
5463
fee1247a 5464 if (!iwl_is_rfkill(priv)) {
b481de9c
ZY
5465 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5466 "HW and/or SW RF Kill no longer active, restarting "
5467 "device\n");
5468 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5469 queue_work(priv->workqueue, &priv->restart);
5470 } else {
ad97edd2
MA
5471 /* make sure mac80211 stop sending Tx frame */
5472 if (priv->mac80211_registered)
5473 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
5474
5475 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5476 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5477 "disabled by SW switch\n");
5478 else
5479 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5480 "Kill switch must be turned off for "
5481 "wireless networking to work.\n");
5482 }
ad97edd2
MA
5483 iwl_rfkill_set_hw_state(priv);
5484
b481de9c
ZY
5485 mutex_unlock(&priv->mutex);
5486}
5487
5488#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5489
bb8c093b 5490static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5491{
c79dd5b5
TW
5492 struct iwl_priv *priv =
5493 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY
5494
5495 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5496 return;
5497
5498 mutex_lock(&priv->mutex);
5499 if (test_bit(STATUS_SCANNING, &priv->status) ||
5500 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5501 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5502 "Scan completion watchdog resetting adapter (%dms)\n",
5503 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 5504
b481de9c 5505 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 5506 iwl4965_send_scan_abort(priv);
b481de9c
ZY
5507 }
5508 mutex_unlock(&priv->mutex);
5509}
5510
bb8c093b 5511static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 5512{
c79dd5b5
TW
5513 struct iwl_priv *priv =
5514 container_of(data, struct iwl_priv, request_scan);
857485c0 5515 struct iwl_host_cmd cmd = {
b481de9c 5516 .id = REPLY_SCAN_CMD,
bb8c093b 5517 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY
5518 .meta.flags = CMD_SIZE_HUGE,
5519 };
bb8c093b 5520 struct iwl4965_scan_cmd *scan;
b481de9c 5521 struct ieee80211_conf *conf = NULL;
78330fdd 5522 u16 cmd_len;
8318d78a 5523 enum ieee80211_band band;
78330fdd 5524 u8 direct_mask;
857485c0 5525 int ret = 0;
b481de9c
ZY
5526
5527 conf = ieee80211_get_hw_conf(priv->hw);
5528
5529 mutex_lock(&priv->mutex);
5530
fee1247a 5531 if (!iwl_is_ready(priv)) {
b481de9c
ZY
5532 IWL_WARNING("request scan called when driver not ready.\n");
5533 goto done;
5534 }
5535
5536 /* Make sure the scan wasn't cancelled before this queued work
5537 * was given the chance to run... */
5538 if (!test_bit(STATUS_SCANNING, &priv->status))
5539 goto done;
5540
5541 /* This should never be called or scheduled if there is currently
5542 * a scan active in the hardware. */
5543 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5544 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5545 "Ignoring second request.\n");
857485c0 5546 ret = -EIO;
b481de9c
ZY
5547 goto done;
5548 }
5549
5550 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5551 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5552 goto done;
5553 }
5554
5555 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5556 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5557 goto done;
5558 }
5559
fee1247a 5560 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
5561 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5562 goto done;
5563 }
5564
5565 if (!test_bit(STATUS_READY, &priv->status)) {
5566 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5567 goto done;
5568 }
5569
5570 if (!priv->scan_bands) {
5571 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5572 goto done;
5573 }
5574
5575 if (!priv->scan) {
bb8c093b 5576 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY
5577 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5578 if (!priv->scan) {
857485c0 5579 ret = -ENOMEM;
b481de9c
ZY
5580 goto done;
5581 }
5582 }
5583 scan = priv->scan;
bb8c093b 5584 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
5585
5586 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5587 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5588
3109ece1 5589 if (iwl_is_associated(priv)) {
b481de9c
ZY
5590 u16 interval = 0;
5591 u32 extra;
5592 u32 suspend_time = 100;
5593 u32 scan_suspend_time = 100;
5594 unsigned long flags;
5595
5596 IWL_DEBUG_INFO("Scanning while associated...\n");
5597
5598 spin_lock_irqsave(&priv->lock, flags);
5599 interval = priv->beacon_int;
5600 spin_unlock_irqrestore(&priv->lock, flags);
5601
5602 scan->suspend_time = 0;
052c4b9f 5603 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
5604 if (!interval)
5605 interval = suspend_time;
5606
5607 extra = (suspend_time / interval) << 22;
5608 scan_suspend_time = (extra |
5609 ((suspend_time % interval) * 1024));
5610 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5611 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5612 scan_suspend_time, interval);
5613 }
5614
5615 /* We should add the ability for user to lock to PASSIVE ONLY */
5616 if (priv->one_direct_scan) {
5617 IWL_DEBUG_SCAN
5618 ("Kicking off one direct scan for '%s'\n",
bb8c093b 5619 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY
5620 priv->direct_ssid_len));
5621 scan->direct_scan[0].id = WLAN_EID_SSID;
5622 scan->direct_scan[0].len = priv->direct_ssid_len;
5623 memcpy(scan->direct_scan[0].ssid,
5624 priv->direct_ssid, priv->direct_ssid_len);
5625 direct_mask = 1;
3109ece1 5626 } else if (!iwl_is_associated(priv) && priv->essid_len) {
786b4557
BM
5627 IWL_DEBUG_SCAN
5628 ("Kicking off one direct scan for '%s' when not associated\n",
5629 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY
5630 scan->direct_scan[0].id = WLAN_EID_SSID;
5631 scan->direct_scan[0].len = priv->essid_len;
5632 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
5633 direct_mask = 1;
857485c0 5634 } else {
786b4557 5635 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
b481de9c 5636 direct_mask = 0;
857485c0 5637 }
b481de9c 5638
b481de9c 5639 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5425e490 5640 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
5641 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5642
b481de9c
ZY
5643
5644 switch (priv->scan_bands) {
5645 case 2:
5646 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5647 scan->tx_cmd.rate_n_flags =
bb8c093b 5648 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY
5649 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
5650
5651 scan->good_CRC_th = 0;
8318d78a 5652 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY
5653 break;
5654
5655 case 1:
5656 scan->tx_cmd.rate_n_flags =
bb8c093b 5657 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY
5658 RATE_MCS_ANT_B_MSK);
5659 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 5660 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY
5661 break;
5662
5663 default:
5664 IWL_WARNING("Invalid scan band count\n");
5665 goto done;
5666 }
5667
78330fdd
TW
5668 /* We don't build a direct scan probe request; the uCode will do
5669 * that based on the direct_mask added to each channel entry */
5670 cmd_len = iwl4965_fill_probe_req(priv, band,
5671 (struct ieee80211_mgmt *)scan->data,
5672 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
5673
5674 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY
5675 /* select Rx chains */
5676
5677 /* Force use of chains B and C (0x6) for scan Rx.
5678 * Avoid A (0x1) because of its off-channel reception on A-band.
5679 * MIMO is not used here, but value is required to make uCode happy. */
5680 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
5681 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
5682 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
5683 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
5684
5685 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
5686 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5687
786b4557 5688 if (direct_mask)
26c0f03f
RC
5689 scan->channel_count =
5690 iwl4965_get_channels_for_scan(
5691 priv, band, 1, /* active */
5692 direct_mask,
5693 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
786b4557 5694 else
26c0f03f
RC
5695 scan->channel_count =
5696 iwl4965_get_channels_for_scan(
5697 priv, band, 0, /* passive */
5698 direct_mask,
5699 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 5700
5da4b55f
MA
5701 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
5702 RXON_FILTER_BCON_AWARE_MSK);
b481de9c 5703 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 5704 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY
5705 cmd.data = scan;
5706 scan->len = cpu_to_le16(cmd.len);
5707
5708 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW
5709 ret = iwl_send_cmd_sync(priv, &cmd);
5710 if (ret)
b481de9c
ZY
5711 goto done;
5712
5713 queue_delayed_work(priv->workqueue, &priv->scan_check,
5714 IWL_SCAN_CHECK_WATCHDOG);
5715
5716 mutex_unlock(&priv->mutex);
5717 return;
5718
5719 done:
01ebd063 5720 /* inform mac80211 scan aborted */
b481de9c
ZY
5721 queue_work(priv->workqueue, &priv->scan_completed);
5722 mutex_unlock(&priv->mutex);
5723}
5724
bb8c093b 5725static void iwl4965_bg_up(struct work_struct *data)
b481de9c 5726{
c79dd5b5 5727 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
5728
5729 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5730 return;
5731
5732 mutex_lock(&priv->mutex);
bb8c093b 5733 __iwl4965_up(priv);
b481de9c
ZY
5734 mutex_unlock(&priv->mutex);
5735}
5736
bb8c093b 5737static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 5738{
c79dd5b5 5739 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
5740
5741 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5742 return;
5743
bb8c093b 5744 iwl4965_down(priv);
b481de9c
ZY
5745 queue_work(priv->workqueue, &priv->up);
5746}
5747
bb8c093b 5748static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 5749{
c79dd5b5
TW
5750 struct iwl_priv *priv =
5751 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
5752
5753 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5754 return;
5755
5756 mutex_lock(&priv->mutex);
bb8c093b 5757 iwl4965_rx_replenish(priv);
b481de9c
ZY
5758 mutex_unlock(&priv->mutex);
5759}
5760
7878a5a4
MA
5761#define IWL_DELAY_NEXT_SCAN (HZ*2)
5762
508e32e1 5763static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 5764{
b481de9c 5765 struct ieee80211_conf *conf = NULL;
857485c0 5766 int ret = 0;
0795af57 5767 DECLARE_MAC_BUF(mac);
b481de9c
ZY
5768
5769 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
5770 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
5771 return;
5772 }
5773
0795af57
JP
5774 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
5775 priv->assoc_id,
5776 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
5777
5778
5779 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5780 return;
5781
b481de9c 5782
508e32e1 5783 if (!priv->vif || !priv->is_open)
948c171c 5784 return;
508e32e1 5785
bb8c093b 5786 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 5787
b481de9c
ZY
5788 conf = ieee80211_get_hw_conf(priv->hw);
5789
5790 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5791 iwl4965_commit_rxon(priv);
b481de9c 5792
bb8c093b
CH
5793 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5794 iwl4965_setup_rxon_timing(priv);
857485c0 5795 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5796 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5797 if (ret)
b481de9c
ZY
5798 IWL_WARNING("REPLY_RXON_TIMING failed - "
5799 "Attempting to continue.\n");
5800
5801 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5802
c8b0e6e1 5803#ifdef CONFIG_IWL4965_HT
fd105e79
RR
5804 if (priv->current_ht_config.is_ht)
5805 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 5806#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY
5807 iwl4965_set_rxon_chain(priv);
5808 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5809
5810 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5811 priv->assoc_id, priv->beacon_int);
5812
5813 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5814 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5815 else
5816 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5817
5818 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5819 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5820 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5821 else
5822 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5823
5824 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5825 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5826
5827 }
5828
bb8c093b 5829 iwl4965_commit_rxon(priv);
b481de9c
ZY
5830
5831 switch (priv->iw_mode) {
5832 case IEEE80211_IF_TYPE_STA:
bb8c093b 5833 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
5834 break;
5835
5836 case IEEE80211_IF_TYPE_IBSS:
5837
5838 /* clear out the station table */
bf85ea4f 5839 iwlcore_clear_stations_table(priv);
b481de9c 5840
bb8c093b
CH
5841 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
5842 iwl4965_rxon_add_station(priv, priv->bssid, 0);
5843 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
5844 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
5845
5846 break;
5847
5848 default:
5849 IWL_ERROR("%s Should not be called in %d mode\n",
5850 __FUNCTION__, priv->iw_mode);
5851 break;
5852 }
5853
bb8c093b 5854 iwl4965_sequence_reset(priv);
b481de9c 5855
b481de9c 5856 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 5857 iwl_chain_noise_reset(priv);
b481de9c 5858 priv->start_calib = 1;
b481de9c
ZY
5859
5860 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5861 priv->assoc_station_added = 1;
5862
bb8c093b 5863 iwl4965_activate_qos(priv, 0);
292ae174 5864
5da4b55f 5865 iwl_power_update_mode(priv, 0);
7878a5a4
MA
5866 /* we have just associated, don't start scan too early */
5867 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
5868}
5869
5870
5871static void iwl4965_bg_post_associate(struct work_struct *data)
5872{
5873 struct iwl_priv *priv = container_of(data, struct iwl_priv,
5874 post_associate.work);
5875
5876 mutex_lock(&priv->mutex);
5877 iwl4965_post_associate(priv);
b481de9c 5878 mutex_unlock(&priv->mutex);
508e32e1 5879
b481de9c
ZY
5880}
5881
bb8c093b 5882static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 5883{
c79dd5b5 5884 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 5885
fee1247a 5886 if (!iwl_is_ready(priv))
b481de9c
ZY
5887 return;
5888
5889 mutex_lock(&priv->mutex);
5890
5891 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 5892 iwl4965_send_scan_abort(priv);
b481de9c
ZY
5893
5894 mutex_unlock(&priv->mutex);
5895}
5896
76bb77e0
ZY
5897static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
5898
bb8c093b 5899static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 5900{
c79dd5b5
TW
5901 struct iwl_priv *priv =
5902 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY
5903
5904 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
5905
5906 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5907 return;
5908
a0646470
ZY
5909 if (test_bit(STATUS_CONF_PENDING, &priv->status))
5910 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 5911
b481de9c
ZY
5912 ieee80211_scan_completed(priv->hw);
5913
5914 /* Since setting the TXPOWER may have been deferred while
5915 * performing the scan, fire one off */
5916 mutex_lock(&priv->mutex);
bb8c093b 5917 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
5918 mutex_unlock(&priv->mutex);
5919}
5920
5921/*****************************************************************************
5922 *
5923 * mac80211 entry point functions
5924 *
5925 *****************************************************************************/
5926
5a66926a
ZY
5927#define UCODE_READY_TIMEOUT (2 * HZ)
5928
bb8c093b 5929static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 5930{
c79dd5b5 5931 struct iwl_priv *priv = hw->priv;
5a66926a 5932 int ret;
b481de9c
ZY
5933
5934 IWL_DEBUG_MAC80211("enter\n");
5935
5a66926a
ZY
5936 if (pci_enable_device(priv->pci_dev)) {
5937 IWL_ERROR("Fail to pci_enable_device\n");
5938 return -ENODEV;
5939 }
5940 pci_restore_state(priv->pci_dev);
5941 pci_enable_msi(priv->pci_dev);
5942
5943 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
5944 DRV_NAME, priv);
5945 if (ret) {
5946 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
5947 goto out_disable_msi;
5948 }
5949
b481de9c
ZY
5950 /* we should be verifying the device is ready to be opened */
5951 mutex_lock(&priv->mutex);
5952
5a66926a
ZY
5953 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
5954 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
5955 * ucode filename and max sizes are card-specific. */
b481de9c 5956
5a66926a
ZY
5957 if (!priv->ucode_code.len) {
5958 ret = iwl4965_read_ucode(priv);
5959 if (ret) {
5960 IWL_ERROR("Could not read microcode: %d\n", ret);
5961 mutex_unlock(&priv->mutex);
5962 goto out_release_irq;
5963 }
5964 }
b481de9c 5965
e655b9f0 5966 ret = __iwl4965_up(priv);
5a66926a 5967
b481de9c 5968 mutex_unlock(&priv->mutex);
5a66926a 5969
e655b9f0
ZY
5970 if (ret)
5971 goto out_release_irq;
5972
5973 IWL_DEBUG_INFO("Start UP work done.\n");
5974
5975 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
5976 return 0;
5977
5a66926a
ZY
5978 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
5979 * mac80211 will not be run successfully. */
5980 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
5981 test_bit(STATUS_READY, &priv->status),
5982 UCODE_READY_TIMEOUT);
5983 if (!ret) {
5984 if (!test_bit(STATUS_READY, &priv->status)) {
5985 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
5986 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5987 ret = -ETIMEDOUT;
5988 goto out_release_irq;
5989 }
5990 }
5991
e655b9f0 5992 priv->is_open = 1;
b481de9c
ZY
5993 IWL_DEBUG_MAC80211("leave\n");
5994 return 0;
5a66926a
ZY
5995
5996out_release_irq:
5997 free_irq(priv->pci_dev->irq, priv);
5998out_disable_msi:
5999 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
6000 pci_disable_device(priv->pci_dev);
6001 priv->is_open = 0;
6002 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 6003 return ret;
b481de9c
ZY
6004}
6005
bb8c093b 6006static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 6007{
c79dd5b5 6008 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6009
6010 IWL_DEBUG_MAC80211("enter\n");
948c171c 6011
e655b9f0
ZY
6012 if (!priv->is_open) {
6013 IWL_DEBUG_MAC80211("leave - skip\n");
6014 return;
6015 }
6016
b481de9c 6017 priv->is_open = 0;
5a66926a 6018
fee1247a 6019 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
6020 /* stop mac, cancel any scan request and clear
6021 * RXON_FILTER_ASSOC_MSK BIT
6022 */
5a66926a
ZY
6023 mutex_lock(&priv->mutex);
6024 iwl4965_scan_cancel_timeout(priv, 100);
6025 cancel_delayed_work(&priv->post_associate);
fde3571f 6026 mutex_unlock(&priv->mutex);
fde3571f
MA
6027 }
6028
5a66926a
ZY
6029 iwl4965_down(priv);
6030
6031 flush_workqueue(priv->workqueue);
6032 free_irq(priv->pci_dev->irq, priv);
6033 pci_disable_msi(priv->pci_dev);
6034 pci_save_state(priv->pci_dev);
6035 pci_disable_device(priv->pci_dev);
948c171c 6036
b481de9c 6037 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6038}
6039
bb8c093b 6040static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
6041 struct ieee80211_tx_control *ctl)
6042{
c79dd5b5 6043 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6044
6045 IWL_DEBUG_MAC80211("enter\n");
6046
6047 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6048 IWL_DEBUG_MAC80211("leave - monitor\n");
6049 return -1;
6050 }
6051
6052 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 6053 ctl->tx_rate->bitrate);
b481de9c 6054
bb8c093b 6055 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY
6056 dev_kfree_skb_any(skb);
6057
6058 IWL_DEBUG_MAC80211("leave\n");
6059 return 0;
6060}
6061
bb8c093b 6062static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
6063 struct ieee80211_if_init_conf *conf)
6064{
c79dd5b5 6065 struct iwl_priv *priv = hw->priv;
b481de9c 6066 unsigned long flags;
0795af57 6067 DECLARE_MAC_BUF(mac);
b481de9c 6068
32bfd35d 6069 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 6070
32bfd35d
JB
6071 if (priv->vif) {
6072 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 6073 return -EOPNOTSUPP;
b481de9c
ZY
6074 }
6075
6076 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 6077 priv->vif = conf->vif;
b481de9c
ZY
6078
6079 spin_unlock_irqrestore(&priv->lock, flags);
6080
6081 mutex_lock(&priv->mutex);
864792e3
TW
6082
6083 if (conf->mac_addr) {
6084 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
6085 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6086 }
b481de9c 6087
fee1247a 6088 if (iwl_is_ready(priv))
5a66926a
ZY
6089 iwl4965_set_mode(priv, conf->type);
6090
b481de9c
ZY
6091 mutex_unlock(&priv->mutex);
6092
5a66926a 6093 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6094 return 0;
6095}
6096
6097/**
bb8c093b 6098 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
6099 *
6100 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6101 * be set inappropriately and the driver currently sets the hardware up to
6102 * use it whenever needed.
6103 */
bb8c093b 6104static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 6105{
c79dd5b5 6106 struct iwl_priv *priv = hw->priv;
bf85ea4f 6107 const struct iwl_channel_info *ch_info;
b481de9c 6108 unsigned long flags;
76bb77e0 6109 int ret = 0;
b481de9c
ZY
6110
6111 mutex_lock(&priv->mutex);
8318d78a 6112 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 6113
12342c47
ZY
6114 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6115
fee1247a 6116 if (!iwl_is_ready(priv)) {
b481de9c 6117 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
6118 ret = -EIO;
6119 goto out;
b481de9c
ZY
6120 }
6121
1ea87396 6122 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 6123 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
6124 IWL_DEBUG_MAC80211("leave - scanning\n");
6125 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 6126 mutex_unlock(&priv->mutex);
a0646470 6127 return 0;
b481de9c
ZY
6128 }
6129
6130 spin_lock_irqsave(&priv->lock, flags);
6131
8622e705 6132 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 6133 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6134 if (!is_channel_valid(ch_info)) {
b481de9c
ZY
6135 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6136 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
6137 ret = -EINVAL;
6138 goto out;
b481de9c
ZY
6139 }
6140
c8b0e6e1 6141#ifdef CONFIG_IWL4965_HT
78330fdd 6142 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
6143 * from any ht related info since 2.4 does not
6144 * support ht */
78330fdd 6145 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY
6146#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6147 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
6148#endif
6149 )
6150 priv->staging_rxon.flags = 0;
c8b0e6e1 6151#endif /* CONFIG_IWL4965_HT */
b481de9c 6152
bf85ea4f 6153 iwlcore_set_rxon_channel(priv, conf->channel->band,
8318d78a 6154 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6155
8318d78a 6156 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY
6157
6158 /* The list of supported rates and rate mask can be different
8318d78a 6159 * for each band; since the band may have changed, reset
b481de9c 6160 * the rate mask to what mac80211 lists */
bb8c093b 6161 iwl4965_set_rate(priv);
b481de9c
ZY
6162
6163 spin_unlock_irqrestore(&priv->lock, flags);
6164
6165#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6166 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 6167 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 6168 goto out;
b481de9c
ZY
6169 }
6170#endif
6171
ad97edd2
MA
6172 if (priv->cfg->ops->lib->radio_kill_sw)
6173 priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
6174
6175 if (!conf->radio_enabled) {
6176 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 6177 goto out;
b481de9c
ZY
6178 }
6179
fee1247a 6180 if (iwl_is_rfkill(priv)) {
b481de9c 6181 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
6182 ret = -EIO;
6183 goto out;
b481de9c
ZY
6184 }
6185
bb8c093b 6186 iwl4965_set_rate(priv);
b481de9c
ZY
6187
6188 if (memcmp(&priv->active_rxon,
6189 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 6190 iwl4965_commit_rxon(priv);
b481de9c
ZY
6191 else
6192 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6193
6194 IWL_DEBUG_MAC80211("leave\n");
6195
a0646470
ZY
6196out:
6197 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 6198 mutex_unlock(&priv->mutex);
76bb77e0 6199 return ret;
b481de9c
ZY
6200}
6201
c79dd5b5 6202static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 6203{
857485c0 6204 int ret = 0;
b481de9c 6205
d986bcd1 6206 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
6207 return;
6208
6209 /* The following should be done only at AP bring up */
6210 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6211
6212 /* RXON - unassoc (to set timing command) */
6213 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6214 iwl4965_commit_rxon(priv);
b481de9c
ZY
6215
6216 /* RXON Timing */
bb8c093b
CH
6217 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6218 iwl4965_setup_rxon_timing(priv);
857485c0 6219 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6220 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6221 if (ret)
b481de9c
ZY
6222 IWL_WARNING("REPLY_RXON_TIMING failed - "
6223 "Attempting to continue.\n");
6224
6225 iwl4965_set_rxon_chain(priv);
6226
6227 /* FIXME: what should be the assoc_id for AP? */
6228 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6229 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6230 priv->staging_rxon.flags |=
6231 RXON_FLG_SHORT_PREAMBLE_MSK;
6232 else
6233 priv->staging_rxon.flags &=
6234 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6235
6236 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6237 if (priv->assoc_capability &
6238 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6239 priv->staging_rxon.flags |=
6240 RXON_FLG_SHORT_SLOT_MSK;
6241 else
6242 priv->staging_rxon.flags &=
6243 ~RXON_FLG_SHORT_SLOT_MSK;
6244
6245 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6246 priv->staging_rxon.flags &=
6247 ~RXON_FLG_SHORT_SLOT_MSK;
6248 }
6249 /* restore RXON assoc */
6250 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 6251 iwl4965_commit_rxon(priv);
bb8c093b 6252 iwl4965_activate_qos(priv, 1);
bb8c093b 6253 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 6254 }
bb8c093b 6255 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
6256
6257 /* FIXME - we need to add code here to detect a totally new
6258 * configuration, reset the AP, unassoc, rxon timing, assoc,
6259 * clear sta table, add BCAST sta... */
6260}
6261
32bfd35d
JB
6262static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
6263 struct ieee80211_vif *vif,
b481de9c
ZY
6264 struct ieee80211_if_conf *conf)
6265{
c79dd5b5 6266 struct iwl_priv *priv = hw->priv;
0795af57 6267 DECLARE_MAC_BUF(mac);
b481de9c
ZY
6268 unsigned long flags;
6269 int rc;
6270
6271 if (conf == NULL)
6272 return -EIO;
6273
b716bb91
EG
6274 if (priv->vif != vif) {
6275 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
6276 return 0;
6277 }
6278
b481de9c
ZY
6279 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6280 (!conf->beacon || !conf->ssid_len)) {
6281 IWL_DEBUG_MAC80211
6282 ("Leaving in AP mode because HostAPD is not ready.\n");
6283 return 0;
6284 }
6285
fee1247a 6286 if (!iwl_is_alive(priv))
5a66926a
ZY
6287 return -EAGAIN;
6288
b481de9c
ZY
6289 mutex_lock(&priv->mutex);
6290
b481de9c 6291 if (conf->bssid)
0795af57
JP
6292 IWL_DEBUG_MAC80211("bssid: %s\n",
6293 print_mac(mac, conf->bssid));
b481de9c 6294
4150c572
JB
6295/*
6296 * very dubious code was here; the probe filtering flag is never set:
6297 *
b481de9c
ZY
6298 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6299 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 6300 */
b481de9c
ZY
6301
6302 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6303 if (!conf->bssid) {
6304 conf->bssid = priv->mac_addr;
6305 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
6306 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6307 print_mac(mac, conf->bssid));
b481de9c
ZY
6308 }
6309 if (priv->ibss_beacon)
6310 dev_kfree_skb(priv->ibss_beacon);
6311
6312 priv->ibss_beacon = conf->beacon;
6313 }
6314
fee1247a 6315 if (iwl_is_rfkill(priv))
fde3571f
MA
6316 goto done;
6317
b481de9c
ZY
6318 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6319 !is_multicast_ether_addr(conf->bssid)) {
6320 /* If there is currently a HW scan going on in the background
6321 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6322 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
6323 IWL_WARNING("Aborted scan still in progress "
6324 "after 100ms\n");
6325 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6326 mutex_unlock(&priv->mutex);
6327 return -EAGAIN;
6328 }
6329 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6330
6331 /* TODO: Audit driver for usage of these members and see
6332 * if mac80211 deprecates them (priv->bssid looks like it
6333 * shouldn't be there, but I haven't scanned the IBSS code
6334 * to verify) - jpk */
6335 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6336
6337 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6338 iwl4965_config_ap(priv);
b481de9c 6339 else {
bb8c093b 6340 rc = iwl4965_commit_rxon(priv);
b481de9c 6341 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6342 iwl4965_rxon_add_station(
b481de9c
ZY
6343 priv, priv->active_rxon.bssid_addr, 1);
6344 }
6345
6346 } else {
bb8c093b 6347 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6348 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6349 iwl4965_commit_rxon(priv);
b481de9c
ZY
6350 }
6351
fde3571f 6352 done:
b481de9c
ZY
6353 spin_lock_irqsave(&priv->lock, flags);
6354 if (!conf->ssid_len)
6355 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6356 else
6357 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6358
6359 priv->essid_len = conf->ssid_len;
6360 spin_unlock_irqrestore(&priv->lock, flags);
6361
6362 IWL_DEBUG_MAC80211("leave\n");
6363 mutex_unlock(&priv->mutex);
6364
6365 return 0;
6366}
6367
bb8c093b 6368static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
6369 unsigned int changed_flags,
6370 unsigned int *total_flags,
6371 int mc_count, struct dev_addr_list *mc_list)
6372{
6373 /*
6374 * XXX: dummy
bb8c093b 6375 * see also iwl4965_connection_init_rx_config
4150c572
JB
6376 */
6377 *total_flags = 0;
6378}
6379
bb8c093b 6380static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
6381 struct ieee80211_if_init_conf *conf)
6382{
c79dd5b5 6383 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6384
6385 IWL_DEBUG_MAC80211("enter\n");
6386
6387 mutex_lock(&priv->mutex);
948c171c 6388
fee1247a 6389 if (iwl_is_ready_rf(priv)) {
fde3571f
MA
6390 iwl4965_scan_cancel_timeout(priv, 100);
6391 cancel_delayed_work(&priv->post_associate);
6392 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6393 iwl4965_commit_rxon(priv);
6394 }
32bfd35d
JB
6395 if (priv->vif == conf->vif) {
6396 priv->vif = NULL;
b481de9c
ZY
6397 memset(priv->bssid, 0, ETH_ALEN);
6398 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6399 priv->essid_len = 0;
6400 }
6401 mutex_unlock(&priv->mutex);
6402
6403 IWL_DEBUG_MAC80211("leave\n");
6404
6405}
471b3efd 6406
3109ece1 6407#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
6408static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6409 struct ieee80211_vif *vif,
6410 struct ieee80211_bss_conf *bss_conf,
6411 u32 changes)
220173b0 6412{
c79dd5b5 6413 struct iwl_priv *priv = hw->priv;
220173b0 6414
3109ece1
TW
6415 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6416
471b3efd 6417 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
6418 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6419 bss_conf->use_short_preamble);
471b3efd 6420 if (bss_conf->use_short_preamble)
220173b0
TW
6421 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6422 else
6423 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6424 }
6425
471b3efd 6426 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 6427 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 6428 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
6429 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6430 else
6431 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6432 }
6433
98952d5d 6434 if (changes & BSS_CHANGED_HT) {
3109ece1 6435 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d
TW
6436 iwl4965_ht_conf(priv, bss_conf);
6437 iwl4965_set_rxon_chain(priv);
6438 }
6439
471b3efd 6440 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 6441 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
6442 /* This should never happen as this function should
6443 * never be called from interrupt context. */
6444 if (WARN_ON_ONCE(in_interrupt()))
6445 return;
3109ece1
TW
6446 if (bss_conf->assoc) {
6447 priv->assoc_id = bss_conf->aid;
6448 priv->beacon_int = bss_conf->beacon_int;
6449 priv->timestamp = bss_conf->timestamp;
6450 priv->assoc_capability = bss_conf->assoc_capability;
6451 priv->next_scan_jiffies = jiffies +
6452 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
6453 mutex_lock(&priv->mutex);
6454 iwl4965_post_associate(priv);
6455 mutex_unlock(&priv->mutex);
3109ece1
TW
6456 } else {
6457 priv->assoc_id = 0;
6458 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6459 }
6460 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
6461 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 6462 iwl_send_rxon_assoc(priv);
471b3efd
JB
6463 }
6464
220173b0 6465}
b481de9c 6466
bb8c093b 6467static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
6468{
6469 int rc = 0;
6470 unsigned long flags;
c79dd5b5 6471 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6472
6473 IWL_DEBUG_MAC80211("enter\n");
6474
052c4b9f 6475 mutex_lock(&priv->mutex);
b481de9c
ZY
6476 spin_lock_irqsave(&priv->lock, flags);
6477
fee1247a 6478 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6479 rc = -EIO;
6480 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6481 goto out_unlock;
6482 }
6483
6484 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6485 rc = -EIO;
6486 IWL_ERROR("ERROR: APs don't scan\n");
6487 goto out_unlock;
6488 }
6489
7878a5a4
MA
6490 /* we don't schedule scan within next_scan_jiffies period */
6491 if (priv->next_scan_jiffies &&
6492 time_after(priv->next_scan_jiffies, jiffies)) {
6493 rc = -EAGAIN;
6494 goto out_unlock;
6495 }
b481de9c 6496 /* if we just finished scan ask for delay */
7878a5a4
MA
6497 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6498 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
6499 rc = -EAGAIN;
6500 goto out_unlock;
6501 }
6502 if (len) {
7878a5a4 6503 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6504 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY
6505
6506 priv->one_direct_scan = 1;
6507 priv->direct_ssid_len = (u8)
6508 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6509 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
6510 } else
6511 priv->one_direct_scan = 0;
b481de9c 6512
bb8c093b 6513 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY
6514
6515 IWL_DEBUG_MAC80211("leave\n");
6516
6517out_unlock:
6518 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6519 mutex_unlock(&priv->mutex);
b481de9c
ZY
6520
6521 return rc;
6522}
6523
ab885f8c
EG
6524static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6525 struct ieee80211_key_conf *keyconf, const u8 *addr,
6526 u32 iv32, u16 *phase1key)
6527{
6528 struct iwl_priv *priv = hw->priv;
6529 u8 sta_id = IWL_INVALID_STATION;
6530 unsigned long flags;
6531 __le16 key_flags = 0;
6532 int i;
6533 DECLARE_MAC_BUF(mac);
6534
6535 IWL_DEBUG_MAC80211("enter\n");
6536
947b13a7 6537 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
6538 if (sta_id == IWL_INVALID_STATION) {
6539 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6540 print_mac(mac, addr));
6541 return;
6542 }
6543
6544 iwl4965_scan_cancel_timeout(priv, 100);
6545
6546 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
6547 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
6548 key_flags &= ~STA_KEY_FLG_INVALID;
6549
5425e490 6550 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
6551 key_flags |= STA_KEY_MULTICAST_MSK;
6552
6553 spin_lock_irqsave(&priv->sta_lock, flags);
6554
ab885f8c
EG
6555 priv->stations[sta_id].sta.key.key_flags = key_flags;
6556 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
6557
6558 for (i = 0; i < 5; i++)
6559 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
6560 cpu_to_le16(phase1key[i]);
6561
6562 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
6563 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
6564
6565 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6566
6567 spin_unlock_irqrestore(&priv->sta_lock, flags);
6568
6569 IWL_DEBUG_MAC80211("leave\n");
6570}
6571
bb8c093b 6572static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
6573 const u8 *local_addr, const u8 *addr,
6574 struct ieee80211_key_conf *key)
6575{
c79dd5b5 6576 struct iwl_priv *priv = hw->priv;
0795af57 6577 DECLARE_MAC_BUF(mac);
deb09c43
EG
6578 int ret = 0;
6579 u8 sta_id = IWL_INVALID_STATION;
6974e363 6580 u8 is_default_wep_key = 0;
b481de9c
ZY
6581
6582 IWL_DEBUG_MAC80211("enter\n");
6583
099b40b7 6584 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
6585 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6586 return -EOPNOTSUPP;
6587 }
6588
6589 if (is_zero_ether_addr(addr))
6590 /* only support pairwise keys */
6591 return -EOPNOTSUPP;
6592
947b13a7 6593 sta_id = iwl_find_station(priv, addr);
6974e363
EG
6594 if (sta_id == IWL_INVALID_STATION) {
6595 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6596 print_mac(mac, addr));
6597 return -EINVAL;
b481de9c 6598
deb09c43 6599 }
b481de9c 6600
6974e363 6601 mutex_lock(&priv->mutex);
bb8c093b 6602 iwl4965_scan_cancel_timeout(priv, 100);
6974e363
EG
6603 mutex_unlock(&priv->mutex);
6604
6605 /* If we are getting WEP group key and we didn't receive any key mapping
6606 * so far, we are in legacy wep mode (group key only), otherwise we are
6607 * in 1X mode.
6608 * In legacy wep mode, we use another host command to the uCode */
5425e490 6609 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
6610 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
6611 if (cmd == SET_KEY)
6612 is_default_wep_key = !priv->key_mapping_key;
6613 else
6614 is_default_wep_key = priv->default_wep_key;
6615 }
052c4b9f 6616
b481de9c 6617 switch (cmd) {
deb09c43 6618 case SET_KEY:
6974e363
EG
6619 if (is_default_wep_key)
6620 ret = iwl_set_default_wep_key(priv, key);
deb09c43 6621 else
7480513f 6622 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
6623
6624 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
6625 break;
6626 case DISABLE_KEY:
6974e363
EG
6627 if (is_default_wep_key)
6628 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 6629 else
3ec47732 6630 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
6631
6632 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
6633 break;
6634 default:
deb09c43 6635 ret = -EINVAL;
b481de9c
ZY
6636 }
6637
6638 IWL_DEBUG_MAC80211("leave\n");
b481de9c 6639
deb09c43 6640 return ret;
b481de9c
ZY
6641}
6642
bb8c093b 6643static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY
6644 const struct ieee80211_tx_queue_params *params)
6645{
c79dd5b5 6646 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6647 unsigned long flags;
6648 int q;
b481de9c
ZY
6649
6650 IWL_DEBUG_MAC80211("enter\n");
6651
fee1247a 6652 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6653 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6654 return -EIO;
6655 }
6656
6657 if (queue >= AC_NUM) {
6658 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6659 return 0;
6660 }
6661
b481de9c
ZY
6662 if (!priv->qos_data.qos_enable) {
6663 priv->qos_data.qos_active = 0;
6664 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
6665 return 0;
6666 }
6667 q = AC_NUM - 1 - queue;
6668
6669 spin_lock_irqsave(&priv->lock, flags);
6670
6671 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6672 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6673 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6674 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 6675 cpu_to_le16((params->txop * 32));
b481de9c
ZY
6676
6677 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6678 priv->qos_data.qos_active = 1;
6679
6680 spin_unlock_irqrestore(&priv->lock, flags);
6681
6682 mutex_lock(&priv->mutex);
6683 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6684 iwl4965_activate_qos(priv, 1);
3109ece1 6685 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 6686 iwl4965_activate_qos(priv, 0);
b481de9c
ZY
6687
6688 mutex_unlock(&priv->mutex);
6689
b481de9c
ZY
6690 IWL_DEBUG_MAC80211("leave\n");
6691 return 0;
6692}
6693
bb8c093b 6694static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
6695 struct ieee80211_tx_queue_stats *stats)
6696{
c79dd5b5 6697 struct iwl_priv *priv = hw->priv;
b481de9c 6698 int i, avail;
bb8c093b
CH
6699 struct iwl4965_tx_queue *txq;
6700 struct iwl4965_queue *q;
b481de9c
ZY
6701 unsigned long flags;
6702
6703 IWL_DEBUG_MAC80211("enter\n");
6704
fee1247a 6705 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6706 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6707 return -EIO;
6708 }
6709
6710 spin_lock_irqsave(&priv->lock, flags);
6711
6712 for (i = 0; i < AC_NUM; i++) {
6713 txq = &priv->txq[i];
6714 q = &txq->q;
bb8c093b 6715 avail = iwl4965_queue_space(q);
b481de9c
ZY
6716
6717 stats->data[i].len = q->n_window - avail;
6718 stats->data[i].limit = q->n_window - q->high_mark;
6719 stats->data[i].count = q->n_window;
6720
6721 }
6722 spin_unlock_irqrestore(&priv->lock, flags);
6723
6724 IWL_DEBUG_MAC80211("leave\n");
6725
6726 return 0;
6727}
6728
bb8c093b 6729static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
6730 struct ieee80211_low_level_stats *stats)
6731{
6732 IWL_DEBUG_MAC80211("enter\n");
6733 IWL_DEBUG_MAC80211("leave\n");
6734
6735 return 0;
6736}
6737
bb8c093b 6738static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY
6739{
6740 IWL_DEBUG_MAC80211("enter\n");
6741 IWL_DEBUG_MAC80211("leave\n");
6742
6743 return 0;
6744}
6745
bb8c093b 6746static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 6747{
c79dd5b5 6748 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6749 unsigned long flags;
6750
6751 mutex_lock(&priv->mutex);
6752 IWL_DEBUG_MAC80211("enter\n");
6753
6754 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 6755#ifdef CONFIG_IWL4965_HT
b481de9c 6756 spin_lock_irqsave(&priv->lock, flags);
fd105e79 6757 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 6758 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 6759#endif /* CONFIG_IWL4965_HT */
b481de9c 6760
bf85ea4f 6761 iwlcore_reset_qos(priv);
b481de9c
ZY
6762
6763 cancel_delayed_work(&priv->post_associate);
6764
6765 spin_lock_irqsave(&priv->lock, flags);
6766 priv->assoc_id = 0;
6767 priv->assoc_capability = 0;
b481de9c
ZY
6768 priv->assoc_station_added = 0;
6769
6770 /* new association get rid of ibss beacon skb */
6771 if (priv->ibss_beacon)
6772 dev_kfree_skb(priv->ibss_beacon);
6773
6774 priv->ibss_beacon = NULL;
6775
6776 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 6777 priv->timestamp = 0;
b481de9c
ZY
6778 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
6779 priv->beacon_int = 0;
6780
6781 spin_unlock_irqrestore(&priv->lock, flags);
6782
fee1247a 6783 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
6784 IWL_DEBUG_MAC80211("leave - not ready\n");
6785 mutex_unlock(&priv->mutex);
6786 return;
6787 }
6788
052c4b9f 6789 /* we are restarting association process
6790 * clear RXON_FILTER_ASSOC_MSK bit
6791 */
6792 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 6793 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 6794 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6795 iwl4965_commit_rxon(priv);
052c4b9f 6796 }
6797
5da4b55f
MA
6798 iwl_power_update_mode(priv, 0);
6799
b481de9c
ZY
6800 /* Per mac80211.h: This is only used in IBSS mode... */
6801 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 6802
b481de9c
ZY
6803 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6804 mutex_unlock(&priv->mutex);
6805 return;
6806 }
6807
bb8c093b 6808 iwl4965_set_rate(priv);
b481de9c
ZY
6809
6810 mutex_unlock(&priv->mutex);
6811
6812 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6813}
6814
bb8c093b 6815static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
6816 struct ieee80211_tx_control *control)
6817{
c79dd5b5 6818 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6819 unsigned long flags;
6820
6821 mutex_lock(&priv->mutex);
6822 IWL_DEBUG_MAC80211("enter\n");
6823
fee1247a 6824 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6825 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6826 mutex_unlock(&priv->mutex);
6827 return -EIO;
6828 }
6829
6830 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
6831 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6832 mutex_unlock(&priv->mutex);
6833 return -EIO;
6834 }
6835
6836 spin_lock_irqsave(&priv->lock, flags);
6837
6838 if (priv->ibss_beacon)
6839 dev_kfree_skb(priv->ibss_beacon);
6840
6841 priv->ibss_beacon = skb;
6842
6843 priv->assoc_id = 0;
6844
6845 IWL_DEBUG_MAC80211("leave\n");
6846 spin_unlock_irqrestore(&priv->lock, flags);
6847
bf85ea4f 6848 iwlcore_reset_qos(priv);
b481de9c
ZY
6849
6850 queue_work(priv->workqueue, &priv->post_associate.work);
6851
6852 mutex_unlock(&priv->mutex);
6853
6854 return 0;
6855}
6856
b481de9c
ZY
6857/*****************************************************************************
6858 *
6859 * sysfs attributes
6860 *
6861 *****************************************************************************/
6862
0a6857e7 6863#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
6864
6865/*
6866 * The following adds a new attribute to the sysfs representation
6867 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6868 * used for controlling the debug level.
6869 *
6870 * See the level definitions in iwl for details.
6871 */
6872
6873static ssize_t show_debug_level(struct device_driver *d, char *buf)
6874{
0a6857e7 6875 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY
6876}
6877static ssize_t store_debug_level(struct device_driver *d,
6878 const char *buf, size_t count)
6879{
6880 char *p = (char *)buf;
6881 u32 val;
6882
6883 val = simple_strtoul(p, &p, 0);
6884 if (p == buf)
6885 printk(KERN_INFO DRV_NAME
6886 ": %s is not in hex or decimal form.\n", buf);
6887 else
0a6857e7 6888 iwl_debug_level = val;
b481de9c
ZY
6889
6890 return strnlen(buf, count);
6891}
6892
6893static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
6894 show_debug_level, store_debug_level);
6895
0a6857e7 6896#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 6897
b481de9c
ZY
6898
6899static ssize_t show_temperature(struct device *d,
6900 struct device_attribute *attr, char *buf)
6901{
c79dd5b5 6902 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 6903
fee1247a 6904 if (!iwl_is_alive(priv))
b481de9c
ZY
6905 return -EAGAIN;
6906
bb8c093b 6907 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY
6908}
6909
6910static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6911
6912static ssize_t show_rs_window(struct device *d,
6913 struct device_attribute *attr,
6914 char *buf)
6915{
c79dd5b5 6916 struct iwl_priv *priv = d->driver_data;
bb8c093b 6917 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY
6918}
6919static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
6920
6921static ssize_t show_tx_power(struct device *d,
6922 struct device_attribute *attr, char *buf)
6923{
c79dd5b5 6924 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6925 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6926}
6927
6928static ssize_t store_tx_power(struct device *d,
6929 struct device_attribute *attr,
6930 const char *buf, size_t count)
6931{
c79dd5b5 6932 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6933 char *p = (char *)buf;
6934 u32 val;
6935
6936 val = simple_strtoul(p, &p, 10);
6937 if (p == buf)
6938 printk(KERN_INFO DRV_NAME
6939 ": %s is not in decimal form.\n", buf);
6940 else
bb8c093b 6941 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY
6942
6943 return count;
6944}
6945
6946static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6947
6948static ssize_t show_flags(struct device *d,
6949 struct device_attribute *attr, char *buf)
6950{
c79dd5b5 6951 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6952
6953 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
6954}
6955
6956static ssize_t store_flags(struct device *d,
6957 struct device_attribute *attr,
6958 const char *buf, size_t count)
6959{
c79dd5b5 6960 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6961 u32 flags = simple_strtoul(buf, NULL, 0);
6962
6963 mutex_lock(&priv->mutex);
6964 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
6965 /* Cancel any currently running scans... */
bb8c093b 6966 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
6967 IWL_WARNING("Could not cancel scan.\n");
6968 else {
6969 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6970 flags);
6971 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 6972 iwl4965_commit_rxon(priv);
b481de9c
ZY
6973 }
6974 }
6975 mutex_unlock(&priv->mutex);
6976
6977 return count;
6978}
6979
6980static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
6981
6982static ssize_t show_filter_flags(struct device *d,
6983 struct device_attribute *attr, char *buf)
6984{
c79dd5b5 6985 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6986
6987 return sprintf(buf, "0x%04X\n",
6988 le32_to_cpu(priv->active_rxon.filter_flags));
6989}
6990
6991static ssize_t store_filter_flags(struct device *d,
6992 struct device_attribute *attr,
6993 const char *buf, size_t count)
6994{
c79dd5b5 6995 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6996 u32 filter_flags = simple_strtoul(buf, NULL, 0);
6997
6998 mutex_lock(&priv->mutex);
6999 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7000 /* Cancel any currently running scans... */
bb8c093b 7001 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
7002 IWL_WARNING("Could not cancel scan.\n");
7003 else {
7004 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7005 "0x%04X\n", filter_flags);
7006 priv->staging_rxon.filter_flags =
7007 cpu_to_le32(filter_flags);
bb8c093b 7008 iwl4965_commit_rxon(priv);
b481de9c
ZY
7009 }
7010 }
7011 mutex_unlock(&priv->mutex);
7012
7013 return count;
7014}
7015
7016static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7017 store_filter_flags);
7018
c8b0e6e1 7019#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
7020
7021static ssize_t show_measurement(struct device *d,
7022 struct device_attribute *attr, char *buf)
7023{
c79dd5b5 7024 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7025 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY
7026 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7027 u8 *data = (u8 *) & measure_report;
7028 unsigned long flags;
7029
7030 spin_lock_irqsave(&priv->lock, flags);
7031 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7032 spin_unlock_irqrestore(&priv->lock, flags);
7033 return 0;
7034 }
7035 memcpy(&measure_report, &priv->measure_report, size);
7036 priv->measurement_status = 0;
7037 spin_unlock_irqrestore(&priv->lock, flags);
7038
7039 while (size && (PAGE_SIZE - len)) {
7040 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7041 PAGE_SIZE - len, 1);
7042 len = strlen(buf);
7043 if (PAGE_SIZE - len)
7044 buf[len++] = '\n';
7045
7046 ofs += 16;
7047 size -= min(size, 16U);
7048 }
7049
7050 return len;
7051}
7052
7053static ssize_t store_measurement(struct device *d,
7054 struct device_attribute *attr,
7055 const char *buf, size_t count)
7056{
c79dd5b5 7057 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7058 struct ieee80211_measurement_params params = {
7059 .channel = le16_to_cpu(priv->active_rxon.channel),
7060 .start_time = cpu_to_le64(priv->last_tsf),
7061 .duration = cpu_to_le16(1),
7062 };
7063 u8 type = IWL_MEASURE_BASIC;
7064 u8 buffer[32];
7065 u8 channel;
7066
7067 if (count) {
7068 char *p = buffer;
7069 strncpy(buffer, buf, min(sizeof(buffer), count));
7070 channel = simple_strtoul(p, NULL, 0);
7071 if (channel)
7072 params.channel = channel;
7073
7074 p = buffer;
7075 while (*p && *p != ' ')
7076 p++;
7077 if (*p)
7078 type = simple_strtoul(p + 1, NULL, 0);
7079 }
7080
7081 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7082 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 7083 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
7084
7085 return count;
7086}
7087
7088static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7089 show_measurement, store_measurement);
c8b0e6e1 7090#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY
7091
7092static ssize_t store_retry_rate(struct device *d,
7093 struct device_attribute *attr,
7094 const char *buf, size_t count)
7095{
c79dd5b5 7096 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7097
7098 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7099 if (priv->retry_rate <= 0)
7100 priv->retry_rate = 1;
7101
7102 return count;
7103}
7104
7105static ssize_t show_retry_rate(struct device *d,
7106 struct device_attribute *attr, char *buf)
7107{
c79dd5b5 7108 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7109 return sprintf(buf, "%d", priv->retry_rate);
7110}
7111
7112static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7113 store_retry_rate);
7114
7115static ssize_t store_power_level(struct device *d,
7116 struct device_attribute *attr,
7117 const char *buf, size_t count)
7118{
c79dd5b5 7119 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7120 int rc;
7121 int mode;
7122
7123 mode = simple_strtoul(buf, NULL, 0);
7124 mutex_lock(&priv->mutex);
7125
fee1247a 7126 if (!iwl_is_ready(priv)) {
b481de9c
ZY
7127 rc = -EAGAIN;
7128 goto out;
7129 }
7130
5da4b55f
MA
7131 rc = iwl_power_set_user_mode(priv, mode);
7132 if (rc) {
7133 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7134 goto out;
b481de9c 7135 }
b481de9c
ZY
7136 rc = count;
7137
7138 out:
7139 mutex_unlock(&priv->mutex);
7140 return rc;
7141}
7142
7143#define MAX_WX_STRING 80
7144
7145/* Values are in microsecond */
7146static const s32 timeout_duration[] = {
7147 350000,
7148 250000,
7149 75000,
7150 37000,
7151 25000,
7152};
7153static const s32 period_duration[] = {
7154 400000,
7155 700000,
7156 1000000,
7157 1000000,
7158 1000000
7159};
7160
7161static ssize_t show_power_level(struct device *d,
7162 struct device_attribute *attr, char *buf)
7163{
c79dd5b5 7164 struct iwl_priv *priv = dev_get_drvdata(d);
5da4b55f 7165 int level = priv->power_data.power_mode;
b481de9c
ZY
7166 char *p = buf;
7167
7168 p += sprintf(p, "%d ", level);
7169 switch (level) {
7170 case IWL_POWER_MODE_CAM:
7171 case IWL_POWER_AC:
7172 p += sprintf(p, "(AC)");
7173 break;
7174 case IWL_POWER_BATTERY:
7175 p += sprintf(p, "(BATTERY)");
7176 break;
7177 default:
7178 p += sprintf(p,
7179 "(Timeout %dms, Period %dms)",
7180 timeout_duration[level - 1] / 1000,
7181 period_duration[level - 1] / 1000);
7182 }
5da4b55f 7183/*
b481de9c
ZY
7184 if (!(priv->power_mode & IWL_POWER_ENABLED))
7185 p += sprintf(p, " OFF\n");
7186 else
7187 p += sprintf(p, " \n");
5da4b55f
MA
7188*/
7189 p += sprintf(p, " \n");
b481de9c 7190 return (p - buf + 1);
b481de9c
ZY
7191}
7192
7193static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7194 store_power_level);
7195
7196static ssize_t show_channels(struct device *d,
7197 struct device_attribute *attr, char *buf)
7198{
8318d78a
JB
7199 /* all this shit doesn't belong into sysfs anyway */
7200 return 0;
b481de9c
ZY
7201}
7202
7203static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7204
7205static ssize_t show_statistics(struct device *d,
7206 struct device_attribute *attr, char *buf)
7207{
c79dd5b5 7208 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7209 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY
7210 u32 len = 0, ofs = 0;
7211 u8 *data = (u8 *) & priv->statistics;
7212 int rc = 0;
7213
fee1247a 7214 if (!iwl_is_alive(priv))
b481de9c
ZY
7215 return -EAGAIN;
7216
7217 mutex_lock(&priv->mutex);
49ea8596 7218 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
7219 mutex_unlock(&priv->mutex);
7220
7221 if (rc) {
7222 len = sprintf(buf,
7223 "Error sending statistics request: 0x%08X\n", rc);
7224 return len;
7225 }
7226
7227 while (size && (PAGE_SIZE - len)) {
7228 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7229 PAGE_SIZE - len, 1);
7230 len = strlen(buf);
7231 if (PAGE_SIZE - len)
7232 buf[len++] = '\n';
7233
7234 ofs += 16;
7235 size -= min(size, 16U);
7236 }
7237
7238 return len;
7239}
7240
7241static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7242
b481de9c
ZY
7243static ssize_t show_status(struct device *d,
7244 struct device_attribute *attr, char *buf)
7245{
c79dd5b5 7246 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 7247 if (!iwl_is_alive(priv))
b481de9c
ZY
7248 return -EAGAIN;
7249 return sprintf(buf, "0x%08x\n", (int)priv->status);
7250}
7251
7252static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7253
7254static ssize_t dump_error_log(struct device *d,
7255 struct device_attribute *attr,
7256 const char *buf, size_t count)
7257{
7258 char *p = (char *)buf;
7259
7260 if (p[0] == '1')
c79dd5b5 7261 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
7262
7263 return strnlen(buf, count);
7264}
7265
7266static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7267
7268static ssize_t dump_event_log(struct device *d,
7269 struct device_attribute *attr,
7270 const char *buf, size_t count)
7271{
7272 char *p = (char *)buf;
7273
7274 if (p[0] == '1')
c79dd5b5 7275 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
7276
7277 return strnlen(buf, count);
7278}
7279
7280static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7281
7282/*****************************************************************************
7283 *
7284 * driver setup and teardown
7285 *
7286 *****************************************************************************/
7287
c79dd5b5 7288static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
7289{
7290 priv->workqueue = create_workqueue(DRV_NAME);
7291
7292 init_waitqueue_head(&priv->wait_command_queue);
7293
bb8c093b
CH
7294 INIT_WORK(&priv->up, iwl4965_bg_up);
7295 INIT_WORK(&priv->restart, iwl4965_bg_restart);
7296 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
7297 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
7298 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
7299 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
7300 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
7301 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7302 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7303 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7304 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7305 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7306
7307 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY
7308
7309 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7310 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
7311}
7312
c79dd5b5 7313static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7314{
bb8c093b 7315 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7316
3ae6a054 7317 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
7318 cancel_delayed_work(&priv->scan_check);
7319 cancel_delayed_work(&priv->alive_start);
7320 cancel_delayed_work(&priv->post_associate);
7321 cancel_work_sync(&priv->beacon_update);
7322}
7323
bb8c093b 7324static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY
7325 &dev_attr_channels.attr,
7326 &dev_attr_dump_errors.attr,
7327 &dev_attr_dump_events.attr,
7328 &dev_attr_flags.attr,
7329 &dev_attr_filter_flags.attr,
c8b0e6e1 7330#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
7331 &dev_attr_measurement.attr,
7332#endif
7333 &dev_attr_power_level.attr,
7334 &dev_attr_retry_rate.attr,
b481de9c
ZY
7335 &dev_attr_rs_window.attr,
7336 &dev_attr_statistics.attr,
7337 &dev_attr_status.attr,
7338 &dev_attr_temperature.attr,
b481de9c
ZY
7339 &dev_attr_tx_power.attr,
7340
7341 NULL
7342};
7343
bb8c093b 7344static struct attribute_group iwl4965_attribute_group = {
b481de9c 7345 .name = NULL, /* put in device directory */
bb8c093b 7346 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
7347};
7348
bb8c093b
CH
7349static struct ieee80211_ops iwl4965_hw_ops = {
7350 .tx = iwl4965_mac_tx,
7351 .start = iwl4965_mac_start,
7352 .stop = iwl4965_mac_stop,
7353 .add_interface = iwl4965_mac_add_interface,
7354 .remove_interface = iwl4965_mac_remove_interface,
7355 .config = iwl4965_mac_config,
7356 .config_interface = iwl4965_mac_config_interface,
7357 .configure_filter = iwl4965_configure_filter,
7358 .set_key = iwl4965_mac_set_key,
ab885f8c 7359 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
7360 .get_stats = iwl4965_mac_get_stats,
7361 .get_tx_stats = iwl4965_mac_get_tx_stats,
7362 .conf_tx = iwl4965_mac_conf_tx,
7363 .get_tsf = iwl4965_mac_get_tsf,
7364 .reset_tsf = iwl4965_mac_reset_tsf,
7365 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7366 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7367#ifdef CONFIG_IWL4965_HT
9ab46173 7368 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7369#endif /* CONFIG_IWL4965_HT */
bb8c093b 7370 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
7371};
7372
bb8c093b 7373static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
7374{
7375 int err = 0;
c79dd5b5 7376 struct iwl_priv *priv;
b481de9c 7377 struct ieee80211_hw *hw;
82b9a121 7378 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 7379 unsigned long flags;
5a66926a 7380 DECLARE_MAC_BUF(mac);
b481de9c 7381
316c30d9
AK
7382 /************************
7383 * 1. Allocating HW data
7384 ************************/
7385
6440adb5
BC
7386 /* Disabling hardware scan means that mac80211 will perform scans
7387 * "the hard way", rather than using device's scan. */
1ea87396 7388 if (cfg->mod_params->disable_hw_scan) {
b481de9c 7389 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 7390 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
7391 }
7392
1d0a082d
AK
7393 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
7394 if (!hw) {
b481de9c
ZY
7395 err = -ENOMEM;
7396 goto out;
7397 }
1d0a082d
AK
7398 priv = hw->priv;
7399 /* At this point both hw and priv are allocated. */
7400
b481de9c
ZY
7401 SET_IEEE80211_DEV(hw, &pdev->dev);
7402
7403 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 7404 priv->cfg = cfg;
b481de9c 7405 priv->pci_dev = pdev;
316c30d9 7406
0a6857e7 7407#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 7408 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
7409 atomic_set(&priv->restrict_refcnt, 0);
7410#endif
b481de9c 7411
316c30d9
AK
7412 /**************************
7413 * 2. Initializing PCI bus
7414 **************************/
7415 if (pci_enable_device(pdev)) {
7416 err = -ENODEV;
7417 goto out_ieee80211_free_hw;
7418 }
7419
7420 pci_set_master(pdev);
7421
cc2a8ea8 7422 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 7423 if (!err)
cc2a8ea8
RR
7424 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
7425 if (err) {
7426 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7427 if (!err)
7428 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7429 /* both attempts failed: */
316c30d9 7430 if (err) {
cc2a8ea8
RR
7431 printk(KERN_WARNING "%s: No suitable DMA available.\n",
7432 DRV_NAME);
316c30d9 7433 goto out_pci_disable_device;
cc2a8ea8 7434 }
316c30d9
AK
7435 }
7436
7437 err = pci_request_regions(pdev, DRV_NAME);
7438 if (err)
7439 goto out_pci_disable_device;
7440
7441 pci_set_drvdata(pdev, priv);
7442
7443 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7444 * PCI Tx retries from interfering with C3 CPU state */
7445 pci_write_config_byte(pdev, 0x41, 0x00);
7446
7447 /***********************
7448 * 3. Read REV register
7449 ***********************/
7450 priv->hw_base = pci_iomap(pdev, 0, 0);
7451 if (!priv->hw_base) {
7452 err = -ENODEV;
7453 goto out_pci_release_regions;
7454 }
7455
7456 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7457 (unsigned long long) pci_resource_len(pdev, 0));
7458 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7459
b661c819 7460 iwl_hw_detect(priv);
316c30d9 7461 printk(KERN_INFO DRV_NAME
b661c819
TW
7462 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
7463 priv->cfg->name, priv->hw_rev);
316c30d9 7464
91238714
TW
7465 /* amp init */
7466 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 7467 if (err < 0) {
91238714 7468 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
7469 goto out_iounmap;
7470 }
91238714
TW
7471 /*****************
7472 * 4. Read EEPROM
7473 *****************/
316c30d9
AK
7474 /* Read the EEPROM */
7475 err = iwl_eeprom_init(priv);
7476 if (err) {
7477 IWL_ERROR("Unable to init EEPROM\n");
7478 goto out_iounmap;
7479 }
8614f360
TW
7480 err = iwl_eeprom_check_version(priv);
7481 if (err)
7482 goto out_iounmap;
7483
316c30d9
AK
7484 /* MAC Address location in EEPROM same for 3945/4965 */
7485 iwl_eeprom_get_mac(priv, priv->mac_addr);
7486 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
7487 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7488
7489 /************************
7490 * 5. Setup HW constants
7491 ************************/
7492 /* Device-specific setup */
5425e490
TW
7493 if (priv->cfg->ops->lib->set_hw_params(priv)) {
7494 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 7495 goto out_free_eeprom;
316c30d9
AK
7496 }
7497
7498 /*******************
7499 * 6. Setup hw/priv
7500 *******************/
b481de9c 7501
bf85ea4f
AK
7502 err = iwl_setup(priv);
7503 if (err)
399f4900 7504 goto out_free_eeprom;
bf85ea4f 7505 /* At this point both hw and priv are initialized. */
316c30d9
AK
7506
7507 /**********************************
7508 * 7. Initialize module parameters
7509 **********************************/
7510
7511 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 7512 if (priv->cfg->mod_params->disable) {
316c30d9
AK
7513 set_bit(STATUS_RF_KILL_SW, &priv->status);
7514 IWL_DEBUG_INFO("Radio disabled.\n");
7515 }
7516
1ea87396 7517 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK
7518 priv->qos_data.qos_enable = 1;
7519
7520 /********************
7521 * 8. Setup services
7522 ********************/
0359facc 7523 spin_lock_irqsave(&priv->lock, flags);
316c30d9 7524 iwl4965_disable_interrupts(priv);
0359facc 7525 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
7526
7527 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
7528 if (err) {
7529 IWL_ERROR("failed to create sysfs device attributes\n");
399f4900 7530 goto out_free_eeprom;
316c30d9
AK
7531 }
7532
7533 err = iwl_dbgfs_register(priv, DRV_NAME);
7534 if (err) {
7535 IWL_ERROR("failed to create debugfs files\n");
7536 goto out_remove_sysfs;
7537 }
7538
7539 iwl4965_setup_deferred_work(priv);
7540 iwl4965_setup_rx_handlers(priv);
7541
7542 /********************
7543 * 9. Conclude
7544 ********************/
5a66926a
ZY
7545 pci_save_state(pdev);
7546 pci_disable_device(pdev);
b481de9c 7547
c8381fdc
MA
7548 /* notify iwlcore to init */
7549 iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
b481de9c
ZY
7550 return 0;
7551
316c30d9
AK
7552 out_remove_sysfs:
7553 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
073d3f5f
TW
7554 out_free_eeprom:
7555 iwl_eeprom_free(priv);
b481de9c
ZY
7556 out_iounmap:
7557 pci_iounmap(pdev, priv->hw_base);
7558 out_pci_release_regions:
7559 pci_release_regions(pdev);
316c30d9 7560 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
7561 out_pci_disable_device:
7562 pci_disable_device(pdev);
b481de9c
ZY
7563 out_ieee80211_free_hw:
7564 ieee80211_free_hw(priv->hw);
7565 out:
7566 return err;
7567}
7568
c83dbf68 7569static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 7570{
c79dd5b5 7571 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY
7572 struct list_head *p, *q;
7573 int i;
0359facc 7574 unsigned long flags;
b481de9c
ZY
7575
7576 if (!priv)
7577 return;
7578
7579 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7580
c4f55232
RR
7581 if (priv->mac80211_registered) {
7582 ieee80211_unregister_hw(priv->hw);
7583 priv->mac80211_registered = 0;
7584 }
7585
b481de9c 7586 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 7587
bb8c093b 7588 iwl4965_down(priv);
b481de9c 7589
0359facc
MA
7590 /* make sure we flush any pending irq or
7591 * tasklet for the driver
7592 */
7593 spin_lock_irqsave(&priv->lock, flags);
7594 iwl4965_disable_interrupts(priv);
7595 spin_unlock_irqrestore(&priv->lock, flags);
7596
7597 iwl_synchronize_irq(priv);
7598
b481de9c
ZY
7599 /* Free MAC hash list for ADHOC */
7600 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
7601 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
7602 list_del(p);
bb8c093b 7603 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY
7604 }
7605 }
7606
c8381fdc 7607 iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
712b6cf5 7608 iwl_dbgfs_unregister(priv);
bb8c093b 7609 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 7610
bb8c093b 7611 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
7612
7613 if (priv->rxq.bd)
bb8c093b
CH
7614 iwl4965_rx_queue_free(priv, &priv->rxq);
7615 iwl4965_hw_txq_ctx_free(priv);
b481de9c 7616
bf85ea4f 7617 iwlcore_clear_stations_table(priv);
073d3f5f 7618 iwl_eeprom_free(priv);
b481de9c 7619
b481de9c 7620
948c171c
MA
7621 /*netif_stop_queue(dev); */
7622 flush_workqueue(priv->workqueue);
7623
bb8c093b 7624 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
7625 * priv->workqueue... so we can't take down the workqueue
7626 * until now... */
7627 destroy_workqueue(priv->workqueue);
7628 priv->workqueue = NULL;
7629
b481de9c
ZY
7630 pci_iounmap(pdev, priv->hw_base);
7631 pci_release_regions(pdev);
7632 pci_disable_device(pdev);
7633 pci_set_drvdata(pdev, NULL);
7634
bf85ea4f 7635 iwl_free_channel_map(priv);
849e0dce 7636 iwl4965_free_geos(priv);
b481de9c
ZY
7637
7638 if (priv->ibss_beacon)
7639 dev_kfree_skb(priv->ibss_beacon);
7640
7641 ieee80211_free_hw(priv->hw);
7642}
7643
7644#ifdef CONFIG_PM
7645
bb8c093b 7646static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 7647{
c79dd5b5 7648 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7649
e655b9f0
ZY
7650 if (priv->is_open) {
7651 set_bit(STATUS_IN_SUSPEND, &priv->status);
7652 iwl4965_mac_stop(priv->hw);
7653 priv->is_open = 1;
7654 }
b481de9c 7655
b481de9c
ZY
7656 pci_set_power_state(pdev, PCI_D3hot);
7657
b481de9c
ZY
7658 return 0;
7659}
7660
bb8c093b 7661static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 7662{
c79dd5b5 7663 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7664
b481de9c 7665 pci_set_power_state(pdev, PCI_D0);
b481de9c 7666
e655b9f0
ZY
7667 if (priv->is_open)
7668 iwl4965_mac_start(priv->hw);
b481de9c 7669
e655b9f0 7670 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
7671 return 0;
7672}
7673
7674#endif /* CONFIG_PM */
7675
7676/*****************************************************************************
7677 *
7678 * driver and module entry point
7679 *
7680 *****************************************************************************/
7681
fed9017e
RR
7682/* Hardware specific file defines the PCI IDs table for that hardware module */
7683static struct pci_device_id iwl_hw_card_ids[] = {
7684 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
7685 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
7686 {0}
7687};
7688MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
7689
7690static struct pci_driver iwl_driver = {
b481de9c 7691 .name = DRV_NAME,
fed9017e 7692 .id_table = iwl_hw_card_ids,
bb8c093b
CH
7693 .probe = iwl4965_pci_probe,
7694 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 7695#ifdef CONFIG_PM
bb8c093b
CH
7696 .suspend = iwl4965_pci_suspend,
7697 .resume = iwl4965_pci_resume,
b481de9c
ZY
7698#endif
7699};
7700
bb8c093b 7701static int __init iwl4965_init(void)
b481de9c
ZY
7702{
7703
7704 int ret;
7705 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7706 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
7707
7708 ret = iwl4965_rate_control_register();
7709 if (ret) {
7710 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
7711 return ret;
7712 }
7713
fed9017e 7714 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
7715 if (ret) {
7716 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 7717 goto error_register;
b481de9c 7718 }
0a6857e7 7719#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7720 ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c
ZY
7721 if (ret) {
7722 IWL_ERROR("Unable to create driver sysfs file\n");
897e1cf2 7723 goto error_debug;
b481de9c
ZY
7724 }
7725#endif
7726
7727 return ret;
897e1cf2
RC
7728
7729#ifdef CONFIG_IWLWIFI_DEBUG
7730error_debug:
fed9017e 7731 pci_unregister_driver(&iwl_driver);
897e1cf2
RC
7732#endif
7733error_register:
7734 iwl4965_rate_control_unregister();
7735 return ret;
b481de9c
ZY
7736}
7737
bb8c093b 7738static void __exit iwl4965_exit(void)
b481de9c 7739{
0a6857e7 7740#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7741 driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c 7742#endif
fed9017e 7743 pci_unregister_driver(&iwl_driver);
897e1cf2 7744 iwl4965_rate_control_unregister();
b481de9c
ZY
7745}
7746
bb8c093b
CH
7747module_exit(iwl4965_exit);
7748module_init(iwl4965_init);