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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
3e0d4cb1 | 49 | #include "iwl-dev.h" |
fee1247a | 50 | #include "iwl-core.h" |
3395f6e9 | 51 | #include "iwl-io.h" |
b481de9c | 52 | #include "iwl-helpers.h" |
6974e363 | 53 | #include "iwl-sta.h" |
f0832f13 | 54 | #include "iwl-calib.h" |
b481de9c | 55 | |
416e1438 | 56 | |
b481de9c ZY |
57 | /****************************************************************************** |
58 | * | |
59 | * module boiler plate | |
60 | * | |
61 | ******************************************************************************/ | |
62 | ||
b481de9c ZY |
63 | /* |
64 | * module name, copyright, version, etc. | |
65 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
66 | */ | |
67 | ||
68 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
69 | ||
0a6857e7 | 70 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
71 | #define VD "d" |
72 | #else | |
73 | #define VD | |
74 | #endif | |
75 | ||
c8b0e6e1 | 76 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
77 | #define VS "s" |
78 | #else | |
79 | #define VS | |
80 | #endif | |
81 | ||
df48c323 | 82 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 83 | |
b481de9c ZY |
84 | |
85 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
86 | MODULE_VERSION(DRV_VERSION); | |
87 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
88 | MODULE_LICENSE("GPL"); | |
89 | ||
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
deb09c43 EG |
99 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
100 | { | |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
bb8c093b | 111 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
c1adf9fb | 117 | static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
bb8c093b | 177 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
9fbab516 | 184 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
c79dd5b5 | 191 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
195 | if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) || | |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, | |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
210 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
211 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
212 | return 1; | |
213 | ||
214 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
215 | * be updated with the RXON_ASSOC command -- however only some | |
216 | * flag transitions are allowed using RXON_ASSOC */ | |
217 | ||
218 | /* Check if we are not switching bands */ | |
219 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
220 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
221 | return 1; | |
222 | ||
223 | /* Check if we are switching association toggle */ | |
224 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
225 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
226 | return 1; | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
b481de9c | 231 | /** |
bb8c093b | 232 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 233 | * |
01ebd063 | 234 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
235 | * the active_rxon structure is updated with the new data. This |
236 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
237 | * a HW tune is required based on the RXON structure changes. | |
238 | */ | |
c79dd5b5 | 239 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
240 | { |
241 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 242 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 243 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
244 | int rc = 0; |
245 | ||
fee1247a | 246 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
247 | return -1; |
248 | ||
249 | /* always get timestamp with Rx frame */ | |
250 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
251 | ||
bb8c093b | 252 | rc = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
b481de9c ZY |
253 | if (rc) { |
254 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | |
255 | return -EINVAL; | |
256 | } | |
257 | ||
258 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 259 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 260 | * and other flags for the current radio configuration. */ |
bb8c093b | 261 | if (!iwl4965_full_rxon_required(priv)) { |
7e8c519e | 262 | rc = iwl_send_rxon_assoc(priv); |
b481de9c ZY |
263 | if (rc) { |
264 | IWL_ERROR("Error setting RXON_ASSOC " | |
265 | "configuration (%d).\n", rc); | |
266 | return rc; | |
267 | } | |
268 | ||
269 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
270 | ||
271 | return 0; | |
272 | } | |
273 | ||
274 | /* station table will be cleared */ | |
275 | priv->assoc_station_added = 0; | |
276 | ||
b481de9c ZY |
277 | /* If we are currently associated and the new config requires |
278 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
279 | * we must clear the associated from the active configuration | |
280 | * before we apply the new config */ | |
3109ece1 | 281 | if (iwl_is_associated(priv) && |
b481de9c ZY |
282 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
283 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | |
284 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
285 | ||
857485c0 | 286 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 287 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
288 | &priv->active_rxon); |
289 | ||
290 | /* If the mask clearing failed then we set | |
291 | * active_rxon back to what it was previously */ | |
292 | if (rc) { | |
293 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
294 | IWL_ERROR("Error clearing ASSOC_MSK on current " | |
295 | "configuration (%d).\n", rc); | |
296 | return rc; | |
297 | } | |
b481de9c ZY |
298 | } |
299 | ||
300 | IWL_DEBUG_INFO("Sending RXON\n" | |
301 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
302 | "* channel = %d\n" | |
0795af57 | 303 | "* bssid = %s\n", |
b481de9c ZY |
304 | ((priv->staging_rxon.filter_flags & |
305 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | |
306 | le16_to_cpu(priv->staging_rxon.channel), | |
0795af57 | 307 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 308 | |
099b40b7 | 309 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
b481de9c | 310 | /* Apply the new configuration */ |
857485c0 | 311 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 312 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
b481de9c ZY |
313 | if (rc) { |
314 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | |
315 | return rc; | |
316 | } | |
317 | ||
7a999bf0 | 318 | iwl_remove_station(priv, iwl_bcast_addr, 0); |
bf85ea4f | 319 | iwlcore_clear_stations_table(priv); |
556f8db7 | 320 | |
b481de9c ZY |
321 | if (!priv->error_recovering) |
322 | priv->start_calib = 0; | |
323 | ||
f0832f13 | 324 | iwl_init_sensitivity(priv); |
b481de9c ZY |
325 | |
326 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
327 | ||
328 | /* If we issue a new RXON command which required a tune then we must | |
329 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
630fe9b6 | 330 | rc = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
b481de9c | 331 | if (rc) { |
630fe9b6 | 332 | IWL_ERROR("Error sending TX power (%d).\n", rc); |
b481de9c ZY |
333 | return rc; |
334 | } | |
335 | ||
336 | /* Add the broadcast address so we can send broadcast frames */ | |
4f40e4d9 | 337 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
b481de9c ZY |
338 | IWL_INVALID_STATION) { |
339 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | |
340 | return -EIO; | |
341 | } | |
342 | ||
343 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
344 | * add the IWL_AP_ID to the station rate table */ | |
3109ece1 | 345 | if (iwl_is_associated(priv) && |
b481de9c | 346 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
4f40e4d9 | 347 | if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
348 | == IWL_INVALID_STATION) { |
349 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
350 | return -EIO; | |
351 | } | |
352 | priv->assoc_station_added = 1; | |
6974e363 EG |
353 | if (priv->default_wep_key && |
354 | iwl_send_static_wepkey_cmd(priv, 0)) | |
355 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c ZY |
356 | } |
357 | ||
358 | return 0; | |
359 | } | |
360 | ||
5da4b55f MA |
361 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
362 | { | |
363 | ||
c7de35cd | 364 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
365 | iwl4965_commit_rxon(priv); |
366 | } | |
367 | ||
c79dd5b5 | 368 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 369 | { |
bb8c093b | 370 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
371 | .flags = 3, |
372 | .lead_time = 0xAA, | |
373 | .max_kill = 1, | |
374 | .kill_ack_mask = 0, | |
375 | .kill_cts_mask = 0, | |
376 | }; | |
377 | ||
857485c0 | 378 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 379 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
380 | } |
381 | ||
b481de9c ZY |
382 | /* |
383 | * CARD_STATE_CMD | |
384 | * | |
9fbab516 | 385 | * Use: Sets the device's internal card state to enable, disable, or halt |
b481de9c ZY |
386 | * |
387 | * When in the 'enable' state the card operates as normal. | |
388 | * When in the 'disable' state, the card enters into a low power mode. | |
389 | * When in the 'halt' state, the card is shut down and must be fully | |
390 | * restarted to come back on. | |
391 | */ | |
c79dd5b5 | 392 | static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
b481de9c | 393 | { |
857485c0 | 394 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
395 | .id = REPLY_CARD_STATE_CMD, |
396 | .len = sizeof(u32), | |
397 | .data = &flags, | |
398 | .meta.flags = meta_flag, | |
399 | }; | |
400 | ||
857485c0 | 401 | return iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
402 | } |
403 | ||
fcab423d | 404 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
405 | { |
406 | struct list_head *element; | |
407 | ||
408 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
409 | priv->frames_count); | |
410 | ||
411 | while (!list_empty(&priv->free_frames)) { | |
412 | element = priv->free_frames.next; | |
413 | list_del(element); | |
fcab423d | 414 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
415 | priv->frames_count--; |
416 | } | |
417 | ||
418 | if (priv->frames_count) { | |
419 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
420 | priv->frames_count); | |
421 | priv->frames_count = 0; | |
422 | } | |
423 | } | |
424 | ||
fcab423d | 425 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 426 | { |
fcab423d | 427 | struct iwl_frame *frame; |
b481de9c ZY |
428 | struct list_head *element; |
429 | if (list_empty(&priv->free_frames)) { | |
430 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
431 | if (!frame) { | |
432 | IWL_ERROR("Could not allocate frame!\n"); | |
433 | return NULL; | |
434 | } | |
435 | ||
436 | priv->frames_count++; | |
437 | return frame; | |
438 | } | |
439 | ||
440 | element = priv->free_frames.next; | |
441 | list_del(element); | |
fcab423d | 442 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
443 | } |
444 | ||
fcab423d | 445 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
446 | { |
447 | memset(frame, 0, sizeof(*frame)); | |
448 | list_add(&frame->list, &priv->free_frames); | |
449 | } | |
450 | ||
c79dd5b5 | 451 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c ZY |
452 | struct ieee80211_hdr *hdr, |
453 | const u8 *dest, int left) | |
454 | { | |
455 | ||
3109ece1 | 456 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
457 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
458 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
459 | return 0; | |
460 | ||
461 | if (priv->ibss_beacon->len > left) | |
462 | return 0; | |
463 | ||
464 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
465 | ||
466 | return priv->ibss_beacon->len; | |
467 | } | |
468 | ||
39e88504 | 469 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 470 | { |
39e88504 GC |
471 | int i; |
472 | int rate_mask; | |
473 | ||
474 | /* Set rate mask*/ | |
475 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
476 | rate_mask = priv->active_rate_basic & 0xF; | |
477 | else | |
478 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 479 | |
39e88504 | 480 | /* Find lowest valid rate */ |
b481de9c | 481 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 482 | i = iwl_rates[i].next_ieee) { |
b481de9c | 483 | if (rate_mask & (1 << i)) |
1826dcc0 | 484 | return iwl_rates[i].plcp; |
b481de9c ZY |
485 | } |
486 | ||
39e88504 GC |
487 | /* No valid rate was found. Assign the lowest one */ |
488 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
489 | return IWL_RATE_1M_PLCP; | |
490 | else | |
491 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
492 | } |
493 | ||
c79dd5b5 | 494 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 495 | { |
fcab423d | 496 | struct iwl_frame *frame; |
b481de9c ZY |
497 | unsigned int frame_size; |
498 | int rc; | |
499 | u8 rate; | |
500 | ||
fcab423d | 501 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
502 | |
503 | if (!frame) { | |
504 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
505 | "command.\n"); | |
506 | return -ENOMEM; | |
507 | } | |
508 | ||
39e88504 | 509 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 510 | |
bb8c093b | 511 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 512 | |
857485c0 | 513 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
514 | &frame->u.cmd[0]); |
515 | ||
fcab423d | 516 | iwl_free_frame(priv, frame); |
b481de9c ZY |
517 | |
518 | return rc; | |
519 | } | |
520 | ||
b481de9c ZY |
521 | /****************************************************************************** |
522 | * | |
523 | * Misc. internal state and helper functions | |
524 | * | |
525 | ******************************************************************************/ | |
b481de9c | 526 | |
d1141dfb EG |
527 | static void iwl4965_ht_conf(struct iwl_priv *priv, |
528 | struct ieee80211_bss_conf *bss_conf) | |
529 | { | |
530 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
531 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
532 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
533 | ||
534 | IWL_DEBUG_MAC80211("enter: \n"); | |
535 | ||
536 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
537 | ||
538 | if (!iwl_conf->is_ht) | |
539 | return; | |
540 | ||
541 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
542 | ||
543 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
a9841013 | 544 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 545 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 546 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
547 | |
548 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
549 | iwl_conf->max_amsdu_size = | |
550 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
551 | ||
552 | iwl_conf->supported_chan_width = | |
553 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
554 | iwl_conf->extension_chan_offset = | |
555 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
556 | /* If no above or below channel supplied disable FAT channel */ | |
963f5517 EG |
557 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE && |
558 | iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) { | |
559 | iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE; | |
d1141dfb | 560 | iwl_conf->supported_chan_width = 0; |
963f5517 | 561 | } |
d1141dfb EG |
562 | |
563 | iwl_conf->tx_mimo_ps_mode = | |
564 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
565 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
566 | ||
567 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
568 | iwl_conf->tx_chan_width = | |
569 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
570 | iwl_conf->ht_protection = | |
571 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
572 | iwl_conf->non_GF_STA_present = | |
573 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
574 | ||
575 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
576 | IWL_DEBUG_MAC80211("leave\n"); | |
577 | } | |
578 | ||
b481de9c ZY |
579 | /* |
580 | * QoS support | |
581 | */ | |
c79dd5b5 | 582 | static int iwl4965_send_qos_params_command(struct iwl_priv *priv, |
bb8c093b | 583 | struct iwl4965_qosparam_cmd *qos) |
b481de9c ZY |
584 | { |
585 | ||
857485c0 | 586 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
bb8c093b | 587 | sizeof(struct iwl4965_qosparam_cmd), qos); |
b481de9c ZY |
588 | } |
589 | ||
c79dd5b5 | 590 | static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c ZY |
591 | { |
592 | unsigned long flags; | |
593 | ||
b481de9c ZY |
594 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
595 | return; | |
596 | ||
597 | if (!priv->qos_data.qos_enable) | |
598 | return; | |
599 | ||
600 | spin_lock_irqsave(&priv->lock, flags); | |
601 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
602 | ||
603 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
604 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
605 | priv->qos_data.def_qos_parm.qos_flags |= | |
606 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
607 | if (priv->qos_data.qos_active) |
608 | priv->qos_data.def_qos_parm.qos_flags |= | |
609 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
610 | ||
fd105e79 | 611 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 612 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 613 | |
b481de9c ZY |
614 | spin_unlock_irqrestore(&priv->lock, flags); |
615 | ||
3109ece1 | 616 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
617 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
618 | priv->qos_data.qos_active, | |
619 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 620 | |
bb8c093b | 621 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
622 | &(priv->qos_data.def_qos_parm)); |
623 | } | |
624 | } | |
625 | ||
c79dd5b5 | 626 | int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
627 | { |
628 | /* Filter incoming packets to determine if they are targeted toward | |
629 | * this network, discarding packets coming from ourselves */ | |
630 | switch (priv->iw_mode) { | |
631 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
632 | /* packets from our adapter are dropped (echo) */ | |
633 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
634 | return 0; | |
635 | /* {broad,multi}cast packets to our IBSS go through */ | |
636 | if (is_multicast_ether_addr(header->addr1)) | |
637 | return !compare_ether_addr(header->addr3, priv->bssid); | |
638 | /* packets to our adapter go through */ | |
639 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
640 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
641 | /* packets from our adapter are dropped (echo) */ | |
642 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
643 | return 0; | |
644 | /* {broad,multi}cast packets to our BSS go through */ | |
645 | if (is_multicast_ether_addr(header->addr1)) | |
646 | return !compare_ether_addr(header->addr2, priv->bssid); | |
647 | /* packets to our adapter go through */ | |
648 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
69dc5d9d TW |
649 | default: |
650 | break; | |
b481de9c ZY |
651 | } |
652 | ||
653 | return 1; | |
654 | } | |
655 | ||
c79dd5b5 | 656 | static void iwl4965_sequence_reset(struct iwl_priv *priv) |
b481de9c ZY |
657 | { |
658 | /* Reset ieee stats */ | |
659 | ||
660 | /* We don't reset the net_device_stats (ieee->stats) on | |
661 | * re-association */ | |
662 | ||
663 | priv->last_seq_num = -1; | |
664 | priv->last_frag_num = -1; | |
665 | priv->last_packet_time = 0; | |
666 | ||
2a421b91 | 667 | iwl_scan_cancel(priv); |
b481de9c ZY |
668 | } |
669 | ||
670 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
671 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
672 | ||
bb8c093b | 673 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
674 | { |
675 | u16 new_val = 0; | |
676 | u16 beacon_factor = 0; | |
677 | ||
678 | beacon_factor = | |
679 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
680 | / MAX_UCODE_BEACON_INTERVAL; | |
681 | new_val = beacon_val / beacon_factor; | |
682 | ||
683 | return cpu_to_le16(new_val); | |
684 | } | |
685 | ||
c79dd5b5 | 686 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
687 | { |
688 | u64 interval_tm_unit; | |
689 | u64 tsf, result; | |
690 | unsigned long flags; | |
691 | struct ieee80211_conf *conf = NULL; | |
692 | u16 beacon_int = 0; | |
693 | ||
694 | conf = ieee80211_get_hw_conf(priv->hw); | |
695 | ||
696 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
697 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
698 | priv->rxon_timing.timestamp.dw[0] = | |
699 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c ZY |
700 | |
701 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
702 | ||
3109ece1 | 703 | tsf = priv->timestamp; |
b481de9c ZY |
704 | |
705 | beacon_int = priv->beacon_int; | |
706 | spin_unlock_irqrestore(&priv->lock, flags); | |
707 | ||
708 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
709 | if (beacon_int == 0) { | |
710 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
711 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
712 | } else { | |
713 | priv->rxon_timing.beacon_interval = | |
714 | cpu_to_le16(beacon_int); | |
715 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 716 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
717 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
718 | } | |
719 | ||
720 | priv->rxon_timing.atim_window = 0; | |
721 | } else { | |
722 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 723 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
724 | /* TODO: we need to get atim_window from upper stack |
725 | * for now we set to 0 */ | |
726 | priv->rxon_timing.atim_window = 0; | |
727 | } | |
728 | ||
729 | interval_tm_unit = | |
730 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
731 | result = do_div(tsf, interval_tm_unit); | |
732 | priv->rxon_timing.beacon_init_val = | |
733 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
734 | ||
735 | IWL_DEBUG_ASSOC | |
736 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
737 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
738 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
739 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
740 | } | |
741 | ||
82a66bbb TW |
742 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
743 | enum ieee80211_band band) | |
b481de9c | 744 | { |
8318d78a | 745 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
746 | priv->staging_rxon.flags &= |
747 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
748 | | RXON_FLG_CCK_MSK); | |
749 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
750 | } else { | |
508e32e1 | 751 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
752 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
753 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
754 | else | |
755 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
756 | ||
757 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
758 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
759 | ||
760 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
761 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
762 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
763 | } | |
764 | } | |
765 | ||
766 | /* | |
01ebd063 | 767 | * initialize rxon structure with default values from eeprom |
b481de9c | 768 | */ |
c79dd5b5 | 769 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 770 | { |
bf85ea4f | 771 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
772 | |
773 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
774 | ||
775 | switch (priv->iw_mode) { | |
776 | case IEEE80211_IF_TYPE_AP: | |
777 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
778 | break; | |
779 | ||
780 | case IEEE80211_IF_TYPE_STA: | |
781 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
782 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
783 | break; | |
784 | ||
785 | case IEEE80211_IF_TYPE_IBSS: | |
786 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
787 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
788 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
789 | RXON_FILTER_ACCEPT_GRP_MSK; | |
790 | break; | |
791 | ||
792 | case IEEE80211_IF_TYPE_MNTR: | |
793 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
794 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
795 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
796 | break; | |
69dc5d9d TW |
797 | default: |
798 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
799 | break; | |
b481de9c ZY |
800 | } |
801 | ||
802 | #if 0 | |
803 | /* TODO: Figure out when short_preamble would be set and cache from | |
804 | * that */ | |
805 | if (!hw_to_local(priv->hw)->short_preamble) | |
806 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
807 | else | |
808 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
809 | #endif | |
810 | ||
8622e705 | 811 | ch_info = iwl_get_channel_info(priv, priv->band, |
b481de9c ZY |
812 | le16_to_cpu(priv->staging_rxon.channel)); |
813 | ||
814 | if (!ch_info) | |
815 | ch_info = &priv->channel_info[0]; | |
816 | ||
817 | /* | |
818 | * in some case A channels are all non IBSS | |
819 | * in this case force B/G channel | |
820 | */ | |
821 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
822 | !(is_channel_ibss(ch_info))) | |
823 | ch_info = &priv->channel_info[0]; | |
824 | ||
825 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 826 | priv->band = ch_info->band; |
b481de9c | 827 | |
82a66bbb | 828 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
829 | |
830 | priv->staging_rxon.ofdm_basic_rates = | |
831 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
832 | priv->staging_rxon.cck_basic_rates = | |
833 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
834 | ||
835 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
836 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
837 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
838 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
839 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
840 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 841 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
842 | } |
843 | ||
c79dd5b5 | 844 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 845 | { |
b481de9c ZY |
846 | priv->iw_mode = mode; |
847 | ||
398f9e76 AK |
848 | /* init channel/phymode to values given at driver init */ |
849 | iwl_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6); | |
850 | ||
bb8c093b | 851 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
852 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
853 | ||
bf85ea4f | 854 | iwlcore_clear_stations_table(priv); |
b481de9c | 855 | |
fde3571f | 856 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 857 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
858 | return -EAGAIN; |
859 | ||
860 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 861 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
862 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
863 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
864 | return -EAGAIN; | |
865 | } | |
866 | ||
bb8c093b | 867 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
868 | |
869 | return 0; | |
870 | } | |
871 | ||
c79dd5b5 | 872 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 873 | { |
8318d78a | 874 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
875 | struct ieee80211_rate *rate; |
876 | int i; | |
877 | ||
d1141dfb | 878 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
879 | if (!hw) { |
880 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
881 | return; | |
882 | } | |
b481de9c ZY |
883 | |
884 | priv->active_rate = 0; | |
885 | priv->active_rate_basic = 0; | |
886 | ||
8318d78a JB |
887 | for (i = 0; i < hw->n_bitrates; i++) { |
888 | rate = &(hw->bitrates[i]); | |
889 | if (rate->hw_value < IWL_RATE_COUNT) | |
890 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
891 | } |
892 | ||
893 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
894 | priv->active_rate, priv->active_rate_basic); | |
895 | ||
896 | /* | |
897 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
898 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
899 | * OFDM | |
900 | */ | |
901 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
902 | priv->staging_rxon.cck_basic_rates = | |
903 | ((priv->active_rate_basic & | |
904 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
905 | else | |
906 | priv->staging_rxon.cck_basic_rates = | |
907 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
908 | ||
909 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
910 | priv->staging_rxon.ofdm_basic_rates = | |
911 | ((priv->active_rate_basic & | |
912 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
913 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
914 | else | |
915 | priv->staging_rxon.ofdm_basic_rates = | |
916 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
917 | } | |
918 | ||
64e72c3e | 919 | int iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio) |
b481de9c ZY |
920 | { |
921 | unsigned long flags; | |
922 | ||
923 | if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
64e72c3e | 924 | return 0; |
b481de9c ZY |
925 | |
926 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n", | |
927 | disable_radio ? "OFF" : "ON"); | |
928 | ||
929 | if (disable_radio) { | |
2a421b91 | 930 | iwl_scan_cancel(priv); |
b481de9c ZY |
931 | /* FIXME: This is a workaround for AP */ |
932 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
933 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 934 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
935 | CSR_UCODE_SW_BIT_RFKILL); |
936 | spin_unlock_irqrestore(&priv->lock, flags); | |
ad97edd2 | 937 | /* call the host command only if no hw rf-kill set */ |
59003835 MA |
938 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status) && |
939 | iwl_is_ready(priv)) | |
ad97edd2 MA |
940 | iwl4965_send_card_state(priv, |
941 | CARD_STATE_CMD_DISABLE, | |
942 | 0); | |
b481de9c | 943 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
ad97edd2 MA |
944 | |
945 | /* make sure mac80211 stop sending Tx frame */ | |
946 | if (priv->mac80211_registered) | |
947 | ieee80211_stop_queues(priv->hw); | |
b481de9c | 948 | } |
64e72c3e | 949 | return 0; |
b481de9c ZY |
950 | } |
951 | ||
952 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 953 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
b481de9c ZY |
954 | |
955 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
956 | spin_unlock_irqrestore(&priv->lock, flags); | |
957 | ||
958 | /* wake up ucode */ | |
959 | msleep(10); | |
960 | ||
961 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
962 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
963 | if (!iwl_grab_nic_access(priv)) | |
964 | iwl_release_nic_access(priv); | |
b481de9c ZY |
965 | spin_unlock_irqrestore(&priv->lock, flags); |
966 | ||
967 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
968 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
969 | "disabled by HW switch\n"); | |
64e72c3e | 970 | return 0; |
b481de9c ZY |
971 | } |
972 | ||
973 | queue_work(priv->workqueue, &priv->restart); | |
64e72c3e | 974 | return 1; |
b481de9c ZY |
975 | } |
976 | ||
b481de9c ZY |
977 | #define IWL_PACKET_RETRY_TIME HZ |
978 | ||
c79dd5b5 | 979 | int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
980 | { |
981 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
982 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
983 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
984 | u16 *last_seq, *last_frag; | |
985 | unsigned long *last_time; | |
986 | ||
987 | switch (priv->iw_mode) { | |
988 | case IEEE80211_IF_TYPE_IBSS:{ | |
989 | struct list_head *p; | |
bb8c093b | 990 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
991 | u8 *mac = header->addr2; |
992 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
993 | ||
994 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 995 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
996 | if (!compare_ether_addr(entry->mac, mac)) |
997 | break; | |
998 | } | |
999 | if (p == &priv->ibss_mac_hash[index]) { | |
1000 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
1001 | if (!entry) { | |
bc434dd2 | 1002 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
1003 | return 0; |
1004 | } | |
1005 | memcpy(entry->mac, mac, ETH_ALEN); | |
1006 | entry->seq_num = seq; | |
1007 | entry->frag_num = frag; | |
1008 | entry->packet_time = jiffies; | |
bc434dd2 | 1009 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
1010 | return 0; |
1011 | } | |
1012 | last_seq = &entry->seq_num; | |
1013 | last_frag = &entry->frag_num; | |
1014 | last_time = &entry->packet_time; | |
1015 | break; | |
1016 | } | |
1017 | case IEEE80211_IF_TYPE_STA: | |
1018 | last_seq = &priv->last_seq_num; | |
1019 | last_frag = &priv->last_frag_num; | |
1020 | last_time = &priv->last_packet_time; | |
1021 | break; | |
1022 | default: | |
1023 | return 0; | |
1024 | } | |
1025 | if ((*last_seq == seq) && | |
1026 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
1027 | if (*last_frag == frag) | |
1028 | goto drop; | |
1029 | if (*last_frag + 1 != frag) | |
1030 | /* out-of-order fragment */ | |
1031 | goto drop; | |
1032 | } else | |
1033 | *last_seq = seq; | |
1034 | ||
1035 | *last_frag = frag; | |
1036 | *last_time = jiffies; | |
1037 | return 0; | |
1038 | ||
1039 | drop: | |
1040 | return 1; | |
1041 | } | |
1042 | ||
c8b0e6e1 | 1043 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
1044 | |
1045 | #include "iwl-spectrum.h" | |
1046 | ||
1047 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
1048 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
1049 | #define TIME_UNIT 1024 | |
1050 | ||
1051 | /* | |
1052 | * extended beacon time format | |
1053 | * time in usec will be changed into a 32-bit value in 8:24 format | |
1054 | * the high 1 byte is the beacon counts | |
1055 | * the lower 3 bytes is the time in usec within one beacon interval | |
1056 | */ | |
1057 | ||
bb8c093b | 1058 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
1059 | { |
1060 | u32 quot; | |
1061 | u32 rem; | |
1062 | u32 interval = beacon_interval * 1024; | |
1063 | ||
1064 | if (!interval || !usec) | |
1065 | return 0; | |
1066 | ||
1067 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
1068 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
1069 | ||
1070 | return (quot << 24) + rem; | |
1071 | } | |
1072 | ||
1073 | /* base is usually what we get from ucode with each received frame, | |
1074 | * the same as HW timer counter counting down | |
1075 | */ | |
1076 | ||
bb8c093b | 1077 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
1078 | { |
1079 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
1080 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
1081 | u32 interval = beacon_interval * TIME_UNIT; | |
1082 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
1083 | (addon & BEACON_TIME_MASK_HIGH); | |
1084 | ||
1085 | if (base_low > addon_low) | |
1086 | res += base_low - addon_low; | |
1087 | else if (base_low < addon_low) { | |
1088 | res += interval + base_low - addon_low; | |
1089 | res += (1 << 24); | |
1090 | } else | |
1091 | res += (1 << 24); | |
1092 | ||
1093 | return cpu_to_le32(res); | |
1094 | } | |
1095 | ||
c79dd5b5 | 1096 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
1097 | struct ieee80211_measurement_params *params, |
1098 | u8 type) | |
1099 | { | |
bb8c093b | 1100 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 1101 | struct iwl_rx_packet *res; |
857485c0 | 1102 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
1103 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
1104 | .data = (void *)&spectrum, | |
1105 | .meta.flags = CMD_WANT_SKB, | |
1106 | }; | |
1107 | u32 add_time = le64_to_cpu(params->start_time); | |
1108 | int rc; | |
1109 | int spectrum_resp_status; | |
1110 | int duration = le16_to_cpu(params->duration); | |
1111 | ||
3109ece1 | 1112 | if (iwl_is_associated(priv)) |
b481de9c | 1113 | add_time = |
bb8c093b | 1114 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
1115 | le64_to_cpu(params->start_time) - priv->last_tsf, |
1116 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
1117 | ||
1118 | memset(&spectrum, 0, sizeof(spectrum)); | |
1119 | ||
1120 | spectrum.channel_count = cpu_to_le16(1); | |
1121 | spectrum.flags = | |
1122 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
1123 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
1124 | cmd.len = sizeof(spectrum); | |
1125 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
1126 | ||
3109ece1 | 1127 | if (iwl_is_associated(priv)) |
b481de9c | 1128 | spectrum.start_time = |
bb8c093b | 1129 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
1130 | add_time, |
1131 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
1132 | else | |
1133 | spectrum.start_time = 0; | |
1134 | ||
1135 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
1136 | spectrum.channels[0].channel = params->channel; | |
1137 | spectrum.channels[0].type = type; | |
1138 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
1139 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
1140 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
1141 | ||
857485c0 | 1142 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
1143 | if (rc) |
1144 | return rc; | |
1145 | ||
db11d634 | 1146 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1147 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1148 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
1149 | rc = -EIO; | |
1150 | } | |
1151 | ||
1152 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
1153 | switch (spectrum_resp_status) { | |
1154 | case 0: /* Command will be handled */ | |
1155 | if (res->u.spectrum.id != 0xff) { | |
1156 | IWL_DEBUG_INFO | |
1157 | ("Replaced existing measurement: %d\n", | |
1158 | res->u.spectrum.id); | |
1159 | priv->measurement_status &= ~MEASUREMENT_READY; | |
1160 | } | |
1161 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
1162 | rc = 0; | |
1163 | break; | |
1164 | ||
1165 | case 1: /* Command will not be handled */ | |
1166 | rc = -EAGAIN; | |
1167 | break; | |
1168 | } | |
1169 | ||
1170 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1171 | ||
1172 | return rc; | |
1173 | } | |
1174 | #endif | |
1175 | ||
b481de9c ZY |
1176 | /****************************************************************************** |
1177 | * | |
1178 | * Generic RX handler implementations | |
1179 | * | |
1180 | ******************************************************************************/ | |
885ba202 TW |
1181 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1182 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1183 | { |
db11d634 | 1184 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1185 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1186 | struct delayed_work *pwork; |
1187 | ||
1188 | palive = &pkt->u.alive_frame; | |
1189 | ||
1190 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1191 | "0x%01X 0x%01X\n", | |
1192 | palive->is_valid, palive->ver_type, | |
1193 | palive->ver_subtype); | |
1194 | ||
1195 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1196 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1197 | memcpy(&priv->card_alive_init, | |
1198 | &pkt->u.alive_frame, | |
885ba202 | 1199 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1200 | pwork = &priv->init_alive_start; |
1201 | } else { | |
1202 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1203 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1204 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1205 | pwork = &priv->alive_start; |
1206 | } | |
1207 | ||
1208 | /* We delay the ALIVE response by 5ms to | |
1209 | * give the HW RF Kill time to activate... */ | |
1210 | if (palive->is_valid == UCODE_VALID_OK) | |
1211 | queue_delayed_work(priv->workqueue, pwork, | |
1212 | msecs_to_jiffies(5)); | |
1213 | else | |
1214 | IWL_WARNING("uCode did not respond OK.\n"); | |
1215 | } | |
1216 | ||
c79dd5b5 | 1217 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1218 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1219 | { |
db11d634 | 1220 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1221 | |
1222 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1223 | "seq 0x%04X ser 0x%08X\n", | |
1224 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1225 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1226 | pkt->u.err_resp.cmd_id, | |
1227 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1228 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1229 | } | |
1230 | ||
1231 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1232 | ||
a55360e4 | 1233 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1234 | { |
db11d634 | 1235 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1236 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1237 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1238 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1239 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1240 | rxon->channel = csa->channel; | |
1241 | priv->staging_rxon.channel = csa->channel; | |
1242 | } | |
1243 | ||
c79dd5b5 | 1244 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1245 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1246 | { |
c8b0e6e1 | 1247 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
db11d634 | 1248 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1249 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1250 | |
1251 | if (!report->state) { | |
f3d67999 EK |
1252 | IWL_DEBUG(IWL_DL_11H, |
1253 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1254 | return; |
1255 | } | |
1256 | ||
1257 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1258 | priv->measurement_status |= MEASUREMENT_READY; | |
1259 | #endif | |
1260 | } | |
1261 | ||
c79dd5b5 | 1262 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1263 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1264 | { |
0a6857e7 | 1265 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1266 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1267 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1268 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1269 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1270 | #endif | |
1271 | } | |
1272 | ||
c79dd5b5 | 1273 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1274 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1275 | { |
db11d634 | 1276 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1277 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1278 | "notification for %s:\n", | |
1279 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1280 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1281 | } |
1282 | ||
bb8c093b | 1283 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 1284 | { |
c79dd5b5 TW |
1285 | struct iwl_priv *priv = |
1286 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1287 | struct sk_buff *beacon; |
1288 | ||
1289 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1290 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1291 | |
1292 | if (!beacon) { | |
1293 | IWL_ERROR("update beacon failed\n"); | |
1294 | return; | |
1295 | } | |
1296 | ||
1297 | mutex_lock(&priv->mutex); | |
1298 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1299 | if (priv->ibss_beacon) | |
1300 | dev_kfree_skb(priv->ibss_beacon); | |
1301 | ||
1302 | priv->ibss_beacon = beacon; | |
1303 | mutex_unlock(&priv->mutex); | |
1304 | ||
bb8c093b | 1305 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
1306 | } |
1307 | ||
4e39317d EG |
1308 | /** |
1309 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics | |
1310 | * | |
1311 | * This callback is provided in order to send a statistics request. | |
1312 | * | |
1313 | * This timer function is continually reset to execute within | |
1314 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1315 | * was received. We need to ensure we receive the statistics in order | |
1316 | * to update the temperature used for calibrating the TXPOWER. | |
1317 | */ | |
1318 | static void iwl4965_bg_statistics_periodic(unsigned long data) | |
1319 | { | |
1320 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1321 | ||
1322 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1323 | return; | |
1324 | ||
1325 | iwl_send_statistics_request(priv, CMD_ASYNC); | |
1326 | } | |
1327 | ||
c79dd5b5 | 1328 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1329 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1330 | { |
0a6857e7 | 1331 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1332 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1333 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1334 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1335 | |
1336 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1337 | "tsf %d %d rate %d\n", | |
25a6572c | 1338 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1339 | beacon->beacon_notify_hdr.failure_frame, |
1340 | le32_to_cpu(beacon->ibss_mgr_status), | |
1341 | le32_to_cpu(beacon->high_tsf), | |
1342 | le32_to_cpu(beacon->low_tsf), rate); | |
1343 | #endif | |
1344 | ||
1345 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
1346 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
1347 | queue_work(priv->workqueue, &priv->beacon_update); | |
1348 | } | |
1349 | ||
b481de9c ZY |
1350 | /* Handle notification from uCode that card's power state is changing |
1351 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 1352 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1353 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1354 | { |
db11d634 | 1355 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1356 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1357 | unsigned long status = priv->status; | |
1358 | ||
1359 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1360 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1361 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1362 | ||
1363 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1364 | RF_CARD_DISABLED)) { | |
1365 | ||
3395f6e9 | 1366 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1367 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1368 | ||
3395f6e9 TW |
1369 | if (!iwl_grab_nic_access(priv)) { |
1370 | iwl_write_direct32( | |
b481de9c ZY |
1371 | priv, HBUS_TARG_MBX_C, |
1372 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1373 | ||
3395f6e9 | 1374 | iwl_release_nic_access(priv); |
b481de9c ZY |
1375 | } |
1376 | ||
1377 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1378 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1379 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1380 | if (!iwl_grab_nic_access(priv)) { |
1381 | iwl_write_direct32( | |
b481de9c ZY |
1382 | priv, HBUS_TARG_MBX_C, |
1383 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1384 | ||
3395f6e9 | 1385 | iwl_release_nic_access(priv); |
b481de9c ZY |
1386 | } |
1387 | } | |
1388 | ||
1389 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1390 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1391 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1392 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1393 | if (!iwl_grab_nic_access(priv)) | |
1394 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1395 | } |
1396 | } | |
1397 | ||
1398 | if (flags & HW_CARD_DISABLED) | |
1399 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1400 | else | |
1401 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1402 | ||
1403 | ||
1404 | if (flags & SW_CARD_DISABLED) | |
1405 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1406 | else | |
1407 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1408 | ||
1409 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1410 | iwl_scan_cancel(priv); |
b481de9c ZY |
1411 | |
1412 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1413 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1414 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1415 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1416 | queue_work(priv->workqueue, &priv->rf_kill); | |
1417 | else | |
1418 | wake_up_interruptible(&priv->wait_command_queue); | |
1419 | } | |
1420 | ||
37a44211 RR |
1421 | /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD). |
1422 | * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */ | |
1423 | static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv, | |
1424 | struct iwl_rx_mem_buffer *rxb) | |
1425 | { | |
1426 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | |
1427 | priv->last_phy_res[0] = 1; | |
1428 | memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), | |
1429 | sizeof(struct iwl4965_rx_phy_res)); | |
1430 | } | |
1431 | ||
b481de9c | 1432 | /** |
bb8c093b | 1433 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1434 | * |
1435 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1436 | * to the host. | |
1437 | * | |
1438 | * This function chains into the hardware specific files for them to setup | |
1439 | * any hardware specific handlers as well. | |
1440 | */ | |
c79dd5b5 | 1441 | static void iwl4965_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1442 | { |
885ba202 | 1443 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
bb8c093b CH |
1444 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; |
1445 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 1446 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
1447 | iwl4965_rx_spectrum_measure_notif; |
1448 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 1449 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
1450 | iwl4965_rx_pm_debug_statistics_notif; |
1451 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 1452 | |
9fbab516 BC |
1453 | /* |
1454 | * The same handler is used for both the REPLY to a discrete | |
1455 | * statistics request from the host as well as for the periodic | |
1456 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1457 | */ |
bb8c093b CH |
1458 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
1459 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
2a421b91 TW |
1460 | |
1461 | iwl_setup_rx_scan_handlers(priv); | |
1462 | ||
37a44211 | 1463 | /* status change handler */ |
bb8c093b | 1464 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; |
b481de9c | 1465 | |
c1354754 TW |
1466 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1467 | iwl_rx_missed_beacon_notif; | |
37a44211 RR |
1468 | /* Rx handlers */ |
1469 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy; | |
1470 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx; | |
9fbab516 | 1471 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1472 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1473 | } |
1474 | ||
5c0eef96 MA |
1475 | /* |
1476 | * this should be called while priv->lock is locked | |
1477 | */ | |
a55360e4 | 1478 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1479 | { |
a55360e4 TW |
1480 | iwl_rx_allocate(priv); |
1481 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1482 | } |
1483 | ||
b481de9c ZY |
1484 | |
1485 | /** | |
a55360e4 | 1486 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1487 | * |
1488 | * Uses the priv->rx_handlers callback function array to invoke | |
1489 | * the appropriate handlers, including command responses, | |
1490 | * frame-received notifications, and other notifications. | |
1491 | */ | |
a55360e4 | 1492 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1493 | { |
a55360e4 | 1494 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1495 | struct iwl_rx_packet *pkt; |
a55360e4 | 1496 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1497 | u32 r, i; |
1498 | int reclaim; | |
1499 | unsigned long flags; | |
5c0eef96 | 1500 | u8 fill_rx = 0; |
d68ab680 | 1501 | u32 count = 8; |
b481de9c | 1502 | |
6440adb5 BC |
1503 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1504 | * buffer that the driver may process (last buffer filled by ucode). */ | |
d67f5489 | 1505 | r = priv->cfg->ops->lib->shared_mem_rx_idx(priv); |
b481de9c ZY |
1506 | i = rxq->read; |
1507 | ||
1508 | /* Rx interrupt, but nothing sent from uCode */ | |
1509 | if (i == r) | |
f3d67999 | 1510 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1511 | |
a55360e4 | 1512 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1513 | fill_rx = 1; |
1514 | ||
b481de9c ZY |
1515 | while (i != r) { |
1516 | rxb = rxq->queue[i]; | |
1517 | ||
9fbab516 | 1518 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1519 | * then a bug has been introduced in the queue refilling |
1520 | * routines -- catch it here */ | |
1521 | BUG_ON(rxb == NULL); | |
1522 | ||
1523 | rxq->queue[i] = NULL; | |
1524 | ||
1525 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1526 | priv->hw_params.rx_buf_size, |
b481de9c | 1527 | PCI_DMA_FROMDEVICE); |
db11d634 | 1528 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1529 | |
1530 | /* Reclaim a command buffer only if this packet is a response | |
1531 | * to a (driver-originated) command. | |
1532 | * If the packet (e.g. Rx frame) originated from uCode, | |
1533 | * there is no command buffer to reclaim. | |
1534 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1535 | * but apparently a few don't get set; catch them here. */ | |
1536 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1537 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1538 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 1539 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1540 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1541 | (pkt->hdr.cmd != REPLY_TX); | |
1542 | ||
1543 | /* Based on type of command response or notification, | |
1544 | * handle those that need handling via function in | |
bb8c093b | 1545 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c | 1546 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1547 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1548 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1549 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1550 | } else { | |
1551 | /* No handling needed */ | |
f3d67999 | 1552 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1553 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1554 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1555 | pkt->hdr.cmd); | |
1556 | } | |
1557 | ||
1558 | if (reclaim) { | |
9fbab516 | 1559 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1560 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1561 | * as we reclaim the driver command queue */ |
1562 | if (rxb && rxb->skb) | |
17b88929 | 1563 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1564 | else |
1565 | IWL_WARNING("Claim null rxb?\n"); | |
1566 | } | |
1567 | ||
1568 | /* For now we just don't re-use anything. We can tweak this | |
1569 | * later to try and re-use notification packets and SKBs that | |
1570 | * fail to Rx correctly */ | |
1571 | if (rxb->skb != NULL) { | |
1572 | priv->alloc_rxb_skb--; | |
1573 | dev_kfree_skb_any(rxb->skb); | |
1574 | rxb->skb = NULL; | |
1575 | } | |
1576 | ||
1577 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1578 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 1579 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1580 | spin_lock_irqsave(&rxq->lock, flags); |
1581 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1582 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1583 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1584 | /* If there are a lot of unused frames, |
1585 | * restock the Rx queue so ucode wont assert. */ | |
1586 | if (fill_rx) { | |
1587 | count++; | |
1588 | if (count >= 8) { | |
1589 | priv->rxq.read = i; | |
a55360e4 | 1590 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1591 | count = 0; |
1592 | } | |
1593 | } | |
b481de9c ZY |
1594 | } |
1595 | ||
1596 | /* Backtrack one entry */ | |
1597 | priv->rxq.read = i; | |
a55360e4 TW |
1598 | iwl_rx_queue_restock(priv); |
1599 | } | |
1600 | /* Convert linear signal-to-noise ratio into dB */ | |
1601 | static u8 ratio2dB[100] = { | |
1602 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
1603 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
1604 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
1605 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
1606 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
1607 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
1608 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
1609 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
1610 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
1611 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
1612 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
1613 | }; | |
1614 | ||
1615 | /* Calculates a relative dB value from a ratio of linear | |
1616 | * (i.e. not dB) signal levels. | |
1617 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
1618 | int iwl4965_calc_db_from_ratio(int sig_ratio) | |
1619 | { | |
1620 | /* 1000:1 or higher just report as 60 dB */ | |
1621 | if (sig_ratio >= 1000) | |
1622 | return 60; | |
1623 | ||
1624 | /* 100:1 or higher, divide by 10 and use table, | |
1625 | * add 20 dB to make up for divide by 10 */ | |
1626 | if (sig_ratio >= 100) | |
1627 | return (20 + (int)ratio2dB[sig_ratio/10]); | |
1628 | ||
1629 | /* We shouldn't see this */ | |
1630 | if (sig_ratio < 1) | |
1631 | return 0; | |
1632 | ||
1633 | /* Use table for ratios 1:1 - 99:1 */ | |
1634 | return (int)ratio2dB[sig_ratio]; | |
1635 | } | |
1636 | ||
1637 | #define PERFECT_RSSI (-20) /* dBm */ | |
1638 | #define WORST_RSSI (-95) /* dBm */ | |
1639 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
1640 | ||
1641 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
1642 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
1643 | * about formulas used below. */ | |
1644 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) | |
1645 | { | |
1646 | int sig_qual; | |
1647 | int degradation = PERFECT_RSSI - rssi_dbm; | |
1648 | ||
1649 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
1650 | * as indicator; formula is (signal dbm - noise dbm). | |
1651 | * SNR at or above 40 is a great signal (100%). | |
1652 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
1653 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
1654 | if (noise_dbm) { | |
1655 | if (rssi_dbm - noise_dbm >= 40) | |
1656 | return 100; | |
1657 | else if (rssi_dbm < noise_dbm) | |
1658 | return 0; | |
1659 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
1660 | ||
1661 | /* Else use just the signal level. | |
1662 | * This formula is a least squares fit of data points collected and | |
1663 | * compared with a reference system that had a percentage (%) display | |
1664 | * for signal quality. */ | |
1665 | } else | |
1666 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
1667 | (15 * RSSI_RANGE + 62 * degradation)) / | |
1668 | (RSSI_RANGE * RSSI_RANGE); | |
1669 | ||
1670 | if (sig_qual > 100) | |
1671 | sig_qual = 100; | |
1672 | else if (sig_qual < 1) | |
1673 | sig_qual = 0; | |
1674 | ||
1675 | return sig_qual; | |
b481de9c ZY |
1676 | } |
1677 | ||
0a6857e7 | 1678 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1679 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1680 | { |
c1adf9fb | 1681 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 JP |
1682 | DECLARE_MAC_BUF(mac); |
1683 | ||
b481de9c | 1684 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1685 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1686 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1687 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1688 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1689 | le32_to_cpu(rxon->filter_flags)); | |
1690 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1691 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1692 | rxon->ofdm_basic_rates); | |
1693 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
1694 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
1695 | print_mac(mac, rxon->node_addr)); | |
1696 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
1697 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
1698 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1699 | } | |
1700 | #endif | |
1701 | ||
c79dd5b5 | 1702 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1703 | { |
1704 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1705 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1706 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1707 | } |
1708 | ||
0359facc MA |
1709 | /* call this function to flush any scheduled tasklet */ |
1710 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1711 | { | |
1712 | /* wait to make sure we flush pedding tasklet*/ | |
1713 | synchronize_irq(priv->pci_dev->irq); | |
1714 | tasklet_kill(&priv->irq_tasklet); | |
1715 | } | |
1716 | ||
c79dd5b5 | 1717 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1718 | { |
1719 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1720 | ||
1721 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1722 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1723 | |
1724 | /* acknowledge/clear/reset any interrupts still pending | |
1725 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1726 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1727 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1728 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1729 | } | |
1730 | ||
b481de9c | 1731 | |
b481de9c | 1732 | /** |
bb8c093b | 1733 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1734 | */ |
c79dd5b5 | 1735 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1736 | { |
bb8c093b | 1737 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
1738 | set_bit(STATUS_FW_ERROR, &priv->status); |
1739 | ||
1740 | /* Cancel currently queued command. */ | |
1741 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1742 | ||
0a6857e7 | 1743 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1744 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1745 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1746 | iwl_dump_nic_event_log(priv); |
bf403db8 | 1747 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
1748 | } |
1749 | #endif | |
1750 | ||
1751 | wake_up_interruptible(&priv->wait_command_queue); | |
1752 | ||
1753 | /* Keep the restart process from trying to send host | |
1754 | * commands by clearing the INIT status bit */ | |
1755 | clear_bit(STATUS_READY, &priv->status); | |
1756 | ||
1757 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1758 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1759 | "Restarting adapter due to uCode error.\n"); |
1760 | ||
3109ece1 | 1761 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1762 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1763 | sizeof(priv->recovery_rxon)); | |
1764 | priv->error_recovering = 1; | |
1765 | } | |
3a1081e8 EK |
1766 | if (priv->cfg->mod_params->restart_fw) |
1767 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1768 | } |
1769 | } | |
1770 | ||
c79dd5b5 | 1771 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1772 | { |
1773 | unsigned long flags; | |
1774 | ||
1775 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1776 | sizeof(priv->staging_rxon)); | |
1777 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 1778 | iwl4965_commit_rxon(priv); |
b481de9c | 1779 | |
4f40e4d9 | 1780 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1781 | |
1782 | spin_lock_irqsave(&priv->lock, flags); | |
1783 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1784 | priv->error_recovering = 0; | |
1785 | spin_unlock_irqrestore(&priv->lock, flags); | |
1786 | } | |
1787 | ||
c79dd5b5 | 1788 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1789 | { |
1790 | u32 inta, handled = 0; | |
1791 | u32 inta_fh; | |
1792 | unsigned long flags; | |
0a6857e7 | 1793 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1794 | u32 inta_mask; |
1795 | #endif | |
1796 | ||
1797 | spin_lock_irqsave(&priv->lock, flags); | |
1798 | ||
1799 | /* Ack/clear/reset pending uCode interrupts. | |
1800 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1801 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1802 | inta = iwl_read32(priv, CSR_INT); |
1803 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1804 | |
1805 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1806 | * Any new interrupts that happen after this, either while we're | |
1807 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1808 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1809 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1810 | |
0a6857e7 | 1811 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1812 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1813 | /* just for debug */ |
3395f6e9 | 1814 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1815 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1816 | inta, inta_mask, inta_fh); | |
1817 | } | |
1818 | #endif | |
1819 | ||
1820 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1821 | * atomic, make sure that inta covers all the interrupts that | |
1822 | * we've discovered, even if FH interrupt came in just after | |
1823 | * reading CSR_INT. */ | |
6f83eaa1 | 1824 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1825 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1826 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1827 | inta |= CSR_INT_BIT_FH_TX; |
1828 | ||
1829 | /* Now service all interrupt bits discovered above. */ | |
1830 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1831 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1832 | ||
1833 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 1834 | iwl4965_disable_interrupts(priv); |
b481de9c | 1835 | |
bb8c093b | 1836 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1837 | |
1838 | handled |= CSR_INT_BIT_HW_ERR; | |
1839 | ||
1840 | spin_unlock_irqrestore(&priv->lock, flags); | |
1841 | ||
1842 | return; | |
1843 | } | |
1844 | ||
0a6857e7 | 1845 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1846 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1847 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1848 | if (inta & CSR_INT_BIT_SCD) |
1849 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1850 | "the frame/frames.\n"); | |
b481de9c ZY |
1851 | |
1852 | /* Alive notification via Rx interrupt will do the real work */ | |
1853 | if (inta & CSR_INT_BIT_ALIVE) | |
1854 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1855 | } | |
1856 | #endif | |
1857 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1858 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1859 | |
9fbab516 | 1860 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1861 | if (inta & CSR_INT_BIT_RF_KILL) { |
1862 | int hw_rf_kill = 0; | |
3395f6e9 | 1863 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1864 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1865 | hw_rf_kill = 1; | |
1866 | ||
f3d67999 | 1867 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1868 | hw_rf_kill ? "disable radio":"enable radio"); |
1869 | ||
1870 | /* Queue restart only if RF_KILL switch was set to "kill" | |
1871 | * when we loaded driver, and is now set to "enable". | |
1872 | * After we're Alive, RF_KILL gets handled by | |
3230455d | 1873 | * iwl4965_rx_card_state_notif() */ |
53e49093 ZY |
1874 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
1875 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 1876 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 1877 | } |
b481de9c ZY |
1878 | |
1879 | handled |= CSR_INT_BIT_RF_KILL; | |
1880 | } | |
1881 | ||
9fbab516 | 1882 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1883 | if (inta & CSR_INT_BIT_CT_KILL) { |
1884 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1885 | handled |= CSR_INT_BIT_CT_KILL; | |
1886 | } | |
1887 | ||
1888 | /* Error detected by uCode */ | |
1889 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1890 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1891 | inta); | |
bb8c093b | 1892 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1893 | handled |= CSR_INT_BIT_SW_ERR; |
1894 | } | |
1895 | ||
1896 | /* uCode wakes up after power-down sleep */ | |
1897 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1898 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1899 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1900 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1901 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1902 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1903 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1904 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1905 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1906 | |
1907 | handled |= CSR_INT_BIT_WAKEUP; | |
1908 | } | |
1909 | ||
1910 | /* All uCode command responses, including Tx command responses, | |
1911 | * Rx "responses" (frame-received notification), and other | |
1912 | * notifications from uCode come through here*/ | |
1913 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1914 | iwl_rx_handle(priv); |
b481de9c ZY |
1915 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1916 | } | |
1917 | ||
1918 | if (inta & CSR_INT_BIT_FH_TX) { | |
1919 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1920 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1921 | /* FH finished to write, send event */ |
1922 | priv->ucode_write_complete = 1; | |
1923 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1924 | } |
1925 | ||
1926 | if (inta & ~handled) | |
1927 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1928 | ||
1929 | if (inta & ~CSR_INI_SET_MASK) { | |
1930 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1931 | inta & ~CSR_INI_SET_MASK); | |
1932 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1933 | } | |
1934 | ||
1935 | /* Re-enable all interrupts */ | |
0359facc MA |
1936 | /* only Re-enable if diabled by irq */ |
1937 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1938 | iwl4965_enable_interrupts(priv); | |
b481de9c | 1939 | |
0a6857e7 | 1940 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1941 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1942 | inta = iwl_read32(priv, CSR_INT); |
1943 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1944 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1945 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1946 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1947 | } | |
1948 | #endif | |
1949 | spin_unlock_irqrestore(&priv->lock, flags); | |
1950 | } | |
1951 | ||
bb8c093b | 1952 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 1953 | { |
c79dd5b5 | 1954 | struct iwl_priv *priv = data; |
b481de9c ZY |
1955 | u32 inta, inta_mask; |
1956 | u32 inta_fh; | |
1957 | if (!priv) | |
1958 | return IRQ_NONE; | |
1959 | ||
1960 | spin_lock(&priv->lock); | |
1961 | ||
1962 | /* Disable (but don't clear!) interrupts here to avoid | |
1963 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1964 | * If we have something to service, the tasklet will re-enable ints. | |
1965 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1966 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1967 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1968 | |
1969 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1970 | inta = iwl_read32(priv, CSR_INT); |
1971 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1972 | |
1973 | /* Ignore interrupt if there's nothing in NIC to service. | |
1974 | * This may be due to IRQ shared with another device, | |
1975 | * or due to sporadic interrupts thrown from our NIC. */ | |
1976 | if (!inta && !inta_fh) { | |
1977 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1978 | goto none; | |
1979 | } | |
1980 | ||
1981 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1982 | /* Hardware disappeared. It might have already raised |
1983 | * an interrupt */ | |
b481de9c | 1984 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1985 | goto unplugged; |
b481de9c ZY |
1986 | } |
1987 | ||
1988 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1989 | inta, inta_mask, inta_fh); | |
1990 | ||
25c03d8e JP |
1991 | inta &= ~CSR_INT_BIT_SCD; |
1992 | ||
bb8c093b | 1993 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1994 | if (likely(inta || inta_fh)) |
1995 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1996 | |
66fbb541 ON |
1997 | unplugged: |
1998 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1999 | return IRQ_HANDLED; |
2000 | ||
2001 | none: | |
2002 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
2003 | /* only Re-enable if diabled by irq */ |
2004 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
2005 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
2006 | spin_unlock(&priv->lock); |
2007 | return IRQ_NONE; | |
2008 | } | |
2009 | ||
b481de9c ZY |
2010 | /****************************************************************************** |
2011 | * | |
2012 | * uCode download functions | |
2013 | * | |
2014 | ******************************************************************************/ | |
2015 | ||
c79dd5b5 | 2016 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 2017 | { |
98c92211 TW |
2018 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
2019 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
2020 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
2021 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
2022 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
2023 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
2024 | } |
2025 | ||
edcdf8b2 RR |
2026 | static void iwl4965_nic_start(struct iwl_priv *priv) |
2027 | { | |
2028 | /* Remove all resets to allow NIC to operate */ | |
2029 | iwl_write32(priv, CSR_RESET, 0); | |
2030 | } | |
2031 | ||
2032 | ||
b481de9c | 2033 | /** |
bb8c093b | 2034 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
2035 | * |
2036 | * Copy into buffers for card to fetch via bus-mastering | |
2037 | */ | |
c79dd5b5 | 2038 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 2039 | { |
bb8c093b | 2040 | struct iwl4965_ucode *ucode; |
90e759d1 | 2041 | int ret; |
b481de9c | 2042 | const struct firmware *ucode_raw; |
4bf775cd | 2043 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
2044 | u8 *src; |
2045 | size_t len; | |
2046 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
2047 | ||
2048 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
2049 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
2050 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
2051 | if (ret < 0) { | |
2052 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
2053 | name, ret); | |
b481de9c ZY |
2054 | goto error; |
2055 | } | |
2056 | ||
2057 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
2058 | name, ucode_raw->size); | |
2059 | ||
2060 | /* Make sure that we got at least our header! */ | |
2061 | if (ucode_raw->size < sizeof(*ucode)) { | |
2062 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 2063 | ret = -EINVAL; |
b481de9c ZY |
2064 | goto err_release; |
2065 | } | |
2066 | ||
2067 | /* Data from ucode file: header followed by uCode images */ | |
2068 | ucode = (void *)ucode_raw->data; | |
2069 | ||
2070 | ver = le32_to_cpu(ucode->ver); | |
2071 | inst_size = le32_to_cpu(ucode->inst_size); | |
2072 | data_size = le32_to_cpu(ucode->data_size); | |
2073 | init_size = le32_to_cpu(ucode->init_size); | |
2074 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
2075 | boot_size = le32_to_cpu(ucode->boot_size); | |
2076 | ||
2077 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
2078 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
2079 | inst_size); | |
2080 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
2081 | data_size); | |
2082 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
2083 | init_size); | |
2084 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
2085 | init_data_size); | |
2086 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
2087 | boot_size); | |
2088 | ||
2089 | /* Verify size of file vs. image size info in file's header */ | |
2090 | if (ucode_raw->size < sizeof(*ucode) + | |
2091 | inst_size + data_size + init_size + | |
2092 | init_data_size + boot_size) { | |
2093 | ||
2094 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
2095 | (int)ucode_raw->size); | |
90e759d1 | 2096 | ret = -EINVAL; |
b481de9c ZY |
2097 | goto err_release; |
2098 | } | |
2099 | ||
2100 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 2101 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
2102 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
2103 | inst_size); | |
2104 | ret = -EINVAL; | |
b481de9c ZY |
2105 | goto err_release; |
2106 | } | |
2107 | ||
099b40b7 | 2108 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
2109 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
2110 | data_size); | |
2111 | ret = -EINVAL; | |
b481de9c ZY |
2112 | goto err_release; |
2113 | } | |
099b40b7 | 2114 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 2115 | IWL_DEBUG_INFO |
90e759d1 TW |
2116 | ("uCode init instr len %d too large to fit in\n", |
2117 | init_size); | |
2118 | ret = -EINVAL; | |
b481de9c ZY |
2119 | goto err_release; |
2120 | } | |
099b40b7 | 2121 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 2122 | IWL_DEBUG_INFO |
90e759d1 TW |
2123 | ("uCode init data len %d too large to fit in\n", |
2124 | init_data_size); | |
2125 | ret = -EINVAL; | |
b481de9c ZY |
2126 | goto err_release; |
2127 | } | |
099b40b7 | 2128 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 2129 | IWL_DEBUG_INFO |
90e759d1 TW |
2130 | ("uCode boot instr len %d too large to fit in\n", |
2131 | boot_size); | |
2132 | ret = -EINVAL; | |
b481de9c ZY |
2133 | goto err_release; |
2134 | } | |
2135 | ||
2136 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
2137 | ||
2138 | /* Runtime instructions and 2 copies of data: | |
2139 | * 1) unmodified from disk | |
2140 | * 2) backup cache for save/restore during power-downs */ | |
2141 | priv->ucode_code.len = inst_size; | |
98c92211 | 2142 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
2143 | |
2144 | priv->ucode_data.len = data_size; | |
98c92211 | 2145 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
2146 | |
2147 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 2148 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
2149 | |
2150 | /* Initialization instructions and data */ | |
90e759d1 TW |
2151 | if (init_size && init_data_size) { |
2152 | priv->ucode_init.len = init_size; | |
98c92211 | 2153 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
2154 | |
2155 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 2156 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
2157 | |
2158 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
2159 | goto err_pci_alloc; | |
2160 | } | |
b481de9c ZY |
2161 | |
2162 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
2163 | if (boot_size) { |
2164 | priv->ucode_boot.len = boot_size; | |
98c92211 | 2165 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 2166 | |
90e759d1 TW |
2167 | if (!priv->ucode_boot.v_addr) |
2168 | goto err_pci_alloc; | |
2169 | } | |
b481de9c ZY |
2170 | |
2171 | /* Copy images into buffers for card's bus-master reads ... */ | |
2172 | ||
2173 | /* Runtime instructions (first block of data in file) */ | |
2174 | src = &ucode->data[0]; | |
2175 | len = priv->ucode_code.len; | |
90e759d1 | 2176 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
2177 | memcpy(priv->ucode_code.v_addr, src, len); |
2178 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
2179 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
2180 | ||
2181 | /* Runtime data (2nd block) | |
bb8c093b | 2182 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
2183 | src = &ucode->data[inst_size]; |
2184 | len = priv->ucode_data.len; | |
90e759d1 | 2185 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
2186 | memcpy(priv->ucode_data.v_addr, src, len); |
2187 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
2188 | ||
2189 | /* Initialization instructions (3rd block) */ | |
2190 | if (init_size) { | |
2191 | src = &ucode->data[inst_size + data_size]; | |
2192 | len = priv->ucode_init.len; | |
90e759d1 TW |
2193 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
2194 | len); | |
b481de9c ZY |
2195 | memcpy(priv->ucode_init.v_addr, src, len); |
2196 | } | |
2197 | ||
2198 | /* Initialization data (4th block) */ | |
2199 | if (init_data_size) { | |
2200 | src = &ucode->data[inst_size + data_size + init_size]; | |
2201 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
2202 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
2203 | len); | |
b481de9c ZY |
2204 | memcpy(priv->ucode_init_data.v_addr, src, len); |
2205 | } | |
2206 | ||
2207 | /* Bootstrap instructions (5th block) */ | |
2208 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
2209 | len = priv->ucode_boot.len; | |
90e759d1 | 2210 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
2211 | memcpy(priv->ucode_boot.v_addr, src, len); |
2212 | ||
2213 | /* We have our copies now, allow OS release its copies */ | |
2214 | release_firmware(ucode_raw); | |
2215 | return 0; | |
2216 | ||
2217 | err_pci_alloc: | |
2218 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 2219 | ret = -ENOMEM; |
bb8c093b | 2220 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
2221 | |
2222 | err_release: | |
2223 | release_firmware(ucode_raw); | |
2224 | ||
2225 | error: | |
90e759d1 | 2226 | return ret; |
b481de9c ZY |
2227 | } |
2228 | ||
b481de9c | 2229 | /** |
4a4a9e81 | 2230 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2231 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2232 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2233 | */ |
4a4a9e81 | 2234 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2235 | { |
57aab75a | 2236 | int ret = 0; |
b481de9c ZY |
2237 | |
2238 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2239 | ||
2240 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2241 | /* We had an error bringing up the hardware, so take it | |
2242 | * all the way back down so we can try again */ | |
2243 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2244 | goto restart; | |
2245 | } | |
2246 | ||
2247 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2248 | * This is a paranoid check, because we would not have gotten the | |
2249 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2250 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2251 | /* Runtime instruction load was bad; |
2252 | * take it all the way back down so we can try again */ | |
2253 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2254 | goto restart; | |
2255 | } | |
2256 | ||
bf85ea4f | 2257 | iwlcore_clear_stations_table(priv); |
57aab75a TW |
2258 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2259 | if (ret) { | |
b481de9c | 2260 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2261 | ret); |
b481de9c ZY |
2262 | goto restart; |
2263 | } | |
2264 | ||
9fbab516 | 2265 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
2266 | set_bit(STATUS_ALIVE, &priv->status); |
2267 | ||
fee1247a | 2268 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2269 | return; |
2270 | ||
36d6825b | 2271 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2272 | |
2273 | priv->active_rate = priv->rates_mask; | |
2274 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2275 | ||
3109ece1 | 2276 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2277 | struct iwl_rxon_cmd *active_rxon = |
2278 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2279 | |
2280 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2281 | sizeof(priv->staging_rxon)); | |
2282 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2283 | } else { | |
2284 | /* Initialize our rx_config data */ | |
bb8c093b | 2285 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2286 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2287 | } | |
2288 | ||
9fbab516 | 2289 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 2290 | iwl4965_send_bt_config(priv); |
b481de9c | 2291 | |
4a4a9e81 TW |
2292 | iwl_reset_run_time_calib(priv); |
2293 | ||
b481de9c | 2294 | /* Configure the adapter for unassociated operation */ |
bb8c093b | 2295 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2296 | |
2297 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2298 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2299 | |
fe00b5a5 RC |
2300 | iwl_leds_register(priv); |
2301 | ||
b481de9c | 2302 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2303 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2304 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2305 | |
2306 | if (priv->error_recovering) | |
bb8c093b | 2307 | iwl4965_error_recovery(priv); |
b481de9c | 2308 | |
c8381fdc | 2309 | iwlcore_low_level_notify(priv, IWLCORE_START_EVT); |
84363e6e | 2310 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
c46fbefa AK |
2311 | |
2312 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) | |
2313 | iwl4965_set_mode(priv, priv->iw_mode); | |
2314 | ||
b481de9c ZY |
2315 | return; |
2316 | ||
2317 | restart: | |
2318 | queue_work(priv->workqueue, &priv->restart); | |
2319 | } | |
2320 | ||
4e39317d | 2321 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2322 | |
c79dd5b5 | 2323 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2324 | { |
2325 | unsigned long flags; | |
2326 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2327 | |
2328 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2329 | ||
b481de9c ZY |
2330 | if (!exit_pending) |
2331 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2332 | ||
ab53d8af MA |
2333 | iwl_leds_unregister(priv); |
2334 | ||
c8381fdc MA |
2335 | iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT); |
2336 | ||
bf85ea4f | 2337 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
2338 | |
2339 | /* Unblock any waiting calls */ | |
2340 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2341 | ||
b481de9c ZY |
2342 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2343 | * exiting the module */ | |
2344 | if (!exit_pending) | |
2345 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2346 | ||
2347 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2348 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2349 | |
2350 | /* tell the device to stop sending interrupts */ | |
0359facc | 2351 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 2352 | iwl4965_disable_interrupts(priv); |
0359facc MA |
2353 | spin_unlock_irqrestore(&priv->lock, flags); |
2354 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2355 | |
2356 | if (priv->mac80211_registered) | |
2357 | ieee80211_stop_queues(priv->hw); | |
2358 | ||
bb8c093b | 2359 | /* If we have not previously called iwl4965_init() then |
b481de9c | 2360 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2361 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2362 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2363 | STATUS_RF_KILL_HW | | |
2364 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2365 | STATUS_RF_KILL_SW | | |
9788864e RC |
2366 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2367 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2368 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2369 | STATUS_IN_SUSPEND; | |
2370 | goto exit; | |
2371 | } | |
2372 | ||
2373 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2374 | * SUSPEND bits and continue taking the NIC down. */ | |
2375 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2376 | STATUS_RF_KILL_HW | | |
2377 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2378 | STATUS_RF_KILL_SW | | |
9788864e RC |
2379 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2380 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2381 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2382 | STATUS_IN_SUSPEND | | |
2383 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
2384 | STATUS_FW_ERROR; | |
2385 | ||
2386 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2387 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2388 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2389 | spin_unlock_irqrestore(&priv->lock, flags); |
2390 | ||
da1bc453 | 2391 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2392 | iwl_rxq_stop(priv); |
b481de9c ZY |
2393 | |
2394 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2395 | if (!iwl_grab_nic_access(priv)) { |
2396 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2397 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2398 | iwl_release_nic_access(priv); |
b481de9c ZY |
2399 | } |
2400 | spin_unlock_irqrestore(&priv->lock, flags); | |
2401 | ||
2402 | udelay(5); | |
2403 | ||
7f066108 TW |
2404 | /* FIXME: apm_ops.suspend(priv) */ |
2405 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2406 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2407 | |
2408 | exit: | |
885ba202 | 2409 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2410 | |
2411 | if (priv->ibss_beacon) | |
2412 | dev_kfree_skb(priv->ibss_beacon); | |
2413 | priv->ibss_beacon = NULL; | |
2414 | ||
2415 | /* clear out any free frames */ | |
fcab423d | 2416 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2417 | } |
2418 | ||
c79dd5b5 | 2419 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2420 | { |
2421 | mutex_lock(&priv->mutex); | |
bb8c093b | 2422 | __iwl4965_down(priv); |
b481de9c | 2423 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2424 | |
4e39317d | 2425 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2426 | } |
2427 | ||
2428 | #define MAX_HW_RESTARTS 5 | |
2429 | ||
c79dd5b5 | 2430 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 2431 | { |
57aab75a TW |
2432 | int i; |
2433 | int ret; | |
b481de9c ZY |
2434 | |
2435 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2436 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2437 | return -EIO; | |
2438 | } | |
2439 | ||
e903fbd4 RC |
2440 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2441 | IWL_ERROR("ucode not available for device bringup\n"); | |
2442 | return -EIO; | |
2443 | } | |
2444 | ||
e655b9f0 | 2445 | /* If platform's RF_KILL switch is NOT set to KILL */ |
3395f6e9 | 2446 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
2447 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
2448 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
2449 | else { | |
2450 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
2451 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
ad97edd2 | 2452 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
2453 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); |
2454 | return -ENODEV; | |
2455 | } | |
b481de9c ZY |
2456 | } |
2457 | ||
ad97edd2 | 2458 | iwl_rfkill_set_hw_state(priv); |
3395f6e9 | 2459 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2460 | |
399f4900 RR |
2461 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2462 | if (ret) { | |
2463 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2464 | return ret; | |
2465 | } | |
2466 | ||
1053d35f | 2467 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2468 | if (ret) { |
2469 | IWL_ERROR("Unable to init nic\n"); | |
2470 | return ret; | |
b481de9c ZY |
2471 | } |
2472 | ||
2473 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2474 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2475 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2476 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2477 | ||
2478 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2479 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 2480 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
2481 | |
2482 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2483 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2484 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2485 | |
2486 | /* Copy original ucode data image from disk into backup cache. | |
2487 | * This will be used to initialize the on-board processor's | |
2488 | * data SRAM for a clean start when the runtime program first loads. */ | |
2489 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2490 | priv->ucode_data.len); |
b481de9c | 2491 | |
e655b9f0 | 2492 | /* We return success when we resume from suspend and rf_kill is on. */ |
64e72c3e MA |
2493 | if (test_bit(STATUS_RF_KILL_HW, &priv->status) || |
2494 | test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
b481de9c | 2495 | return 0; |
b481de9c ZY |
2496 | |
2497 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
2498 | ||
bf85ea4f | 2499 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
2500 | |
2501 | /* load bootstrap state machine, | |
2502 | * load bootstrap program into processor's memory, | |
2503 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2504 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2505 | |
57aab75a TW |
2506 | if (ret) { |
2507 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2508 | continue; |
2509 | } | |
2510 | ||
f3d5b45b EG |
2511 | /* Clear out the uCode error bit if it is set */ |
2512 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2513 | ||
b481de9c | 2514 | /* start card; "initialize" will load runtime ucode */ |
edcdf8b2 | 2515 | iwl4965_nic_start(priv); |
b481de9c | 2516 | |
b481de9c ZY |
2517 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2518 | ||
2519 | return 0; | |
2520 | } | |
2521 | ||
2522 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 2523 | __iwl4965_down(priv); |
64e72c3e | 2524 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2525 | |
2526 | /* tried to restart and config the device for as long as our | |
2527 | * patience could withstand */ | |
2528 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2529 | return -EIO; | |
2530 | } | |
2531 | ||
2532 | ||
2533 | /***************************************************************************** | |
2534 | * | |
2535 | * Workqueue callbacks | |
2536 | * | |
2537 | *****************************************************************************/ | |
2538 | ||
4a4a9e81 | 2539 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2540 | { |
c79dd5b5 TW |
2541 | struct iwl_priv *priv = |
2542 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2543 | |
2544 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2545 | return; | |
2546 | ||
2547 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2548 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2549 | mutex_unlock(&priv->mutex); |
2550 | } | |
2551 | ||
4a4a9e81 | 2552 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2553 | { |
c79dd5b5 TW |
2554 | struct iwl_priv *priv = |
2555 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2556 | |
2557 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2558 | return; | |
2559 | ||
2560 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2561 | iwl_alive_start(priv); |
b481de9c ZY |
2562 | mutex_unlock(&priv->mutex); |
2563 | } | |
2564 | ||
bb8c093b | 2565 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 2566 | { |
c79dd5b5 | 2567 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2568 | |
2569 | wake_up_interruptible(&priv->wait_command_queue); | |
2570 | ||
2571 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2572 | return; | |
2573 | ||
2574 | mutex_lock(&priv->mutex); | |
2575 | ||
fee1247a | 2576 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2577 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2578 | "HW and/or SW RF Kill no longer active, restarting " |
2579 | "device\n"); | |
2580 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2581 | queue_work(priv->workqueue, &priv->restart); | |
2582 | } else { | |
ad97edd2 MA |
2583 | /* make sure mac80211 stop sending Tx frame */ |
2584 | if (priv->mac80211_registered) | |
2585 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2586 | |
2587 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2588 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2589 | "disabled by SW switch\n"); | |
2590 | else | |
2591 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2592 | "Kill switch must be turned off for " | |
2593 | "wireless networking to work.\n"); | |
2594 | } | |
ad97edd2 MA |
2595 | iwl_rfkill_set_hw_state(priv); |
2596 | ||
b481de9c ZY |
2597 | mutex_unlock(&priv->mutex); |
2598 | } | |
2599 | ||
4419e39b AK |
2600 | static void iwl4965_bg_set_monitor(struct work_struct *work) |
2601 | { | |
2602 | struct iwl_priv *priv = container_of(work, | |
2603 | struct iwl_priv, set_monitor); | |
c46fbefa | 2604 | int ret; |
4419e39b AK |
2605 | |
2606 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2607 | ||
2608 | mutex_lock(&priv->mutex); | |
2609 | ||
c46fbefa AK |
2610 | ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR); |
2611 | ||
2612 | if (ret) { | |
2613 | if (ret == -EAGAIN) | |
2614 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2615 | else | |
2616 | IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret); | |
2617 | } | |
4419e39b AK |
2618 | |
2619 | mutex_unlock(&priv->mutex); | |
2620 | } | |
2621 | ||
16e727e8 EG |
2622 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2623 | { | |
2624 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2625 | run_time_calib_work); | |
2626 | ||
2627 | mutex_lock(&priv->mutex); | |
2628 | ||
2629 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2630 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2631 | mutex_unlock(&priv->mutex); | |
2632 | return; | |
2633 | } | |
2634 | ||
2635 | if (priv->start_calib) { | |
2636 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2637 | ||
2638 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2639 | } | |
2640 | ||
2641 | mutex_unlock(&priv->mutex); | |
2642 | return; | |
2643 | } | |
2644 | ||
bb8c093b | 2645 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 2646 | { |
c79dd5b5 | 2647 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2648 | |
2649 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2650 | return; | |
2651 | ||
2652 | mutex_lock(&priv->mutex); | |
bb8c093b | 2653 | __iwl4965_up(priv); |
b481de9c ZY |
2654 | mutex_unlock(&priv->mutex); |
2655 | } | |
2656 | ||
bb8c093b | 2657 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 2658 | { |
c79dd5b5 | 2659 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2660 | |
2661 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2662 | return; | |
2663 | ||
bb8c093b | 2664 | iwl4965_down(priv); |
b481de9c ZY |
2665 | queue_work(priv->workqueue, &priv->up); |
2666 | } | |
2667 | ||
bb8c093b | 2668 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2669 | { |
c79dd5b5 TW |
2670 | struct iwl_priv *priv = |
2671 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2672 | |
2673 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2674 | return; | |
2675 | ||
2676 | mutex_lock(&priv->mutex); | |
a55360e4 | 2677 | iwl_rx_replenish(priv); |
b481de9c ZY |
2678 | mutex_unlock(&priv->mutex); |
2679 | } | |
2680 | ||
7878a5a4 MA |
2681 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2682 | ||
508e32e1 | 2683 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 2684 | { |
b481de9c | 2685 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2686 | int ret = 0; |
0795af57 | 2687 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
2688 | |
2689 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
2690 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
2691 | return; | |
2692 | } | |
2693 | ||
0795af57 JP |
2694 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
2695 | priv->assoc_id, | |
2696 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
2697 | |
2698 | ||
2699 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2700 | return; | |
2701 | ||
b481de9c | 2702 | |
508e32e1 | 2703 | if (!priv->vif || !priv->is_open) |
948c171c | 2704 | return; |
508e32e1 | 2705 | |
2a421b91 | 2706 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2707 | |
b481de9c ZY |
2708 | conf = ieee80211_get_hw_conf(priv->hw); |
2709 | ||
2710 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2711 | iwl4965_commit_rxon(priv); |
b481de9c | 2712 | |
bb8c093b CH |
2713 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2714 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2715 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2716 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2717 | if (ret) |
b481de9c ZY |
2718 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2719 | "Attempting to continue.\n"); | |
2720 | ||
2721 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2722 | ||
fd105e79 | 2723 | if (priv->current_ht_config.is_ht) |
47c5196e | 2724 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2725 | |
c7de35cd | 2726 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2727 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2728 | ||
2729 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2730 | priv->assoc_id, priv->beacon_int); | |
2731 | ||
2732 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2733 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2734 | else | |
2735 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2736 | ||
2737 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2738 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2739 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2740 | else | |
2741 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2742 | ||
2743 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2744 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2745 | ||
2746 | } | |
2747 | ||
bb8c093b | 2748 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2749 | |
2750 | switch (priv->iw_mode) { | |
2751 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 2752 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
2753 | break; |
2754 | ||
2755 | case IEEE80211_IF_TYPE_IBSS: | |
2756 | ||
c46fbefa AK |
2757 | /* assume default assoc id */ |
2758 | priv->assoc_id = 1; | |
b481de9c | 2759 | |
4f40e4d9 | 2760 | iwl_rxon_add_station(priv, priv->bssid, 0); |
bb8c093b CH |
2761 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); |
2762 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
2763 | |
2764 | break; | |
2765 | ||
2766 | default: | |
2767 | IWL_ERROR("%s Should not be called in %d mode\n", | |
2768 | __FUNCTION__, priv->iw_mode); | |
2769 | break; | |
2770 | } | |
2771 | ||
bb8c093b | 2772 | iwl4965_sequence_reset(priv); |
b481de9c | 2773 | |
b481de9c | 2774 | /* Enable Rx differential gain and sensitivity calibrations */ |
f0832f13 | 2775 | iwl_chain_noise_reset(priv); |
b481de9c | 2776 | priv->start_calib = 1; |
b481de9c ZY |
2777 | |
2778 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2779 | priv->assoc_station_added = 1; | |
2780 | ||
bb8c093b | 2781 | iwl4965_activate_qos(priv, 0); |
292ae174 | 2782 | |
5da4b55f | 2783 | iwl_power_update_mode(priv, 0); |
7878a5a4 MA |
2784 | /* we have just associated, don't start scan too early */ |
2785 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
2786 | } |
2787 | ||
2788 | ||
2789 | static void iwl4965_bg_post_associate(struct work_struct *data) | |
2790 | { | |
2791 | struct iwl_priv *priv = container_of(data, struct iwl_priv, | |
2792 | post_associate.work); | |
2793 | ||
2794 | mutex_lock(&priv->mutex); | |
2795 | iwl4965_post_associate(priv); | |
b481de9c | 2796 | mutex_unlock(&priv->mutex); |
508e32e1 | 2797 | |
b481de9c ZY |
2798 | } |
2799 | ||
76bb77e0 ZY |
2800 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
2801 | ||
2a421b91 | 2802 | static void iwl_bg_scan_completed(struct work_struct *work) |
b481de9c | 2803 | { |
c79dd5b5 TW |
2804 | struct iwl_priv *priv = |
2805 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c | 2806 | |
630fe9b6 | 2807 | IWL_DEBUG_SCAN("SCAN complete scan\n"); |
b481de9c ZY |
2808 | |
2809 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2810 | return; | |
2811 | ||
a0646470 ZY |
2812 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
2813 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 2814 | |
b481de9c ZY |
2815 | ieee80211_scan_completed(priv->hw); |
2816 | ||
2817 | /* Since setting the TXPOWER may have been deferred while | |
2818 | * performing the scan, fire one off */ | |
2819 | mutex_lock(&priv->mutex); | |
630fe9b6 | 2820 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
b481de9c ZY |
2821 | mutex_unlock(&priv->mutex); |
2822 | } | |
2823 | ||
2824 | /***************************************************************************** | |
2825 | * | |
2826 | * mac80211 entry point functions | |
2827 | * | |
2828 | *****************************************************************************/ | |
2829 | ||
5a66926a ZY |
2830 | #define UCODE_READY_TIMEOUT (2 * HZ) |
2831 | ||
bb8c093b | 2832 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2833 | { |
c79dd5b5 | 2834 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2835 | int ret; |
b481de9c ZY |
2836 | |
2837 | IWL_DEBUG_MAC80211("enter\n"); | |
2838 | ||
5a66926a ZY |
2839 | if (pci_enable_device(priv->pci_dev)) { |
2840 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2841 | return -ENODEV; | |
2842 | } | |
2843 | pci_restore_state(priv->pci_dev); | |
2844 | pci_enable_msi(priv->pci_dev); | |
2845 | ||
2846 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
2847 | DRV_NAME, priv); | |
2848 | if (ret) { | |
2849 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2850 | goto out_disable_msi; | |
2851 | } | |
2852 | ||
b481de9c ZY |
2853 | /* we should be verifying the device is ready to be opened */ |
2854 | mutex_lock(&priv->mutex); | |
2855 | ||
c1adf9fb | 2856 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2857 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2858 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2859 | |
5a66926a ZY |
2860 | if (!priv->ucode_code.len) { |
2861 | ret = iwl4965_read_ucode(priv); | |
2862 | if (ret) { | |
2863 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2864 | mutex_unlock(&priv->mutex); | |
2865 | goto out_release_irq; | |
2866 | } | |
2867 | } | |
b481de9c | 2868 | |
e655b9f0 | 2869 | ret = __iwl4965_up(priv); |
5a66926a | 2870 | |
b481de9c | 2871 | mutex_unlock(&priv->mutex); |
5a66926a | 2872 | |
e655b9f0 ZY |
2873 | if (ret) |
2874 | goto out_release_irq; | |
2875 | ||
2876 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
2877 | ||
2878 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2879 | return 0; | |
2880 | ||
fe9b6b72 | 2881 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2882 | * mac80211 will not be run successfully. */ |
fe9b6b72 RR |
2883 | if (priv->ucode_type == UCODE_RT) { |
2884 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
2885 | test_bit(STATUS_READY, &priv->status), | |
2886 | UCODE_READY_TIMEOUT); | |
2887 | if (!ret) { | |
2888 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2889 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2890 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2891 | ret = -ETIMEDOUT; | |
2892 | goto out_release_irq; | |
2893 | } | |
5a66926a | 2894 | } |
5a66926a | 2895 | |
fe9b6b72 RR |
2896 | priv->is_open = 1; |
2897 | } | |
b481de9c ZY |
2898 | IWL_DEBUG_MAC80211("leave\n"); |
2899 | return 0; | |
5a66926a ZY |
2900 | |
2901 | out_release_irq: | |
2902 | free_irq(priv->pci_dev->irq, priv); | |
2903 | out_disable_msi: | |
2904 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2905 | pci_disable_device(priv->pci_dev); |
2906 | priv->is_open = 0; | |
2907 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2908 | return ret; |
b481de9c ZY |
2909 | } |
2910 | ||
bb8c093b | 2911 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2912 | { |
c79dd5b5 | 2913 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2914 | |
2915 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2916 | |
e655b9f0 ZY |
2917 | if (!priv->is_open) { |
2918 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2919 | return; | |
2920 | } | |
2921 | ||
b481de9c | 2922 | priv->is_open = 0; |
5a66926a | 2923 | |
fee1247a | 2924 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2925 | /* stop mac, cancel any scan request and clear |
2926 | * RXON_FILTER_ASSOC_MSK BIT | |
2927 | */ | |
5a66926a | 2928 | mutex_lock(&priv->mutex); |
2a421b91 | 2929 | iwl_scan_cancel_timeout(priv, 100); |
5a66926a | 2930 | cancel_delayed_work(&priv->post_associate); |
fde3571f | 2931 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2932 | } |
2933 | ||
5a66926a ZY |
2934 | iwl4965_down(priv); |
2935 | ||
2936 | flush_workqueue(priv->workqueue); | |
2937 | free_irq(priv->pci_dev->irq, priv); | |
2938 | pci_disable_msi(priv->pci_dev); | |
2939 | pci_save_state(priv->pci_dev); | |
2940 | pci_disable_device(priv->pci_dev); | |
948c171c | 2941 | |
b481de9c | 2942 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2943 | } |
2944 | ||
e039fa4a | 2945 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2946 | { |
c79dd5b5 | 2947 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2948 | |
2949 | IWL_DEBUG_MAC80211("enter\n"); | |
2950 | ||
2951 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
2952 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
2953 | return -1; | |
2954 | } | |
2955 | ||
2956 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
e039fa4a | 2957 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2958 | |
e039fa4a | 2959 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2960 | dev_kfree_skb_any(skb); |
2961 | ||
2962 | IWL_DEBUG_MAC80211("leave\n"); | |
2963 | return 0; | |
2964 | } | |
2965 | ||
bb8c093b | 2966 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2967 | struct ieee80211_if_init_conf *conf) |
2968 | { | |
c79dd5b5 | 2969 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2970 | unsigned long flags; |
0795af57 | 2971 | DECLARE_MAC_BUF(mac); |
b481de9c | 2972 | |
32bfd35d | 2973 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2974 | |
32bfd35d JB |
2975 | if (priv->vif) { |
2976 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2977 | return -EOPNOTSUPP; |
b481de9c ZY |
2978 | } |
2979 | ||
2980 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2981 | priv->vif = conf->vif; |
b481de9c ZY |
2982 | |
2983 | spin_unlock_irqrestore(&priv->lock, flags); | |
2984 | ||
2985 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2986 | |
2987 | if (conf->mac_addr) { | |
2988 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
2989 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
2990 | } | |
b481de9c | 2991 | |
c46fbefa AK |
2992 | if (iwl4965_set_mode(priv, conf->type) == -EAGAIN) |
2993 | /* we are not ready, will run again when ready */ | |
2994 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2995 | |
b481de9c ZY |
2996 | mutex_unlock(&priv->mutex); |
2997 | ||
5a66926a | 2998 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2999 | return 0; |
3000 | } | |
3001 | ||
3002 | /** | |
bb8c093b | 3003 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
3004 | * |
3005 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
3006 | * be set inappropriately and the driver currently sets the hardware up to | |
3007 | * use it whenever needed. | |
3008 | */ | |
bb8c093b | 3009 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 3010 | { |
c79dd5b5 | 3011 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 3012 | const struct iwl_channel_info *ch_info; |
b481de9c | 3013 | unsigned long flags; |
76bb77e0 | 3014 | int ret = 0; |
82a66bbb | 3015 | u16 channel; |
b481de9c ZY |
3016 | |
3017 | mutex_lock(&priv->mutex); | |
8318d78a | 3018 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 3019 | |
12342c47 ZY |
3020 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
3021 | ||
64e72c3e MA |
3022 | |
3023 | if (priv->cfg->ops->lib->radio_kill_sw && | |
3024 | priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled)) { | |
3025 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); | |
3026 | mutex_unlock(&priv->mutex); | |
3027 | } | |
3028 | ||
fee1247a | 3029 | if (!iwl_is_ready(priv)) { |
b481de9c | 3030 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
3031 | ret = -EIO; |
3032 | goto out; | |
b481de9c ZY |
3033 | } |
3034 | ||
1ea87396 | 3035 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 3036 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
3037 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
3038 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 3039 | mutex_unlock(&priv->mutex); |
a0646470 | 3040 | return 0; |
b481de9c ZY |
3041 | } |
3042 | ||
82a66bbb TW |
3043 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
3044 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 3045 | if (!is_channel_valid(ch_info)) { |
b481de9c | 3046 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
3047 | ret = -EINVAL; |
3048 | goto out; | |
b481de9c ZY |
3049 | } |
3050 | ||
398f9e76 AK |
3051 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS && |
3052 | !is_channel_ibss(ch_info)) { | |
3053 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
3054 | conf->channel->hw_value, conf->channel->band); | |
3055 | ret = -EINVAL; | |
3056 | goto out; | |
3057 | } | |
3058 | ||
82a66bbb TW |
3059 | spin_lock_irqsave(&priv->lock, flags); |
3060 | ||
78330fdd | 3061 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
3062 | * from any ht related info since 2.4 does not |
3063 | * support ht */ | |
82a66bbb | 3064 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
3065 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
3066 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
3067 | #endif | |
3068 | ) | |
3069 | priv->staging_rxon.flags = 0; | |
b481de9c | 3070 | |
82a66bbb | 3071 | iwl_set_rxon_channel(priv, conf->channel->band, channel); |
b481de9c | 3072 | |
82a66bbb | 3073 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
3074 | |
3075 | /* The list of supported rates and rate mask can be different | |
8318d78a | 3076 | * for each band; since the band may have changed, reset |
b481de9c | 3077 | * the rate mask to what mac80211 lists */ |
bb8c093b | 3078 | iwl4965_set_rate(priv); |
b481de9c ZY |
3079 | |
3080 | spin_unlock_irqrestore(&priv->lock, flags); | |
3081 | ||
3082 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
3083 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 3084 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 3085 | goto out; |
b481de9c ZY |
3086 | } |
3087 | #endif | |
3088 | ||
b481de9c ZY |
3089 | if (!conf->radio_enabled) { |
3090 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 3091 | goto out; |
b481de9c ZY |
3092 | } |
3093 | ||
fee1247a | 3094 | if (iwl_is_rfkill(priv)) { |
b481de9c | 3095 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
3096 | ret = -EIO; |
3097 | goto out; | |
b481de9c ZY |
3098 | } |
3099 | ||
630fe9b6 TW |
3100 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
3101 | priv->tx_power_user_lmt, conf->power_level); | |
3102 | ||
3103 | iwl_set_tx_power(priv, conf->power_level, false); | |
3104 | ||
bb8c093b | 3105 | iwl4965_set_rate(priv); |
b481de9c ZY |
3106 | |
3107 | if (memcmp(&priv->active_rxon, | |
3108 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 3109 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3110 | else |
3111 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
3112 | ||
3113 | IWL_DEBUG_MAC80211("leave\n"); | |
3114 | ||
a0646470 ZY |
3115 | out: |
3116 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 3117 | mutex_unlock(&priv->mutex); |
76bb77e0 | 3118 | return ret; |
b481de9c ZY |
3119 | } |
3120 | ||
c79dd5b5 | 3121 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 3122 | { |
857485c0 | 3123 | int ret = 0; |
b481de9c | 3124 | |
d986bcd1 | 3125 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
3126 | return; |
3127 | ||
3128 | /* The following should be done only at AP bring up */ | |
3129 | if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) { | |
3130 | ||
3131 | /* RXON - unassoc (to set timing command) */ | |
3132 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 3133 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3134 | |
3135 | /* RXON Timing */ | |
bb8c093b CH |
3136 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
3137 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 3138 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 3139 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 3140 | if (ret) |
b481de9c ZY |
3141 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
3142 | "Attempting to continue.\n"); | |
3143 | ||
c7de35cd | 3144 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
3145 | |
3146 | /* FIXME: what should be the assoc_id for AP? */ | |
3147 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
3148 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
3149 | priv->staging_rxon.flags |= | |
3150 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
3151 | else | |
3152 | priv->staging_rxon.flags &= | |
3153 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3154 | ||
3155 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
3156 | if (priv->assoc_capability & | |
3157 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
3158 | priv->staging_rxon.flags |= | |
3159 | RXON_FLG_SHORT_SLOT_MSK; | |
3160 | else | |
3161 | priv->staging_rxon.flags &= | |
3162 | ~RXON_FLG_SHORT_SLOT_MSK; | |
3163 | ||
3164 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
3165 | priv->staging_rxon.flags &= | |
3166 | ~RXON_FLG_SHORT_SLOT_MSK; | |
3167 | } | |
3168 | /* restore RXON assoc */ | |
3169 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 3170 | iwl4965_commit_rxon(priv); |
bb8c093b | 3171 | iwl4965_activate_qos(priv, 1); |
4f40e4d9 | 3172 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 3173 | } |
bb8c093b | 3174 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
3175 | |
3176 | /* FIXME - we need to add code here to detect a totally new | |
3177 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
3178 | * clear sta table, add BCAST sta... */ | |
3179 | } | |
3180 | ||
32bfd35d JB |
3181 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
3182 | struct ieee80211_vif *vif, | |
b481de9c ZY |
3183 | struct ieee80211_if_conf *conf) |
3184 | { | |
c79dd5b5 | 3185 | struct iwl_priv *priv = hw->priv; |
0795af57 | 3186 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
3187 | unsigned long flags; |
3188 | int rc; | |
3189 | ||
3190 | if (conf == NULL) | |
3191 | return -EIO; | |
3192 | ||
b716bb91 EG |
3193 | if (priv->vif != vif) { |
3194 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
3195 | return 0; |
3196 | } | |
3197 | ||
b481de9c ZY |
3198 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
3199 | (!conf->beacon || !conf->ssid_len)) { | |
3200 | IWL_DEBUG_MAC80211 | |
3201 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
3202 | return 0; | |
3203 | } | |
3204 | ||
fee1247a | 3205 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
3206 | return -EAGAIN; |
3207 | ||
b481de9c ZY |
3208 | mutex_lock(&priv->mutex); |
3209 | ||
b481de9c | 3210 | if (conf->bssid) |
0795af57 JP |
3211 | IWL_DEBUG_MAC80211("bssid: %s\n", |
3212 | print_mac(mac, conf->bssid)); | |
b481de9c | 3213 | |
4150c572 JB |
3214 | /* |
3215 | * very dubious code was here; the probe filtering flag is never set: | |
3216 | * | |
b481de9c ZY |
3217 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
3218 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 3219 | */ |
b481de9c ZY |
3220 | |
3221 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
3222 | if (!conf->bssid) { | |
3223 | conf->bssid = priv->mac_addr; | |
3224 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
3225 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
3226 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
3227 | } |
3228 | if (priv->ibss_beacon) | |
3229 | dev_kfree_skb(priv->ibss_beacon); | |
3230 | ||
3231 | priv->ibss_beacon = conf->beacon; | |
3232 | } | |
3233 | ||
fee1247a | 3234 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3235 | goto done; |
3236 | ||
b481de9c ZY |
3237 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3238 | !is_multicast_ether_addr(conf->bssid)) { | |
3239 | /* If there is currently a HW scan going on in the background | |
3240 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3241 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3242 | IWL_WARNING("Aborted scan still in progress " |
3243 | "after 100ms\n"); | |
3244 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3245 | mutex_unlock(&priv->mutex); | |
3246 | return -EAGAIN; | |
3247 | } | |
3248 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3249 | ||
3250 | /* TODO: Audit driver for usage of these members and see | |
3251 | * if mac80211 deprecates them (priv->bssid looks like it | |
3252 | * shouldn't be there, but I haven't scanned the IBSS code | |
3253 | * to verify) - jpk */ | |
3254 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3255 | ||
3256 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 3257 | iwl4965_config_ap(priv); |
b481de9c | 3258 | else { |
bb8c093b | 3259 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 3260 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
4f40e4d9 | 3261 | iwl_rxon_add_station( |
b481de9c ZY |
3262 | priv, priv->active_rxon.bssid_addr, 1); |
3263 | } | |
3264 | ||
3265 | } else { | |
2a421b91 | 3266 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3267 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3268 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3269 | } |
3270 | ||
fde3571f | 3271 | done: |
b481de9c ZY |
3272 | spin_lock_irqsave(&priv->lock, flags); |
3273 | if (!conf->ssid_len) | |
3274 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3275 | else | |
3276 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
3277 | ||
3278 | priv->essid_len = conf->ssid_len; | |
3279 | spin_unlock_irqrestore(&priv->lock, flags); | |
3280 | ||
3281 | IWL_DEBUG_MAC80211("leave\n"); | |
3282 | mutex_unlock(&priv->mutex); | |
3283 | ||
3284 | return 0; | |
3285 | } | |
3286 | ||
bb8c093b | 3287 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3288 | unsigned int changed_flags, |
3289 | unsigned int *total_flags, | |
3290 | int mc_count, struct dev_addr_list *mc_list) | |
3291 | { | |
3292 | /* | |
3293 | * XXX: dummy | |
bb8c093b | 3294 | * see also iwl4965_connection_init_rx_config |
4150c572 | 3295 | */ |
4419e39b AK |
3296 | struct iwl_priv *priv = hw->priv; |
3297 | int new_flags = 0; | |
3298 | if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { | |
3299 | if (*total_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { | |
3300 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
3301 | IEEE80211_IF_TYPE_MNTR, | |
3302 | changed_flags, *total_flags); | |
3303 | /* queue work 'cuz mac80211 is holding a lock which | |
3304 | * prevents us from issuing (synchronous) f/w cmds */ | |
3305 | queue_work(priv->workqueue, &priv->set_monitor); | |
3306 | new_flags &= FIF_PROMISC_IN_BSS | | |
3307 | FIF_OTHER_BSS | | |
3308 | FIF_ALLMULTI; | |
3309 | } | |
3310 | } | |
3311 | *total_flags = new_flags; | |
4150c572 JB |
3312 | } |
3313 | ||
bb8c093b | 3314 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3315 | struct ieee80211_if_init_conf *conf) |
3316 | { | |
c79dd5b5 | 3317 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3318 | |
3319 | IWL_DEBUG_MAC80211("enter\n"); | |
3320 | ||
3321 | mutex_lock(&priv->mutex); | |
948c171c | 3322 | |
fee1247a | 3323 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3324 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f MA |
3325 | cancel_delayed_work(&priv->post_associate); |
3326 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
3327 | iwl4965_commit_rxon(priv); | |
3328 | } | |
32bfd35d JB |
3329 | if (priv->vif == conf->vif) { |
3330 | priv->vif = NULL; | |
b481de9c ZY |
3331 | memset(priv->bssid, 0, ETH_ALEN); |
3332 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3333 | priv->essid_len = 0; | |
3334 | } | |
3335 | mutex_unlock(&priv->mutex); | |
3336 | ||
3337 | IWL_DEBUG_MAC80211("leave\n"); | |
3338 | ||
3339 | } | |
471b3efd | 3340 | |
3109ece1 | 3341 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
3342 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
3343 | struct ieee80211_vif *vif, | |
3344 | struct ieee80211_bss_conf *bss_conf, | |
3345 | u32 changes) | |
220173b0 | 3346 | { |
c79dd5b5 | 3347 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3348 | |
3109ece1 TW |
3349 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3350 | ||
471b3efd | 3351 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3352 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3353 | bss_conf->use_short_preamble); | |
471b3efd | 3354 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3355 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3356 | else | |
3357 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3358 | } | |
3359 | ||
471b3efd | 3360 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3361 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3362 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3363 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3364 | else | |
3365 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3366 | } | |
3367 | ||
98952d5d | 3368 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 3369 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 3370 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 3371 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3372 | } |
3373 | ||
471b3efd | 3374 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3375 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3376 | /* This should never happen as this function should |
3377 | * never be called from interrupt context. */ | |
3378 | if (WARN_ON_ONCE(in_interrupt())) | |
3379 | return; | |
3109ece1 TW |
3380 | if (bss_conf->assoc) { |
3381 | priv->assoc_id = bss_conf->aid; | |
3382 | priv->beacon_int = bss_conf->beacon_int; | |
3383 | priv->timestamp = bss_conf->timestamp; | |
3384 | priv->assoc_capability = bss_conf->assoc_capability; | |
3385 | priv->next_scan_jiffies = jiffies + | |
3386 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
3387 | mutex_lock(&priv->mutex); |
3388 | iwl4965_post_associate(priv); | |
3389 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
3390 | } else { |
3391 | priv->assoc_id = 0; | |
3392 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3393 | } | |
3394 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3395 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3396 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3397 | } |
3398 | ||
220173b0 | 3399 | } |
b481de9c | 3400 | |
bb8c093b | 3401 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
3402 | { |
3403 | int rc = 0; | |
3404 | unsigned long flags; | |
c79dd5b5 | 3405 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3406 | |
3407 | IWL_DEBUG_MAC80211("enter\n"); | |
3408 | ||
052c4b9f | 3409 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3410 | spin_lock_irqsave(&priv->lock, flags); |
3411 | ||
fee1247a | 3412 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3413 | rc = -EIO; |
3414 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
3415 | goto out_unlock; | |
3416 | } | |
3417 | ||
3418 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
3419 | rc = -EIO; | |
3420 | IWL_ERROR("ERROR: APs don't scan\n"); | |
3421 | goto out_unlock; | |
3422 | } | |
3423 | ||
7878a5a4 MA |
3424 | /* we don't schedule scan within next_scan_jiffies period */ |
3425 | if (priv->next_scan_jiffies && | |
3426 | time_after(priv->next_scan_jiffies, jiffies)) { | |
3427 | rc = -EAGAIN; | |
3428 | goto out_unlock; | |
3429 | } | |
b481de9c | 3430 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
3431 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
3432 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
3433 | rc = -EAGAIN; |
3434 | goto out_unlock; | |
3435 | } | |
3436 | if (len) { | |
7878a5a4 | 3437 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
2a421b91 | 3438 | iwl_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
3439 | |
3440 | priv->one_direct_scan = 1; | |
3441 | priv->direct_ssid_len = (u8) | |
3442 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
3443 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
3444 | } else |
3445 | priv->one_direct_scan = 0; | |
b481de9c | 3446 | |
2a421b91 | 3447 | rc = iwl_scan_initiate(priv); |
b481de9c ZY |
3448 | |
3449 | IWL_DEBUG_MAC80211("leave\n"); | |
3450 | ||
3451 | out_unlock: | |
3452 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3453 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
3454 | |
3455 | return rc; | |
3456 | } | |
3457 | ||
ab885f8c EG |
3458 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
3459 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
3460 | u32 iv32, u16 *phase1key) | |
3461 | { | |
3462 | struct iwl_priv *priv = hw->priv; | |
3463 | u8 sta_id = IWL_INVALID_STATION; | |
3464 | unsigned long flags; | |
3465 | __le16 key_flags = 0; | |
3466 | int i; | |
3467 | DECLARE_MAC_BUF(mac); | |
3468 | ||
3469 | IWL_DEBUG_MAC80211("enter\n"); | |
3470 | ||
947b13a7 | 3471 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
3472 | if (sta_id == IWL_INVALID_STATION) { |
3473 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3474 | print_mac(mac, addr)); | |
3475 | return; | |
3476 | } | |
3477 | ||
2a421b91 | 3478 | iwl_scan_cancel_timeout(priv, 100); |
ab885f8c EG |
3479 | |
3480 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3481 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3482 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3483 | ||
5425e490 | 3484 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3485 | key_flags |= STA_KEY_MULTICAST_MSK; |
3486 | ||
3487 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3488 | ||
ab885f8c EG |
3489 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3490 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3491 | ||
3492 | for (i = 0; i < 5; i++) | |
3493 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3494 | cpu_to_le16(phase1key[i]); | |
3495 | ||
3496 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3497 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3498 | ||
133636de | 3499 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3500 | |
3501 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3502 | ||
3503 | IWL_DEBUG_MAC80211("leave\n"); | |
3504 | } | |
3505 | ||
bb8c093b | 3506 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3507 | const u8 *local_addr, const u8 *addr, |
3508 | struct ieee80211_key_conf *key) | |
3509 | { | |
c79dd5b5 | 3510 | struct iwl_priv *priv = hw->priv; |
0795af57 | 3511 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
3512 | int ret = 0; |
3513 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3514 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3515 | |
3516 | IWL_DEBUG_MAC80211("enter\n"); | |
3517 | ||
099b40b7 | 3518 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3519 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3520 | return -EOPNOTSUPP; | |
3521 | } | |
3522 | ||
3523 | if (is_zero_ether_addr(addr)) | |
3524 | /* only support pairwise keys */ | |
3525 | return -EOPNOTSUPP; | |
3526 | ||
947b13a7 | 3527 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
3528 | if (sta_id == IWL_INVALID_STATION) { |
3529 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3530 | print_mac(mac, addr)); | |
3531 | return -EINVAL; | |
b481de9c | 3532 | |
deb09c43 | 3533 | } |
b481de9c | 3534 | |
6974e363 | 3535 | mutex_lock(&priv->mutex); |
2a421b91 | 3536 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3537 | mutex_unlock(&priv->mutex); |
3538 | ||
3539 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3540 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3541 | * in 1X mode. | |
3542 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3543 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
3544 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
3545 | if (cmd == SET_KEY) | |
3546 | is_default_wep_key = !priv->key_mapping_key; | |
3547 | else | |
ccc038ab EG |
3548 | is_default_wep_key = |
3549 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3550 | } |
052c4b9f | 3551 | |
b481de9c | 3552 | switch (cmd) { |
deb09c43 | 3553 | case SET_KEY: |
6974e363 EG |
3554 | if (is_default_wep_key) |
3555 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3556 | else |
7480513f | 3557 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3558 | |
3559 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3560 | break; |
3561 | case DISABLE_KEY: | |
6974e363 EG |
3562 | if (is_default_wep_key) |
3563 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3564 | else |
3ec47732 | 3565 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3566 | |
3567 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3568 | break; |
3569 | default: | |
deb09c43 | 3570 | ret = -EINVAL; |
b481de9c ZY |
3571 | } |
3572 | ||
3573 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3574 | |
deb09c43 | 3575 | return ret; |
b481de9c ZY |
3576 | } |
3577 | ||
e100bb64 | 3578 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3579 | const struct ieee80211_tx_queue_params *params) |
3580 | { | |
c79dd5b5 | 3581 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3582 | unsigned long flags; |
3583 | int q; | |
b481de9c ZY |
3584 | |
3585 | IWL_DEBUG_MAC80211("enter\n"); | |
3586 | ||
fee1247a | 3587 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3588 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3589 | return -EIO; | |
3590 | } | |
3591 | ||
3592 | if (queue >= AC_NUM) { | |
3593 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3594 | return 0; | |
3595 | } | |
3596 | ||
b481de9c ZY |
3597 | if (!priv->qos_data.qos_enable) { |
3598 | priv->qos_data.qos_active = 0; | |
3599 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3600 | return 0; | |
3601 | } | |
3602 | q = AC_NUM - 1 - queue; | |
3603 | ||
3604 | spin_lock_irqsave(&priv->lock, flags); | |
3605 | ||
3606 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3607 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3608 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3609 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3610 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3611 | |
3612 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3613 | priv->qos_data.qos_active = 1; | |
3614 | ||
3615 | spin_unlock_irqrestore(&priv->lock, flags); | |
3616 | ||
3617 | mutex_lock(&priv->mutex); | |
3618 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 3619 | iwl4965_activate_qos(priv, 1); |
3109ece1 | 3620 | else if (priv->assoc_id && iwl_is_associated(priv)) |
bb8c093b | 3621 | iwl4965_activate_qos(priv, 0); |
b481de9c ZY |
3622 | |
3623 | mutex_unlock(&priv->mutex); | |
3624 | ||
b481de9c ZY |
3625 | IWL_DEBUG_MAC80211("leave\n"); |
3626 | return 0; | |
3627 | } | |
3628 | ||
bb8c093b | 3629 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3630 | struct ieee80211_tx_queue_stats *stats) |
3631 | { | |
c79dd5b5 | 3632 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3633 | int i, avail; |
16466903 | 3634 | struct iwl_tx_queue *txq; |
443cfd45 | 3635 | struct iwl_queue *q; |
b481de9c ZY |
3636 | unsigned long flags; |
3637 | ||
3638 | IWL_DEBUG_MAC80211("enter\n"); | |
3639 | ||
fee1247a | 3640 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3641 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3642 | return -EIO; | |
3643 | } | |
3644 | ||
3645 | spin_lock_irqsave(&priv->lock, flags); | |
3646 | ||
3647 | for (i = 0; i < AC_NUM; i++) { | |
3648 | txq = &priv->txq[i]; | |
3649 | q = &txq->q; | |
443cfd45 | 3650 | avail = iwl_queue_space(q); |
b481de9c | 3651 | |
57ffc589 JB |
3652 | stats[i].len = q->n_window - avail; |
3653 | stats[i].limit = q->n_window - q->high_mark; | |
3654 | stats[i].count = q->n_window; | |
b481de9c ZY |
3655 | |
3656 | } | |
3657 | spin_unlock_irqrestore(&priv->lock, flags); | |
3658 | ||
3659 | IWL_DEBUG_MAC80211("leave\n"); | |
3660 | ||
3661 | return 0; | |
3662 | } | |
3663 | ||
bb8c093b | 3664 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3665 | struct ieee80211_low_level_stats *stats) |
3666 | { | |
bf403db8 EK |
3667 | struct iwl_priv *priv = hw->priv; |
3668 | ||
3669 | priv = hw->priv; | |
b481de9c ZY |
3670 | IWL_DEBUG_MAC80211("enter\n"); |
3671 | IWL_DEBUG_MAC80211("leave\n"); | |
3672 | ||
3673 | return 0; | |
3674 | } | |
3675 | ||
bb8c093b | 3676 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c | 3677 | { |
bf403db8 EK |
3678 | struct iwl_priv *priv; |
3679 | ||
3680 | priv = hw->priv; | |
b481de9c ZY |
3681 | IWL_DEBUG_MAC80211("enter\n"); |
3682 | IWL_DEBUG_MAC80211("leave\n"); | |
3683 | ||
3684 | return 0; | |
3685 | } | |
3686 | ||
bb8c093b | 3687 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3688 | { |
c79dd5b5 | 3689 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3690 | unsigned long flags; |
3691 | ||
3692 | mutex_lock(&priv->mutex); | |
3693 | IWL_DEBUG_MAC80211("enter\n"); | |
3694 | ||
3695 | priv->lq_mngr.lq_ready = 0; | |
b481de9c | 3696 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3697 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3698 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3699 | |
c7de35cd | 3700 | iwl_reset_qos(priv); |
b481de9c ZY |
3701 | |
3702 | cancel_delayed_work(&priv->post_associate); | |
3703 | ||
3704 | spin_lock_irqsave(&priv->lock, flags); | |
3705 | priv->assoc_id = 0; | |
3706 | priv->assoc_capability = 0; | |
b481de9c ZY |
3707 | priv->assoc_station_added = 0; |
3708 | ||
3709 | /* new association get rid of ibss beacon skb */ | |
3710 | if (priv->ibss_beacon) | |
3711 | dev_kfree_skb(priv->ibss_beacon); | |
3712 | ||
3713 | priv->ibss_beacon = NULL; | |
3714 | ||
3715 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3716 | priv->timestamp = 0; |
b481de9c ZY |
3717 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
3718 | priv->beacon_int = 0; | |
3719 | ||
3720 | spin_unlock_irqrestore(&priv->lock, flags); | |
3721 | ||
fee1247a | 3722 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3723 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3724 | mutex_unlock(&priv->mutex); | |
3725 | return; | |
3726 | } | |
3727 | ||
052c4b9f | 3728 | /* we are restarting association process |
3729 | * clear RXON_FILTER_ASSOC_MSK bit | |
3730 | */ | |
3731 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2a421b91 | 3732 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3733 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3734 | iwl4965_commit_rxon(priv); |
052c4b9f | 3735 | } |
3736 | ||
5da4b55f MA |
3737 | iwl_power_update_mode(priv, 0); |
3738 | ||
b481de9c ZY |
3739 | /* Per mac80211.h: This is only used in IBSS mode... */ |
3740 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 3741 | |
b481de9c ZY |
3742 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3743 | mutex_unlock(&priv->mutex); | |
3744 | return; | |
3745 | } | |
3746 | ||
bb8c093b | 3747 | iwl4965_set_rate(priv); |
b481de9c ZY |
3748 | |
3749 | mutex_unlock(&priv->mutex); | |
3750 | ||
3751 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3752 | } |
3753 | ||
e039fa4a | 3754 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3755 | { |
c79dd5b5 | 3756 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3757 | unsigned long flags; |
3758 | ||
3759 | mutex_lock(&priv->mutex); | |
3760 | IWL_DEBUG_MAC80211("enter\n"); | |
3761 | ||
fee1247a | 3762 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3763 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3764 | mutex_unlock(&priv->mutex); | |
3765 | return -EIO; | |
3766 | } | |
3767 | ||
3768 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
3769 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
3770 | mutex_unlock(&priv->mutex); | |
3771 | return -EIO; | |
3772 | } | |
3773 | ||
3774 | spin_lock_irqsave(&priv->lock, flags); | |
3775 | ||
3776 | if (priv->ibss_beacon) | |
3777 | dev_kfree_skb(priv->ibss_beacon); | |
3778 | ||
3779 | priv->ibss_beacon = skb; | |
3780 | ||
3781 | priv->assoc_id = 0; | |
3782 | ||
3783 | IWL_DEBUG_MAC80211("leave\n"); | |
3784 | spin_unlock_irqrestore(&priv->lock, flags); | |
3785 | ||
c7de35cd | 3786 | iwl_reset_qos(priv); |
b481de9c | 3787 | |
c46fbefa | 3788 | iwl4965_post_associate(priv); |
b481de9c ZY |
3789 | |
3790 | mutex_unlock(&priv->mutex); | |
3791 | ||
3792 | return 0; | |
3793 | } | |
3794 | ||
b481de9c ZY |
3795 | /***************************************************************************** |
3796 | * | |
3797 | * sysfs attributes | |
3798 | * | |
3799 | *****************************************************************************/ | |
3800 | ||
0a6857e7 | 3801 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3802 | |
3803 | /* | |
3804 | * The following adds a new attribute to the sysfs representation | |
3805 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3806 | * used for controlling the debug level. | |
3807 | * | |
3808 | * See the level definitions in iwl for details. | |
3809 | */ | |
3810 | ||
8cf769c6 EK |
3811 | static ssize_t show_debug_level(struct device *d, |
3812 | struct device_attribute *attr, char *buf) | |
b481de9c | 3813 | { |
8cf769c6 EK |
3814 | struct iwl_priv *priv = d->driver_data; |
3815 | ||
3816 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3817 | } |
8cf769c6 EK |
3818 | static ssize_t store_debug_level(struct device *d, |
3819 | struct device_attribute *attr, | |
b481de9c ZY |
3820 | const char *buf, size_t count) |
3821 | { | |
8cf769c6 | 3822 | struct iwl_priv *priv = d->driver_data; |
b481de9c ZY |
3823 | char *p = (char *)buf; |
3824 | u32 val; | |
3825 | ||
3826 | val = simple_strtoul(p, &p, 0); | |
3827 | if (p == buf) | |
3828 | printk(KERN_INFO DRV_NAME | |
3829 | ": %s is not in hex or decimal form.\n", buf); | |
3830 | else | |
8cf769c6 | 3831 | priv->debug_level = val; |
b481de9c ZY |
3832 | |
3833 | return strnlen(buf, count); | |
3834 | } | |
3835 | ||
8cf769c6 EK |
3836 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3837 | show_debug_level, store_debug_level); | |
3838 | ||
b481de9c | 3839 | |
0a6857e7 | 3840 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3841 | |
b481de9c | 3842 | |
bc6f59bc TW |
3843 | static ssize_t show_version(struct device *d, |
3844 | struct device_attribute *attr, char *buf) | |
3845 | { | |
3846 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3847 | struct iwl_alive_resp *palive = &priv->card_alive; |
bc6f59bc TW |
3848 | |
3849 | if (palive->is_valid) | |
3850 | return sprintf(buf, "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3851 | "fw type: 0x%01X 0x%01X\n", | |
3852 | palive->ucode_major, palive->ucode_minor, | |
3853 | palive->sw_rev[0], palive->sw_rev[1], | |
3854 | palive->ver_type, palive->ver_subtype); | |
3855 | ||
3856 | else | |
3857 | return sprintf(buf, "fw not loaded\n"); | |
3858 | } | |
3859 | ||
3860 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3861 | ||
b481de9c ZY |
3862 | static ssize_t show_temperature(struct device *d, |
3863 | struct device_attribute *attr, char *buf) | |
3864 | { | |
c79dd5b5 | 3865 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3866 | |
fee1247a | 3867 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3868 | return -EAGAIN; |
3869 | ||
bb8c093b | 3870 | return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv)); |
b481de9c ZY |
3871 | } |
3872 | ||
3873 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3874 | ||
3875 | static ssize_t show_rs_window(struct device *d, | |
3876 | struct device_attribute *attr, | |
3877 | char *buf) | |
3878 | { | |
c79dd5b5 | 3879 | struct iwl_priv *priv = d->driver_data; |
bb8c093b | 3880 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); |
b481de9c ZY |
3881 | } |
3882 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
3883 | ||
3884 | static ssize_t show_tx_power(struct device *d, | |
3885 | struct device_attribute *attr, char *buf) | |
3886 | { | |
c79dd5b5 | 3887 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3888 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3889 | } |
3890 | ||
3891 | static ssize_t store_tx_power(struct device *d, | |
3892 | struct device_attribute *attr, | |
3893 | const char *buf, size_t count) | |
3894 | { | |
c79dd5b5 | 3895 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3896 | char *p = (char *)buf; |
3897 | u32 val; | |
3898 | ||
3899 | val = simple_strtoul(p, &p, 10); | |
3900 | if (p == buf) | |
3901 | printk(KERN_INFO DRV_NAME | |
3902 | ": %s is not in decimal form.\n", buf); | |
3903 | else | |
630fe9b6 | 3904 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3905 | |
3906 | return count; | |
3907 | } | |
3908 | ||
3909 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3910 | ||
3911 | static ssize_t show_flags(struct device *d, | |
3912 | struct device_attribute *attr, char *buf) | |
3913 | { | |
c79dd5b5 | 3914 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3915 | |
3916 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3917 | } | |
3918 | ||
3919 | static ssize_t store_flags(struct device *d, | |
3920 | struct device_attribute *attr, | |
3921 | const char *buf, size_t count) | |
3922 | { | |
c79dd5b5 | 3923 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3924 | u32 flags = simple_strtoul(buf, NULL, 0); |
3925 | ||
3926 | mutex_lock(&priv->mutex); | |
3927 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3928 | /* Cancel any currently running scans... */ | |
2a421b91 | 3929 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3930 | IWL_WARNING("Could not cancel scan.\n"); |
3931 | else { | |
3932 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
3933 | flags); | |
3934 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 3935 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3936 | } |
3937 | } | |
3938 | mutex_unlock(&priv->mutex); | |
3939 | ||
3940 | return count; | |
3941 | } | |
3942 | ||
3943 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3944 | ||
3945 | static ssize_t show_filter_flags(struct device *d, | |
3946 | struct device_attribute *attr, char *buf) | |
3947 | { | |
c79dd5b5 | 3948 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3949 | |
3950 | return sprintf(buf, "0x%04X\n", | |
3951 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3952 | } | |
3953 | ||
3954 | static ssize_t store_filter_flags(struct device *d, | |
3955 | struct device_attribute *attr, | |
3956 | const char *buf, size_t count) | |
3957 | { | |
c79dd5b5 | 3958 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3959 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
3960 | ||
3961 | mutex_lock(&priv->mutex); | |
3962 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3963 | /* Cancel any currently running scans... */ | |
2a421b91 | 3964 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3965 | IWL_WARNING("Could not cancel scan.\n"); |
3966 | else { | |
3967 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3968 | "0x%04X\n", filter_flags); | |
3969 | priv->staging_rxon.filter_flags = | |
3970 | cpu_to_le32(filter_flags); | |
bb8c093b | 3971 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3972 | } |
3973 | } | |
3974 | mutex_unlock(&priv->mutex); | |
3975 | ||
3976 | return count; | |
3977 | } | |
3978 | ||
3979 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3980 | store_filter_flags); | |
3981 | ||
c8b0e6e1 | 3982 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3983 | |
3984 | static ssize_t show_measurement(struct device *d, | |
3985 | struct device_attribute *attr, char *buf) | |
3986 | { | |
c79dd5b5 | 3987 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3988 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
3989 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3990 | u8 *data = (u8 *) & measure_report; | |
3991 | unsigned long flags; | |
3992 | ||
3993 | spin_lock_irqsave(&priv->lock, flags); | |
3994 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3995 | spin_unlock_irqrestore(&priv->lock, flags); | |
3996 | return 0; | |
3997 | } | |
3998 | memcpy(&measure_report, &priv->measure_report, size); | |
3999 | priv->measurement_status = 0; | |
4000 | spin_unlock_irqrestore(&priv->lock, flags); | |
4001 | ||
4002 | while (size && (PAGE_SIZE - len)) { | |
4003 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4004 | PAGE_SIZE - len, 1); | |
4005 | len = strlen(buf); | |
4006 | if (PAGE_SIZE - len) | |
4007 | buf[len++] = '\n'; | |
4008 | ||
4009 | ofs += 16; | |
4010 | size -= min(size, 16U); | |
4011 | } | |
4012 | ||
4013 | return len; | |
4014 | } | |
4015 | ||
4016 | static ssize_t store_measurement(struct device *d, | |
4017 | struct device_attribute *attr, | |
4018 | const char *buf, size_t count) | |
4019 | { | |
c79dd5b5 | 4020 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
4021 | struct ieee80211_measurement_params params = { |
4022 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
4023 | .start_time = cpu_to_le64(priv->last_tsf), | |
4024 | .duration = cpu_to_le16(1), | |
4025 | }; | |
4026 | u8 type = IWL_MEASURE_BASIC; | |
4027 | u8 buffer[32]; | |
4028 | u8 channel; | |
4029 | ||
4030 | if (count) { | |
4031 | char *p = buffer; | |
4032 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
4033 | channel = simple_strtoul(p, NULL, 0); | |
4034 | if (channel) | |
4035 | params.channel = channel; | |
4036 | ||
4037 | p = buffer; | |
4038 | while (*p && *p != ' ') | |
4039 | p++; | |
4040 | if (*p) | |
4041 | type = simple_strtoul(p + 1, NULL, 0); | |
4042 | } | |
4043 | ||
4044 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
4045 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 4046 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
4047 | |
4048 | return count; | |
4049 | } | |
4050 | ||
4051 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
4052 | show_measurement, store_measurement); | |
c8b0e6e1 | 4053 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
4054 | |
4055 | static ssize_t store_retry_rate(struct device *d, | |
4056 | struct device_attribute *attr, | |
4057 | const char *buf, size_t count) | |
4058 | { | |
c79dd5b5 | 4059 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
4060 | |
4061 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
4062 | if (priv->retry_rate <= 0) | |
4063 | priv->retry_rate = 1; | |
4064 | ||
4065 | return count; | |
4066 | } | |
4067 | ||
4068 | static ssize_t show_retry_rate(struct device *d, | |
4069 | struct device_attribute *attr, char *buf) | |
4070 | { | |
c79dd5b5 | 4071 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
4072 | return sprintf(buf, "%d", priv->retry_rate); |
4073 | } | |
4074 | ||
4075 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
4076 | store_retry_rate); | |
4077 | ||
4078 | static ssize_t store_power_level(struct device *d, | |
4079 | struct device_attribute *attr, | |
4080 | const char *buf, size_t count) | |
4081 | { | |
c79dd5b5 | 4082 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
4083 | int rc; |
4084 | int mode; | |
4085 | ||
4086 | mode = simple_strtoul(buf, NULL, 0); | |
4087 | mutex_lock(&priv->mutex); | |
4088 | ||
fee1247a | 4089 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
4090 | rc = -EAGAIN; |
4091 | goto out; | |
4092 | } | |
4093 | ||
5da4b55f MA |
4094 | rc = iwl_power_set_user_mode(priv, mode); |
4095 | if (rc) { | |
4096 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
4097 | goto out; | |
b481de9c | 4098 | } |
b481de9c ZY |
4099 | rc = count; |
4100 | ||
4101 | out: | |
4102 | mutex_unlock(&priv->mutex); | |
4103 | return rc; | |
4104 | } | |
4105 | ||
4106 | #define MAX_WX_STRING 80 | |
4107 | ||
4108 | /* Values are in microsecond */ | |
4109 | static const s32 timeout_duration[] = { | |
4110 | 350000, | |
4111 | 250000, | |
4112 | 75000, | |
4113 | 37000, | |
4114 | 25000, | |
4115 | }; | |
4116 | static const s32 period_duration[] = { | |
4117 | 400000, | |
4118 | 700000, | |
4119 | 1000000, | |
4120 | 1000000, | |
4121 | 1000000 | |
4122 | }; | |
4123 | ||
4124 | static ssize_t show_power_level(struct device *d, | |
4125 | struct device_attribute *attr, char *buf) | |
4126 | { | |
c79dd5b5 | 4127 | struct iwl_priv *priv = dev_get_drvdata(d); |
5da4b55f | 4128 | int level = priv->power_data.power_mode; |
b481de9c ZY |
4129 | char *p = buf; |
4130 | ||
4131 | p += sprintf(p, "%d ", level); | |
4132 | switch (level) { | |
4133 | case IWL_POWER_MODE_CAM: | |
4134 | case IWL_POWER_AC: | |
4135 | p += sprintf(p, "(AC)"); | |
4136 | break; | |
4137 | case IWL_POWER_BATTERY: | |
4138 | p += sprintf(p, "(BATTERY)"); | |
4139 | break; | |
4140 | default: | |
4141 | p += sprintf(p, | |
4142 | "(Timeout %dms, Period %dms)", | |
4143 | timeout_duration[level - 1] / 1000, | |
4144 | period_duration[level - 1] / 1000); | |
4145 | } | |
5da4b55f | 4146 | /* |
b481de9c ZY |
4147 | if (!(priv->power_mode & IWL_POWER_ENABLED)) |
4148 | p += sprintf(p, " OFF\n"); | |
4149 | else | |
4150 | p += sprintf(p, " \n"); | |
5da4b55f MA |
4151 | */ |
4152 | p += sprintf(p, " \n"); | |
b481de9c | 4153 | return (p - buf + 1); |
b481de9c ZY |
4154 | } |
4155 | ||
4156 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
4157 | store_power_level); | |
4158 | ||
4159 | static ssize_t show_channels(struct device *d, | |
4160 | struct device_attribute *attr, char *buf) | |
4161 | { | |
8318d78a JB |
4162 | /* all this shit doesn't belong into sysfs anyway */ |
4163 | return 0; | |
b481de9c ZY |
4164 | } |
4165 | ||
4166 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4167 | ||
4168 | static ssize_t show_statistics(struct device *d, | |
4169 | struct device_attribute *attr, char *buf) | |
4170 | { | |
c79dd5b5 | 4171 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 4172 | u32 size = sizeof(struct iwl4965_notif_statistics); |
b481de9c ZY |
4173 | u32 len = 0, ofs = 0; |
4174 | u8 *data = (u8 *) & priv->statistics; | |
4175 | int rc = 0; | |
4176 | ||
fee1247a | 4177 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4178 | return -EAGAIN; |
4179 | ||
4180 | mutex_lock(&priv->mutex); | |
49ea8596 | 4181 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4182 | mutex_unlock(&priv->mutex); |
4183 | ||
4184 | if (rc) { | |
4185 | len = sprintf(buf, | |
4186 | "Error sending statistics request: 0x%08X\n", rc); | |
4187 | return len; | |
4188 | } | |
4189 | ||
4190 | while (size && (PAGE_SIZE - len)) { | |
4191 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4192 | PAGE_SIZE - len, 1); | |
4193 | len = strlen(buf); | |
4194 | if (PAGE_SIZE - len) | |
4195 | buf[len++] = '\n'; | |
4196 | ||
4197 | ofs += 16; | |
4198 | size -= min(size, 16U); | |
4199 | } | |
4200 | ||
4201 | return len; | |
4202 | } | |
4203 | ||
4204 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4205 | ||
b481de9c ZY |
4206 | static ssize_t show_status(struct device *d, |
4207 | struct device_attribute *attr, char *buf) | |
4208 | { | |
c79dd5b5 | 4209 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4210 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4211 | return -EAGAIN; |
4212 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4213 | } | |
4214 | ||
4215 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4216 | ||
b481de9c ZY |
4217 | /***************************************************************************** |
4218 | * | |
4219 | * driver setup and teardown | |
4220 | * | |
4221 | *****************************************************************************/ | |
4222 | ||
4e39317d | 4223 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4224 | { |
4225 | priv->workqueue = create_workqueue(DRV_NAME); | |
4226 | ||
4227 | init_waitqueue_head(&priv->wait_command_queue); | |
4228 | ||
bb8c093b CH |
4229 | INIT_WORK(&priv->up, iwl4965_bg_up); |
4230 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
4231 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
bb8c093b CH |
4232 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); |
4233 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
4419e39b | 4234 | INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor); |
16e727e8 | 4235 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
bb8c093b | 4236 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); |
4a4a9e81 TW |
4237 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4238 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 TW |
4239 | |
4240 | /* FIXME : remove when resolved PENDING */ | |
4241 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); | |
4242 | iwl_setup_scan_deferred_work(priv); | |
bb8c093b | 4243 | |
4e39317d EG |
4244 | if (priv->cfg->ops->lib->setup_deferred_work) |
4245 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4246 | ||
4247 | init_timer(&priv->statistics_periodic); | |
4248 | priv->statistics_periodic.data = (unsigned long)priv; | |
4249 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; | |
b481de9c ZY |
4250 | |
4251 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4252 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4253 | } |
4254 | ||
4e39317d | 4255 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4256 | { |
4e39317d EG |
4257 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4258 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4259 | |
3ae6a054 | 4260 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
4261 | cancel_delayed_work(&priv->scan_check); |
4262 | cancel_delayed_work(&priv->alive_start); | |
4263 | cancel_delayed_work(&priv->post_associate); | |
4264 | cancel_work_sync(&priv->beacon_update); | |
4e39317d | 4265 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4266 | } |
4267 | ||
bb8c093b | 4268 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c | 4269 | &dev_attr_channels.attr, |
b481de9c ZY |
4270 | &dev_attr_flags.attr, |
4271 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 4272 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4273 | &dev_attr_measurement.attr, |
4274 | #endif | |
4275 | &dev_attr_power_level.attr, | |
4276 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4277 | &dev_attr_rs_window.attr, |
4278 | &dev_attr_statistics.attr, | |
4279 | &dev_attr_status.attr, | |
4280 | &dev_attr_temperature.attr, | |
b481de9c | 4281 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4282 | #ifdef CONFIG_IWLWIFI_DEBUG |
4283 | &dev_attr_debug_level.attr, | |
4284 | #endif | |
bc6f59bc | 4285 | &dev_attr_version.attr, |
b481de9c ZY |
4286 | |
4287 | NULL | |
4288 | }; | |
4289 | ||
bb8c093b | 4290 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 4291 | .name = NULL, /* put in device directory */ |
bb8c093b | 4292 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
4293 | }; |
4294 | ||
bb8c093b CH |
4295 | static struct ieee80211_ops iwl4965_hw_ops = { |
4296 | .tx = iwl4965_mac_tx, | |
4297 | .start = iwl4965_mac_start, | |
4298 | .stop = iwl4965_mac_stop, | |
4299 | .add_interface = iwl4965_mac_add_interface, | |
4300 | .remove_interface = iwl4965_mac_remove_interface, | |
4301 | .config = iwl4965_mac_config, | |
4302 | .config_interface = iwl4965_mac_config_interface, | |
4303 | .configure_filter = iwl4965_configure_filter, | |
4304 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 4305 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
4306 | .get_stats = iwl4965_mac_get_stats, |
4307 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
4308 | .conf_tx = iwl4965_mac_conf_tx, | |
4309 | .get_tsf = iwl4965_mac_get_tsf, | |
4310 | .reset_tsf = iwl4965_mac_reset_tsf, | |
4311 | .beacon_update = iwl4965_mac_beacon_update, | |
471b3efd | 4312 | .bss_info_changed = iwl4965_bss_info_changed, |
9ab46173 | 4313 | .ampdu_action = iwl4965_mac_ampdu_action, |
bb8c093b | 4314 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
4315 | }; |
4316 | ||
bb8c093b | 4317 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4318 | { |
4319 | int err = 0; | |
c79dd5b5 | 4320 | struct iwl_priv *priv; |
b481de9c | 4321 | struct ieee80211_hw *hw; |
82b9a121 | 4322 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4323 | unsigned long flags; |
5a66926a | 4324 | DECLARE_MAC_BUF(mac); |
b481de9c | 4325 | |
316c30d9 AK |
4326 | /************************ |
4327 | * 1. Allocating HW data | |
4328 | ************************/ | |
4329 | ||
6440adb5 BC |
4330 | /* Disabling hardware scan means that mac80211 will perform scans |
4331 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4332 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4333 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4334 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4335 | "Disabling hw_scan\n"); | |
bb8c093b | 4336 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4337 | } |
4338 | ||
1d0a082d AK |
4339 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
4340 | if (!hw) { | |
b481de9c ZY |
4341 | err = -ENOMEM; |
4342 | goto out; | |
4343 | } | |
1d0a082d AK |
4344 | priv = hw->priv; |
4345 | /* At this point both hw and priv are allocated. */ | |
4346 | ||
b481de9c ZY |
4347 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4348 | ||
4349 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4350 | priv->cfg = cfg; |
b481de9c | 4351 | priv->pci_dev = pdev; |
316c30d9 | 4352 | |
0a6857e7 | 4353 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4354 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4355 | atomic_set(&priv->restrict_refcnt, 0); |
4356 | #endif | |
b481de9c | 4357 | |
316c30d9 AK |
4358 | /************************** |
4359 | * 2. Initializing PCI bus | |
4360 | **************************/ | |
4361 | if (pci_enable_device(pdev)) { | |
4362 | err = -ENODEV; | |
4363 | goto out_ieee80211_free_hw; | |
4364 | } | |
4365 | ||
4366 | pci_set_master(pdev); | |
4367 | ||
cc2a8ea8 | 4368 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
316c30d9 | 4369 | if (!err) |
cc2a8ea8 RR |
4370 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
4371 | if (err) { | |
4372 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
4373 | if (!err) | |
4374 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
4375 | /* both attempts failed: */ | |
316c30d9 | 4376 | if (err) { |
cc2a8ea8 RR |
4377 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4378 | DRV_NAME); | |
316c30d9 | 4379 | goto out_pci_disable_device; |
cc2a8ea8 | 4380 | } |
316c30d9 AK |
4381 | } |
4382 | ||
4383 | err = pci_request_regions(pdev, DRV_NAME); | |
4384 | if (err) | |
4385 | goto out_pci_disable_device; | |
4386 | ||
4387 | pci_set_drvdata(pdev, priv); | |
4388 | ||
4389 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
4390 | * PCI Tx retries from interfering with C3 CPU state */ | |
4391 | pci_write_config_byte(pdev, 0x41, 0x00); | |
4392 | ||
4393 | /*********************** | |
4394 | * 3. Read REV register | |
4395 | ***********************/ | |
4396 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4397 | if (!priv->hw_base) { | |
4398 | err = -ENODEV; | |
4399 | goto out_pci_release_regions; | |
4400 | } | |
4401 | ||
4402 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4403 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4404 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4405 | ||
b661c819 | 4406 | iwl_hw_detect(priv); |
316c30d9 | 4407 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4408 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4409 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4410 | |
91238714 TW |
4411 | /* amp init */ |
4412 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4413 | if (err < 0) { |
91238714 | 4414 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4415 | goto out_iounmap; |
4416 | } | |
91238714 TW |
4417 | /***************** |
4418 | * 4. Read EEPROM | |
4419 | *****************/ | |
316c30d9 AK |
4420 | /* Read the EEPROM */ |
4421 | err = iwl_eeprom_init(priv); | |
4422 | if (err) { | |
4423 | IWL_ERROR("Unable to init EEPROM\n"); | |
4424 | goto out_iounmap; | |
4425 | } | |
8614f360 TW |
4426 | err = iwl_eeprom_check_version(priv); |
4427 | if (err) | |
4428 | goto out_iounmap; | |
4429 | ||
02883017 | 4430 | /* extract MAC Address */ |
316c30d9 AK |
4431 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
4432 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
4433 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
4434 | ||
4435 | /************************ | |
4436 | * 5. Setup HW constants | |
4437 | ************************/ | |
4438 | /* Device-specific setup */ | |
5425e490 TW |
4439 | if (priv->cfg->ops->lib->set_hw_params(priv)) { |
4440 | IWL_ERROR("failed to set hw parameters\n"); | |
073d3f5f | 4441 | goto out_free_eeprom; |
316c30d9 AK |
4442 | } |
4443 | ||
4444 | /******************* | |
6ba87956 | 4445 | * 6. Setup priv |
316c30d9 | 4446 | *******************/ |
b481de9c | 4447 | |
6ba87956 | 4448 | err = iwl_init_drv(priv); |
bf85ea4f | 4449 | if (err) |
399f4900 | 4450 | goto out_free_eeprom; |
bf85ea4f | 4451 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4452 | |
4453 | /********************************** | |
4454 | * 7. Initialize module parameters | |
4455 | **********************************/ | |
4456 | ||
4457 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4458 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4459 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4460 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4461 | } | |
4462 | ||
316c30d9 AK |
4463 | /******************** |
4464 | * 8. Setup services | |
4465 | ********************/ | |
0359facc | 4466 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 4467 | iwl4965_disable_interrupts(priv); |
0359facc | 4468 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
4469 | |
4470 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4471 | if (err) { | |
4472 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4473 | goto out_uninit_drv; |
316c30d9 AK |
4474 | } |
4475 | ||
316c30d9 | 4476 | |
4e39317d | 4477 | iwl_setup_deferred_work(priv); |
316c30d9 AK |
4478 | iwl4965_setup_rx_handlers(priv); |
4479 | ||
4480 | /******************** | |
4481 | * 9. Conclude | |
4482 | ********************/ | |
5a66926a ZY |
4483 | pci_save_state(pdev); |
4484 | pci_disable_device(pdev); | |
b481de9c | 4485 | |
6ba87956 TW |
4486 | /********************************** |
4487 | * 10. Setup and register mac80211 | |
4488 | **********************************/ | |
4489 | ||
4490 | err = iwl_setup_mac(priv); | |
4491 | if (err) | |
4492 | goto out_remove_sysfs; | |
4493 | ||
4494 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4495 | if (err) | |
4496 | IWL_ERROR("failed to create debugfs files\n"); | |
4497 | ||
c8381fdc MA |
4498 | /* notify iwlcore to init */ |
4499 | iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT); | |
b481de9c ZY |
4500 | return 0; |
4501 | ||
316c30d9 AK |
4502 | out_remove_sysfs: |
4503 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6ba87956 TW |
4504 | out_uninit_drv: |
4505 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4506 | out_free_eeprom: |
4507 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4508 | out_iounmap: |
4509 | pci_iounmap(pdev, priv->hw_base); | |
4510 | out_pci_release_regions: | |
4511 | pci_release_regions(pdev); | |
316c30d9 | 4512 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4513 | out_pci_disable_device: |
4514 | pci_disable_device(pdev); | |
b481de9c ZY |
4515 | out_ieee80211_free_hw: |
4516 | ieee80211_free_hw(priv->hw); | |
4517 | out: | |
4518 | return err; | |
4519 | } | |
4520 | ||
c83dbf68 | 4521 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 4522 | { |
c79dd5b5 | 4523 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
4524 | struct list_head *p, *q; |
4525 | int i; | |
0359facc | 4526 | unsigned long flags; |
b481de9c ZY |
4527 | |
4528 | if (!priv) | |
4529 | return; | |
4530 | ||
4531 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4532 | ||
67249625 EG |
4533 | iwl_dbgfs_unregister(priv); |
4534 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4535 | ||
c4f55232 RR |
4536 | if (priv->mac80211_registered) { |
4537 | ieee80211_unregister_hw(priv->hw); | |
4538 | priv->mac80211_registered = 0; | |
4539 | } | |
4540 | ||
b481de9c | 4541 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 4542 | |
bb8c093b | 4543 | iwl4965_down(priv); |
b481de9c | 4544 | |
0359facc MA |
4545 | /* make sure we flush any pending irq or |
4546 | * tasklet for the driver | |
4547 | */ | |
4548 | spin_lock_irqsave(&priv->lock, flags); | |
4549 | iwl4965_disable_interrupts(priv); | |
4550 | spin_unlock_irqrestore(&priv->lock, flags); | |
4551 | ||
4552 | iwl_synchronize_irq(priv); | |
4553 | ||
b481de9c ZY |
4554 | /* Free MAC hash list for ADHOC */ |
4555 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
4556 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
4557 | list_del(p); | |
bb8c093b | 4558 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
4559 | } |
4560 | } | |
4561 | ||
c8381fdc | 4562 | iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT); |
b481de9c | 4563 | |
bb8c093b | 4564 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4565 | |
4566 | if (priv->rxq.bd) | |
a55360e4 | 4567 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4568 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4569 | |
bf85ea4f | 4570 | iwlcore_clear_stations_table(priv); |
073d3f5f | 4571 | iwl_eeprom_free(priv); |
b481de9c | 4572 | |
b481de9c | 4573 | |
948c171c MA |
4574 | /*netif_stop_queue(dev); */ |
4575 | flush_workqueue(priv->workqueue); | |
4576 | ||
bb8c093b | 4577 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
4578 | * priv->workqueue... so we can't take down the workqueue |
4579 | * until now... */ | |
4580 | destroy_workqueue(priv->workqueue); | |
4581 | priv->workqueue = NULL; | |
4582 | ||
b481de9c ZY |
4583 | pci_iounmap(pdev, priv->hw_base); |
4584 | pci_release_regions(pdev); | |
4585 | pci_disable_device(pdev); | |
4586 | pci_set_drvdata(pdev, NULL); | |
4587 | ||
6ba87956 | 4588 | iwl_uninit_drv(priv); |
b481de9c ZY |
4589 | |
4590 | if (priv->ibss_beacon) | |
4591 | dev_kfree_skb(priv->ibss_beacon); | |
4592 | ||
4593 | ieee80211_free_hw(priv->hw); | |
4594 | } | |
4595 | ||
4596 | #ifdef CONFIG_PM | |
4597 | ||
bb8c093b | 4598 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4599 | { |
c79dd5b5 | 4600 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4601 | |
e655b9f0 ZY |
4602 | if (priv->is_open) { |
4603 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
4604 | iwl4965_mac_stop(priv->hw); | |
4605 | priv->is_open = 1; | |
4606 | } | |
b481de9c | 4607 | |
b481de9c ZY |
4608 | pci_set_power_state(pdev, PCI_D3hot); |
4609 | ||
b481de9c ZY |
4610 | return 0; |
4611 | } | |
4612 | ||
bb8c093b | 4613 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 4614 | { |
c79dd5b5 | 4615 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4616 | |
b481de9c | 4617 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4618 | |
e655b9f0 ZY |
4619 | if (priv->is_open) |
4620 | iwl4965_mac_start(priv->hw); | |
b481de9c | 4621 | |
e655b9f0 | 4622 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4623 | return 0; |
4624 | } | |
4625 | ||
4626 | #endif /* CONFIG_PM */ | |
4627 | ||
4628 | /***************************************************************************** | |
4629 | * | |
4630 | * driver and module entry point | |
4631 | * | |
4632 | *****************************************************************************/ | |
4633 | ||
fed9017e RR |
4634 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4635 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4636 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4637 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
5a6a256e TW |
4638 | #ifdef CONFIG_IWL5000 |
4639 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4640 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
4641 | {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)}, | |
4642 | #endif /* CONFIG_IWL5000 */ | |
fed9017e RR |
4643 | {0} |
4644 | }; | |
4645 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4646 | ||
4647 | static struct pci_driver iwl_driver = { | |
b481de9c | 4648 | .name = DRV_NAME, |
fed9017e | 4649 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
4650 | .probe = iwl4965_pci_probe, |
4651 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 4652 | #ifdef CONFIG_PM |
bb8c093b CH |
4653 | .suspend = iwl4965_pci_suspend, |
4654 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
4655 | #endif |
4656 | }; | |
4657 | ||
bb8c093b | 4658 | static int __init iwl4965_init(void) |
b481de9c ZY |
4659 | { |
4660 | ||
4661 | int ret; | |
4662 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4663 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 RC |
4664 | |
4665 | ret = iwl4965_rate_control_register(); | |
4666 | if (ret) { | |
4667 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4668 | return ret; | |
4669 | } | |
4670 | ||
fed9017e | 4671 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4672 | if (ret) { |
4673 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4674 | goto error_register; |
b481de9c | 4675 | } |
b481de9c ZY |
4676 | |
4677 | return ret; | |
897e1cf2 | 4678 | |
897e1cf2 RC |
4679 | error_register: |
4680 | iwl4965_rate_control_unregister(); | |
4681 | return ret; | |
b481de9c ZY |
4682 | } |
4683 | ||
bb8c093b | 4684 | static void __exit iwl4965_exit(void) |
b481de9c | 4685 | { |
fed9017e | 4686 | pci_unregister_driver(&iwl_driver); |
897e1cf2 | 4687 | iwl4965_rate_control_unregister(); |
b481de9c ZY |
4688 | } |
4689 | ||
bb8c093b CH |
4690 | module_exit(iwl4965_exit); |
4691 | module_init(iwl4965_init); |